Experiment Name: Layout design for cmos INVERTER using microwind.

Fig: layout of inverter

Fig:output of inverter
Experiment Name: Layout design for cmos NAND using microwind.

Fig: layout of nand

Fig: output of nand
Experiment Name: Layout design for cmos NAND using microwind.

Fig: layout of nor

Fig: output of nor
Experiment Name: Cmos inverter design using DSCH and MICROWIND.

CMOS INVERTER circuit diagram:

Corresponding layout and output:
Experiment Name: Cmos nand design using DSCH and MICROWIND.

CMOS NAND circuit diagram:

Corresponding layout and otput:
Experiment Name: Cmos nor design using DSCH and MICROWIND.

CMOS NOR circuit diagram:

Corresponding layout and otput:
Assignment Name: Cmos half adder design using DSCH and MICROWIND.

TRUTH TABLE:

A B S C

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

The carry output(C) is 0 unless both inputs are 1. The S output represents the least significant bit of the
sum.

The simplified sum of products expressions are:

S=x’y + xy’

C =xy

CMOS HALF ADDER circuit diagram:

Corresponding layout and outout:
Output:

Fig: output of F(A+B)