IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO.
1, JANUARY 2009
A Versatile Control Scheme for a Dynamic Voltage
Restorer for Power-Quality Improvement
Pedro Roncero-Sánchez, Member, IEEE, Enrique Acha, Senior Member, IEEE,
Jose Enrique Ortega-Calderon, Member, IEEE, Vicente Feliu, Senior Member, IEEE, and
Aurelio García-Cerrada, Member, IEEE
Abstract—This paper presents a control system based on a repet-
itive controller to compensate for key power-quality disturbances,
namely voltage sags, harmonic voltages, and voltage imbalances,
using a dynamic voltage restorer (DVR). The control scheme deals
with all three disturbances simultaneously within a bandwidth. The
control structure is quite simple and yet very robust; it contains
a feedforward term to improve the transient response and a feed-
back term to enable zero error in steady state. The well-developed
graphical facilities available in PSCAD/EMTDC are used to carry
out all modeling aspects of the repetitive controller and test system.
Simulation results show that the control approach performs very
effectively and yields excellent voltage regulation.
Index Terms—Dynamic voltage restorer (DVR), harmonic dis-
tortion, power quality (PQ), repetitive control, voltage sag.
I. INTRODUCTION
T HE importance of power quality (PQ) has risen very con-
siderably over the last two decades due to a marked increase
in the number of equipment which is sensitive to adverse PQ en-
vironments, the disturbances introduced by nonlinear loads, and
the proliferation of renewable energy sources, among others. At
least 50% of all PQ disturbances are of the voltage quality type,
where the interest is the study of any deviation of the voltage
waveform from its ideal form [1]. The best well-known distur-
bances are voltage sags and swells, harmonic and interharmonic
voltages, and, for three-phase systems, voltage imbalances.
A voltage sag is normally caused by short-circuit faults in
the power network [2], [3] or by the starting up of induction
motors of large rating [4]. The ensuing adverse consequences
are a reduction in the energy transfers of electric motors and the
disconnection of sensitive equipment and industrial processes
brought to a standstill. A comprehensive description of voltage
sags can be found in [5].
Manuscript received June 05, 2007; revised May 26, 2008. Current ver-
sion published December 24, 2008. This work was supported in part by the
Castilla-La Mancha Council under Research Project PBI-06-0150, in part by
the Fellowship Program of Caja Castilla-La Mancha, and in part by the Consejo
Nacional de Ciencia y Tecnología de México and Instituto Tecnológico y de
Estudios Superiores de Monterrey, México. Paper no. TPWRD-00330-2007.
P. Roncero-Sánchez and V. Feliu are with the Department of Electrical, Elec-
tronic, Control Engineering and Communications, E.T.S. Ingenieros Industri-
ales, Universidad de Castilla-La Mancha, Ciudad Real 13071, Spain (e-mail:
Pedro.Roncero@uclm.es).
E. Acha and J. E. Ortega-Calderon are with the Department of Electronics and
Electrical Engineering of the University of Glasgow, Glasgow G12 8LT, U.K.
A. García-Cerrada is with the Department of Electronics and Control Engi-
neering, Universidad Pontificia Comillas de Madrid, Madrid 28045, Spain.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPWRD.2008.2002967
0885-8977/$25.00 © 2008 IEEE
277
Harmonics are produced by nonlinear equipment, such as
electric arc furnaces, variable speed drives, large concentrations
of arc discharge lamps, and loads which use power electronics.
Harmonic currents generated by a nonlinear device or created
as a result of existing harmonic voltages will exacerbate copper
and iron losses in electrical equipment. In rotating machinery,
they will produce pulsating torques and overheating [6].
Voltage imbalances are normally brought about by unbal-
anced loads or unbalanced short-circuit faults, thus producing
overheating in synchronous machines and, in some extreme
cases, leading to load shutdowns and equipment failure.
The DVR is essentially a voltage-source converter connected
in series with the ac network via an interfacing transformer, which
was originally conceived to ameliorate voltage sags [7]. However,
as shown in this paper, its range of applicability can be extended
very considerably when provided with a suitable control scheme.
The basic operating principle behind the DVR is the injection of
an inphase series voltage with the incoming supply to the load,
sufficient enough to reestablish the voltage to its presag state. Its
rate of success in combating voltage sags in actual installations
is well documented [8], this being one of the reasons why it con-
tinues to attract a great deal of interest in industry and in academic
circles. Research work has been reported on DVR two-level [9]
and multilevel [10] topologies as well as on control and opera-
tion. The latter may be divided into several topics.
1) The configuration, whether two-level or multilevel, relates
to the availability, or otherwise, of energy storage [2], the
output filter [11], and the capacity to cancel out unbalanced
voltages in three-phase four-wire systems [12].
2) The voltage-sag detection. Several techniques have been
used to detect the instant of sag appearance, such as mea-
surement of the peak value of the grid voltage. A compre-
hensive analysis of these techniques can be found in [13].
3) The control strategy. The DVR may be operated to inject
the series voltage according to several criteria, such as
minimum energy exchange with the grid. The three most
popular strategies to compensate voltage sags are [14]:
1) presag compensation. The injected DVR voltage is
calculated to simply compensate the load voltage to its
presag condition; 2) inphase compensation. The DVR
voltage is always in phase with the grid voltage; and 3)
optimal energy compensation. This strategy minimizes
the energy transfer between the energy storage and the
grid during steady-state operation. Although these are
the best well-known control strategies, many efforts are
being made to develop new ones to enable better DVR
utilization, as amply discussed in [15]–[18].
278 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009

4) The design of the control law. The controller is normally

designed with some specific aims firmly in mind, such as
the kind of disturbances it should ameliorate, the velocity
of time response, error in steady-state, etc. Most of the
published work on DVR uses a simple proportional-inte-
gral (PI) control law implemented in a frame of reference
which rotates with the frequency of the grid voltage. This
basic approach is sufficient to enable voltage sag com-
pensation, to warrant zero tracking error for the funda-
mental component, and to compensate certain kinds of un-
balanced conditions. However, this simple control law is
insufficient when dealing with high-performance applica-
tions and more complex controllers are required [19], [20].
The former reference adds resonant control filters to the
existing PI control scheme in order to eliminate harmonic
voltages [21]. The main drawback of this structure is that Fig. 1. System configuration with a DVR.
one filter is required for each harmonic to be eliminated if
the system is unbalanced, and only half that number if the
system is balanced. The latter reference takes the approach
of adding a feedforward loop to the feedback PI controller
in order to improve the control overall performance, taking
into account the time delay of the sampled system and the
DVR output filter constraints.
This paper focuses on the design of a closed-loop control
law for a two-level DVR, based on the so-called repetitive con-
trol, aiming at compensating key voltage-quality disturbances,
namely, voltage sags, harmonic voltages, andvoltage imbalances.
Repetitive control was first introduced in [22] to eliminate pe-
riodic disturbances and to track periodic reference signals with
zero tracking error. A detailed analysis of various repetitive con-
Fig. 2. Single-phase equivalent circuit for the DVR.
trol configurations is reported in [23]. The repetitive control was
originally applied to eliminate speed fluctuations in electric mo-
tors but it has since been adopted in a wide range of power-elec-
tronics applications. In [24], a repetitive controller is applied II. MODEL OF THE DVR-CONNECTION SYSTEM
to obtain an output voltage with low distortion in a constant
A typical test system, incorporating a DVR, is depicted in Fig.
voltage, constant frequency three-phase PWM inverter. In [25],
1. Various kinds of loads are connected at the point of common
a repetitive controller is used to achieve zero tracking error in
coupling (PCC), including a linear load, a nonlinear load, and a
the output current of a three-phase rectifier in order to improve
sensitive load. The series connection of the voltage-source con-
its power factor. A more recent example is found in [26], where
verter (VSC) making up the DVR with the ac system is achieved
a repetitive controller is used in a parallel active filter to cancel
by means of a coupling transformer whose primary is connected
out harmonic currents produced by a nonlinear load.
in series between the mains and the load. Although a passive LC
The repetitive controller presented in this paper has a wider
filter is normally used to obtain a switching-ripple-free DVR
range of applicability; it is used in a DVR system to ameliorate
voltage, in this paper, this filter is not considered in order to
voltage sags, harmonic voltages, and voltage imbalances within
fully assess the harmonic cancelling properties of the repetitive
a bandwidth. Unlike other schemes, which also have a com-
controller.
parable range of applicability, only one controller is needed to
Fig. 2 shows the equivalent circuit for the DVR, where is
cancel all three disturbances simultaneously. The control struc-
the supply voltage, is the line impedance, is the current
ture contains a grid voltage feedforward term to improve the
supplied by the source, which splits at the PCC into a current
system transient response, and a closed-loop control which com-
injected into the sensitive load and a current injected into other
prises a feedback of the load voltage with the repetitive con-
loads . The voltage is the measured voltage at the PCC,
troller in order to warrant zero tracking error in steady state.
is the voltage representing the DVR, which is modeled as an
This paper is organized as follows. The DVR model is pre-
ideal voltage source. Also, and are the resistance and in-
sented in Section II. The fundamentals of the control system
ductance of the coupling transformer, respectively, and is the
and the proposed control scheme are studied in Section III. The
measured voltage across the sensitive load. The sensitive-load
modeling of the repetitive controller using the well-developed
voltage can be obtained as
graphical facilities available in PSCAD/EMTDC and simulation
results are presented in Section IV. The main conclusions of the
current investigation are drawn in Section V. (1)
RONCERO-SÁNCHEZ et al.: VERSATILE CONTROL SCHEME FOR A DVR FOR PQ IMPROVEMENT 279

Fig. 3. Closed-loop control scheme.

III. DESIGN OF THE CONTROL SYSTEM The substitution of (6) into (3)–(5) yields
The aim of the control system is to regulate the load voltage in
the presence of various kinds of disturbances. The control struc- (7)
ture proposed in this paper is based on the use of a feedforward
term of the voltage at the PCC to obtain a fast transient response,
and a feedback term of the load voltage to ensure zero error in (8)
steady state. The continuous time of the whole control system
is depicted in Fig. 3 where represents the controller. If the
switching frequency is high enough, the DVR can be modeled (9)
as a linear amplifier with a pure delay [20]. This
delay is the sum of one-sample-period plus the time delay of the
inverter due to PWM switching. The former applies in cases of In order to calculate the frequency response of (7)–(9), the
microprocessor-based implementations [27] and the latter can variable is substituted by . It should be noticed that the
be taken to be half the switching period [20]. The transfer func- term is always zero whenever is an
tion is equal to is the reference voltage integer multiple of the frequency (e.g., , then
for the load, is the control output, whereas is the ). Hence, the frequency response shows that
output voltage of the DVR and is the load voltage. The and for frequen-
inputs and stand for the grid voltage and the cur- cies with . Therefore, if the
rent through the load, respectively. Both inputs are assumed closed-loop system is stable, the error in steady state is zero for
to be measurable. The model may be extended with ease to sinusoidal reference inputs or sinusoidal disturbance inputs of
three-phase applications. frequency .
The load voltage is Since the delay is smaller than the grid-voltage period
, the transfer function can be chosen
(2) as

where (10)

With the substitution of (7)–(9) and (10) into the load voltage,
(3) (2) yields

(4)

(5)
(11)
Repetitive control is a contemporary control technique that may Unfortunately, the delay is not exactly known and the closed-
be used to cancel out, simultaneously, voltage sags, voltage har- loop system will not be stable if a controller is used with (6) and
monics, and voltage imbalances, characteristics rarely achieved (10) designed for an estimated .
with other control techniques, such as PI controllers. As a first To tackle this problem, a modified controller is pro-
approximation, as described in conventional repetitive-control posed as
theory [23], the controller can be written as
(12)
(6)
where is the transfer function of a low-pass filter [23],
where is a transfer function chosen so that the closed-loop is the estimated value for the DVR delay, with , and
stability is always fulfilled and is the fundamental frequency is a design parameter which is smaller than the period of the
at the mains. grid voltage .
280 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009

The transfer functions (3)–(5) are

(13)

(14)

(15)

with .
The characteristic equation of the resulting closed-loop
system is

(16)

In order to guarantee stability, the term in (16) must comply

with the Nyquist criterion: if the number of unstable poles of the
open-loop system is equal to zero , then the
number of counterclokwise encirclements of the point
of the term must be zero with .
Fig. 4. Test system implemented in PSCAD/EMTDC.
Since all of the poles of are stable, which implies that
, then must be zero to guarantee stability, and a suffi-
cient condition for can be obtained by making

(17)

which is fulfilled if

(18)

Note that condition (18) is independent of the delay value of

the controller in (12).
A low-pass filter, which is approximated by a constant time
delay within its passband, can be designed
with being the time delay of the filter. For continuous sys-
tems, Bessel filters can be used because they can be approxi-
mated by a constant time delay [28], while for discrete time sys-
tems, finite-impulse-response (FIR) filters with a linear phase in
their passband can be used [29]. Therefore, the design parameter
can be chosen to cancel out the filter time delay ;
and under such conditions, the closed-loop-system frequency re- Fig. 5. Three-phase control scheme using the repetitive controller.
sponse will satisfy and
while the approximation of a constant time delay is valid. TABLE I
Obviously, the bandwidth of the controller will be limited be- PARAMETERS OF THE TEST SYSTEM
cause the magnitude characteristic of the filter will decrease as
frequency increases.

IV. STUDY CASE

The power system depicted in Fig. 1 and the controller shown
in Fig. 3 have been implemented in PSCAD/EMTDC. Figs. 4 and
5 show the test system and the control system, respectively. The
test system is comprised of a 400-V, 50-Hz source which feeds
three different loads: 1) a squirrel-cage induction machine, 2) a
nonlinear load which consists of an uncontrolled three-phase rec-
tifier with an inductive-resistive load, and 3) a three-phase sensi-
tive load which consists of astarmadeup of a resistance connected 20-kVA coupling transformer with a unity turns ratio and a star-
in series with an inductance in each phase. A two-level DVR is connected secondary winding. The voltage of the dc storage de-
connected between the PCC and the sensitive load by means of a vice is 650 V. The main parameters are summarized in Table I.
RONCERO-SÁNCHEZ et al.: VERSATILE CONTROL SCHEME FOR A DVR FOR PQ IMPROVEMENT
Fig. 6. Nyquist diagram of the term Q(s)e (e 0 1).
A. Controller Parameters
In order to design the parameters of the control system cor-
rectly, a nominal value for the expected time delay must
be chosen. As the controller has been implemented by using
the continuous systems provided by PSCAD/EMTDC, the time
delay is only due to PWM switching. In this paper, a sinu-
soidal PWM scheme has been used to generate the switching
signals for the power converter, which consists of a three-branch
three-phase voltage-source inverter.
A controller has been designed for each phase by using a
three-phase coordinate system. The reference frame
is perhaps the most popular alternative to control load voltages
when operating under unbalanced conditions. Nevertheless, it
should be recalled that the repetitive controller also guarantees
zero-tracking error at zero frequency; the controller can be imple-
mented by using a reference frame rotating synchronously
with the fundamental frequency since the fundamental harmonic
transforms into a dc component in this reference frame.
The fundamental frequency was chosen as being equal to
50 Hz, while the switching frequency was set at 6.45 kHz in
order to obtain a frequency-modulation (FM) index which
was large enough and an odd integer multiple of 3
(see [30] for more details). Hence, the estimated time delay was
chosen to be , with being the switching fre-
quency. The parameter was set at . at the PCC. Initially, the rms value at the PCC is 385 V and
A second-order Bessel filter has been designed whose
cutoff frequency is 5 kHz. The filter has a linear phase lag in
its passband, which is equivalent to a constant time delay of
551.33 s. The amplitude of the filter begins to decrease at ap-
proximately 1 kHz (about 20 times the fundamental frequency).
Fig. 6 shows the Nyquist diagram of the term
where it can be seen that the
number of counterclockwise encirclements of the point
is zero . Therefore, recalling that the number of
unstable poles of the open-loop system is , the
closed-loop system is stable.
B. Simulation Results
The scenario of the simulation is the one depicted in Fig. 4
where the simulation has been carried out as follows: the non-
linear load and the DVR are connected at 0 s. A two-phase
short-circuit fault is applied at the PCC from 0.2 s to
281
Fig. 7. Three-phase rms voltage. (a) Across the sensitive load. (b) At the PCC.
Fig. 8. Line-to-line voltage. (a) At the PCC. (b) Across the sensitive load. Cor-
responding to the interval (s): 0t< : 0 2.
0.28 s via a fault resistance of 0.2 . This short circuit causes a
40% voltage sag in the two affected phases with respect to their
nominal values. The induction machine is connected at 0.4 s
with a constant rotor speed of 0.97 p.u. (the slip has a value of
%), while the nonlinear load is disconnected at 0.65 s.
The total simulation time is 0.8 s.
Fig. 7(a) shows the three-phase rms voltage across the sen-
sitive load, while Fig. 7(b) shows the three-phase rms voltage
this falls to 270 V when the two-phase short-circuit fault is ap-
plied (note that during the time in which this fault is applied,
the three-phase rms value is not correctly calculated since the
fault causes unbalanced voltages which have been measured by
using the three-phase rms voltmeter block available in PSCAD/
EMTDC). When the induction motor is connected at 0.4 s,
the voltage at the PCC decreases to 330 V, causing a voltage sag
of 17.5% with respect to the nominal value. Finally, when the
nonlinear load is disconnected at 0.65 s, the voltage at the
PCC rises to 370 V. A comparison of Fig. 7(a) and (b) graphi-
cally shows that despite the many voltage variations at the PCC,
the DVR is able to provide the sensitive load with the necessary
voltage, maintaining an almost constant voltage level of 400 V.
Fig. 8(a) and (b) shows results only for the case in which the
nonlinear load and the sensitive load are connected. Notice that
only 0.08 s are plotted, although this case lasts for 0.2 s. Fig. 8(a)
shows the line-to-line voltage at the PCC : the waveform
282
Fig. 9. Detail of the spectrum of the line-to-line voltage. (a) At the PCC.
(b) Across the sensitive load.
Fig. 10. Line-to-line voltages at the PCC. (a) v . (b) v . (c) v

Corresponding to the interval (s) 0:2 t < 0:28.
distortion is due to the harmonic currents drawn by the recti-
fier, while the total current provided to the sensitive load and
the rectifier causes a voltage drop at the PCC. The Fourier anal-
ysis of the line-to-line voltage shows that the rms value at the
fundamental frequency is 385 V (96.25% of the nominal value)
and the total harmonic voltage distortion is 12.52%.
Fig. 8(b) shows the line-to-line voltage across the sensitive load,
whereas Fig. 9(a) and (b) shows the harmonic spectrums of the
line-to-line voltage at the PCC and across the sensitive load,
respectively. The control system guarantees that the DVR not
only counteracts the voltage drop but also cancels out the har-
monic voltages caused by the nonlinear load. In this case, the
fundamental harmonic has an rms value of 399.63 V, while the
total harmonic voltage distortion is %. Note that
this harmonic distortion value is due to the high-frequency har-
monics associated with the PWM process.
The results obtained when the two-phase short circuit occurs
are plotted in Figs. 10–12. Since the fault causes unbalanced
voltages at the PCC, the three line-to-line voltages have been
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009
Fig. 11. Sensitive-load line-to-line voltages. (a) v . (b) v . (c) v . Corre-

sponding to the interval (s) 0:2 t < 0:28.
plotted in Figs. 10 and 11. From 0.2 s to 0.28 s, the
fault is applied and causes an unbalanced voltage sag, while the
nonlinear load continues to cause harmonic voltage distortion.
The fundamental-harmonic rms values of the line-to-line volt-
ages at the PCC are V, V, and
V, where the superscript indicates the fun-
damental harmonic. The total harmonic voltage distortions are
% % and %.
Fig. 11 shows the three line-to-line voltages across the sensitive
load: a very fast DVR response is obtained owing to the feedfor-
ward term of the controller, and the two-phase short-circuit fault
is hardly noticed in the sensitive-load voltage. Furthermore, the
repetitive term of the controller guarantees zero-tracking error
in steady state. Hence, the control system and the DVR are able
.
to cancel all three different disturbances simultaneously (the
voltage sags, the unbalanced voltages, and the harmonic volt-
ages). The fundamental-harmonic rms values of the line-to-line
voltage across the sensitive load are V,
V, and V, whereas the total harmonic
voltage distortions are % %
and %. There is an increase in the total har-
monic distortion value with respect to that obtained in the case
of Fig. 8(b), which is due to the fact that the DVR supplies more
voltage to compensate the short-circuit fault as the voltage sag
is more severe and, therefore, the harmonic voltages caused by
the PWM are larger. The control outputs for the three branches
of the DVR voltage-source inverter are plotted in Fig. 12.
Fig. 13(a) and (b) shows the results when the induction motor
is connected at 0.4 s. Notice that only 0.12 s are plotted, al-
though this case lasts for 0.25 s. In this case, the induction motor
connection causes a balanced voltage sag at the PCC, while
the nonlinear load continues to generate harmonic voltages. Ini-
tially, the fundamental-harmonic rms value of the line-to-line
voltage at the PCC decreases to 330 V (82.5% of the nom-
inal value) at 0.44 s (see Fig. 7 for more details), and the
steady-state value is 365 V (91.25% of the nominal value). As
RONCERO-SÁNCHEZ et al.: VERSATILE CONTROL SCHEME FOR A DVR FOR PQ IMPROVEMENT
Fig. 12. Control outputs. (a) u . (b) u . (c) u . Corresponding to the interval
(s) 0:2 t < 0:28.
Fig. 13. Line-to-line voltage when the induction motor is connected. (a) At the

PC. (b) Across the sensitive load. Corresponding to the interval (s) 0:4 t <
0:65.
shown in Fig. 13, the DVR once again counteracts the voltage
sag and the low-frequency voltage harmonics, thus protecting
the sensitive load from these disturbances. The total harmonic
distortions for the voltages at the PCC and across the sensitive
load are 8.91% and 3.77%, respectively, while the fundamental
harmonic of the line-to-line voltage across the sensitive load has
an rms value of 400.17 V.
At 0.65 s, the nonlinear load is disconnected from
the system and only the motor and the sensitive load remain
connected. The results obtained show that, as expected, the
voltage at the PCC is sinusoidal % and the
line-to-line voltage has an rms value of 370 V (92.5% of the
nominal value) due to the voltage drop in the line impedance.
The control system and the DVR once again work properly,
thus compensating the voltage drop in the sensitive load. The
fundamental harmonic of the sensitive-load voltage has an rms
value of 399.78 V and the total harmonic distortion is 3.17%.
283
TABLE II
FUNDAMENTAL HARMONIC RMS VALUE AND VOLTAGE TOTAL HARMONIC
DISTORTION OF THE LINE-TO-LINE VOLTAGE AT THE PCC AND ACROSS
THE SENSITIVE LOAD FOR DIFFERENT INSTANTS
Table II summarizes the most significant information of the
many simulation results.
V. CONCLUSION
The use of dynamic voltage restorers in PQ-related applica-
tions is increasing. The most popular application has been on
voltage sags amelioration but other voltage-squality phenomena
may also benefit from its use, provided that more robust control
schemes than the basic PI controller become available. A case
in point is the so called repetitive controller proposed in this
paper, which has a fast transient response and ensures zero error
in steady state for any sinusoidal reference input and for any
sinusoidal disturbance whose frequencies are an integer mul-
tiple of the fundamental frequency. To achieve this, the con-
troller has been provided with a feedforward term and feedback
term. The design has been carried out by studying the stability
of the closed-loop system including possible modelling errors,
resulting in a controller which possesses very good transient and
steady-state performances for various kinds of disturbances.
A key feature of this control scheme is its simplicity; only
one controller is required to eliminate three PQ disturbances,
namely, voltage sags, harmonic voltages, and voltage imbal-
ances. The controller can be implemented by using either a
stationary reference frame or a rotating reference frame. In
this paper, the highly developed graphical facilities available in
PSCAD/EMTDC have been used very effectively to carry out
all aspects of the system implementation. Comprehensive sim-
ulation results using a simple but realistic test system show that
the repetitive controller and the DVR yield excellent voltage
regulation, thus screening a sensitive load point from upstream
PQ disturbances.
REFERENCES
[1] M. H. J. Bollen, “What is power quality?,” Elect. Power Syst. Res., vol.
66, no. 1, pp. 5–14, July 2003.
284
[2] J. G. Nielsen and F. Blaabjerg, “A detailed comparison of system
topologies for dynamic voltage restorers,” IEEE Trans. Ind. Appl., vol.
41, no. 5, pp. 1272–1280, Sep./Oct. 2005.
[3] V. K. Ramachandaramurthy, A. Arulampalam, C. Fitzer, C. Zhan, M.
Barnes, and N. Jenkins, “Supervisory control of dynamic voltage re-
storers,” Proc. Inst. Elect. Eng., Gen., Transm. Distrib, vol. 151, no. 4,
pp. 509–516, Jul. 2004.
[4] P. T. Nguyen and T. K. Saha, “Dynamic voltage restorer against
balanced and unbalanced voltage sags: Modelling and simulation,” in
Proc. IEEE Power Eng. Soc. General Meeting, Jun. 2004, vol. 1, pp.
639–644, IEEE.
[5] M. H. J. Bollen, Understanding Power Quality Problems: Voltage Sags
and Interruptions.. Piscataway, NJ: IEEE Press, 2000.
[6] G. J. Wakileh, “Harmonics in rotating machines,” Elect. Power Syst.
Res., vol. 66, no. 1, pp. 31–37, Jul. 2003.
[7] N. G. Hingorani, “Introducing custom power,” IEEE Spectr., vol. 32,
no. 6, pp. 41–48, Jun. 1995.
[8] A. Burden, “Caledonian paper dvr—The utility perspective,” Inst.
Elect. Eng., Half Day Colloq. Dynamic Voltage Restorers—Replacing
Those Missing Cycles, pp. 2/1–2/2, Feb. 1998.
[9] L. Xu, E. Acha, and V. G. Agelidis, “A new synchronous frame-based
control strategy for a series voltage and harmonic compensator,” in
Proc. IEEE 16th Annu. Applied Power Electronics Conf. Expo., Mar.
2001, vol. 2, pp. 1274–1280.
[10] O. Anaya-Lara, “Digital control of a multilevel npc dynamic voltage
restorer for power quality enhancement,” Ph.D. dissertation, Dept.
Electron. Elect. Eng., Faculty of Engineering, University of Glasgow,
Glasgow, U.K., Sep. 2003.
[11] C.-J. Huang, S.-J. Huang, and F.-S. Pai, “Design of dynamic voltage
restorer with disturbance-filtering enhancement,” IEEE Trans. Power
Electron., vol. 18, no. 5, pp. 1202–1210, Sep. 2003.
[12] H. Ding, S. Shuangyan, D. Xianzhong, and G. Jun, “A novel dynamic
voltage restorer and its unbalanced control strategy based on space
vector pwm,” Elect. Power Energy Syst., vol. 24, no. 9, pp. 693–699,
Nov. 2002.
[13] C. Fitzer, M. Barnes, and P. Green, “Voltage sag detection technique
for a dynamic voltage restorer,” IEEE Trans. Ind. Appl., vol. 40, no. 1,
pp. 203–212, Jan./Feb. 2004.
[14] J. G. Nielsen, F. Blaabjerg, and N. Mohan, “Control strategies for dy-
namic voltage restorer compensating voltage sags with phase jump,” in
Proc. IEEE 16th Annu. Conf. Applied Power Electronics Conf. Expo.,
Mar. 2001, vol. 2, pp. 1267–1273.
[15] D. M. Vilathgamuwa, A. A. D. R. Perera, and S. S. Choi, “Voltage sag
compensation with energy optimized dynamic voltage restorer,” IEEE
Trans. Power Del., vol. 18, no. 3, pp. 928–936, Jul. 2003.
[16] S. S. Choi, B. H. Li, and D. M. Vilathgamuwa, “Dynamic voltage
restoration with minimum energy injection,” IEEE Trans. Power Syst.,
vol. 15, no. 1, pp. 51–57, Feb. 2000.
[17] M. R. Banaei, S. H. Hosseini, S. Khanmohamadi, and G. B. Ghareh-
petian, “Verification of a new energy control strategy for dynamic
voltage restorer by simulation,” Simulation Modelling Practice
Theory, vol. 14, no. 2, pp. 112–125, Feb. 2006.
[18] I.-Y. Chung, D.-J. Won, S.-Y. Park, S.-I. Moon, and J.-K. Park, “The dc
link energy control method in dynamic voltage restorer system,” Elect.
Power Energy Syst., vol. 25, no. 7, pp. 525–531, Sep. 2003.
[19] M. J. Newman, D. G. Holmes, J. G. Nielsen, and F. Blaabjerg, “A
dynamic voltage restorer (dvr) with selective harmonic compensation
at medium voltage level,” IEEE Trans. Ind. Appl., vol. 41, no. 6, pp.
1744–1753, Nov./Dec. 2005.
[20] H. Kim and S.-K. Sul, “Compensation voltage control in dynamic
voltage restorers by use of feed forward and state feedback scheme,”
IEEE Trans. Power Electron., vol. 20, no. 5, pp. 1169–1177, Sep.
2005.
[21] J. G. Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, “Control and
testing of a dynamic voltage restorer (dvr) at medium voltage level,”
IEEE Trans. Power Electron., vol. 19, no. 3, pp. 806–813, May 2004.
[22] T. Inoue and M. Nakano, “High accuracy control of a proton syn-
chrotron magnet power supply,” Proc. 8th Int. Fed. Automatic Control,
Triennial World Congr., vol. XX, pp. 216–221, 1981.
[23] S. Hara, Y. Yamamoto, T. Omata, and M. Nakano, “Repetitive con-
trol system: A new type servo system for periodic exogenous signals,”
IEEE Trans. Autom. Control, vol. 33, no. 7, pp. 659–668, Jul. 1988.
[24] K. Zhou and D. Wang, “Digital repetitive learning controller for three-
phase CVCF PWM inverter,” IEEE Trans. Ind. Electron., vol. 48, no.
4, pp. 820–830, Aug. 2001.
[25] K. Zhou and D. Wang, “Digital repetitive controlled three-phase pwm
rectifier,” IEEE Trans. Power Electron., vol. 18, no. 1, pp. 309–316,
Jan. 2003.
IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009
[26] A. García-Cerrada, O. Pinzón-Ardila, V. Feliu-Battle, P. Ron-
cero-Sánchez, and P. García-González, “Application of a repetitive
controller for a three-phase active power filter,” IEEE Trans. Power
Electron., vol. 22, no. 1, pp. 237–246, Jan. 2007.
[27] K. J. Åström and B. Wittenmark, Computer-Controlled Systems.
Theory and Design, ser. Prentice-Hall Information and System Sci-
ence., 3rd ed. Upper Saddle River, NJ: Prentice-Hall, 1997.
[28] P. Horowitz and W. Hill, The Art of Electronics, 2nd ed. Cambridge,
U.K.: Cambridge University Press, 1989.
[29] J. G. Proakis and D. K. Manolakis, Digital Signal Processing. Princi-
ples, Algorithms and Applications, 4th ed. Upper Saddle River, NJ:
Prentice-Hall, 2006.
[30] N. Mohan, T. Undeland, and W. Robbins, Power Electronics: Con-
verters, Applications and Design, 3rd ed. New York: Wiley, 2003.
Pedro Roncero-Sánchez (M’07) received the Electrical Engineering degree
from Universidad Pontificia Comillas, Madrid, Spain, in 1998 and the Ph.D.
degree from Universidad de Castilla-La Mancha, Ciudad Real, Spain, in 2004.
He is an Adjunct Professor in the School of Industrial Engineering, Univer-
sidad de Castilla-La Mancha. His research interests include control, power elec-
tronics, and its applications in electric energy systems as well as dynamic control
of flexible robots.
Enrique Acha (SM’02) was born in México. He graduated from Universidad
Michoacana de San Nicolás de Hidalgo, Morelia, Michoacán, México, in 1979
and received the Ph.D. degree from the University of Canterbury, Christchurch,
New Zealand, in 1988.
He was a Postdoctoral Fellow at the University of Toronto, Toronto, ON,
Canada, and the University of Durham, Durham, U.K. He is the Professor of
Electrical Power Systems at the University of Glasgow, Glasgow, U.K.
Dr. Acha is an IEEE Power Engineering Society Distinguished Lecturer.
Jose Enrique Ortega-Calderon (M’05) was born in Orizaba, Veracruz,
Mexico, in 1962. He received the B.Sc. and M.Sc. degrees in electrical
engineering from Instituto Tecnologico y de Estudios Superiores de Monterrey
(ITESM), Nuevo Leon, Mexico, in 1990 and 2001, respectively, and is cur-
rently pursuing the Ph.D. degree in electrical engineering at the University of
Glasgow, Glasgow, U.K.
He was with Telemecanique and Schneider Electric Mexico from 1990 to
1999. In 1999, he held a managing post in the Department of Project Engi-
neering at ITESM and, since 2001, has held a teaching post at ITESM. His re-
search interests include power quality, power electronics, and signal-processing
algorithms for electrical power systems.
Vicente Feliu (SM’08) received the M.S. degree (Hons.) in industrial engi-
neering and the Ph.D. degree from the Polytechnical University of Madrid,
Madrid, Spain, in 1979 and 1982, respectively.
He was with the Electrical Engineering Department, Universidad Nacional de
Educación a Distancia, Madrid, Spain, from 1980 to 1994. He was Full Professor
in 1990 and was Head of the Department from 1991 to 1994. He is with the
School of Industrial Engineering, Universidad de Castilla-La Mancha, Ciudad
Real, Spain, and was a Fulbright Scholar at the Robotics Institute at Carnegie
Mellon University, Pittsburgh, PA, from 1987 to 1989. His research interests
include multivariable and digital control systems, and kinematic and dynamic
control of rigid and flexible robots.
Dr. Feliu is a member of the International Federation of Automatic Control
(IFAC).
Aurelio García-Cerrada (M’91) received the M.Sc. degree from the Univer-
sidad Politécnica de Madrid, Madrid, Spain, in 1986 and the Ph.D. degree from
the University of Birmingham, Birmingham, U.K., in 1991.
Currently, he is a Professor with the Electronics and Control Engineering
Department and a member of the Applied Research Institute (IIT) at the Uni-
versidad Pontificia Comillas de Madrid. His research interests include power
systems and power-electronics control and its applications to electric energy
systems.