IRF740

N-channel 400V - 0.46Ω - 10A TO-220

PowerMESH™ II Power MOSFET

General features
VDSS
Type RDS(on) ID
(@Tjmax)
IRF740 400V <0.55Ω 10A

( s )
■ Exceptional dv/dt capability
c t 2
3

■
100% avalanche tested

d u TO-220
1

■
Low gate charge
Very low intrinsic capacitances r o s )
e P c t (
Description
l e t d u
o
The PowerMESH™II is the evolution of the first
s r o
generation of MESH OVERLAY™. The layout
b
Internal
refinements introduced greatly improve the
O P
schematic
e
diagram
- l e t
Ron*area figure of merit while keeping the device

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at the leading edge for what concerns swithing
speed, gate charge and ruggedness.
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c t b s
Applications
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■
o
Switching application
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e P c t (
l e t d u
s o r o
O b e P
l e t
s o
b
OOrder codes
Part number Marking Package Packaging
IRF740 IRF740@ TO-220 Tube

August 2006 Rev 4 1/12

www.st.com 12
 Contents IRF740

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6

3 Test circuit ................................................ 8

4
s )
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
(
c t
5 u
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
d
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l e t d u
s o r o
O b e P
- l e t
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c t b s
d u - O
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e P c t (
l e t d u
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 IRF740 Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage (VGS = 0) 400 V

VDGR Drain-gate voltage (RGS = 20 kΩ) 400 V
VGS Gate- source voltage ± 20 V
ID Drain current (continuous) at TC = 25°C 10 A
ID

( s )
Drain current (continuous) at TC = 100°C 6.3 A
IDM (1)
Drain current (pulsed)

c t 40 A
Ptot

d u
Total dissipation at TC = 25°C 125 W
Derating Factor

r o s )
1.0 W/°C

(
(2)
dv/dt
Tstg
e
Storage temperature P
Peak diode recovery voltage slope

c t
4.0 V/ns

Tj
l e t d u
Max. operating junction temperature
-65 to 150 °C

s o r
1. Pulse width limited by safe operating area. o
b P
2. ISD ≤10A, di/dt ≤300A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX

O e
- l e t
Table 2.

( s )
Thermal data
o
Rthj-case
Rthj-amb
c t b s
Thermal resistance junction-case max
Thermal resistance junction-ambient max
1
62.5
°C/W
°C/W
TJ
d u - O
Maximum lead temperature for soldering purpose 300 °C

r o s )
P
Table 3.
e c t (
Avalanche characteristics

l e t Symbol
d u Parameter Value Unit

s o r
IARo Avalanche current, repetitive or not-repetitive
10 A

O b e P (pulse width limited by Tj Max)

l e t EAS
Single pulse avalanche energy
(starting Tj=25°C, Id=Iar, Vdd=50V)
520 mJ

s o
O b

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 Electrical characteristics IRF740

2 Electrical characteristics

(TCASE=25°C unless otherwise specified)

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

Drain-source breakdown
V(BR)DSS ID = 250 µA, VGS= 0 400 V
voltage

Zero gate voltage drain VDS = Max rating, 1 µA

IDSS
current (VGS = 0)

Gate body leakage current

( s )
VDS = Max rating @125°C 50 µA

IGSS
(VDS = 0)
c t
VGS = ±20V ± 100 nA

VGS(th) Gate threshold voltage

d u
VDS= VGS, ID = 250µA 2 3 4 V
Static drain-source on
r o s ) Ω
RDS(on)
resistance

e P c t (
VGS= 10V, ID= 5.3A 0.46 0.55

Table 5. Dynamic
l e t d u
Symbol
s o
Parameter r o Test conditions Min. Typ. Max. Unit

O b e P VDS > ID(on) x RDS(on)max,

gfs (1)
- l e t
Forward transconductance
ID = 6A
7 S

s )
Input capacitance
( o
Ciss
Coss
c t b s
Output capacitance VDS =25V, f=1 MHz,
VGS=0
1400
220
pF
pF
Crss
d u -
capacitanceO
Reverse transfer
27 pF

r o
td(on)
s )
Turn-on delay time
VDD = 200V, ID = 5A,
17 ns

e P tr
c t (
Rise Time
RG = 4.7Ω, VGS = 10V
10 ns

l e t Qg
d u Total gate charge
(see Figure 12)
35 43 nC

s o r o
Qgs Gate-source charge
VDD=320V, ID = 10.7A
VGS =10V
11 nC

O b e P Qgd Gate-drain charge 12 nC

l e t 1. Pulsed: pulse duration=300µs, duty cycle 1.5%

s o
O b

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 IRF740 Electrical characteristics

Table 6. Source drain diode

Symbol Parameter Test conditions Min Typ. Max Unit

ISD Source-drain current 10 A

ISDM(1) Source-drain current (pulsed) 40 A

VSD(2) Forward on voltage ISD=10A, VGS=0 1.6 V

ISD=10A,
trr Reverse recovery time 370 ns
di/dt = 100A/µs,
Qrr Reverse recovery charge 3.2 µC
VDD=100V, Tj=150°C
IRRM Reverse recovery current 17 A

( s )
(see Figure 12)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
c t
d u
r o s )
e P c t (
l e t d u
s o r o
O b e P
- l e t
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c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
O b e P
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 Electrical characteristics IRF740

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance

( s )
c t
d u
Figure 3. Output characterisics Figure 4.
o )
Transfer characteristics
r s
e P c t (
l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
Figure 5. P t
Transconductance
e c ( Figure 6. Static drain-source on resistance

l e t d u
s o r o
O b e P
l e t
s o
O b

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 IRF740 Electrical characteristics

Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations

( s )
c t
Figure 9. Normalized gate threshold voltage
d u
Figure 10. Normalized on resistance vs
vs temperature
r o )
temperature
s
e P c t (
l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
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e P c t
characteristics (
Figure 11. Source-drain diode forward

l e t d u
s o r o
O b e P
l e t
s o
O b

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 Test circuit IRF740

3 Test circuit

Figure 12. Switching times test circuit for Figure 13. Gate charge test circuit
resistive load

( s )
c t
d u
r o s )
e P c t (
Figure 14. Test circuit for inductive load

l
switching and diode recovery times
e t d u
Figure 15. Unclamped Inductive load test
circuit

s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform

O b e P
l e t
s o
O b

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 IRF740 Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com

( s )
c t
d u
r o s )
e P c t (
l e t d u
s o r o
O b e P
- l e t
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c t b s
d u - O
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e P c t (
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 Package mechanical data IRF740

TO-220 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
b 0.61 0.88 0.024 0.034
b1 1.15 1.70 0.045 0.066

)
c 0.49 0.70 0.019 0.027
D
E
15.25
10
15.75
10.40
0.60
0.393

t ( s
0.620
0.409
e
e1
2.40
4.95
2.70
5.15
0.094
0.194
u c 0.106
0.202
F 1.23 1.32 0.048

o d 0.052

)
H1
J1
6.20
2.40
6.60
2.72

P r
0.244
0.094

(
0.256

s
0.107
L 13 14

t e
0.511

c t 0.551

u
L1 3.50 3.93 0.137 0.154
L20
L30
16.40
28.90
o l e o d 0.645
1.137
øP
Q
3.75
2.65
b s 3.85
2.95
P r
0.147
0.104
0.151
0.116

- O e t e
s ) o l
c t ( b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
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 IRF740 Revision history

5 Revision history

Table 7. Revision history

Date Revision Changes

Complete version,new datasheet according to

09-Sep-2004 3
PCN DSG/CT/2C14. special marking: IRF740 @
03-Aug-2006 4 New template, no content change

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 IRF740

( s )
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c t
u
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