Department of Electrical Engineering

IIT Kanpur 2019-20-II

First Course Handout on Digital System Design: EE 619A Instructor: S. Qureshi

6/1/2020
About the course:

The course is a Lab oriented course with course project. The design tools used in the Lab are
Mentor Tools using 180 nm TSMC Library. For synthesis of designs Xilinx Synthesis tool will also
be available for limited designs. Everybody registered in the course will get log-in for the tools
from VLSI/EDA Lab-WL211. The number of students in course project is restricted to two.

The course content is as follows:

1. Introduction – Issues in digital design

2. The CMOS inverter
3. Combinational logic structures
4. Sequential logic gates
5. Design methodologies
6. Low power design methodologies
7. Design – Systems perspective
8. Interconnect- R, L , C
9. Timing issues
10. Arithmetic building blocks
11. Memory and array structures

Text: Rabaey – Digital Integrated Circuits A Design Perspective, 2nd Edition

Other References:
1. Kang and Leblebici – Digital Circuit Design
2. H Baker – CMOS Second Edition
3. Palnitkar – Verilog HDL
4. IEEE xplore for Lab and project work

Grading policy:
1. MIDSEM – 25 % (No Make up)
2. ENDSEM – 50% (Compulsory)
3. Project – 25%
(i) Report
(ii) Power Point Presentation
(iii) Lab Demo for project