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Electronics Fundamentals PDF
Electronics Fundamentals PDF
THOMAS L. FLOYD
DAVID M. BUCHLA
Introduction
A transistor is a semiconductor device that controls current between
two terminals based on the current or voltage at a third terminal.
It is used for amplification or switching of electrical signals.
The basic structure of the bipolar junction transistor, BJT, determines
its operating characteristics.
DC bias is important to the operation of transistors in terms of setting
up proper currents and voltages in a transistor circuit.
Two important parameters are αDC and βDC
Base-Collector
n junction p
B (Base) p B n
n Base-Emitter p
junction
E (Emitter) E
BJT biasing
BJT currents
IE IC IB
BJT currents
I C βDC I B
I
Voltage-divider bias
Because the base current is small, the approximation
R2 is useful for calculating the base voltage.
VB VCC
R1 R2
After calculating VB, you can find
VE by subtracting 0.7 V for VBE.
VE = VB - VBE R1 RC
Next, calculate IE by applying Ohm’s VC
VB
law to RE: V VE
IE E
RE R2 RE
Then apply the approximation I C I E
Finally, you can find the collector voltage
from VC VCC I C RC VCE VC VE
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
Voltage-divider bias
Voltage-divider bias
Determine VB, VE, VC, VCE, IB, IE, and IC in the given
Figure, The 2N3904 is a general-purpose transistor with a
typical βDC = 200.
IB IC
I C DC I B
5 µA 0.5 mA I C 100 5A 0.5mA
10 µA 1.0 mA
15 µA 1.5 mA
20 µA 2.0 mA
25 µA 2.5 mA
Load lines
A load line is an IV curve that represents the response of
a circuit that is external to a specified load.
For example, the load line for the
Thevenin circuit can be found by I (mA)
calculating the two end points: the
current with a shorted load, and the
6
output voltage with no load.
Load line
2.0 k 4
+12 V 2
INL
SL =
= 6.0
0 mA mA
VNL
SL =
= 012VV
0 V (V)
0 4 8 12
Load lines
The IV response for any load will intersect the load line
and enables you to read the load current and load
voltage directly from the graph.
I (mA)
Read the load current
and load voltage from the graph if IV curve for
a 3.0 k resistor is the load. 6 3.0 k resistor
2.0 k 4
RL = 2 Q-point
+12 V
3.0 k
0 V (V)
0 4 8 12
VL = 7.2 V IL = 2.4 mA
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
Load lines
The load line concept can be extended to a transistor
circuit. For example, if the transistor is connected as a
load, the transistor characteristic
I (mA)
curve and the base current
establish the Q-point.
6
2.0 k
4
+12 V
2
0 V (V)
0 4 8 12
Load lines
Load lines can illustrate the operating conditions for a
transistor circuit. Assume the IV curves are as shown:
If you add a transistor load to the last
circuit, the base current will establish I (mA)
For this base current,
the Q-point. Assume the base current the Q-point is:
is represented by the blue line. 6
2.0 k
4
+12 V 2
0 V (V)
0 4 8 12
The load voltage (VCE) and current
(IC) can be read from the graph.
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
Load lines
For the transistor, assume the base current is
established at 10 A by the bias circuit. Show the Q-
point and read the value of VCE and IC. The Q-point is the
IC (mA) intersection of the
2.0 k load line with the
10 A base current.
IB = 25 A
+12 V 6
IB = 20 A
4 IB = 15 A
IB = 10 A
2
IB = 5.0 A
Bias circuit 0 VCE (V)
0 4 8 12
VCE = 7.0 V; IC = 2.4 mA
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
Ic
ac
Ib
CE amplifier
In a common-emitter amplifier, the input signal is applied
to the base and the output is taken from the collector. The
signal is larger but inverted at the output.
VC
Output coupling
C
RC capacitor
R1 C2
C1
R2 C3 Bypass
Input coupling RE
capacitor capacitor
R2 C3 Bypass
Input coupling RE
capacitor capacitor
Formulas
Lowercase italic subscript indicate signal (ac) voltages and signal
(alternating currents)
Vout = IcRC
Since Ic ≡ Ie, the currents cancel and the gain is the ratio of the resistance.
Av = RC / (re + RE)
Av = RC / re
The transistor parameter re is important because it determines the
voltage gain of a CE amplifier in conjunction with RC. A formula for
estimating re is given without derivation in the following equation:
re≡ 25mV / IE
VCC = +15 V
25 mV 25 mV
re 10.8
IE 2.32 mA R1 RC C2
2.2 k
V R C1 27 k
Av out C 2N3904
Vin re 1.0 F
2.2 F
2.2 k R2
204 RE C3
10.8 6.8 k 1.0 k 100 F
Sometimes the gain will be shown with a
negative sign to indicate phase inversion.
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
Phase Inversion
The output voltage at the collector is 180 degrees out of phase with
the input voltage at the base. Therefore, the CE amplifier is
characterized by a phase inversion between the input and output. The
inversion is sometimes indicated by a negative voltage gain.
AC Input Resistance Rin ≡ βac Ib re / Ib
The Ib terms cancel, leaving
Rin ≡ βac re
Rin = Vb / Ib
Total Input Resistance of a CE amplifier:
Vb = Iere Rin(tot) = R1║R2║Rin
Rin(tot) = R1║R2║βac re
Ie ≡ βac Ib RC has no effect because of the reverse-biased,
base-collector junction.
Ap≡ Av Ai
R1 RC C2
Rin(tot) = R1||R2||acre 2.2 k
C1 27 k
= 27 k||6.8 k||2.16 k 2N3904
1.0 F
= 1.55 k 2.2 F
R2 RE C3
Notice that the input resistance of 6.8 k 1.0 k 100 F
this configuration is dependent on
the value of ac, which can vary.
CE amplifier
CC amplifier (emitter-follower)
In a common-collector amplifier, the input signal is
applied to the base and the output is taken from the
emitter. There is no voltage gain, but there is power gain.
The output voltage is nearly VC
the same as the input; there is C
no phase reversal as in the R1
CE amplifier. C1
Ap≡ Ai
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
CC amplifier
Calculate re and Rin(tot) for the CC amplifier. Use = 200.
R2 27 k
VB
CC
V 15 V = 8.26 V
1
R R2 22 k + 27 k
VE VB 0.7 V = 7.76 V V = +15 V CC
VE 7.76 V
IE 7.76 mA
RE 1.0 k R1
25 mV 25 mV C1 22 k
re 3.2
IE 7.76 mA 2N3904
CC amplifier
Determine the input resistance of the emitter-follower in the given
figure. Also find the voltage gain, current gain and power gain.
Conditions in Cutoff A transistor is in cutoff when the base-emitter junction is not forward biased.
VCE( cutoff ) VCC
Conditions in Saturation When the base-emitter junction is forward-biased and there is enough base
current to produce a maximum collector current, the transistor is saturated. VCC
The minimum value of base current to produce saturation is:
I C ( sat)
RC
I C ( sat) VRB
I B (min) VBE ) 0.7V VRB VIN 0.7V RB (max)
DC I B (min)
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
The FET
The field-effect transistor (FET) is a voltage controlled
device where gate voltage controls drain current. There
are two types of FETs – the JFET and the MOSFET.
JFETs have a conductive channel D (Drain) D
with a source and drain connection
on the ends. Channel current is
n p
controlled by the gate voltage.
G (Gate) p p G n n
The gate is always operated with
reverse bias on the pn junction formed
between the gate and the channel. As
S (Source) S
the reverse bias is increased, the
n-channel JFET p-channel JFET
channel current decreases.
D D
n n
G G p
p
n n
S S
induced channel
E-MOSFET E-MOSFET with bias
FIGURE 17–38 E-MOSFET construction and
operation.
JFET biasing
JFETs are depletion mode devices – they must be
operated such that the gate-source junction is reverse
biased. +VDD VDD
The simplest way to bias a JFET is
to use a small resistor is in series RD RD
with the source and a high value
resistor from the gate to ground. VG = 0 V VG = 0 V
The voltage drop across the source +VS V S
resistor essentially reverse biases RG RS RG RS
the gate-source junction.
Because of the reverse-biased n-channel p-channel
junction, there is almost no
current in RG. Thus, VG = 0 V.
Electronics Fundamentals 8th edition © 2010 Pearson Education, Upper Saddle
Floyd/Buchla
River, NJ 07458. All Rights Reserved.
Lesson 2
JFET biasing
JFET biasing
Find VDS and VGS in the JFET circuit below, given that ID =
5mA
D-MOSFET biasing
D-MOSFETs can be operated in either depletion mode
or in enhancement-mode. For this reason, they can be
biased with various bias circuits. +VDD
D-MOSFET biasing
Determine the drain-to-source voltage in the circuit of the
given figure. The MOSFET data sheet give VGS(off) = -8 V and
IDSS = 12 mA
E-MOSFET biasing
E-MOSFETs can use bias circuits similar to BJTs but
larger value resistors are normally selected because of
the very high input resistance. +VDD +V DD
E-MOSFET biasing
FIGURE 17–44 E-MOSFET biasing arrangements.
E-MOSFET biasing
Determine the amount of drain current in the given figure. The
MOSFET has a VGS(th) of 3 V.
R2
RE
R2
RE
R2
R2