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BJT BIASING CIRCUIT

ENGR. MARY GRACE V. INIEGO


INSTRUCTOR I
BJT DC BIASING
To use the devices for amplification of voltages or current
or as a control elements, it is necessary to bias the device.
Biasing is used to turn on the device and place it in the
region of its characteristics where the device operates
most linearly.
Its purpose is to establish a proper stable DC operating
point (Q-Point).
Applying DC voltages to a transistor in order to turn it on
so that it can amplify AC signals.
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BJT DC BIASING
Q-Point
o It means Quiescent Point. Quiescent means quiet, still or
inactive.
o Also known as the Operating Point.
o The DC operating (bias) point of an amplifier specified by
voltage and current values.
o It is defined by specific values for IC and VCE.
These values are called the coordinates of the Q-Point.
3

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EFFECTS OF DC BIAS
Bias establishes the DC operating point
for proper linear operation of an
amplifier.
If an amplifier is not biased with correct
DC voltages on the input and output, it
can go into saturation or cut-off when
an input signal is applied.
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VARIOUS
OPERATING POINTS
WITHIN THE LIMITS
OF OPERATION OF
A TRANSISTOR

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For point A:
If no bias were used, the device would initially be
completely off, resulting in a Q-point at Anamely, zero
current through the device (and zero voltage across it).
Since it is necessary to bias a device so that it can respond
to the entire range of an input signal, point A would not be
suitable.
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For Point C:
Transistor is driven into
saturation because the Q-
point is too close to
saturation for the given
input signal.
Operating at point C also
raises some concern about
the nonlinearities
introduced by the fact that
the spacing between IB
curves is rapidly changing
in this region.
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For Point D:
Point D sets the device operating point near the
maximum voltage and power level.
The output voltage swing in the positive direction is
thus limited if the maximum voltage is not to be
exceeded.

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For Point B:
In general, it is preferable to operate where the gain of the
device is fairly constant (or linear) to ensure that the
amplification over the entire swing of input signal is the same.
Point B is a region of more linear spacing and therefore more
linear operation is attainable.
Point B therefore seems the best operating point in terms of
linear gain and largest possible voltage and current swing. This
is usually the desired condition for small-signal amplifiers but
not the case necessarily for power amplifiers.

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VARIOUS
OPERATING POINTS
WITHIN THE LIMITS
OF OPERATION OF
A TRANSISTOR

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DC LOAD LINE
Load-Line Analysis

A straight line plot of IC


and VCE for a transistor
circuit.
A DC load line passes
through the Q-Point on a
transistors collector curves
intersecting the
vertical axis at
approximately IC(SAT) and
the horizontal axis at
VCE(OFF).
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BJT REGIONS OF OPERATIONS
Active or Linear Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is reverse biased

Cutoff Region Operation


BaseEmitter junction is reverse biased

Saturation Region Operation


BaseEmitter junction is forward biased
BaseCollector junction is forward biased 13
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BJT DC BIASING CIRCUITS

Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-feedback configuration
Voltage divider bias circuit
DC bias with voltage feedback
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FIXED BIAS CIRCUIT

It has poor stability because


its Q-point varies widely
with .
It is not normally used if
linear operation is required.
However, it can be used for
switching operation.

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FIXED BIAS CIRCUIT

For the DC analysis, the


network can be isolated from
the indicated AC levels by
replacing the capacitors by an
open circuit equivalent.
In addition, the DC supply can
be separated into two supplies
to permit a separation of input
and output circuits.
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FIXED-BIAS CONFIGURATION
When the transistor is operating in
saturation, current through the transistor is at
its maximum possible value.

V
ICsat CC
R
C

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FIXED-BIAS CONFIGURATION
SAMPLE PROBLEM 1

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SAMPLE
PROBLEM 1

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SAMPLE PROBLEM 2 FIXED-BIAS CONFIGURATION

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Load Line Analysis
The load line end points
are:
ICsat
IC = VCC / RC
VCE = 0 V
VCEcutoff
VCE = VCC
IC = 0 mA
The Q-point is the operating point where the value of RB
sets the value of IB that controls the values of VCE and IC .
The Effect of VCC on the Q-Point
The Effect of RC on the Q-Point
The Effect of IB on the Q-Point
BJT DC BIASING CIRCUITS

Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-feedback configuration
Voltage divider bias circuit
DC bias with voltage feedback
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EMITTER-BIAS CONFIGURATION

It is a fixed bias circuit with emitter resistor.


It contains an emitter resistor to provide better stability
than the fixed bias circuit.
STABILITY is a measure of how well an amplifier maintains
its design values (Q-point, gain, etc.) over changes in Beta
and temperature; a condition in which an amplifier circuit
does not oscillate.
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EMITTER-BIAS CONFIGURATION

IMPROVED BIAS STABILITY


The addition of the emitter resistor to the DC bias of
the BJT provides improved stability; that is, the DC
bias currents and voltages remain closer to where
they were set by the circuit when outside conditions
such as temperature, and transistor Beta, change.

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EMITTER-BIAS CONFIGURATION
Consider the base emitter loop of
the
network.
Writing KVL around the
indicated loop in the
clockwise direction will result in
the following
equation: RE

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EMITTER-BIAS CONFIGURATION
Recall that

Substituting IE in the established


equation will result in:

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EMITTER-BIAS CONFIGURATION
And solving for IB gives,

Note that the only difference between


this equation for IB and that obtained
for the fixed bias configuration is the
term (+1)RE.
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EMITTER-BIAS CONFIGURATION
Then consider the collector-emitter
loop of the network.

Writing KVL around the indicated


loop in the counterclockwise direction
will result in

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EMITTER-BIAS CONFIGURATION
Substituting IE IC and grouping terms
gives

The single subscript voltage VE is the


voltage from emitter to ground and is
determined by

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EMITTER-BIAS CONFIGURATION
Whereas the voltage
from collector to
ground can be
determined from

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EMITTER-BIAS CONFIGURATION

The voltage at the base


with respect to the
ground can be
determined from

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Saturation Level
The endpoints can
be determined from
the load line.
VCEcutoff: VCE VCC
IC 0 mA

VCE 0 V

ICsat: IC
VCC
RC RE
For the given emitter bias
SAMPLE PROBLEM network, determine
A. IBQ and ICQ.
B. VCEQ.
C. VC, VE , and VB.
D. VBC.

Repeat the problem with


=100. Prepare a table and
compare the bias voltage and
currents of the circuit.
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HOMEWORK (EMITTER STABILIZED BIAS CIRCUIT)
For the given emitter bias network
with =85, determine

A. IBQ and ICQ.


B. VCEQ.
C. VC, VE , and VB.
D. VBC.
Repeat the problem with =100.
Prepare a table and compare
the bias voltage and currents of the circuit.
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HOMEWORK (EMITTER STABILIZED BIAS CIRCUIT)
Answer the following items:

o Problem 03
o Problem 05
o Problem 10
o Problem 11

Reference:

Electronic Devices and Circuit Theory, 10th Edition


by Boylestad and Nashelsky
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BJT DC BIASING CIRCUITS

Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-feedback configuration
Voltage divider bias circuit
DC bias with voltage feedback
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VOLTAGE DIVIDER CONFIGURATION
In the previous bias configurations the bias
current ICQ and voltage VCEQ were a function of the current gain
of the transistor.

However, because is temperature sensitive, especially for


silicon transistors, it would be desirable to develop a bias
circuit that is less dependent on the transistor Beta. The
Voltage Divider Bias Configuration is such a network.

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION
Methods in Voltage-Divider Configuration Analysis

Exact Method
It can be applied to any voltage-divider configuration.

Approximate Method
It can be applied only if specific conditions are
satisfied.
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VOLTAGE DIVIDER CONFIGURATION

EXACT ANALYSIS

For the DC analysis


the network can be
redrawn as in the given
figure.

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VOLTAGE DIVIDER CONFIGURATION

EXACT ANALYSIS

Input side of the network


can then be redrawn as
shown in the figure.

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VOLTAGE DIVIDER CONFIGURATION

EXACT ANALYSIS

The Thevenin equivalent network for


the network to the left of the base
terminal can then be found in the
following manner:

For the RTH: The voltage source is


replaced by a short-circuit equivalent.
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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION
SAMPLE PROBLEM
For the given voltage-divider configuration,
determine
A. IBQ and ICQ.
B. VCEQ.
C. VC, VE , and VB.
D. VBC.

Repeat the problem with =100. Prepare a table


and compare the bias voltage and currents of the
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VOLTAGE DIVIDER CONFIGURATION

SAMPLE PROBLEM
For the given voltage-
divider configuration,
determine
A. IBQ and ICQ.
B. VCEQ.

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

SAMPLE PROBLEM:

For the given voltage-divider configuration, determine


A. IBQ and ICQ.
B. VCEQ.
C. VC, VE , and VB.
D. VBC.

Use the exact method and approximate method.


Prepare a table and compare the bias voltage and
currents of the circuit.
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VOLTAGE DIVIDER CONFIGURATION

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VOLTAGE DIVIDER CONFIGURATION

SAMPLE PROBLEM:

Determine the levels of ICQ and VCEQ for the voltage-divider


configuration given using the exact and approximate
techniques.

Prepare a
table and compare the bias voltage and current
of the circuit.

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BJT DC BIASING CIRCUITS

Fixed-bias circuit
Emitter-stabilized bias circuit
Collector- feedback configuration (DC Bias
with Voltage Feed back)
Voltage divider bias circuit
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DC Bias With Voltage Feedback
Another way to improve
the stability of a bias
circuit is to add a
feedback path from
collector to base.

In this bias circuit the


Q-point is only slightly
dependent on the
transistor beta, .
Base-Emitter Loop
From Kirchhoffs voltage law:
VCC IC RC IBRB VBE IE RE 0

Where IB << IC: I'C IC IB IC

Knowing IC = IB and IE IC, the


loop equation becomes:
VCC BRC IBRB VBE IBRE 0

VCC VBE
Solving for IB: IB
RB (RC RE )
Collector-Emitter Loop
Applying Kirchoffs voltage law:

IE + VCE + ICRC VCC = 0

Since IC IC and IC = IB:

IC(RC + RE) + VCE VCC =0

Solving for VCE:

VCE = VCC IC(RC + RE)


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EMITTER-FOLLOWER CONFIGURATION

A configuration where the output voltage is taken


off the emitter terminal.
It is actually a common-collector configuration.
It is frequently used for impedance-matching
purposes.
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EMITTER-FOLLOWER CONFIGURATION

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EMITTER-FOLLOWER CONFIGURATION

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EMITTER-FOLLOWER CONFIGURATION

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EMITTER-FOLLOWER CONFIGURATION

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EMITTER-FOLLOWER CONFIGURATION
SAMPLE PROBLEM
For the given emitter-follower
configuration, determine
A. IBQ and ICQ.
B. VCEQ.
C. VC, VE , and VB.
D. VBC.
Repeat the problem with =100.
Prepare a table
and compare the bias voltage and
currents of the
circuit.
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COMMON-BASE CONFIGURATION

The applied signal connected to the emitter


terminal and the base is at, or just above, ground
potential.
It is a fairly popular configuration because in the AC
domain it has a very low input impedance, high
output impedance, and a good gain.

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION

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COMMON-BASE CONFIGURATION
SAMPLE PROBLEM
For the given common-base configuration,
determine
A. IBQ and ICQ.
B. VCEQ.
C. VC, VE , and VB.
D. VBC.

Repeat the problem with =100. Prepare a table


and compare the bias voltage and currents of the
circuit.
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COMMON-BASE CONFIGURATION
SAMPLE PROBLEM

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