Multilevel Inverter Low Total Harmonic Distortion

Muhammad Umar Farooq 14K-2383

Alishan Nawaz 14K-2526
Adeel Ashraf 14K-2473

INTERNAL ADVISOR DR.

DR BURHAN KHAN

INTERNAL CO-ADVISOR
DR BURHAN KHAN

NATIONAL UNIVERSITY OF COMPUTER AND EMERGING SCIENCES - FAST

DECEMBER 2019

1
 Multilevel Inverter With Low Total Harmonic Distortion

BY

Muhammad Umar Farooq 14K-2383

Alishan Nawaz 14K-2526
Adeel Ashraf 14K-2473

Report submitted in partial fulfillment of the requirements for the

degree
of Bachelor of Science
in Electrical Engineering

DEPARTMENT OF ELECTRICAL ENGINEERING

NATIONAL UNIVERSITY OF COMPUTER AND EMERGING SCIENCES - FAST

DECEMBER 2019

2
 DECLARATION

I certify that research work titled “Solar Wind Hybrid Power System Using Contactor Logic”
is my own work. The work has not been presented elsewhere for assessment. Where material
has been used from other sources it has been properly acknowledged / referred.

Team Members Signature

Muhammad Umar Farooq

Alishan Nawaz

Adeel Ashraf

Supervisor: Signature

Dr Burhan Khan

Date:

Place:

3
 ACKNOWLEDGEMENT

We would like to thanks everyone who had contributed to the successful completion of this project.

We would like to express our gratitude to our research supervisor, Dr Burhan Khan for his

invaluable advice, guidance and his enormous patience throughout the development of the project.

In addition, we would also like to express our gratitude to our friends and respectable staff who

had helped and given us encouragement.

4
 Abstract

This thesis aims to extend the knowledge about the performance of cascaded multilevel inverter.

Large electric drives and utility applications require advanced power electronics converter to meet

the high power demands. As a result, multilevel power converter structure has been introduced as

an alternative in high power and medium voltage situations. A multilevel converter not only

achieves high power ratings, but also improves the performance of the whole system in terms of

harmonics, dv/dt stresses, and stresses in the bearings of a motor. Several multilevel converter

topologies have been developed; i) diode clamped, ii) flying capacitors, and iii) cascaded or H-

bridge. Referring to the literature reviews, the cascaded multilevel inverter. (CMI) with separated

DC sources is clearly the most feasible topology for use as a power converter for medium & high

power applications due to their modularization and extensibility.

The H-bridge inverter eliminates the excessively large number of (i) bulky transformers required

by conventional multilevel inverters, (ii) clamping diodes required by multilevel diode-clamped

inverters, , and (iii) flying capacitors required by multilevel flying-capacitor inverter. As a

preliminary study the thesis examined and compared the most common multilevel topologies

found in the published literature. Starting from the essential requirements, the different approaches

to the construction of multilevel inverter are explained and compared. In particular, aspects of total

harmonic distortion (THD) and modulation which are required or desirable for multilevel

converters are discussed. Sine-

5
triangle carrier modulation is identified as the most promising technique to pursue for both

technical and pedagogical reasons. Since cascaded multilevel inverter is considered to be suitable

for medium & high power applications.

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 Table of Contents
1.1 Motivation for Research................................................................................................................................................ 8

1.2 Research Background ................................................................................................................................................... 8

1.3 Why cascaded Multilevel Inverter .............................................................................................................................. 12

2.1 Background ................................................................................................................................................................. 17

2.2 Diode Clamped Multilevel Inverter ............................................................................................................................ 18

2.3 Operation of Diode clamped Multilevel Inverter ........................................................................................................ 21

2.4 Advantages and Disadvantages of Diode Clamped Multilevel Inverter ..................................................................... 21

3.1 Aim of Project ............................................................................................................................................................. 23

4.1 Microcontroller Ardiuno ............................................................................................................................................. 25

4.2 MOSFETS IRF 840 .................................................................................................................................................... 26

4.3 H Bridge & HIGH LOW side Driver IR2110 ............................................................................................................. 27

4.4 Gate signal & inverter Operation ................................................................................................................................ 28

4.5 High Side Non-Isolated Gate Drives........................................................................................................................... 29

4.6 High-Side Direct Driver for N-Mos ............................................................................................................................ 30

4.7 Basic Operation of the Circuit .................................................................................................................................... 30

4.8 High & Low Side Driver IC (Ir2110) ......................................................................................................................... 31

4.9 BOOTSTRAPPING & Its CONCEPT ........................................................................................................................ 33

4.10 TLP250 MOSFET Gate Driver ................................................................................................................................. 34

5.1 Future Work ................................................................................................................................................................ 37

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 Chapter-1

Introduction

1.1 Motivation for Research

This exploration articles generally tending to towards multiphase selection motors in view of their tedious

structure, and unfaltering quality with high fault tolerant capacities. Extending stage ends up being

increasingly common factor to have additional dimension of chance. On another hand, amazed inverter

by and large replaces the standard two-level three-arrange voltage source inverter. In this test, enormous

duty by research work contributed towards twofold three-organize selection motor showing, control

perspective, and modification methods. By and by, unessential articles by research related to the power

balancing with symmetrical and uneven voltage and in addition rhythmic movement responsibilities for

six-organize amiss enrollment motor, considering keeping stator winding open-end setup. In this theory

gave towards the power modifying of a proposed novel multiphase-stunned cooling motor drive structure

and abused the fault tolerant limits under different essential conditions.

1.2 Research Background

Power electronic inverters are getting to be mainstream for different mechanical drives

applications. As of late, inverters have even turned into a need for many implementations, for

example, engine controlling and control frameworks. The idea of using numerous little voltage

levels to perform control change was licensed by a MIT analyst more than twenty years back. The

staggered inverter framework is extremely encouraging in AC drives, when both lessened

symphonious substance and high power are required.

8
Staggered inverters have been fundamentally used in medium or high power structure applications,

for instance, static responsive power compensation and mobile speed drives. An amazed inverter

achieves high power evaluations, and in addition enables the use of practical power sources.

Practical power sources, for instance, photovoltaic, wind, and vitality parts can be adequately

interfaced to a stunned inverter system for an amazing application. Power electronic converters,

especially dc/cooling PWM inverters have been growing their extent of use in industry since they

give diminished essentialness usage, better structure efficiency, upgraded nature of thing,

incredible upkeep, and whatnot. For a medium voltage framework, it is troublesome to interface

only a solitary power semiconductor switches direct. As needs be, a stunned power converter

structure has been introduced as a choice in high power and medium voltage conditions, for

instance, laminators, plants, transports, siphons, fans, blowers, blowers, and so forth.

As a practical arrangement, staggered converter accomplishes high power evaluations, as well as

empowers the utilization of low power application in renewable energy sources, for example,

photovoltaic, wind, and energy units, which can be effectively interfaced to a staggered converter

framework for a high-power application. The most well-known starting utilization of staggered

converters has been in footing, both in trains and trackside static converters.

Most recent applications have been for power system converters for VAR pay and strength update,

dynamic filtering, high-voltage motor drive, high-voltage dc transmission, and most starting late for

medium voltage acknowledgment motor variable speed drives. Various amazed converter applications

base on present day medium-voltage motor drives, utility interface for practical power source systems,

versatile AC transmission structure (FACTS), and balance drive structures. The inverters in such

application zones as communicated above should have the ability to manage high voltage and

significant power. Along these lines, two-level high-voltage and largepower inverters have been

organized with

9
course of action relationship of trading power contraptions, for instance, entryway murder

thyristors (GTOs), consolidated gateway commutated transistors (IGCTs), and facilitated portal

bipolar transistors (IGBTs), in light of the way that the game plan affiliation licenses

accomplishing significantly higher voltages. In any case the course of action relationship of trading

power contraptions has immense issues [13], explicitly non parallel movement of associated device

voltage across over plan related devices that may make the associated voltage of individual

devicesmuch higher than blocking voltage of the devices in the midst of transient and steady state

trading action of devices.

As choices to effectively deal with the recently referenced issues, a couple of circuit

topologies of amazed inverter and converter have been investigated and utilized. The yield voltage

of the amazed inverter has various dimensions consolidated from a couple of DC voltage sources.

The idea of the yield voltage is improved as the amount of voltage levels increases, so the measure

of yield channels can be decreased. Staggered converters has been introduced since 1975. The

course stunned inverter was first proposed in 1975. Separate DC-sourced full-interface cells are

placed in course of action to mix a staircase AC yield voltage. The term amazed began with the

three-level converter. Thusly, a couple amazed converter topologies have been made. In 1981,

diode-fastened amazed inverter furthermore called the Neutral-Point Clamped (NPC) inverter

designs were proposed. In 1992, capacitor-caught (or flying capacitor) amazed inverters, and in

1996, fell stunned inverters were proposed. Regardless of the way that the course amazed inverter

was made previously, its application did not win until the mid1990s. The advantages obviously

stunned inverters were indisputable for motor drives and utility applications.

has pulled in inconceivable energy due to the unprecedented enthusiasm of medium-voltage high-

control inverters. The course inverter is furthermore used inregenerative-type motor drive

applications. Starting late, some new topologies of stunned

10
inverters have risen. This consolidates summed up stunned inverters, mixed amazed inverters,

blend stunned inverters and fragile traded stunned inverters. These amazed inverters can widen

assessed inverter voltage and power by growing the amount of voltage levels. They can in like

manner fabricate approach trading repeat without the development of real trading repeat, as such

decreasing swell piece of inverter yield voltage and electromagnetic impedance impacts. A stunned

converter can be executed in an extensive variety of ways. The most direct procedures incorporate

the parallel or course of action relationship of customary converters to outline the amazed

waveforms. Additional bewildering structures satisfactorily install converters inside converters.

The voltage or current rating of the stunned converter transforms into an alternate of the individual

switches, in this manner the power rating of the converter can outperform the limit constrained by

the individual trading contraptions.

The simple thought of a staggered converter to achieve higher power is to use a movement of force

semiconductor switches with a couple of lower voltage dc sources to play out the power change

by mixing a staircase voltage waveform. Capacitors, batteries, and manageable power source

voltage sources can be used as the diverse dc voltage sources. The substitution of the power

switches total these different dc sources with the ultimate objective to achieve high voltage at the

yield; regardless, the assessed voltage of the power semiconductor switches depends just upon the

rating of the dc voltage sources to which they are related. A stunned converter has a couple of

central focuses over a normal two-level converter that uses high trading repeat beat width change

(PWM). The engaging features of a stunned converter can be immediately laid out as seeks after.

11
 1. Staircase waveform quality: Multilevel converters not exclusively can produce the yield voltages

with low bending, yet in addition can decrease the dv/dt stresses; consequently electromagnetic

similarity (EMC) issues can be diminished.

2. Common-mode (CM) voltage: Multilevel converters deliver littler CM voltage; along these lines, the

worry in the course of an engine associated with a staggered engine drive can be decreased. Moreover,

CM voltage can be disposed of by utilizing propelled tweak techniques.

3. Input current: Multilevel converters can draw input current with low bending.

4. . Switching frequency: Multilevel converters can work at both key exchanging recurrence and high

exchanging recurrence PWM. It ought to be noticed that lower exchanging recurrence for the most

part implies bring down exchanging misfortune and higher effectiveness. Staggered converters do

have a few drawbacks. One specific impediment is the more noteworthy number of intensity

semiconductor switches required. In spite of the fact that lower voltage appraised switches can be

used in a staggered converter,each switch requires a related door drive circuit. This may make the

general framework be more costly and complex. Plentiful adjustment methods and control ideal

models have been produced for staggered converters, for example, sinusoidal heartbeat width

regulation (SPWM), particular consonant disposal (SHE-PWM), space vector tweak (SVM), and

others. In this theory sinusoidal heartbeat width regulation (SPWM) is utilized.

1.3 Why cascaded Multilevel Inverter

Fell H-Bridge setup has starting late ended up being to a great degree unmistakable in high-control AC

supplies and adjustable speed drive applications. A course stunned inverter contains a movement of H-

associate (single-arrange full augmentation) inverter units in all of its three phases. Each H-associate

unit has its very own dc source, which for an enrollment motor would be a battery unit, vitality unit or

sun arranged cell. Each SDC (separate D.C.

12
source) is connected with a single stage full-associate inverter. The climate control system terminal

voltages of different dimension inverters are related in plan. Through different mixes of the four

switches, S1-S4, each converter level can create three unmistakable voltage yields, +Vdc, - Vdc

and zero.

The AC yields of different full extension converters in a comparative stage are related in game

plan with the ultimate objective that the blended voltage waveform is the aggregate of the

individual converter yields. Note that the amount of yield - organize voltage levels is portrayed

interestingly as opposed to those of the two past converters (i.e. diode clamped and flying

capacitor). In this topology, the amount of yield organize voltage levels is portrayed by m= 2N+1,

where N is the amount of DC sources. A seven-level fell converter, for example, includes three

DC sources and three full framework converters. Slightest consonant winding can be procured by

controlling the main edges at different converter levels. Every H-connect unit produces a semi

square waveform by stage moving its positive and negative stage legs‟ exchanging timings. Each

exchanging gadget dependably directs for 180° (or half cycle) paying little heed to the beat width

of the semi square wave. This exchanging strategy makes the majority of the exchanging gadgets

current pressure level with. In the motoring mode, control streams from the batteries through the

course inverters to the engine. In the charging mode, the course converters go about as rectifiers,

and power streams from the charger (air conditioning source) to the batteries. The course

converters can likewise go about as rectifiers to help recuperate the dynamic vitality of the vehicle

if regenerative braking is utilized.

13
The cascade inverter can likewise be utilized in parallel HEV designs. This new converter can

dodge additional clipping diodes or voltage adjusting capacitors. The mix of the 180° directing

technique and the example swapping plan make the course inverters voltage and current anxieties

the equivalent and batteryvoltage adjusted. Indistinguishable H-connect inverter units can be used,

in this way enhancing particularity manufacturability and incredibly diminishing generation costs.

Battery-nourished course inverter prot driving an

enlistment engine at half and 80% evaluated

speed both the voltage and current are a

sinusoidal. Electromagnetic obstruction (EMI)

and regular mode voltage are additionally much

than what might result from a PWM inverter due

to the naturally low dv/dt and sinus voltage yield.

The primary points of interest of utilizing the course inverter in an acceptance engine include:

(1) It makes acceptance engine more available/more secure and open wiring feasible for most

enlistment engine control framework.

(2) Traditional 230 V or 460 V engines can be utilized, in this way higher effectiveness is

anticipate that thought about will low voltage engines.

(3) No EMI issue or normal mode voltage/current issue exists.

(4) Low voltage exchanging gadgets can be utilized.

(5) No charge unbalance issue exists in both charge mode and drive mode.

14
Course inverters are ideal for an acknowledgment motor that has many separate dc sources

(batteries) available for the individual H-interfaces, these inverters are outlandish for game plan

cream enrollment motors since course inverters can't be adequately related successive. For game

plan planned selection motors where a locally accessible start engine makes cooling power by

methods for an alternator or generator, a stunned sequential diode secured converter drive can best

interface with thesource of cooling power yet still easily meet the high power and also high voltage

necessities of the acknowledgment motor. Enrollment motors generally have a forced air system

voltage source from an alternator or consuming engine generator. A rectifier changes over this

climate control system voltage to dc for the electric imperativeness storing contraptions on board

– batteries or ultra capacitors. An inverter changes over the dc voltage to variable voltage variable

repeat cooling with the true objective to drive the guideline enrollment motor. The amazed

converter can go about as an inverter in drive mode when imperativeness is being sent to the motor

that drives the deals a rectifier in the midst of regenerative braking or in the midst of charge mode

when the vehicle is associated with an outside cooling source. The decline in dv/dt can keep motor

windings and course from frustration. The staircase yield voltage waveform approaches a sine

wave, along these lines having no customary mode voltage and no voltage surge to the motor

windings. A fell amazed inverter is inspected to discard the pointlessly significant number of

(1) Cumbersome transformers required by ordinary multi beat inverters,

(2) Cinching diodes required by staggered diode-clasped inverters, and

(3) Flying capacitors required by staggered flying-capacitor inverters.

Additionally, it has the accompanying highlights:

15
1. It is significantly more appropriate to high-voltage, high-control applications than the

regular inverters.

2. It switches every gadget just once per line cycle and produces a multistep staircase voltage

waveform moving toward an unadulterated sinusoidal yield voltage by expanding the quantity of

levels.

3. Since the inverter structure itself comprises of a course association of many single-stage, full-

connect inverter (FBI) units and each scaffold is encouraged with a different DC source, it doesn't

require voltage balance (sharing) circuits or voltage coordinating of the exchanging gadgets.

4. Bundling format is substantially less demanding in view of the effortlessness of structure and

lower part tally.

5. Delicate exchanging can be utilized in this structure to keep away from cumbersome and lossy

resistor - capacitor-diode snubbers.

These preferences are our inspiration to take a shot at the consonant examination of fell three-

level, five-level and seven-level acceptance engine drives.

16
 Chapter-2

Background and Literature Review

2.1 Background

By and by Power electronic inverters are getting the chance to be eminent for various current drives
work. In a couple of years, inverters have alike change into a requirement for a few exercises, for
instance, motor overseeing and control structures. Using different low voltage levels to perform control
adjustment was authorized by a MIT researcher with over nineteen years earlier. The amazed inverter
structure is to a great degree consoling in AC drives, when the two slashes down consonant substance
and high power are required.

17
Fig. 2.1 One phase leg of an inverter with (a) two levels, (b) three levels, and (c) n
levels.

2.2 Diode Clamped Multilevel Inverter

Normally used numerous topography is the diode cut inverter, in which the diode is used as the fastening

contraption to locks the DC transport voltage so as to accomplish adventures in the yield voltage. The

unprejudiced point converter organized by Nabae, Takahashi, and Akagi in 1982 was extremely a three-

level diode-fastened inverter. A three-level diode cut inverter subsist of two arrangements of switches and

two diodes.

18
Each switch sets works in grateful mode and the diodes used to tolerate the expense of access to mid-point

voltage. In a three-level inverter all of the three times of the inverter shares an ordinary dc transport, which

has been subdivided by two capacitors into three dimensions. The DC transport voltage is split into three

voltage levels by using two course of action relations of DC capacitors C1 and C2. The voltage push over

each trading contraption is compelled to V voltage is Vcapacitor is Vdcdc Over the catching diodes Dc1

and Dc2. It is recognized that the total dc association and Center point is controlled at half of the dc

interface voltage, the voltage over each dc/2 (Vc1=Vc2=Vdc/2). In a three dimension diode segmented

inverter, there are three assorted possible trading states which apply the stair case voltage on yield voltage

relating to DC interface capacitor voltage rate. For a three-level inverter, a game plan of two switches is

on at some arbitrary time and in a five-level inverter, a course of action of four switches is on at some

irregular time and whatnot. Fig-2.2

Fig 2.2: Topology of the diode-clamped inverter (a) three-level inverter, (b) five level inverter.
19
Fig: 2.3 .Output voltage in three-level diode- clamped inverter (a) leg voltage (b) output phase
voltage

Fig 2.3

Exhibits the stage voltage and line voltage of the three-level inverter in the Equitable condition.

The line voltage involves a phase leg a voltage and a phase leg b voltage. The ensuing line voltage

is a 5-level staircase waveform for three-level inverter and 9-level staircase waveform for a five-

level inverter. This infers a N-level diode-clamped inverter has a N-level yield arrange voltage

and a (2N-1)- level yield line voltage. At the point when all is said in done the voltage over each

capacitor for a N level diode cut inverter at persevering state is V. But every unique trading

contraption is required to square only a voltage dimension of Clamping diodes require different

evaluations for turnaround voltage blocking.

By and large representing a N level diode propped inverter, for every leg 2(N-1) exchanging

contraptions, (N-1) * (N-2) anchoring diodes and (N-1) dc interface capacitors are required By

broadening the measure of voltage levels the possibility of the yield voltage

20
 s enhanced and the voltage waveform winds up being nearer to sinusoidal waveform. Regardless,

capacitor voltage altering will be the basic issue in unpredictable state inverters. Precisely when

N is sufficient high, the measure of diodes and the measure of exchanging gadgets will expansion

and make the structure impracticable to figure it out. If the inverter holds running under heartbeat

width balance (PWM), the diode switch recovery of these propping diodes transforms into the

genuine arrangement test. Regardless of the way that the structure is more jumbled than the two-

level inverter, the movement is immediate.

2.3 Operation of Diode clamped Multilevel Inverter

Fig 2.2(a) shows a three-level diode-clamped converter in which the dc bus

consists of two capacitors, C1, C2. For dc-bus voltage Vdc, the voltage across

each capacitor is Vdevice voltage stress will be limited to one capacitor voltage

level Vdc/2 through clamping dc/2 and each diodes. To explain how the staircase voltage is

synthesized, the neutral point n is considered as the output phase voltage reference point.

2.4 Advantages and Disadvantages of Diode Clamped Multilevel Inverter

Advantages:

1. All of the phases share a common dc bus, which minimizes the capacitance

requirements of the converter. For this reason, a back-to-back topology is not only

possible but also practical for uses such as a high-voltage back-to-back inter

14

21
connection or an adjustable speed drive.

2. The capacitors can be pre-charged as a group.

3. Efficiency is high for fundamental frequency switching.

4. When the number of levels is high enough, harmonic content will be low enough to

avoid the need for filters

Disadvantages:

1. The majority of the stages share a typical dc transport, which limits the capacitance necessities

of the converter. Consequently, a consecutive topology isn't as it were conceivable yet additionally

handy for utilizations, for example, a high-voltage consecutive entomb association or a movable

speed drive.

2. The capacitors can be pre-charged as a gathering.

3. Effectiveness is high for essential recurrence exchanging.

4. At the point when the quantity of levels is sufficiently high, symphonious substance will be low

enough to maintain a strategic distance from the requirement for channels

22
 Chapter-3

Aim and Objective

3.1 Aim of Project

Electricity is a helpful a favorable sort of imperativeness that can be occupied, basically controlled

and passed on to a wide combination of flowed geographically dispersed clients. There it is

changed over into various structures. Normally power is controlled by fluctuating parameters, for

instance, the voltage, stream, repeat, impedance or mixes of these to modify and control electrical

essentialness, as given by a basic imperativeness source, to the characteristics of the stack.

A staggered inverter is a power electronic contraption which is fit for giving needed trading voltage

level at the yield using different lower level DC voltages as a data. Generally a two-level inverter is

used with the true objective to make the AC voltage from DC voltage. This inverter uses a couple of

H-interface inverters related in plan to give a sinusoidal yield

Voltage. Each cell contains one H-associate and the yield voltage delivered by this amazed inverter

is extremely the whole of the significant number of voltages made by each cell i.e. in case there

are k cells in H-interface stunned inverter by then number of yield voltage levels will be 2k+1.

This sort of inverter has advantage over the other two as it requires less number of parts when

appeared differently in relation to the next two sorts of inverters therefore its general weight and

cost is furthermore less. First take the occurrence of a two-level inverter. A two-level Inverter

makes two one of a kind voltages for the load i.e. accept we are giving Vdc as a commitment to a

two dimension inverter then it will give + Vdc/2 and – Vdc/2 on yield. With the ultimate objective

to build an AC voltage, these two as of late made voltages are ordinarily traded. For trading

23
generally PWM is used, reference wave is showed up in dashed blue line. In spite of the way that

this system for making AC is effective anyway it has couple of drawbacks as it makes consonant

twists in the yield voltage and besides has a high dv/dt when stood out from that of a stunned

inverter. Customarily this method works yet in couple of employments it makes issues particularly

those where low mutilation in the yield voltage is required. Staggered Inverter (MLI) is to some

degree change of two-level inverter. In stunned inverters we don't deal with the two dimension

voltage rather with the true objective to make a smoother wandered yield waveform, more than

two voltage levels are consolidated and the yield waveform obtained for this circumstance has cut

down dv/dt and besides cut down consonant mutilations. Smoothness of the waveform is relating

to the voltage levels, as we augment the voltage level the waveform advances toward getting to be

smoother yet the multifaceted idea of controller circuit and portions moreover increases close by

the extended dimensions. The waveform for the three, five and seven dimension inverters where

we clearly see that as the dimensions are growing, waveform getting the chance to be smoother.

24
 Chapter-4

Hardware Implementation

MICROCONTROLLER ( ARDIUNO MEGA 2560)

MOSFET IRF 840
DRIVING H BRIDGE WITH IR2110
TLP250 MOSFET GATE DRIVER

4.1 Microcontroller Ardiuno

The Arduino Mega is a microcontroller board dependent on the ATmega1280. It has 54 advanced

info/yield pins (of which 14 can be utilized as PWM yields), 16 simple inputs, 4 UARTs

(equipment sequential ports), a 16 MHz precious stone oscillator, a USB association, a power jack,

an ICSP header, and a reset catch. It contains everything expected to help the microcontroller;

essentially associate it to a PC with a USB link or power it with an AC-to-DC connector or battery

to begin.

Summary

Microcontroller ATmega1280
Operating Voltage 5V
Input Voltage (recommended) 7-12V
Input Voltage (limits) 6-20V
Digital I/O Pins 54 (of which 15 provide PWM output)
Analog Input Pins 16
DC Current per I/O Pin 40 mA
DC Current for 3.3V Pin 50 mA
Flash Memory 128 KB of which 4 KB used by boot loader SRAM
8 KB
EEPROM 4 KB
Clock Speed 16 MHz

25
4.2 MOSFETS IRF 840

A N-MOSFET/IGBT needs an on a very basic level positive charge (VGS > Vth) associated with

the portal with the true objective to turn on. Using just N-channel MOSFET/IGBT contraptions is

a standard cost decline methodology due by a5nd large amazing lessening (there are different

advantages as well). In any case, using NMOS contraptions rather than PMOS devices suggests

that a voltage higher than the influence rail supply (V+) is required with the true objective to

inclination the transistor into straight action (irrelevant current limiting) and thusly evade

tremendous warm adversity. A bootstrap capacitor is related from the supply rail (V+) to the yield

voltage. For the most part the source terminal of the N-MOSFET is related with the cathode of a

conveyance diode considering capable organization of set away essentialness in the routinely

inductive load (See Fly back diode). Due to the charge accumulating characteristics of a capacitor,

the bootstrap voltage will rise above (V+) giving the required entryway drive voltage. A

26
 MOSFET/IGBT is a voltage-controlled device, which, on a basic level, won't have any entryway

current. This makes it possible to utilize the charge inside the capacitor for control purposes. By

the by, over the long haul the capacitor will lose its charge because of parasitic entryway current

and non-impeccable (i.e. restricted) internal resistance, so this arrangement is simply used where

there is an immovable heartbeat present. This is in light of the fact that the beating movement

considers the capacitor to discharge (at any rate midway if not completely). Most control plots that

use a bootstrap capacitor constrain the high side driver (N MOSFET) off for a base time to think

about the capacitor to refill. This infers the commitment cycle will constantly ought to be under

100% to suit for the parasitic discharge aside from if the spillage is obliged for in another way.

4.3 H Bridge & HIGH LOW side Driver IR2110

The most unobtrusive number of voltage levels for an amazed inverter using fell inverter with

SDCSs is three. To achieve a three-level waveform, a singular full augmentation inverter is

used. Essentially, a full-interface inverter is known as a H associate cell, or, as such Fig. 4.1.

The inverter circuit includes four standard switches and four freewheeling diodes.

27
4.4 Gate signal & inverter Operation

As demonstrated by four-switch blend, three yield voltage levels, +V, - V, and 0, can be

consolidated for the voltage over An and B. In the midst of inverter action showed up in Fig. 4.1,

switch of S1 and S4 are closed meanwhile to give VAB a positive regard and a present route for

Io. Switch S2 and S4 are swung on to outfit VAB a negative a motivating force with a route for

Io. Dependent upon the load current edge, the current may travel through the basic switch or the

freewheeling diodes.

Exactly when all switches are executed, the present will course through the freewheeling diodes.

In the event that there ought to be an event of zero dimension, there are two possible changing

guides to coordinate zero dimension, for example, 1) S1 and S2 on, S3 and S4 off, and 2) S1 and

S2 off and S3 and S4 on.

28
Regardless of the way that there are various ways to deal with drive MOSFET/IGBTs using hard

wired electronic circuits, IC Drivers offer settlement and features that attract makers. The fore-

most good position is conservativeness. IC Drivers inalienably offer lower spread deferment. As

marvelously basic parameters are resolved in an IC Driver, engineers require not encounter

monotonous method of describing, arranging and testing circuits to drive MOSFET/IGBTs.

4.5 High Side Non-Isolated Gate Drives

High side non-separated gateway drive circuits can be masterminded by the device create they

are driving or by the sort of drive circuit included. In like way, they are isolated whether P-

channel or N-channel contraptions are used or whether they execute arrange drive, level moved

drive, or bootstrap method. Nonetheless, the structure of high side drivers require more thought

and the going with motivation might be profitable to cover all parts of the arrangement:

• Efficiency

• Bias / power requirements

• Speed limitations

• Maximum duty-cycle limit

• Dv/dt implications • Start-up conditions

• Transient operation

• Bypass capacitor size

• Layout, grounding considerations

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4.6 High-Side Direct Driver for N-Mos

High side direct drivers for N-channel devices The bigger piece of force supply applications use

N-channel MOSFETs as the essential power change because of their lower cost, higher speed and

lower on-impediment. Using N-channel contraptions as a high side switch requires a passage drive

circuit which is referenced to the wellspring of the MOSFET. The driver must persevere through

the merciless voltage swings occurring in the midst of the trading changes and drive the entryway

of the MOSFET over the positive supply rail of the power supply. When in doubt, the entryway

drive voltage must be over the most bewildering DC potential open in the circuit. Every one of

these inconveniences make the high side driver plan a testing undertaking. High side direct drive

for N-occupy MOSFET In the most clear high side applications the MOSFET can be driven

explicitly by the PWM controller or by a ground referenced driver.Two conditions must be met

for this application:

Vdr<Vgs

Vin<Vdr-Vgs

4.7 Basic Operation of the Circuit

Since exhaust is related with the positive DC input rail, the trading movement occurs at the source

terminal of the device. It is yet the proportional clamped indyuctive trading with vague turn-on

and murder between times. In any case, from entryway drive setup viewpoint this is an absolutely

one of a kind circuit. Notice that the passage drive current can't return to ground at the source

terminal. Or maybe it must experience the load, related with the wellspring of the contraption.

30
In irregular inductor, current mode the entryway charge current must experience the yield inductor and

the stack. In diligent inductor current mode, in any case, the circle can be closed through the main pn

crossing point of the rectifier diode. At slaughter, the gateway discharge current gets past the rectifier

diode related among ground and the wellspring of the MOSFET. In each and every working mode,

both the charge and discharge streams of the CGD capacitor travel through the high repeat evade

capacitor of the power sort out. The net outcome of every one of these complexities is the extended

parasitic source inductance as a result of more sections additionally, greater circle an area drew in with

the entryway drive equipment. As showed previously, the source inductance has a negative analysis

affect on the door drive and backs off the trading exercises in the circuit. The other basic complexity

in high side arrange drive is the direct of the source – the trading center of the circuit. Paying close

insightfulness with respect to the source waveform of the MOSFET in the midst of murder, a broad

negative voltage can be viewed. As the execute is begun by pulling the entryway terminal toward

ground, the information capacitances of the MOSFET are quickly discharged to the Miller level

voltage. The device is still totally on, the entire load current is coursing through the exhaust to the

source and the voltage drop is close to nothing.

4.8 High & Low Side Driver IC (Ir2110)

Explanation

The IR2112 is a high voltage, fast power MOSFET and IGBT driver with free high and low side

referenced yield channels. The coasting channel can be utilized to drive a N-divert control

MOSFET in the high side design which works up to 600 volts.

31
In numerous applications, we have to utilize MOSFET designed as high-side switches.

Numerous a times we have to utilize MOSFETS designed as high-side and low-side switches.

For example, in extension circuits. Into equal parts lady of the hour circuits, we have 1 high-

side MOSFET and 1 low-side MOSFET.

In full-connect we have 2 high-side MOSFETs and 2 low-side MOSFETs. In such

circumstances, there is have to utilize high-side drive hardware nearby low-side drive

hardware. The most well-known method for driving MOSFETs in such cases is to utilize

high-low side MOSFET drivers.

Without a doubt, the most well known such driver chip is the IR2110. Features

• Floating channel designed for bootstrap operation

• Fully operational to +600V

• Tolerant to negative transient voltage

• dV/dt immune

• Gate drive supply range from 10 to 20V

• Under voltage lockout for both channels

• Separate logic supply range from 5 to 20V

• Logic and power ground ±5V offset

• CMOS Schmitt-triggered inputs with pull-down

• Cycle by cycle edge-triggered shutdown logic

• Matched propagation delay for both channels

• Outputs in phase with inputs

32
4.9 BOOTSTRAPPING & Its CONCEPT

A bootstrap circuit is one where part of the yield of an enhancer arrange is connected to the info,

in order to adjust the information impedance of the intensifier. At the point when connected

purposely, the aim is as a rule to increment instead of diminishing the impedance. Any procedure

where part of the yield of a framework is utilized at startup is depicted as bootstrapping.

A bootstrap entryway drive technique where input voltage levels confine the use of direct

entryway drive circuits for high side N-channel MOSFETs, the rule of bootstrap entryway drive

methodology can be considered. This methodology utilizes an entryway drive and running with

tendency circuit, both referenced to the wellspring of the guideline MOSFET transistor. Both the

driver and the tendency circuit swing between the two data voltage rails together with the

wellspring of the contraption. In any case, the driver and its drifting inclination can be completed

by low voltage circuit parts since the data voltage is never associated over their portions. The

driver and the ground referenced control hail are associated by a dimension move circuit which

must bear the high voltage qualification and critical capacitive trading streams between the

skimming high side and ground referenced low side circuits.

Circuit is one where part of the yield of an intensifier organize is connected to the information, in

order to change the info impedance of the speaker. At the point when connected intentionally, the

goal is as a rule to increment as opposed to diminish the impedance. Any procedure where part of

the yield of a framework is utilized at startup is portrayed as bootstrapping. Bootstrap entryway

drive technique where input voltage levels

26

33
restrict the use of direct portal drive circuits for high side N-channel MOSFETs, the rule of

bootstrap door drive framework can be considered. This system utilizes a portal drive and running

with inclination circuit, both referenced to the wellspring of the crucial MOSFET transistor. Both

the driver and the inclination circuit swing between the two data voltage rails together with the

wellspring of the contraption. By the by, the driver and its skimming inclination can be executed

by low voltage circuit parts since the information voltage is never associated over their portions.

The driver and the ground referenced control signal are associated by a dimension move circuit,

which must bear the high voltage differentiate and amazing capacitive trading streams between

the drifting high side and ground referenced low side circuits.

Fig 4.2 Typical Connections of IR2110

4.10 TLP250 MOSFET Gate Driver

The TLP250, similar to any driver, has an information arrange, a yield organize and a power supply

association. What's extraordinary about the TLP250 is that the TLP250 is an optically disengaged

driver, implying that the info and yield are "optically disconnected".

34
The confinement is optical – the info arrange is a LED and the accepting yield organize is

light delicate.

Fig 4.3 Pin configuration of TLP250

35
36
 Chapter-5

Solution for Future

5.1 Future Work

Disregarding the way that this Independent Study Project has anchored most by far of the

interesting issues and challenges of the Cascaded stunned inverter, additional work has been left

for future research.

The underlying section is the accuse affirmation considers for the fell amazed inverter. As a result

of the over the top number of semiconductor contraptions and uninvolved sections, how to

structure an accuse security intend to enhance the ride-anyway limit in various accuse

circumstances remains as a basic test. In current applications, the flawed module is to be replaced,

while the converter is running. As such, an additional switch is required at the terminal motivations

behind the module affiliations. Exploratory tests have shown that when such a slip-up occurs, the

voltage is comparably appropriated among whatever remains of the modules, with the ultimate

objective that it organizes the DC-interface voltage, as beforehand. Thusly the relentlessness of

the structure under module accuse conditions is ensured. Elevate examination is to be made in this

field moreover. Since one of the advantages of the specific converter is that it can work in low

trading frequencies, a comparable examination of the influence disasters is captivating to be

improved the situation high-impact applications, including trading and coordinating setbacks.

37
 Conclusion

Each MLI has its own blend of favorable circumstances and hindrances and for any one specific

application, one topology will be more suitable than the others. Regularly, topologies are picked

dependent on what has gone previously, regardless of whether that topology may not be the best

decision for the application. The upsides of the assemblage of research and recognition inside the

designing network may exceed other specialized inconveniences. Staggered converters can

accomplish a successful increment in general switch recurrence through the wiping out of the least

request switch recurrence terms. As talked about in Chapter 2, among the staggered converter

topologies, the CMC is the most encouraging option for industry application. Today, overall

innovative work of staggered inverter-related advances are going on. The focal point of this

proposition is constrained to key rule of various staggered inverters, adjustment procedure, and

consonant investigation of enlistment engine drives

38
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