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Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua

Driver Technique

Turn-off Performance Optimization of Press-Pack IGBT with Advanced


Active Gate Driver Technique

He Xu, Yao Chang, Haoze Luo, Wuhua Li, Xiangning He


Zhejiang University, College of Electrical Engineering
310027, Hangzhou, China
E-Mail: woohualee@zju.edu.cn

Acknowledgements
This work is sponsored by the National Nature Science Foundations of China (51490682, 51677166).

Keywords
«Insulated-Gate Bipolar Transistor (IGBT)», «Press-pack Modules», « Turn-off Performance»,
«Active Gate Driver».

Abstract
The press-pack IGBT (PPI) modules are characterized by design of double-sided cooling, solderless
joint and wire-bondless contact. These features allows them to be utilized in the field where power
density and reliability are demanding, especially in multi-MW wind turbine applications. However,
owing to the press-pack structure, there is parasitic inductance which can’t be neglected in the
mechanical assembly with PPI modules. To diminish the voltage overshoot during turn-off transition
caused by the parasitic inductance, an advanced active gate driver is put forward in this paper. The
control diagram is given and the feasibility is evaluated. Eventually the performance between passive
gate driver and proposed solution is compared experimentally.

Introduction
Recently multi-MW wind turbines are increasingly utilized in wind power plants around the world.
Because wind turbine converters demand high power density and high reliability due to nacelle space
limitation and high maintenance cost of remotely located wind turbines [1], the selection of
semiconductor device is crucial. Among the state-of-the-art semiconductor switches, the press-pack
IGBT (PPI) modules are advantageous over plastic IGBT modules and competitive with integrated
gate-commutated thyristor (IGCT) modules with respect to power density and reliability [2], since
press-pack IGBT modules possess the attributes of double-sided cooling, wire-bondless contact, short-
circuit failure mode (SCFM), etc.

However, to fit in with the need of press-pack structure of PPI module, the mechanical assemblies of
high power converters equipped with PPI possess noticeable parasite inductance. During turn-off
transient the parasitic inductance gives rise to significant peak voltage. From [1] and [3], the parasite
inductance existing in the loop circuit applying press-pack IGBT modules is estimated at least 200nH,
leading to high overshoot voltage and additional loss when the switching device turns off. To ensure
the safe use of press-pack IGBT, modules with higher blocking capability are required which results in
excess cost.

In this paper, an advanced gate driver which employs current injection technique is raised. It is applied
for StakPak’s press-pack IGBT module (rated at 4.5kV/2kA) provided by ABB [4]. The configuration
of StakPak’s PPI is shown in Fig. 1. To confirm the effect of proposed gate driver, an IGBT’s dynamic
performance test platform is implemented and experiment is carried out to obtain the turn-off behavior
of device under test (DUT). The comparison containing overshoot voltage and switching losses is
offered and the practicability of the proposed IGBT driver is analyzed.

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.1


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)
Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua
Driver Technique

Collector

28.75mm

Gate

Emitter

Fig. 1: StakPak’s press-pack IGBT module

Turn-off behavior of the press-pack IGBT module


The typical PPI module’s turn-off waveform is shown in Fig. 2. Before the beginning of turn-off
process, the PPI module is in on-state. Then, the turn-off transition starts with the shutoff of gate
voltage vGE. It drops from initial on-state value vGEon to plateau voltage vGEP. After that, PPI enters
Miller-plateau state, when vGE keeps nearly constant. Next vGE falls lower than the threshold voltage
vGEth, which also means vCE rises to DC-bus voltage. Afterwards, collector current iC begins to fall. It
decreases rapidly from load current Iload down to zero and an overshoot ¨vCE on vCE is induced by
collector current falling rate across parasitic inductance. Then the turn-off process ends.

It can be observed that the parasite inductance within loop circuit leads to high surge voltage on vCE.
The overshoot proportion is about 50% and stray inductance is calculated about 180nH. The high
overshoot restricts the widespread use of PPI modules in high voltage field, especially multi-MW
wind turbines applications. Therefore it is eager to decrease the peak voltage and optimize the turn-off
performance of PPI modules.

VGE(V)
VGEon
Miller Plateau
10 10
VGEP
VGEth

0 0

vGE (t)
VGEoff -10 -10

VCE(V) IC(A)

1500 1500
ǻvCE vCE(t)
1000 1000

500 500
iC(t)
0 0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0


Time(ȝs)
Fig. 2: Typical turn-off waveforms of the press-pack IGBT module with inductive load

Active gate driver control


Conventionally the active clamping method is used to reduce the overshoot voltage across the IGBT
by controlling turn-off diC/dt [5]. However, the active clamping method is not the most suitable to
decrease vCE. As is presented in Fig. 3, when vCE exceeds clamping voltage Vclamp, there is spike ¨vGE
on the gate. It helps to turn on the IGBT for instant to reduce the diC/dt values, but the gate voltage
spike may be over the rated voltage values of vGE, which causes damage to IGBT gate terminal.

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.2


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)
Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua
Driver Technique

In contrast to active clamping method, the active voltage control allows wider controlling range of vCE.
And there will be no voltage spike during turn-off process, avoiding the break down of IGBT gate
terminal. There are two main methods of active gate control: current-mode gate driving (gate current
control), and voltage-mode driving (gate voltage control). And the current-mode driving is better than
the voltage-mode driving, since the collector–emitter voltage slope (dvCE/dt) which decides the
dynamic performance IGBT gate driver mainly depends on the gate current iG and are independent of
load current iload [6].

VGE (V)
20 20

vGE (t)
10 ǻvGE 10

0 0

-10 -10

VCE (V)

1500 1500
Vclamp

1000 1000

500 500
vCE(t)
0 0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0


Time(ȝs)
Fig. 3: Voltage spike ¨vGE under active clamping control

Based on the principle of feedback closed loop control, an active gate control method is adopted and
the configuration is depicted as Fig. 4. The VCE monitoring part measures collector-emitter voltage vCE.
And the measured results are compared with reference value Vref1. Then the comparison results is
transported to FPGA where the digital information is processed to determine the amplitude of gate
current. The buffer converts the output signal into real gate current. Normally the gate voltage is
employed, which is the passive gate driver. If active gate driver is applied and VCE is higher than the
Vref1, gate current is injected into the gate-emitter capacitor CGE. The injection of gate current puts off
the turn-off diC/dt, and it reduces the peak value of vCE during turn-off process. With this idea,
additional passive components can be replaced. Despite a simpler circuit can be realized by adding
two gate resistance Ron and Roff (Roff>Ron) and a fast diode in series with one of them, the adopted gate
driver has more quick response and enables press-pack IGBT devices connected in series or in parallel
regardless of parameters difference [6]. Hence the solution of adopted active gate driver has more
potential to be utilized in large scale.
VCE monitoring C

Vref1 IG
Amp RG
Buffer G
FPGA
Vref2
CGE
Amp VGE
E
VGE monitoring

Fig. 4: Adopted active gate driver technique (gate current control method)

Experimental validation and comparison


By employing the double-pulse principle, the experiment is conducted in Tj=25°C, VCE=1000V and
IC=1000A, meanwhile the stray inductance is calculated as nearly 180nH. To be more pervasive the
gate resistance of two tested gate driver is set the same, where Ron=Roff=1.8ȍ. The experimental result

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.3


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)
Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua
Driver Technique

is plotted in Fig. 5 and Fig. 6. It is seen that the active gate driver inject more gate current into gate-
emitter capacitor CGE, which delays the falling time of vGE and decrease the turn-off collector current
falling rate. Thus the overshoot voltage drops about 20%.

VGE(V)

10 10

0 vGE (t)
0
----Passive gate driver
----Active gate driver
-10 -10

VCE(V) IC(A)

1500 1500
vCE(t)
1000 1000

----Passive gate driver 500


500
----Active gate driver iC(t)
0 0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0


Time(ȝs)

Fig. 5: Comparison of turn-off waveforms between passive gate driver and proposed gate driver

IG(A)
10 10

----Passive gate driver


----Active gate driver iG(t)
0 0

-10 -10

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0


Time(ȝs)

Fig. 6: Comparison of gate current between passive gate driver and proposed gate driver

From Fig. 7 it can be noted that the active gate driver dissipates more power than passive driver. The
switching energy of active driver during turn-off transition is calculated about 0.1mJ, while the passive
gate driver consumes about 0.066mJ. It indicates that the traditional passive gate driver is in fact more
efficient than the proposed gate driver. The excess switching loss of active gate driver needs to be
dissipated in the transistor and gate resistor inside the gate driver circuit, which is a downside to the
use of this active gate driver and requires more complex cooling design.
PG(W)
100

----Passive gate driver


----Active gate driver
50

-50

-100

-150
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Time(ȝs)

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.4


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)
Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua
Driver Technique

Fig. 7: Comparison of gate power between passive gate driver and proposed gate driver

Under different load current (750A, 1000A, 1250A), the experimental results are displayed in Fig. 8..
With the load current heavier, the voltage overshoot is reduced more. At most the proportion of surge
voltage drops by around 22%. Limited by parameters of the test platform, more strict condition of
switching device couldn’t be realized. But the results still verifies the optimizing effect of the active
gate driver applied gate current control method compared with passive gate driver.

Fig. 8: Comparison of peak values of turn-off voltage under variable load current between passive gate
driver and proposed gate driver

Poff(MW)
1.2
----Passive gate driver
----Active gate driver
1.0

0.8

0.6

0.4

0.2

0.0

-0.2
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Time(ȝs)

Fig. 9: Comparison of turn-off power between passive gate driver and proposed gate driver

The cost of reduced surge voltage is the increase of switching loss. Fig. 9 exhibits the difference
between the two gate drivers in terms of switching loss. Even though the peak switching power are
almost the same, the overlap time of active gate driver is longer than the passive gate driver. In this
way the switching energy of DUT rises up after applying active gate driver. The consuming energy in
the active gate driver exceeds about 30% over the passive gate driver at most. Thus the switching
frequency must be lowered to ensure the reliability of tested active gate driver.

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.5


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)
Turn-off Performance Optimization of Press-Pack IGBT with Advanced Active Gate LI Wuhua
Driver Technique

Fig. 10: Comparison of switching energy during turn-off transition under variable load current
between passive gate driver and proposed gate driver

Conclusion
In this paper, the turn-off behavior of press-pack IGBT module is discussed and the presence of surge
voltage during turn-off process is analyzed. The overshoot voltage limits the spread of press-pack
IGBT module in high power applications like multi-MW wind turbines converters to a great degree.
An active gate driver employing gate current control method is proposed and applied to optimize the
turn-off performance of press-pack IGBT module. At last the experimental comparison is given.
Despite the switching energy consuming in the gate circuit and tested IGBT device is raised, the
effective of proposed active gate driver to reduce the voltage spike is confirmed.

References
[1] Senturk, O. S.; Helle, L.; Munk-Nielsen, S.; Rodriguez, P., “Converter structure-based power loss and static
thermal modeling of the press-pack IGBT three-level ANPC VSC applied to multi-MW wind turbines,” Industry
Applications, IEEE Transactions on, vol.47, no.6, pp. 2505-2515, 2010.
[2] Senturk, O. S.; Munk-Nielsen, S.; Teodorescu, R.; Helle, L., “Power density investigations for the large wind
turbines' grid-side press-pack IGBT 3L-NPC-VSCs,” Energy Conversion Congress and Exposition (ECCE),
IEEE 2012, pp. 731-738.
[3] Chen, H.; Cao, W.; Bordignon, P.; Yi, R., “Design and testing of the World's first single-level press-pack
IGBT based submodule for MMC VSC HVDC applications,” Energy Conversion Congress and Exposition
(ECCE), IEEE 2015, pp. 3359-3366.
[4] [Online] 5SNA 2000K451300 datasheet http://new.abb.com/semiconductors/zh/stakpak.
[5] Fink, K.; Bernet, S., “Advanced Gate Drive Unit With Closed-Loop diC/dt Control,” Power Electronics,
IEEE Transactions on, vol. 28, no. 5, pp. 2587-2595, 2013.
[6] Baraia, I.; Barrena, J. A.; Abad, G.; Segade, J. M. C.; Iraola, U., “An experimentally verified active gate
control method for the series connection of IGBT/diodes,” Power Electronics, IEEE Transactions on, vol. 27, no.
2, pp. 1025-1038, 2012.

EPE'17 ECCE Europe ISBN: 9789075815276 et CFP17850-ART P.6


© assigned jointly to the European Power Electronics and Drives Association & the Institute of Electrical and Electronics Engineers (IEEE)

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