168mes Journées Tunisiennes d’Electrotechniques et d’Automatique 8 et 9 Novembre 1996 Hammamet - Nabeul- Tunisie A Hardware Design for Picture-in-Picture Encrustation H.HMIDA, M.AQUADI, T. ROUIS, S. TAJOURI, 8. JEMAL Ecole Supérieure des Postes et des Télécommunicationsde Tun Route de Raoued, Km 3,5- CP2083 Cité El Ghazala- TUNISIE, ‘Tel:216-1-762000, Fay:216-1-762819. Résumé: Dans les télévisions numériques lorsque l'on affiche un programme en provenance d'un canal (x) et que l'on désire savoir ce qui se passe sur d'auires chaines, il est possible dafficher, le programme d'un autre canal (y) dans une petite feneire sinnilianément avec le programme initial du canal (x). Dans plusieurs autres applications, comme la zélésurveillance ou l'assistance médicale (ot les images sont fournies & partir de caméras) un moniteur TV est nécessaire pour chaque caméra utilisée. Dans cet article, nous proposons une réalisation hardware d'un systeme d'incrustation d'images (facile a réaliser et a faible corit) qui réduit le nombre de moniteur TV a un seul en affichant sur le méme écran les images désirées & taille réduite. Aussi, en introduisant quelques: modifications, on peut utiliser la solution proposée pour la numérisation des images. Abstract: In digital TV when you display on the full screen TV a program from Channel (x) and you want to know what happens in the other chanmels, it’s possible to display, the program channel (y) in a small window simultaneously with the first program. In many other applications, such as telesurveillance and medical assistance, (where pictures are supplied by cameras) a monitor TV is needed for each camera. In this paper, we propose a hardware system for picture-in picture encrustation (easy to realize and unexpensive) that reduces the number of monitor TV 10 one by displaying on the screen, the desired pictures at reduced size, Also, by some modification, we can use the proposed system for image digitizing.1. Introduction The so-called picture-in-picture facility has been introduced for the first time by ITT in 1977, using the UAA 1000 and SAA 3000 integrated circuits. Picture-in-Picture means the insertion of a second program’s picture on the screen of the TV receiver (at reduced size) simultaneously with the full size main picture. The second small picture may originate from another TV transmetter, from a video recorder, a monitor camera of another source. It allows monitoring of the second channel while watching the main channel see fig,(1) Smal picture TVset Main picture ™ Analog vidos in [Hardware mode ae Fig): Block diagram picture insertion Main requirement for Pictur Picture is to store the content of the small picture when it supplied by its source, and to deliver the content at the proper instant when it must be inserted into the main picture which is receved and displayed continuously. Video system based on ITT DIGIT 2000 circuits is designed to be used in tele surveillance such as domestic or industrial applications and medical assistance, Its also possible to use it for digitizing images suitable for image analysis like segmentation Some hardware modifications in the realization will be introduced to storage the digital video signal from the Video/synchro processor output. 2. General Description The insertion of a second program’s picture on the screen of TV simultaneously with the full main picture needs the following operation: data storage, compression and reading compressed data for display at real time, All this required data in/out at features level tobe compatible and synchronous. Video in is an analog signal in PAL standard; after digital processing by the hardware module it’s converted to analog RGB signals suitable to displayed. The hardware design module is given by its block diagram in fig.(2). The conversion operation from analog video input to digital and from digital to analog signal is performed by the video codec VCU 2133 IC’s. Digital video processing consern specially the Video Synchronous Processor VSP 2860 IC’s that separate digital videocomposite input into luminance and chrominance digital signals and the Picture-in-Picture processor PIP 2250 IC’s which controls the picture size and the location of its border in the TV screen by using DRAM interface and the IMBUS. All these integrated circuits are synchronous by a clock generator (a quartz crystal) connected to the VSP to generate the clock required, The frequency of the crystal has normally to be set to 17.734475 MHz for PAL standard. 2.1, Video Codec 2133 It's a high speed coder/decoder IC’s for analog to digital and digital to analog conversion of the video signal [1]. It combines the following functions: -Two input video amplifiers -One A/D converter for the composite video signal -One D/A converter for luminance -Two D/A converters for the color difference signals -One RGB matrix for converting the color difference signals and the luminance signals to RGB signals -Three RGB output amplifiers -Programmable auxiliary circuits for blanking, brithness ajustement and picture tube alignement. The A/D converter’s_ sampling frequency is 17.734475 MHz and data coded using 7 bits in gray code, These outputs fed to the VSP 2860 IC’s. After having been processed by the VSP and the PIP 2250 IC’sthe different parts of the digitized video signals are fed back to the VCU for further processing to derive the RGB output amplifiers. = Cf Ram a l6kx4 vn veu| mi | vse] vovaavi | PIP R213 2860 250 oo 8 qe Fig.(2): Picture-in-picture block diagram. 2.2.Video/Syne ProcessorVSP 2860 Most of all functions of digital signal processing, syne and deflection processing are performed by the VSP [2]. Main features of it are -luma channel with delay compensation, color trap, peaking filter, contrast multiplier and limiter. -chroma channel with color demodulator, color killer, color saturation multiplier, limiter and chroma multiplexer. -user-adjustement of contrast, saturation -sync separation section with syne slicer, horizontal PLL, vertical separation, vertical synchronization, horizontal drive pulse generation, -clock generation on-chip, or external clock. color The main analog video signal (to be encrusted), digitized by the VCU, is supplied to the VSP whitch deliver it in digital form in two component luminance and chrominance to the PIP or to the VCU. 2.3 Picture-In-Picture Processor PIP 2250 The PIP 2250 is a fast signal processor [3] in CMOS technology which is used to fer and to decimate the digital Y, R-Y and B-Y signals supplied by the VSP, to control the DRAMs for storing the small picture's content and for reading the same at the proper time for display. Its main features are digital video filters for anti-aliasing and data decimation -control of the two DRAMSs for storage of the small picture -control and supervision of the PIP via the IMbus full compatibility with the Digit 2000 system 3. Hardware Design The PIP ICs can operate in two different mode ‘Digital insertion mode’ and analog insertion mode called ‘Stand-alone mode’. The first one concern digital TV and the second analog TV. We are concerned by the stand alone mode. In this case the main picture is analog, the PIP would access the output YUV bus alone The merging of the small picture with the main picture would have to be analog swiching between the RGB of the analog main picture and the RGB output of the VCU for the small picture via the PIP’s ODOUT output (fig.(3)). Before that, many analog and digital processing are operate, on video signal input, to produce the picture to be encrusted on the screen. 3.1, Clamping and Syn Separation The VSP has one clamping output which supplies the required clamping pules [4] for two video signals. The resolution and the speed of the clamping pulse can be adjusted by introducing a video clamping circuit see fig, (4-a) After the TV set is switched on, the video clamping circuit first of all, ensures that the video signal at the VCU’s input is biased for the operation range of the A/D converter of 5 to 7 V. For this the sync top level is set to a constant level of 5.125V. The horizontal and vertical syne pulses areopouT chy} iF MvB Main Analog Video in Fig.(3): Hardware module for PIP encrustation now separated by a fixed separation level of 5.250V. so, that the horizontal synchronisation can lock the correct phase. The back porch level is then set at the constant 5.5V which is the reference black level for the video processing part of the VSP see Fig(4-b) sev ey 4 ve ee Lx ap ang ee se » Syn sro eve wv Fas phe N\ ssv b) sy Fig.(9): a) The external clamping cireuit ‘bpLevels in the video clamping eireuit 3.2.Horizontal/Vertical Synchronisation Durang the undelayed _ horizontal Blanking pulseUHB,the input amplifiers’ gain of the VCU is doubled and the white balance control is done, The blanking circuit of the VCU is controlled via the PIP by the delayed horizontal and vertical blanking pulse DHVB. Also, the VSP generates a digital data stream (Skew data SkD) which informs the PIP on the amount of phase delay used in the VSP to adjust the video signal to the phase of the horizontal deflection, 3.3. Luminance/Chrominance Processing The digital video signal supplied by AID converter in a parallel code gray is first converted by the VSP into a simple binary- coded signals. After constrast adjustment, the VSP delivers the luminance in an 8-bit parallel format to the PIP for being stored and mixed with the main pictures signals. At the same time, the VSP decimates the sample rate of the (R-Y) and (B-Y) color difference signals and calculates the burst magnitude After these processing, the (R-Y) and (B-Y) colors difference signals are multiplexed into a 4-bit signals which fed to PIP. We will see later that all adjustement and parametres (luminance contrast, brightness, horizontal blanking pulse, color saturation,...) are programmable via the IM-BUS. 3.4, Input/Output picture processing After being separated by the VSP, the digital luma and chroma signals for the small picture are received by the PIP. The luma signals are parallel in a 6-bit code, the chroma signals in the shape (R-Y) and (B- Y), time multiplexed on four lines. Because of the reduction in picture size further processings (luma and chroma skew correction, peaking control lowpass filtering, vertical filtering, demultiplexing and multiplexing...) are needed. This results only 5 bits resolution for luma (Y) and 6 bits for chroma (UV). So then the 6-bit chroma R-Y and B-Y outputs from chroma line buffer is multiplexed to 3 bits in the seqence of (R-Y)LSB, (R-Y)MSB, (B-Y)LSB, (B-Y) MSB for DRAM interface. However, for a reduction to 1/9 of the original picture (areduction factor 1/3 in both horizontal and vertical direction see fig.(5)) the number of multiplexed 3 bit chroma samples fiom the chroma line buffer is 224, The same number for the 5-bit luma samples is stored in the line buffer. So only 224 Bytes are generated evry three lines for storage into the external DRAM. 3.5. DRAM Interface The DRAM interface manages in real- time the tasks of storing (writing) into DRAM the outputs from the PIP, retrieving (reading) the reduced picture from DRAM to the PIP, and refreshing DRAM data, There are two types of read operation- output picture processing read and IM bus read, and two types of write operations -input picture processing write and IM bus write. The priorities of these operations are 1. output picture processing read 2. input picture processing write 3. IM bus write 4. IM bus read 5. Refresh We used Two DRAMs 64K bits each (16x4) to provide the storage for one small picture. 3.6, Parameters for Control of Input Output Picture Processing The input picture processing blok in the PIP defines a window for the input picture to be processed. Parameters THV, IVS and IVSI define the location and size of" this window see fig,(5). Fig.(9): Input picture processing parameters The data representing the reduced picture from the line buffers are retrieved line by line to be merged by the main picture for a picture-in-picture effect. In addition, a border is added to the small picture Parameters BHS, BLSB and BVS control the location of border while BWI, BFA, BLSB, BHI and PHI control the size of border. For the small picture, parameters PHS1, PHS2, BVS and BHI control the location while PHI and PWI control the picture size Outpt tne baer sie 224 bytes — yrusi_amus,, apy ane Verial 8 tet (main picture) Fig(@): Ouput picture processing parameters ‘PHSI:Part! of pete horzontel sant postion PHS2:Par2 of pcture horizontal star position PWEPicture wath REC:Nunber of clocks for 224 bytes bur refresh IRE 2DAAPHSDAPH Notice the output line buffer is a fixed- lengh 224 bytes shift register while the number of bytes transferred for the external DRAM to the buffer, may be 224 or less see fig.(6). The luma signals resp. the chroma signals are now transferred by the VSP to the the VCU on 8-bits resp. 4-bits. The VCU. generates analog RGB signals suitable to be merged with the main picture. The insertion is ensured and synchrounised by the signals MHB and MVB (Main horizontal blanking and Main vertical blanking) extracted from the main analog video in see fig.(3). All these processings are ensured: by means of control registers and status registers in the VSP and in the PIP processors, To control the system, we have developped a software to load desired parameters in the different registers via the INTERMETALL Bus (IM Bus),Fig ():Pieture in picture encrust In fig.(7) the small picture is supplied by a monitor camera where PHS1=32, PHS2=32, PWI= 96, and a quartz crystal frequency 17.766MHz When we want to display more than one picture on the screen (two for example) we can duplicate the system. and use a multiplexer to ensure the insertion. 4, Conclusion The use of a crystal with a frequency 17.766MHz instead of 17.734MHz gives pictures without enough color contrast Improvements may be also introduced by the use of a yicontroller IC’s to control the system. References [1] Video codec, ITT Semiconductors Group EditionFeb. 1993, Germany, [2] Video/syne processor, ITT Semiconductors Group Edition Feb. 1993. Germany. [3] Picture in picture processor, ITT Semiconductors Group Edition March 1992, Germany. [4] Ir U ALLAEYS, ‘Cours de télévision moderne’ Eyrolles Editeur Paris