Question Bank

Combination circuits

➢Various examples of Number system Conversion

➢(-8)H in binary

➢difference between sequential &combinational ckt.

➢What is BCD and where it can be used?

➢ Is there any other way to Reduce gates?

➢ Why K-map is used?

➢ Binary to gray code generator.

➢ Fundamentals of digital electronics like basic gates, universal gates, basic gates from
universal gates, not gate from xor gate, xor gate from nand gate, (MI)

➢ Design X-OR gate using Multiplexer. (MI)

➢ Truth table of Ex-or gate

➢ What are universal gates ? (MI)

➢ Design of gates using NAND and NOR.

➢Give two way for NAND gate as a inverter.

➢ Make xor gate using nand gate.

➢ Various basic gates using 2:1 Mux like AND OR (MI)

➢ Design Full-Adder using Multiplexer.

➢ Gate level implementation of Half Adder

➢ why we required full adder?

➢ Draw a half adder circuit and derive it equations through Karnaugh map .

➢ Prove that equation of Full Adder using K-Map

➢ Why we need Carry Look ahead Adder.

➢ Design Full Adder using Half Adders

➢ Substraction using 2’s complement method

➢ Full Adder Half Subtractor Circuit design with truth table

➢ What is Multiplexer and why we need Multiplexer. (MI)

➢ How mux behaves for shorted output?

➢ Block diagram of mux

➢ Multiplexer function where it is used 4:1 mux using 2:1 mug (MI)

➢16x1 mux using 2x1 muxes. (block diagram)

➢8:1 Mux using 2:1 Mux

➢64:1 Mux using 2:1 Mux

➢64:1 Mux using 4:1 mux

➢4:1 mux using 2:1 mux with complete logic
➢ What is the application of encoder and decoder?

➢ concept of encoder (Working and its application)

➢Working of Priority encoder

➢ Which are the different logic families?

➢ Which is fastest among all logic families? Why?

➢ Which logic family require less space?

➢ Which logic family is used in vlsi technology?

➢Difference between enable & clock

➢ Gates using CMOS
➢ What is paasgate?

➢ How paasgate works?

➢ Make Ex-or gate using paasgate transistor

➢ Magnitude comparator

➢ 4 bit magnitude Comparator

➢ Multivibrator circuit gate based.

➢ Design a buffer using nand gate.

➢ If we give feedback to any digital circuit would it be a sequential or combinational

circuit?

➢what is setup time , hold time , clock skew , +ve slack and –ve slack ?
 Sequential Circuits

➢What is the difference between synchronous and asynchronous sequential circuits? Which
one is faster and why? Next one related to this is if synchronous is faster then why are we
use asynchronous circuits, what are the advantages for the same? (MI)

➢flipflop is combinational or sequential?

➢ What is Flip-flop? (MI)

➢ Difference between Flip-flop and Latch. (MI)

➢ How to form flipflop using latch?

➢ Master slave block diagram using D flipflop

➢ Draw and Explain Waveform of D latch and D Flip-flop.

➢ If we want to store 10 bits of data, then how many flip flops are required?

➢ In clock of any Flip-flop,‘>’ symbol indicates.

➢ All flip flops (MI)

➢ Explain and Design Gate level diagram of D flip flop using truth table.

➢ Explain T Flip flop using Truth table.

➢ Design T flip flop using D Flip flop.

➢ Draw the Internal Circuit of RS Flipflop

➢ What is Master slave JK Flip flop?

➢ Truth table of j-k flipflop

➢ D flipflop using cmos and paasgate transistor

➢ S-R Flip-flop. Explain its functionality and the reason why J-K or any other flip flop is
used

➢ What is a race around and race condition? (MI)

➢ What is the difference between S-R and J-K flipflop? What is the problem occour in J-K
flipflop and how to solve it? (MI)

➢Make a reset ckt for D flip flop

➢ Draw the internal structure of SR flip flop and take a condition to prove or explain its
drawback.

➢ Why do we use T flip flop?

➢use of d flip flop?

➢ Gate level implementation of D flip flop

➢ Explain and Design Gate level diagram of D flip flop using truth table

➢ Design T flip flop using D Flip flop

➢T flip-flop using JK

➢Draw flip flop based sequence detector for 101 without making a state diagram

➢ Difference between Edge Triggering and Level Triggering.(MI)

➢ What are the application of level triggered and edge triggered clock?

➢ What is memory? Internal structure of Memory?(MI)

➢Type of counter? Which one is faster and why? (MI)

➢ Draw logic diagram of mod 2 counter ? Draw the logic diagram of mod 3 counter?

➢2 bit counter (MI)

➢ Difference between Asynchronous and Synchronous counter using example (MI)

➢ BCD Counter
➢ Disadvantages of Ripple carry Adder

➢ Ripple Counter.

➢ Ripple counter using d flipflop

➢ Generate bcd counter using gates

➢ What is Octal counter?

➢ Asynchronous and Synchronous Counter (MI)

➢Complete design of modulo-5 counter with its wave forms

➢how many flip flop required in modulo16 counter?
➢For modulo-16 counter how many flipflops required?
➢How the states get changed in counter explain with wave forms
➢ Difference between Jhonson counter and ring counter and there truth table

➢ What is the difference between Mealy and Moore model ?(MI)

➢ Draw the state diagrams of a 2 bit counter using Moore and Mealy model ?

➢Detect sequence 1001 using any fsm

➢make a melay machine to detect 1001 sequence Only using 3 states ism model
➢Synchronous & asynchronous reset
➢ Frequency divide by 2

➢ Frequency dividing concepts (I)

➢ ¾ th frequency divider

➢ Shift Register
➢ What is latch? (MI)

➢ What is latch up problem?

➢ Why latch is called memory storage element? (I)

➢Latch up time.

➢ When we are using Latch and Flip-flop? (MI)

➢ What do u mean by setup and hold time?

VLSI (Verilog)

➢ Difference between Blocking and Non blocking with examples (MI)

➢ where we can use blocking and non-blocking assignment and why? (MI)

➢ How the always block execute using example (I)

➢ Default value of reg and net type of variable (MI)

➢ Why we use Register and Wire?(I)

➢ Difference between register and wire data type and its initial value?(MI)

➢ What is mixed signal VLSI

➢What is VLSI?”, “Why ASIC?

➢What is difference between C and Verilog? (I)

➢Can we use File Management in Verilog?

➢Which datatypes are used in Verilog? (MI)

➢Can we use BIT data type in Verilog?

➢What is meant by “synthesis” in Verilog? (MI)

➢Is “multiplication” or “division” operation synthesizable in Verilog? how can we make

those operations synthesizable? (I)

➢ Verilog Code:- Swap the two value without using third variable (MI)

➢VHDL/Verilog code for sync and async reset.

➢Draw the ASIC design flow

➢What is difference between ASIC and FPGA based designs?

➢What is FSM? What are the types of FSM? Explain with some example

➢VHDL and Verilog are which type of languages?

➢Draw complete flow of FPGA based designing. Have you ever dump your design in some
FPGA board, if yes then tell me something about it.

➢Do you know about various verification methods?

➢Draw the sparatn 3E architecture ? basic blocks?

➢Write HDL code(VHDL/Verilog) for 16*1 mux and 3 bit synchronous up counter

➢Write Verilog code for the flip-flops and explain it line by line.(e.g. D flip-flop)

➢Write a code for Clock generation.

➢Write a code for Half adder. (MI)

➢Why verification is needed for designing and manufacturing any chip/product?

➢what do you mean by verification

➢Difference between software and hardware verification?

➢Give example of the market faulty product .(with improper verification)

➢Disadvantages of the faulty chip/product.

➢What is Module?

➢how to use case statement?

➢draw state table for round floor to 4th floor by lift.

➢Assignment operator “==”

➢What is flow of any cuircuit making in virtuoso?

➢About libraries in virtuoso

 CMOS

• Which logic family is used in vlsi technology?

• What is a CMOS and why is it preferred over MOSFET?

• What is a SCR?

• Why we used P-substrate in NMOS?

• why we called N-MOS

• What is inversion region in CMOS?

• Id equation for linear region.

• Circuit based questions based on propagation delay

• VTC of CMOS and drain current of each region

• Draw the layout of a CMOS inverter ? What are the advantage of CMOS inverter? After
long use what is problem cause in CMOS inverter? Which leackage paths are generated in
CMOS inverter ?

• When input to the CMOS is Vth , then what will be the output?

• What happens when P-MOS and N-MOS in CMOS inverter are interchanged?

• In CMOS which has larger width, P-MOS or N-MOS? Why?

• How is a channel formed in CMOS?

• What if we interchange pmos and nmos position in CMOS?

• What if we interchange drain and source terminals?

• Current equation for MOSFET.

• In which regions can we use CMOS as an amplifier and as a switch

• Which are different operating regions of MOFET and CMOS?

• Why is the output of CMOS inverted ? Explain its working along with the concerned circuit.

• Why CMOS is not used when channel length is in nm ? What is used instead of CMOS when
channel length is below 20 nm ?

• What is Noise margin and how is noise margin important for a cmos?

• Explain the creation of channel in MOSFET(specifically nmos)?

• Draw CMOS inverter and explain its working. What if we replace the p-MOS of inverter
with a resistor? Will it work as an inverter?

• Draw the structure of n-MOS and explain it. Explain the channel formation between the
source and the drain.

• Describe the basic CMOS inverter operation. What is pinch off condition?

• tell me about different types of current sources.

• Draw the circuit of cascode current mirror. What are the advantages of the same?

• What kind of EDA tools are you using during lab sessions and which are your reference
books?

• difference between cmos and ccd.

• Design logic gates using CMOS.

• Design any Boolean equation using transmission gate.