DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.

Date:

Experiment No. 2

Conduct experiment to test diode clipping (single/double ended) and Clamping circuits
(positive/negative).

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.

2. (a) SERIES & PARALLEL CLIPPERS & TWO WAY CLIPPER

AIM: To test diode clipping circuit (single ended/double ended) for peak clipping, peak detection

COMPONENTS & EQUIPEMENTS REQUIRED:

SR.
COMPONENT/EQUIPEMENT RANGE/VALUE QUANTITY
NO.
1 PN junction diode 1N4007 02
2 Resistor 10KΏ 01
3 Signal generator -- 01
4 CRO -- 01
5 DC power supply 0-30V dc 01
6 Bread board -- 01
7 Connecting wires -- Few

THEORY:

The basic action of clipper circuits is to remove the certain portions of the waveform, above or
below the certain levels, as per the requirements. Thus the circuits which are used to clip off
unwanted portion of the waveform, without distorting the remaining part of the waveform are
called clipper circuits or clippers. The half wave rectifier is the best and simplest type of clipper
circuit which clips off the negative portion of the input signal. By changing the orientation of the
diode in the circuit, positive or negative portion of the input signal can be clipped off. The clipper
circuits are also called Limiters or Slicers or Amplitude selectors.
The clipper circuits are mainly classified depending upon the orientation of the diode in the
circuit. When the diode is connected in series with the load, such circuit is called Series Clipper.
When the diode is connected in branch which is parallel to the load, it is called Parallel Clipper

PROCEDURE:

1. Series clippers

1. Connections are made as per the circuit diagram.

2. Signal generator is switched on and sine wave input of 6Vpp at 1 KHz is applied to the circuit.
3. First reference voltage VR is kept at 0V and output of the circuit is observed on CRO.
4. Now the reference voltage VR is varied is steps and the output is observed on CRO.
5. As per the readings the waveforms are plotted on graph sheet.
2. Parallel clippers

1. Connections are made as per the circuit diagram.

2. Signal generator is switched on and sine wave input of 6Vpp at 1 KHz is applied to the circuit.
3. First reference voltage VR is kept at 0V and output of the circuit is observed on CRO.
4. Now the reference voltage VR is varied is steps and the output is observed on CRO.
5. As per the readings the waveforms are plotted on graph sheet.

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3. Two way clippers

1. Connections are made as per the circuit diagram.

2. Signal generator is switched on and sine wave input of 8Vpp at 1 KHz is applied to the circuit.
3. First reference voltage VR1 and VR2 is kept at 0V and output of the circuit is observed on CRO.
4. Now the reference voltage VR1 and VR2 is varied is steps and the output is observed on CRO.
5. As per the readings the waveforms are plotted on graph sheet.

RESULT:
Series Clippers
Positive Series Clipper Vo=VR
Negative Series Clipper Vo= -VR
Parallel Clippers
Positive Parallel Clipper Vo=(VR+Vd )
Negative Parallel Clipper Vo= -(VR+Vd)
Two way Clippers
Positive Peak (VR+Vd )
Negative Peak -(VR+Vd)

CONCLUSION:
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2(a).1 SERIES POSITIVE CLIPPER

CIRCUIT DIAGRAM

OBSERVATION TABLE

REFERENCE POSITIVE PEAK VOLTAGE IN VOLTS

SR
VOLTAGE “VR” IN (Vo=VR)
NO.
VOLTS CALCULATED OBSERVED
1 0
2 0.5
3 1.0
4 1.5
5 2

WAVEFORMS

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2(a).2 SERIES NEGATIVE CLIPPER

CIRCUIT DIAGRAM

OBSERVATION TABLE

NEGATIVE PEAK VOLTAGE IN

REFERENCE
SR VOLTS
VOLTAGE “VR” IN
NO. (Vo= -VR)
VOLTS
CALCULATED OBSERVED
1 0
2 0.5
3 1.0
4 1.5
5 2

WAVEFORMS

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.

2(a).3 POSITIVE PARALLEL CLIPPER

CIRCUIT DIAGRAM

OBSERVATION TABLE

REFERENCE POSITIVE PEAK VOLTAGE IN VOLTS

SR
VOLTAGE “VR” IN (Vo=VR+Vd)
NO.
VOLTS CALCULATED OBSERVED
1 0
2 0.5
3 1.0
4 1.5
5 2

WAVEFORMS

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2(a).4 NEGATIVE PARALLEL CLIPPER

CIRCUIT DIAGRAM

OBSERVATION TABLE

REFERENCE NEGATIVE PEAK VOLTAGE IN VOLTS

SR
VOLTAGE “VR” IN Vo= -(VR+Vd)
NO.
VOLTS CALCULATED OBSERVED
1 0
2 0.5
3 1.0
4 1.5
5 2

WAVEFORMS

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.

2(a).5 TWO WAY PARALLEL CLIPPER

CIRCUIT DIAGRAM

OBSERVATION TABLE

S REFERENCE REFERENCE POSITIVE PEAK OUTPUT NEGATIVE PEAK OUTPUT

R VOLTAGE VOLTAGE
N “VR1” IN “VR2” IN CALCULATED CALCULATED
OBSERVED OBSERVED
O VOLTS VOLTS (VR+Vd) - (VR+Vd)
1 0 0
2 0.5 0.5
3 1.0 1.0
4 1.5 1.5
5 2 2

WAVEFORMS

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.

2(b) POSITIVE & NEGATIVE CLAMPERS

AIM: To test clamping circuits of positive and negative clampers.

COMPONENTS & EQUIPEMENTS REQUIRED:

SR. NO. COMPONENT/EQUIPEMENT RANGE/VALUE QUANTITY

1 PN junction diode 1N4007 01
2 Resistor 10KΏ 01
3 Capacitor 10uF/25V 01
4 Signal generator 2MHz 01
5 CRO -- 01
6 DC power supply 0-30V dc 01
7 Bread board -- 01
8 Connecting wires -- Few

THEORY:

Sometimes it is necessary to add a DC level to the AC output signal. The circuits which are used
to add a DC level as per the requirements to the AC output signal are called Clamper circuits.
The capacitor, diode and resistance are the three basic elements of a clamper circuit. The clamper
circuits are also called DC Restorer or DC Inverter circuits.

Depending upon the whether the positive DC or negative DC shift is introduced in the output
waveform, the clampers are classified as,

Negative Clampers

A simple negative clamper which adds a negative level to the AC output is shown in fig. 1. It
consists of a capacitor C, the ideal diode D and the load. Resistance RL.

During the first positive cycle of the input voltage Vi, the capacitor gets charged through forward
biased diode D up to the maximum value Vm of the input signal Vi. The capacitor charging is
almost instantaneous, which is possible by selecting proper values of C and RL in the circuit. The
capacitor once charged to Vm, acts as a battery of voltage Vm as shown in the fig.2.
Thus when Vi = Vm, the output voltage Vo is zero. As input voltage decreases after attaining its
maximum value Vm, the capacitor remains charged to Vm, and the diode D becomes reverse
biased. And the output voltage Vo is now given by , Vo = Vi - Vm

This is a good as adding a negative DC level equal to –Vm to the output.

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In the negative half cycle of Vi, the diode will remains reverse biased. The capacitor starts
discharging through the resistance RL. As the time constant RLC is very large, it can be
approximated that the capacitor holds all its charge and remains charged to Vm, during this
period. Hence we can write again that,

Vo = Vi – V m
Vo = - Vm, for Vi = 0
Vo = 0, for Vi = Vm
Vo = -2 Vm for Vi = - Vm

Positive Clampers

By changing the orientation of the diode in the negative clamper, the positive clamper circuit can
be achieved. The circuit is shown in fig 3.
During the negative half cycle of the input voltage Vi, diode D gets forward biased and almost
instantaneously capacitor gets charged equal to the maximum value V m of the input signal Vi.

The capacitor once charged to Vm, acts as a battery of voltage Vm, with the polarities as shown in
fig. 4.
Thus when Vi= Vm, the output voltage Vo is 2Vm. Under steady state conditions we can write,
Vo = Vi + Vm
In the positive half cycle, the diode D is reverse biased. The capacitor starts discharging through RL.
But due to large time constant, it hardly gets discharged during positive half cycle of Vi. It holds its
entire charge. Hence,

V0 = Vi + Vm

V0 = Vm, for Vi = 0
V0 = 2 Vm, for Vi = Vm
V0 = 0 for Vi = - Vm

PROCEDURE:

i) Negative Clamper:

1. Connect the circuit as shown in the figure.

2. Switch On the RPS and adjust the Reference voltage as shown in the tabular column.
3. Apply the sine wave input at frequency say 1KHz from the signal generator and adjust
the peak to peak amplitude to say 8V (p-p) (Peak amplitude of input must be greater than
clamping level).
4. Observe the input waveform (keeping Oscilloscope in AC Mode), output waveform
(keeping Oscilloscope in DC mode) and clamping level on Oscilloscope
5. Make VR = 0V and observe the positive peak being clamped to almost 0V.
6. Draw the input & output waveforms on the graph sheet.

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ii) Positive Clamper:

1. Connect the circuit as shown in the figure.

2. Switch On the RPS and adjust the Reference voltage as shown in the tabular column.
3. Apply the sine wave input at frequency say 1KHz from the signal generator and adjust
the peak to peak amplitude to say 8V (p-p) (Peak amplitude of input must be greater than
clamping level).
4. Observe the input waveform (keeping Oscilloscope in AC Mode), output waveform
(keeping Oscilloscope in DC mode) and clamping level on Oscilloscope.
5. Make VR = 0V and observe the negative peak being clamped to almost 0V.
6. Draw the input & output waveforms on the graph sheet.

CONCLUSION:

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.
2(b).1 POSITIVE CLAMPER

CIRCUIT DIAGRAM

CALCULATION OF CAPACITOR VOLTAGE Vc

Vc=Vi-Vd-VR. (Where Vd=0.7V)

OBSERVATION TABLE

INPUT REFERENCE OUTPUT VOLTAGE

SR VOLTAGE VOLTAGE
NO. “Vi” IN “VR” IN CALCULATED
OBSERVED
VOLTS VOLTS Vo=Vi+Vc
1 4 0
2 -4 0
3 4 2
4 -4 2

WAVEFORMS

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 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.
2(b).2 NEGATIVE CLAMPER

CIRCUIT DIAGRAM

CALCULATION OF CAPACITOR VOLTAGE Vc

Vc=Vi-Vd-VR. (Where Vd=0.7V)

OBSERVATION TABLE

INPUT REFERENCE OUTPUT VOLTAGE

SR VOLTAGE VOLTAGE
NO. “Vi” IN “VR” IN CALCULATED
OBSERVED
VOLTS VOLTS Vo=Vi—Vc
1 4 0
2 -4 0
3 4 2
4 -4 2

WAVEFORMS

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