A SEMINAR REPORT ON

“APPLICATIONS OF CARBON NANOTUBES IN VLSI”

SUBMITTED BY

Murimadugula Uday Kumar

Roll no:194563

M. Tech, VLSI SYSTEM DESIGN

Department of ECE, NIT Warangal.

Department of Electronics and Communication Engineering

National Institute of Technology, Warangal

Telangana-506004
 ABSTRACT

VLSI circuits employ copper as interconnect materials because it has less resistivity. With
change in technology scaling there is an increase in current density which results in increase in
copper resistivity.so it is essential to find new wiring solutions in nano wiring VLSI
technology. Carbon nanotubes (CNTs) have good potential for these applications because they
can sustain the highest current density. In this respect, Carbon nanotubes (CNT) are the best
possible choice which can withstand the challenges faced by copper.
Carbon nanotubes (CNTs) has special properties such as ballistic electronic conduction,
high tensile strength, high thermal stability and highest current density. Carbon nanotubes are
also used in deigning VLSI circuits like CNTFETs. CNTFETs are the best candidates for nano
electronics as well as upcoming digital devices in near future.

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 TABLE OF CONTENTS

S. No Chapter page no

1 Introduction 1

2 History 2

3 Classification of Carbon nanotubes 2

4. Properties of Carbon nanotubes 4

5 Interconnects 5

6 CNTFET 7

7. Future Scope 15

8 Summary 16

9 References 17

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 LIST OF FIGURES

Figure No. Description Page No

1 Wrapping of graphene sheet to form carbon nanotube 2

2 Chirality and geometry of CNTs and their associated configurations 3

3 Parchment model and Russian Doll Model 4

4 Cross section of Back-gated CNTFET 8

5 Cross section of Top-gated CNTFET 9

6 Wrap-around gate CNTFET 10

7 Schematic of SB CNTFET 11

8 Schematic of MOSFET like CNTFET 12

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 1.INTRODUCTION
Carbon:

The name carbon comes from a Latin word "carbo" which means "charcoal”. Carbon is the fourth most
available element in this universe in terms of mass. Carbon is probably the most versatile chemical
element of all elements.

Carbon Nanotubes:

Carbon nanotubes are formed by wrapping of graphene sheet, which is single layer of hexagonal
carbon lattice[4]. The electrical features of nanotubes will depend on lattice orientation. Based on
orientation carbon nanotubes may behave either as metals or semiconductors. Carbon nanotubes are
prepared by various processes. Some of them are: arc discharge method, CVD, laser ablation and flame
synthesis.[5] Carbon nanotubes were accidently first discovered by Sumino Iijima, a Japanese scientist
in 1991.Since then CNTs have evoked as a huge amount of interest in their use as basic components
of future integrated circuits. At the rate Moore's Law is going on, by present it gives the transistor size
within few atoms of thickness. we have seen technology running progression from micron, sub-micron
and 45 nm scale. Carbon Nanotubes walls have thickness of 1 atom and diameter of 1-2 nm, which
seems to be perfect material to lead us to end of Moore's law.

VLSI circuits employ copper as interconnects because of its low resistivity. But with
advancements in technology, the size of the chip reduces. It also results in reduction of size of
interconnects, which leads to increase its resistivity and increases current density. CNTs are one of the
best suitable candidates to replace Copper as an interconnect because of their excellent electrical

properties. These include abilities to sustain current density as high as 1010 A/ , which is two to
three times of magnitude order higher than the Cu. carbon nanotubes exhibit ballistic transport through
the length of the tube, which may be solution to the high resistance problem.

Due to the nano dimension size, with lower and high speed advantages, the carbon nanotubes
are predicted to be the best substitution of silicon material in fabricating field effect
transistor.CNTFETs are such a novel transistors that only have very small dimension for building the
logic gates.CNTFETs has been designed using different techniques since last decade. The CNTFET
has many advantages when compared to silicon-based technology.

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 2.History of Carbon Nanotubes

In 1991, Sumio Ijima, a Japanese scientist accidently discovered Carbon nanotubes in NEC laboratory,
when he was using the arc discharge method of carbon synthesis for creating fullerenes. In 1980,
carbon is known to be exists in three forms. They are diamond, graphite and amorphous carbon. But
now, a family of carbon forms exists.

In 1985, scientists named Kroto, Smalley and Curl discovered new material fullerenes by
finding strange results during evaporation carbon samples. Fullerene’s are one of the carbon allotropes.
These discoveries made that carbon can form ordered structures which are stable other than graphite.
As a result, researchers started to find other carbon forms. During arc discharge experiments, Smalley
has found that the carbon atoms can self-assemble themselves automatically into molecules of certain
shapes, such as the C60 molecule. In this, carbon molecules are organized in the ball shape like soccer.
However, during unlike experimental conditions, Sumio Ijima has discovered CNT related fullerenes
in 1991.

3.Classifications of Carbon Nanotubes

Carbon nanotubes are formed by wrapping of graphene sheet, which is single layer of hexagonal
carbon lattice[4]. Carbon nanotubes are classified into two types. They are:1) Single-walled carbon
nanotubes (SWCNTs) and 2) Multi-walled carbon nanotubes (MWCNTs).

FIG 1. wrapping of graphene sheet to form carbon nanotube

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3.1.a Single-walled carbon nanotubes:[1]

In SWCNTs, the cylindrical structure consists of a single thin sheet of graphene. Most SWCNTs have
diameter almost equal to 1nm. SWCNTs, can be found in distinct designs. They are: Armchair, Zigzag
and Chiral. The design is determined by the way how the graphene is rolled into a cylinder. The
direction in which they are rolled is known as chirality. A single-walled nanotube’s shape can be
represented by chiral vector (n, m). On the basis of inclination of the nanotube axis with relative to the
hexagonal mesh of graphene, carbon nanotubes can exhibit semiconducting or metallic behaviour.
Based upon the chirality there exists three types of nanotubes. They are named as armchair, chiral and
zigzag.

FIG 2. Chirality and geometry of CNTs and their associated configurations

3.1.b.Multi-walled carbon nanotubes:

MWCNTs has multiple rolled layers of graphene. MWCNTs have almost similar features as SWCNTs.
The interior CNTs are protected by the exterior walls of multi-walled nanotubes from interactions with
outside materials. MWCNTs have larger tensile strength when compared with SWCNTs.

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 There exists two models for describing the structure of MWCNTs. The first one is Parchment
model type and the other one is Russian Doll Model. They also both differ by how nanotubes are
arranged.

3.2.a. Parchment model:

In this model, a single thick sheet of graphene is wrapped around itself number of times as shown in
following figure 3.a.

Fig 3.a. Parchment model b. Russian Doll Model

3.2.b. Russian Doll Model:

In this model, a CNT has further nanotubes inside it as shown in figure 3.b. The interior nanotube
will have less diameter compared to the exterior nanotube.

4.Properties of Carbon Nanotubes

Thermal Properties:

The bonds between atoms present in carbon nanotubes has high strength which provides them to resist
high temperatures. So, CNTs can act as good thermal conductors. CNTs can pass over 15 times the
quantity of power per meter when contrasted to copper(cu) wires. This properties of CNTs will be
dependent on the exterior environment and temperature present in the tubes.

Electrical Properties:

CNTs conductivity will depend on shape of the carbon nanotubes. If the alignment of atoms reduces
the collisions between atoms and conduction electrons, a carbon nanotube is said to be highly

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conductive. The bonds present in carbon atoms are strong which allows them to resist high electric
currents compared to copper(cu). The transport of electron occurs across the tube axis. SWCNTs are
capable of passing electrical currents at a speed of 10 GHz in semi-conducting devices when used as
interconnect materials.[6] [7]

Mechanical Properties:

Carbon nanotubes tensile strength is greater than Kevlar and steel. These strengths are due to sp² bonds
present between each carbon atoms. These bonds are highly stronger than sp³ bonds which are present
in diamond. The nanotube strengths are debilitated by defects present in the nanotube structure.
Defects occur due to vacancies of atom or rearrangement in the bonds between carbon atoms. Defects
present in the structure will make a smallest segment in the nanotube to be weaker, which makes the
tensile strength of total nanotube to weak. The nanotube tensile strength will depend on the strength
of weakest part inside the tube. CNTS are strong as well as elastic. The nanotubes can also be bend by
applying force on the tip of the nanotube without damaging the nanotube. When the applied force is
taken out, the nanotube will get back to its original shape. Its elasticity has a certain limit. If stronger
forces are applied, it permanently deforms the shape of a nanotube.

5.INTERCONNECTS

In the past history of ICs, interconnects do not have much significance. But this conditions for
interconnects has completely changed due to the initiation of deep submicron technologies. At
beginning, gate delay has much importance than compared to interconnect delay. But with the
advancements in technology as the size of the chip reduces, the interconnects delay is becoming more
significant as compared to delay of the gate. This happens because at higher frequencies, no longer
interconnects behaves as simple resistor but also behaves as associated inductance and capacitance.
There are three categories into which interconnects are divided based on the wire length. They are
local, global and semiglobal at device level. For small distance connections Local interconnects are
used. In order to join lengthy interconnects between the blocks which includes clocks, power and
ground, global interconnects are used. To connect devices inside a block, semiglobal interconnects are
used. An integrated chip is generally characterized by the parameters such as parasitic resistance,
inductance and capacitance.

Interconnects are the metallic compounds which are required by the chip manufacturers to
interconnect the transistors in chips. Earlier, Aluminium used as a chips interconnect material for

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several semiconducting devices. But for technologies below submicron, aluminium started to cause
signal delay which also affected the reliability of the integrated circuit.

The delay of interconnects is affected by capacitive and resistive part. Various alternatives to
aluminium were taken into consideration in 1990s to reduce the RC delay caused by aluminium.
Silver, gold and copper were found the most appropriate interconnect material which could replace
aluminium due to their low electrical resistivity. Though gold has high resistance to electromigration
but it also creates deep levels in band gap. This is because of diffusion in silicon which affects the
device electronic properties. Silver also diffuses in 𝑆𝑖𝑂2 and deep levels are created in band gap.
Silver melting point is very low. As a result, it has lower resistance to electromigration. Compared to
Aluminium, copper has half the resistivity. Aluminium's melting point is 933K, whereas melting
point of copper is 1357K.So copper has the advantage in electron migration problem compared to
Aluminium. At present, copper is broadly used as on chip interconnects for advanced integrated
circuits.

CHALLENGES FOR COPPER INTERCONNECTS:[1]

As the size of the chip reduces and to include more frequencies for integrated circuits, the circuit
requires lower resistance and higher bandwidth. These two requirements have become major
problem for interconnects.

Due to advancements in scaling, power dissipation and delay problems are faced by copper
interconnects. Even highspeed interconnects are not satisfied by copper interconnects. At high
frequencies, various problems are faced by copper such as electromigration, skin effect, signal
degradation and dispersion. VLSI circuits employ copper (Cu) material as an interconnect because it
has low resistivity. A continuing shrinkage in the dimensions of VLSIs, however, is causing increase
in the current density in the Cu interconnect, and this makes the Cu interconnect unreliable due to
electromigration problems.

FUTURE INTERCONNECTS: CARBON NANOTUBES

CNTs have some special properties which helps to overcome the major interconnect challenges. CNTs
are one of the best suitable candidates to replace copper as an interconnect because of their high
electrical conductivity, high thermal and mechanical stability and large electron free mean path.
Copper have current density of 106 A/𝑐𝑚2 .CNTs can sustain current densities up to 1010 A/𝑐𝑚2 which
is two to three orders of magnitudes higher than the copper. Also, conventional copper vias need a

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barrier layer, which results in an increase in resistance and in process complexity. CNT vias do not
need sidewall barrier layers. The more CNTs that are in a via hole, the lower the resistance is. CNTs
has thermal conductivity of 5800W/mK which is very high and current carrying ability up to
1014 A/𝑚2 which makes CNTs most attractive material for interconnects. In carbon nanotubes, ballistic
flow of electron takes place even when the length of conductor is less than electron mean free path.
This makes the CNTs more reliable compared with other interconnects.

6.CARBON NANOTUBE FIELD EFFECT TRANSISTOR(CNTFET)

Nano size carbon, such as carbon nanotubes and graphene have remarkable electronic properties for
high-frequency electronics in terms of designing VLSI circuits. CNTFETs are the best candidates for
Nano electronics as well as upcoming digital devices in near future. The nanotube has semiconducting
properties which contributes in large number of electronics devices production such as film transistors,
sensors, displays and solar cells. Therefore, carbon nanotubes become future research to the scientist
by developing the field effect transistor.
With the continuous scaling of CMOS technology deeper in nano range leads to numerous
difficulties and critical challenges. Some of them are higher power densities, short channel effects are
increased and exponential rise in leakage currents. It also results in reduced gate control and severe
process variations. This possibly prevents the continuous improvements in performance and figure of
merit for low power operations. Implementation of circuit using new materials, devices technology
and logic styles give different performance aspects. As we are progressing into nanotechnology era,
certain new device technologies are becoming most promising alternatives to the existing CMOS
technology, such as single electron transistor, carbon nanotube field-effect transistor (CNFET), Double
Gate (DG) FinFET. CNFET and Double gate FinFET transistors are evolving rapidly.it is expected
that these devices will replace the existing bulk CMOS technology in the future.
Among the emerging technologies, CNFET is one of the most promising devices. The
CNTFET has many advantages when compared to silicon-based technology. Its operation principles
and device structure are in accordance to the silicon-based CMOS technology. However, on account
of the resemblances between CNFET and MOSFET devices in terms of intrinsic attributes and also
due to unique one-dimensional band structure of CNFET, which suppresses back scattering and causes
near ballistic operation. CNFET could be more achievable and promising, in comparison with the other
nanotechnology. In general, CNFETs operate at high speed and consume low power, compared to bulk
silicon transistors.

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 They are also more suitable for high-frequency and low-voltage applications. Unlike MOS
devices, in CNFET technology P-CNFET and N-CNFET devices with same sizes will have same
mobilities. As a result, they have same current driving capability, which is very essential for transistor
sizing of complex circuits.[2]

Classifications of CNTFETS:
Based on geometry, CNTFETs are classified into three types namely Back-gated CNTFET, Top
gated CNTFET and Wrap around gate CNTFET.

1.Back-gated CNTFET:

Majority of the early CNFET devices were back-gated. In these technique, parallel strips of metal were
pre-patterned across a 𝑠𝑖𝑜2 substrate. Then Carbon nanotubes are deposited on top of it through a
random patterning process. The semiconducting CNTs which are placed across two parallel metal
strips will meet all the necessary requirements for a basic FET. Among the two parallel metallic strips,
one contact is for source and another contact is for drain.𝑆𝑖𝑂2 substrate can be acted as gate oxide. If
a metallic contact is added on back, it will make the semiconducting CNT as gate-able. In this
technique, gate insulators which are very thick and made of 𝑠𝑖𝑜2 approximately around 100-150nm
is used.

FIG 4. Schematic cross section of Back-gated CNTFET

Several drawbacks were found in this technique. Firstly, the metal contacts, which had a very
small contact with the CNT because the nanotubes will lay just top of it. As a result, contact area will
be very small. Also contact resistance is increased because a Schottky barrier is formed at the
semiconductor-metal interface since CNT has a semiconducting nature. Geometry of back-gate device
results in another drawback. Due to its thickness, it became difficult to transition the devices from off
and on using low voltages.

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2.Top gated CNTFET:

In order to improve the performance over back gated CNTFET, top-gated CNTFET is introduced. In
the fabrication of top gated CNTFET process, firstly SWCNT solution is deposited on the
𝑠𝑖𝑜2 substrate. Atomic force microscopy method is used for identifying the single carbon nanotubes.
After the isolation of individual carbon nanotubes, defining of drain and source contacts are performed
and patterned using high resolution electron beam method. Annealing step is performed at high
temperature to reduce contact resistance between the CNT and contacts through improving adhesion.
Either through atomic layer deposition or evaporation, a thin gate dielectric is deposited on top of the
CNT. At last, on top of the gate dielectric, gate contact is deposited.

FIG 5. Schematic cross section of Top-gated CNTFET

A number of top gated CNFETs can be prepared on the same wafer. In top gated CNTFET the
gate contacts are electrically secluded from one other, which is not possible in case of back-gated
CNTFET. Gate dielectric is very thin because of that, a large electric field is generated using a less
gate voltage. The electrical field is increased due to the device geometry and contact resistance is
reduced by choosing a suitable of contact material. Besides, the threshold voltage is significantly lower
than back-gated structure, drive current is much higher and transconductance is similarly high. Due to
these advantages, top-gated CNTFET are normally chosen over back-gated CNTFETs.

3.Wrap-around gate CNTFETs

These type of CNTFETs can also be known as gate-all-around CNTFETs. In 2008, they were
developed. They are further improvement on the top-gated CNTFET geometry. In this type of
CNTFET, the whole circumference of nanotube will be gated, whereas in top gated CNTFET the
segment of CNT which is close to the metal gate contact is gated. This will improve electrical behavior
of CNTFET by enhancing the device on/off ratio and reduces leakage current.

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 FIG 6. Wrap-around gate CNTFETs

In the fabrication of device, firstly CNTS are wrapped inside a gate dielectric material and then
in gate contacts by atomic layer deposition technique. These wrappings are incised off partially, for
exposing the nanotube ends. These wrapped CNTS are deposited on insulating substrate. At CNT ends,
drain and source contacts were deposited along with wrapping of metallic outer gate.

Based on operation, CNTFETs are further classified as SB CNTFET and MOSFET like CNTFET.[11]

1.SB-CNFET:

Normally, a potential barrier known by Schottky barrier (SB) is present at every contact between metal
and semiconductor. The height of the barrier can be determined by filling of metal gap induced states.
These states become available in semiconductor energy gap due to interface formed with the metal.
The SB is controlled by difference of the local work functions of the metal and the carbon nano-tube.
As this device uses metal as its drain/source terminals and contains Schottky barrier at its terminal
contact between nanotube and metal, it is called Schottky-barrier CNFET(SB-CNFET). [9]

FIG 7. Schematic of SB CNTFET

This works on principle of a direct tunnelling along Schottky barrier present at the source-
channel junction. Gate voltage controls the barrier width. Therefore, transconductance of device

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depends on gate voltage. when gate voltage is low, large barrier limits current in channel. As gate
voltage increases, the barrier width is decreased which in turn increases the quantum mechanical
tunnelling along the barrier. Therefore, current flow increases in transistor channel. In this, the
operation of transistor occurs by process of modulating device transmission coefficient. SB-CNFET
shows very strong ambipolar conduction particularly when the thickness of gate oxide is reduced,
even there is no Schottky barrier. This type of conduction causes leakage current to increase
exponentially with supply voltage specially when the nanotube diameter is large, which results in
limiting device potential. Thus, ambipolar conduction must be reduced for improving the
performance of SB-CNFET.[3]

2. MOSFET –like CNTFET:

The other type of CNTFET is MOSFET-like CNTFETS. In this, drain and source are doped with
impurities of positive type. so, a junction between drain, source is semiconductor-semiconductor type
and channel is formed. The junction between source and channel is not Schottky barrier. Hence,
MOSFET-like CNTFETS has high On-current. In this, the ratio of Ion/Ioff is very high. The amount
of charge carriers induced in channel due to gate terminal are controls the gate drain current. This
device can suppress ambipolar conduction present in SB-CNFET. Parasitic capacitance between gate
and source terminal is greatly reduced and thus allows faster operation.It operates like SB-CNFET
with negative Schottky barrier height in on-state condition and thus it delivers higher on-current when
compared to SB-CNFET.

FIG 8. Schematic of MOSFET like CNTFET

This type of CNTFETs have following advantages compared to SB-CNTFETs:
1.It has unipolar characteristics. As a result, they are faster.
2.There will be reduction of leakage current in off state due to absence of Schottky barrier.
3.Scalability is greater.
4.It also provides longer channel length limit because the density of metal-induced gap-states is
significantly reduced.

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 When gate oxide is thin, SB-CNTFET transistor shows strong ambipolar characteristics. This
situation results in high leakage currents in the transistor that limits the device performance. Hence,
another type operation named MOSFET-like CNTFET comes to overcome the handicapped in SB-
CNFET. It reduces leakage current in the transistor, suppresses ambipolar characteristic and reduces
the parasitic capacitance to get faster operation.[11]

P-type versus N-type CNFTET

Typically, CNTFETs are p-type, which means they are conducting current in the channel when applied
gate voltage is negative. For p-type operation, when negative gate voltage is given, it will conduct
current in the channel from source to drain and this current is due to holes movement. In opposite, an
n-type CNTFET conducts whenever a gate voltage is biased at positive potential, which is the current
flow in the channel from source to drain which is due to the conduction of electrons. In short, CNTFET
delivers current either a negative or positive gate potential is applied. This characteristic, allowing both
holes and electrons conduction in the same device, is called ambipolar characteristic. Thus, CNTFET
is an ambipolar device since it conducts current either in negative or positive supply voltage.
Normally, when CNT is used to produce CNTFET without further processing of any, then the
devices are invariably p-type. Thus, in order to produce n-type CNTFET, another process is needed.
There are two ways of producing n-type CNTFET from p-type CNTFET. The conversion process is
possible either by annealing or doping process.
Annealing is a process of converting p-type CNTFET into n-type CNTFET through vacuum
annealing. In this process, p-type CNTFET is heated under vacuum to desorb any adsorbed gas such
as oxygen and at the end of this process, the p-type CNTFET is converted into n-type CNTFET. This
conversion process is reversible because if n-type CNTFET is exposed to air, the device will return to
its original p-type characteristic.
Another process is called doping process, the p-type CNTFET which is doped using electron
donors such as alkali metals is depicted. Alkali metals, such as potassium, will give the same result as
in annealing process with p type CNTFET which is transformed into n-type CNTFET. Conversion
process from p-type to n-type and vice versa is very important specially to develop nanotube
complementary logic circuits. Since n-type and p-type CNTFETs are needed to build complementary
logic circuits, thus this conversion process gives a solution to build nanotube-based logic circuit.
The ability to make both p-type and n-type CNTFETs enabled the first carbon nanotube CMOS
circuits. These were explained by Derycke et al (2002). He built simple CMOS logic gates, including

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inverter in which the two CNFETs were fabricated using a single carbon nanotube. Later on, more
complex CNT-based circuits have been built.

Parameters of CNTFET:
Size of CNFET:

Pitch is defined as a distance present between the two adjacent SWCNTs centres under same gate of
CNFET.it directly impacts the gate width and device contacts. The CNFET total size is found by the
gate width. The pitch is useful in determining the gate width. If N is number of carbon tubes and 𝑊𝑚𝑖𝑛
is the minimum gate width, then gate width can be approximated as

𝑊𝑔 = 𝑀𝑎𝑥(𝑊𝑚𝑖𝑛 , 𝑁 ∗ 𝑃𝑖𝑡𝑐ℎ)

Threshold Voltage:
In order to design the circuit with better performance it is essential to determine threshold voltage
because it affects the current, switching speed and leakage power. Alike MOSFET devices, CNFETs
also has threshold voltage which is necessary to turn ON the devices. In CNFETs, by modifying the
CNTs diameter, the threshold voltage can be adjusted. This makes CNFETs more pliable than
MOSFETs in designing the digital circuits. It is useful for designing multi-threshold circuits.

𝑎 ∗ √𝑛2 + 𝑚2 + 𝑛𝑚
𝐷𝐶𝑁𝑇 =
𝜋

Where a = 2.49 𝐴° is the lattice constant. By varying the diameter of CNT, the threshold voltage
can be modified and is given by

0.43
𝑣𝑡ℎ =
𝐷𝐶𝑁𝑇 (𝑛𝑚)

The threshold (Vth) is found by the diameter of CNT and is constant for a given diameter.

Subthreshold Slope:

It is significant parameter which shows the relation between gate voltage and subthreshold leakage
currents. It is quantity of 𝑉𝑔𝑠 that is needed to vary the subthreshold currents by magnitude of an order.
A small subthreshold slope is preferred to choose for getting high ON current for the given value of
OFF current. It is expressed as the following equation.

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 −1
𝑑(𝑙𝑜𝑔10 𝐼𝑠𝑢𝑏 )
𝑠=[ ]
𝑑𝑉𝑔𝑠

Theoretically, the value of 𝑠 is limited to 60 mV/decade at 300K.

Transconductance:
It is a function of geometry of a device along with the carrier mobility and threshold voltage. If the
CNTFET transconductance is 𝑔𝑚 ,then it can be obtained as the following equation
𝐶𝑔𝑔
𝜇( )
𝐿
𝑔𝑚 =
𝑉
( 𝑑𝑠 )
𝐿
Where 𝐶𝑔𝑔 is the gate capacitance, 𝜇 is the carrier mobility and 𝐿 is the length of the gate. It
can be seen that higher the capacitance of gate and carrier mobility the transconductance will be
greater. For CNTFET, 𝐿 and 𝜇 are fixed and the capacitance of gate is given by

2𝜋𝐾𝜖𝑜
𝐶𝑔𝑔 = 4𝑡
𝑙𝑛( )
𝑑

Where d is CNT diameter, t is thickness of the dielectric. In case of top or bottom gated
CNTFET, because of the highly dielectric nature the value of 𝐾 will be higher. Higher the value of 𝐾
increases the gate capacitance, which in turn increases the transconductance. [10]
Advantages:
Carbon nanotubes are very small and has less weight which makes it easy to replace metallic wires.
Resources necessary to produce CNTs are plenty and most of them are made with small amount of
material. They have better control over formation of channel. Carbon nano tubes has several
advantages. Some of the advantages of Carbon nanotubes are:
1. High transconductance
2. High electron mobility
3. High threshold voltage
4. Better current density
5. Better subthreshold slope
6.High tensile strength.
7. Works at high temperatures
8. Greater power handling capacity

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Disadvantages:

Lifetime:

When CNTs are exposed to oxygen, they get degraded in few days.so for the purpose of increasing the
lifetime, nanotubes are passivated with different type of polymers.

Reliability:

When CNTs are operated in presence of high electric field, they exhibit some reliability issues. In
order to overcome reliability issues, multi channelled structures are used. Multi channelled CNTFETs
gives stable performance. Even when few of the channels undergoes break down, the operation takes
place due to multi-channeled CNTFETs with a small change in electrical properties.

Mass production difficulties:

Even though CNTs have special properties like tenacity, stiffness and strength as compared to
silicon, but for producing in mass quantity, technology is not available at present.

7.FUTURE SCOPE:

There are few challenges faced during developing of nanotubes in structures and functional devices.
Firstly, the nanotubes are grown in a similar mechanism to that of fullerenes. So, it is not possible to
produce nanotubes in a controlled manner. In general, electronic applications depend upon the
nanotubes structure. Due to its inability to choose the size and nanotubes growth helicity, it results in
drawback in electronic applications. At present, there is no techniques for producing nanotubes of
desired purity. There is much about carbon nanotubes that is still to be known. More researches need
to be done regarding the health and environmental impacts of producing large quantities of them. At
present carbon nanotubes are expensive. In order to produce them in mass quantity at cheaper rate and
incorporate with other type of materials, there is more work to do. In future, CNTs will play a important
role in large range of applications

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8.SUMMARY

Due to the nano dimension size, with lower and high speed advantages, the carbon nanotubes are
predicted to be the best substitution of silicon material in fabricating field effect transistor. CNTFETs
are such a novel transistors that only have very small dimension for building the logic gates.CNTFETs
has been designed using different techniques.

CNTFETs exhibit different characteristics when compared with MOSFETs regarding their
performances. When compared with the performance of Silicon PMOSFET, a CNTFET has very high
transconductance. For semiconducting Carbon nanotubes, the temperature rise will have relatively less
effect on the I-V characteristics compared to silicon. At an overdrive voltage of 1V, CNTFETs can
deliver drive currents almost 3 to 4 times greater than the Si MOSFETs. In CNTFET, average velocity
of carriers will be about twice the MOSFETs. CNTFETs has advantage of on current conduction. This
is because of either enhanced channel transport or due to high capacitance of gate. Because of high
dielectric material, the mobility of carriers increases in CNTFET and dimension of channel decreases
rigorously. This special property makes CNTFETs more satisfactory in the nano-electronic devices
than MOSFETs.

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 9.REFERNECES

[1]. K. Banerjee and N. Srivastava, "Are carbon nanotubes the future of VLSI interconnections?" 2006
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[2]. S. Farhana and M. F. Noordin, "Technology and performance: Carbon nanotube (CNT) field effect
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