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Article in Proceedings of SPIE - The International Society for Optical Engineering · April 2008
DOI: 10.1117/12.771983
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ABSTRACT
Extreme Ultraviolet Lithography (EUVL) is the leading candidate beyond 32nm half-pitch device manufacturing.
Having completed the installation of the ASML EUV full-field scanner, IMEC has a fully-integrated 300mm
EUVL process line. Our current focus is on satisfying the specifications to produce real devices in our facilities.
This paper reports on the imaging fingerprint of the EUV Alpha Demo Tool (ADT), detailing resolution, imaging,
and overlay performance. Particular emphasis is given to small pitch contact holes, which are a critical layer for
advanced manufacturing nodes and one of the most likely layers where EUVL may take over from 193nm
lithography. Imaging of contact holes, pattern transfer and successful printing of the contact hole level on a 32nm
SRAM device is demonstrated. The impact of flare and shadowing on EUV ADT performance is characterized
experimentally, enabling the implementation of appropriate mitigation strategies.
Keywords: EUV lithography, shadowing, flare.
1. INTRODUCTION
There is widespread industry consensus that Extreme Ultraviolet Lithography (EUVL) is the leading candidate
beyond the 32 nm node. By installing an ASML EUV full-field scanner [1-3], IMEC now has a fully-integrated,
300mm process line capable of properly investigating EUVL readiness for high-volume manufacturing (HVM).
The EUVL program at IMEC is aimed to tackle the open issues of EUV lithography. EUV resists have to
simultaneously satisfy resolution, sensitivity, and LER specifications (as well as meeting new outgassing
qualification specifications). Topics such as flare (caused by light scattered from roughness in the optics) and
shadowing (a consequence of the surface topography of multilayer masks) are now added to the list of the
development requirements in need of understanding, quantification and ultimately mitigation.
The EUV ADT is specified for 40nm half pitch resolution, 30nm isolated lines and 55nm contact holes. This paper
reports on the imaging fingerprint of the EUV ADT, detailing resolution, imaging, and overlay performance. Both
imaging and pattern transfer are demonstrated for contact holes. In addition, this work characterizes experimentally
the impact of flare and shadowing on EUV ADT performance.
2. EXPERIMENTAL CONDITIONS
Wafers were exposed on the EUV ADT from ASML with a numerical aperture (NA) of 0.25 and a partial
coherence (σ) of 0.5. For resist processing, a TEL CLEAN-ACT12 track was used. Two different resist processes
were used for imaging: the Fuji FEVS-P1101 was used with a thickness of 80 nm and the Rohm&Haas XP5271I
(MET2D) was used with a 90 nm thickness. For the Kirk test, the Rohm&Haas XP4502J 150nm thick was used. A
surfactant containing developer (Optiyield) was used. Process conditions for all resists can be found inTable 1.
Top-down CD SEM metrology was done using the Hitachi H-9380 and Hitachi CG4000 with a 70% threshold for
lines/spaces and 30% threshold for contact holes. X-sections were made using the FEI Nova NanoSEM 200. For
overlay metrology, a KLA-Tencor ArcherAIM was used.
fr
• CD DL = 38.0nm CD DL = 36.1nm CD DL = 30nm
CD ISO = 34.1nm CD ISO = 30.4nm CD ISO = 21.5nm
Fig. 1: Resolution of line / space down to 32nm. Both horizontal and vertical features are printed, as well as isolated
and dense lines
50
Measured CD (nm)
45
40
35
30
80 110 140 170 200 230
Pitch (nm)
Fig. 2: CD through pitch curve for 40nm CD.
Process latitudes have been measured for 40nm line /space. Exposure latitude of 14.9% and focus latitude larger
than 240nm were obtained for the Rohm&Haas XP5271 (MET2D) resist. Fig. 3 illustrates the 40nm L/S through
focus.
[11411111 I'tIt.ItIjI.
1-
arrr
F = BF - 80nm II&IiItI,I$p1l
F = BF – 40nm F = Best Focus ITIi1!II I ll'Hi
F = BF + 40nm F = BF + 80nm
46
42
CD (nm)
38
34
30
-0.10 0.00 0.10 0.20 0.30
Focus ( µm)
Fig. 3: 40nm dense lines through focus in MET-2D resist (top), and plot of CD through focus (bottom) indicating a
focus latitude of 240nm.
00 ¼)') '-'
Sdooo 00000 )0000°
(3 40nm
T'i1!ss,
.71
55nm 50nm 45nm 35nm
)000C
-' -)0000 0000 00000
ocoC o000 000S• Q0000
)00000
. o0000
E=18.5 mJ/cm2 E=18.5 mJ/cm2 E=20.5 mJ/cm2 )Q0000
E=24.5mJ/cm 2
E=32.5mJ/cm2
Fig. 4: Resolution of contact holes down to 35nm in Rohm&Haas XP5271I (top) and in Fuji FEVS-P1101 (bottom).
As in the case of line / space, contact hole are not affected by proximity, as shown in Fig. 5 for 45nm features. The
resist used is the Fuji FEVS-P1101 with thickness of 80nm. The exposure was performed at best focus, with a dose
of 22.5 mJ/cm2. The CD measured is reported on the pictures.
Fig. 6: Contact holes images indicating focus latitude larger than 200nm.
43
39
37
35
-0.20 -0.10 0.00 0.10 0.00 0.05 0.10 0.15 0.20
Fig. 7: Experimental focus latitude (left) and simulated process window (right) for 40nm contact holes indicating a
focus latitude larger than 200nm.
Fig. 8 shows cross section for isolated 40nm contact hole through focus, clearly indicating that the contact holes
are indeed open through the wide focus latitude of at least 200nm. . In this case the resist used is the Fuji FEVS-
P1101 with a thickness of 80nm. The exposure was performed with a dose of 24.5 mJ/cm2
- cr
a BF – 120nm WV
9.
BF – 80nm
——
BF – 40nm w—
Best Focus ..
BF + 40nm
110
50nm
100 60nm
70nm
90 80nm
90nm
80 100nm
CD (nm)
70
60
SIMULATION 60nm
50
SIMULATION 50nm
40
30
20
0 2 4 6 8 10
∆ Flare (%)
10 10
V-H simulation V-H experiment
45-135 simulation 45-135 experiment
Bias (nm)
Bias (nm)
0 0
-10 -10
-20 -10 0 10 20 -20 -10 0 10 20
Slit Position (au)
(mm) Slit Position (mm)
•iuI
.
.
III.
Fig. 13. 32nm SRAM design (left), simulation in resist (center) and results after litho (right).
Pattern transfer in a TiN hard mask was successfully carried out using the 80nm resist thickness as well as
subsequent transfer into the PMD (pre-metal dielectric) oxide layer. In Fig. 14, the top/down pictures after litho
and after pattern transfer into respectively hard mask and oxide layer are shown as a function of exposure dose.
Fig. 15 illustrates the contact hole in X-section after the full stack etch. These results clearly indicate the potential
of EUVL.
Litho
After
Hard Mask
etch
After Oxide
etch
Fig. 14: Pattern transfer and process latitude for 32nm SRAM cell.
Fig. 15: X-sectional photo of contact hole after pattern transfer in the oxide layer.
7. CONCLUSIONS
It has been demonstrated that EUV lithography can easily perform down to a resolution of 35nm for lines and
spaces, as well as for contact holes on the ASML ADT and with the current resist materials. A wide process
latitude, as well as good linearity and weak influence of proximity effects were observed. Numerical prediction in
terms of flare and shadowing were confirmed, thus enabling the implementation of the appropriate corrective
actions. The preliminary results on 32nm SRAM device development indicate good transfer pattern, acceptable
overlay and above all high quality imaging without OPC.
8. ACKNOWLEDGEMENTS
We acknowledge the ASML EUV alpha demo tool team (especially Bill Pierson, Brian Lee, Bart Kessels, Jim
Waddell, Richard Gutierrez, Emil Schmitt-Weaver, Sander Bouten, Sang In Han, Joerg Mallmann, Judy Galloway,
Michael Crouse, Robert Routh, John Zimmerman, Leon Romijn, Rick Zachgo, Brian Niekrewicz and Jim
Weidman, Youri van Dommelen, Gerrit Kremer) for their vast share in the experimental printing work on the
ADT. We thank the EUV management team at ASML (Hans Meiling, Noreen Harned, Len Pearce, Kevin
Cummings, Bas Hultermans, Ron Kool) for their driving enthusiasm towards production-ready maturity of EUV
lithography. CNSE/AMD/IBM at Albany (especially Michael Tittnich, Obert Wood, David Medeiros) is gratefully
acknowledged for ADT tool access, collaboration and constructive discussions. Sematech has been very supportive
in providing CD SEM access in Albany. and TEL for providing track support. The Hitachi CD-SEM team at IMEC
(Toru Ishimoto, Mayuka Iwasaki and Kohei Sekiguchi) is acknowledged for the support in the automated
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