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fsdm0465rs 1192317
fsdm0465rs 1192317
April 2009
FSDM0465RS
Green Mode Fairchild Power Switch (FPS™)
Features Description
! Internal Avalanche Rugged SenseFET The FSDM0465RS is an integrated Pulse-Width
! Advanced Burst-Mode Operation Consumes Modulator (PWM) and SenseFET specifically designed
under 1W at 240VAC and 0.5W Load for high-performance offline Switch Mode Power
! Precision Fixed Operating Frequency: 66kHz Supplies (SMPS) with minimal external components.
The device is an integrated, high-voltage, power-
! Internal Startup Circuit
switching regulator that combines an avalanche rugged
! Improved Pulse-by-Pulse Current Limiting SenseFET with a current mode PWM control block. The
! Over-Voltage Protection (OVP) PWM controller includes integrated fixed-frequency
! Overload Protection (OLP) oscillator, under-voltage lockout, leading-edge blanking
! Internal Thermal Shutdown Function (TSD) (LEB), optimized gate driver, internal soft-start,
temperature-compensated precise-current sources for a
! Abnormal Over-Current Protection (AOCP)
loop compensation and self-protection circuitry.
! Auto-Restart Mode
Compared with a discrete MOSFET and PWM controller
! Under-Voltage Lock Out (UVLO) with Hysteresis solution, it reduces total cost, component count, size and
! Low Operating Current: 2.5mA weight; while increasing efficiency, productivity and system
! Built-in Soft-Start reliability. This device is a basic platform well suited for
cost effective designs of flyback converters.
Applications
! SMPS for LCD Monitor and STB
! Adaptor
Ordering Information
Marking RDS(ON)
Product Number Package Eco Status BVDSS
Code Max.
FSDM0465RSWDTU(1) TO-220F-6L(Forming) RoHS DM0465RS 650V 2.6Ω
Note:
1. WDTU: Forming Type.
AC
IN DC
OUT
Vstr Drain
PWM
FSDM0465RS Rev: 00
Notes:
2. The junction temperature can limit the maximum output power.
3. 230VAC or 100/115VAC with doubler.
4. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.
5. Maximum practical continuous power in an open-frame design at 50°C ambient.
N.C. 5 Istart
0.5/0.7V + Internal
Vref
Bias
8V/12V VCC good
-
VCC Vref
OSC
Idelay IFB PWM
2.5R S Q
FB 4
Gate
R Q
R driver
Soft start
LEB
VSD
VCC
2 GND
S Q
Vovp
FSDM0465RS Rev: 00
TO-220F-6L
6. Vstr
5. N.C.
4. Vfb
3. VCC
2. GND
1. Drain
Pin Definitions
Pin # Name Description
1 Drain SenseFET drain. High-voltage power SenseFET drain connection.
2 GND Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input, providing internal operating current
3 VCC
for both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capac-
4 Vfb
itor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the
overload protection triggers, which shuts down the FPS.
5 N.C. No Connection.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.
At startup, the internal high-voltage current source supplies internal bias and charges the
6 Vstr
external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current
source is disabled. It is not recommended to connect Vstr and Drain together.
Thermal Impedance
TA=25°C, unless otherwise specified.
1.2 1.2
1.0 1.0
0.8 0.8
(Vstart)
(Iop)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Figure 4. Operating Current vs. Temperature Figure 5. Start Threshold Voltage vs. Temperature
1.2 1.2
1.0 1.0
Stop Threshold Voltage
Operating Frequency
0.8 0.8
(Vstop)
(Fosc)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Figure 6. Stop Threshold Voltage vs. Temperature Figure 7. Operating Frequency vs. Temperature
1.2 1.2
1.0 1.0
Maximum Duty Cycle
FB Source Current
0.8 0.8
(Dmax)
(Ifb)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Figure 8. Maximum Duty vs. Temperature Figure 9. Feedback Source Current vs. Temperature
1.2 1.2
1.0 1.0
0.8 0.8
(Idelay)
(Vsd)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Figure 10. Shutdown Feedback Voltage Figure 11. Shutdown Delay Current vs. Temperature
vs. Temperature
1.2 1.2
FB Burst Mode Enable Voltage
1.0 1.0
Over Voltage Protection
0.8 0.8
(Vfbe)
(Vovp)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
Figure 12. Over-Voltage Protection vs. Temperature Figure 13. Burst Mode Enable Voltage
vs. Temperature
1.2 1.2
FB Burst Mode Disable Voltage
1.0 1.0
Peak Current Limit
(Self protection)
0.8 0.8
(Iover)
(Vfbd)
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125
Figure 14. Burst Mode Disable Voltage Figure 15. Current Limit vs. Temperature
vs. Temperature
1.2
1.0
(Normalized to 25°C)
Soft Start Time
0.8
0.6
0.4
0.2
0.0
-50 -25 0 25 50 75 100 125
CB
voltage current source supplies the internal bias and 2.5R
VDC
2.1 Pulse-by-Pulse Current Limit: Because current
mode control is employed, the peak current through the
CVcc SenseFET is limited by the inverting input of PWM
comparator (VFB*) as shown in Figure 18. Assuming that
the 0.9mA current source flows only through the internal
VCC resistor (2.5R + R = 2.8kΩ), the cathode voltage of diode
Vstr
3 6 D2 is about 2.5V. Since D1 is blocked when the feedback
voltage (VFB) exceeds 2.5V, the maximum voltage of the
Istart cathode of D2 is clamped at this voltage, thus clamping
VFB*. Therefore, the peak value of the current through
Vref the SenseFET is limited.
8V/12V VCC good
2.2 Leading-Edge Blanking (LEB): At the instant the
Internal internal SenseFET is turned on, there usually exists a
Bias high-current spike through the SenseFET, caused by
FSDM0465RS Rev: 00 primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the RSENSE
Figure 17. Internal Startup Circuit resistor would lead to incorrect feedback operation in the
current mode PWM control. To counter this effect, the
FSDM0465RS employs a leading edge blanking (LEB)
circuit. This circuit inhibits the PWM comparator for a
2. Feedback Control: FSDM0465RS employs current
short time (tLEB) after the SenseFET is turned on.
mode control, as shown in Figure 18. An opto-coupler
(such as the H11A817A) and shunt regulator (such as
the KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the 3. Protection Circuit: The FSDM0465RS has several
voltage across the RSENSE resistor plus an offset voltage self protective functions such as overload protection
makes it possible to control the switching duty cycle. (OLP), over-voltage protection (OVP) and thermal
When the reference pin voltage of the KA431 exceeds shutdown (TSD). Because these protection circuits are
the internal reference voltage of 2.5V, the H11A817A fully integrated into the IC without external components,
LED current increases, thus pulling down the feedback the reliability is improved without increasing cost. Once
voltage and reducing the duty cycle. This event typically the fault condition occurs, switching is terminated and
happens when the input voltage is increased or the the SenseFET remains off. This causes VCC to fall.
output load is decreased. When VCC reaches the UVLO stop voltage, 8V, the
protection is reset and the internal high-voltage current
source charges the VCC capacitor via the Vstr pin. When
VCC reaches the UVLO start voltage, 12V, the
FSDM0465RS resumes its normal operation. In this
manner, the auto-restart can alternately enable and
Overload protection
Fault
occurs Fault 6.0V
Vds Power
removed
on
2.5V
T12= Cfb*(6.0-2.5)/Idelay
Vcc
T1 T2 t
12V
Figure 20. Overload Protection
8V
OSC
2.5R S Q
R Q
Gate VFB
driver
R
LEB 0.7V
0.5V
FSDM0465RS Rev: 00
Vds
4. Soft-Start: The FSDM0465RS has an internal soft-
start circuit that increases PWM comparator inverting
input voltage together with the SenseFET current slowly
after it starts up. The typical soft-start time is 10ms. The
time
pulse width to the power switching device is Switching Switching
progressively increased to establish the correct working disabled disabled
T4
FSDM0465RS Rev: 00 T1 T2 T3
conditions for transformers, inductors, and capacitors.
The voltage on the output capacitors is progressively Figure 22. Waveforms of Burst Operation
increased with the intention of smoothly establishing the
required output voltage. It helps prevent transformer
saturation and reduces the stress on the secondary
diode during startup.
Features
! High Efficiency (>81% at 85VAC Input)
! Low Zero Load Power Consumption (<300mW at 240VAC Input)
! Low Standby Mode Power Consumption (<800mW at 240VAC Input and 0.3W Load)
! Low Component Count
! Enhanced System Reliability through Various Protection Functions
! Internal Soft-Start (10ms)
C301
LF101 4.7nF
23mH
R201
1kΩ
R101 R204
560kΩ 5.6kΩ
1W R202
R203 C205
1.2kΩ
12kΩ 47nF
IC301
H11A817A
F1 IC201
C101
RT1 FUSE KA431
220nF R205
5D-9 250V
275VAC 5.6kΩ
2A
FSDM0465RS Rev: 00
EER3016
1 10
Np/2 N12V
2 9
Np/2
3 8
4 7
N5V
Na 5 6
FSDM0465RS Rev: 00
3.Winding Specification
4.Electrical Characteristics
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Authorized Distributor
ON Semiconductor:
FSDM0465RSWDTU