11/16/2017 DIGITAL BASIC - 1.

3 : LOGIC GATES (Part - a) |VLSI Concepts

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DIGITAL BASIC - 1.3 : LOGIC GATES (Part - a) 3Ps (Passion, Pati

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Logic Gates
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1.1 1.2 1.3a 1.3b 1.4 1.5 1.6
Number Digital Logic Logic Combinational Multiplex
System Arithmetic Gates Gates Circuits (MUX)

Logic gates are the fundamental building blocks of the digital systems. The name logic gate is derived from the ability of
such a device to make decisions. It produces
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One output level when some combinations of input level are present
A different output level when other combinations of input level are present.

The interconnection of gates to perform a variety of logical operations is called logic design. A logic gate is an electronic circuit with one output and
one or more inputs.
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Inputs and outputs of logic gates can occur only in 2 levels. These 2 levels are termed as
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Level 1 Level 2
Comments
LOW HIGH
FALSE TRUE
OFF ON
0 1

There are two types of logic:

1. Positive Level Logic System: Out of the given two voltage levels, the more positive value is assumed as logic ‘1’
and the other as logic ‘0’.
2. Negative Level Logic System : Out of the given two voltage levels, the more negative value is assumed as logic
‘1’ and the other as logic ‘0’.

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11/16/2017 DIGITAL BASIC - 1.3 : LOGIC GATES (Part - a) |VLSI Concepts

Positive Logic Level Negative Logic Level

Logic ‘0’ Logic ‘1’ Logic ‘0’ Logic ‘1’
0V 5V 5V 0V
-2V +3V +3V -2V
-7V -2V -2V -7V
+2V +7V +7V +2V
Edusaksham
VLSI - Self...
I am not going to describe each and every logic gate in very detail. For detailing purpose, you can refer the any basics books. Here I am going to
summarize most of the basic gates with their Symbol + Truth table + Boolean equation in the form of table. INR 5,750.00

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Boolean Truth table

Logic Gates
Distinctive shape algebra
Type A B Y
(A & B)

0 0 0
0 1 0
AND A.B
1 0 0 Edusaksham
1 1 1 VLSI - Static...
INR 2,300.00

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0 0 0
0 1 1
OR A+B Popular Posts
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NOT A’ 1 0
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"Setup and Hold Tim

Violation" : Static
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0 0 1 Delay - "Wire Load

0 1 1 Model" : Static Timin
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1 0 1 (Part 4c)
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Note 1:

AND, OR and NOT gates are called Basic gates.

NAND and NOR gates are called Universal gates, because, by using only NAND gates or by using only NOR
gates we can realize any gate or any circuit.
Special gates are Exclusive – OR gate and Exclusive – NOR gate.

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11/16/2017 DIGITAL BASIC - 1.3 : LOGIC GATES (Part - a) |VLSI Concepts
Exclusive – NOR (X – NOR) gate is also called inclusive – OR or Gate of Equivalence. Live Traffic Feed
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Note 2 :
Karnataka arrived f
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The circuit, which is working as AND gate with positive level logic system, will work as OR gate with negative "Physical Design
level logic system. Interview Question
The circuit, which is working as OR gate with positive level logic system, will work as AND gate with negative A
1) visitor from San
|VLSI Concepts
level logic system. Francisco,
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The number of rows in the truth table is given by 2n where ‘n’ is the number of inputs to the gate. and viewed "Maxim
The circuit which is behaving as NAND gate with positive level logic system will behave as NOR gate with Clock Frequency :
negative level logic system and vice – versa. Timing Analysis (S
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“The output of AND gate is high if all the input are high”. (or) “The output of AND gate is low if any one input Schenectady,
Concepts" 58 New secs
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“The output of an OR gate is high if any one input is high or all inputs are high”.(or) “The output of an OR gate
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is zero if all the inputs are zeros”. A visitor from Ban
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NOT gate is also called inverter. “The output of a NOT gate is always complement of the input”. Karnataka arrived f
NAND is nothing but AND gate followed by NOT gate. “The output of NAND gate is high if any one input or all vlsi-expert.com and
inputs are low”. viewed ""Example
Setup and Hold tim
NOR is nothing but OR followed by NOT gate. “The output of NOR gate is high if all the inputs are low”. (OR)
Static Timing Anal
“The output of NOR gate is low if any one input is high or all inputs are high”. A visitor from Taip
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Above are the basic details of logic gates with few important points to remember. In the next part we will discuss about the realization of basic ""Examples Of Set
gates using universal gates (NOR/ NAND) gates. also we will discuss about the Inhibit circuits. Hold time" : Static
Timing Analysis (S
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Anonymous April 9, 2014 at 11:26 AM States arrived froma
Concepts" 8 mins
the negative logic level table is same as that of positive logic level table?? expert.com and vie
"Fixing Setup and
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Violation : Static T
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A
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your VLSI June 10, 2014 at 10:52 AM Andhra
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Munish Jain June 9, 2014 at 9:53 PM

sir,
there is a mistake in positive and negative logic table plz correct it if u can,
for others in negative logic just flips the values of logic 0 and logic 1

Reply

Replies

your VLSI June 10, 2014 at 10:53 AM

Thanks for pointing ... Corrected.

Anonymous November 25, 2014 at 9:50 PM

scientist.....

Reply

Anonymous November 25, 2014 at 9:49 PM

scientist

Reply

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