20-10-2009

Introduction
† How systems using binary logic levels make
decisions?
Chapter 3 † Boolean algebra: important to describe,
analyze, design, and to implement digital
Logic Gates and Boolean circuits.
Algebra

Adaptado de : João Carlos Martins Ronald Tocci/Neal Widmer/Gregory

Ronald Tocci/Neal Widmer/Gregory Moss Escola Superiror de Tecnologia e Gestão Moss
Digital Systems: Principles and Applications, 10e Instituto Politécnico de Beja Digital Systems: Principles and
Pearson Education , 2007 2009 Applications, 10e

3-1 Boolean Constants and Variables 3-2 Truth Tables

† Boolean algebra allows only two values: † Boolean variables:
„ 0 and 1. „ Described by letters: A, B

† Logic 0 can be: „ Can take only two values: A = 0 or B = 1

„ false; off; low; no; open switch.
switch † Truth table: describes the relationship between the input
† Logic 1 can be: and output of a logic circuit.
„ true; on; high; yes; closed switch. † The number of entries corresponds to the number of
† Three basic logic operations: inputs:
„ OR „ 2 input table: 22 = 4 entries
„ AND „ 3 input table: 23 = 8 entries
„ NOT.
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„ 4 input table: 24 = 16 entries
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3-2 Truth Tables 3-3 OR Operation With OR Gates

† Examples of truth tables with 2, 3, and 4 inputs: † The Boolean expression for the OR operation is
X=A+B
„ This is read as “x equals A or B.”
„ X = 1 when A = 1 or B = 1.
† Truth table and circuit symbol for a two input OR
gate:

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3-3 OR Operation With OR Gates 3-3 OR Operation With OR Gates

† The OR operation is similar to addition but † There are many examples of applications
when A = 1 and B = 1, the OR operation where an output function is desired when
produces 1 + 1 = 1. one of multiple inputs is activated.
† I the
In h BBoolean
l expression
i
X=1+1+1=1
„ We could say in English that x is true (1) when A
is true (1) OR B is true (1) OR C is true (1).
† An OR gate is a logic circuit that applies the
OR operation upon its inputs
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Temporal OR gate output: 3-4 AND Operations with AND gates

† The Boolean expression for the AND operation is
X=A•B
„ This is read as “x equals A and B.”
„ x = 1 when A = 1 and B = 1.
† Truth
T th table
t bl and
d circuit
i it symbol
b l for
f a two
t input
i t AND gate
t
are shown. Notice the difference between OR and AND
gates.

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3-4 AND Operation With AND Gates Temporal AND output

† The AND operation is similar to multiplication.
† In the Boolean expression
X=A•B•C
X = 1 only when: A = 1, B = 1, and C = 1.
† Three input AND truth table/gate:

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3-5 NOT Operation 3-5 NOT Operation

† The Boolean expression for the NOT † Truth table, symbol, and sample waveform for
operation is the NOT circuit:
X=A
† This is read as:
„ x equals NOT A, or
„ x equals the inverse of A, or
„ x equals the complement of A
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3-6 Describing Logic Circuits Algebraically 3-6 Describing Logic Circuits Algebraically
† The three basic Boolean operations: OR, AND, NOT; † Examples of Boolean expressions for logic
can describe any logic circuit. circuits:
† Operators’ precedence:
„ NOT +
„ AND
„ OR -
† If an expression contains both AND and OR operations,
the AND operations must be performed first
„ If we want to change the operation precedence we can use a
parenthesis in the expression. Ronald Tocci/Neal Widmer/Gregory
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Digital Systems: Principles and
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3-6 Describing Logic Circuits Algebraically

3-6 Describing Logic Circuits Algebraically
† The output of an inverter is equivalent to the
input with a bar over it. Input A through an
inverter equals A.
† Examples
l using
i inverters:
i

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3-7 Evaluating Logic Circuit Outputs 3-7 Evaluating Logic Circuit Outputs
† Rules for evaluating a Boolean expression: † Evaluate Boolean expressions by substituting
1. Perform all inversions of single terms: 0→1; 1→0 values and performing the indicated operations:
2. Perform all operations within parenthesis. A = 0, B = 1, C = 1, and D = 1
3. Perform AND operation before an OR operation x = A BC (A + D)
unless parenthesis indicate otherwise. = 0 ⋅ 1 ⋅ 1 ⋅ (0 + 1)
4. If an expression has a bar over it (operation NOT), = 1 ⋅ 1 ⋅ 1 ⋅ (0 + 1)
perform the operations inside the expression and
= 1 ⋅ 1 ⋅ 1 ⋅ (1)
then invert the result.
= 1 ⋅1 ⋅1 ⋅ 0
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3-8 Implementing Circuits From

3-7 Evaluating Logic Circuit Outputs Boolean Expressions
† Output logic levels can be determined directly from a circuit † It is important to be able to draw a logic circuit from a
diagram. Boolean expression.
† Technicians frequently use this method. † The expression
† The output
p of each gate
g is noted until a final output
p is found. x = A ⋅ B⋅C
could be drawn as a three input AND gate.
Ex.: For: A=0, B=1, C=1 and D=0, what is the digital circuit output? † A more complex example such as

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y = AC + BC + ABC
could be drawn as two 2-input AND gates and one 3-input
AND gate feeding into a 3-input OR gate. Two of the
AND gates have inverted inputs.
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3-8 Implementing Circuits From

Boolean Expressions 3-9 NOR Gates and NAND Gates
† Combine basic AND,
y = AC + BC + ABC OR, and NOT operations.
† The NOR gate is an
inverted OR gate. An
inversion “bubble” is
placed at the output of
the OR gate.
† The Boolean expression
is,
x =A+B
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3-9 NOR Gates and NAND Gates 3-9 NOR Gates and NAND Gates
† The NAND gate is an † The output of NAND and NOR gates may be
inverted AND gate. found by simply determining the output of an
An inversion “bubble” AND or OR gate and inverting it.
i placed
is l d at the
h output † The truth tables for NOR and NAND gates
of the AND gate.
show the complement of truth tables for OR
† The Boolean
and AND gates.
expression is
x = AB
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XOR operation 3-10 Boolean Algebra Theorems

† The XOR operation is useful in many digital •The theorems or laws below may represent an
contexts expression containing more than one variable:
† Boolean expression: x⋅0 = 0 x ⋅1 = x
Y = A⊕B † Truth table:
x⋅x = x x⋅x = 0
= AB + AB A B|A⊕ B
0 0| 0 x +1 = 1 x+x = x
† Logic gate:
0 1 | 0 x+0= x x + x =1
1 0 | 0
1 1 | 0 Ronald Tocci/Neal Widmer/Gregory Moss
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3- 10 Single Variable Theorems 3-10 Boolean Theorems

† Multivariable theorems:
x+ y = y+ x
† Understanding all of the x⋅ y = y⋅ x
Boolean theorems will be x + ( y + z ) = ( x + y) + z = x + y + z
useful in reducing
g
expressions to their x( yz ) = ( xy) z = xyz
simplest form. x( y + z ) = xy + xz
( w + x)( y + z ) = wy + xy + wz + xz
x + xy = x
x + xy = x + y
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x + xy = x + y
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3-11 DeMorgan’s Theorems 3-11 DeMorgan’s Theorems

† When the OR sum of two variables is inverted, it is † A NOR gate is equivalent to an AND gate
equivalent to inverting each variable individually and
ANDing them: with inverted inputs:

x + y = x⋅ y
† When the AND product of two variables is inverted, it is
equivalent to inverting each variable individually and ORing
them: † Alternative symbol for a NOR gate:
x⋅ y = x + y
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3-12 Universality of NAND and NOR Gates

3-11 DeMorgan’s Theorems † NAND or NOR gates can be used to create the three
basic logic expressions:
† NAND gate is equivalent to an OR gate with
inverted inputs:

† Alternative symbol for a NAND gate:

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† This characteristic provides flexibility and is very useful in logic circuit design.

3-12 Universality of NAND and NOR Gates

† NOR gates can be used to create the three basic logic
expressions: 3-13 Alternate Logic-Gate Representations
† To convert a standard symbol to an alternate:
„ Invert each input and output :
† add an inversion bubble where there are none on the
standard
t d d symbolb l
† remove bubbles where they exist on the standard
symbol
„ Change a standard OR gate to and AND gate, or
an AND gate to an OR gate.

† This characteristic provides flexibility and is very useful in logic circuit design. Ronald Tocci/Neal Widmer/Gregory Moss
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3-13 Alternate Logic-Gate Representations

3-13 Alternate Logic-Gate Representations
† The equivalence can be applied to gates with
any number of inputs.
† No standard symbols have bubbles on their
i t All off th
inputs. the alternate
lt t symbols
b l do.
d
† The standard and alternate symbols represent
the same physical circuitry.

Standard symbols Alternative symbols

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3-13 Alternate Logic-Gate Representations 3-14 Which Gate Representation to Use

† Active-high: † Using alternate and standard logic gate
„ an input or output has no inversion bubble. symbols together can make circuit operation
† Active-low: clearer.
„ an input or output has an inversion bubble. † When possible choose gate symbols so that
† An AND gate will produce an active output bubble outputs are connected to bubble input
when all inputs are in their active states. and nonbubble outputs are connected to
† An OR gate will produce an active output nonbubble inputs.
when any input is in an active state.
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3-14 Which Gate Representation to Use 3-15 IEEE/ANSI Standard Logic Symbols
† When a logic signal is in the active state (high † Rectangular symbols represent logic gates and
or low) it is said to be asserted. circuits.
† When a logic signal is in the inactive state † Dependency notation inside symbols show
(hi h or llow)) it iis said
(high id tto bbe unasserted.
t d how output depends on inputs.
† A bar over a signal means asserted (active)
low. † A small triangle replaces the inversion
bubble.
† The absence of a bar over a signal means
asserted (active) high.
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3-15 IEEE/ANSI Standard Logic Symbols 3-16 Summary of Methods to Describe Logic Circuits

† Compare the † The three basic logic functions are AND, OR,
IEEE/ANSI symbols and NOT.
to traditional † Logic functions allow us to represent a
symbols.
b l decision process.
† These symbols are
„ If it is raining OR it looks like rain I will take an
not widely accepted
umbrella.
but may appear in
some schematics. „ If I get paid AND I go to the bank I will have
money to spend.
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Digital Systems: Principles and Digital Systems: Principles and
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3-17 Hardware Description Languages vs. 3-17 Description Languages vs. Programming
Programming Languages Languages
† HDL – Hardware Description Languages † VHDL
allow rigidly defined language to represent „ Developed by DoD (Department of Defense USA)
logic circuits. „ Standardized by IEEE (Institute of Electrical and
Electronic Engineers)
„ AHDL – Altera Hardware Description Language. „ Widely used to translate designs into bit patterns that
„ VHDL – Very High Speed Integrated circuit program actual devices.
Hardware Description Language. † AHDL
„ Developed by Altera
„ Used to configure Altera Programmable Logic Devices
(PLDs)
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3-18 Implementing Logic Circuits With PLDs
† Programmable Logic Devices (PLDs) are devices
that can be configured in many ways to perform
logic functions.
† Internal connections are made electronically to
program devices.
† The hardware description language defines the
connections to be made and is loaded into the device
after translation by a compiler.
3-19 HDL Format and Syntax
† Syntax refers to the order of elements. Languages
that are interpreted by computers must follows strict
rules of syntax.
† Format refers to a definition of inputs,
p , outputs,
p , and
how the output responds to the input (operation).
Inputs and outputs may be called ports.
„ The mode of a port indicates if it is input or output.
„ The type of a port indicates the number of bits and how
they are grouped.

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3-19 HDL Format and Syntax 3-19 HDL Format and Syntax
† Boolean description using AHDL † Boolean Description Using VHDL
† Defines of an AND gate: † Definition of an AND gate:
„ The keyword SUBDESIGN names the circuit block, in this case: „ The keyword ENTITY names the circuit block, in this case:
and_gate
and_gate
„ The input and output definitions are enclosed in parenthesis.
parenthesis
„ The keyword PORT defines the inputs and outputs.
„ Variables are separated by commas and are followed by :INPUT;
„ The keyword ARCHITECTURE
„ The logic section is between the BEGIN and END keywords.
„ Operators are: describes the operation inside the block.
& = AND # = OR „ The BEGIN and END contain a
! = NOT $ = XOR description of the operation

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3-20 Intermediate signals 3-20 Intermediate signals

† Buried nodes or local signals in HDL are reference † VHDL local signals
points inside a circuit block that are not inputs or „ Text after two dashes is for documentation only.
outputs.
„ Keyword SIGNAL defines intermediate signal.
† AHDL local signals
„ Keyword BIT designates the type of signal
„ Comments are enclosed by % characters.
„ Text after two dashes is for documentation only.
„ Keyword VARIABLE defines intermediate signal.
„ Keyword NODE designates the nature of the variable.

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