Professional Documents
Culture Documents
Address bus: 8085 has 16-bit address bus AD0-AD7 and A8-A15. A15-A8, it
carries the most significant 8-bits of memory/IO address.
In this lower address bus is multiplexed with data bus. A8-A15 lines are
unidirectional and AD0-AD7 lines are bidirectional.
Data bus: AD7-AD0, it carries the least significant 8-bit address and data bus.
RD: Read control signal is issued to memory or IO device to read data from it.
This indicates that the selected memory location or I/O device is to be read and that the data bus
is ready for accepting data from the memory or I/O device
WR: Write control signal is issued to memory or IO device to write data into it.
This indicates that the data on the data bus is to be written into the selected memory location or
I/O device.
IO/M: Select memory or an IO device.This status signal indicates that the read / write operation
relates to whether the memory or I/O device.
S1, S0: these are status signals. Depending on the value on these lines, the
type of operation being performed by the processor can be determined. Below
table shows that information.
Power Supply and clock signals:
CLK (out): It is the clock output signal from processor, which can be used to
clock other peripherals in the microprocessor based system.
Reset Signals:
RESET IN: A low signal is applied on this pin; This signal is used to reset the
microprocessor. The program counter inside the microprocessor is set to zero. The buses are
tri-stated.
RESET OUT: when processor is reset, this signal goes high. This pin is
connected to reset input of other peripherals. So when processor is reset,
other peripherals are also reset.
Serial IO lines:
Interrupt Signals:
INTR: They are the signals initiated by an external device to request the microprocessor to do a
particular task or work.
There are five hardware interrupts called,
TRAP
RST 7.5
RST 6.5
RST 5.5
INTA
INTA: On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active
low INTA (Interrupt Acknowledge) signal.
DMA signals:
HOLD: This line is used by DMA controller to request microprocessor for
system bus. When this line goes high microprocessor completes its current
bus cycle and issues system bus to DMA controller.
HLDA: HOLD acknowledging signal. Processor acknowledges DMA request
using this signal.