8085 Microprocessor Architecture

• 8- Bit General purpose Microprocessor

• NMOS, 40 Pin IC, fabricated on single LSI chip
• Require +5V DC power supply, 3MHz Clock speed, 320 ns clock cycle
• Memory addressing capability- 64K

 Block Diagram
 Pin Diagram
Block Diagram
• Timing and Control Unit
• ALU
• Address and Data buses
• Interrupts
• Registers
– Accumulator (8bit) and Flags (S, Z, AC, P, CY)
– General Purpose Registers (B, C, D, E, H, L) (8 bit
each)
– Program Counter and Stack pointer (16 bit)
– Instruction and Temporary Registers (8 bit)
 six general- purpose registers to store 8-bit data; these are identified as B, C, D, E, H,
and L. They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit
operations. The programmer can use these registers to store or copy data into the registers
by using data copy instructions.
•HL pair used as memory pointer, store 16 bit memory address… also used to store one 16
bit operand.

Program Counter (PC):

• This 16-bit register sequencing the execution of instructions. It is a memory pointer.
• The function of the program counter is to point to the memory address of the next
instruction to be executed.
• Hold memory address of the next instruction to be executed.
• When an opcode is being fetched, the program counter is incremented by one to point to
the next memory location.

Stack Pointer (SP):

•The stack pointer is also a 16-bit register. It points to a memory location in R/W memory,
called the stack. Stack is a sequence of memory location defined by the programmer in LIFO
function.
•Sequence of memory locations (stack) used to store/ retrive the content of A, flags, PC,
general purpose registers during execution of program.
• The beginning of the stack (defined at beginning of program) is defined by loading a 16-bit
address in the stack pointer.

Temporary Register:

• It is used to hold the data during the arithmetic and logical operations. It is associated with
ALU.
• It is used to store intermediate results and for intermediate calculations.

Instruction Register:

• When an instruction is fetched from the memory, it is loaded in the instruction register.
• hold opcode of instruction.. being decoded or executed. i.e current instruction

Instruction Decoder:

• It gets the instruction from the instruction register and decodes the instruction. It
identifies the instruction to be performed.
Signal Diagram
Signals can be classified as:

1. Address bus
2. Multiplexed address/ data
bus

3. Control and status signals

4. Interrupt Signals
5. Externally initiated signals
6. Serial input/output signal
7. Power supply
8. Reset and Clock signals
 The Address and Data Busses
• A8-A15 (output)-These are address bus and are used for the most significant bits of the
memory address or 8 bits of I/O address. These 8 signal lines A8 – A15 are unidirectional.

• AD0-AD7 (input/output)- time multiplexed address /data bus that is they serve dual purpose
. The other 8 address bits are multiplexed (time shared) with the 8 data bits.
– So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 both.
• These lines carry the 8 Least significant address bits during the early part (first clock cycle),
then during the late parts (2nd and 3rd clock cycle), they carry the 8 data bits.

Demultiplexing AD7-AD0
– As the AD7– AD0 lines are serving a dual purpose (multiplexed) so, they need to be
demultiplexed to get all the information. In order to separate the address from the data, we
can use a latch (either memory or external latch) to save the value.
– The high order bits of the address remain on the bus for three clock periods. However, the
low order bits remain for only one clock period and they would be lost if they are not saved
externally.
– To make sure we have the entire address for the full three clock cycles, we will use an
external latch to save the value of AD7– AD0 when it is carrying the address bits. We use the
ALE signal to enable this latch.
8085 Pin Diagram
 PIN DESCRIPTION OF 8085
Control Signals: Three control signal, all are output signals.

ALE (output)- address latch enable signal.

Active high → It goes high during first clock cycle of a machine cycle and enables the lower 8
bits of the address to be stored in the latch.

(output)-it is a signal to control READ operation.

Active low → when it goes low – read operation has performed from selected memory or I/O
device.
i.e. data is available on data bus.

(output)-it is a signal to control WRITE operation.

Active low → when it goes low write operation has performed..i.e. data on the data bus is
written into the selected memory or I/O operation.

Status Signals: three signals, all output type. , IO/

, (output)-these are status signal sent by the microprocessor to distinguish the various types
of operation
IO/ (output)-it is a status signal which distinguishes whether the address is for memory or
I/O.
IO/ = 1, when it goes high the address on the address bus is for an I/O device.
IO/ = 0, When it goes low the address on the address bus is for a memory location.
Other Externally Initiated Signals- 5 signals
READY (input)- µP has to communicate with peripheral which are slow as compared to µP.
The slow peripheral may be connected to the microprocessor through READY line. READY
signal is used by the µP to sense whether a peripheral is ready to transfer data or not.
if READY is high the peripheral is ready to send/ accept data.
if it is low the microprocessor waits till it goes high.

HOLD (input)- When it goes high- another device (e.g. Peripherals) is requesting for the use
of the address and data bus. Having received a HOLD request the microprocessor
relinquishes the use of the buses. Internal processing may continue. The processor regains
the bus after the removal of the HOLD signal.

HLDA (output)- HOLD acknowledgement. It goes high when µP receives HOLD request.
after the removal of a HOLD request the HLDA goes low and µP takes over the buses.

(input)- Active low type.. When it goes low.. it resets the program counter to zero (PC=
00H). It also resets interrupts enable that is an HLDA flip-flops. Buses goes in tri state.

RESET OUT (output)- Active high.. it indicates that the µP is being reset. Used to reset other
devices.
 Interrupt Signals- 5 interrupts+ 1 output
INTR (input)-it is an interrupt request signal. Among interrupts it has the lowest priority. An
interrupt is used by I/O devices to transfer data to the microprocessor without wasting its
time.

INTA (output)- interrupt acknowledgement sent by the microprocessor after INTR is

received.

RST5.5, RST6.5, RST 7.5(input)- these are restart interrupts Signals. they
causes an internal restart to be automatically inserted each of them of a programmable
mask.

TRAP-TRAP has the highest priority. It is used in emergency situation. it is an non-mask able
interrupt.

Order of priority-
TRAP → RST 7.5 → RST 6.5 → RST 5.5 → INTR

When an interrupt is recognize the next instruction is executed from a fixed location in
memory. A subroutine is executed which is called ISS(interrupt service subroutine).
 Serial Input and output

SID (input)- it is data line for serial input. Single input bit can be entered through this pin and
The data on this line is loaded into the 7th bit of the accumulator.

SOD (output)- it is data line for serial output. Single output bit can be send out through this
pin and the 7th bit of the accumulator is output on sod line.

Power Supply and clock frequency

X1, X2 (input)- these two terminals are used to connect an external crystal oscillator which
drives an internal circuitry of the microprocessor to generate clock for the operation of
microprocessor.

CLK (output)-it is output clock, which can provide clock signal to other devices (digital IC) to
synchronize with the microprocessor.

Vcc- +5 volt dc supply.

Vss- ground reference.