A Schmitt trigger circuit for supply voltages down to 50

mV

Thiago Daros Fernandes

UFSC

September 15, 2019

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 1 / 10

 Motivation

Introduction

Portable devices

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size
Harsh environments

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size
Harsh environments
Power supply constraint

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size
Harsh environments
Power supply constraint

Possible solutions:

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size
Harsh environments
Power supply constraint

Possible solutions:
Very low power consumption

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices
Limited size
Harsh environments
Power supply constraint

Possible solutions:
Very low power consumption
Batteryless circuits

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices Available logic and DC-DC startups:

Limited size
Harsh environments Hundreds of mV[2, 7]

Power supply constraint

Possible solutions:
Very low power consumption
Batteryless circuits

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices Available logic and DC-DC startups:

Limited size
Harsh environments Hundreds of mV[2, 7]

Power supply constraint

Energy Harvesting devices:

Dozens of mV [2, 8, 1]
Possible solutions:
Very low power consumption
Batteryless circuits

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices Available logic and DC-DC startups:

Limited size
Harsh environments Hundreds of mV[2, 7]

Power supply constraint

Energy Harvesting devices:

Dozens of mV [2, 8, 1]
Possible solutions:
High internal resistance [3]
Very low power consumption
Batteryless circuits

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Introduction

Portable devices Available logic and DC-DC startups:

Limited size
Harsh environments Hundreds of mV[2, 7]

Power supply constraint

Energy Harvesting devices:

Dozens of mV [2, 8, 1]
Possible solutions:
High internal resistance [3]
Very low power consumption
Batteryless circuits
SNR Gets bigger as the voltage
supply decrese

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 2 / 10

 Motivation

Related Work

CMOS inverter VDDmin (unity gain) [4]:

VDDmin = 2φt ln 2 = 36 mV

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 3 / 10

 Motivation

Related Work

CMOS inverter VDDmin (unity gain) [4]:

VDDmin = 2φt ln 2 = 36 mV

Classical ST VDDmin [6]: VI VO

√ !
8 + 73
VDDmin = 2φt ln ≈ 31.5 mV
9

Figure 1: Classical Schmitt

trigger (ST).

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 3 / 10

 Motivation

Related Work

CMOS inverter VDDmin (unity gain) [4]:

VDDmin = 2φt ln 2 = 36 mV

Classical ST VDDmin [6]: VI VO

√ !
8 + 73
VDDmin = 2φt ln ≈ 31.5 mV
9

Presents hysteresis from[5]:

√ 
VDDH = 2φt ln 2 + 5 = 75 mV

Figure 1: Classical Schmitt
trigger (ST).

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 3 / 10

 Motivation

Three-Inverter Schmitt trigger

1 J K

VI VO

Figure 2: Three-inverter Schmitt

trigger (TI-ST) circuit.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 4 / 10

 Motivation

Three-Inverter Schmitt trigger

1+K
s !
VDDH = 2φt ln 1 + n
K
1 J K

VI VO

Figure 2: Three-inverter Schmitt

trigger (TI-ST) circuit.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 4 / 10

 Motivation

Three-Inverter Schmitt trigger

1+K
s !
VDDH = 2φt ln 1 + n
K
1 J K

VI VO

at 300 K and with n = 1.3:

K = 1 ⇒ VDDH ≈ 54 mV
Figure 2: Three-inverter Schmitt
trigger (TI-ST) circuit.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 4 / 10

 Motivation

Three-Inverter Schmitt trigger

1+K
s !
VDDH = 2φt ln 1 + n
K
1 J K

VI VO

at 300 K and with n = 1.3:

K = 1 ⇒ VDDH ≈ 54 mV
K = 5 ⇒ VDDH ≈ 46 mV Figure 2: Three-inverter Schmitt
trigger (TI-ST) circuit.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 4 / 10

 Motivation

Three-Inverter Schmitt trigger

1+K
s !
VDDH = 2φt ln 1 + n
K
1 J K

VI VO

at 300 K and with n = 1.3:

K = 1 ⇒ VDDH ≈ 54 mV
K = 5 ⇒ VDDH ≈ 46 mV Figure 2: Three-inverter Schmitt
trigger (TI-ST) circuit.
K=∞⇒
VDDH = 2φt ln(1 + n) = 43 mV

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 4 / 10

 Motivation

Figure 4: 0.18 µm TSMC. a: CMOS

inverter cell, b: TI-ST K = 1, c: TI-ST
K = 5.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 5 / 10

 Motivation

Figure 3: Measured voltage transfer

curves for the three-inverter Schmitt
triggers (K = 1/5, 1, 5) with VDD = 50
mV.
Figure 4: 0.18 µm TSMC. a: CMOS
inverter cell, b: TI-ST K = 1, c: TI-ST
VDDH = 48.5 mV K = 5.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 5 / 10

 Motivation

VO

2 µm 2 µm 2 µm 2K µm
600 nm 600 nm 600 nm 600 nm

VI VO VI VO
6 µm 6 µm 6 µm 6K µm
600 nm 600 nm 600 nm 600 nm

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 6 / 10

 Motivation

50
Inverter
TI-ST K = 5
37.5 TI-ST K = 1 VO
VO (mV)

25

12.5

2 µm 2 µm 2 µm 2K µm
0 600 nm 600 nm 600 nm 600 nm
2 2.05 2.1 2.15 2.2
VI VO VI VO
Time (ms) 6 µm 6 µm 6 µm 6K µm
600 nm 600 nm 600 nm 600 nm

Figure 5: Output waveforms of the three

with VDD = 50 mV.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 6 / 10

 Motivation

References I

Po-Hung Chen, Koichi Ishida, Katsuyuki Ikeuchi, Xin Zhang, Kentaro

Honda, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, and
Takayasu Sakurai.
Startup techniques for 95 mv step-up converter by capacitor pass-on
scheme and VT H -tuned oscillator with fixed charge programming.
IEEE Journal of Solid-State Circuits, 47(5):1252–1260, 2012.
Carlton Himes, Eric Carlson, Ryan J Ricchiuti, Brian P Otis, and
Babak A Parviz.
Ultralow voltage nanoelectronics powered directly, and solely, from a
tree.
IEEE Transactions on Nanotechnology, 9(1):2–5, 2009.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 7 / 10

 Motivation

References II

Wootaek Lim, Inhee Lee, Dennis Sylvester, and David Blaauw.

8.2 batteryless sub-nW Cortex-M0+ processor with dynamic
leakage-suppression logic.
In 2015 IEEE International Solid-State Circuits Conference-(ISSCC)
Digest of Technical Papers, pages 1–3. IEEE, 2015.
James D Meindl and Jeffrey A Davis.
The fundamental limit on binary switching energy for terascale
integration (TSI).
IEEE Journal of Solid-State Circuits, 35(10):1515–1516, 2000.
Luiz Alberto Pasini Melek, Anselmo Luís da Silva, Márcio Cherem
Schneider, and Carlos Galup-Montoro.
Analysis and design of the classical CMOS Schmitt trigger in
subthreshold operation.
IEEE Trans. Circuits Syst. I: Reg. Papers, 64(4):869–878, 2017.
Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 8 / 10
 Motivation

References III

Luiz Alberto Pasini Melek, Márcio Cherem Schneider, and Carlos

Galup-Montoro.
Operation of the classical CMOS Schmitt trigger as an
ultra-low-voltage amplifier.
IEEE Transactions on Circuits and Systems II: Express Briefs,
65(9):1239–1243, 2018.
Yogesh K Ramadass and Anantha P Chandrakasan.
A battery-less thermoelectric energy harvesting interface circuit with
35 mv startup voltage.
IEEE Journal of Solid-State Circuits, 46(1):333–341, 2010.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 9 / 10

 Motivation

References IV

Ying-Khai Teh and Philip KT Mok.

A stacked capacitor multi-microwatts source energy harvesting scheme
with 86 mv minimum input voltage and ±3 v bipolar output voltage.
IEEE Journal on Emerging and Selected Topics in Circuits and
Systems, 4(3):313–323, 2014.

Thiago Daros Fernandes (UFSC) ST Circuit for 50 mV September 15, 2019 10 / 10