Simplified Instructional Computer (SIC)

A hypothetical computer that includes the

hardware features most often found on real
machines
SIC standard model
S . I N
SIC/XE
T U N OTE
Kcompatible
Upward
Programs for SIC can run on SIC/XE

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SIC machine architecture

Memory
8-bit bytes
3 consecutive bytes form a word
Addressed by the lowest number byte
S . I N
T U N OTE
215 (32768) bytes in the computer memory
K
A word (3 bytes)

…
32768 = 215 bytes

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 SIC machine architecture
Registers (5 registers / each 24-bits)
Mnemonic Number Special use
A 0 Accumulator; used for arithmetic operations
X 1 Index register; used for addressing
L 2 Linkage register; the Jump to Subroutine (JSUB)

S . I N
instruction stores the return address

T U N OTE
in this register
PC 8
K Program counter; contains the address of the next
instruction to be fetched for execution
SW 9 Status word; contains a variety of information,
including a Condition Code (CC)
SIC does not have any stack. It uses the linkage register to store the
return address.
It is difficult to write the recursive program. A programmer has to
maintain memory for return addresses when he write more than one
layer of function call.

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SIC machine architecture

Data formats
Characters
8-bit ASCII codes
Integers
S . I N
OTE
24-bit binary numbers
T U N
2’s complement for negative values
K-N ⇔ 2 – N
n

e.g., if n = 4, -1 ⇔ 24 – 1 = (1111)2.

No floating-point numbers (exist in SIC/XE)

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SIC machine architecture
Instruction formats
24-bits format

opcode (8) x address (15)

. I N
Note that the memory size of SIC is 215 bytes
S
U N OTE
X is to indicate index-address mode
T
K
Addressing modes
Mode Indication Target address calculation

Direct x=0 TA = address

Indexed x=1 TA = address + (X)

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SIC machine architecture
Instruction set
Load and store instruction
LDA, LDX, STA, STX
Ex: LDA ALPHA ⇔ (A) ← (ALPHA)
STA ALPHA ⇔ (ALPHA) ← (A)
Arithmetic instruction
E S . I N
N O T
involve register
U MUL, DIV A and a word in memory
KTSUB,
ADD,
Ex: ADD ALPHA ⇔ (A) ← (A) + (ALPHA)
Comparison instruction
involves register A and a word in memory
save result in the condition code (CC) of SW
COMP
Ex: COMP ALPHA ⇔ CC ←(<,+,>) of (A)?(ALPHA)

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SIC machine architecture

Instruction set (Cont.)

Conditional jump instructions
according to CC
JLE, JEQ, JGT

S . I N
test CC and jump accordingly
E
SubroutineU N O
linkage T
instructions
K
JSUB
T
jumps and places the return address in register
L
RSUB
returns to the address in L

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SIC machine architecture

Input and output

Input and output are performed by transferring 1 byte at
a time to or from the rightmost 8 bits of register A
Each device is assigned a unique 8-bits code
S . I N
T U N OTE
Three I/O instructions
Ktests whether the addressed device is ready to
The Test Device (TD) instruction

send or receive a byte of data

CC : < : ready
CC : = : busy
Read Data (RD)
Write Data (WD)

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 Simple I/O example for SIC
Page 19, Figure 1.6
INLOOP TD INDEV TEST INPUT DEVICE
JEQ INLOOP LOOP UNTIL DEVICE IS READY
RD INDEV READ ONE BYTE INTO REGISTER A
STCH DATA STORE BYTE THAT WAS READ
.
S . I N
OTE
.
OUTLP TD
JEQ T U N
OUTDEV
K OUTLP TEST OUTPUT DEVICE
LOOP UNTIL DEVICE IS READY
LDCH DATA LOAD DATA BYTE INTO REGISTER A
WD OUTDEV WRITE ONE BYTE TO OUTPUT DEVICE
.
.
INDEV BYTE X’F1’ INPUT DEVICE NUMBER
OUTDEV BYTE X’05’ OUTPOUT DEVICE NUMBER
DATA RESB 1 ONE-BYTE VARIABLE

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 Programming examples
- Data movement
Page 13, Figure 1.2 (a)
LDA FIVE LOAD CONSTANT 5 INTO REGISTER A
STA ALPHA STORE IN ALPHA
LDCH CHARZ LOAD CHARACTER ‘Z’ INTO REGISTER A
STCH C1
N
STORE IN CHARACTER VARIABLE C1
S . I
.
.
T U N OTE
ALPHA RESWK 1 ONE-WORD VARIABLE
FIVE WORD 5 ONE-WORD CONSTANT
CHARZ BYTE C’Z’ ONE-BYTE CONSTANT
C1 RESB 1 ONE-BYTE VARIABLE

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Programming examples
- Arithmetic
Page 15, Figure 1.3 (a)
LDA ALPHA LOAD ALPHA INTO REGISTER A
ADD INCR ADD THE VALUE OF INCR
SUB ONE SUBTRACT 1
STA BETA STORE IN BETA
LDA GAMMA LOAD GAMMA INTO REGISTER A
ADD INCR
S . I N
ADD THE VALUE OF INCR
SUB
T U N ONE
OTE SUBTRACT 1
K
STA
.
DELTA STORE IN DELTA

.
ONE WORD 1 ONE-WORD CONSTANT
. ONE-WORD VARIABLES
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
DELTA RESW 1
INCR RESW 1

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 Programming examples
-Looping and indexing
Page 16, Figure 1.4 (a)
LDX ZERO INITIALIZE INDEX REGISTER TO 0
MOVECH LDCH STR1,X LOAD CHARACTER FROM STR1 INTO REG A
STCH STR2,X STORE CHARACTER INTO STR2
TIX ELEVEN ADD 1 TO INDEX, COMPARE RESULT TO 11
JLT MOVECH
S . I N
LOOP IF INDEX IS LESS THAN 11
.
T U N OTE
STR1
.
BYTE
K
C’TEST STRING’ 11-BYTE STRING CONSTANT
STR2 RESB 11 11-BYTE VARIABLE
. ONE-WORD CONSTANTS
ZERO WORD 0
ELEVEN WORD 11

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 Programming examples
- Indexing and looping
Page 17, Figure 1.5 (a)
LDA ZERO INITIALIZE INDEX VALUE TO 0
STA INDEX
ADDLP LDX INDEX LOAD INDEX VALUE INTO REGISTER X
LDA ALPHA,X LOAD WORD FROM ALPHA INTO REGISTER A
ADD BETA,X ADD WORD FROM BETA
STA GAMMA,X
I N
STORE THE RESULT IN A WORD IN GAMMA
S .
OTE
LDA INDEX ADD 3 TO INDEX VALUE
ADD
STA
COMP K
THREE
T U
INDEX
K300
N COMPARE NEW INDEX VALUE TO 300
JLT ADDLP LOOP IF INDEX IS LESS THAN 300
.
INDEX RESW 1 ONE-WORD VARIABLE FOR INDEX VALUE
. ARRAY VARIABLES—100 WORDS EACH
ALPHA RESW 100
BETA RESW 100
GAMMA RESW 100
. ONE-WORD CONSTANTS
ZERO WORD 0
K300 WORD 300
THREE WORD 3

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 Programming examples
- Subroutine call and record input
Page 20, Figure 1.7 (a)
JSUB READ CALL READ SUBROUTINE
.
. SUBROUTINE TO READ 100-BYTE RCORD
READ LDX ZERO INITAILIZE INDEX REGISTER TO 0
RLOOP TD INDEV TEST INPUT DEVICE
S . I N
OTE
JEQ RLOOP LOOP IF DEVICE IS BUSY
RD
STCH
K T N
INDEV
U
RECORD,X
READ ONE BYTE INTO REGISTER A
STORE DATA BYTE INTO RECORD
TIX K100 ADD 1 TO INDEX AND COMPARE TO 100
JLT RLOOP LOOP IF INDEX IS LESS THAN 100
RSUB EXIT FROM SUBROUTINE
.
INDEV BYTE X’F1’ INPUT DEVICE NUMBER
RECORD RESB 100 100-BYTE BUFFER FOR INPUT RECORD
. ONE-WORD CONSTANTS
ZERO WORD 0
K100 WORD 100

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Define storage

WORD/BYTE
Reserve one word/byte of storage
RESW/RESB

S . I N
Reserve one or more words/bytes of storage
Example
T U N OTE
K
ALPHA RESW 1
FIVE WORD 5
CHARZ BYTE C`Z’
C1 RESB 1

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Special symbols (SIC & SIC/XE)
# : immediate addressing
@ : indirect addressing
+ : format 4
* : the current value of PC
S . I N
C`
T U N OTE
‘: character string
op K
m, x : x denotes the index addressing

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SIC/XE machine architecture
Memory
Maximum memory available on a SIC/XE system is 1
megabyte (220 bytes)
Instruction format and addressing modes are changed
Register (Additional registers)
Mnemonic Number
. I
Special use
S N
B
4 UN
3 TEregister; used for addressing
OBase
S
K T General working register-no special use
T 5 General working register-no special use
F 6 Floating-point accumulator (48bits)

Registers S and T are only for storing data. They can not use
for accumulator
Ex: ADDR S, A A ← A+S
COMPR X, T

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SIC/XE machine architecture
Data formats
There is a 48-bit floating-point data type
1 11 36
s exponent fraction

S . I N
OTE
sign bit s (0: +, 1: -)

T U N
fraction f: a value between 0 and 1
K
exponent e: unsigned binary number between 0 and 2047
value: s * f * 2 (e-1024)
Ex: 5 = 22+20=(2-1+2-3)*23= (2-1+2-3)*21027-1024
0,10000000011,1010000….0

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SIC/XE machine architecture
Instruction formats
Since the memory used by SIC/XE may be 220 bytes, the
instruction format of SIC is not enough.
Solutions 8 1 15
Use relative addressing opcode x address

S . I N
Extend the address field to 20 bits
E
SIC/XE instruction O
U N T
formats
K T
! " #! "
! " #! " ! " ! "
! " #! " $ # #! "
! " #! " $ # ! "
% & %

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SIC/XE machine architecture
Addressing modes
New relative addressing modes for format 3
Mode Indication Target address calculation

Base relative b=1,p=0 TA=(B)+disp (0 disp 4095)

Program-counter relative
E I
b=0,p=1
S . N TA=(B)+disp (-2048 disp 2047)

When base N
U O T
KT integer
relative mode is used, disp is a 12-bits
unsigned
When program-counter relative mode is used, disp
is a 12-bits signed integer
2’s complement
Direct addressing for formats 3 and 4 if b=p=0
These two addressing mode can combine with index
addressing if x=1

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SIC/XE machine architecture

Addressing modes
Bits x,b,p,e: how to calculate the target address
relative, direct, and indexed addressing
modes

S . I N
Bits i and n: how to use the target address (TA)
U N TE Operand value
OIndication
Mode
T
K addressing
Immediate i=1, n=0 TA: TA is used as the operand
value, no memory reference
Indirect addressing i=0, n=1 ((TA)): The word at the TA is
fetched. Value of TA is taken as
the address of the operand value
Simple addressing i=0, n=0 Standard SIC
i=1, n=1 (TA):TA is taken as the address of
the operand value

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Addressing mode example
. . (B)=006000
. . (PC)=003000
. . (X)=000090
3030 003600
. .
. .
. .

S . I N
OTE
3600 103000
.
.
.
. K T U N
. .
6390 00C303
. .
. .
. .
C303 003030
. .
. .
. .

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 Addressing mode example

Machine instruction Value

Hex Binary Target loaded into
op n i x b p e disp/address address register A

032600 000000 1 1 0 0 1 0 0110 0000 0000 3600 103000

03C300 000000
. I
1 1 1 1 0 0 0011 0000 0000
E S N 6390 00C303
022030 000000
N O T
1 0 0 0 1 0 0000 0011 0000 3030 103000
010030 000000 0K1T0U0 0 0 0000 0011 0000 30 000030
003600 000000 0 0 0 0 1 1 0110 0000 0000 3600 103000
0310C303 000000 1 1 0 0 0 1 0000 1100 0011 0000 0011 C303 003030

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 Addressing mode summary
Addressing Flag bits Assembler lenguage Calculation of Operand Notes
type nixbpe notation target address TA
Simple 110000 +op c disp (TA) 4D
110001 +op m addr (TA) 4D
110010 +op m (PC)+disp (TA) 4DA
110100 +op m (B)+disp (TA) 4DA
111000 +op c,X disp+(X) (TA) 4D
111001 +op m,X
S . I N addr+(X) (TA) 4D
111010
111100
+op m,X

T U N
+op m,X OTE (PC)+disp+(X)
(B)+disp+(X)
(TA)
(TA)
4DA
4DA
000---
001---
K +op m
+op m,X
b/p/e/disp
b/p/e/disp+(X)
(TA)
(TA)
4DAS
4DAS
Indirect 100000 +op @c disp ((TA)) 4D
100001 +op @m addr ((TA)) 4D
100010 +op @m (PC)+disp ((TA)) 4DA
100100 +op @m (B)+disp ((TA)) 4DA
Immediate 010000 +op #c disp TA 4D
010001 +op #m addr TA 4D
010010 +op #m (PC)+disp TA 4DA
010100 +op #m (B)+disp TA 4DA

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SIC/XE machine architecture
Instruction set
Standard SIC’s instruction
Load and store registers (B, S, T, F)
LDB, STB, …
Floating-point arithmetic operations
ADDF, SUBF, MULF, DIVF
S . I N
Eoperations
Register-registerN O T
U MULR, DIVR
arithmetic
KTSUBR,
ADDR,
Register move operations
RMO
Supervisor call (SVC)
generates an interrupt for OS (Chap 6)
Input/Output
SIO, TIO, HIO: start, test, halt the operation of I/O device

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SIC/XE machine architecture

Instruction set
Refer to Appendix A for all instructions (Page 496)
Notations for appendix
A ← (m..m+2): move word begin at m to A
S . I N
OTE
P: privileged instruction
T U N
X: instruction available only in SIC/XE
K
C: condition code CC

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 Programming examples (SIC/XE)
- Data movement
Page 13, Figure 1.2 (b)
LDA #5 LOAD VALUE 5 INTO REGISTER A
STA ALPHA STORE IN ALPHA
LDA #90 LOAD ASCII CODE FOR ‘Z’ INTO REG A
STCH C1 STORE IN CHARACTER VARIABLE C1
S . I N
OTE
.

ALPHA
.
T
RESWK 1
U N ONE-WORD VARIABLE
C1 RESB 1 ONE-BYTE VARIABLE

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 Programming examples (SIC/XE)
- Arithmetic
Page 15, Figure 1.3 (b)
LDS INCR LOAD VALUE OF INCR INTO REGISTER S
LDA ALPHA LOAD ALPHA INTO REGISTER A
ADDR S,A ADD THE VALUE OF INCR
SUB #1 SUBTRACT 1
STA BETA
S . I N
STORE IN BETA
LDA
ADDR
T U
GAMMA
N
S,A OTE LOAD GAMMA INTO REGISTER A
ADD THE VALUE OF INCR
K
SUB
STA
#1
DELTA
SUBTRACT 1
STORE IN DELTA
.
.
. ONE WORD VARIABLES
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
DELTA RESW 1
INCR RESW 1

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 Programming examples (SIC/XE)
-Looping and indexing
Page 16, Figure 1.4 (b)
MOVECH LDT #11 INITIALIZE REGISTER T TO 11
LDX #0 INITIALIZE INDEX REGISTER TO 0
LDCH STR1,X LOAD CHARACTER FROM STR1 INTO REG A
STCH STR2,X SOTRE CHARACTER INTO STR2
TIXR T
S . I N
ADD 1 TO INDEX, COMPARE RESULT TO 11
JLT
.
MOVECH

T U N OTE LOOP IF INDEX IS LESS THAN 11

. K
STR1 BYTE C’TEST STRING’ 11-BYTE STRING CONSTANT
STR2 RESB 11 11-BYTE VARIABLE

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 Programming examples (SIC/XE)
- Indexing and looping
Page 17, Figure 1.5 (b)
LDS #3 INITIALIZE REGISTER S TO 3
LDT #300 INITIALIZE REGISTER T TO 300
LDX #0 INITIALIZE INDEX REGISTER TO 0
ADDLP LDA ALPHA,X LOAD WORD FROM ALPHA INTO REGISTER A
ADD BETA,X
N
ADD WORD FROM BETA
S . I
OTE
STA GAMMA,X STORE THE RESULT IN A WORD IN GAMMA
ADDR
K
COMPRT U N
S,X
X,T
ADD 3 TO INDEX VALUE
COMPARE NEW INDEX VALUE TO 300
JLT ADDLP LOOP IF INDEX VALUE IS LESS THAN 300
.
.
. ARRAY VARIABLES—100 WORDS EACH
ALPHA RESW 100
BETA RESW 100
GAMMA RESW 100

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 Programming examples (SIC/XE)
- Subroutine call and record input
Page 20, Figure 1.7 (a)
JSUB READ CALL READ SUBROUTINE
.
.
. SUBROUTINE TO READ 100-BYTE RECORD
READ LDX #0 INITIALIZE INDEX REGISTER TO 0
S . I N
OTE
RLOOP LDT #100 INITIALIZE REGISTER T TO 100
TD
JEQ
K
INDEV
T U
RLOOPN TEST INPUT DEVICE
LOOP IF DEVICE IS BUSY
RD INDEV READ ONE BYTE INTO REGISTER A
STCH RECORD,X STORE DATA BYTE INTO RECORD
TIXR T ADD 1 TO INDEX AND COMPARE TO 100
JLT RLOOP LOOP IF INDEX IS LESS THAN 100
RSUB EXIT FROM SUBROUTINE
.
.
INDEV BYTE X’F1’ INPUT DEVICE NUMBER
RECORD RESB 100 100-BYTE BUFFER FOR INPUT RECORD

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System Software
S . I N
T U N OTE
K
Module 1

1
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 Intro
 Introduces the design & implementation of
system software

S . I N
 2 types T U N OTE
K
 Application software

 System software

2
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 Application Software (1/2)

 Is any tool that functions & is operated by means

of a computer as a tool
 Purpose of supporting or improving
E S . I N the software
user’s work U N O T
K T
 Subclass of computer software
 Employs the capabilities of computer directly to a
dedicated task that the user wishes to perform
 Focus on the application

3
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 Application Software (2/2)

 Types
 Word processing S/W

 MS word, Notepad, WordPad

 Database S/W

 Oracle, MS Access E S . I N
U N O T
 Spreadsheet
T
KS/W
 Excel, Lotus, Apple Numbers

 Multimedia S/W

 Real Player, Media Player

 Presentation Graphics S/W

 MS PowerPoint
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4
 System Software (1/7)

 Set of programs that supports the operation of a

computer
 Acts as an intermediary b/w computer
. I N hardware &
application programs O T E S
K T U N
 Controls the computer system & enhances its
performance
 Focus is on the system

5
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 System Software (2/7)

 Examples
 Text Editor

 Compiler
E S . I N
U N OT
 Loader / Linker
T
K
 Debugger

 Assembler

 Interpreter

6
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 System Software (3/7)

 Text Editor
 Allows user to create/modify a file having only plain
text
S . I N


T U OTE
Edit contents to get an immediate visual feedback
N
K
 Emacs (Unix)
 Notepad (Microsoft)
 SimpleText, TextEdit (Mac OS)

7
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 System Software (4/7)

 Compiler
 Higher language to assembly language
Translates source code into data, that computer can
I N

S .
understand
T U N OTE
 K
Source code to object code
 ADA, BASIC, Fortran, Pascal
 C, C++, C#
 Open Source, Research

8
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 System Software (5/7)
 Linker
 Object code from compiler is turned into executable
program
 Gathers 1 or more objects generated by the compiler
& combines into a single EXE
S . I N


T U OTE
In IBM OS/360 termed as linkage editor
N
 Loader K
 Loads programs from executables into memory &
executes

9
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 System Software (6/7)

 Debugger

 Tests & debugs errors

 Code run on Instruction Set Simulator (ISS)
Step by step
S . I N
OTE


 Breakpoint
K T U N
 DEBUG – Microsoft DOS built-in debugger

 Nemiver – Graphical C/C++ debugger

 Ups – Fortran, C

 VB Watch – Visual Basic

 Jswat – Open source Java

 Xdebug – PHP

10
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 System Software (7/7)

 Assembler
 Assembly language to machine language
 Mnemonics to machine code
S . I N


T U OTE
Produces executable machine code
N
 K
Pattern of bits

 Interpreter
 High level language to machine language
 Executes immediately

11
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 S . I N
T U N OTE
K

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Difference between System Software and Application Software

S.No. System Software Application Software

Application software is
System software is used for operating
1. used by user to perform
computer hardware.
specific task.
System softwares are installed on the Application softwares are
2. computer when operating system is installed according to
installed. user’s requirements.

S . I N
3.
N OTE
In general, the user does not interact with
system software because it works in the
T U
In general, the user
interacts with application
K
background. sofwares.
Application software can’t
System software can run independently. It run independently. They
4. provides platform for running application can’t run without the
softwares. presence of system
software.
Some examples of
application softwares are
Some examples of system softwares are
5. word processor, web
compiler, assembler, debugger, driver, etc.
browser, media player,
etc.

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System S/W & Machine Architecture (1/2)

 Main characteristic is MACHINE DEPENDENCY

 Machine Dependent
Machine Independent I N

S .
T U N OTE

K
Application Program
 Concerned with solution of problem, using
computer as tool
 Focus on application
 Not on the computing system

14
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System S/W & Machine Architecture (2/2)

 System program
 Supports the operation & use of computer
 Focus on system
S . I N
 Machine dependent
T U N OTE
 Machine K
Independent
 Some aspects of system software, do not directly
depend upon the type of computing system
 general design & logic of an assembler
 general design & logic of a compiler
 code optimization techniques

15
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 The Simplified Instructional Computer
(SIC) (1/2)

S . I N
Hypothetical
T U N OTE
computer that includes the
 K
hardware features most often found on real
machines

16
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 The Simplified Instructional Computer
(SIC) (2/2)
 Two versions of SIC

 SIC
S . I N

T U N OTE
SIC/XE (extra equipments or extra expensive)

K
SIC program can be executed on SIC/XE (upward
compatible)
 Upward compatible
 Object program for the standard SIC machine will execute
properly on SIC/XE system

17
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 SIC Machine Architecture (1/7)

 Memory
 Registers
 Data formats
E S . I N
U N O T
 Instruction
K Tformats
 Addressing Modes
 Instruction Set
 Input & Output

18
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 SIC Machine Architecture (2/7)

 Memory
 215 bytes memory
32,768 bytes I N

S .
 8-bit bytes
T U N OTE

K
3 consecutive bytes form a word (24 bits)
 Little endian
 addressed by location of lowest numbered byte

 Least significant part of a numeric value is stored at

the lowest numbered address

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 SIC Machine Architecture (3/7)

 Registers
 5 registers – each of length 24 bits

E S . I N
Register Number
U O
Function
N T Use
A 0 KT Accumulator Arithmetic operations
X 1 Index register Addressing
L 2 Linkage register Storing return address for
subroutine jumps (JSUB)
PC 8 Program counter Address of next instruction to be
fetched
SW 9 Status word Flags, other information
including Condition Code (CC)
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 SIC Machine Architecture (4/7)

 Data Formats
 Integers are stored as 24-bit binary numbers
2’s complement for negative values
I N

S .

T U OTE
8-bit ASCII for characters
N

K
No floating point hardware in standard SIC
 Instruction Formats
 24-bit format
 x indicates indexed addressing mode
8 1 15
opcode X address
21
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 SIC Machine Architecture (5/7)

 Addressing modes
 2 addressing modes available
Indicated by x bit in the instruction


S . I N
Mode T U N
Indication
OTETarget address calculation
K
Direct x=0 TA = address
Indexed x=1 TA = address + (x)

 () indicates the contents of a register or a memory location

 (x) represents the contents of register x

22
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 SIC Machine Architecture (6/7)

 Instruction Set
 Load and store: LDA, LDX, STA, STX etc
 Integer arithmetic operations: ADD, SUB, MUL, DIV
 All arithmetic operations involve register A and a word in memory, with
the result being left in the register
Comparison: COMP I N


COMP compares the value in O T E

register
S .
A with a word in memory, this


instruction sets aK
N
TU code CC to indicate the result
condition
 Conditional jump instructions: JLT, JEQ, JGT
 these instructions test the setting of CC and jump accordingly
 Subroutine linkage: JSUB, RSUB
 JSUB jumps to the subroutine, placing the return address in register L
 RSUB returns by jumping to the address contained in register L

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 SIC Machine Architecture (7/7)

 Input & Output

 Input and output are performed by transferring 1 byte
at a time to or from the rightmost 8 bits of register A
 The Test Device (TD) instruction tests whether the
addressed device is ready to send or receive a byte of
data S . I N
T U N OTE
“Less Than “ if device is ready; “Equal” if device is busy.

K
 Read Data (RD)
 read a byte from the device to register A
 Write Data (WD)
 write a byte from register A to the device

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 SIC/XE Machine Architecture (1/12)

 Memory
 Larger Memory
 220 bytes (1 megabyte) in the computer memory
. I N
Leads to change in instruction formats & addressing modes
S
OTE


 Registers
K T U N
 Additional registers provided

Mnemonic Number Use

B 3 Base register – used for addressing

S 4 General working register – no special use
T 5 General working register – no special use
F 6 Floating point accumulator (48 bits)
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 SIC/XE Machine Architecture (2/12)

 Data Formats
 Floating-point data type: frac*2(exp-1024)
 fraction: 0~1
exponent: 0~2047
S . I N
OTE


s
1 11

K T U
exponent
N 36

fraction

 Sign is indicated by ‘s’ (0 = +ve, 1 = -ve)

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 SIC/XE Machine Architecture (3/12)

Formats 1 and 2 do not

Instruction Formats reference memory at all
8
Format 1 (1 byte) opcode . I N
8 S
OT4E 4
K T U N
Format 2 (2 bytes) opcode r1 r2
6 111111 12
Format 3 (3 bytes)
opcode n i x b p e disp
e=0
6 111111 20
Format 4 (4 bytes)
e=1 opcode n i x b p e address
Bit e distinguishes between formats 3 and 4
Large memory extends addressing capacity
Downloaded from Ktunotes.in
27
 SIC/XE Machine Architecture (4/12)

 Addressing modes
 Base relative (n=1, i=1, b=1, p=0)
Program-counter relative (n=1, i=1, b=0, p=1)
I N

S .

T U OTE
Direct (n=1, i=1, b=0, p=0)
N

K
Immediate (n=0, i=1, x=0)
 Indirect (n=1, i=0, x=0)
 Indexing (both n & i = 0 or 1, x=1)
 Extended (e=1)
 Note: Indexing cannot be used with immediate or indirect
addressing
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 SIC/XE Machine Architecture (5/12)

 Base Relative Addressing Mode

n i x b p e
opcode 1 1 1 0 I N disp
T E S .
T U N O
K TA=(B)+disp
n=1, i=1, b=1, p=0 (0disp 4095)

 Program-Counter Relative Addressing Mode

n i x b p e
opcode 1 1 0 1 disp

n=1, i=1, b=0, p=1 TA=(PC)+disp (-2048disp

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 SIC/XE Machine Architecture (6/12)

 Direct Addressing Mode

n i x b p e
opcode 1 1 0 0
S . I N disp
n=1, i=1, b=0, p=0T U N
TA=disp OTE (0disp 4095)
K
n i x b p e
opcode 1 1 1 0 0 disp

n=1, i=1, b=0, p=0 TA=(X)+disp

(with index addressing mode)
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 SIC/XE Machine Architecture (7/12)

 Immediate Addressing Mode

n i x b p e
opcode 0 1 0 I Ndisp
T E S .
n=0, i=1, x=0
T U N O TA = disp
K
 Indirect Addressing Mode

n i x b p e
opcode 1 0 0 disp

n=1, i=0, x=0 TA=(disp)

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 SIC/XE Machine Architecture (8/12)

 Simple Addressing Mode

n i x b p e
opcode 0 0 I N disp
T E S .
i=0, n=0 T U N O
TA=b/p/e/disp (SIC
standard)
K
n i x b p e
opcode 1 1 disp

i=1, n=1 TA=disp (SIC/XE

standard)
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 SIC/XE Machine Architecture (9/12)

For formats 3 and 4:

 Immediate addressing mode (n = 0, i =1)
 The target address is used as the operand
S . I N
Indirect addressing mode (n = 1, i = 0)


U N OTE
The word at the location given by the target address is
T

fetched K
 The value contained in this word is then used as the address
of the operand value
 Simple addressing mode
 The target address is taken as the location of the operand
 (n = 1, i = 1) used by SIC/XE
 (n = 0, i = 0) used by SIC
Indexed addressing cannot be used with immediate or indirect modes.
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 SIC/XE Machine Architecture (10/12)
4: Format 4 instruction
D: Direct-addressing instruction (i.e.,)non-relative addressing b=0 & p=0
A: Assembler selects either program-counter relative or base- relative mode
S: Compatible with instruction format for standard SIC

S . I N
T U N OTE
K

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PC-relative simple addressing: (PC) + disp
Base-relative indexed simple addressing: (B) + disp +
(X)
PC-relative indirect addressing: (PC) + disp
Immediate addressing: disp
SIC simple addressing: b/p/e + disp
Simple addressing: addr

S . I N
T U N OTE
K

All of these instructions are LDA.

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 SIC/XE Machine Architecture (12/12)

 Instruction Set
 new registers: LDB, STB, etc.
 floating-point arithmetic: ADDF, SUBF, MULF, DIVF
register move: RMO S . I N
OTE



K T U N
register-register arithmetic: ADDR, SUBR, MULR, DIVR
 supervisor call: SVC
 generates an interrupt for OS

 Input / Output
 SIO, TIO, HIO
 start, test, halt the operation of I/O device

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Complete Instruction Set (1/5)

P: privileged
instruction
X: available
only on XE
S . I N
T U N OTE F: floating-
point
K Instruction
C: condition
code CC set
to indicate
result of
operation

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Complete Instruction Set (2/5)

S . I N
T U N OTE
K

38
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Complete Instruction Set (3/5)

S . I N
T U N OTE
K

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Complete Instruction Set (4/5)

S . I N
T U N OTE
K

40
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Complete Instruction Set (5/5)

S . I N
T U N OTE
K

41
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 SIC & SIC/XE Programming Examples(1/10)

WORD – Integer constant BYTE – Character constant

Immediate addressing
makes the program
S . I N run faster because it

T U N OTE need not fetch five

K from the memory.

RESW - Reserve indicated RESB - Reserve indicated

number of words for a data area number of bytes for a data area
42 42
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 SIC & SIC/XE Programming Examples(2/10)

S . I N
T U N OTE
K

BETA (ALPHA + INCR - 1)

DELTA (GAMMA + INCR - 1)
Fig: Arithmetic operations SIC
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43
SIC & SIC/XE Programming Examples(3/10)
BETA (ALPHA + INCR - 1)
DELTA (GAMMA + INCR - 1)

S . I N
T U N OTE
K

This program will execute faster because

it need not load INCR from memory
each time when INCR is needed. 44
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 SIC & SIC/XE Programming Examples(4/10)
• During 1st loop exec, T.A. for LDCH will be address of 1st byte of STR1
• ll’ly STCH stores copied character into 1st byte of STR2
• TIX 2 operations
• adds 1 to value in register X
• compares new value in register X to value of operand

S . I N
T U N OTE
K

Fig: Looping and indexing SICDownloaded

 Loop copies 11 bit character string to another
from Ktunotes.in
45
 SIC & SIC/XE Programming Examples(5/10)

• Same as TIX. Value for comparison is taken form another register, not
from memory
• Loop efficient, b’coz value not fetched from memory each time the
loop is executed
S . I N
T U N OTE
K

Will execute faster because TIXR need not

Fig: Looping and indexing SIC/XE compare
Downloaded theKtunotes.in
from index value to a memory variable 46
 SIC & SIC/XE Programming Examples(6/10)

• Loop is cumbersome, b’coz register A is used for adding array elements

& for incrementing the index value

S . I N
T U N OTE
K

Fig: Looping & indexing SIC Gamma[] Alpha[] + Beta[]

Downloaded from Ktunotes.in
47
 SIC & SIC/XE Programming Examples(7/10)

S . I N
T U N OTE
K

This program will execute faster

because it uses register-to-register
Fig: Looping & indexing SIC/XE add to reduce memory accesses. 48
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 SIC & SIC/XE Programming Examples(8/10)
• Reads 1byte from device F1 & copies to device 05
• Operand for RD is a byte in memory, containing the hexadecimal code
for input device
• Executing RD transfers 1byte data from device F1 to Right Most Byte of
register A
• Before RD is executed, input device must be ready to transmit, by
checking TD instruction
• When TD is executed, status of addressed device is tested & condition
code set to indicate result.
S . I N
•If device ready, CC is “less than”, else “equal”
T U N OTE • Output too performed the
K same way
• 1st TD checks, if O/P
device is ready to receive a
byte
• Byte written into Right
Most Byte of register A
• WD to transmit data to
device

49
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SIC & SIC/XE Programming Examples(9/10)
• Read operation placed in a subroutine
• Subroutine called from main using JSUB
• At end of subroutine, RSUB, returns control to instruction following
JSUB
• READ subroutine consists of loop
• TD, CC, then RD

Read 100 byte record into buffer

. I N
OTE S •TIX 2 operations
K T U N
• adds 1 to
value in
register X
• compares
new value in
register X to
value of
operand
Fig: Subroutine
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SIC & SIC/XE Programming Examples(10/10)
• Immediate addressing
• TIXR instruction

S . I N
T U N OTE
K

TIXR makes this program run faster

Fig: Subroutine
Downloaded callKtunotes.in
from & record input operations SIC/XE 51