Test-11-IN - Analog Electronics PDF

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AD
TEST No. - 11 | ANALOG ELECTRONICS
Read the following instructions carefully

1. This question paper contains 33 MCQ’s & NAQ’s. Bifurcation of the questions are given below:
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2. Choose the closest numerical answer among the choices given.

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Multiple Choice Questions : Q.1 to Q.10 carry 1 mark each
Q.1 Consider the circuit shown in the figure below:

D1
1:1
+ –
vin(t ) C1
–
V0
C2
D2
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If the input voltage vin(t) is a sinusoidal signal with a maximum value of Vm, then the steady state output
voltage V0 of the circuit will be equal to (Assume that the diodes are ideal)
(a) 2Vm (b) Vm
(c) –2Vm (d) –Vm
1. (c) EA
(i) For the diode D1 to conduct vin( t ) > 0 (i.e. vin( t ) for positive half-cycle)
D1
+
+
vin(t ) Vm
–
–
(ii) For the diode D2 to conduct vin( t ) < 0 (i.e. vin( t ) for negative half-cycle)
E
– –
vin(t )
+ +
AD
+
Vm
–
D2
Thus at steady state the output voltage can be represented as,
D1
M
+ –
+
vin(t ) Vm
–
–
V0
+
Vm
–
+
D2
∴ V0 = –2Vm
2 • ANALOG ELECTRONICS (Basic Level) www.madeeasy.in © Copyright : MADE EASY

Q.2 Consider the diode circuit shown in the figure below:

D2
D1
+ +
D3
Vin R Vout
– –
If the diodes are ideal and the input voltage is a 1 kHz sine wave with a peak value of 10 V, then the output
waveform can be represented as
Vout Vout
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(a) 10 V (b) 10 V
0 0.5 1 1.5 t(s) 0 0.5 1 1.5 t (s)
Vout
Vout
5V
(c)
0
0.5
1 1.5
EA
t(ms)
(d) 10 V
–5 V 0 0.5 1 1.5 t (ms)
2. (d)
(i) For Vin > 0 V, diode D1 and D2 will conduct and Vout = Vin.
(ii) For Vin < 0 V, diode D1 will be in OFF state. Hence no signal will pass further and V0 = 0 V.
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Q.3 In the circuit shown below, the PNP transistor has ⏐VBE (ON)⏐ = 0.7 V and ⏐VBE (sat)⏐ = 0.8 V. The value of
output voltage is V0 = 2 V. If the value of β of the transistor is very large, then the region of operation of the
AD
transistor will be
5V 4.3 V
RB
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V0
RC
(a) Active region (b) Saturation resistor

(c) Cutoff region (d) Reverse active region

3. (a)
Since β is very large, base current IB can be neglected.
Thus
5V
RB
4.3 V VEB +
–
IB ≈ 0 A
V0 = 2 V
RC
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Applying KVL in base loop, we get,
VEB + 4.3 = 5 V
∴ VEB = 0.7 V
Thus VB = 0.7
Now VC = 2 V
Hence
EA VCB = 2 – 0.7 = 1.3 V
Hence, emitter base junction ⇒ forward biased and collector base junction ⇒ reverse biased.
Thus the transistor is working in forward active region or active region.
Q.4 On which of the following factors, the stability of the Q-point with respect to the reverse saturation current
in an n-p-n transistor mainly depends?
(a) The value of coupling capacitors
(b) Non-sinusoidal input to the transistor
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(c) Change in the temperature of operation

(d) Value of the output voltage of the transistor
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4. (c)
The reverse saturation doubles for every 10° rise in temperature, thus disturbing the Q-point.
Q.5 The MOSFET based circuit shown in the figure below is used for the purpose of small signal analysis. If
Vsig and V0 are small signal input and output voltages respectively, then the circuit represents
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RG
Vsig +
–
–
R V0
+
(a) Common source amplifier (b) Source follower amplifier

(c) Common drain amplifier (d) Common gate amplifier
5. (d)

Q.6 Which of the following figures can be used to represent small signal equivalent circuit model for the
N-MOSFET transistor which includes the effect of channel length modulation?
Id
G D
1/gm gm Vgs
gm Vgs Id
(a) (b) S D
G
S
gm Vgs
Id Is Ig = 0 Id
D S G D
+ +
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Vdg gmVdg r0 Vgs gm Vgs r0
(c) (d)
–
–
S
G
6. (d)
EA
Option (a) and (c) are wrong and option (b) does not include the resistance r0.
Q.7 Consider a bipolar transistor with parameters rπ = 2.6 kΩ, Cπ = 2 pF and Cμ = 0.1 pF. Then the 3-dB
frequency of the common-emitter short-circuit current gain of the bipolar transistor is equal to
(a) 2.915 MHz (b) 182.84 MHz
(c) 29.15 MHz (d) 18.28 MHz
7. (c)
E
1 1
fβ = =
2π rπ (C π + Cμ ) 2π × 2.6 × 10 × (2 + 0.1) × 10 −12
3
AD
fβ = 29.15 MHz
Q.8 The type of feedback topology employed in the circuit shown below is
VDD
+ –
Vi
M
+ – +
VS –
I0
RL
+
Vf R
–
(a) Voltage mixing and voltage sampling (b) Voltage mixing and current sampling
(c) Current mixing and current sampling (d) Current mixing and voltage sampling
8. (b)
In the given circuit the output current is sampled with the help of a resistance R and is converted into a
feedback voltage Vf which is fed in series with the input voltage Vi .

Q.9 Consider the circuit shown in the figure below :

RL
IL
R1
Vi –
+
if the op-amp is ideal, then the circuit can be used as

(a) Current controlled current source (b) Voltage controlled voltage source
(c) Current controlled voltage source (d) Voltage controlled current source
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9. (d)
RL
R1 IL
Vi –
I1
+
EA
In the circuit Vi is the input voltage and I0 is the output current.
Now, Vi induces a current I1 in the circuit and
Vi
I1 = = I0
R1
Thus, I0 ∝ Vi
E
Hence, it is a voltage controlled current source.
Q.10 An inverting amplifier is designed using an ideal op-amp as shown in the figure below:
R2
AD
R1
Vin –
Vout
+
M
It is designed to provide a voltage gain of “– 100 V/V” and an input resistance of 1 kΩ as seen by the
source Vin. Then the probable values of the resistances R1 and R2 will be respectively
(a) 100 kΩ and 10 MΩ (b) 10 kΩ and 1 MΩ
(c) 1 kΩ and 100 kΩ (d) 100 kΩ and 1 kΩ
10. (c)
For an inverting amplifier,
R2
Av = −
R1
∴ 100 R1 = R2
Now, Rin = R1 ∵ the input resistance of an ideal inverting op-amp is equal to R1
∴ R1 = 1 kΩ
Thus R2 = 100 kΩ

Numerical Answer Type Questions : Q. 11 to Q. 16 carry 1 mark each

5 kΩ D
Vout
I0
+ 5 kΩ
10sin(ωt ) V
– A Ammeter
The output current I0 is measured by using an ideal D.C. ammeter. If the diode D is ideal, then the value
of the current that will be displayed by the ammeter will be ________ mA.
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11. 0.318 (0.30 to 0.34)
Since the diode will only allow the positive half cycle of the input signal to flow, the output current will be
the D.C. value of the half wave rectified output.
Imax
Thus, I0 =
π
10
Imax = A = 1 mA
∴ I0 =
1
mA
EA
10 × 103
π
I0 = 0.318 mA
Q.12 A p-n-p transistor based circuit is shown in the figure below with dual DC supply voltages. The value
of ⏐VBE⏐ = 0.7 V and the collector voltage of the transistor is VC = 0 V. If the transistor is in active region,
then the value of supply voltage VEE is equal to ________ V.
E
VCC
AD
RB
10.1 mA
100 µA
VC
M
1 kΩ
VEE
12. –10 (–10.20 to –9.80)

In a BJT, IC + IB = IE
∴ IC = IE – IB
= 10.1 – 0.1 = 10 mA
Given that, VC = 0 V
By applying KVL, we get,
–VC + IC × 1 × 103 + VEE = 0
∴ VEE = –10 × 10–3 × 1 × 103
= –10 V

Q.13 The figure shown below represents two equivalent small signal models of a BJT. The first figure is voltage
controlled current source representation and the second figure is the current controlled current source
representation. If both the models were constructed for the same transistor, then the value of α is ________.
C C
ic ic
0.01vbe αie
ib ib
B + B
re = 98 Ω re = 98 Ω
vbe
ie ie
–
E E
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Fig. 1 Fig. 2
13. 0.98 (0.96 to 1.00)

From figure, the equivalent current sources can be written as,
ic = 0.01 vbe = αi e
v be
⇒ ie = re = 98 Ω
⎛v ⎞
re
EA;
So, α ⎜ be ⎟ = 0.01 vbe

⎝ re ⎠
α = (0.01) re = 0.98
Q.14 In a feedback amplifier for which the open loop gain AOL = 104 and the close loop gain after the negative
feedback ACL = 103. Then the amount of feedback factor ‘β’ that is employed in this scheme is ________ × 10–6.
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14. (900)
AOL
ACL =
AD
1 + β AOL
104
103 =
1+ 104 β
103 + 107 β = 104
104 − 103 9 × 103
β = = = 900 × 10–6
107 107
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Q.15 Consider the ideal op-amp based circuit shown in the figure below:
R
C
vi(t) –
v0(t)
+
V0 (s)
The transfer function of the circuit is equal to = –10s. If the resistance used in the feedback network
Vi (s)
is equal 1 MΩ , then the value of the capacitance (C ) will be equal to ________ μF.

15. (10)
The transfer function can be obtained by taking the circuit in it’s Laplace transform domain as follows:
R
1
sC
Vi (s) –
V0(s)
+
V0 (s) R
Thus, = − = –sCR
Vi (s) 1/ sC
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Now, RC = 10
10
C = = 10 × 10−6 F = 10 μF
1× 106
Q.16 The circuit given in the figure below is constructed using ideal op-amps. The output of the two op-amps
EA
are V01 and V02 for the same input source Vin. Then the value of the ratio
V01
V02
is __________ .
100 kΩ
1 kΩ
–
V01
+
E
10 kΩ
AD
1 kΩ
–
V02
+
Vin
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16. (10)
100
V01 = − Vin = –100Vin
1
10
and V02 = − Vin = –10Vin
1
V01 −100Vin
∴ = = 10
V02 −10Vin

Multiple Choice Questions : Q.17 to Q.26 carry 2 marks each

D
+ R +
Vin Vout
– R –
If the diode D is ideal, then the transfer characteristic curve of the circuit can be represented as
Vout Vout
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1
1
(a) (b)
Vin Vin
1 –1 1
Vout
1
EA Vout
(c) Vin (d)

1
–1
Vin
1
–1 –0.5
E
17. (d)
AD
Case I: when Vin(t ) > 0

The diode will conduct, thus the equivalent circuit can be given as,
Vin Vout
R
M
∴ Vout = Vin
Case II: when the input voltage Vin < 0, The diode will not conduct, thus the equivalent circuit can be given
as,
Vin Vout
R
R
R V
∴ Vout = Vin = in = 0.5Vin
R +R 2

Q.18 An enhancement type NMOS transistor is connected as a load device in the circuit with another MOSFET
as shown in the figure below.
VDD
T1
Vout
Vin T2
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The supply voltage VDD in fixed at 5 V and the input voltage Vin is varied from 0 to 5 V. If both the
transistors have negligible effect of channel length modulation and a threshold voltage VT = 1 V, then
which one of the following figures represents the transfer characteristic of the circuit in a better way?
Vout Vout
5V EA 5V
(a) (b)
Vin Vin
Vout Vout
4V 4V
E
(c) (d)
AD
Vin Vin
18. (d)
Since the configuration represents an invertor MOSFET with an active load, the output will be high for low
values of input signal and low for high values of input signal.
Now, since the load transistor T1 has shorted drain and gate,
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VDS > VGS – VT

0 > –VT
Which is always true hence the transistor T1 will always work in saturation region.
When Vin = 0 V, I D = 0.
Hence, ID = Kn (VGS 1 – VT )
0 = (VGS 1 – VT )
VG1 – VS1 – VT = 0
For transistor T1, VS1 = V0 and VGS1 = VDD = 5 V
Thus, VG1 – V0 – VT = 0
5 – V0 – 1 = 0
–V0 = –4 V
V0 = 4 V
Hence maximum value of output = 4 V.


+
V
IDQ = 0.5 mA
RD = 7 kΩ
R1 = 165 kΩ
V0
Vin +
– R2 = 35 kΩ
RS = 0.5 kΩ
–
V
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μnCoxW
If the transistor parameters are VTN = 0.8 V, = 1 mA/V2 and λ = 0, then the small-signal voltage
2L
gain of the amplifier circuit will be
(a) –1.48 (b) –5.80
(c) –6.63 EA (d) –4.73
19. (b)
⎡μ C W ⎤
gm = 2 ⎢ n ox ⎥ (VGS − VTN )
⎣ 2L ⎦
μnCoxW
or gm = 2 × IDQ
2L
−3 −3
= 2 1 × 10 × 0.5 × 10 = 1.414 mA/ V
E
Thus, considering small signal model, we get,
G D
V0
+
AD
Vin +
– R1⏐⏐R2 Vgs gm Vgs RD
–
S
RS
M
Thus, V0 = –gm Vgs RD

Vin = Vgs + (gm Vgs) RS
Vin = Vgs (1 + gm RS)
V0 −gm RD
Av = =
Vin 1 + gm RS
− (1.414) (7)
Av = = − 5.80
1 + (1.414)(0.5)

Q.20 Consider the amplifier circuit shown in the figure below:

Rin
Rsi CC1 CC 2
V0
Vin + IDQ RD RL
–
RG CG
– –
V V
If the effect of channel length modulation is negligible, then the input resistance Rin of the small signal
equivalent circuit of the amplifier can be expressed as
1
SY
(a) gm (b)
gm
1 1
(c) (RL RD ) (d) Rsi
gm gm
20. (b)
By drawing the small signal equivalent circuit by deactivating all the D.C. supplies, we get,
Rsi
EA
R in
S
gmVgs
D
Ii –
Vgs
Vin + RD RL
– +
G
Now, from the figure,

E
−Vgs
Rin =
Ii
and Ii = –gmVgs
AD
−Vgs 1
∴ Rin = =
−gm Vgs gm
Q.21 An amplifier is assumed to have a single-pole high-frequency transfer function. The upper-3 dB frequency
of the amplifier to a sinusoidal input was experimentally found to be 10 MHz, then the rise time of its
output response to a step input is approximately
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(a) 20 nsec (b) 35 nsec

(c) 60 nsec (d) 100 nsec
21. (b)
0.35 0.35
tr = = = 35 nsec
B.W 10 × 106
Q.22 The multistage configuration that can be used to increase the gain-bandwidth product of C.E. amplifier to
perform video signal amplification is
(a) Cascade configuration (b) Cascode configuration
(c) Darlington configuration (d) None of the above
22. (b)
A cascode configuration is also called a wideband or video amplifier. It decreases the miller capacitive
effect hence increasing the frequency range keeping the gain of C.E. nearly constant.

Q.23 Consider a negative feedback topology as shown in the figure below, with Vin as the input and Vout as the
output of the system.
Vin + A Vout
–
Af is defined as the close loop gain, β is the feedback factor and A is the open loop gain. If we have
A = 105, Af = 10 and β = 0.09999 and the change in the open loop gain due to disturbance is ΔA = 104,
then the value of the corresponding change in the close loop gain is equal to
(a) 1 × 10–5 (b) 5 × 10–5
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(c) 10 × 10 –5 (d) 100 × 10–5
23. (c)
Δ Af 1 ΔA
= ×
Af (1 + A β) A
Substituting the values, we get
Δ Af =
EA 10
×
104
(1+ 0.09999 × 105) 105
= 10 × 10–5

10 kΩ
10 kΩ
+
E
Vout
–
10 kΩ
AD
+ Vin
–
If the op-amp is ideal with the output saturation voltage Vsat = ±10 V, then the transfer characteristic curve
of the circuit can be drawn as
Vout
Vout
10 V
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5V
(a) Vin (b) Vin

–5 V 0 5V –10 V 0 10 V
–5 V
–10 V
Vout
10 V
(c) Vin (d) None of these

–5 V 0 5V
–10 V

24. (a)
For the positive values of Vin, the transfer characteristic curve can be given as,
Vout
10 V
VTH
Vin
–10 V
Vsat 10
Where, VT H = = = 5V
2 2
For negative values of input, the transfer characteristic curve can be given as,
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Vout
10 V
Vin
VTL
EA
−Vsat −10
–10 V
Where, VTL = = = −5 V
2 2
Q.25 Which of the following statements is not correct?

(a) There are three types of multivibrators available.
(b) Op-amp circuit implementation of multivibrators provide high precision.
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(c) A linear oscillator can be realised by placing a frequency selective network in feedback path of an
amplifier.
(d) The circuit will oscillate at the frequency at which the total phase shift around the loop is –180°.
AD
25. (d)
The circuit will oscillate when the total phase shift around the loop at a particular frequency is equal
to 0° or 360°.

1 kΩ Iin IL
M
+
IZ
50 V VZ = 10 V RL
IZ(max) = 20 mA
–
The Zener diode has a Zener breakdown voltage of VZ = 10 V and has the maximum amount of Zener current
IZ (max) = 20 mA. The Zener diode turns on when the voltage of 10 V is applied over it with nearly zero knee
current, then the value of load resistance RL , for proper regulation, should be in the range
(a) RL > 100 Ω (b) 10 Ω < RL < 100 Ω
(c) 250 Ω < RL < 500 Ω (d) 2500 Ω < RL < 500 Ω

26. (c)
The minimum value of load resistance can be calculated when maximum current flows through the load.
Thus, IL (max) = Iin – IZ (min)
Now, IZ (min) = 0 ∵ knee current nearly equal to zero
∴ IL (max) = Iin
50 − 10
Iin = = 40 mA
1kΩ
10 1
∴ RL (min) = × 103 = × 103 = 250 Ω
40 4
Now, for maximum value of load resistance, there should be minimum value of current through the load
∴ IL (min) = Iin – IZ (max)
IL (min) = (40 – 20) × 10–3 = 20 mA
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10
∴ RL (max) = × 103 = 500 Ω
20
Numerical Answer Type Questions : Q.27 to Q.33 carry 2 marks each

EA D
V0
5 mA R
An ideal DC current source is connected to a resistor R through a diode D. The diode D can be replaced
E
by its piecewise linear model when it is forward biased, in which the diode can be modeled as a battery
of 0.7 V in series with a forward resistance of 10 Ω. If the voltage drop across the current source is
measured as 10 V, then the value of load resistance R is equal to ________ kΩ.
AD
27. 1.85 (1.80 to 1.90)

By replacing the diode with its equivalent model, we get,
0.7 V 10 Ω
V0
I0
+
M
5 mA 10 V R
–
V0
Now, R =
I0
V0 = 10 – 0.7 – 10 × 5 × 10–3
V0 = 9.25 V
and I0 = Iin = 5 mA
9.25
∴ R = × 103
5
= 1.85 kΩ

Q.28 Consider a p-n-p transistor based circuit as shown in the figure below:
5V
3.3 kΩ
56 kΩ
1.2 V 5.1 kΩ
–5 V
If the value of ⏐VBE (ON)⏐ = 0.7 V and the value of β = 100, then the value of the voltage VCE for the transistor
SY
will be equal to ________ V.
28. – 3.287 ((–

– 3.50 to – 3.10)
By applying KVL in loop (1), we get, 5V
5 – 3.3 × 103 × I E – 0.7 – I B × 56 × 103 – 1.2 = 0 ...(1)
Now, IE = (β + 1) I B
EA
Thus substituting it in equation (1), we get,
5 − 0.7 − 1.2
Loop - 1
VEB
+
3.3 kΩ
IE
–
IB = mA –
56 + (101)3.3 VCE
IB
+
IB= 7.963 µA 56 kΩ IC
IC= β I B = 100 × 7.963 µA = 0.796 mA 5.1 kΩ
1.2 V
and IE
= I B + IC = 0.804 mA
E
Now, VC= –5 + I C RC
–5 V
= –5 + 5.1 × 103 × 0.796 × 10–3
= –0.940 V
AD
and VE = 5 – RE I E
= 5 – 3.3 × 103 × 0.804 × 10–3
VE = 2.347 V
Thus VCE = VC – VE
= –0.940 – 2.347 = –3.287
μnCoxW
M
Q.29 The figure shown below represents a MOS transistor with Kn = = 10 mA/V2. The figure is
2L
constructed for the purpose of the small signal analysis. If the MOSFET is biased at a D.C. current
ID of 10 mA and a small signal input voltage of Vsig = 1 mV is applied, then the small signal output
voltage (V0) will be equal to ________ V.
(Assume that the effect of channel length modulation is negligible)
+
Rsig
10 kΩ V0
Vsig + –
–

29. – 0.20 ((–

– 0.25 to – 0.15)
To calculate the small signal equivalent of the MOSFET, we need to find the value of gm .
Now, gm = 2 K n ID
Given, Kn = 10 mA/V2
∴ gm = 2 × 10 × 10 −3 × 10 × 10−3
gm = 20 mA/V
Therefore, the small signal equivalent,
Rsig
+ +
V0
Vsig + Vgs gm Vgs
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– RD
–
–
∴ V0 = –gm RD Vgs
but Vgs = Vsig
∴
EA
V0 = –gm RD × Vsig
= –20 × 10–3 × 10 × 103 × 1 × 10–3 V
= – 200 mV
thus, V0 = –0.20 V
Q.30 A transistor amplifier is fed with a signal source having an open circuit voltage Vsig of 10 mV and an
E
internal resistance Rsig of 100 kΩ. The input voltage Vin and the output voltage V0 are measured both
without and with load resistance RL = 10 kΩ connected to the amplifier output. The measured results are
as follows:
AD
+ +
R0
Vin V0 Vin Rin + AV 0 Vin V0
–
Without RL 9 mV 90 mV
– –
With RL connected 8 mV 70 mV
M
Fig. 1 Fig. 2
If the transistor is modeled as shown in the Fig. 2, then the value of output resistance R0 of the amplifier
is ________ kΩ.

30. 1.43 (1.20 to 1.60)

The amplifier can be modeled as shown in the figure:
RL +
Now, Vout = AV 0 Vin × Rsig + R0
RL + R0
Vsig Rin Vin + AV0 Vin RL
–
Where, A V 0 = voltage gain when RL was not connected
–
90 –
Thus, AV 0 = = 10 V/ V
9
Vout RL
= AV 0 ×
Vin RL + R 0
70 10 × 103
= 10 ×
8 10 × 103 + R0
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⇒ R0 = 1.43 kΩ
Q.31 Consider the circuit shown in the figure below. The circuit is constructed to increase the value of driving
output current of the circuit. It consists of three transistors with β1 = 100, β2 = 50 and β3 = 20. The biasing
circuit is omitted for the simplicity but it is ensured that all the three transistors are working in active
region with negligible effect of base width modulation. If the input current to the first transistor is
EA
10 µA, then the value of output current (Iout) will be ________ A.
Iin
β1 Iout
β2
E
β3
AD
31. 1.03 (0.90 to 1.15)

M
Iin β1 Iout
β2
I1
β3
I2
Now, I1 = (β1 + 1) Iin

⇒ I2 = (β2 + 1) I1 = (β2 + 1) (β1 + 1) Iin
Iout = β3 I2 = β3 (β2 + 1) (β1 + 1) Iin
= 20 (51) (101) × 10 × 10–6
= 1.03 A

1 kΩ
1V –
V0
+
The input to the ideal op-amp is given as 1 V, the MOSFET which is connected in the feedback path has
μnCoxW
= 10 mA/V2 and a threshold voltage V T = 1 V. If the effect of channel length modulation of the
2L
SY
MOSFET is negligible, then the output voltage (V0) will be equal to ________ V.
32. –1.316 (–1.40 to –1.25)
1
Iin = = 1 mA ID
1 × 103
–
Now, since the op-amp is ideal, VGS
V 0 = –VGS
EA
ID = Iin = 1 mA
1V
Iin 1 kΩ
–
+
V0
Now, ID = Kn (VGS – VT)2 +
1 × 10–3 = 10 × 10–3 (VGS – VT)2
1
= (VGS – VT)2
10
E
1 1
VGS = + VT = 1+ = 1.316V
10 10
V 0 = – VGS = –1.316 V
AD
Now,
Q.33 An IC-555 is connected by an external resistance and capacitors as shown in the figure below. It is
constructed to provide an output pulse with a duration of 0.825 ms, when a negative trigger pulse is
applied at the second pin (2) of the IC. If the value of resistor R = 7.5 kΩ, then the value of the capacitor C,
connected between pin (6) and ground, is equal to ________ μF.
M
VCC
R 8 4
7
555
6 IC 3 Out
C 2 1 5
0.001 μF
Trigger

33. 0.10 (0.08 to 0.12)

The IC-555 is connected as a pulse-strecher/mono-stable configuration. Thus for a mono stable configuration,
the pulse width Tw can be given as,
Tw = 1.1 RC
Given that, Tw = 0.825 × 10–3 sec
and R = 7.5 kΩ
0.825 × 10 −3
Thus, C =
1.1× 7.5 × 103
= 0.10 μF

SY
EA
E
AD
M

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TEST No. - 11 | ANALOG ELECTRONICS

Read the following instructions carefully

2. Choose the closest numerical answer among the choices given.

Multiple Choice Questions : Q.1 to Q.10 carry 1 mark each

Q.1 Consider the circuit shown in the figure below:

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Q.2 Consider the diode circuit shown in the figure below:

0 0.5 1 1.5 t(s) 0 0.5 1 1.5 t (s)

–5 V 0 0.5 1 1.5 t (ms)

(a) Active region (b) Saturation resistor

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(c) Change in the temperature of operation

(a) Common source amplifier (b) Source follower amplifier

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Q.9 Consider the circuit shown in the figure below :

if the op-amp is ideal, then the circuit can be used as

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Numerical Answer Type Questions : Q. 11 to Q. 16 carry 1 mark each

Q.11 Consider the circuit shown in the figure below:

12. –10 (–10.20 to –9.80)

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13. 0.98 (0.96 to 1.00)

So, α ⎜ be ⎟ = 0.01 vbe

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Multiple Choice Questions : Q.17 to Q.26 carry 2 marks each

Q.17 Consider the circuit shown in the figure below:

(c) Vin (d)

Case I: when Vin(t ) > 0

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VDS > VGS – VT

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Q.19 Consider the circuit shown in the figure below:

Thus, considering small signal model, we get,

Thus, V0 = –gm Vgs RD

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Q.20 Consider the amplifier circuit shown in the figure below:

Now, from the figure,

(a) 20 nsec (b) 35 nsec

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Q.24 Consider the circuit shown in the figure below:

(a) Vin (b) Vin

(c) Vin (d) None of these

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Q.25 Which of the following statements is not correct?

Q.26 Consider the circuit shown in the figure below:

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Numerical Answer Type Questions : Q.27 to Q.33 carry 2 marks each

Q.27 Consider the circuit shown in the figure below:

27. 1.85 (1.80 to 1.90)

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28. – 3.287 ((–

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29. – 0.20 ((–

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30. 1.43 (1.20 to 1.60)

31. 1.03 (0.90 to 1.15)

Now, I1 = (β1 + 1) Iin

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Q.32 Consider the circuit shown in the figure below:

32. –1.316 (–1.40 to –1.25)