EHB232 NETWORK AND SYSTEM ANALYSIS

2019-2020 SPRING SEMESTER FINAL EXAM

• Students will solve the final exam version corresponding to their last digit of their ITU Student ID Number as explained
below:

– last digit of Student ID Number 0 or 1 → Final Exam Version A

– last digit of Student ID Number 2 or 3 → Final Exam Version B
– last digit of Student ID Number 4 or 5 → Final Exam Version C
– last digit of Student ID Number 6 or 7 → Final Exam Version D
– last digit of Student ID Number 8 or 9 → Final Exam Version E

If a student submit solutions for a wrong final exam version based on the last digit of the Student ID Number, his/her final
exam will be invalid.
• The exam is open-book and open-lecture notes. Exams are exclusive to students and they are expected to work on the
solutions on their own. The students are expected to abide with the ITU Honor Code
http://www.sis.itu.edu.tr/tr/yonetmelik/AkademikOnurSozuEsaslar.html
• Solutions in PDF format are required to be uploaded to the Ninova system before the exam period ended. There will not be
extra time for uploading the solutions.
• Each page of the solution papers has to be numbered and should have name, last name and Student ID number on top right
corner.

• The lecturer will open a Zoom session at the beginning of the exam for announcements and questions about the exam. The
Zoom session will end at the end of exam period.
• By uploading the solutions, students here confirm that they have understood the instructions and will act accordingly.
• The instructions are also valid for the students that are taking their additional exam.

1
 FINAL EXAM E
This final exam will be solved by only the students with a Student
ID number ending with 8 or 9.
1. The circuit in Figure 1 will be analysed in sinusoidal steady state.
(a) Determine Z1 and Z2 impedances.
(b) Determine Thevenin equivalent circuit to the left of the terminals A-B.
(c) Find the value of load impedance to absorb maximum average power.
(d) Find the complex power of the load you determined in (c) and point out the active and reactive powers.
2. Analyse the circuit shown in Figure 2 in s-domain with vC (0) = 1V and iL (0) = 0A initial conditions and find zero input and
zero state solutions for vC (t).
XC (s)
3. (a) Find T (s) = Xg (s) transfer function by reducing the block diagram shown in Figure 3 for Ki and Hi s.
(b) Find the positions of roots of the denominator polynomial of T (s) in s-plane by using Routh table (Routh-Hurwitz
criteria) for K1 = 1s , K2 = 1s , H1 = 2 and H2 = s12 .
(c) Analyse the stability of the system and explain your findings.
4. Find the h parameters of the circuit which includes ideal operational amplifier and shown in Figure 4.

Z1
1
3 F 1F
1Ω 1
A 3Ω

v0 i1
+ - iL
+ + vC -
+ +
2 cos 3t vb2 = i1 +
− 1 u(t) y = − 12 vC
- 1Ω 3 H −
ib1 = v0 - 1H

Z2
Figure 2:

Figure 1:

K2 3Ω
+ 5Ω
+ I1 I2
+
+
+ + + −
K1 Xc (s)
Xg (s)
+ + 1H
2F
H1 V1 V2

1Ω
H2 - -

Figure 3: Figure 4: