18LN07 NANOFABRICATION

TUTORIAL 1 – QUANTIFICATION OF MASK DEFECTS

SUSITHRA. S

(19PN08)

Dissertation submitted in partial fulfillment of the requirements for the

degree of

MASTER OF TECHNOLOGY

Branch: ELECTRONICS AND COMMUNICATION ENGINEERING

Specialization: NANOSCIENCE AND TECHNOLOGY

of Anna University

APRIL 2020

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING PSG

COLLEGE OF TECHNOLOGY
(Autonomous Institution)
COIMBATORE – 641 004

Submitted to
Dr.M.Alagappan,
Assistant Professor (SI. Gr.),
Date: 07-04-2020 Department of electronics and communication engineering
APPLICATION OF DBM TOOL FOR QUANTIFICATION OF MASK
DEFECT:
1. INTRODUCTION:
Chip makers have been struggling to accomplish the Moore’s law but it does not look quite
promising anymore. Various kinds of patterning technology have been introduced in recent
years not only lithography also double patterning, imprinting, DSA and etc. Among these
technologies, the most possible solution that covers down to 1xnm node device is thought to
be Extreme Ultra Violet Lithography so far. According to ITRS Lithography 2012, EUVL
technology needs to be ready for qualification and pre-production by 2013~2014. However,
the schedule might be delayed. It is very important to shrink device node because it can
continuously improve productivity. Figure.2 shows that ITRS Lithography 2012 latest updates.
There still remain many challenges to utilize EUVL for production Fab. EUV-specific mask,
especially, defect free mask availability has been regarded in the last several years as one of
the top priorities for EUV high volume manufacturing (HVM). (1)
Unfortunately, however, infrastructure for securing the defect free photomask such as mask
inspection tool is still under development furthermore it does not seem to be ready soon. In this
study, an alternative wafer inspection technique to quantify the number of mask defects will be
discussed to overcome the lack of infrastructure of mask inspection. Secondly, defects which
are not detected by mask inspection tool, particularly for contacts, will be discussed because
these are thought to be blank defects (substrate or multilayer defect) due to relatively larger
MEEF than L&S. Experiments were carried out on 3x nm half pitch contact layer and metal
layer using Teron(KLA6xx) and DBM (Design Based Metrology) tool, NGR2170™. Exposed
wafer for both contact and metal layer was prepared by NXE3100. Before the two evaluations,
programmed defect test which demonstrates the sensitivity of an inspection tool was also
carried out.
2. NGR-SYSTEM SPECIFICATION
Well known Design Based Metrology Tool NGR System could be utilized for the application
by taking its basic advantages such as
1 “Massive Data but Fast “ - Parallel image processing by cluster PC
2 “ Easy to identify the repeating defect” – Ultra precision XY stage & Sub-nano
matching performance
The major concepts of this system which is provided through NGR cooperation are shown in
details. [Figure 1]
• Electron Beam Based System
• Die-to-Database Inspection of wafer features
• Step and Repeat Image Acquisition
• High pixel Count (8K*8K)
The NGR-system can acquire large amounts of data with high resolution in large FOV (Field
Of View; area size covered by one scan), and the results have good repeatability. The unique
features of the NGR-system are listed below.
 • High Scan Rates
• High Beam Current
• Low Sample Damage
• High Speed Real-Time Algorithms
• Ultra high accuracy GDS overlay, for 2D Metrology

Figure 1: Basic concept of NGR system

3. PROGRAMMED DEFECT TEST:
Programmed defect test that demonstrates the sensitivity of an inspection tool was carried out.
Experiments were carried out on 3x nm half pitch contact layer and metal layer using
Teron(KLA6xx) and DBM (Design Based Metrology) tool, NGR2170™. 3.1 Programmed
Defect Test Defect sensitivity test is essential for metrology tool to guarantee its outcomes.
According to ITRS Lithography 2012, required contact size after etch has been becoming
smaller, it will be down to 28nm in 2013. It is about 5.6nm on the wafer with 20% of CD
tolerance and need to be covered by metrology tool. In this experiment, four types of defect
have been evaluated and these defects are illustrated in figure.4 such as extrusion defect, bridge
between two contacts (Intrusion), small CD and big CD. Layout size of each defects (C~J) was
varied from 0 to enough. Sensitivity of NGR system is compared to another defect inspection
tools which are E-beam based and optical based die to die inspection tool . As it can be shown
in table1, down to 13nm (1x) of layout change is noticeable in NGR system for defect type A.
The performance of the system is superior than the others around 3nm layout changes for Type
A (extrusion). It has similar performance for three other types of programmed defect such as
2nm, 3.5nm, 3.5nm layout changes for Type B, C and D. Overall, ±5nm CD variation on the
wafer was noticeable by NGR system.
 Figure 2: Types of Programmed defects
4. CELL ARRAY CONTACT
The first experimental procedure of this study is mask defect inspection. It was carried out
using KLA(Teron 6xx) which is based on 193nm light source. Secondly, the mask defect was
reviewed on FEM wafer by NGR system. It is a simple method to indentify repeating defect
through the multiple fields because printability of defects differently reveal into various
conditions such as defect height, size, reflectivity and exposure condition. Thirdly, an internal
parameter for wafer inspection well matched between mask defect inspection result and wafer
inspection results is determined and an entire contact in 4G chip was scanned by the parameter.
After full chip inspection, these are filtered out from all CD data in full chip. Then, the defect
list from full chip inspection was reviewed against nine multi-fields to identify whether it is
repeating mask-defect or not.

Figure 3: Experimental Procedure

As a result, 42ea of defects were filtered out from 344ea of mask defects by pin-point review
through the multifield. Based on these results, 22% of contact CD variation was selected for
full chip inspection. It is the optimum value of internal parameter of the system which can
cover noise level. Figure.3 shows that experimental procedure for cell array contact and
Figure.4 shows that 1st Pin-points review results on the wafer with mask inspection results.
 Figure 4: 1st Pin-points review results on the wafer with mask inspection results.
After the full chip inspection carried out, 1100ea of contact holes were out of the range
determined by internal parameter (±22%). Among these outliers, 64 defects were identified as
repeating mask defect by pin-point review through the multi-field. 5 of 64 defects were known
by the first repeating check in advance. 4 of 64 defects were detected in more than 4 fields and
the rest of defects were detected in more than 3 fields. 2nd Pin-points review results on the
wafer with full-chip inspection result are shown in Figure.5

Figure 5: 2nd Pin-points review results on the wafer with full-chip inspection results.
5 defects detected by mask inspection tool is thought to be absorber defect on the mask surface
since those were noticeable by both mask and wafer inspection(by NGR-system). However, 59
defects were not found in mask inspection. These are probably blank defects (substrate or
multilayer). As a pattern becomes smaller, small variation of mask such as defect height, size
and reflectivity can be more sensitive to CD variation on the wafer. It results in difference
between mask inspection and NGR result on the wafer. The evaluation summary for cell array
contact is shown below figure 6.

Figure 6: Evaluation summary for cell array contact.

5. METAL LINE:
In metal line case, pitch is bigger than contact hole and it has normally smaller MEEF than
contact hole. It means that CD uniformity or LWR of metal line is relatively more stable than
contact. It leads a big difference to wafer inspection result where the substrate or multilayer
defect is located. As it was previously introduced, the experimental procedure is almost same
as the contact hole case. It was carried out using Teron (KLA 6xx) and NGR-system. As a
result, after mask defect inspection, 112ea mask defects in the full chip was collected then, 6
of them were filtered out as repeating defect from the defect list by pin-point review through
the multi-field. Based on these results, 25% of contact CD variation was selected for full chip
inspection. It is the optimum value of internal parameter of the system which can cover noise
level. Figure.7 shows that 1st Pin-points review result on the wafer with mask inspection results
for metal line.

Figure 7: 1st Pin-points review results on the wafer with mask inspection results (Metal)
However, there was no additional defect which is spec-out of the selected parameter(25%) in
full chip. It shows that substrate or multilayer defect on metal line is rarely printed on wafer.
After mask cleaning, the first 3 steps of evaluation procedure carried out again in order to verify
defect level of EUV mask. 35 defects were filtered out from 52 of mask defect list. 67% defects
of mask defects were printed on the wafer. It means that most of them are absorber defects and
it also means that mask inspection tool using 193nm light source is possible to optimize its
sensitivity and reliability based on NGR system. Figure.10 shows that 2nd pin-points review
result on the wafer with mask inspection results for metal line. Figure.9 shows that Evaluation
summary for metal line.

Figure 8: 2nd Pin-points review results on the wafer with mask inspection results (Metal)
 Figure 9: Evaluation summary for metal line
6. CONCLUSION:
In order to overcome a lack of mask defect inspection tool, alternative method using DBM tool
has been suggested. It is very important but challenging for metrology to quantify the real
printable defects in EUV lithography field. It takes some time and labours but it becomes
necessary to pick out the printable defects using wafer inspection tool and repair them until
AIMS is prepared for EUVL technology development. In summary, 64 of repeating defects
were found in the full chip inspection for cell array contacts. 59 defects of them were detected
in only wafer level and it is thought to be substrate or multilayer defects. Then, total defects of
the mask are estimated to reach around 430. In metal line case, 35 of 52 defects were detected
in both mask and wafer inspection. It means that an absorber defects are majority in metal line
case. The result of experiments shows us that our approach for quantifying the printable mask
defects is applicable by feedback the defect information from wafer level. It is quite simple
work for DBM tool both verifying defect list from mask inspection tool and providing exact
coordinates for the mask repairment. On the other hands, this approach does not cover the all
defects on the mask but the printable defects. It is mainly focused on the defect which is
printable on the wafer and providing its information to repair them. It was also confirmed that
optimizing sensitivity and reliability of the mask inspection tools is available with wafer
inspection result.
References:
[1] Neisser, M. and Wurm, S., 2012. ITRS lithography roadmap: status and
challenges. Advanced Optical Technologies, 1(4), pp.217-222.
[2] Lee, T., Kim, J., Yoo, G., Park, C., Yang, H., Yim, D., Park, B., Maruyama, K. and
Yamamoto, M., 2012, April. Application of DBM System to overlay verification and
wiggling quantification for advanced process. In Metrology, Inspection, and Process
Control for Microlithography XXVI (Vol. 8324, p. 83241B). International Society for
Optics and Photonics.
[3] Yoo, G., Kim, J., Park, C., Lee, T., Ji, S., Yang, H., Yim, D., Park, B., Maruyama, K. and
Yamamoto, M., 2013, April. Application of DBM tool for detection of EUV mask defect.
In Metrology, Inspection, and Process Control for Microlithography XXVII (Vol. 8681, p.
868121). International Society for Optics and Photonics.