Registers

A register is a group of flip-flops can store 1-bit

information. So an n bit register has a group of n

flip-flops and is capable of storing any binary

information
 Buffer Register

A B C D

Clock

A B C D
 Controlled Buffer Register
A B C D

Clock

A B C D
 Shift Register
the binary information (data) in a register can be
moved from stage to stage within the register or
into or out of the register upon application of clock
pulses. This type of bit movement or shifting is
essential for certain arithmetic and logic operations
used in microprocessors. This gives rise to a group
of registers called (SHIFT REGISTERS)
 Right Shift Register
Data Bits

Data Bits

Left Shift Register

 Types of Shift Register
1. Serial In Serial Out Shift Register

Serial Out

Serial In

Clock

Right Shift Register

 Serial In Serial Out Shift Register

o/p i/p

Clock

Left Shift Register

 Bidirectional Shift Register
SHR/SHL

Right Left
I/P I/P

Left
O/P
Right
Clock
O/P
 Counters
Counters are circuits, which can be used to
count a number of input pulses
Flip-flops are used as basic building blocks of
counters. the highest count that a counter
circuit can count is given by the equation below
Maximum count = 2N
N is the number of flip-flops in the circuit
 Sales

111 000

011 100

101 010

001 110
Clock periods Q1 Q2 Q2 count
0 0 0 0 0
1 1 0 0 1
2 0 1 0 2
3 1 1 0 3
4 0 0 1 4
5 1 0 1 5
6 0 1 1 6
7 1 1 1 7
8 0 0 0 0
Basically counters are made from JK flip-flops
operating in toggle mode . Counters are divided
in two types :

1. Asynchronous counters
2. Synchronous counters
 1. Asynchronous counters
Count

Clock

Q1 Q2 Q3 Q4
 Outputs States of 4 flip-flops

CLK

QO

Q1

Q2

Q3
 2. Synchronous Counters

Count

Clock

Q1 Q2 Q3 Q4
 Counters skipping few states of its
natural count
Mode -10 counter
 MODE -10 COUNTER

Count

CLK
 Counter cct that Count up
to 999

Hundreds Tens Units

Decade counter Decade counter Decade counter CLK

7 segment driver 7 segment driver 7 segment driver

 Down Counter
Count

Preset

Clock

QO Q1 Q2 Q3
CLK
QO

Q1

Q2

Q3
 Up-Down Counter

Up –Down

Count
Pre set

Clock

QO Q1 Q2 Q3
 Ring Counter
QO Q1 Q2 Q3 Q4 Q5

Clock
State Diagram

010000
000010
 Output Waveform for 6-bit Ring
Counter

QO

Q1

Q2

Q3

Q4

Q5
 Johnson Counter
QO Q1 Q2 Q3 Q4 Q5

Clock
State Diagram
Output Waveform