Professional Documents
Culture Documents
CONTENTS(目次)
SPECIFICATIONS(総合仕様)................................................... 4
DIMENSIONS(寸法図) .......................................................... 13
PANEL LAYOUT(パネルレイアウト).................................. 14
CIRCUIT BOARD LAYOUT(ユニットレイアウト)............... 23
DISASSEMBLY PROCEDURE(分解手順)............................ 28
INSTALLING AN OPTIONAL CARD
(オプションカードの取り付け)............................................ 46
LSI PIN DESCRIPTION(LSI端子機能表)................................ 47
IC BLOCK DIAGRAM(ICブロック図).................................. 58
CIRCUIT BOARDS(シート基板図)....................................... 65
INSPECTIONS(検査)................................................... 103/109
DM1000/MB1000 SERVICE CHECK PROGRAM
(DM1000/MB1000サービス検査プログラム).................. 115/129
MB1000 TEST PROGRAM
(MB1000テストプログラム)........................................ 143/144
INITIALIZING THE DM1000(DM1000の初期化)................. 145
TRANSMITTING PARAMETER SETTINGS VIA MIDI (BULK DUMP)
(内部設定をMIDI経由で出力(バルクダンプ機能)).... 146/148
CHECKING THE BATTERY AND THE SYSTEM VERSION
(バッテリーの残量やシステムのバージョンの確認).......... 150
CALIBRATING THE FADERS
(フェーダーのキャリブレーション)................................... 150
MIDI DATA FORMAT(MIDIデータフォーマット)............... 151
MIDI IMPLEMENTATION CHART
(MIDIインプリメンテーションチャート)............................ 166
このサービスマニュアルはエコパルプ PARTS LIST
(ECF:無塩素系漂白パルプ)を使用しています。
BLOCK DIAGRAM(ブロックダイアグラム)
このサービスマニュアルは大豆油 OVERALL CONNECTOR CIRCUIT DIAGRAM
インクで印刷しています。
(総コネクタ接続回路図)
This document is printed on chlorine free (ECF) paper with soy ink.
CIRCUIT DIAGRAM(回路図)
PA 011681
DM1000: 200303-600000 HAMAMATSU, JAPAN 1
MB1000: 200303-105000 1.329K-6554 Printed in Japan ’03.03
SP1000: 200303-35000
DM1000/MB1000/SP1000
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in per-
sonal injury, destruction of expensive components and failure of the product to perform as specified. For
these reasons, we advise all Yamaha product owners that all service required should be performed by an
authorized Yamaha Retailer or the appointed service representative.
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certifi-
cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship of
any form.
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and
service departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable
and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to
exist, please contact the distributor’s Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have
accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to
this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power
to the unit.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT
SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose
eyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling
food.
WARNING
Components having special characteristics are marked and must be replaced with parts having specification equal to those
originally installed.
印の商品は、安全を維持するために重要な部品です。交換する場合は、安全のために必ず指定の部品をご使用下さい。
2
DM1000/MB1000/SP1000
リチウム電池の取り扱い
<注意>
リチウム電池を誤って交換すると爆発する危険があります。交換する場合は、サービスマニュアルで指定された部品を
使用してください。
3
DM1000/MB1000/SP1000
SPECIFICATIONS(総合仕様)
General Spec(一般仕様)
Number of scene memories 99
Internal 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz
Sampling Frequency Normal rate: 44.1 kHz–10% to 48 kHz+6%
External
Double rate: 88.2 kHz–10% to 96 kHz+6%
fs=48 kHz Less than 1.6 ms CH INPUT to OMNI OUT
Signal Delay
fs=96 kHz Less than 0.8 ms CH INPUT to OMNI OUT
Fader 100 mm motorized with touch sense x 17
+10 to –138, –∞ dB (1024 steps/100 mm) input faders
Fader Resolution
0 to –138, –∞ dB (1024 steps/100 mm) master faders, stereo fader
Less than 0.05% 20 Hz to 20 kHz @ +14 dB into 600 Ω
Total Harmonic Distortion *1 fs=48 kHz Less than 0.01% 1 kHz @ +24 dB into 600 Ω
(CH INPUT to OMNI OUT)
(Input Gain=Min.) Less than 0.05% 20 Hz to 40 kHz @ +14 dB into 600 Ω
fs=96 kHz
Less than 0.01% 1 kHz @ +24 dB into 600 Ω
Frequency Response fs=48 kHz 20 Hz–20 kHz, 0.5, –1.5 dB @ +4 dB into 600 Ω
(CH INPUT to OMNI OUT) fs=96 kHz 20 Hz–40 kHz, 0.5, –1.5 dB @ +4 dB into 600 Ω
110 dB typ. DA Converter (OMNI OUT)
Dynamic Range
106 dB typ. AD+DA (to OMNI OUT) @ fs=48 kHz
(maximum level to noise level)
106 dB typ. AD+DA (to OMNI OUT) @ fs=96 kHz
–128 dB Equivalent Input Noise
–86 dB residual output noise. OMNI OUT (STEREO OUT off)
Hum & Noise*2 Input Gain=Max. –86 dB (90 dB S/N) OMNI OUT
(20 Hz–20 kHz) Input Pad =0 dB (STEREO fader at nominal level and all CH INPUT faders at minimum level)
Rs=150 Ω
Input Pad =0 dB
–64 dB (68 dB S/N) OMNI OUT
Input Sensitivity
(STEREO fader at nominal level and one CH INPUT fader at nominal level)
=–60 dB
Maximum Voltage Gain 74 dB CH INPUT (CH1–16) to OMNI OUT (STEREO, BUS, AUX)
Crosstalk 80 dB adjacent input channels (CH1–16)
(@ 1 kHz)
Input Gain=Min. 80 dB input to output
4
DM1000/MB1000/SP1000
Input patch —
Phase Normal/reverse
On/off
Gate-type *3
Key in: 12 ch Group (1–12, 13–24, 25–36, 37–48)/AUX1–8
On/off
4
Comp-type* Key in: self /Stereo Link
Pre EQ/pre fader/post fader
Attenuator –96.0 to +12.0 dB (0.1 dB step)
4-band PEQ (TYPE1) *5
EQ
On/off
Delay 0–43400 samples
On/off —
Input Channel CH1–48
Fader 100 mm motorized (INPUT/AUX1–8)
On/off
Aux send
AUX1–8; pre fader/post fader
On/off
Solo
Pre fader/after pan
Pan 127 positions (Left= 1–63, Center, Right= 1–63)
127 × 127 positions
Surround pan
[(Left= 1–63, Center, Right= 1–63)] , [(Front= 1–63, Center, Rear= 1–63)]
LFE level –∞, –96 dB to +10 dB (256 step)
Routing STEREO, BUS1–8, DIRECT OUT
Direct out Pre EQ/pre fader/post fader
Displayed on LCD
Metering
Peak hold on/off
Level control Analog rotary potentiometer
24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-
AD converter
TALKBACK sampling (@fs=44.1, 48 kHz)
Talkback select Built-in microphone/AD IN 1–16/OMNI IN 1–4
On/off —
Level 0 to –96 dB (1 dB step)
On/off —
OSCILLATOR
Waveform Sine 100 Hz, sine 1 kHz, sine 10 kHz, 400 Hz/1 kHz, pink noise, burst noise
Routing BUS1–8, AUX1–8, STEREO L, R
STEREO OUT DA converter 24-bit linear, 128-times oversampling
STEREO, BUS1–8, AUX1–8, SURROUND MONITOR, CONTROL ROOM,
DIRECT OUT 1–48, INSERT OUT (CH1–48, BUS1–8, AUX1–8, STEREO),
Output patch
MONITOR MATRIX OUT, SOLO OUT, CASCADE OUT (BUS1–8, AUX 1–8,
OMNI OUT 1–12
STEREO, SOLO)
24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-
DA converter
sampling (@fs=44.1, 48 kHz)
On/off
Dither
Word length 16, 20, 24-bit
2TR OUT DIGITAL 1–2
STEREO, BUS1–8, AUX 1–8, CONTROL ROOM, DIRECT OUT 1–48, INSERT
Output patch OUT (CH 1–48, BUS 1–8, AUX 1–8, STEREO), SOLO OUT, CASCADE OUT
(BUS 1–8, AUX 1–8, STEREO, SOLO)
Available card Optional digital interface card (MY16, MY8, MY4 series)
STEREO, BUS1–8, AUX 1–8, SURROUND MONITOR, CONTROL ROOM,
DIRECT OUT 1–48, INSERT OUT (CH 1–48, BUS 1–8, AUX 1–8, STEREO),
Option Output (SLOT 1–2) Output patch
MONITOR MATRIX OUT, SOLO OUT, CASCADE OUT (BUS 1–8, AUX 1–8,
STEREO, SOLO)
On/off
Dither
Word length 16/20/24-bit
5
DM1000/MB1000/SP1000
On/off
Comp-type*4
Pre EQ/pre fader/post fader
Attenuator –96.0 to +12.0 dB (0.1 dB step)
4-band PEQ *5
EQ
On/off
On/off —
STEREO
Fader 100 mm motorized
Balance 127 positions (Left=1–63, Center, Right=1–63)
Delay 0–29100 samples
Displayed on LCD
Metering Peak hold on/off
32-elements x2 LED meters
On/off
Comp-type*4
Pre EQ/pre fader/post fader
Attenuator –96.0 to +12.0 dB (0.1 dB step)
4-band PEQ *5
EQ
On/off
On/off —
BUS1–8 Fader 100 mm motorized
Delay 0–29100 samples
Level (–∞, –130 dB to 0 dB)
Bus to stereo On/off
Pan: 127 positions (Left=1–63, Center, Right=1–63)
Displayed on LCD
Metering
Peak hold on/off
On/off
Comp-type*4
Pre EQ/pre fader/post fader
Attenuator –96.0 to +12.0 dB (0.1 dB step)
4-band PEQ *5
EQ
On/off
AUX1–8
On/off —
Fader 100 mm motorized
Delay 0–29100 samples
Displayed on LCD
Metering
Peak hold on/off
Mute On/off
Solo On/off
Source BUS1–8, SLOT 1–2
Monitor to C-R On/off
Oscillator Pink noise/500–2 kHz/1 kHz
SURROUND MONITOR
6.1→6.1, 6.1→5.1, 6.1→3-1, 6.1→ST, 5.1→5.1, 5.1→3-1, 5.1→ST,
Monitor matrix
3-1→3-1, 3-1→ST
Bass
5 presets
management
Monitor
ATT (–12.0 dB to 12 dB 0.1 dB step), Delay (0–30.0 msec 0.02 msec step)
alignment
Bypass On/off
8-in, 8-out (EFFECT1): depends on effects type
INTERNAL EFFECTS In/out
2-in, 2-out (EFFECT2–4): depends on effects type
(EFFECT 1–4)
Effect-in from AUX1–8/INSERT OUT/effect-out (out 1, 2 only)
Effect-out 1, 2 to Input patch/effect-in
6
DM1000/MB1000/SP1000
EQ Parameters(EQ パラメーター)
LOW/HPF L-MID H-MID HIGH /LPF
0.1–10.0 0.1–10.0
(41 points) 0.1–10.0 (41 points)
Q
low shelving (41 points) high shelving
HPF LPF
F 21.2 Hz–20 kHz (1/12 oct step)
±18 dB ±18 dB
±18 dB
G (0.1 dB step) (0.1 dB step)
(0.1 dB step)
HPF: on/off LPF: on/off
8
DM1000/MB1000/SP1000
Libraries(ライブラリー)
Presets 52 (EFFECT 2–4: 44)
Effect library (EFFECT 1–4)
User memories 76
Presets 36
Compressor library
User memories 92
Presets 4
Gate library
User memories 124
Presets 40
EQ library
User memories 160
Presets 2
Channel library
User memories 127
Presets 1
Surround Monitor library
User memories 32
Presets 1
Input patch library
User memories 32
Presets 1
Output patch library
User memories 32
Presets 1
Bus to Stereo library
User memories 32
*1. Sensitivity is the lowest level that will produce an output of +4 dB (1.23 V) or the nominal output level when the unit
is set to maximum gain. (All faders and level controls are maximum position.)
*2. XLR-3-31 type connectors are balanced (1=GND, 2=HOT, 3=COLD).
In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.
All input AD converters (INPUT 1–16, OMNI INPUT 1–4, TALKBACK) are 24-bit linear, 128-times oversampling. (@fs=44.1,
48 kHz)
+48 V DC (phantom power) is supplied to CH INPUT (1–16) XLR type connectors via individual switches.
9
DM1000/MB1000/SP1000
10
DM1000/MB1000/SP1000
11
DM1000/MB1000/SP1000
REMOTE Port(リモート端子)
Pin Signal Pin Signal
1 GND 6 RX+/GND *1
2 RX–/RX– *1 7 RTS/RX+ *1
3 TX–/TX+ *1 8 CTS/TX– *1
4 TX+/GND *1 9 GND
5 N.C.
1. RS422 (for AD824)/SONY 9 pin protocol (P2)
CONTROL Port(コントロール端子)
Pin Signal Pin Signal
1 GPO0 14 GPO1
2 GPO2 15 GPO3
3 GPO4 16 GPO5
4 GPO6 17 GPO7
5 GND 18 GND
6 GND 19 GND
7 GND 20 GND
8 GND 21 +5V
9 +5V 22 GPI0
10 GPI1 23 GPI2
11 GPI3 24 N.C.
12 N.C. 25 N.C.
13 N.C.
12
DM1000/MB1000/SP1000
DIMENSIONS(寸法図)
Top view Front view
32
154
436(Included Screw heads)
355
87
154
Side view
200
Units: mm
280 156
(単位)
101 374
565
585
Side view
295
Units: mm
(単位)
635
13
DM1000/MB1000/SP1000
PANEL LAYOUT(パネルレイアウト)
DM1000
Control Panel(コントロールパネル)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON OFF
+48V
ON
Headphones
& Talkback
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Section
PAD
20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB
0
TALKBACK LE VEL
10
(p. 19)
(ヘッドフォン/
-16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 0 10
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
GAIN
PEAK
PHONES
LEVEL
PHONES
トークバックセクション)
SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL
SELECTED CHANNEL
DISPLAY ACCESS ROUTING EQUALIZER MONITOR
OVER
0
OVER
0
DISPLAY DISPLAY DISPLAY
MONITOR
Section (p. 20)
AUTOMIX DIO SETUP UTILITY
-2 -2 1 2 HIGH SOLO CLE AR
-4 -4
Q
MIDI REMOTE METER VIEW
-6
-8
-6
-12
-10
-12
5 6 LOW MID SLOT BUS
-18
-14
-18
FREQUENCY
0 10
MONITOR
PAN/ -24 -24 7 8 LOW DIMMER TALKB ACK LEVEL
(AUX 選択
SURROUND DYNAMICS
AUX SELECT
EFFECT SCENE
(ディスプレイセクション) -30
-36
-30
-36
GAIN
セクション) DISPLAY
-48
-56
-48
-56
DEC INC
-72 -72
AUX2 AUX3 AUX4
L R
GRAB
モードセクション) SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL AUTO
SCENE MEMORY
FADER MODE Section (p. 18)
SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SOLO SEL
(シーンメモリーセクション)
Section (p. 16) ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON ON
(フェーダーモード 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
0
5
5
(p. 18)
10
10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
15
(レイヤーセクション)
10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 10 20 20
15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 15 30 30
20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 20 40 40
30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 30 50 50
40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 40 60 60
70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70
50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 50 70
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 33 18 34 19 35 20 36 21 37 22 38 23 39 24 40 25 41 26 42 27 43 28 44 29 45 30 46 31 47 32 48
AUX 1 AUX 2 AUX 3 AUX 4 AUX 5 AUX 6 AUX 7 AUX 8 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 BUS 8 STEREO
Channel Strip Section (p. 15) STEREO Section (p. 16) USER DEFINED KEYS
(チャンネルモジュールセクション) (ステレオセクション) Section (p. 19)
(ユーザー定義キーセクション)
14
DM1000/MB1000/SP1000
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
+48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V
OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
PAD
20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB 20dB
-16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60 -16 -60
GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN GAIN
PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK PEAK
SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL SIGNAL
SEL
SOLO
ON
q Encoders 1-16 (エンコーダー 1 ∼ 16)
1
w [SEL] buttons 1-16 (セレクト キー 1 ∼ 16)
e [SOLO] buttons 1-16(ソロ キー 1 ∼ 16)
+10 0
r [ON] buttons 1-16 (オン キー 1 ∼ 16)
5
t Channel faders 1-16(チャンネル フェーダー 1 ∼ 16)
5
0
10
5
15
10 20
15 30
20 40
30 50
40 60
70
50
1
17 33
AUX 1
15
DM1000/MB1000/SP1000
STEREO Section(ステレオセクション)
AUTO
SEL
ON
20
30
40
50
60
70
STEREO
AUX SELECT
DISPLAY
ENCODER MODE
AUX
w [FADER] indicator (フェーダー インジケーター)
e [AUX] indicator ([AUX] インジケーター)
16
DM1000/MB1000/SP1000
OVER OVER
0 0
-2 -2
-4 -4
-6 -6
-8 -8
-10 -10
-12 -12
-14 -14
-18 -18
-24 -24
-30 -30
-36 -36
-42 -42
-48 -48
-56 -56
-72 -72
L R
F1 F2 F3 F4
q Display (ディスプレイ)
w Stereo meters (ステレオメーター)
e Contrast control (コントラスト調整ノブ)
r [F1]-[F4] buttons ([F1]∼[F4] キー)
t Left Tab Scroll [ ] button (タブスクロール[ ] キー)
y Right Tab Scroll [ ] button(タブスクロール[ ] キー)
17
DM1000/MB1000/SP1000
LAYER Section(レイヤーセクション)
SCENE MEMORY
18
DM1000/MB1000/SP1000
DISPLAY
DEC INC
q Parameter wheel (パラメーターホイール)
w [ENTER] button (エンター キー)
e [DEC] & [INC] buttons ([DEC]/[INC] キー)
r Left, Right, Up, Down (カーソル 左、右、上、下
([ ]/[ ]/[ ]/[ ]) ([ ]/[ ]/[ ]/[ ])キー)
cursor buttons
ENTER
19
DM1000/MB1000/SP1000
MONITOR Section(モニターセクション)
DIMMER TALKBACK
MONITOR
LEVEL
[BUS] button (バス キー)
o [DIMMER] button (ディマー キー)
!0 [TALKBACK] button (トークバック キー)
!1 [MONITOR LEVEL] control(モニターレベル コントロール)
16 15 14 13 12 11 10 9 INPUT 8 7 6 1 5 4 3 2 1
4 3 OMNI 2 1
IN 12 11 10 9 8 7 6 1 5 4 3 2 1
SLOT SLOT
POWER
ON
OFF AC IN METER SMPTE IN
Power Section (p. 21) Digital I/O & Control Section (p. 21) SLOT Section (p. 21)
(電源セクション) (デジタル イン/アウト、
コントロールセクション) (スロットセクション)
16 15 14 13 12 11 10 9 INPUT 8 7 6 1 5 4 3 2 1
4 3 OMNI 2 1
IN 12 11 10 9 8 7 6 1 5 4 3 2 1
20
DM1000/MB1000/SP1000
SLOT Section(スロットセクション)
SLOT SLOT
METER SMPTE IN
Power Section(電源セクション)
POWER
ON
OFF AC IN
21
22
INPUT METERING POSITION OUTPUT METERING POSITION TIME CODE PEAK METER BRIDGE MB1000 FOR
PRE EQ PRE FADER POST FADER PRE EQ PRE FADER POST FADER MEASURE BEAT CLOCK MB1000
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PEAK HOLD
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 H M S F
AUX 1 AUX 2 AUX 3 AUX 4 AUX 5 AUX 6 AUX 7 AUX 8 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 BUS 8 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 BUS 8
OVER OVER OVER 1 -16 REMOTE 1 OVER OVER
0 0 0 0 0
-3 -3 -3 -3 -3
-6 -6 -6 -6 -6
DM1000/MB1000/SP1000
-9 -9 -9 -9 -9
-12 -12 -12 17-32 REMOTE 2 -12 -12
-15 -15 -15 -15 -15
-18 -18 -18 -18 -18
-24 -24 -24 -24 -24
-30 -30 -30 -30 -30
-36 -36 -36 -36 -36
-48 -48 -48 33-48 MASTER -48 -48
Controls(コントロール類)
i Bus meters
u Level meters
(バス メーター)
(レベル メーター)
q Channel indicators
(タイムコード ディスプレイ)
(チャンネル インジケーター)
w [INPUT METERING POSITION] indicators
(アウトプットメーターポジション インジケーター)
<Top view>
OPT
DCA 1/5
MAIN
Power transformer
(電源トランス)
DCD
<Rear view>
DCA 4/5
DCA 3/5
OPT
DCA 2/5
AC
JK2 JK1
23
DM1000/MB1000/SP1000
<Top view>
JK2
JK1 AC
DCA 1/5
MAIN
Power transformer
(電源トランス)
DCD
<Rear view>
AC
JK2 JK1
24
DM1000/MB1000/SP1000
XLR
HAAD 2/2
HAAD 1/2
ADA
<Rear view>
XLR
25
DM1000/MB1000/SP1000
<Bottom view>
PN1 (1/4)
PN1
(2/4) LCD
PN1
(3/4)
PN1
(4/4)
PN2 FD
26
DM1000/MB1000/SP1000
MB1000
PN
MAIN
27
DM1000/MB1000/SP1000
DISASSEMBLY PROCEDURE(分解手順)
Note: Take care not to trap your fingers. 注意:作業中は指を挟まない様に注意してください。
SP1000
(Side pad)
SP1000
(MB side pad) [A]
MB1000
Meter angle L, R
(メーターアングルL, R)
[B]
[C]
DM1000
Rear assembly U
Stay(ステイ) (リア上Ass'y)
(WA963600)
Stay(ステイ)
(WA963600)
Bottom assembly
(ボトムAss'y) Bottom assembly
(ボトムAss'y)
[70A] [70A]
[40B] [40B]
[60A]
[60A]
Bottom assembly
(ボトムAss'y)
[40A]
Fig.2 (図2) 29
DM1000/MB1000/SP1000
7. DCA 2/5, 3/5 and 4/5 Circuit Boards 7. DCA 2/5、3/5、4/5 シート
(Time required: About 10 minutes each) (所要時間:各約 10 分)
7-1. Remove the SP1000. (See procedure 1.) 7-1. SP1000 を取り外します。 (1 項参照)
7-2. Remove the MB1000. (See procedure 2.) 7-2. MB1000 を取り外します。(2 項参照)
7-3. Fasten the control panel assembly. (See procedure 3.) 7-3. コンパネ Ass'y を固定します。 (3 項参照)
7-4. Fasten the rear assembly U. (See procedure 4-4.) 7-4. リア上 Ass'y を固定します。 (4-4 項参照)
7-5. Remove the screw marked [335]. The DCA 2/5 circuit 7-5. [335]のネジ 1 本を外して、DCA 2/5 シートを外し
board can then be removed. (Fig.3, Photo.6) ます。 (図 3、写真 6)
The DCA 3/5 and 4/5 circuit boards can be ※ DCA 3/5、4/5 シートも同様に外せます。
removed in the same manner.
30
DM1000/MB1000/SP1000
31
DM1000/MB1000/SP1000
DCA 2/5
OPT angle
(OPT金具)
OPT
<Front view>
[411]
DCD
Photo.4 (写真4)
DCD [410]
IF plate(IFプレート)
<Rear view>
OPT
32 Fig.3 (図3)
DM1000/MB1000/SP1000
<Top view>
[130A]
JK1 JK2
AC shield plate
(ACシールド金具)
MAIN
[285]
[12C]
[60B]
Power transformer
(電源トランス)
Lithium Battery(リチウム電池)
Battery VN103500
VN103600(Battery holder for VN103500)
[285]
[280]
Fig.4 (図4)
33
DM1000/MB1000/SP1000
34
DM1000/MB1000/SP1000
[255]
AC Locking card spacer
(ロッキングカード
Ferrite core スペーサ)
(フェライトコア)
[290A]
Photo.8 (写真8)
[290B]
[290B]: Bind Head Tapping Screw-S (+バインド S タイト) 4.0X8 MFZN2BL (VI693100)
Photo.10 (写真10)
35
DM1000/MB1000/SP1000
ADA
[30]
Fig.5 (図5)
36
DM1000/MB1000/SP1000
<Rear view>
[120A] [120A] [120A] [120A] [120A] [120A] [120A] [120A]
XLR
[120A] [110B]
[130B] [130B]
[120A] [120A] [110B] [110B] [110B] [110B] [110B] [110B]
[130B] [130B] [130B]
<Top view> [180]
XLR
[190]
HAAD 1/2
[240A]
Fig.6 (図6)
PC support(PCサポート)
<Top view> <Top view>
Insulation sheet
(放熱シート)
Knob x18
Shield fingers
(ノブ)
(接触子)
38
DM1000/MB1000/SP1000
<Top view>
<Top view>
HAAD 1/2
Photo.13 (写真13)
39
DM1000/MB1000/SP1000
25. PN1 (1/4), (2/4 Meter), (3/4 Joystick) and 25. PN1 (1/4)、(2/4 メーター)、(3/4 ジョイス
(4/4 Encoder) Circuit Boards ティック)、(4/4 エンコーダー) シート
25-1. Remove the SP1000. (See procedure 1.) 25-1. SP1000 を取り外します。 (1 項参照)
25-2. Remove the MB1000. (See procedure 2.) 25-2. MB1000 を取り外します。(2 項参照)
25-3. Fasten the control panel assembly. (See procedure 3.) 25-3. コンパネ Ass'y を固定します。 (3 項参照)
25-4. Remove the FD circuit board. (See procedure 23.) 25-4. FD シートを外します。(23 項参照)
25-5. PN1 (3/4 Joystick) Circuit Board 25-5. PN1 (3/4 ジョイスティック)シート
(Time required: About 9 minutes): (所要時間:約 9 分) :
Remove the three (3) screws marked [218]. The PN1 [218]のネジ 3 本を外して、PN1 (3/4 ジョイス
(3/4 joystick) circuit board can then be removed. ティック)シートを外します。(図 9)
(Fig.9) 25-6. PN1 (4/4 エンコーダー)シート
25-6. PN1 (4/4 Encoder) Circuit Board (所要時間:約 10 分):
(Time required: About 10 minutes): a. [220A]のネジ3本を外して、エンコーダーツマミと
a. Remove the three (3) screws marked [220A]. The 共に PN1 (4/4 エンコーダー)シートを外します。
PN1 (4/4 encoder) circuit board can then be removed (図 9、写真 14)
with the encoder knob. (Fig.9, photo.14) b. エンコーダーツマミと特殊六角ナットを外して、
b. Remove the encoder knob and the hexagonal nut. PN1 (4/4 エンコーダー)シートからエンコーダーア
The encoder angle bracket can then be removed ングルを外します。 (写真 14)
from the PN1 (4/4 encoder). (photo.14) 25-7. PN1 (2/4 メーター)シート(所要時間:約 10 分):
25-7. PN1 (2/4 Meter) Circuit Board a. LCD シールド板を外します。 (24-4 項参照)
(Time required: About 10 minutes): b. [120D]のネジ 2 本を外して、PN1 (2/4 メーター)
a. Remove the LCD shield plate. (See procedure 24-4.) シートを外します。 (図 9)
b. Remove the two (2) screws marked [120D]. The PN1 25-8. PN1 (1/4)シート(所要時間:約 12 分):
(2/4 meter) circuit board can then be removed. (Fig.9) a. コントロールパネル面より、 [300]のエンコーダーノ
25-8. PN1 (1/4) Circuit Board ブ3個と[310]のエンコーダーノブ16個、[350B]のノ
(Time required: About 12 minutes): ブ 1 個を外します。(図 8)
a. Remove the three (3) encoder knobs marked [300], b. PN1 (4/4 エンコーダー)シートを外します。
the sixteen (16) encoder knobs marked [310] and (25-6-a 項参照)
the knob marked [350B] from the control panel side. c. [220B]のネジ 14本を外して、PN1 (1/4)シートを外
(Fig. 8) します。 (図 9)
b. Remove the PN1 (4/4 encoder) circuit board.
(See procedure 25-6-a.)
c. Remove the fourteen (14) screws marked [220B].
The PN1 (1/4) circuit board can then be removed.
(Fig. 9)
<Top view>
[300]:
Encoder knob
(エンコーダーノブ)
[350B]: Knob(ノブ)
Fig.8 (図8)
41
DM1000/MB1000/SP1000
<Bottom view>
[220B] [120D]
PN1 (1/4)
PN1
(2/4 Meter)
[220B]
LCD
PN1
(3/4 Joystick)
[218] [220B]
[220A]
PN1
(4/4 Encoder)
Encoder angle bracket
(エンコーダーアングル)
Cord holder
[220A] (インシュロックタイ)
Cord holder
(インシュロックタイ)
[220B]
Insulation sheet
(絶縁シート)
[240B] PN2 FD
Cord holder
(インシュロックタイ)
Cord holder
(インシュロックタイ)
[260]
Fig.9 (図9)
[120B]
LCD
[80]
<Bottom view>
Photo.18 (写真18)
PN1 2/4
[120C]: Bind Head Tapping Screw-B (+バインドBタイト)
3.0X8 MFZN2BL (EP600190)
43
DM1000/MB1000/SP1000
31. DSUB Cable (Time required: About 4 minutes) 31. DSUB ケーブル(所要時間:約 4 分)
31-1. Remove the MB1000. (See procedure 2.) 31-1. MB1000 を取り外します。(2 項参照)
31-2. Remove the rear panel. (See procedure 28.) 31-2. リアパネルを外します。 (28 項参照)
31-3. Remove the screw marked [70C]. The cable holder 31-3. [70C]のネジ 1 本を外して、ケーブルホルダーを外
can then be removed. (Photo.19) します。 (写真 19)
31-4. Remove the bushing from the rear panel. (Photo.20) 31-4. ワンタッチブッシュをリアパネルから外します。
31-5. Remove the DSUB cable and the bushing from the (写真 20)
rear panel. (Photo.19) 31-5. ワンタッチブッシュと DSUB ケーブルをリアパネ
The bushing is not part of the DSUB cable. ルから外します。 (写真 19)
When you replace the DSUB cable, you should ※ワンタッチブッシュはDSUBケーブルの構成部品
remove the bushing from the cable, and attach ではありません。DSUBケーブルを交換する際に
in the new cable. は、 ケーブルからワンタッチブッシュを取り外し
て、新しいケーブルに取り付けてください。
44
DM1000/MB1000/SP1000
Front panel(フロントパネル)
<Left side view> <Front view> <Right side view>
[40C]
<Bottom view> [40C]
[40C]
<Rear view>
Rear panel(リアパネル)
[50]
<Rear view>
PN
Cable holder
(ケーブルホルダー)
[70C]
MAIN
<Front view>
[70B]
Meter angle L
(メーターアングルL)
Bushing
Meter angle R DSUB cable (ワンタッチブッシュ)
(メーターアングルR) (DSUBケーブル)
Photo.20 (写真20)
Photo.19 (写真19)
45
DM1000/MB1000/SP1000
1 Make sure that the power to the DM1000 is turned off. 1 DM1000 の電源がオフになっていることを確認します。
2 Undo the two fixing screws and remove the slot 2 スロットの固定ネジをゆるめ、スロットカバーを取り
cover, as shown below. 外します。
Keep the cover and fixing screws in a safe place for 取り外したスロットカバーは、安全な場所に保管して
future use. ください。
5
3 OM
N 14
IN I
2
13
1
12
12 11
11 10
DIG
10 9
MO ITAL INP
PO DE MIX UT
W L D IN 9 8
ON ER M1 G C
OF 000 ON
F SO
LE
8 7
AC 7 6
IN
6 5
5 4
ME SL
TE OT
R 3
4
CO
NT
SM
PT 3 2
RO E IN
L
2 1
RE 1
MO
TE
SL
OT
MID
OU I
T
IN
TO
H
USOST
B WO
RD
CL
OC
OU
K
T
IN
1
2T
DIGR IN
2 ITA
AE L
S/E 2
BU
CO 1
AX
IAL
CO
AX
IAL
AE
S/E
BU
3 Insert the card between the guide rails and slide it 3 スロット内のガイドレールにカードの両端を合わせ、
all the way into the slot, as shown below. カードをスロットに挿入します。
You may have to push firmly to fully insert the card into このとき、カードの端子部分がスロット内部の端子に
the internal connector. 正しくはまるようカードをいっぱいまで押し込んでく
ださい。
5
3 OM
N 14
IN I
2
13
1
12
12 11
11 10
DIG
10 9
MO ITAL INP
PO DE MIX UT
WE L D IN 9 8
ON R M1 G C
000 ON
OF SO
F LE
8 7
AC 7 6
IN
6 5
5 4
ME SL
TE OT
R 3
4
CO
NT
SM
PT 3 2
RO E IN
L
2 1
RE 1
MO
TE
SL
OT
MID
OU I
T
IN
TO
H
USOST
B WO
RD
CL
OC
OU
K
T
IN
1
2T
DIGR IN
2 ITA
AE L
S/E 2
BU
CO 1
AX
IAL
CO
AX
IAL
AE
S/E
BU
46
DM1000/MB1000/SP1000
47
DM1000/MB1000/SP1000
48
DM1000/MB1000/SP1000
49
DM1000/MB1000/SP1000
50
DM1000/MB1000/SP1000
51
DM1000/MB1000/SP1000
52
DM1000/MB1000/SP1000
53
DM1000/MB1000/SP1000
CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter) MAIN: IC605, 606
PIN PIN
NAME I/O FUNCTION NAME I/O FUNCTION
NO. NO.
2
1 SDA/CDOUT I/O Serial control data I/O (I C) / Data out (SPI) 15 TCBL I/O Transmit channel status block start
2 AD0//CS I/O Address bit 0 (I2C) / Control port chip select (SPI) 16 NC3
3 AD2 I Address bit 2 (I2C) 17 NC4 Not used
4 RXP I Auxiliary AES3 Receiver port 18 NC5
5 DGND2 Digital ground 19 INT O Interrupt
6 VD2+ Positive digital power supply (+5V) 20 U I/O User data
7 DGND4 21 OMCK I Master clock
Digital ground
8 DGND3 22 DGND Digital ground
9 /RST I Reset 23 VD+ Positive digital power supply (+5V)
10 NC1 24 H//S I Hardware/software control mode select
Not used
11 NC2 25 TXN O Differential line drivers
12 ILRCK I/O Serial audio input left/right clock 26 TXP O
13 ISCLK I/O Serial audio bit clock 27 AD1/CDIN I Address bit 1 (I2C) / Serial control data in (SPI)
14 SDIN I Serial audio data port 28 SCL/CCLK I Control port clock
54
DM1000/MB1000/SP1000
55
DM1000/MB1000/SP1000
56
DM1000/MB1000/SP1000
MB1000
57
DM1000/MB1000/SP1000
DM1000
TC74VHC00F (XT229A00) HD74LV02AFPEL (IS000200) TC74VHC04F-EL (XM332A00)
MAIN: IC138 MAIN: IC020-022 MAIN: IC131
SN74HC00NSR (XE165A00) Quad 2 Input NOR Hex Inverter
FD: IC106
Quad 2 Input NAND
1A 1 14 VDD 1Y 1 14 VDD
1A 1 14 VDD
1B 2 13 4B 1A 2 13 4Y
1Y 2 13 6A
1Y 3 12 4A 1B 3 12 4A
2A 3 12 6Y
2A 4 11 4Y 2Y 4 11 4B 4 11
2Y 5A
2B 5 10 3B 2A 5 10 3Y 5 10
3A 5Y
2Y 6 9 3A 2B 6 9 3A 6 9
3Y 4A
Vss 7 8 3Y Vss 7 8 3B Vss 7 8 4Y
1B 4B 1B 2 13 1C 1Y 2 13
2 13 6A
1Y 4A 2A 3 12 1Y 2A 3 12
3 12 6Y
2Y 4 11 5A
2A 4 11 4Y 2B 4 11 3C
3A 5 10
2B 5 10 3B 2C 5 10 3B 5Y
6 9
2Y 6 9 3A 2Y 6 9 3A 3Y 4A
GND 7 8 4Y
VSS 7 8 3Y VSS 7 8 3Y
1A 1 14 Vcc 1A 1 14 Vcc
1CLR 1 14 VCC
1B 1C 1B 2 13 4B
CLR
2 13
1D 2 D 13 2CLR
2A 3 12 1Y 1Y 3 12 4A
CLR
3 D 12
1CK CK 2D
2B 4 11 3C 2A 4 11 4Y
1PR 4 PR CK 11 2CK
2C 5 10 3B 2B 5 10 3B
1Q 5 Q 10
PR 2PR
2Y 6 9 3A 2Y 6 9 3A
6 Q 9
1Q Q 2Q
GND 7 8 3Y GND 7 8 3Y
GND 7 Q 8 2Q
INPUTS OUTPUTS
PR CLR CLK D Q Q
L H X X H L
H L X X L H
L L X X H H
H H f H H L
H H f L L H
H H L X QO QO
58
DM1000/MB1000/SP1000
S
1B 2 15 1 Rext / Cext Select B 2 B Y0 15 YO 1A 2 1A G 15 STROBE
1 3 CLR 14 Cext C 3 C Y1 14 Y1 1B 3 1B 4A 14 4A
1Q 4 Q Q 13 1Q G2A 4 G2A Y2 13 Y2 1Y 4 1Y 4B 13 4B
Output
2Q 5 12 2Q Enable 5 G2B Y3 12 5 2A 4Y 12
Q Q G2B Y3 2A 4Y
3Y
7 10 Y7 Y5
Y6
TC74HC238AF (XT163A00)
PN1: IC101
3 to 8 Line Decoder
A 1 16 Vcc
Select
B 2 15 Y0
Inputs
C 3 14 Y1
G2A 4 13 Y2
Enable Data
Inputs G2B 5 12 Y3 A 1 16 Ycc
Output
B 2 15 Y0
G1 6 11 Y4
C 3 14 Y1
Y7 7 10 Y5
G2A 4 13 Y2
GND 8 9 Y6 G2B 5 12 Y3
G1 6 11 Y4
Y7 7 10 Y5
GND 8 9 Y6
1A2 4 17 2A4 4 17 A3 4 17 Y2
2D D CK CK D 7D
CL CL
2Y3 5 16 1Y2 5 Q Q 16 A4 5 16 Y3
2Q 7Q
1A3 6 15 2A3 3Q 6 Q Q 15 6Q A5 6 15 Y4
CL CL
2Y2 7 14 1Y3 3D 7 D CK CK D 14 6D A6 7 14 Y5
4D 8 13 5D A7 8 Y6
1A4 8 13 2A2 D CK CK D 13
CL CL
4Q 9 Q Q 12 5Q A8 9 12 Y7
2Y1 9 12 1Y4
GND 10 11 CLOCK
(GND) Vss 10 11 2A1 GND 10 11 Y8
59
DM1000/MB1000/SP1000
TC74VHC245F (XT487A00)
Output
MAIN: IC102-106, 113-116, 132, 133, Control
1 20 Vcc Channel IN/OUT 4 1 CH4 VDD 16 +DC Voltage Supply
314, 901 2 D Q 19
D0 Q0 - do. - 6 Channel IN/OUT 2
JK1: IC302, 402-404 CK OE
2 CH6 CH2 15
D6 8 D Q 13 Q6 - do - 8 VSS C 9 - do. - C
1 CK OE
D1R 20 Vcc
D7 9 D Q 12 Q7
2 19 CK OE
A1 G
GND 10 11 Clock
18
A2 3 B1
4 17
A3 B2
5 16
A4 B3
6 15
A5 B4
TC74HC4052AF (XS790A00) HD74LV4053AFPEL (IS405300)
A6 7 14
B5
FD: IC205, 502, 506 JK1: IC201, 202
A7 8 13
B6 Differential 4-channel Triple 2-Channel
A8 9 12 B7 Multiplexer/Demultiplexer Multiplexer/Demultiplexer
GND 10 11 B8
Switches IN/OUT
0Y 1 16 VDD Y1 1 Y1 VDD 16 +DC Voltage Supply
0Y
A1 3 2 B 22 /G 1C 3 14 2E 2R 3 14 1R
A2 4 3 D 21 B1 1D 4 13 2D 2S 4 13 1Y
A3 5 4 D 20 B2 1E 5 12 2C 2A 5 12 3A
A4 6 5 G2 19
B3 1F 6 11 2B 2B 6 11 3S
A5 7 6 G1 18 B4 1Y 7 10 2A 2Y 7 10 3R
A6 8 7 15 17 B5 GND 8 9 2Y GND 8 9 3Y
A7 9 8 14 16 B6
A8 10 9 13 15
B7
GND 11 10 12 14 B8
11
GND 12 13 GND
60
DM1000/MB1000/SP1000
2A 6 11 2Z INPUT C 6
+ 11 OUTPUT D
7 10 INPUT C 7 - 10
2B 2Y + INPUT D
-
GND 8 9 2D GND 8 9 INPUT D
NC 1 5 VCC
IN B 1 5 Vcc IN B 1 5 Vcc
IN A 2
IN A 2 IN A 2
GND 3 4 OUT Y
GND 3 4 OUT Y GND 3 4 OUT Y
MC26LS30DR2 (XL334A00)
JK1: IC002
Line Driver
61
DM1000/MB1000/SP1000
CY2305 (XY937A00)
MAIN: IC003
Clock Buffer
Block Diagram
8
PLL MUX CLKOUT
1 3 Pin No. Signal Function
REF CLKA1
2 REF 1 8 CLK OUT 1 REF Input reference frequency, 5V-tolerant input
CLKA2 2 CLK2 Buffered clock output
5 CLK2 2 7 CLK4 3 CLK1 Buffered clock output
CLKA3
7 4 GND Ground
CLK1 3 6 VDD
CLKA4 5 CLK3 Buffered clock output
3 4
6 VDD 3.3V supply
GND 5 CLK3
S2 CLKB1 7 CLK4 Buffered clock output
Select Input 2 8 CLKOUT Buffered clock output, internal feedback on this pin
CLKB2
Decoding 5
S1 CLKB3
7
CLKB4
Q2 Q S
8 CD
µPC4570G2 (XF291A00)
NC 2 13 OUTPUT1 ADA: IC153, 154, 253, 254, 353, 354,
Q1 R
GND1 3 12 OUTPUT1
453, 454, 553, 554, 653, 654,
Es 2 7 SI 751-753, 851-853
+INPUT1 4
+ 11 +V Ipk HAAD: IC001, 002, 005, 006, 101, 102,
- CT OSC 201, 202, 301, 302, 401, 402,
-INPUT1 5 10
- -INPUT2 CT 3 501, 502, 601, 602, 701, 702,
COMP
-V 6
+
9 VREF
6 V+ 801, 802, 901, 902, A01, A02,
+INPUT2
1.25V B01, B02, C01, C02, D01, D02,
OUTPUT2 7 8 GND2 E01, E02, F01, F02, G01, G02
GND 4 5 INVIN Dual Operational Amplifier
Output A 1 +V 8
+DC Voltage
Supply
Inverting
2 7 Output B
Input A - +
Non-Inverting 3 6
Inverting
Input A + - Input B
-DC Voltage Supply 4 -V 5 Non-Inverting
Input B
14 OUT D
Supply A B
Inverting - -
2 7 Output B -IN A 2 - + 13 -IN D
Input A - +
+ -
Non-Inverting 3 6
Inverting 1 2 3 4 5 6 7 8
+ - Input B +IN A 3 12 +IN D
Input A
Ground 4 -V 5 Non-Inverting OUT -IN +IN -V +IN -IN OUT +V
Input B A A A B B B +VDD 4 +V GND 11 -VSS
+IN B 5 10 +IN C
- +
6 + -
-IN B 9 -IN C
OUT B 7 8 OUT C
62
DM1000/MB1000/SP1000
TLC2932IPWR (XV064A00)
MAIN: IC143
PLL
LOGIC VDD FIN-B PFD INHIBIT VCO INHBIT VCO VDD VCO OUT SELECT
1 5 9 10 14 3 2
BLAS CONTROL
VCO OUTPUT
VCO OUT 3 12 VCOIN 1/2
MUX
FIN-A 4 11 VCO GND
6 9
PFD OUT PFD INHIBIT
LOGIC GND 7 8 NC
7 4 6 12 13 11 8
LOGIC GND FIN-A PFD OUT VCOIN RBIAS VCO GND NC
63
DM1000/MB1000/SP1000
MB1000
TC74HC238AF (XT163A00)
MAIN: IC109
3 to 8 Line Decoder
A 1 16 Vcc
Select
B 2 15 Y0
Inputs
C 3 14 Y1
G2A 4 13 Y2
Enable Data
Inputs G2B 5 12 Y3 A 1 16 Ycc
Output
B 2 15 Y0
G1 6 11 Y4
C 3 14 Y1
Y7 7 10 Y5
G2A 4 13 Y2
GND 8 9 Y6 G2B 5 12 Y3
G1 6 11 Y4
Y7 7 10 Y5
GND 8 9 Y6
D1R 1 1 IN 1 16 IN8
20 Vcc 1B 16 Vcc
2 19 OUT1 2 15 OUT8
A1 G 1A 2 15 1D
18
A2 3 B1 3 14 IN2 3 14 IN7
1R 1Y
4 17 RN6006
A3 B2 1DE 4 13 1Z OUT2 4 13 OUT7
Vcc
16
10kΩ
A4 5 B3 5 12
2R 2DE
INPUT
Vcc Vcc
6 15
A5 B4 2A 6 11 2Z
A6 7 14
B5 2B 7 10 2Y OUT3 5 12 OUT6
A7 8 13
B6 GND 8 9 2D IN3 6 11 IN6 OUTPUT
A8 9 12 B7 OUT4 7 10 OUT5
GND 10 11 B8
IN4 8 9 IN5
GND 1 16 VDD
R - EXT 15 I - REG.
SERIAL - IN 2 15 R - EXT
ENABLE 13
LATCH 4 13 ENABLE
Q Q Q
OUT 0 5 12 OUT 7
ST D ST D ST D
OUT 1 6 11 OUT 6
LATCH 4
CK CK CK OUT 3 8 9 OUT 4
CLOCK 3
64
DM1000/MB1000/SP1000
CIRCUIT BOARDS(シート基板図)
DM1000
DCCOM (AC) Circuit Board (X3434C0) ........................................ 66
DCCOM (DCA 1/5) Circuit Board (X3434C0) ............................... 67
DCCOM (DCA 2/5) Circuit Board (X3434C0) ............................... 66
DCCOM (DCA 3/5) Circuit Board (X3434C0) ............................... 66
DCCOM (DCA 4/5) Circuit Board (X3434C0) ............................... 66
DCD Circuit Board (X3858B0) .................................................. 68/69
FD Circuit Board (X3432B0) .................................................... 70/72
HACOM (ADA) Circuit Board (X3430B0) ...................................... 74
HACOM (HAAD 1/2) Circuit Board (X3430B0) ........................ 76/78
HACOM (HAAD 2/2) Circuit Board (X3430B0) ........................ 76/78
JKCOM (JK1) Circuit Board (X3429B0) ................................... 80/81
JKCOM (JK2) Circuit Board (X3429B0) ................................... 80/81
JKCOM (OPT) Circuit Board (X3429B0) .................................. 82/83
MAIN Circuit Board (X3428B0) ...................................... 84/86/88/90
PNCOM (LCD) Circuit Board (X3433B0) ...................................... 97
PNCOM (PN1 (1/4)) Circuit Board (X3433B0) ......................... 92/94
PNCOM (PN1 (2/4)) Circuit Board (X3433B0) .............................. 96
PNCOM (PN1 (3/4)) Circuit Board (X3433B0) .............................. 96
PNCOM (PN1 (4/4)) Circuit Board (X3433B0) .............................. 96
PNCOM (PN2) Circuit Board (X3433B0) ....................................... 96
XLR Circuit Board (X3431B0) ........................................................ 98
MB1000
MAIN Circuit Board (X3436B0) .............................................. 99/100
PN Circuit Board (X3437B0) ................................................ 101/102
Note: See parts list for details of circuit board component parts.
注:シートの部品詳細はパーツリストをご参照下さい。
65
DM1000/MB1000/SP1000
POWER ON/OFF
DCCOM (AC) Circuit Board
to AC Inlet Assembly
DCCOM (DCA 2/5) Circuit Board DCCOM (DCA 3/5) Circuit Board
to DCA 1/5-IC302
to DCA 1/5-IC301
to DCA 1/5-IC303
Component side(部品側)
to DCA 4/5
-CN403
to DCA 3/5
-CN402
to FD-CN202
to DCA 2/5
-CN401
to
Power
Transformer
to HAAD 1/2
-CN952
to ADA
-CN954
to OPT
-CN807
to JK1-CN653
Component side(部品側)
67
DM1000/MB1000/SP1000
to FD-CN201
to PN1 (1/4)-CN105
to
Power Transformer
Component side(部品側)
2NAP-V990130-2 1
68
DM1000/MB1000/SP1000
Pattern side(パターン側)
2NAP-V990130-2 1
69
DM1000/MB1000/SP1000
FD Circuit Board
A
to MAIN-CN003 to PN1 (1/4)-CN101 to PN1 (1/4)-CN102
not
installed
2NAP-V989990-2 4
70
DM1000/MB1000/SP1000
A to DCA 1/5-CN306
to PN1 (1/4)-CN103 to DCD-CN202 to PN1 (1/4)-CN104
fader 10 fader 11 fader 12 fader 13 fader 14 fader 15 fader 16 fader STEREO fader
A'
Component side(部品側)
2NAP-V989990-2 4
71
DM1000/MB1000/SP1000
FD Circuit Board
to DCA 1/5-CN306 B
to PN1 (1/4)-CN104 to DCD-CN202 to PN1 (1/4)-CN103
B'
2NAP-V989990-3 4
72
DM1000/MB1000/SP1000
B
to PN1 (1/4)-CN102 to PN1 (1/4)-CN101 to MAIN-CN003
not
installed
2NAP-V989990-3 4
73
DM1000/MB1000/SP1000
to XLR-CN151 to XLR-CN551
C'
HACOM (ADA) Circuit Board D
2NAP-V989910-2 1 D'
2NAP-V989910-3 1
74
DM1000/MB1000/SP1000
C
to DCA 1/5-CN305
to XLR-CN951 to XLR-CND51
C'
Component side(部品側)
D
D' 2NAP-V989910-2 1
Pattern side(パターン側)
2NAP-V989910-3 1
75
DM1000/MB1000/SP1000
E
HACOM (HAAD 1/2) Circuit Board
to XLR-CN101 to XLR-CN501
PAD 20dB 1 PAD 20dB 2 PAD 20dB 3 PAD 20dB 4 PAD 20dB 5 PAD 20dB 6 PAD 20dB 7 PAD 20dB 8 PAD 20dB 9 PAD 20dB 10 PAD 20dB
GAIN 1 GAIN 2 GAIN 3 GAIN 4 GAIN 5 GAIN 6 GAIN 7 GAIN 8 GAIN 9 GAIN 10 GAIN 11
to MAIN-CN902
HACOM (HAAD 2/2) Circuit Board E'
to HAAD 1/2-CN003
Component side(部品側)
2NAP-V989910-2 1
PHONES
76
DM1000/MB1000/SP1000
to XLR-CN901 to XLR-CND01
20dB 10 PAD 20dB 11 PAD 20dB 12 PAD 20dB 13 PAD 20dB 14 PAD 20dB 15 PAD 20dB 16
TALKBACK
LEVEL
to HAAD 2/2
-CN003
GAIN 10 GAIN 11 GAIN 12 GAIN 13 GAIN 14 GAIN 15 GAIN 16 PHONES
LEVEL
to DCA 1/5-CN304
Component side(部品側)
E'
2NAP-V989910-2 1
77
DM1000/MB1000/SP1000
F
HACOM (HAAD 1/2) Circuit Board
78
DM1000/MB1000/SP1000
Pattern side(パターン側)
F'
2NAP-V989910-3 1
79
DM1000/MB1000/SP1000
TO HOST USB 1 1
AES/EBU AES/EBU
G' 2
OUT IN COAX
WORD CLOCK 2TR IN/OUT DIGITAL
JKCOM (JK2) Circuit Board
Component side(部品側)
to MAIN-CN701
Component side(部品側)
2NAP-V989800-2
METER
80
DM1000/MB1000/SP1000
H'
H
Pattern side(パターン側)
H'
Pattern side(パターン側)
2NAP-V989800-2
81
DM1000/MB1000/SP1000
SLOT1
to MAIN-CN802
I'
I
to MAIN-CN803 to DCA 1/5-CN302
SLOT2
to MAIN-CN804
I'
Component side(部品側)
2NAP-V989800-2
82
DM1000/MB1000/SP1000
J'
Pattern side(パターン側)
J'
2NAP-V989800-2
83
DM1000/MB1000/SP1000
not used
(for check)
to LCD
-CN501
Battery VN103500
VN103600(Battery holder for VN103500)
84
DM1000/MB1000/SP1000
K
to OPT-CN802
to OPT
-CN801
to JK1
-CN652
to JK1
-CN651
to JK2
-CN701
to OPT-CN804
K' to OPT-CN803
Component side(部品側)
2NAP-V989750-2 3
85
DM1000/MB1000/SP1000
L'
2NAP-V989750-2 3
86
DM1000/MB1000/SP1000
Component side(部品側)
L'
2 layer(2層)
2NAP-V989750-2 3
87
DM1000/MB1000/SP1000
M'
2NAP-V989750-2 3
88
DM1000/MB1000/SP1000
Component side(部品側)
M'
5 layer(5層)
2NAP-V989750-2 3
89
DM1000/MB1000/SP1000
N'
2NAP-V989750-3 2
90
DM1000/MB1000/SP1000
Pattern side(パターン側)
N'
2NAP-V989750-3 2
91
DM1000/MB1000/SP1000
to FD-CN403 to FD-CN404
O'
2NAP-V990000-2 1
92
DM1000/MB1000/SP1000
to PN1 (2/4)-CN401
to PN1 (3/4)-CN109
to PN1 (4/4)
-CN111
to DCD
-CN204
to PN2
-CN301
to FD-CN401 to FD-CN402
O'
Component side(部品側)
2NAP-V990000-2 1
93
DM1000/MB1000/SP1000
P'
94 2NAP-V990000-2 1
DM1000/MB1000/SP1000
P'
Pattern side(パターン側)
2NAP-V990000-2 1
95
DM1000/MB1000/SP1000
LCD contrast
Component side(部品側)
to LCD-CN503 to PN1 (1/4)-CN107
Pattern side(パターン側)
PNCOM (PN1 (3/4)) Circuit Board PNCOM (PN1 (4/4)) Circuit Board
to PN1 (1/4)-CN108
to PN1 (1/4)-CN110
Parameter wheel
Component side(部品側)
Pattern side(パターン側)
96 2NAP-V990000-2 1
DM1000/MB1000/SP1000
to
LCD Module
to
LCD Module
Pattern side(パターン側)
2NAP-V990000-2 1
97
DM1000/MB1000/SP1000
+48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF
16 15 14 13 12 11 10 +48V ON/OFF 9
OMNI IN OMNI IN OMNI IN OMNI IN OMNI OUT OMNI OUT OMNI OUT OMNI OUT
4 3 2 1 12 11 10 9
to ADA-CN752 to ADA-CN552
Q'
+48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF +48V ON/OFF
OFF 9 8 7 6 5 4 3 2 1
MNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT
9 8 7 6 5 4 3 2 1
to ADA-CN352 to ADA-CN152
Q'
Component side(部品側)
2NAP-V989970-2 1
98
DM1000/MB1000/SP1000
not
installed
R'
to METER
(DM1000)
2NAP-V990400-2 1
99
DM1000/MB1000/SP1000
S'
2NAP-V990400-2 1
100
DM1000/MB1000/SP1000
PN Circuit Board
T
to MAIN-CN102
T'
2NAP-V990410-2 1
101
DM1000/MB1000/SP1000
PN Circuit Board
U'
U'
Pattern side(パターン側)
2NAP-V990410-2 1
102
DM1000/MB1000/SP1000
INSPECTIONS
Perform the Check of DM1000. 1-4. Fader Inspection
1. Preparations q Preparations
1-1. Parameters a. Press the LAYER [MASTER] key to select the
The parameters are as follows unless otherwise master layer.
specified. b. Move all the faders all the way up.
Set WORD CLOCK INT to 96 kHz. c. Press the DISPLAY ACCESS [PAIR/GROUP] key
Only the channel being measured is ON. a few times, switch to the OUTPUT FADER
PAN: Center GROUP screen, and press the [SEL 1]~[SEL 16]
GAIN : MIN and [SEL STEREO] keys and group the 17 faders.
PAD : ON
FADER : NOMINAL (0 dB) w Group inspection
0 dBu = 0.775Vrms a. Operate the stereo master fader, repeat the delay
0 dBV = 1Vrms=2.2 dBu (about 3 seconds/100 mm) twice and repeat the
0 dBFS = 0 dB full scale advance (about 1 second/100 mm) twice.
The oscillator output impedance is 150 Ω. b. Operate the Channel 1 fader, repeat the delay
The oscilloscope, level meter, etc. input impedance (about 3 seconds/100 mm) twice and repeat the
must be at least 100k Ω. advance (about 1 second/100 mm) twice.
Noise measurement is corrected with a 12.7 kHz c. Check that there are no vibrating faders or
-6 dB/octave low pass filter. extremely late faders in the above operations
(These are not effective values, but measurement
with average values.) e Recall inspection
Distortion measurement is corrected with an 80 a. Press the LAYER [1-16] key and select Layers 1-16.
kHz, -6 dB/octave low pass filter. b. Press the DISPLAY ACCESS [SCENE] key to
switch to the SCENE MEMORY screen, then press
For analog output inspection, the following the SCENE MEMORY [ ] key or [ ] key to select
parameters are added or changed. 0, then press the [RECALL] key to recall 0.
For maximum output measurement, unless c. Move all the faders all the way up, press the
otherwise specified, output 0 dB from the internal SCENE MEMORY [ ] key or [ ] key to select 1,
oscillator. then press the [STORE] key and when the TITLE
The analog output loads are set to EDIT screen is displayed, select OK to store 1.
OMNI OUT: 600 Ω d. With the operation method in b., repeat two times
PHONES: 8 Ω from the 0 recall to the 1 recall.
e. Check that there are no vibrating faders or
1-2. Writing Programs extremely late faders in the above operations.
If the main program or the boot program is not the
latest version upgrade to the latest version. 2. ANALOG IN/OUT WORD CLOCK INT
The method for checking the program version is 96 kHz inspection
in “7-1. Method for Checking the Program Version” 2-1. OMNI OUT 1~12
and the method for checking the program version Parameters Must be input from Channel 1.
is in “7-2. Method for Writing the Program”. CH1 ROUTING BUS 1 ON.
For the latest program, please download from With OUTPUT PATCH, BUS 1CH
the YSISS home page. assigned to OMNI 1~12CH.
BUS1 MASTER FADER ON.
1-3. Initialization
Before inspection, calibrate the faders and initialize q Gain (OMNI OUT 1~12)
the main unit. The initialization method is in “7-3. Input frequency Input level Regulated output level Permissible range
Method for Initialization with Fader Calibration”. 1kHz +4dBu +4dBu +4±2dBu
103
DM1000/MB1000/SP1000
e Residual noise (OMNI OUT 1~12) y Crosstalk between left and right
Parameter Switch BUS OUT Off. Parameter PAN L swung to cut off.
Permissible range
Input frequency Output level (L) Permitted range (R)
-86dBu or below
1kHz -10dBu -75dBu or below
r OMNI OUT 1~12 level difference The right side must be the same.
The range of difference in the gain measured with
q and w is regulated as follows. 2-3. OMNI IN 1~4
Permissible range Parameter Inspect with OMNI OUT 1.
Within 1dB q Gain (all of 1~4)
Input frequency Input level Regulated output level Permissible range
t Crosstalk between odd channels and even channels 1kHz +4dBu +4dBu +4±2dBu
Parameter The measurement channel must be
assigned to BUS 2CH with an OUTPUT w f characteristic (all of 1~4)
PATCH. Parameter The permitted range uses 1 kHz as
Input frequency Output level (odd channels) Permitted range (even channels) reference.
Input frequency Input level Permissible range
1kHz +22dBu -58dBu or below
20Hz +4dBu -1.5~0.5dB
The even channels must be the same. 40kHz +4dBu -1.5~0.5dB
e Distortion ratio (CH 1~16) 2-5. CH IN 1~16 level meter operation check
Input frequency Output level Permissible range Parameters Input the regulated level to the
1kHz +22dBu 0.02% or below channels being measured.
1~16 CH can be input at the same time.
r Noise level (CH 1~16) Check visually that the PEAK and
Parameter Short the CH IN being measured with SIGNAL LED lights up and goes out.
150 Ω. Lit up
Permissible range Reference output level
LED level Input frequency Input level (OMNI OUT 1)
-64dBu or below
PEAK 1kHz +23dBu +23dBu
However, if the permitted range above is not met, EIN SIGNAL 1kHz -14dBu -14dBu
Measurement value (Gain at 1 kHz) must be -128.
Out
t Level difference (CH 1~16) Reference output level
LED level Input frequency Input level (OMNI OUT 1)
The range of difference in the gain measured with
q is regulated as follows. PEAK 1kHz +19dBu +19dBu
Permissible range SIGNAL 1kHz -18dBu -18dBu
Within 2dB
2-6. TALKBACK
B. GAIN MIN, PAD ON Parameters Inspect with OMNI OUT 1.
q Gain (CH 1~16) Assign OMNI 1 with the MONITOR
Input frequency Input level Regulated output level Permissible range TALKBACK screen.
1kHz +4dBu +4dBu +4±2dBu TALKBACK LEVEL MAX.
TALKBACK SW ON.
w Distortion ratio (CH 1~16) Check that signals from the mic appear.
Input frequency Output level Permissible range
1kHz +22dBu 0.01% or below 3. ANALOG IN/OUT WORD CLOCK INT
48 kHz inspection
e Noise level (CH 1~16) 3-1. OMNI OUT 1~12
Parameter Short the CH IN being measured with Parameters Must be input from Channel 1.
150 Ω. CH1 ROUTING BUS 1 ON.
Permissible range With OUTPUT PATCH, BUS 1CH
-82dBu or below assigned to OMNI 1~16CH.
BUS1 MASTER FADER ON.
r Crosstalk between odd channels and even channels
Parameters Input a signal on the odd side channels. q Distortion ratio (OMNI OUT 1~16)
Short the even side channels with 150 Ω. Input frequency Output level Permissible range
1kHz +22dBu 0.01% or below
Input frequency Output level (odd channels) Permitted range (even channels)
1kHz +22dBu -58dBu or below
w Residual noise (OMNI OUT 1~16)
The even channels must be the same. Parameter Switch BUS OUT Off.
Permissible range
C. Phantoms (CH 1~16) -86dBu or below
Short XLR Pin 2 and Pin 3, connect a 10 kΩ load
between Pin 2-1, then switch the Phantom switch 3-2. PHONES OUT L/R
On. The voltage is regulated to be no more than the Parameters Must be input from Channel 1.
following. PHONES LEVEL MAX.
Permissible range
DC 31~37V
q Distortion ratio (both L/R)
Input frequency Output level Permissible range
Check that when the Phantom switch is switched 1kHz -10dBu 0.04% or below
Off, the discharge starts quickly.
w Residual noise (both L/R)
Parameter PHONES LEVEL MIN.
Permissible range
-110dBu or below
105
DM1000/MB1000/SP1000
106
DM1000/MB1000/SP1000
4-3. WORD CLOCK IN, 2TR DIGITAL IN 1 and 2 PLL 5-2. WORD CLOCK EXT
operation range Parameters Select the WORD CLOCK as follows.
Parameters Use Parameter System Two. WORD CLOCK IN inspection:
For distortion measurement, select WC IN
BW: 80kHz. 2TR DIGITAL IN 1 inspection:
Inspect with OMNI OUT 1 and 2. 2TR D1
Select the WORD CLOCK as follows. 2TR DIGITAL IN 2 inspection:
WORD CLOCK IN inspection: 2TR D2
WC IN For WORD CLOCK IN inspection,
2TR DIGITAL IN 1 inspection: select the value of the frequency
2TR D1 setting according to the table below.
2TR DIGITAL IN 2 inspection: For 2TR DIGITAL IN 1 or 2 inspection,
2TR D2 set the System Two frequency setting
Input from CH1. (Sample Rate) ccording to the table
below.
A. 96 kHz + 6 % (101.76 kHz) q Jitter (WORD CLOCK IN, 2TR DIGITAL IN both
Parameter For WORD CLOCK IN inspection, set 1 and 2)
the oscillator frequency setting to 96 WORD CLOCK Permissible range
kHz + 6%. For 2TR DIGITAL IN 1 or 2 44.1kHz 10nsec or below
inspection, set the System Two 48kHz 10nsec or below
frequency setting (Sample Rate) to 96 88.2kHz 10nsec or below
kHz +6%. 96kHz 10nsec or below
q Distortion ratio (WORD CLOCK IN, 2TR DIGITAL
IN for both 1 and 2) 6. DIssuing sound
Input frequency Output level Permissible range Check the following items by listening.
1kHz +22dBu 0.01% or below ANALOG INPUT, ANALOG OUTPUT
Parameters CH1, CH9, CH16 → Inspect with
B. 44.1 kHz - 10 % (39.69 kHz) OMNI OUT 1 and 2.
Parameter For WORD CLOCK IN inspection, set WORD CLOCK setting INT96kHz and
the oscillator frequency setting to 44.1 EXT100kHz (WC IN).
kHz -10 %. For 2TR DIGITAL IN 1 or
2 inspection, set the System Two 2TR DIGITAL IN 1, 2
frequency setting (Sample Rate) to Parameters Set WORD CLOCK INT to 96 kHz.
44.1 kHz - 10%. Inspect with OMNI OUT 1 and 2.
q Distortion ratio (WORD CLOCK IN, 2TR DIGITAL Set the System Two frequency setting
IN both 1 and 2) (Sample Rate) to 44.1kHz.
Input frequency Output level Permissible range Switch the measurement channel
1kHz +22dBu 0.01% or below SRC On.
107
DM1000/MB1000/SP1000
Judgment standard 1: The EFFECT sounds must 5) When you press the Load button, the program
be output. writing is started. Never switch off the power or
Judgment standard 2: The output must not include disconnect the USB cable while the program is
any noise. being written.
In the same manner, recall and inspect Scenes 2 6) In order to check that the main program and the
through 16. boot program have been written correctly, check
The EFFECT functions for Scenes 2 through 16 work their versions with the method in “7-1. Program
as follows. Version Check Method”.
108
DM1000/MB1000/SP1000
検査
109
DM1000/MB1000/SP1000
110
DM1000/MB1000/SP1000
111
DM1000/MB1000/SP1000
C. SRC 動作
② f 特(2TR DIGITAL OUT 1)
条件 WORD CLOCK INT96kHz にします。
条件 許容範囲は 1kHz を基準とします。
2TR DIGITAL IN OUT 1 で検査します。
入力周波数 入力レベル 許容範囲
System Two の周波数設定(Sample Rate)を
20Hz + 4dBu − 1.0 ∼ 0.5dB
44.1kHz にします。
40kHz + 4dBu − 1.5 ∼ 0.5dB
測定 CH の SRC を ON にします。
① FS(2TR DIGITAL IN 1,2 共)
③歪率(2TR DIGITAL OUT 1)
入力周波数 入力レベル 規定周波数 許容範囲
入力周波数 出力レベル 許容範囲
1kHz − 20dBFS 96kHz 96kHz ± 100Hz
1kHz − 2dBFS 0.01%以下
112
DM1000/MB1000/SP1000
判定基準 1: EFFECT音が出ていることを確認します。
5-1. WORD CLOCK INT
判定基準 2:ノイズが含まれていないことを確認し
条件 WORD CLOCKは下記表の値を選択します。
ます。
①ジッター
WORD CLOCK 許容範囲 以下同様にシーン2からシーン16をリコールし検査
INT 44.1kHz 5nsec 以下 します。
INT 48kHz 5nsec 以下 シーン 2 からシーン 16 の EFFECT 機能は次のとお
INT 88.2kHz 5nsec 以下 りです。
INT 96kHz 5nsec 以下 シーン 2:SYMPHONIC
シーン 3:HQ PITCH
5-2. WORD CLOCK EXT
シーン 4:DYNAMIC FILTER
条件 WORD CLOCK は以下を選択します。 シーン 5:REVERB
WORD CLOCK IN の検査時: WC IN シーン 6:SYMPHONIC
2TR DIGITAL IN 1 の検査時: 2TR D1 シーン 7:HQ PITCH
2TR DIGITAL IN 2 の検査時: 2TR D2 シーン 8:DYNAMIC FILTER
WORD CLOCK IN の検査時は、発振器の周 シーン 9:REVERB
波数設定に下記表の値を選択します。 シーン 10:SYMPHONIC
2TR DIGITAL IN 1, 2の検査時はSystem Two
の周波数設定(Sample Rate)に下記表の値
を選択します。
113
DM1000/MB1000/SP1000
114
DM1000/MB1000/SP1000
0. Outline (Fig. 3)
0-1. Operation method Example B of individual check screen (when checking each
Keys used for the service check on the panel one of multiple items automatically or visually)
0-2. Screen explanation 1)After starting the check, the OK/NG selection items are
(Fig. 1) displayed. Check the actions and results and then select
Example of screen for all of the check items OK/NG.
Use the [ ] and [ ] keys to select the item and press the
--- DM1000 test --- (C)YAMAHA 2003 [ENTER] key to execute the selection.
F/W Ver. MAIN Vx.xx METER Vx.xx Version number of
2)When OK or NG is selected, the next check item is
SUB1 Vx.xx each CPU ROM automatically displayed.
Each check result 3)When the [DEC] key is pressed while waiting for the input
OK 1 PLLP2 OK 22 PANEL LED of the OK/NG judgment, the exit display will reverse and
OK 2 BATT OK 23 PANEL ALL LED
OK 4 DSP6,SIO NG 24 PANEL SW this screen can be exited by pressing the [ENTER] key.
OK 5 DSP7,SIO,ATSC2 OK 25 FADER TSense (Even if part of one check item is being executed, exit is
OK 6 MIDI OK 26 FADER Move
OK 11 2TR IN/OUT(DIO) OK 27 ENCODER(CH) The number of the selected item possible by pressing the [DEC] key.)
OK 13 WORD CLOCK OK 28 ENCODER(etc.) is displayed in reverse. If exit is performed before all of the check items are
OK 21 LCD OK 31 METER LED Selection method:
OK 32 METER SW Use the [ ], [ ], [ ], or [ ] keys completed, the judgement in Fig. 1 is displayed as NG.
in the lower right of the panel to 4)As shown in Fig. 3, the check items with numbers in front
select items.
98 MESSAGE LOG Press the [ENTER] key to display of the items can be selected. Use the [ ] and [ ] keys to
the screen for the selected item. select an item and press the [ENTER] key to start the check.
As shown in Fig. 2, the checks for the items that do not
EXIT ([DEC] Key->[ENTER] Key)
have numbers in front of the items start automatically.
1-4 DSP6,SIO Check each DSP6 register by Read/Write and the SIO connection. Auto
--- WORD CLOCK --- Checks are executed in order 1-5 DSP7,SIO,ATSC2 Check each DSP7 register by Read/Write and the SIO and ATSC2 connections. Auto
from the top automatically. 1-6 MIDI MIDI OUT → Check the IN Send/Receive. Auto
NG OUT->IN The item being checked is
OK PLL (DIR2,DBL) displayed in reverse.
OK PLL UnLock
115
DM1000/MB1000/SP1000
METER MB1000
116
DM1000/MB1000/SP1000
DSP6 test items DSP7 test items 1-13. WORD CLOCK test
1: CPU Interface (Data bus) 1: CPU Interface (Data Bus) Contents: WORD CLOCK OUT → IN is counted by
2: CPU Interface (Data bus) 2: CPU Interface (Chip Select) PLLP2 and automatically checked (Fs =
3: CPU Interface (Chip Select, TXB) 3: CPU Interface (Address Bus) 44.1/48/88.2/96 kHz).
4: CPU Interface (Address bus)4: E-RAM Interface (Data Bus) For the PLL LOCK check, Read the
5: CPU Interface (BUS W/R Reg.) 5: E-RAM Interface (Address Bus) UNLOCK signal and check when the clock
6: DRAM Interface (Data Bus) 6: SIO Connection (DSP7 → DSP6) is stable after the FS change (after about
7: DRAM Interface (Address Bus) 7: SIO Connection (DSP6 → DSP7) 200 ms).
8: DRAM Interface (Address Bus & MPR) 8: SIO Connection (DSP7 → DSP7) To confirm the UnLock, disconnect the
9: SIO Connection 9: SIO Connection (ATSC → DSP7) cable connected to WORD CLOCK IN and
(DSP6 → DSP6 SIO test) A: SIO Connection (DSP7 → ATSC) check.
Preparation: Connect the IN to the WORD CLOCK OUT
Explanation of display when DSP6 and DSP7 are common of the unit with the BNC cable.
or NG
Example of execution screen
IC number
1) CPU Interface (Data Bus) ...NG: IC201
--- WORD CLOCK ---
0000 0000 XXXX 0000 0000 0000 0000 X00X
MSB X=Error bit LSB OK OUT->IN
OK PLL (DIR2,DBL)
2) SIO Connection (DSP7 → DSP6) ... NG PLL UnLock
NG: 1 IC201 S0[xx] → IC301 SI[xx]
OK NG Good or bad
EXIT ([DEC] Key->[ENTER] Key) decision
EXIT ([DEC] Key->[ENTER] Key)
117
DM1000/MB1000/SP1000
OK NG Good or bad
decision
EXIT ([DEC] Key->[ENTER] Key) 1) See SW operation Fig. 1 and 2 in “2. Supplement”
for operation order.
See LED lighting order Fig. 1 and 2 in “2. Supplement” 2) When the check starts, the LCD display changes to
for the lighting order. The 7-segment LEDs light in the the LCD display Fig. 1 in “2. Supplement.” This screen
1..9, 0 dot order. When ALL LED ON is selected, all of can be skipped if the [DEC] key is pressed. For this
the LEDs on the panel light. (The SEL switch, which has reason, the [DEC] key is not included in the operation
a red and green 2-color LED, becomes orange.) order.
• Move all of the FADERs to the set positions 2) Explanation of the automatic judgment display of the
(three positions) and the stop positions will FADER Up/Down
be checked and whether or not the values “NG: CH 1, 1020, (990...1023), 980”
are correct is automatically judged using 1020: Specified stop value (displayed in 1024 resolution)
the built-in A/D. (990...1023): Certified range when the FADER detects
the stop position using the built-in A/D
Checking procedures (displayed in 1024 resolution)
Select the item to start the check. (Check item 1 or 980: Detected value of the stop position by the FADER
check item 5) using the built-in A/D (displayed in 1024 resolution)
When starting the check from check item 5, push
the [ ] cursor key once and move check item 5. 3) Explanation of the automatic judgment display of the
FADER positions 1 to 3
Starting from check item 1 “CH_Pos 210, 860, (800...920)”
q Press the [ENTER] key. 210: Specified stop value (displayed in 256 resolution)
w Move all of the FADERs up. 860: Specified stop value (displayed in 1024 resolution)
e Manually move all of the FADERs all the way up. (800...920): Certified range when the FADER detects the
r Press the [ENTER] key. stop position using the built-in A/D (displayed
t OK is displayed. Move all of the FADERs down. in 1024 resolution)
y Manually move all of the FADERs all the way down. “NG 02 (790)”
u Press the [ENTER] key. NG 02: CH2 FADER is NG.
i The FADERs are checked if they can automatically (790): Detected value of the stop position by the FADER
move. (Check items 3 to 7) using the built-in A/D (displayed in 1024 resolution)
o The judgment result is displayed.
1-27. ENCODER (CH) test
Starting from check item 5 Contents: Check the rotation response of CH 1 to CH
q Press the [ENTER] key. 16 of the Encoder.
w The FADERs are checked if they can automatically When the Encoder rotates clockwise, the
move. (Check items 5 to 7) “>” mark on the left side moves to the right.
e The judgment result is displayed. The “>” mark changes to the “<” mark when
it reaches the right side. Then, when the
Example of execution screen Encoder rotates counterclockwise, the “<”
mark moves to the left. When the “<” mark
--- FADER Move --- reaches the left side, the Encoder is OK.
NG 1 FADER Up Position The Encoder rotates slowly.
OK 2 FADER Down Position
OK 3 FADER Up
NG 4 FADER Down Example of execution screen
OK 5 FADER Position1
OK 6 FADER Position2 --- ENCODER (CH) --- If the judgment is OK or NG,
OK 7 FADER Position3 NG CH9
the test continues with the check
OK CH1 of the next channel automatically.
OK CH2 NG CH10 If the Encoder does not operate,
OK CH3 NG CH11 etc., and the next channel is not
[ENTER] key to Start OK CH4 NG CH12 checked automatically, press the
OK CH5 NG CH13 [DEC] key. The channel becomes
FADER Up OK CH6 NG CH14 NG and the test checks the next
OK: NG CH15 channel.
OK CH7
OK CH8 NG CH16
1 OK NG
The bar moves with the rotation
EXIT ([DEC] Key->[ENTER] Key) direction.
CCw—>—CW indicates clockwise
rotation.
CCW ------>---------- CW CCw—<—Cw indicates
counterclockwise rotation.
1) Explanation of the automatic judgment display of the
FADER Up/Down positions 1-28. ENCODER (etc.) test
“NG: CH 8, 990, (1005...1023)” Contents: Check the rotation response of CH 1 to CH
990: Stop position detected using the built-in A/D 16 of the Encoder.
(displayed in 1024 resolution) The Encoder operation is the same as
(1005...1023): Stop position certified range (displayed 1-27. ENCODER (CH) test. Move the
in 1024 resolution) Joystick left to right, right to left, down to
up, and up to down in order.
119
DM1000/MB1000/SP1000
OK 1 Channel Bargraph
NG 2 Time Code
NG 3 Others
1-98. MESSAGE LOG
Contents: The log of the check results is displayed.
120
DM1000/MB1000/SP1000
2. Supplement
LCD display: 53 columns × 30 lines (320 × 240 dots with Font 5×7)
A pressed SW
will disappear.
The next SW to be
pressed will flash.
121
DM1000/MB1000/SP1000
SW operation Fig. 1
GROUP 1
3
4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SW operation Fig. 2
GROUP 2 2 5
1
8
6 9
3
4
7
122
DM1000/MB1000/SP1000
4
3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
8 2 5
1 6
3 7
123
DM1000/MB1000/SP1000
Screen explanation
CLOCK
DM1000 Audio Check (c) YAMAHA2003 FS
MODE CLOCK FS
MODE ANALOG SLOT1 SLOT2 2TRD INT 48k INT 48k END END
INPUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 INPUT button
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
OUTPUT BUS1
route display
selection DSP7-5 DSP7-6 DSP7-5 DAC
IC205 IC206 IC205 IC103 OUTPUT
OUTPUT route
1kHz 134 71 134 105 109 6 22, 23 OMNI 1
124
DM1000/MB1000/SP1000
INPUT route Displays the outline of the route of the signal selected by the INPUT route display selection.
OUTPUT route Displays the outline of the route of the signal selected by the OUTPUT route display selection.
Common contents:
1) The IN PORT and OUT PORT are determined by setting the INPUT CH and OUTPUT CH (BUS/AUX).
CH20 OMNI4
CH21 INPUT1
CH22 INPUT2
CH23 INPUT3
CH24 INPUT4
CH25 INPUT5
CH26 INPUT6
CH27 INPUT7
CH28 INPUT8
CH29 INPUT9
CH30 INPUT10
CH31 INPUT11
CH32 INPUT12
CH33 INPUT13
CH34 INPUT14
CH35 INPUT15
CH36 INPUT16
CH37 OMNI1
CH38 OMNI2
CH39 OMNI3
CH40 OMNI4
CH41 INPUT1
CH42 INPUT2
CH43 INPUT3
CH44 INPUT4
CH45 INPUT5
CH46 INPUT6
CH47 INPUT7
CH48 INPUT8
126
DM1000/MB1000/SP1000
CH30 SLOT1-14
CH31 SLOT1-15
CH32 SLOT1-16
CH33 SLOT1-1
CH34 SLOT1-2
CH35 SLOT1-3
CH36 SLOT1-4
CH37 SLOT1-5
CH38 SLOT1-6
CH39 SLOT1-7
CH40 SLOT1-8
CH41 SLOT1-9
CH42 SLOT1-10
CH43 SLOT1-11
CH44 SLOT1-12
CH45 SLOT1-13
CH46 SLOT1-14
CH47 SLOT1-15
CH48 SLOT1-16
127
DM1000/MB1000/SP1000
CH40 SLOT2-8
CH41 SLOT2-9
CH42 SLOT2-10
CH43 SLOT2-11
CH44 SLOT2-12
CH45 SLOT2-13
CH46 SLOT2-14
CH47 SLOT2-15
CH48 SLOT2-16
128
DM1000/MB1000/SP1000
DM1000/MB1000サービス検査プログラム
※ DM1000 および MB1000 のサービス検査プログラムを行います。
0. 概要 (Fig.3)
0-1. 操作方法 個別検査画面例B (多項目を個別に自動または目視判定す
サービス検査に使用するパネル上のキー る場合)
0-2. 画面の説明
(Fig.1)
全検査項目画面例 1) 検査を開始するとOK/NGの選択項目が表示されるので、
動作や結果を判定し OK/NG を選択します。
--- DM1000 test --- (C)YAMAHA 2003
選択方法は[←], [→]キーを使い、 [ENTER]キーにて決定し
F/W Ver. MAIN Vx.xx METER Vx.xx 各CPUのROMのVer.の表示 ます。
SUB1 Vx.xx
2)OKまたはNGを選択すると次の検査項目に自動で移ります。
個別検査の判定結果 3)OK/NG判定の入力待ち時に[DEC]キーを押すと「EXIT」
OK 1 PLLP2 OK 22 PANEL LED
OK 2 BATT OK 23 PANEL ALL LED 表示が反転し、 [ENTER]キーでこの画面を終了します。
OK 4 DSP6,SIO NG 24 PANEL SW ( 一部の検査項目は実行中にも[ D E C ] キーを押すと
OK 5 DSP7,SIO,ATSC2 OK 25 FADER TSense
OK 6 MIDI OK 26 FADER Move 「EXIT」処理可能です。 )
OK 11 2TR IN/OUT(DIO) OK 27 ENCODER(CH) 選択項目は番号が反転表示します。
OK 13 WORD CLOCK OK 28 ENCODER(etc.) 選択方法
全項目終了していない場合に「EXIT」すると、Fig.1 の判
OK 21 LCD OK 31 METER LED パネル右下の[↑], [↓], [←], [→]キー 定が NG 表示になります。
OK 32 METER SW を使用し、項目選択を行います。
その後、[ENTER]キーで各個別検査 4)Fig.3 のように、検査項目の先頭に番号があるものは、検
98 MESSAGE LOG
画面に切り替わります。 査する項目の選択が可能です。 [↑], [↓]キーで項目を選択
し、 [ENTER]キーで検査を開始します。Fig.2のように、検
査項目の先頭に番号がないものは、自動で検査を開始し
EXIT ([DEC] Key->[ENTER] Key) ます。
0-3. 検査項目一覧
(Fig.2) 項目 検査名称 検査項目の概要 判定
個別検査画面例A(自動判定で項目を進める場合) 1-1 PLLP2 PLLP2のレジスタをW/Rし判定 自動
1-2 BATT バックアップ用電池の電圧を判定 自動
指示メッセージ表示部
1-11 2TR IN/OUT(DIO) 2TR IN/OUT DIGITALをLoopBackし判定 自動
NG: BNC_WCLK_48K_COUNT=1023 NGメッセージの表示部
メッセージ文字数が多い 1-13 WORD CLOCK WCLK OUTのFsをWCLK INでカウント、PLLのLOCK判定 半自
場合、2行に渡って表示
EXIT ([DEC] Key->[ENTER] Key)
します。
(スクロールUP)
1-21 LCD 全画面を黒・白表示、コントラストボリューム検査 目視
1) 検査は自動で行い全項目終了すると「EXIT」状態になり 1-22 PANEL LED LED(7セグLEDを含む)が規定の順序で点灯 目視
1-23 PANEL ALL LED 全LEDの輝度段階別点灯と色別点灯 目視
「ENTER」キー入力で Fig.1 の画面に戻ります。
1-24 PANEL SW SWを規定順に押して判定 半自
2) 再検査する場合は Fig.1 に戻って項目を選択します。 1-25 FADER TSense FADERのタッチセンス感度を判定 半自
1-26 FADER Move FADERの移動時間と停止位置を判定 自動
1-27 ENCODER(CH) エンコーダー(CH1-16)を回転させて判定 半自
1-28 ENCODER(etc.) エンコーダー(その他)を回転させて判定 半自
129
DM1000/MB1000/SP1000
サービス検査用接続図 実行画面例
実行画面例
--- DSP6 ---
OK DSP6,SIO 全項目自動なので、
項目の選択は出来ません。
実行時に1:から次々
1: CPU Interface (Data bus) と表示します。
NG: TxBusy NGの場合の詳細表示
NGが多数の場合、
20個程度で表示は
--- DSP7 --- 停止します。
CONTROL
OK DSP7,SIO,ATSC2
METER MB1000
130
DM1000/MB1000/SP1000
実行画面例
DSP6,DSP7 共通、NG の場合の表示説明
IC番号 --- WORD CLOCK ---
131
DM1000/MB1000/SP1000
実行画面例 1) 操作順序は、
「2. 補足」の SW 操作図1,2を参照し
てください。
--- PANEL LED ---
2) 検査が始まると、LCD 表示は「2. 補足」に示す LCD
OK 1 CH1...CH16 PEAK-SIGNAL 表示図1に切り替わります。この画面は[DEC]キー
OK 2 AUX SELECT..FADER MODE
OK 3 CH1..CH16 SEL-SOLO-ON, STEREO AUTO-SEL-ON を押すことで抜けられます。このため、[DEC]キー
OK 4 ROUTING..SCENE MEMORY は操作順序の中に含まれていません。
OK 5 MONITOR
OK 6 LAYER..USER DEFINED KEYS
OK 7 STEREO METER
OK 8 ALL LED ON
1-25 FADER TSense test
内容 各 Fader を順番に素手で触れ、タッチセンス
[ENTER] key to Start 機能を自動判定します。
実行画面例
OK NG 良否判定
--- FADER Tsense ---
EXIT ([DEC] Key->[ENTER] Key)
OK CH1 NG CH9
NG CH2 ** OK CH10 ** FADERを触ると
点灯順序は、 「2. 補足」の LED 点灯順序図1,2を参照 NG CH3 * NG CH11 ********** バーグラフが変化
OK CH4 ** NG CH12 *
してください。なお、7 セグ LED は 1..9,0、ドットの順 OK CH5 ** NG CH13 ** します。
で点灯します。また ALL LED ON では、パネル上の全 OK CH6 ** NG CH14 * (最大10個)
NG CH7 ** NG CH15 *
LED が点灯します(SEL スイッチは赤と緑の 2 色 LED NG CH8 ** NG CH16 *
* NG STEREO * ・判定がOKの場合は、
のため、オレンジになります) 。 * 自動的に次のチャン
ネルの検査に進みま
1-23 PANEL ALL LED test す。
・判定がOKにならない
内容 パネル上の全 LED(2色 LED は ORANGE)の 場合、[DEC]キーを押
明るさが 4 段階で点灯する事を確認します。 して次の検査に進み
ます。
赤色の LED(2色 LED を含む)のみ点灯した EXIT ([DEC] Key->[ENTER] Key)
際、違う色が点灯していないかを確認します。
緑色の LED(2色 LED を含む)のみ点灯した
際、違う色が点灯していないかを確認します。 1-26 FADER Move test
橙色の LED のみ点灯した際、違う色が点灯し 内容 ・はじめに、指示に従い手動でFADERを一番
ていないかを確認します。 上、一番下に移動させます。
この時、内部 A/D で位置を検出し、適切な
実行画面例 値となっているか自動判定します。
・全 FADER を一番上、一番下に移動させ、内
--- PANEL ALL LED ---
部 A/D で停止位置を検出し、適切な値と
OK 1 BRIGHTNESS なっているか自動判定します。
OK 2 RED LEDs
OK 3 GREEN LEDs ・全 FADERを規定位置に移動させ、内部 A/D
OK 4 ORANGE LEDs で停止位置を検出し、適切な値となってい
[ENTER] key to Start るか自動判定します(3 箇所) 。
検査手順
OK NG 良否判定 検査を開始する項目を選択します。(検査項目 1 又
EXIT ([DEC] Key->[ENTER] Key) は検査項目 5)
検査項目5から開始する場合は、カーソルキー(↓)
を一度押して、検査項目 5 に移動します。
1-24 PANEL SW test
内容 パネル上の全てのスイッチを規定順序通り押 検査項目 1 から実施する場合。
して反応するか検査します(自動判定)。 q [ENTER]キーを押します。
w 全部のフェダーが上に移動します。
実行画面例 e 手動で全部のフェダーを一番上まで移動します。
r [ENTER]キーを押します。
--- PNL SW ---
t OKが表示されて、 全部のフェダーが下に移動し
NG GROUP1 ます。
GROUP2
y 手動で全部のフェダーを一番下まで移動します。
u [ENTER]キーを押します。
i フェダーが自動的に動いてチェックされます。
(検査項目 3 ∼検査項目 7)
o 判定結果が表示されます。
132
DM1000/MB1000/SP1000
133
DM1000/MB1000/SP1000
OK METER SW
OK NG
SW と LED の対応は以下の通りです。
スイッチ LED
1-16 1-16 点灯/消灯
17-32 17-32 点灯/消灯
33-48 33-48 LED点灯/消灯
PEAK HOLD PEAK HOLD LED点灯/消灯
REMOTE1 REMOTE1 LED点灯/消灯
REMOTE2 REMOTE2 LED点灯/消灯
MASTER MASTER LED点灯/消灯
134
DM1000/MB1000/SP1000
2. 補足
[DEC] SWは、
1-24 PANEL SW testに
表示されません。
押されたSW
が消えていきます。
次に押すSWを
点滅表示します。
指定順序に押されなかったSWを*表示します。
指定順序に押されれば通常表示に戻ります。
135
DM1000/MB1000/SP1000
SW 操作図1
GROUP1
3
4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SW 操作図2
GROUP2 2 5
1
8
6 9
3
4
7
136
DM1000/MB1000/SP1000
LED 点灯順序図1
4
3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
LED 点灯順序図2
8 2 5
1 6
3 7
137
DM1000/MB1000/SP1000
3-1. 概要 起動方法
※ DM1000 の Audio Check プログラムを行います。
[AUX SELECT DISPLAY]キー +[AUX5]キーを押し
検査方法 ながら電源を ON にします。
画面の説明
CLOCK
DM1000 Audio Check (c) YAMAHA2003 FS
MODE CLOCK FS
MODE ANALOG SLOT1 SLOT2 2TRD INT 48k INT 48k END END
INPUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 INPUTボタン
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
OUTPUT BUS1
経路表示選択 DSP7-5 DSP7-6 DSP7-5 DAC
IC205 IC206 IC205 IC103 OUTPUT
OUTPUT経路
1kHz 134 71 134 105 109 6 22, 23 OMNI 1
138
DM1000/MB1000/SP1000
MODE 入出力の端子の切り替え
ANALOG 入出力にアナログの I/O をパッチします。
SLOT1 入出力に SLOT1 の I/O をパッチします。
SLOT2 入出力に SLOT2 の I/O をパッチします。
2TRD 入出力に 2TRD1,2 の I/O をパッチすします。
CLOCK クロックソースの切り替え
INT 44.1k
INT 48k
INT 88.2k
INT 96k
FS 動作クロックを表示します。
3-2. 検査内容
共通内容
MODE:ANALOG 時のパッチ設定
CH19 OMNI3
CH20 OMNI4
CH21 INPUT1
CH22 INPUT2
CH23 INPUT3
CH24 INPUT4
CH25 INPUT5
CH26 INPUT6
CH27 INPUT7
CH28 INPUT8
CH29 INPUT9
CH30 INPUT10
CH31 INPUT11
CH32 INPUT12
CH33 INPUT13
CH34 INPUT14
CH35 INPUT15
CH36 INPUT16
CH37 OMNI1
CH38 OMNI2
CH39 OMNI3
CH40 OMNI4
CH41 INPUT1
CH42 INPUT2
CH43 INPUT3
CH44 INPUT4
CH45 INPUT5
CH46 INPUT6
CH47 INPUT7
CH48 INPUT8
MODE:SLOT1 時のパッチ設定
140
DM1000/MB1000/SP1000
CH29 SLOT1-13
CH30 SLOT1-14
CH31 SLOT1-15
CH32 SLOT1-16
CH33 SLOT1-1
CH34 SLOT1-2
CH35 SLOT1-3
CH36 SLOT1-4
CH37 SLOT1-5
CH38 SLOT1-6
CH39 SLOT1-7
CH40 SLOT1-8
CH41 SLOT1-9
CH42 SLOT1-10
CH43 SLOT1-11
CH44 SLOT1-12
CH45 SLOT1-13
CH46 SLOT1-14
CH47 SLOT1-15
CH48 SLOT1-16
MODE:SLOT2 時のパッチ設定
141
DM1000/MB1000/SP1000
CH39 SLOT2-7
CH40 SLOT2-8
CH41 SLOT2-9
CH42 SLOT2-10
CH43 SLOT2-11
CH44 SLOT2-12
CH45 SLOT2-13
CH46 SLOT2-14
CH47 SLOT2-15
CH48 SLOT2-16
MODE:2TRD 時のパッチ設定
142
DM1000/MB1000/SP1000
1. Preparation
1) Connect the D-sub 15-pin cable to the [METER] terminal on the rear of the DM1000.
2) If there is no DM1000, supply +16.5 V power with an external power supply to the +12V terminal and the ground
terminal.
Note: If a stand-alone inspection is carried out with the unit installed on the DM1000 main unit, the Loopback test
generates an error.
3. Inspection Items
3-1. Switch Inspection
The operation of each switch is judged by whether the LED lights up or goes out when the switch is pressed.
Switch Action
1-16 1-16 light up/go out
17-32 17-32 light up/go out
33-48 33-48 LED light up/go out
PEAK HOLD PEAK HOLD LED light up/go out
REMOTE1 REMOTE1 LED light up/go out
REMOTE2 REMOTE2 LED light up/go out
MASTER MASTER LED light up/go out
143
DM1000/MB1000/SP1000
MB1000テストプログラム
※ MB1000 のテストプログラムを行います。
1. 準備
1) DM1000 リア側の[METER]端子に、MB1000 の D-SUB 15 ピンケーブルを接続します。
2) DM1000 が無い場合は、+12V 端子と GND 端子に外部電源にて +16.5V を供給します。
注) DM1000 本体に取り付けた状態で単独検査を行った場合、LoopBack テストは ERROR になります。
2. 検査プログラムの起動方法
1) [PEAK HOLD]スイッチ、 [33-48]スイッチ及び[MASTER] スイッチを押しながら電源投入で単独検査モードになり、
スイッチ検査が始まります。
2) 再び[PEAK HOLD]スイッチ、 [33-48]スイッチ及び[MASTER ]スイッチを押すと LED 検査 1 が始まります。
(再びスイッチ検査を行う場合は、電源の再投入が必要です。)
3) 以降[REMOTE1]スイッチ、 [REMOTE2] スイッチを押すとテスト項目が変わります。
4) LED 検査 6 と 7 の時に[1-16]スイッチ、[17-32 ]スイッチを押すと LED 点灯時間が変わります。
([ 1-16]スイッチを押すごとに、点灯が早くなり、 [17-32]スイッチを押すごとに、点灯が遅くなります。 )
3. 検査項目
3-1. スイッチ検査
スイッチを押した時、LED の点灯消灯で判定します。
スイッチ 動作
1-16 1-16 点灯/消灯
17-32 17-32 点灯/消灯
33-48 33-48 LED点灯/消灯
PEAK HOLD PEAK HOLD LED点灯/消灯
REMOTE1 REMOTE1 LED点灯/消灯
REMOTE2 REMOTE2 LED点灯/消灯
MASTER MASTER LED点灯/消灯
3-2. LED 検査
検査番号 検査項目
1 通信ループバックテスト 正常:H10='0'、エラー:H10='E'
REMOTE1 ↓↑ REMOTE2
2 LED 全点灯
3 緑色 LED 全点灯
4 橙色 LED 全点灯
5 赤色 LED 全点灯
6 Channel バーグラフ点灯
(LED 点灯順序 CH1 下→上 ..CH16 下→上 , OUT BUS1 下→上 ..OUT BUS8 下→上)
7 その他点灯
(INPUT METERING POSITION PRE EQ → PRE FADER → POST FADER →
OUTPUT METERING POSITION PRE EQ → PRE FADER → POST FADER →
1-16_L → 17-32_L → 33-48_L → AUX/BUS1-8_L →
1-16_M → 17-32_M → 33-48_M → AUX/BUS1-8_M →
1-16_R → 17-32_R → 33-48_R → AUX/BUS1-8_R →
1-16 SW → 17-32 SW → 33-48 SW →
PEAK HOLD SW → REMOTE1 SW → REMOTE2 SW → MASTER SW)
8 TIME CODE H10 → H1 → M10 → M1 → S10 → S1 → F10 → F1 点灯繰り返し
(点灯順序:0 → 1..9 → .(ドット))
144
DM1000/MB1000/SP1000
145
DM1000/MB1000/SP1000
You can back up data stored in the DM1000, such as libraries and Scenes, to an external MIDI device by using MIDI Bulk
Dump. In this way, you can later restore previous DM1000 settings by transmitting this MIDI data back to the DM1000.
1 Press the DISPLAY ACCESS [SETUP] button repeatedly until the Setup | MIDI/Host page appears, then specify
ports for transmission and reception of MIDI messages.
2 Make connections using the ports selected in Step 1 so that the DM1000 can transmit and receive MIDI messages
to and from the external device.
3 Press the DISPLAY ACCESS [MIDI] button, then press the [F4] button.
Note: Some of the data transmitted from the DM1000 to the sequence software may occasionally drop out during Bulk
Dump transmission. To avoid this, we recommend that you use the included Studio Manager software to store DM1000
data to an external device.
q CATEGORY section
This section enables you to select data for transmission and reception.
w REQUEST
Move the cursor to this button, then press [ENTER] to transmit messages from the DM1000 that request a second DM1000
(connected to the first DM1000) to transmit the data specified in the CATEGORY section. This button is used primarily when
two DM1000s are connected in cascade.
e TRANSMIT
Move the cursor to this button, then press [ENTER] to transmit data specified in the CATEGORY section to an external MIDI
device.
r INTERVAL
This parameter specifies the interval between data packets during bulk transmission in 50 millisecond steps. If the external
device drops part of the bulk data, increase this parameter value.
146
DM1000/MB1000/SP1000
4 In the CATEGORY section, move the cursor to the button of the data type you want to transmit, then press [ENTER].
The following options are available:
• ALL................................. This button selects all data available for bulk dump. When this button is turned on, all other
buttons in this section are turned off.
• SCENEMEM................... This button selects Scene memories. You can select Scenes you wish to transmit in the parameter
box next to the button.
• AUTOMIX ...................... This button selects Automix memories. You can select Automixes you wish to transmit in the
parameter box next to the button.
• LIBRARY........................ This button selects libraries. You can select the type of library in the TYPE parameter box (next
to the button), then specify the library number in the parameter box on the right.
• BANK............................. This parameter enables you to select the User Defined Key banks (KEYS UDEF), User Defined
Remote Layer banks (RMD UDEF), or User Assignable Layer banks (USR LAYER) for bulk
dump. You can select one of these three types in the parameter box next to the button, and select
the banks in the parameter box on the right.
• SETUPMEM................... This button selects the DM1000 setup data (i.e., system set-tings).
• PGM TABLE................... This button selects the MIDI | Pgm Asgn page settings.
• CTL TABLE.................... This button selects the MIDI | Ctl Asgn page settings.
• PLUG-IN......................... This button selects the settings of any optional Y56K cards installed in Slot #1 or #2. You can
select Y56K card programs in the parameter box next to the button.
Note: Data selected by the SETUPMEM button includes MIDI transmission and reception port settings and message
settings. After you store to an external device bulk dump data that has its reception disabled, if the DM1000 later starts to
receive this particular data, DM1000 bulk dump reception will be turned off immediately, and the DM1000 will be unable
to receive subsequent data. Therefore, before you store the data selected by the SETUPMEM button using Bulk Dump,
be sure to enable bulk data transmission and reception.
5 If necessary, move the cursor to the parameter box next to the selected button, then rotate the Parameter wheel or
press the [INC]/[DEC] buttons to select the desired bulk dump data.
Tip: If you selected [ALL] in the parameter box, all data selected by the corresponding button is transmitted as bulk
dump data.
6 To start transmitting bulk data, move the cursor to the TRANSMIT button, then press [ENTER].
Bulk Dump is executed. During the operation, the Bulk Dump window appears, indicating the current bulk dump status. To
abort the bulk dump operation, move the cursor to the CANCEL button in the window, then press [ENTER].
Tip: To transmit bulk dump request messages, move the cursor to the REQUEST button, then press [ENTER]. If a
second DM1000 is connected, it will transmit bulk data to the first DM1000 in response to the request.
7 To receive bulk data, press the DISPLAY ACCESS [MIDI] button repeatedly until the MIDI | Setup page appears, then
turn on the Rx ON/OFF button in the BULK row.
Now, when the DM1000 receives bulk data, the corresponding internal data is updated.
147
DM1000/MB1000/SP1000
ノート:バルクダンプ機能を使ってコンピューターに各種データを送信するとき、場合によってはシーケンスソフト
ウェア側でデータを取りこぼしてしまうことがあります。このため、DM1000 内部のデータを保存するときは、付属
のアプリケーションソフト“Studio Manager”を利用することをおすすめします。
画面内の内容は次のとおりです。
q CATEGORY フィールド
送受信するデータを選択します。
w REQUEST ボタン
このボタンにカーソルを合わせて[ENTER]キーを押すと、外部に接続されたもう 1 台の DM1000 に対して、CATEGORY
フィールドで選択したデータを送信するように要求するメッセージが送られます。主に 2 台の DM1000 をカスケード接続
したときに利用するボタンです。
e TRANSMIT ボタン
このボタンにカーソルを合わせて[ENTER]キーを押すと、CATEGORY フィールドで選択したデータを外部 MIDI 機器
に出力します。
r INTERVAL パラメーターボックス
バルクデータの送信間隔を50ミリ秒単位で設定します。外部機器側でバルクデータの取りこぼしが発生するときに、この
パラメーターボックスの設定値を大きくします。
148
DM1000/MB1000/SP1000
4 CATEGORYフィールドの中からバルクダンプしたいデータに相当するボタンにカーソルを合わせ、
[ENTER]キーを押し
ます。
各ボタンの内容は次のとおりです。
・ALL ボタン ...................... バルクダンプ可能なすべてのデータを選択します。このボタンがオンのときは、他のボタンは
自動的にオフになります。
・SCENEMEM ボタン ...... シーンメモリーを選択します。ボタン右側のパラメーターボックスを使ってバルクダンプする
シーンを選択できます。
・AUTOMIX ボタン ........... オートミックスメモリーを選択します。ボタン右側のパラメーターボックスを使って、バルク
ダンプするオートミックスメモリーを選択できます。
・LIBRARY ボタン ............. ライブラリーの内容を選択します。ボタン右側の TYPE パラメーターボックスを使ってライブ
ラリーの種類を選択し、さらに右側のパラメーターボックスを使ってライブラリーの番号を選
択できます
・BANK ボタン .................. ユーザー定義キーの設定(KEYS UDEF)、ユーザー定義によるリモート機能の設定(RMD
UDEF )
、ユーザーアサイナブルレイヤーの設定(USR LAYER )の中からバルクダンプするパ
ラメーターを選択します。ボタン右側のパラメーターボックスを使って、バルクダンプの対象
とそのバンクを選択できます。
・SETUPMEN..................... DM1000 のシステム設定を選択します。
・PGM TABLE ボタン ...... MIDI 画面の PGM ASGN ページの設定内容を選択します。
・CTL TABLE ボタン ........ MIDI 画面の CTL ASGN ページの設定内容を選択します。
・PLUG‐ IN........................ バルクダンプの対象としてスロット1または2に装着したオプションのY56Kカードの設定を選
択します。右側に表示されるパラメーターボックスを使って Y56K カードのプログラムを選択
できます。
5 必要に応じて、ボタン右側のパラメーターボックスにカーソルを合わせ、パラメーターホイールまたは[INC]/[DEC]キー
を使ってバルクダンプしたいデータを選択します。
ヒント:パラメーターボックスで“
[ALL]
”を選んだ場合は、そのパラメーターのすべてのデータがバルクダンプの
対象として選択されます。
149
DM1000/MB1000/SP1000
q Status q Status
If the Status is “Okay,” the battery has sufficient voltage この表示が“Okay”ならバッテリーに十分な残量があ
for operation. If the Status is “Voltage low!,” failure to ります。表示が“Voltage low!”に変わった場合は、消
replace a low battery may result in data loss. 耗した電池を交換せずにいると、データが失われるこ
とがあります。
w Ver X.XX (X.XX represents the version number.) w Ver X.XX(X.XX には番号が入ります)
This indicator identifies the system version number. システムのバージョン番号を表示します。システムの
Check the current system version number before you バージョンアップなどを行なうときは、この表示で現
update the system software. 在利用しているシステムのバージョンを確認します。
1 Make sure that the power to the DM1000 is turned off. 1 DM1000の電源がオフになっていることを確認します。
2 While holding down the [ENTER] button, turn on the 2 [ENTER]キーを押しながら、POWER ON/OFFスイッ
POWER ON/OFF switch. チをオンにします。
After a moment, the DM1000 displays a message しばらくすると、ディスプレイにキャリブレーション
indicating that the calibration is in progress. Calibration 中であることを示すメッセージが表示されます。キャ
takes about two minutes. It is important that you do not リブレーションには約 2 分かかります。この間は絶対
touch the faders while this message is displayed. にフェーダーに触れないでください。
When calibration is finished, the DM1000 displays a キャリブレーションが終了すると、フェーダー位置の
page that enables you to fine-tune the fader position. 微調節を行なう画面が表示されます。
4 Set faders 1–16 to –15 and the Stereo fader to –30, 4 画面の指示に従ってフェーダー 1 ∼ 16 を− 15 の目盛
then press [ENTER]. り、STEREO フェーダーを− 30 の目盛りにあわせて
[ENTER]キーを押します。
6 Finally, set faders 1–16 to +10 and the Stereo fader 6 最後にフェーダー 1 ∼ 16 を+ 10 の目盛り、STEREO
to 0, then press [ENTER]. フェーダーを 0 の目盛りにあわせて[ENTER]キーを
This is the end of the fader calibration process. The 押します。
DM1000 restarts in normal mode. これでフェーダーの再調整は終了です。再調整が終わ
ると、DM1000 が通常モードで起動します。
150
DM1000/MB1000/SP1000
The following data types of parameter change are used by the DM1000.
1.2 SYSTEM COMMON MESSAGE
Type (HEX) tx/rx function
Command rx/tx function
1 (01) tx/rx Edit buffer
F1 MIDI TIME CODE QUARTER rx MTC
FRAME 2 (02) tx/rx Patch data
F2 SONG POSITION POINTER rx Used when TIME REFERENCE is 3 (03) tx/rx Setup data
MIDI CLOCK. 4 (04) tx/rx Backup data
15 (0F) tx/rx Cascade data
16 (10) tx/rx Function (recall, store, title, clear)
1.3 SYSTEM REAL
TIME MESSAGE
17 (11) rx Function (pair, copy)
Command rx/tx function 18 (12) rx Function (effect)
F8 TIMING CLOCK rx MIDI clock 19 (13) tx/rx Sort table
FA START rx Start automix (from the beginning) 20 (14) tx/rx Function (attribute, link)
FB CONTINUE rx Start automix (from the middle) 32 (20) rx Key remote
FC STOP rx Stop automix 33 (21) tx/rx Remote meter
FE ACTIVE SENSING rx Check MIDI cable connections 34 (22) tx/rx Remote time counter
FF RESET rx Clear running status 35 (23) tx/rx Automix status
80 (50) tx/rx Function response (recall, store,
title, clear)
1.4 EXCLUSIVE MESSAGE
84 (54) tx/rx Function response (attribute, link)
126 (7E) tx/rx System Attribute
1.4.1 Real Time System Exclusive
127 (7F) tx Active sense
Command rx/tx function
F0 7F dd 06 … F7 MMC tx MMC command
* ‘tx’ indicates that the data can be transmitted from the DM1000, and
COMMAND ‘rx’ indicates that the data can be received by the DM1000.
F0 7F dd 07 … F7 MMC RESPONSE rx MMC response
F0 7F dd 01 … F7 MIDI TIME CODE rx MTC full message 2. Format Details
1.4.2 System Exclusive Message
2.1 NOTE OFF (8n)
1.4.2.1 Bulk Dump Reception
Command rx/tx function If [OTHER ECHO] is ON, these message are echoed from MIDI OUT.
F0 43 0n 7E … F7 BULK DUMP rx/tx BULK DUMP DATA If the [Rx CH] matches, these messages are received and used to control effects.
DATA
STATUS 1000nnnn 8n Note off message
F0 43 2n 7E … F7 BULK DUMP rx/tx BULK DUMP REQUEST
REQUEST DATA 0nnnnnnn nn Note number
0vvvvvvv vv Velocity(ignored)
The following data types of bulk dump are used on the DM1000.
Data name tx/rx function
2.2 NOTE ON (9n)
‘m’ tx/rx Scene Memory & Request
(compressed data) Reception
‘S’ tx/rx Setup Memory & Request If [OTHER ECHO] is ON, these messages are echoed from MIDI OUT.
‘a’ tx/rx Automix data & Request If the [Rx CH] matches, these messages are received and used to control effects.
(compressed data)
‘R’ tx/rx Input patch library & Request STATUS 1001nnnn 9n Note on message
‘O’ tx/rx Output patch library & Request DATA 0nnnnnnn nn Note number
‘H’ tx/rx Channel library & Request 0vvvvvvv vv Velocity(1-127:on, 0:off)
‘G’ tx/rx Gate library & Request
‘Y’ tx/rx Compressor library & Request
2.3 CONTROL CHANGE (Bn)
‘Q’ tx/rx Equalizer library & Request
‘E’ tx/rx Effect library & Request Reception
‘J’ tx/rx Bus to Stereo library & Request If [Control Change ECHO] is ON, these messages are echoed from MIDI OUT.
‘K’ tx/rx Surround Monitor library & Request If [TABLE] is selected, these message are received if [Control Change Rx] is ON,
‘P’ tx/rx Program change table & Request and will control parameters according to the [Control assign table] settings.
‘C’ tx/rx Control change table & Request The parameters that can be set are defined in the Control Change Assign Pa-
‘L’ tx/rx User define layer & Request rameter List.
‘V’ tx/rx User define key & Request If [NRPN] is selected, these messages are received if [Control Change Rx] is ON
‘U’ tx/rx User assignable layer & Request and the [Rx CH] matches, and will control the parameter that is specified by the
‘N’ tx/rx Plug-in Effect Card Data & Request four messages NRPN control number (62h, 63h) and Data Entry control num-
ber (06h, 26h). Parameter settings are defined in the Control Change Assign Pa-
rameter List.
151
DM1000/MB1000/SP1000
*1) The second and subsequent STATUS need not be added during
2.11 SYSTEM RESET (FF)
transmission. Reception must be implemented so that reception oc- Reception
curs whether or not STATUS is present. When this message is received, MIDI communications will be cleared, e.g., by
clearing the Running Status.
2.4 PROGRAM CHANGE (Cn)
STATUS 11111111 FF System reset
Reception
If [Program Change ECHO] is ON, these messages are echoed from MIDI
2.12 SYSTEM EXCLUSIVE MESSAGE (F0)
OUT.
If [Program Change RX] is ON and the [Rx CH] matches, these messages will
2.12.1 MIDI MACHINE CONTROL (MMC)
be received. However if [OMNI] is ON, they will be received regardless of the
channel. When a message is received, a Scene Memory will be recalled according These messages are transmitted when the Machine Control section of the
to the settings of the [Program Change Table]. DM1000 is operated.
152
DM1000/MB1000/SP1000
153
DM1000/MB1000/SP1000
DATA NAME 01001100 4C ‘L’ 2.12.2.8 User Defined Keys bulk dump request format
00000000 00 The second and third bytes of the DATA NAME indicate the bank number.
0bbbbbbb bb b=0-3(bank no.1-4) STATUS 11110000 F0 System exclusive message
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
0bbbbbbb bb current block number(0-total block number) SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
DATA 0ddddddd ds User define layer data of block[bb] FORMAT No. 01111110 7E Universal bulk dump
: : 01001100 4C ‘L’
0ddddddd de 01001101 4D ‘M’
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F 00100000 20 ‘’
EOX 11110111 F7 End of exclusive 00100000 20 ‘’
00111000 38 ‘8’
2.12.2.6 User Defeined MIDI Remote bulk dump request
01000011 43 ‘C’
format
00111001 39 ‘9’
The second and third bytes of the DATA NAME indicate the bank number.
00110001 31 ‘1’
STATUS 11110000 F0 System exclusive message DATA NAME 01010110 56 ‘V’
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 00000000 00
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) 0bbbbbbb bb b=0-7(bank no.A-H)
FORMAT No. 01111110 7E Universal bulk dump EOX 11110111 F7 End of exclusive
01001100 4C ‘L’
01001101 4D ‘M’ 2.12.2.9 User Assignable Layer bulk dump format
00100000 20 ‘’ The second and third bytes of the DATA NAME indicate the bank number.
00100000 20 ‘’ Be aware that the state of the transmission destination will (in some cases)
00111000 38 ‘8’ change if the same bank is being used.
01000011 43 ‘C’ STATUS 11110000 F0 System exclusive message
00111001 39 ‘9’ ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
00110001 31 ‘1’ SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
DATA NAME 01001100 4C ‘L’ FORMAT No. 01111110 7E Universal bulk dump
00000000 00 COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
0bbbbbbb bb b=0-3(bank no.1-4) COUNT LOW 0ccccccc cl
EOX 11110111 F7 End of exclusive 01001100 4C ‘L’
01001101 4D ‘M’
2.12.2.7 User Defined Keys bulk dump format 00100000 20 ‘’
The second and third bytes of the DATA NAME indicate the bank number. 00100000 20 ‘’
Be aware that the state of the transmission destination will (in some cases) ‘8’
00111000 38
change if the same bank is being used.
01000011 43 ‘C’
STATUS 11110000 F0 System exclusive message 00111001 39 ‘9’
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 00110001 31 ‘1’
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) DATA NAME 01010101 55 ‘U’
FORMAT No. 01111110 7E Universal bulk dump 00000000 00
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 0bbbbbbb bb b=0-3(bank no.1-4)
COUNT LOW 0ccccccc cl BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
01001100 4C ‘L’ 0bbbbbbb bb current block number(0-total block number)
01001101 4D ‘M’ DATA 0ddddddd ds User assignable layer data of block[bb]
00100000 20 ‘’ : :
00100000 20 ‘’ 0ddddddd de
00111000 38 ‘8’ CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
01000011 43 ‘C’ EOX 11110111 F7 End of exclusive
00111001 39 ‘9’
00110001 31 ‘1’ 2.12.2.10 User Assignable Layer bulk dump request format
DATA NAME 01010110 56 ‘V’ The second and third bytes of the DATA NAME indicate the bank number.
00000000 00 System exclusive message
STATUS 11110000 F0
0bbbbbbb bb b=0-7(bank no.A-H)
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
0bbbbbbb bb current block number(0-total block number)
FORMAT No. 01111110 7E Universal bulk dump
DATA 0ddddddd ds User define key data of block[bb]
01001100 4C ‘L’
: : ‘M’
01001101 4D
0ddddddd de ‘’
00100000 20
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
00100000 20 ‘’
EOX 11110111 F7 End of exclusive
00111000 38 ‘8’
01000011 43 ‘C’
00111001 39 ‘9’
00110001 31 ‘1’
DATA NAME 01010101 55 ‘U’
00000000 00
0bbbbbbb bb b=0-3(bank no.1-4)
EOX 11110111 F7 End of exclusive
154
DM1000/MB1000/SP1000
2.12.2.11 Control change table bulk dump format 2.12.2.14 Program change table bulk dump request format
STATUS 11110000 F0 System exclusive message STATUS 11110000 F0 System exclusive message
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
FORMAT No. 01111110 7E Universal bulk dump FORMAT No. 01111110 7E Universal bulk dump
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 01001100 4C ‘L’
COUNT LOW 0ccccccc cl 01001101 4D ‘M’
01001100 4C ‘L’ 00100000 20 ‘’
01001101 4D ‘M’ 00100000 20 ‘’
00100000 20 ‘’ 00111000 38 ‘8’
00100000 20 ‘’ 01000011 43 ‘C’
00111000 38 ‘8’ 00111001 39 ‘9’
01000011 43 ‘C’ 00110001 31 ‘1’
00111001 39 ‘9’ DATA NAME 01010000 50 ‘P’
00110001 31 ‘1’ 00000010 02
DATA NAME 01000011 43 ‘C’ 00000000 00 No.256 = Current
00000010 02 EOX 11110111 F7 End of exclusive
00000000 00 No.256 = Current
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) 2.12.2.15 Equalizer library bulk dump format
0bbbbbbb bb current block number(0-total block number) The second and third bytes of the DATA NAME indicate the bank number.
DATA 0ddddddd ds Control change table data of block[bb] 0:Library no.1 – 199:Library no.200,
: : 256:CH1 – 303:CH48, 384:BUS1 – 391:BUS8, 512:AUX1 – 519:AUX8, 768:STE-
REO, 8192:UNDO
0ddddddd de
256 and following are data for the corresponding channel of the edit buffer.
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
For reception by the DM1000, only the user area is valid. (40-199, 256-)
EOX 11110111 F7 End of exclusive
STATUS 11110000 F0 System exclusive message
2.12.2.12 Control change table bulk dump request format ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
STATUS 11110000 F0 System exclusive message
FORMAT No. 01111110 7E Universal bulk dump
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
COUNT LOW 0ccccccc cl
FORMAT No. 01111110 7E Universal bulk dump
01001100 4C ‘L’
01001100 4C ‘L’
01001101 4D ‘M’
01001101 4D ‘M’
00100000 20 ‘’
00100000 20 ‘’
00100000 20 ‘’
00100000 20 ‘’
00111000 38 ‘8’
00111000 38 ‘8’
01000011 43 ‘C’
01000011 43 ‘C’
00111001 39 ‘9’
00111001 39 ‘9’
00110001 31 ‘1’
00110001 31 ‘1’
DATA NAME 01010001 51 ‘Q’
DATA NAME 01000011 43 ‘C’
0mmmmmmm mh 0-127(EQ Library no.1-128),
00000010 02
0mmmmmmm ml 256-(Channel current data)
00000000 00 No.256 = Current
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
EOX 11110111 F7 End of exclusive
0bbbbbbb bb current block number(0-total block number)
DATA 0ddddddd ds EQ Library data of block[bb]
2.12.2.13 Program change table bulk dump format
: :
STATUS 11110000 F0 System exclusive message
0ddddddd de
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) ee=(Invert(‘L’+…+de)+1)&0x7F
CHECK SUM 0eeeeeee ee
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) End of exclusive
EOX 11110111 F7
FORMAT No. 01111110 7E Universal bulk dump
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 2.12.2.16 Equalizer library bulk dump request format
COUNT LOW 0ccccccc cl The second and third bytes of the DATA NAME indicate the bank number. (See
01001100 4C ‘L’ above)
01001101 4D ‘M’
STATUS 11110000 F0 System exclusive message
00100000 20 ‘’
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
00100000 20 ‘’
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
00111000 38 ‘8’
FORMAT No. 01111110 7E Universal bulk dump
01000011 43 ‘C’
01001100 4C ‘L’
00111001 39 ‘9’
01001101 4D ‘M’
00110001 31 ‘1’
00100000 20 ‘’
DATA NAME 01010000 50 ‘P’
00100000 20 ‘’
00000010 02 ‘8’
00111000 38
00000000 00 No.256 = Current
01000011 43 ‘C’
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
00111001 39 ‘9’
0bbbbbbb bb current block number(0-total block number)
00110001 31 ‘1’
DATA 0ddddddd ds Program change table data of block[bb]
DATA NAME 01010001 51 ‘Q’
: : 0-127(EQ Library no.1-128),
0mmmmmmm mh
0ddddddd de 256-(Channel current data)
0mmmmmmm ml
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
EOX 11110111 F7 End of exclusive
EOX 11110111 F7 End of exclusive
155
DM1000/MB1000/SP1000
2.12.2.18 Compressor library bulk dump request format 2.12.2.21 Effect library bulk dump format
The second and third bytes of the DATA NAME indicate the library number. The second and third bytes of the DATA NAME indicate the library number.
(See above) 0:Library no.1 – 127:Library no.128, 256:EFFECT1 – 259:EFFECT4, 8192:UN-
STATUS 11110000 F0 System exclusive message DO
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 256-263 are the data for the corresponding area of the edit buffer.
n=0-15 (Device number=MIDI Channel)
For reception by the DM1000, only the user area is valid. (52-127, 256-259,
SUB STATUS 0010nnnn 2n
8192)
FORMAT No. 01111110 7E Universal bulk dump
01001100 4C ‘L’ STATUS 11110000 F0 System exclusive message
156
DM1000/MB1000/SP1000
2.12.2.22 Effect library bulk dump request format EOX 11110111 F7 End of exclusive
The second and third bytes of the DATA NAME indicate the library number.
(See above) 2.12.2.25 Input patch library bulk dump format
System exclusive message
The second and third bytes of the DATA NAME indicate the library number.
STATUS 11110000 F0
0:Library no.0 – 32:Library no.32, 256:current input patch data, 8192:UNDO
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
For reception by the DM1000, only the user area is valid. (1-32, 256, 8192)
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
STATUS 11110000 F0 System exclusive message
FORMAT No. 01111110 7E Universal bulk dump
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
01001100 4C ‘L’
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
01001101 4D ‘M’
FORMAT No. 01111110 7E Universal bulk dump
00100000 20 ‘’
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
00100000 20 ‘’
00111000 38 ‘8’ COUNT LOW 0ccccccc cl
01001100 4C ‘L’
01000011 43 ‘C’
01001101 4D ‘M’
00111001 39 ‘9’
00100000 20 ‘’
00110001 31 ‘1’
00100000 20 ‘’
DATA NAME 01000101 45 ‘E’
00111000 38 ‘8’
0mmmmmmm mh 0-127(Effect Library no.1-128),
01000011 43 ‘C’
0mmmmmmm ml 256-259(Effect1-4 current)
00111001 39 ‘9’
EOX 11110111 F7 End of exclusive
00110001 31 ‘1’
2.12.2.23 Channel library bulk dump format DATA NAME 01010010 52 ‘R’
The second and third bytes of the DATA NAME indicate the library number. 0mmmmmmm mh 0-32(Input patch Library no.0-32),
0:Library no.0 – 128:Library no.128, 0mmmmmmm ml 256(Current data)
256:CH1 – 303:CH48, 384:BUS1 – 391:BUS8, 512:AUX1 – 519:AUX8, 768:STE- BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
REO, 8192:UNDO 0bbbbbbb bb current block number(0-total block number)
256 and following are the data for the corresponding channel of the edit buffer. DATA 0ddddddd ds Input patch Library data of block[bb]
For reception by the DM1000, only the user area is valid. (2-128, 256-) : :
STATUS 11110000 F0 System exclusive message 0ddddddd de
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) EOX 11110111 F7 End of exclusive
FORMAT No. 01111110 7E Universal bulk dump
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl 2.12.2.26 Input patch library bulk dump request format
COUNT LOW 0ccccccc cl The second and third bytes of the DATA NAME indicate the library number.
01001100 4C ‘L’ (See above)
01001101 4D ‘M’ STATUS 11110000 F0 System exclusive message
00100000 20 ‘’ ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
00100000 20 ‘’ SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
00111000 38 ‘8’ FORMAT No. 01111110 7E Universal bulk dump
01000011 43 ‘C’ 01001100 4C ‘L’
00111001 39 ‘9’ 01001101 4D ‘M’
00110001 31 ‘1’ 00100000 20 ‘’
DATA NAME 01001000 48 ‘H’ 00100000 20 ‘’
0mmmmmmm mh 0-128(Channel Library no.0-128), 00111000 38 ‘8’
0mmmmmmm ml 256-(Current data) 01000011 43 ‘C’
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) 00111001 39 ‘9’
0bbbbbbb bb current block number(0-total block number) 00110001 31 ‘1’
DATA 0ddddddd ds Channel Library data of block[bb] DATA NAME 01010010 52 ‘R’
: : 0mmmmmmm mh 0-32(Input patch Library no.0-32),
0ddddddd de 0mmmmmmm ml 256(Current data)
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F EOX 11110111 F7 End of exclusive
EOX 11110111 F7 End of exclusive
2.12.2.27 Output patch library bulk dump format
2.12.2.24 Channel library bulk dump request format The second and third bytes of the DATA NAME indicate the library number.
The second and third bytes of the DATA NAME indicate the library number. 0:Library no.0 – 32:Library no.32, 256:current output patch data, 8192:UNDO
(See above) For reception by the DM1000, only the user area is valid. (1-32, 256)
STATUS 11110000 F0 System exclusive message STATUS 11110000 F0 System exclusive message
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
FORMAT No. 01111110 7E Universal bulk dump FORMAT No. 01111110 7E Universal bulk dump
01001100 4C ‘L’ COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
01001101 4D ‘M’ COUNT LOW 0ccccccc cl
00100000 20 ‘’ 01001100 4C ‘L’
00100000 20 ‘’ 01001101 4D ‘M’
00111000 38 ‘8’ 00100000 20 ‘’
01000011 43 ‘C’ 00100000 20 ‘’
00111001 39 ‘9’ 00111000 38 ‘8’
00110001 31 ‘1’ 01000011 43 ‘C’
DATA NAME 01001000 48 ‘H’ 00111001 39 ‘9’
0mmmmmmm mh 0-128(Channel Library no.0-128), 00110001 31 ‘1’
0mmmmmmm ml 256-(Current data) DATA NAME 01001111 4F ‘O’
157
DM1000/MB1000/SP1000
0mmmmmmm mh 0-32(Output patch Library no.0-32), 2.12.2.30 Bus to Stereo library bulk dump request format
0mmmmmmm ml 256(Current data) The second and third bytes of the DATA NAME indicate the library number.
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) (See above)
0bbbbbbb bb current block number(0-total block number) STATUS 11110000 F0 System exclusive message
DATA 0ddddddd ds Output patch Library data of block[bb] ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
: : SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
0ddddddd de FORMAT No. 01111110 7E Universal bulk dump
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F 01001100 4C ‘L’
EOX 11110111 F7 End of exclusive 01001101 4D ‘M’
00100000 20 ‘’
2.12.2.28 Output patch library bulk dump request format ‘’
00100000 20
The second and third bytes of the DATA NAME indicate the library number. ‘8’
00111000 38
(See above)
01000011 43 ‘C’
STATUS 11110000 F0 System exclusive message 00111001 39 ‘9’
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 00110001 31 ‘1’
SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel) DATA NAME 01001010 4A ‘J’
FORMAT No. 01111110 7E Universal bulk dump 0mmmmmmm mh 0-32(Bus to stereo Library no.0-32),
01001100 4C ‘L’ 0mmmmmmm ml 256(Current data)
01001101 4D ‘M’ EOX 11110111 F7 End of exclusive
00100000 20 ‘’
00100000 20 ‘’ 2.12.2.31 Surround Monitor library bulk dump format
00111000 38 ‘8’ The second and third bytes of the DATA NAME indicate the library number.
01000011 43 ‘C’ 0:Library no.0 – 32:Library no.32, 256:current data, 8192:UNDO
00111001 39 ‘9’ For reception by the DM1000, only the user area is valid. (1-32, 256, 8192)
00110001 31 ‘1’ STATUS 11110000 F0 System exclusive message
DATA NAME 01001111 4F ‘O’ ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
0mmmmmmm mh 0-32(Output patch Library no.0-32), SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel)
0mmmmmmm ml 256(Current data) FORMAT No. 01111110 7E Universal bulk dump
EOX 11110111 F7 End of exclusive COUNT HIGH 0ccccccc ch data count = ch * 128 + cl
COUNT LOW 0ccccccc cl
2.12.2.29 Bus to Stereo library bulk dump format 01001100 4C ‘L’
The second and third bytes of the DATA NAME indicate the library number. 01001101 4D ‘M’
0:Library no.0 – 32:Library no.32, 256:current data, 8192:UNDO ‘’
00100000 20
For reception by the DM1000, only the user area is valid. (1-32, 256, 8192)
00100000 20 ‘’
STATUS 11110000 F0 System exclusive message 00111000 38 ‘8’
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 01000011 43 ‘C’
SUB STATUS 0000nnnn 0n n=0-15 (Device number=MIDI Channel) 00111001 39 ‘9’
FORMAT No. 01111110 7E Universal bulk dump 00110001 31 ‘1’
COUNT HIGH 0ccccccc ch data count = ch * 128 + cl DATA NAME 01001011 4B ‘K’
COUNT LOW 0ccccccc cl 0mmmmmmm mh 0-32(Surround Monitor Library no.0-32),
01001100 4C ‘L’ 0mmmmmmm ml 256(Current data)
01001101 4D ‘M’ BLOCK INFO. 0ttttttt tt total block number(minimum number is 0)
00100000 20 ‘’ 0bbbbbbb bb current block number(0-total block number)
00100000 20 ‘’ DATA 0ddddddd ds Surround Monitor Library data of block[bb]
00111000 38 ‘8’ : :
01000011 43 ‘C’ 0ddddddd de
00111001 39 ‘9’ CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F
00110001 31 ‘1’ EOX 11110111 F7 End of exclusive
DATA NAME 01001010 4A ‘J’
0mmmmmmm mh 0-32(Bus to stereo Library no.0-32), 2.12.2.32 Surround Monitor library bulk dump request
0mmmmmmm ml 256(Current data) format
BLOCK INFO. 0ttttttt tt total block number(minimum number is 0) The second and third bytes of the DATA NAME indicate the library number.
0bbbbbbb bb current block number(0-total block number) (See above)
DATA 0ddddddd ds Bus to stereo Library data of block[bb]
STATUS 11110000 F0 System exclusive message
: : ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
0ddddddd de SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
CHECK SUM 0eeeeeee ee ee=(Invert(‘L’+…+de)+1)&0x7F Universal bulk dump
FORMAT No. 01111110 7E
EOX 11110111 F7 End of exclusive ‘L’
01001100 4C
01001101 4D ‘M’
00100000 20 ‘’
00100000 20 ‘’
00111000 38 ‘8’
01000011 43 ‘C’
00111001 39 ‘9’
00110001 31 ‘1’
DATA NAME 01001011 4B ‘K’
0mmmmmmm mh 0-32(Surround Monitor Library no.0-32),
0mmmmmmm ml 256(Current data)
EOX 11110111 F7 End of exclusive
158
DM1000/MB1000/SP1000
0ttttttt th total block number(minimum number is 0) SUB STATUS 0010nnnn 2n n=0-15 (Device number=MIDI Channel)
: : 01001101 4D ‘M’
0ddddddd de 00100000 20 ‘’
00100000 20 ‘’ : :
00111000 38 ‘8’ EOX 11110111 F7 End of exclusive
01000011 43 ‘C’ *) For parameters with a data size of 2 or more, data for that size will be
00111001 39 ‘9’ transmitted.
00110001 31 ‘1’
159
DM1000/MB1000/SP1000
2.12.3.1.2 Parameter Change basic format (Universal 2.12.3.3 Parameter request (Edit buffer)
format) STATUS 11110000 F0 System exclusive message
STATUS 11110000 F0 System exclusive message ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel)
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) GROUP ID 00111110 3E MODEL ID (digital mixer)
GROUP ID 00111110 3E MODEL ID (digital mixer) MODEL ID 01111111 7F Universal
MODEL ID 01111111 7F Universal ADDRESS 00000001 01 Edit Buffer
ADDRESS 0ttttttt tt Data type 0eeeeeee Element no.
ee
Element no. (If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
0eeeeeee ee
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes) 0ppppppp pp Parameter no.
0ppppppp pp Parameter no. 0ccccccc cc Channel no.
0ccccccc cc Channel no. EOX 11110111 F7 End of exclusive
DATA *) 0ddddddd dd data
: : 2.12.3.4 Parameter change (Patch data)
EOX 11110111 F7 End of exclusive STATUS 11110000 F0 System exclusive message
*) For parameters with a data size of 2 or more, data for that size will be ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
transmitted. SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
GROUP ID 00111110 3E MODEL ID (digital mixer)
2.12.3.1.3 Parameter request basic format MODEL ID 00001100 0C DM1000
STATUS 11110000 F0 System exclusive message ADDRESS 00000010 02 Patch data
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 0eeeeeee Element no.
ee
n=0-15 (Device number=MIDI Channel) (If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
SUB STATUS 0011nnnn 3n
MODEL ID (digital mixer)
0ppppppp pp Parameter no.
GROUP ID 00111110 3E
DM1000
0ccccccc cc Channel no.
MODEL ID 00001100 0C
Data type
DATA 0ddddddd dd data
ADDRESS 0ttttttt tt
Element no.
: :
0eeeeeee ee
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes) EOX 11110111 F7 End of exclusive
0ppppppp pp Parameter no.
0ccccccc cc Channel no. 2.12.3.5 Parameter request (Patch data)
EOX 11110111 F7 End of exclusive STATUS 11110000 F0 System exclusive message
ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
2.12.3.1.4 Parameter request basic format (Universal SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel)
format) GROUP ID 00111110 3E MODEL ID (digital mixer)
STATUS 11110000 F0 System exclusive message MODEL ID 00001100 0C DM1000
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) ADDRESS 00000010 02 Patch data
SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel) 0eeeeeee Element no.
ee
MODEL ID (digital mixer) (If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
GROUP ID 00111110 3E
Universal
0ppppppp pp Parameter no.
MODEL ID 01111111 7F
Data type
0ccccccc cc Channel no.
ADDRESS 0ttttttt tt
Element no.
EOX 11110111 F7 End of exclusive
0eeeeeee ee
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
0ppppppp pp Parameter no. 2.12.3.6 Parameter change (Setup memory)
0ccccccc cc Channel no. STATUS 11110000 F0 System exclusive message
EOX 11110111 F7 End of exclusive ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
2.12.3.1.5 Parameter Address GROUP ID 00111110 3E MODEL ID (digital mixer)
Consult your dealer for parameter address details. MODEL ID 00001100 0C DM1000
ADDRESS 00000011 03 Setup data
2.12.3.2 Parameter change (Edit buffer)
0eeeeeee Element no.
ee
STATUS 11110000 F0 System exclusive message (If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 0ppppppp pp Parameter no.
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) 0ccccccc cc Channel no.
GROUP ID 00111110 3E MODEL ID (digital mixer) DATA 0ddddddd dd data
MODEL ID 01111111 7F Universal : :
ADDRESS 00000001 01 Edit Buffer EOX 11110111 F7 End of exclusive
0eeeeeee Element no.
ee
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes) 2.12.3.7 Parameter request (Setup memory)
0ppppppp pp Parameter no.
STATUS 11110000 F0 System exclusive message
0ccccccc cc Channel no. Manufacture’s ID number (YAMAHA)
ID No. 01000011 43
DATA 0ddddddd dd data n=0-15 (Device number=MIDI Channel)
SUB STATUS 0011nnnn 3n
: : MODEL ID (digital mixer)
GROUP ID 00111110 3E
EOX 11110111 F7 End of exclusive DM1000
MODEL ID 00001100 0C
ADDRESS 00000011 03 Setup data
0eeeeeee Element no.
ee
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
0ppppppp pp Parameter no.
0ccccccc cc Channel no.
EOX 11110111 F7 End of exclusive
160
DM1000/MB1000/SP1000
2.12.3.8 Parameter change (Backup memory) 2.12.3.12 Parameter change (Function call: Library store /
STATUS 11110000 F0 System exclusive message recall)
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) Reception
SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel) When this is received, the specified memory/library will be stored/recalled. If
GROUP ID 00111110 3E MODEL ID (digital mixer) this is received from Studio Manager or Cascade Link, the operation will be ex-
MODEL ID 00001100 0C DM1000 ecuted, and then the result of execution will be transmitted as a Parameter Re-
Backup data
sponse.
ADDRESS 00000100 04
0eeeeeee Element no.
ee Transmission
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes) If [Parameter change Tx] is ON, and you store or recall a memory/library for
0ppppppp pp Parameter no. which Program Change transmission is not valid, this message will be transmit-
0ccccccc cc Channel no. ted with the Device Number set to the [Tx CH].
DATA 0ddddddd dd data STATUS 11110000 F0 System exclusive message
: : ID No. 01000011 43 Manufacture’s ID number (YAMAHA)
EOX 11110111 F7 End of exclusive SUB STATUS 0001nnnn 1n n=0-15 (Device number=MIDI Channel)
GROUP ID 00111110 3E MODEL ID (digital mixer)
2.12.3.9 Parameter request (Backup memory) Universal
MODEL ID 01111111 7F
STATUS 11110000 F0 System exclusive message ADDRESS 00010000 10 Function call
ID No. 01000011 43 Manufacture’s ID number (YAMAHA) 00ffffff ff function
SUB STATUS 0011nnnn 3n n=0-15 (Device number=MIDI Channel) 0mmmmmmm mh number High
GROUP ID 00111110 3E MODEL ID (digital mixer) 0mmmmmmm ml number Low
MODEL ID 00001100 0C DM1000 DATA 0ccccccc ch channel High
ADDRESS 00000100 04 Backup data 0ccccccc cl channel Low
0eeeeeee Element no.
ee EOX 11110111 F7 End of exclusive
(If ‘ee’ is 0, ‘ee’ is expanded to two bytes)
0ppppppp pp Parameter no. function number channel*1) tx/rx
0ccccccc cc Channel no. SCENE RECALL 0x00 0-99, 8192 256 tx/rx
EQ LIB RECALL 0x01 1-128, 8192 0-513 tx/rx
EOX 11110111 F7 End of exclusive
GATE LIB RECALL 0x02 1-128, 8192 0-95 tx/rx
COMP LIB RECALL 0x03 1-128, 8192 0-513 tx/rx
2.12.3.10 Parameter change (Cascade data)
EFF LIB RECALL 0x04 1-128, 8192 0-3 tx/rx
Reception CHANNEL LIB RECALL 0x06 0-128, 8192 0-513 tx/rx
This message is echoed if [Parameter change ECHO] is ON. INPATCH LIB RECALL 0x07 0-32, 8192 256 tx/rx
Data received from a port that is assigned to [Cascade Link] and whose Device OUTPATCH LIB RECALL 0x08 0-32, 8192 256 tx/rx
Number included in the SUB STATUS matches the [Rx CH] will be received for Bus to Stereo LIB RECALL 0x09 0-32, 8192 256 tx/rx
processing. Surround Monitor LIB RECALL 0x0A 0-32, 8192 256 tx/rx
When this is received, the specified parameter will be controlled. AUTOMIX LIB RECALL 0x0B 1-16 256 tx/rx
161
DM1000/MB1000/SP1000
162
DM1000/MB1000/SP1000
163
DM1000/MB1000/SP1000
164
DM1000/MB1000/SP1000
165
DM1000/MB1000/SP1000
Note X 0—127
True Voice
Number ************** X
Note On X O
Velocity Effect Control
Note Off X O
Key s X X
After
Ch s X X
Pitch Bend X X
Control
0-95,102-119 O O Assignable
Change
System Exclusive O O *1
:Song Pos X O
System
:Song Sel X X Automix
Common
:Tune X X
:Local ON/OFF X X
Aux :All Notes OFF X X
Messages :Active Sense X O
:Reset X O
PARTS LIST
CONTENTS(目次)
OVERALL ASSEMBLY(総組立).............................................. 2
BOTTOM ASSEMBLY(ボトムAss’y) ..................................... 5
REAR ASSEMBLY U(リア上Ass’y)....................................... 9
CONTROL PANEL ASSEMBLY(コンパネAss’y)................ 12
ELECTRICAL PARTS(電気部品)...................................... 17-69
WARNING
Components having special characteristics are marked and must be replaced with parts having
specification equal to those originally installed.
印の部品は、安全を維持するために重要な部品です。交換する場合は、安全のために必ず指定の部品をご
使用下さい。
OVERALL ASSEMBLY(総組立)
Rear assembly U: See page 9.
(リア上Ass'y)
15
100 120 U,V models only
130
40 DIGITAL PRODUCTION CONSOLE
MADE IN JAPAN
RISK OF ELECTRIC SHOCK
DO NOT OPEN
11 70 AUDIO EQUIPMENT
30VT
40
10
60
Bottom assembly: See page 5.
(ボトムAss'y)
DM1000
210
14
50
Control panel assembly: See page 12.
(コンパネAss'y)
13
10 15
Bottom assembly: See page 5.
(ボトムAss'y) Rear assembly U: See page 9.
(リア上Ass'y)
30
Pic.2
200
3
DM1000
ACCESSORIES 付 属 品
VQ240200 Adapter, AC Cord KPR-24 変 換 ア ダ プ タ ー J 06
* X3650A00 CD-R CD-R 650MB 12cm 書 込 み 済 C D − R
VT119800 AC Cord J 7A 125V 3P 2.5m 電 源 コ ー ド J 06
V6190600 AC Cord CSA 電 源 コ ー ド U,V 07
V6190700 AC Cord VDE 電 源 コ ー ド H,W,K 08
V6190800 AC Cord BS 電 源 コ ー ド B 10
TOOL 工 具
* WA963600 Stay ス テ イ
4
BOTTOM ASSEMBLY(ボトム Ass’y)
10
200 15
290 285 350 145 140 150 140 145
210 10c 10d 10c 10d
230
200 10b x 8
10b x 8
18
20
280 160 10c 10d
B view 190
130 220 10a
40 B A view
290 120
170
262 285
265
260 260a 270
10
D view D
360
DM1000
5
DM1000
290
600
610
345
262 265
Side panel R
Pic.3
260 260a
Top view
370
10
Pic.2 520
Pic.1 200
190
510
210
6
DM1000
7
DM1000
8
REAR ASSEMBLY U(リア上 Ass’y)
240 180 176
B
260
160 190
200 175
x 16
210 230
x 18
150 170
220 x 18 HAAD 2/2
60
50 B view
260
70 174
A
50
HAAD 1/2
130
100
A view
120
10
120 110
20
30
DM1000
9
DM1000
90
Bottom view
10
20
Top view
100 70
170
10
50 250
HAAD 1/2
10
DM1000
11
DM1000
12
150 10
170
60 60a 60b
160
50
70
80 40
A
123 120
20
100
120
110
A view 15
120
170
See page 59 for the buttons of the PN1 and PN2 circuit boards.
(※PN1、PN2シートのボタンは、59ページを参照してください。)
330 340
310
320 350
300
10
A
250
216
30
215
200
PN1 (3/4)
230 200
270 218
260 210 PN1 (1/4)
240
200
PN1 (4/4)
280 220
220
DM1000
260
13
DM1000
470 500
520
520
Pic.2 Pic.3
420
440
Pic.1 525
Pic.4 Pic.5
250
100 465
440
Pic.5 525
420
450 415
Pic.3
Pic.2
400
10 200
230
Pic.1
14
DM1000
465
Pic.6
480 200
Pic.7
250
Bottom view
600 490
545
545 535
535
510 545
Pic.8
15
DM1000
16
DM1000
ELECTRICAL PARTS(電気部品)
17
DM1000
18
DM1000
19
DM1000
20
DM1000
21
DM1000
22
DM1000
23
DM1000
24
DM1000
25
DM1000
26
DM1000
27
DM1000
28
DM1000
29
DM1000
30
DM1000
31
DM1000
32
DM1000
33
DM1000
34
DM1000
35
DM1000
36
DM1000
37
DM1000
38
DM1000
39
DM1000
40
DM1000
41
DM1000
42
DM1000
43
DM1000
44
DM1000
45
DM1000
46
DM1000
47
DM1000
48
DM1000
49
DM1000
50
DM1000
51
DM1000
52
DM1000
53
DM1000
54
DM1000
55
DM1000
56
DM1000
57
DM1000
58
DM1000
59
DM1000
60
DM1000
61
DM1000
62
DM1000
63
DM1000
64
DM1000
65
DM1000
66
DM1000
67
DM1000
68
DM1000
V 5 6 0 5 2 0 0 LCD LM320191 液 晶 デ ィ ス プ レ イ 23
V 5 0 6 5 2 0 0 AC Inlet 3P M1908-C A C イ ン レ ッ ト 3 P AC IN 03
69
PEAK METER BRIDGE
MB1000
PARTS LIST
CONTENTS(目次)
OVERALL ASSEMBLY(総組立).............................................. 2
FRONT PANEL ASSEMBLY(フロントパネルAss'y)............... 4
REAR PANEL ASSEMBLY(リアパネルAss'y)........................ 5
ELECTRICAL PARTS(電気部品)........................................ 6-12
WARNING
Components having special characteristics are marked and must be replaced with parts having
specification equal to those originally installed.
印の部品は、安全を維持するために重要な部品です。交換する場合は、安全のために必ず指定の部品をご
使用下さい。
OVERALL ASSEMBLY(総組立)
40
40
40
20
Rear panel assembly: See page 5.
(リアパネルAss'y)
30 40
J model Y model
10
Front panel assembly:
See page 4.
(フロントパネルAss'y)
50
20
Rear panel assembly:
See page 5.
(リアパネルAss'y)
2
MB1000
Accessories(付属品)
DM1000
40
MB1000
20
25
30
20
25
MB1000
45 Rack angle(ラック金具)
45
ACCESSORIES 付 属 品
20 VP156900 Bind Head Screw A4.0X12 MFZN2BL + バ イ ン ド 小 ネ ジ 4 01
25 VP156800 Bind Head Screw A4.0X8 MFZN2BL + バ イ ン ド 小 ネ ジ 8 01
* 30 WA174900 Meter Angle L LEFT メーターアングルL塗装上
* 40 WA175000 Meter Angle R RIGHT メーターアングルR塗装上
* 45 WA231100 Rack Angle ラック金具塗装上り 2
3
MB1000
30 40 50
A
30
A view 20 10
4
MB1000
20
30
50
10
70
20 50 10
30 60
40
5
MB1000
ELECTRICAL PARTS(電気部品)
6
MB1000
7
MB1000
8
MB1000
9
MB1000
10
MB1000
11
MB1000
12
WOODEN SIDE PANELS
SP1000
PARTS LIST
CONTENTS(目次)
OVERALL ASSEMBLY(同梱品セット)................................... 2
WARNING
Components having special characteristics are marked and must be replaced with parts having
specification equal to those originally installed.
印の部品は、安全を維持するために重要な部品です。交換する場合は、安全のために必ず指定の部品をご
使用下さい。
OVERALL ASSEMBLY(同梱品セット)
DM1000
MB1000
Side pad
(サイドパッド)
MB side pad
(MBサイドパッド)
Bind head screw(+バインド小ネジ)
VA314000
2
DIGITAL PRODUCTION CONSOLE
CIRCUIT DIAGRAM
CONTENTS(目次)
BLOCK DIAGRAM(ブロックダイアグラム)(002~007) .......... 3
OVERALL CONNECTOR CIRCUIT DIAGRAM
(総コネクタ接続回路図)......................................................... 9
OVERALL CIRCUIT DIAGRAM(総回路図)
AC .................................................................................. 10
DCA ................................................................................ 11
DCD ................................................................................ 12
FD (002~010) ................................................................. 13
ADA (002, 003) .............................................................. 22
HAAD (002~004) ........................................................... 24
JK1 (002~005) ............................................................... 27
JK2 ................................................................................. 31
OPT ................................................................................ 32
MAIN (002~013) ............................................................ 33
LCD ................................................................................ 45
PN1 (002~006) ............................................................... 46
PN2 ................................................................................ 51
XLR ................................................................................ 52
Note: See parts list for details of circuit board component parts.
注:シートの部品詳細はパーツリストをご参照下さい。
H G F E D C B A
DM1000
BLOCK DIAGRAM 002 (DM1000)
1
MAIN IC010(48P) IC004-IC005(54P) IC006-IC009(44P)
IC011(9P)
Crystal Crystal Flash SDRAM SRAM Backup
oscillator oscillator 32M 64M x2 8M x4 controller
DFS 49.152MHz 45.1584MHz
X131 X132 LCD
CN801-CN804(40P) BT001
Module
CPU_BUS CPU_BUS
CN501
(16P) CN502(12P), CN504(4P)
PLLP2 Crystal
SH-3 CPU IC001 LCD Reset LCD
Address
Decoder
1/2 1/2 Selector D S
IC136 11MHz
X001 (SH7709H)
(208P) DSP Reset
2Tr Reset
Controller
(S1D13704F)
LCD
& 1/2 44.1K x256 i e CPU:132MHz DIR Reset IC027 (See Page 5)
Register 1/2 l Master clock BUS:44MHz ADA Reset (80P)
48K x256 v WC OUT
System Internal I/O:22MHz
e Reset TC Reset
CN005
External 88.2K x256 i SLOT1 clock RESET USB Reset
3 c SLOT2 clock (16P)
System Reset / WC
Selector
96K x256 d
e
t SL clock IC012(5P) SCI0 SCI1 SCI2 SUB Reset
LCD Reset 2
Master clock WC x256 o IC013(5P)
SL clock 2TR(256fs) r r System
Reset
FD
System Reset
SCI0 SCI2 CN203
CN003 (7P) CPU
PLL PLL TO OPT TO JK1 (MIDI) (7P)
96K/88.2K 48K/44.1K 5 (SLOT1) IC203
OPT TX,RX SCI0(CPU) 2/ TLC2932 DIR2 / SUB Reset (112P)
CN801-CN804(40P) WC SLOT1 IC143(14P) IC144(44P)
Master clock (See Page 5)
SLOT1 clock
2or4ch/line 2or4ch/line 4ch/line
4 4 4 DIR Reset
SLOT1
/ Selector / IC501(144P) /
Serial I/F CN701 CN701 JK2 CN702
ATSC2A (14P) (14P)
/ Selector / / CPU_BUS SIO4 METER
4 4 4 IC651 ch1
2or4ch/line 2or4ch/line 4ch/line (D-sub 15pin)
System Reset (48P)
ch0
SLOT2 clock
2or4ch/line 2or4ch/line 4ch/line
4 4 4 Crystal
SLOT2
/ Selector / IC502(144P) / oscillator 3
60MHz
/ Selector / ATSC2A / X401 JK1 S
e
CN201
4 4 4 CN651(9P),
2or4ch/line 2or4ch/line 4ch/line CN652(40P) l REMOTE
e (SONY 9pin
WC SLOT2 c
t /RS-422)
System o
Reset CN651(9P), r
2Tr Reset
2TR RMCK1 CN652(40P)
SLOT2 IN
SLOT1 IN
SLOT2 OUT
SLOT1 OUT
DSP block CN101
JK1
JK1 DIR
CS8420 2ch/line DSP7 x6 CPU_BUS CPU
M37641
TO HOST
JK001 2TR DIN1 USB
2TR IN IC601(28P) DSP6 x4 USB Reset IC102(80P)
DIGITAL SDRAM 16M x6
(AES/EBU) DIR JK251
CS8420 2ch/line 2TR DIN2 DRAM 4M x8
2TR IN JK002 Timecode
DIGITAL IC602(28P) CPU_BUS CPU_BUS Generator SMPTE IN
(COAXIAL) 2TR RMCK2 (See Page 4) TC Reset
ICS2008B
JK003 IC254(39P)
2TR OUT
DIGITAL DIT CN301
OMNI IN 1-4
IC605(28P) 2TR DOUT1
2TR OUT JK002 2ch/line CPU_BUS CONTROL
AIN 1-16
DIGITAL Register
PHONE
DIT 2TR DOUT2
(COAXIAL) CS8405 System Reset (D-sub 25pin)
IC606(28P)
TB
JK51
WC BNC Master clock
IN CN901(27P)
75Ω
MIDI JK151
CN902
(32P) HAAD
2ch/line
OUT SCI2(CPU) 8 SDATA 1-16 5
/
CN651(9P), CN651(9P), 2ch/line SDATA-TB
CN652(40P) CN652(40P)
2ch/line HP-L/R
CN951(32P)
DM1000
BLOCK DIAGRAM 003 (DM1000)
1
SLOT1IN 1-4
SLOT1IN 5-8
SLOT2IN 1-4
SLOT2IN 5-8
INS SEND 1-4
SO58
INS SEND 5-8
SO59
OAUX1-4 IC201(208P) INS SEND 9-12
SI41 SO60
OAUX5-8 DSP7 SO61 DIRECT OUT 1-4
SI42
DIRECT OUT 5-8
SO62
OBUS1-4 SI44 SO63 DIRECT OUT 9-12
OBUS1-4
OBUS5-8
OAUX1-4
OAUX5-8
OBUS5-8 SI45
SO52
SO53
SO55
SO56
SO57
16M SDRAM
OSM
IC207(50P)
SI46
SI47
SI49
SI50
SI51
INS SEND 13-16
SO58
INS SEND 17-20
SO59 INS SEND 1-4
SI4
SI5
SI6
SI7
SI8
OAUX1-4 INS SEND 21-24
SI0
SI1
SI2
SI3
SI41 SO60 SI26
OAUX5-8 IC202(208P) DIRECT OUT 13-16 INS SEND 5-8
SI42 SO61 SI27 SO48 SLOT1OUT 1-4
DSP7 DIRECT OUT 17-20 INS SEND 9-12 SI28 SO49 SLOT1OUT 5-8
SO62 INS SEND 13-16
OBUS1-4 DIRECT OUT 21-24 SI29 SO50 SLOT1OUT 9-12
2 OBUS5-8
SI44 SO63 INS SEND 17-20
SI30 SO51 SLOT1OUT 13-16
SO52
SO53
SO55
SO56
SO57
SI45 INS SEND 21-24
16M SDRAM SI31 SO52 SLOT2OUT 1-4
INS SEND 25-28 SLOT2OUT 5-8
SI32 SO53
INS SEND 29-32
IC208(50P) INS SEND 33-36
SI33 SO54 SLOT2OUT 9-12
SI34 IC206(208P) SO55 SLOT2OUT 13-16
INS SEND 37-40
SI35
INS SEND 41-44 DSP7
SI46
SI47
SI49
SI50
SI51
SO58 INS SEND 25-28 SI36
INS SEND 29-32 INS SEND 45-48 SO60 2TrDO1
SO59 SI37
OAUX1-4 INS SEND 33-36 DIRECT OUT 1-4 SO61 2TrDO2
SI41 SO60 SI14
OAUX5-8 IC203(208P) DIRECT OUT 25-28 DIRECT OUT 5-8 SO62 PHONE OUT
SI42 SO61 SI15
DSP7 DIRECT OUT 29-32 DIRECT OUT 9-12
SO62 SI16
SI24
OBUS1-4 DIRECT OUT 33-36 DIRECT OUT 13-16 SI17
SI25
SI44 SO63
OBUS5-8 DIRECT OUT 17-20
SI26
MONITOR SO56 TOMNI1-4
SO52
SO53
SO55
SO56
SO57
SI45 DIRECT OUT 21-24 SI18 TOMNI5-8
16M SDRAM SI27
SI19 DIRECT OUT SO57
DIRECT OUT 25-28 SI28 SO58 TOMNI 9-12
IC209(50P) DIRECT OUT 29-32 SI20
SI29
SI21
DIRECT OUT 33-36
SI30
SI22
DIRECT OUT 37-40
SI31
SI23
DIRECT OUT 41-44
SI46
SI47
SI49
SI50
SI51
SO58 INS SEND 37-40 SI32
SI24
INS SEND 41-44 DIRECT OUT 45-48 SI33
SO59 SI25
OAUX1-4 SO60 INS SEND 45-48 SI34
SO44
SO45
SO46
SO47
SI41
SI39
SI40
SI41
SI42
SI43
SI10
SI11
SI12
SI13
SI38
OAUX5-8 IC204(208P) DIRECT OUT 37-40 16M
SI9
SI42 SO61
DSP7 SO62 DIRECT OUT 41-44 SDRAM
OBUS1-4 SO63 DIRECT OUT 45-48
OBUS5-8
SI44 IC212(50P)
COSM /COSL
FX2/3 SEND1/2
SO52
SO53
SO55
SO56
SO57
SI45
16M SDRAM
FX1 SEND1-4
FX1 SEND5-8
FX4 SEND1/2
COAUX1-4
COBUS1-4
COBUS5-8
COAUX5-8
INS SEND SM
IC210(50P)
SEL2TR / TB
3
CX4SM/CX4SL
CX4BUS1-4
CX4BUS5-8
CX4AUX1-4
CX4AUX5-8
INPUT
IC201-205
SI26
SI27
SI28
SI24
SI25
INS SEND AUX1-4
SO59
INS SEND AUX5-8
SO60
INS SEND BUS1-4
OAUX1-4 SO61
SO54 INS SEND BUS5-8
OAUX5-8 SO62
SO55 INS SEND SM
OBUS1-4 SO63
SO56
OBUS5-8 SEL2TR / TB
SO57 SO53
OSM
SO58
COAUX1-4
SO48
COAUX5-8
SO49 IC205(208P)
AD IN 1-2 SI0 DSP7 TOMNI1-4
SI32
AD IN 3-4 SI1 COBUS1-4 TOMNI 5-8
SO50 SI33
AD IN 5-6 SI2 COBUS5-8 TOMNI9-12
SO51 SI34
AD IN 7-8 SI3 COSM/COSL
SO52
AD IN 9-10 SI4
AD IN 11-12 SI5
AD IN 13-14 SI6 BUS,ST,AUX,OSC,TB
AD IN 15-16 SI7
AD IN 17-18 SI8
AD IN 19-20 SI9
TBAD SI44
16M SDRAM
4
SO36
SO37
SO38
SO39
SO40
SO41
IC211(50P)
OMNI11-12
DSP block
DM1000
BLOCK DIAGRAM 004 (DM1000)
1
PN1 PN2
Encoders
(Q, Freq., Gain,
Parameter Wheel) LCD Contrast
TA107, TA109, TA101, TA102, Volume 2
IC101(16P)
TA108, TA110 TA103, TA104,
TA105, TA106
D Type LCD LCD
LED Driver Flip Flop Sink Driver CN402(3P) CN503(3P) CN502(12P), Module
CN504(4P)
DC-DC
Converte Bias
CN101-CN103(26P),
CN104(30P) r
CN401(26P),CN403(26P)
FD CN404(26P),CN402(30P) Inverter Backlight
SCAN[0]~[2], /SCAN_EN
Logic
IC205(16P) IC302,IC303(64P) IC402(20P),IC403(20P),
IC406(20P),IC407(20P) IC404(20P),IC405(20P),
IC408(20P)
Multiplexer Counter G/A D Type
(4:1) x 1 (REC2) Flip Flop Buffer Data
TSEL[0]~[4]
IC027(80P)
LCD Controller
IC603(16P),IC604(16P), IC502(16P),IC506(16P) IC110(16P),IC114(16P),
IC609(16P) IC120(16P)
CN003(7P)
CPU
SCI1
RESET SUB Reset
CN203(7P)
IC503(20P),IC504(20P), Filters
IC505(20P)
Servo Driver
D Type Circuits
Flip Flop CH1-16 & ST (See Page 3)
Sine Wave
Oscillator
RESET CH1-16 & ST CH1-16 ST CH1-16 & ST
1
6
A
28CA1-8826678-5
/RESET
LRCK
MCLK
SCLK
PHANTOM AINR
CN901(27P) CN953(27P)
M0
-1
+48V DFS
64Fs
B
JK201 SW201 Fs
ADA Reset
INPUT 2 IC201 MCLK
PHANTOM
+48V
SW301
JK301
INPUT 3
IC301 IC302
PHANTOM
+48V IC303 SDATA-3/4
(DFS.64Fs.Fs.RESET.MCLK)
(24P)
SW401
JK401 IC401 IC402
INPUT 4
CN101(17P)
CN102(17P)
PHANTOM (See Page 3) CN152(16P) CN151(16P)
+48V
IC155
IC151(28P)
C
SW501 IC153 JK151
JK501 MUTE
OMNI OUT 1/2 SDATA AOUTL LPF
INPUT 5 MUTE
DF . D/A OMNI OUT 1
IC501 IC502
AK4393 IC156
PHANTOM IC154 JK251
+48V IC503 SDATA-5/6
MUTE
(24P) AOUTR LPF
MCLK
LRCK
BICK
DFS
/PD
MUTE OMNI OUT 2
SW601
JK601
/RESET
MCLK
IC601 IC602
64Fs
DFS
Fs
INPUT 6
PHANTOM
+48V
IC251(28P) IC255
SW701 IC253
JK701 JK351
MUTE
INPUT 7 OMNI OUT 3/4 SDATA AOUTL LPF
MUTE
IC701 IC702 DF . D/A OMNI OUT 3
PHANTOM AK4393 IC256
+48V IC254 JK451
IC703 SDATA-7/8
MUTE
(24P) AOUTR LPF
MCLK
LRCK
BICK
DFS
/PD
SW801 MUTE
JK801 IC801 IC802
MCLK
/RESET
OMNI OUT 4
D
64Fs
DFS
Fs
INPUT 8
CN501(17P)
PHANTOM CN502(17P)
+48V CN352(16P) CN551(16P)
SW901 IC355
JK901 IC351(28P) IC353 JK551
INPUT 9 MUTE
OMNI OUT 5/6 SDATA AOUTL LPF
IC902 MUTE
IC901 DF . D/A OMNI OUT 5
PHANTOM AK4393
IC354 IC356
+48V JK651
IC903 SDATA-9/10
(24P) MUTE
AOUTR LPF
MCLK
LRCK
SWA01
BICK
DFS
/PD
MUTE
JKA01 ICA01 ICA02 OMNI OUT 6
MCLK
/RESET
64Fs
DFS
Fs
INPUT 10
PHANTOM
+48V
SWB01 IC455
JKB01 IC451(28P) IC453
JK751
MUTE
E
INPUT 11
OMNI OUT 7/8 SDATA AOUTL LPF
MUTE
MCLK.64Fs.Fs.RESET. DFS
LRCK
BICK
SWC01
DFS
/PD
JKC01 MUTE
ICC01 ICC02 OMNI OUT 8
MCLK
/RESET
64Fs
DFS
Fs
INPUT 12
BICK
+48V
DFS
MUTE
ICD03 SDATA-13/14 OMNI OUT 10
/RESET
MCLK
64Fs
DFS
(24P)
Fs
SWE01
JKE01
ICE01 ICE02
INPUT14
IC651(28P)
F
IC653 IC655
JKB51
PHANTOM OMNI OUT 11/12 SDATA MUTE
+48V AOUTL LPF
DF . D/A MUTE OMNI OUT 11
JKF01 SWF01 AK4393 IC656
Hard: Analog block (Analog I/O, AD/DA)
IC654 JKC51
INPUT15 MUTE
ICF01 ICF02 AOUTR LPF
MCLK
LRCK
BICK
DFS
+48V
64Fs
DFS
Fs
INPUT16 IC751
IC754(24P) JKD51
CND01(17P) IC752
CND02(17P) OMNI IN 1
AINL
IC003(24P) A/D -1
TALKBACK CS5361-KS IC751
CN001 IC001 A/D SD OUT JKE51
LEVEL IC001 IC002 OMNI IN 1/2 IC753
(2P) CS5361-KS
OMNI IN 2
TALKBACK AINR
AINL SD OUT SDATA-TB
/RESET /RESET
-1
LRCK
MIC IN
MCLK MCLK
64Fs SCLK
M0
/RESET
LRCK
MCLK
SCLK
AINR
DFS
Fs
M0
G
64Fs
MCLK
/RESET
DFS
HAAD 2/2
Fs
IC851
IC854(24P) JKF51
CN002(4P) CN003(4P) IC004 IC852
IC005 IC007(28P) OMNI IN 3
AINL
/RESET /RESET
MCLK
BICK
LRCK
MCLK MCLK
DFS
SCLK
MUTE LPF
/PD
AOUTR
-1
M0
CN752(16P) CN511(16P)
MCLK
/RESET
64Fs
64Fs
DFS
DFS
Fs
Fs
DM1000
H
H G F E D C B A
DM1000
BLOCK DIAGRAM 006 (DM1000)
(Gain Reduction) METER METER (Out Meter)
1
COMP
STEREO R
STEREO L
INPUT PATCH
SOLO R
SOLO L
AUX 1
AUX 8
BUS1
BUS2
BUS3
BUS4
BUS5
BUS6
BUS7
BUS8
PEAK
OFF SIGNAL METER
INPUT 1(
...48) INSERT INSERT INSERT
[INPUT] x 16 ON
+48V METER
ON LEVEL BAL
(1-16) (Gain Reduction) METER SOLO 4BAND OUTPUT
PAD AD AD 1-16 ATT DELAY STEREO L
METER (Out Meter) EQ
METER
0 METER
20 GAIN
INSERT INSERT
-60 ~ -16 TO TALKBACK ON LEVEL
SELECT PAN
x4 GATE ATT
4BAND
EQ
INPUT
DELAY
Same as the stereo master L STEREO R
[OMNI IN]
(1-4) AD OMNI 1-4 PAN
Keyin
12ch Group(1-12,13-24....) (Gain Reduction) METER METER (Out Meter)
AUX 1-8 (Gain Reduction) (Out Meter)
TO TALKBACK LFE
SELECT METER METER COMP
SLOT1
16
SLOT1 1-16
2
[SLOT] PRE/POST ON AUX
16 METER
(1-2) SLOT2 SLOT2 1-16 COMP INSERT INSERT INSERT
METER
16 TO SURROUND
ON LEVEL
MONITOR Keyin 4BAND OUTPUT
Self or Stereo Link ATT EQ DELAY BUS 1(...8)
DIRECT OUT 1(...48)
ON LEVEL
PAN BUS to STEREO
METER EFFECT
FX1 SEND 1-8 TO INPUT PATCH
OSCILLATOR BUS 1(...8)
Surr1 Return 1-8 SINE100Hz
SINE1kHz same as the above AUX1(...8)
8 SINE10kHz
LEVEL ON
AUX1-8 FX1 Return 1-2 TO INPUT PATCH
SELECT
FX1-4 400Hz/1kHz
PINK NOISE to OUT PATCH for AUX1(...8)
66 BURST NOISE
INSERT Surr1 FX2 Return 1-2 cascade
OUT FX2 SEND 1-2
FX3Return 1-2
16 FX3 SEND 1-2 BUS1 BUS
FX4 Return 1-2
FX4 SEND 1-2 TRIM ON
CASCADE SELECT BUS8 BUS
STEREO L BUS 3
STEREO R BUS
SOLO L BUS
SOLO R BUS
AUX1 BUS
AUX8 BUS
2
[2TR IN DIGITAL1] SRC 2TRD1 L/R
AES/EBU
2
[2TR IN DIGITAL2] SRC 2TRD2 L/R
COAXIAL
TO MONITOR SELECT
SOLO TRIM
TALKBACK
SOLO L
[TALKBACK] AD
SOLO R
8
AD 1-16 METER
AUX1-8 AUX1-8 OMNI 1-4
USE AD IN (1-16)orOMNI IN(1-4) DA
PHONES
LEVEL
4
SOLO LOGIC
AS TALKBACK DA [PHONES]
8 OUTPUT SOLO
BUS1-8 BUS1-8 OMNI 1
OMNI 2 BUS1-8 8
MONO
DIMM
SURROUND MONITOR 8
OMNI 3 8
OMNI 4 AUX1-8 CONTROL ROOM
MONITOR MATRIX OUT 7
OMNI 5 OUTPUT
SOLO OUT 2 OMNI 6 MONITOR SELECT MONITOR
PORT 2
OMNI 7 LEVEL
TALKBACK DIMM
ATTNUATOR STEREO
OMNI 8 2TR D1 FLIP
2 2
OUTPUT PATCH
STEREO DA
1
OMNI 9 OMNI IN1/2
8 OMNI 10 2TR D2 FLIP
2
BUS1-8 CR to SURROUND MONITOR
OMNI 11 [OMNI OUT] OMNI IN3/4
AUX1-8 8 OMNI 12
(1-12) 8x8Patch SLOT PINK MONITOR
8 8 NOISE
DIRECT OUT 1-48 48 DA
12 SLOT1 1-8
8 8
LEVEL SURROUND
MONITOR
SLOT2 1-8 500-2kHz
INSERT OUT 66 BPF
2 SLOT1 16 1kHz,50Hz
CONTROL ROOM DITHER SLOT1 [SLOT] BUS
SLOT2 16
for cascade DITHER SLOT2 (1-2) BUS1-8 8
DIMM
MONITOR BASS MONITOR
8
STEREO BUS 2
8
STEREO 2 MATRIX MANAGEMENT ALLIGNMENT
TO OUTPUT PATCH 5
BUS1-8 BUS 2TR D1 2
AUX1-8 BUS 8 DITHER [2TR OUT DIGITAL1]
SOLO BUS 2 AES/EBU
2TR D2 2 DITHER [2TR OUT DIGITAL2]
COAXIAL
DM1000
BLOCK DIAGRAM 007 (DM1000)
1
Analog Digital Digital Analog
Analog Digital INPUT BUS MASTER MASTER OUTPUT Analog
PAD GAIN INSERT AD PATCH PHASE GATE INSERT ATT. EQ INSERT COMP DELAY ON LEVEL INSERT PAN Adder INSERT ATT. EQ INSERT COMP ON LEVEL INSERT BAL DELAY PATCH DA
[0dBu = 0.775Vrms]
[0dBFS = Full Scale]
Level Diagram
6 28CA1-8826678-7 BLOCK DIAGRAM 007 (DM1000)
8
H G F E D C B A
DM1000
OVERALL CONNECTOR CIRCUIT DIAGRAM (DM1000)
1
4P
CN504
LCD Module
16P
16P
CN752 CND51
JK2
12P
CN502
12P
12P
CN301 CN106
16P
16P
CN653 CN552 CN951
CN501 CN701 CN652 CN651
3P
CN503 3P
16P 14P 40P 9P
2
16P
16P
CN352 CN551
16P
16P
CN152 CN151
27P
27P
CN901 CN953
CN005 CN701 CN652 CN651
(METER)
16P
16P
3P
CN401 CN107
CN402
OPT HAAD CN954
12P
2/2 CN002
40P
40P
CN804 CN804 4P
FD
PN1 (4/4)
HAAD
30P
30P
40P
40P
(PARAMETER WHEEL) CN104 CN402 CN803 CN803
4P
1/2 3
17P
17P
CN003 CND02 CND01
3P
3P
CN111 CN110
26P
26P
40P
40P
CN103 CN401 CN802 CN802
17P
17P
CN902 CN901
PN1 (3/4)
26P
26P
40P
40P
7P
7P
CN102 CN404 CN203 CN003 CN801 CN801
(JOYSTICK)
17P
17P
CN502 CN501
CN807
4P
4P
11P
26P
26P
17P
17P
CN102 CN101
32P
32P
CN105 CN201 CN202 CN006 CN902 CN951 CN952
4P 8P 3P 3P 3P
4P
2P
CN102 CN101
(ACインレットAss'y)
Note) When the mark in the diagram indicates pin 1 of the connector, connectors are connected pin 1 to pin n,
pin 2 to pin (n-1),…, pin (n-1) to pin 2, and pin n to pin 1 where "n" represents the last pin number of the connector.
Connectors without the mark are connected pin 1 to pin 1,…, and pin n to pin n.
図中の▲印はコネクタの1ピンを表し、1ピンとnピン、2ピンと(n-1)
ピン、
・・・、
(n-1)
ピンと2ピン、nピンと1ピンが接続されます。
▲印のないコネクタ同士は、1ピンと1ピン、
・・・、nピンとnピンが接続されます。なお、nはコネクタのピン数を表します。
POWER ON/OFF
to Power transformer
to AC Inlet Assembly
(ACインレットAss'y)
3
Destination F101
J, U, V KB000780 T5AL 250V
H, B, W, K KB000690 T2.5AL 250V
Capacitor
TO SERVICE PERSONNEL
Critical Components Information
Components having special characteristics are marked and must be replaced with parts having
specifications equal to those originally installed.
to OPT-CN807 2
32
1
1: INPUT 1: OUTPUT
1
2 2: COMMON 2: INPUT
3 3: OUTPUT 3: COMMON
32 DCA 2/5 4
1 REGULATOR +15V
1: INPUT 1: OUTPUT
1
2 2: GND 2: INPUT
3 3: OUTPUT CN401(3P)
3: COMMON
IC301(3P)
T4AL 250V
IC302(3P)
5
CN402(3P)
T4AL 250V
REGULATOR -15V
to TRANSFORMER DCA 3/5 6
to HAAD 1/2-CN952
IC303(3P)
CN403(3P)
7
REGULATOR -15V
DCA 4/5
to ADA-CN954
8
REGULATOR +5V
T3.15AL 250V
T3.15AL 250V
9
REGULATOR -5V
to FD-CN202
10
to FD-CN201
2
DC-DC CONVERTER
to MAIN-CN006
4 to Power Transformer
DC-DC CONVERTER
to PN1 (1/4)-CN105
6
TO SERVICE PERSONNEL
Critical Components Information
Components having special characteristics are marked and must be replaced with parts having
specifications equal to those originally installed.
MULTIPLEXER
2
to DCD-CN202
CPU
REGULATOR +5V
SH7042 6
to DCA 1/5-CN306
NJM78M05DL1A(TE1)(XS534A00)
REGULATOR +5V
1
2
3
1: INPUT
2: GND
3: OUTPUT 9
10
to MAIN-CN003
BUFFER
11
1
FD CIRCUIT DIAGRAM 003 (DM1000) DM1000
4 GATE ARRAY
GATE ARRAY
10
4
D-FF D-FF
5
DECODER
to PN1 (1/4)-CN102
D-FF to PN1 (1/4)-CN104 D-FF
6
TRANSCEIVER
TRANSCEIVER 10
11
TRANSCEIVER Panel (LED sink/source driver) Interface Circuit
(パネル(LED sink/source driver)インターフェース回路)
MULTIPLEXER MULTIPLEXER
6 D-FF
D-FF
D-FF
9
DECODER
10
1
FD CIRCUIT DIAGRAM 006 (DM1000) DM1000
MULTIPLEXER OP AMP
D-FF 2
OP AMP
OP AMP
3
OP AMP
OP AMP
4
MULTIPLEXER OP AMP
5
OP AMP
OP AMP
7
OP AMP
8
MULTIPLEXER
10
Motor Drive Position Instruction Circuit
(モータ駆動位置指令回路)
1
2
3 1
2
3 1: INPUT
1: OUTPUT 2: GND
2: COMMON 3: OUTPUT
3: INPUT 4: GND
1 fader 4 fader
OP AMP OP AMP
OP AMP OP AMP
5
2 fader 5 fader
6
OP AMP OP AMP
OP AMP OP AMP
8
3 fader 6 fader
9
OP AMP OP AMP
OP AMP OP AMP
10
7 fader 10 fader
OP AMP OP AMP
OP AMP OP AMP
5
8 fader 11 fader
6
OP AMP OP AMP
OP AMP OP AMP
8
9 fader 12 fader
OP AMP OP AMP 9
OP AMP OP AMP
µPC2912T-E1(X2091A00)
REGULATOR +12V
4 10
1
2
3 1: INPUT
2: GND 酸 金 2 W : Metal Oxide Film Resistor (酸化金属被膜抵抗)
3: OUTPUT ( マ ) : Mylar Capacitor (マイラーコンデンサー)
4: GND 11
Motor Fader Servo Control Circuit
(モータフェーダサーボコントロール回路)
13 fader 16 fader
OP AMP OP AMP
OP AMP OP AMP
5
STEREO
14 fader fader
6
OP AMP OP AMP
OP AMP OP AMP
8
15 fader
µPC2912T-E1(X2091A00)
REGULATOR +12V
9 OP AMP
4
OP AMP
1
2
3 1: INPUT
2: GND
10 3: OUTPUT
4: GND
OP AMP
5
NAND
7
OP AMP
OP AMP
8
OP AMP
OP AMP
9
10
2
OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT
1 2 3 4 5 6 7 8 9 10 11 12
10
DAC DAC DAC DAC DAC DAC
NJM78L05UA(XJ598A00)
11 REGULATOR +5V
REGULATOR +5V REGULATOR +5V REGULATOR +5V REGULATOR +5V REGULATOR +5V REGULATOR +5V
12 1
2
3
1: OUTPUT
2: COMMON
13 3: INPUT
OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT OMNI OUT
128FS
256FS
MCLK
14 Maximum
1
R151
2
R153
3
R251
4
R253
5
R351
6
R353
7
R451
8
R453
9
R551
10
R553
11
R651
12
R653
output level R152 R154 R252 R254 R352 R354 R452 R454 R552 R554 R652 R654
24dBu 1.5K
H: Normal Rate
H: Double Rate
DFS_ADA
20dBu 2.4K
15 18dBu 3.0K
15dBu 4.3K
INVERTER
16 to DCA 1/5-CN305
to MAIN-CN901
17
28CC1-8826692-2 2
( F ) : Metal Film Resistor (金属被膜抵抗) ADA CIRCUIT DIAGRAM 002 (DM1000)
( マ ) : Mylar Capacitor (マイラーコンデンサー)
22
X X : not installed (実装しない)
18
P O N M L K J I H G F E D C B A
OP AMP
OP AMP 3
ADC
OMNI IN 1
OMNI IN 2
OP AMP OP AMP 5
to XLR-CND51
OP AMP 8
OP AMP
ADC
OMNI IN 3
OMNI IN 4
10
OP AMP OP AMP
HAAD 1/2
INVERTER
2 128FS
256FS
MCLK
3
H: Normal Rate
TRANSCEIVER
H: Double Rate
DFS_AD
REGULATOR +5V
4
5
TRANSCEIVER
1
2
3
9
1: OUTPUT
2: COMMON
OP AMP OP AMP OP AMP OP AMP 3: INPUT
10
OP AMP OP AMP OP AMP OP AMP
11
OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP
12
13
GAIN 1
GAIN 2
GAIN 3
GAIN 4
GAIN 5
GAIN 6
GAIN 7
GAIN 8
14
PAD 20dB 1 PAD 20dB 2 PAD 20dB 3 PAD 20dB 4 PAD 20dB 5 PAD 20dB 6 PAD 20dB 7 PAD 20dB 8
15
2
HAAD CIRCUIT DIAGRAM 003 (DM1000) DM1000
3
HAAD 1/2
4
9
OP AMP OP AMP OP AMP OP AMP
11
OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP OP AMP
12
GAIN 10
GAIN 11
GAIN 12
GAIN 13
GAIN 14
GAIN 15
GAIN 16
13
GAIN 9
14
PAD 20dB 9 PAD 20dB 10 PAD 20dB 11 PAD 20dB 12 PAD 20dB 13 PAD 20dB 14 PAD 20dB 15 PAD 20dB 16
15
16
18
28CC1-8826691-3 1 HAAD CIRCUIT DIAGRAM 003 (DM1000)
25
19
Q P O N M L K J I H G F E D C B A
TALKBACK MIC IN
2
OP AMP
OP AMP
MIC & SAN (VU066300)
ADC
3
TALKBACK LEVEL
NJM78L05UA(XJ598A00)
5 REGULATOR +5V
1
HAAD 1/2
2
3
6
1: OUTPUT
2: COMMON
3: INPUT
7
HAAD 2/2
PHONES
DAC
8
PHONES LEVEL OP AMP
OP AMP
OP AMP
10
REGULETOR +5V
11
( F ) : Metal Film Resistor (金属被膜抵抗)
28CC1-8826691-4 1 ( マ ) : Mylar Capacitor (マイラーコンデンサー) HAAD CIRCUIT DIAGRAM 004 (DM1000)
26 X X : not installed (実装しない)
12
M L K J I H G F E D C B
LINE RECEIVER
2
2TR IN DIGITAL 1 AES/EBU
4
2TR OUT DIGITAL 1 AES/EBU
LINE RECEIVER 5
WORD CLOCK IN
LINE DRIVER
7
8
2TR DIGITAL IN, OUT
WC IN, OUT
28CC1-8826682-2 JK1 CIRCUIT DIAGRAM 002 (DM1000)
27
9
L K J I H G F E D C B A
2 to HOST USB
CPU
INVERTER
5
Photo Coupler
MIDI
IN
7
OUT
INVERTER
8 TO HOST USB
MIDI IN, OUT
INVERTER
28CC1-8826682-3 JK1 CIRCUIT DIAGRAM 003 (DM1000)
28
R Q P O N M L K J I H G F E D C B
MULTIPLEXER
INVERTER
COMPARATOR
SMPTE IN 5
OR
OP AMP 6
T.C READER/GENERATOR
D-FF
8
CONTROL
9
OR 10
11
REMOTE
TRANSCEIVER TIME CODE IN
( フ ) : Flame Proof C. Resistor (不燃化カ−ボン抵抗)
CONTROL
28CC1-8826682-4 1 JK1 CIRCUIT DIAGRAM 004 (DM1000) 12
29
K J I H G F E D C B A
TRANSCEIVER
to MAIN-CN652
TRANSCEIVER
to DCA 1/5
-CN307
6
TRANSCEIVER
to MAIN-CN651
I/F Section
TRANSCEIVER
28CC1-8826682-5 JK1 CIRCUIT DIAGRAM 005 (DM1000)
8
30
H G F E D C B A
METER
to MAIN-CN701 4
LINE DRIVER
SLOT2-b SLOT2-b
to DCA 1/5-CN302
SLOT2
SLOT1
4
SLOT2-a SLOT1-a
6
to MAIN-CN803 to MAIN-CN801
LM2990SX-15 (X3949A00)
REGULATOR -15V
TAB IS
INPUT
7
REGULATOR -15V
1
2
3
1: GND
2: INPUT
3: OUTPUT
2
µPC2918T-E1(X2157A00)
CLOCK BUFFER REGULATOR +1.8V
REGULATOR +1.8V 3
4
SDRAM 64M SDRAM 64M
1
2
3 1: INPUT
4
2: GND
3: OUTPUT
4: GND
5
CPU
6
FLASH ROM 32M
OR 9
10
NOR
Detection voltage:
12
NOR
TRANSCEIVER Detection voltage: Detection voltage: SRAM 8M SRAM 8M
SYSTEM RESET
NOR
13
to FD-CN203
14
not used
OR (for check)
X X : not installed (実装しない)
SRAM 8M SRAM 8M
15
Lithium Battery
Battery VN103500 Battery
VN103600(Battery holder for VN103500)
Notice for back-up battery removal Push the battery
as shown in figure,then the battery will pop up.
(SH3-CPU) 16
Druk de batterij naar beneden zoals aangeven in de
28CC1-8826680-2 5 tekening de batterij springt dan naar voren. Battery holder
MAIN CIRCUIT DIAGRAM 002 (DM1000)
33
17
L K J I H G F E D C B A
2
TRANSCEIVER
DC-DC CONVERTER
5
6 AND
DC-DC CONVERTER
7
to DCD-CN203
(LCDC, POWER)
28CC1-8826680-3 MAIN CIRCUIT DIAGRAM 003 (DM1000)
34
R Q P O N M L K J I H G F E D C B A
5
TRANSCEIVER TRANSCEIVER
TRANSCEIVER
TRANSCEIVER
TRANSCEIVER
TRANSCEIVER
7
8
TRANSCEIVER TRANSCEIVER
TRANSCEIVER
10
11
TRANSCEIVER
(CPU I/F)
12
28CC1-8826680-4 MAIN CIRCUIT DIAGRAM 004 (DM1000)
35
Y X W V U T S R Q P O N M L K J I H G F E D C B A
2
TRANSCEIVER
TRANSCEIVER
INVERTER
3
4
TRANSCEIVER
TRANSCEIVER
5 INVERTER
NAND
6 PLL
9 DIR2
10
PLLP2
11
12
13
14
INVERTER
15
16
4
DSP7 DSP7
SDRAM 16M 10
11
12
DSP7 DSP7
13
SDRAM 16M
14
15
16
(DSP7)
( F ) : Metal Film Resistor (金属被膜抵抗)
28CC1-8826680-6 ( マ ) : Mylar Capacitor (マイラーコンデンサー) MAIN CIRCUIT DIAGRAM 006 (DM1000) 17
X X : not installed (実装しない) 37
X W V U T S R Q P O N M L K J I H G F E D C B A
8 DSP7 DSP7
10
11
12
13
( F ) : Metal Film Resistor (金属被膜抵抗)
( マ ) : Mylar Capacitor (マイラーコンデンサー)
X X : not installed (実装しない)
14
15
(DSP7)
16
28CC1-8826680-7 MAIN CIRCUIT DIAGRAM 007 (DM1000)
38
17
X W V U T S R Q P O N M L K J I H G F E D C B A
DRAM 4M 3
4
DSP6 DSP6
DRAM 4M 5
DRAM 4M 6
DRAM 4M DRAM 4M 8
10
DSP6 DSP6
11
12
DRAM 4M DRAM 4M
13
14
TRANSCEIVER
15
16
X X : not installed (実装しない)
(DSP6)
28CC1-8826680-8 MAIN CIRCUIT DIAGRAM 008 (DM1000)
39 17
Q P O N M L K J I H G F E D C B A
3
ATSC2A MULTIPLEXER
MULTIPLEXER
ATSC2A MULTIPLEXER
9
MULTIPLEXER
10
11
(ATSC2)
12
28CC1-8826680-9 MAIN CIRCUIT DIAGRAM 009 (DM1000)
40
L K J I H G F E D C B A
1
AND
BUFFER
INVERTER
3
SRC DIT 4
AND
5
6
SRC DIT
AND
7
to JK2-CN701
TRANSCEIVER
D-FF to JK1-CN651
6 to JK1-CN652
GATE ARRAY
BUFFER 2
TRANSCEIVER
to OPT
-CN801 to OPT
4
-CN803
TRANSCEIVER
to OPT
-CN802 to OPT-CN804 5
to ADA-CN953
3
to HAAD 1/2-CN951
TRANSCEIVER
7 BUFFER
BUFFER
to MAIN-CN005
to LCD Module
to PN1 (2/4)-CN402
(LCD Contrast Volume) 3
µPC2912T-E1(X2091A00)
REGULATOR +12V
1
2
3 1: INPUT
2: GND
3: OUTPUT
4: GND
DC-DC CONVERTER
4
to LCD Module
(back light) 5
2
to FD-CN403
DECODER
3
5 to FD-CN404
6
to PN2-CN301
to FD-CN401
8
to PN1 (2/4)-CN401
10
2
AUX1 AUX2 AUX3 AUX4 AUTIMIX DIO SETUP UTILITY HIGH HIGH-MID LOW-MID LOW DISPLAY DISPLAY DISPLAY CLEAR
<AUX SELECT> <AUX SELECT> <AUX SELECT> <AUX SELECT> <DISPLAY <DISPLAY <DISPLAY <DISPLAY <EQUALIZER> <EQUALIZER> <EQUALIZER> <EQUALIZER> <ROUTING> <EQUALIZER> <MONITOR> <MONITOR>
ACCESS> ACCESS> ACCESS> ACCESS>
AUX1 AUX2 AUX3 AUX4 PEAK 1 PEAK 2 PEAK 3 PEAK 4 HIGH HIGH-MID LOW-MID LOW SLOT
<AUX SELECT> <AUX SELECT> <AUX SELECT> <AUX SELECT> <EQUALIZER> <EQUALIZER> <EQUALIZER> <EQUALIZER> <MONITOR>
3
AUX5 AUX6 AUX7 AUX8 MIDI REMOTE METER VIEW 1 3 5 7 STEREO 2TR D1 2TR D2 STEREO
<AUX SELECT> <AUX SELECT> <AUX SELECT> <AUX SELECT> <DISPLAY <DISPLAY <DISPLAY <DISPLAY <ROUTING> <ROUTING> <ROUTING> <ROUTING> <ROUTING> <MONITOR> <MONITOR> <MONITOR>
ACCESS> ACCESS> ACCESS> ACCESS>
AUX5
<AUX SELECT>
AUX6
<AUX SELECT>
AUX7
<AUX SELECT>
AUX8
<AUX SELECT>
PEAK 5 PEAK 6 PEAK 7 PEAK 8 1
<ROUTING>
3
<ROUTING>
5
<ROUTING>
7
<ROUTING>
STEREO
<ROUTING>
2TR D1
<MONITOR>
2TR D2
<MONITOR>
STEREO
<MONITOR>
4
DISPLAY PAN AUX ASSIGN PAIR/GROUP Ø/INSERT/DELAY INPUT PATCH OUTPUT PATCH 2 4 6 8 DIRECT SLOT BUS
<ENCODER <ENCODER <ENCODER <ENCODER <DISPLAY <DISPLAY <DISPLAY <DISPLAY <ROUTING> <ROUTING> <ROUTING> <ROUTING> <ROUTING> <MONITOR> <MONITOR>
MODE> MODE> MODE> MODE> ACCESS> ACCESS> ACCESS> ACCESS>
5
PAN AUX ASSIGN SIGNAL 1 SIGNAL 2 SIGNAL 3 SIGNAL 4 2 4 6 8 DIRECT SLOT BUS
<ENCODER <ENCODER <ENCODER <ROUTING> <ROUTING> <ROUTING> <ROUTING> <ROUTING> <MONITOR> <MONITOR>
MODE> MODE> MODE>
DISPLAY FADER MODE PAN/ DYNAMICS EFFECT SCENE GRAB DIMMER TALKBACK ENTER
<AUX SELECT> SURROUND <DISPLAY <DISPLAY <DISPLAY F2 F3 F4 Cursor Right <MONITOR> <MONITOR>
Cursor Left F1 <DISPLAY ACCESS> ACCESS> ACCESS>
ACCESS>
6
FADER AUX SIGNAL 5 SIGNAL 6 SIGNAL 7 SIGNAL 8 GRAB DIMMER TALKBACK
<FADER MODE> <FADER MODE> <MONITOR> <MONITOR>
10
11
SW/LED Matrix
28CC1-8826687-3 PN1 CIRCUIT DIAGRAM 003 (DM1000)
47
12
P O N M L K J I H G F E D C B A
PN1 (1/4)
2
SCENE
MEMORY
Cursor Left Cursor Up Cursor Down Cursor Right
SEL STEREO
INC AUTO ON STEREO
5
AUTO ON STEREO
SEL STEREO
6
1-16 17-32 33-48
<LAYER> <LAYER> <LAYER>
10
12
P O N M L K J I H G F E D C B A
Q FREQUENCY GAIN
<EQUALIZER> <EQUALIZER> <EQUALIZER>
8
Parameter
wheel
PN1 (1/4)
9
PN1 (4/4)
10
Encoder 11
to PN1 (1/4)-CN107
LCD contrast
to LCD-CN503
Meter LED, LCD contrast volume
8
28CC1-8822687-6 PN1 CIRCUIT DIAGRAM 006 (DM1000)
50
H G F E D C B A
DISPLAY
<USER
DEFINED
KEYS>
1 2 3 4
<USER <USER <USER <USER
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
1 2 3 4
<USER <USER <USER <USER 3
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
to PN1 (1/4)-CN106
5 6 7 8
<USER <USER <USER <USER
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
4
5 6 7 8
<USER <USER <USER <USER
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
9 10 11 12
<USER <USER <USER <USER
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
9 10 11 12
<USER <USER <USER <USER
DEFINED DEFINED DEFINED DEFINED
KEYS> KEYS> KEYS> KEYS>
to ADA-CN752
OMNI OUT 1 OMNI OUT 2 OMNI OUT 3 OMNI OUT 4 OMNI OUT 5 OMNI OUT 6 OMNI OUT 7 OMNI OUT 8 OMNI OUT 9 OMNI OUT 10 OMNI OUT 11 OMNI OUT 12
2
9
to HAAD 1/2-CN102 to HAAD 1/2-CN502 to HAAD 1/2-CN902 to HAAD 1/2-CND02
10
11
+48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V +48V
ON/OFF 1 ON/OFF 2 +48V +48V
ON/OFF 4 ON/OFF 5 ON/OFF 6 ON/OFF 7 ON/OFF 8 ON/OFF 9 ON/OFF 10 ON/OFF 11 ON/OFF 12 ON/OFF 13 ON/OFF 14 ON/OFF 15 ON/OFF 16
ON/OFF 3
12
13
14
INPUT 1 INPUT 2 INPUT 3 INPUT 4 INPUT 5 INPUT 6 INPUT 7 INPUT 8 INPUT 9 INPUT 10 INPUT 11 INPUT 12 INPUT 13 INPUT 14 INPUT 15 INPUT 16
15
MB1000
CIRCUIT DIAGRAM
CONTENTS(目次)
BLOCK DIAGRAM(ブロックダイアグラム)........................... 3
OVERALL CONNECTOR CIRCUIT DIAGRAM
(総コネクタ接続回路図)......................................................... 4
OVERALL CIRCUIT DIAGRAM(総回路図)
MAIN (002, 003) .............................................................. 5
PN (002, 003) ................................................................... 7
Note: See parts list for details of circuit board component parts.
注:シートの部品詳細はパーツリストをご参照下さい。
H G F E D C B A
MB1000
BLOCK DIAGRAM (MB1000)
1
IC203-205,207-209(16P)
LED Driver
IC202,206(16P)
Source Driver
2
LED Matrix
Switch Matrix 3
PN CN201 (34P)
CN102 (34P)
IC102(5P) IC101(5P)
5V 3.3V
REGULATOR REGULATOR
5
IC103(16P) IC106(112P)
from DM1000 CN101 (14P)
CPU
Driver/
Receiver SH2
7042A
MAIN
MB1000
1 OVERALL CONNECTOR CIRCUIT DIAGRAM (MB1000)
34P 34P
PN CN201 MAIN CN102
14P
CN101
D-Sub Cable
from METER
(DM1000)
4
3
METER (DM1000)
LINE TRANSCEIVER
4
DC-DC CONVERTER
to PN-CN201
LM2596SX-3.3 (X3563A00)
DC-DC CONVERTER
Metal
Tab
GND
6
1
2
3
4 DC-DC CONVERTER
5
1: VIN
2: OUTPUT
3: GROUND
4: FEEDBACK
5: ON/OFF 7
LM2596SX-5.0 (X3564A00)
DC-DC CONVERTER
Metal
Tab
GND
1
2
8
3
4
5
1: OUTPUT
2: VIN
3: GROUND
4: FEEDBACK
5: ON/OFF
10
11
DC-DC, RS-422
28CC1-8826696-2 MAIN CIRCUIT DIAGRAM 002 (MB1000)
5
12
W V U T S R Q P O N M L K J I H G F E D C B A
3
DECODER
not installed
4
7
CPU
10
11
( セ ) : Ceramic Capacitor (セラミックコンデンサー)
X X : not installed (実装しない)
SYSTEM RESET
12
13
14
TRANSCEIVER
15 CPU
28CC1-8826696-3 2 MAIN CIRCUIT DIAGRAM 003 (MB1000)
6
16
X W V U T S R Q P O N M L K J I H G F E D C B A
3
SOURCE DRIVER
5
to MAIN-CN102
LED
DRIVER
6
TRANSCEIVER
7
LED
DRIVER 8
LED 10
DRIVER
11
BUS1 BUS2 BUS3 BUS4 BUS5 BUS6 BUS7 BUS8
12
13
14
15
4
SOURCE DRIVER
LED
DRIVER
7
LED
9 DRIVER
10
11 LED
DRIVER
12
CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16
13
14
15
17