VI Analyzer Tests

Table of Contents
1. Block Diagram......................................................................................................................................4
1.1. Performance................................................................................................................................4
1.1.1. Arrays and Strings in Loops..................................................................................................4
1.1.2. Coercion Dots......................................................................................................................4
1.1.3. Enabled Debugging..............................................................................................................4
1.1.4. In Place Element Structure Usage........................................................................................5
1.1.5. Inlinable Vis..........................................................................................................................5
1.1.6. Parallelizable Loops..............................................................................................................5
1.1.7. Prepend Scalar With Build Array..........................................................................................5
1.1.8. Redundant Boolean Operations...........................................................................................5
1.1.9. Value Property Usage..........................................................................................................5
1.1.10. Wait in While Loop...............................................................................................................5
1.1.11. Wired Terminals in Subdiagrams.........................................................................................5
1.2. Style.............................................................................................................................................5
1.2.1. Backwards Wires..................................................................................................................5
1.2.2. Code Simplification..............................................................................................................5
1.2.3. Control Terminal Label Visible.............................................................................................5
1.2.4. Control Terminal Wiring.......................................................................................................6
1.2.5. Mixed Terminal Styles..........................................................................................................6
1.2.6. Node Density.......................................................................................................................6
1.2.7. Sequence Structure Usage...................................................................................................6
1.2.8. String Constant Style............................................................................................................6
1.2.9. Tunnel Position....................................................................................................................6
1.2.10. Unused Code........................................................................................................................6
1.2.11. Wire Bends...........................................................................................................................6
1.2.12. Wire Crossings.....................................................................................................................6
1.2.13. Wires Under Objects............................................................................................................6
1.3. Warnings......................................................................................................................................6
 1.3.1. Adding Array Size Elements.................................................................................................6
1.3.2. Array Sum and Product Overflow........................................................................................7
1.3.3. Breakpoint Detection...........................................................................................................7
1.3.4. Bundling Duplicate Names...................................................................................................7
1.3.5. Error Cluster Wired..............................................................................................................7
1.3.6. For Loop Iteration Count......................................................................................................7
1.3.7. Globals and Locals................................................................................................................7
1.3.8. Hidden Objects in Structures...............................................................................................7
1.3.9. Hidden Tunnels....................................................................................................................7
1.3.10. Indexer Datatype.................................................................................................................7
1.3.11. Pattern Label........................................................................................................................7
1.3.12. Reentrant VI Issues..............................................................................................................8
1.3.13. Type Casting References......................................................................................................8
1.3.14. Typedef Cluster Constants...................................................................................................8
2. Complexity Metrics..............................................................................................................................8
2.1.1. Cyclomatic Complexity.........................................................................................................8
2.1.2. Depth of Nesting of Structures............................................................................................8
2.1.3. Fan In...................................................................................................................................8
2.1.4. Fan Out................................................................................................................................8
2.1.5. Modularity Index..................................................................................................................8
3. Documentation....................................................................................................................................9
3.1. Developer....................................................................................................................................9
3.1.1. Comment Usage..................................................................................................................9
3.1.2. Label Call Library Nodes.......................................................................................................9
3.1.3. Revision History...................................................................................................................9
3.2. User.............................................................................................................................................9
3.2.1. Spell Check...........................................................................................................................9
3.2.2. VI Documentation................................................................................................................9
4. Front Panel..........................................................................................................................................9
4.1. SubVI............................................................................................................................................9
4.1.1. Array Default Values............................................................................................................9
4.1.2. Cluster Sized to Fit...............................................................................................................9
 4.1.3. Control Alignment..............................................................................................................10
4.2. User Interface............................................................................................................................10
4.2.1. Clipped Text.......................................................................................................................10
4.2.2. Dialog Controls...................................................................................................................10
4.2.3. Duplicate Control Labels....................................................................................................10
4.2.4. Empty List Items.................................................................................................................10
4.2.5. Font Usage.........................................................................................................................10
4.2.6. Overlapping Controls.........................................................................................................10
4.2.7. Panel Size and Position......................................................................................................10
4.2.8. Scalar Chart Updates..........................................................................................................10
4.2.9. Synchronous Display..........................................................................................................10
4.2.10. Transparent Labels.............................................................................................................11
5. General..............................................................................................................................................11
5.1. File Properties............................................................................................................................11
5.1.1. SubVI and TypeDef Locations.............................................................................................11
5.1.2. VI Extension.......................................................................................................................11
5.1.3. VI Name.............................................................................................................................11
5.1.4. VI Saved Version................................................................................................................11
5.1.5. VI Size.................................................................................................................................11
5.2. Icon and Connector Pane...........................................................................................................11
5.2.1. Connected Pane Terminals................................................................................................11
5.2.2. Connector Pane Alignment................................................................................................11
5.2.3. Connector Pane Pattern.....................................................................................................11
5.2.4. Default Icon........................................................................................................................11
5.2.5. Error Style..........................................................................................................................11
5.2.6. Full Connector Pane...........................................................................................................12
5.2.7. Icon Size and Border..........................................................................................................12
5.2.8. Polymorphic Terminals......................................................................................................12
5.2.9. Terminal Connection Type.................................................................................................12
5.2.10. Terminal Positions..............................................................................................................12
5.3. VI Properties..............................................................................................................................12
5.3.1. Broken VI...........................................................................................................................12
 5.3.2. Built Application Compatibility..........................................................................................12
5.3.3. Driver Usage.......................................................................................................................12
5.3.4. Platform Portability............................................................................................................12
5.3.5. Removed Diagram..............................................................................................................12
5.3.6. Toolkit Usage.....................................................................................................................12
5.3.7. VI Lock State......................................................................................................................13
6. VI Metrics..........................................................................................................................................13
6.1.1. Connector Inputs and Outputs...........................................................................................13
6.1.2. Controls and Indicators......................................................................................................13
6.1.3. Diagram Count...................................................................................................................13
6.1.4. Diagram Size......................................................................................................................13
6.1.5. Node Count........................................................................................................................13
6.1.6. Property Reads and Writes................................................................................................13
6.1.7. Shared Library Calls............................................................................................................13
6.1.8. Structure Count.................................................................................................................13
6.1.9. Wire Sources......................................................................................................................13

1. Block Diagram
1.1.Performance
1.1.1. Arrays and Strings in Loops
Checks loops to see if they contain Build Array or Concatenate Strings functions. Avoid using these
functions in loops because each call to them requires a dynamic resizing of the array or string, which can
affect memory and processor time.  This test does not check Timed Loops.

1.1.2. Coercion Dots

Checks the total number of coercion dots on the block diagram and the number of coercion dots on
individual wires and compares them to user-specified limits.

1.1.3. Enabled Debugging

Checks whether debugging is enabled or disabled. Disabling debugging improves VI performance.
 1.1.4. In Place Element Structure Usage
This test detects the use of function pairs that can be replaced with the In Place Element Structure.  Use
the In Place Element Structure to avoid making unnecessary memory copies.

1.1.5. Inlinable Vis

This test detects inlinable VIs that are not configured for inlining. Some VIs may show improved
performance when inlined.

1.1.6. Parallelizable Loops

This test detects For Loops that can be safely parallelized. It also detects For Loops that have already
been parallelized but contain non-reentrant subVIs, which prohibit parallel execution.

1.1.7. Prepend Scalar With Build Array

This test checks if the Build Array Primitive is being used to prepend an array with a scalar.

1.1.8. Redundant Boolean Operations

This test checks for "And", "Or", "Not", "Not And", and "Not Or" functions with constants wired to one
or more of their inputs.  In this situation, the boolean function is not necessary and can be removed.

1.1.9. Value Property Usage

This test checks for the use of the Value property to update the values of front panel controls and
indicators.  In most cases, a local variable will update front panel object values much faster than the
Value property.

1.1.10. Wait in While Loop

Checks While Loops with front panel control terminals for structures or functions other than I/O
functions that regulate the speed of the While Loop.

1.1.11. Wired Terminals in Subdiagrams

Checks to see if any control or indicator that is wired on the connector pane does not reside within the
top-level diagram.  In order to avoid unnecessary memory copies, control and indicator terminals that
are wired on the connector pane should be placed on the top-level diagram.

1.2.Style
1.2.1. Backwards Wires
This test checks if wires do not flow from left to right.  It does not analyze wires on Simulation Diagrams,
or wires connected to Feedback Nodes.

1.2.2. Code Simplification

Detects the use of block diagram constructs that can be replaced with simpler code.

1.2.3. Control Terminal Label Visible

Checks if labels of block diagram control terminals are visible.  In order to easily identify control
terminals on the block diagram, their labels should always be visible.
 1.2.4. Control Terminal Wiring
Checks whether wires exit control terminals from the right side and enter indicator terminals on the left
side.

1.2.5. Mixed Terminal Styles

Detects whether block diagram terminals are displayed consistently. All terminals should be displayed as
either icons or data types.

1.2.6. Node Density

Checks that the node density in a diagram is within the user-specified limit.

1.2.7. Sequence Structure Usage

Checks whether the block diagram includes Stacked Sequence structures that contain more than the
user-specified maximum number of frames. The test does not check Flat Sequence structures.

1.2.8. String Constant Style

Checks the style of string constants on the block diagram. String constants containing no characters fail
the test. Replace them with an empty string constant. String constants set to Normal Display that
contain only white space—such as spaces, tabs, or line feeds—fail the test. Set the constants to '\' Codes
Display to improve block diagram readability.

1.2.9. Tunnel Position

This test checks whether all input tunnels are on the left side and all output tunnels are on the right side
of a structure.  Note that this test ignores Flat Sequence Structures.

1.2.10. Unused Code

Checks for unnecessary code on the block diagram.

1.2.11. Wire Bends

Compares the total number of bends on a wire to a user-specified maximum and compares the length of
each wire segment to a user-specified minimum.

1.2.12. Wire Crossings

Checks that the number of Wire crossings is less than the user-specified limit.

1.2.13. Wires Under Objects

Checks for wires that run under objects or other wires.

1.3.Warnings
1.3.1. Adding Array Size Elements
This test ensures that an "Add Array Elements" function is not used on the output of the "Array Size"
function to determine the size of a multi-dimensional array.  If you are checking to see if a multi-
dimensional array is truly empty, you should use the "Empty Array?" function on the "Array Size" output.
 1.3.2. Array Sum and Product Overflow
Checks the Add Array Elements and Multiply Array Elements functions to see if the 'numeric array' input
is a signed or unsigned 8-bit or 16-bit integer data type. Since the 'sum' and 'product' output of these
functions matches the input data type, the add or multiply operation may result in an overflow. 
Consider changing the input data type to these functions to a signed or unsigned 32-bit or 64-bit integer
to reduce the possibility of an overflow.

1.3.3. Breakpoint Detection

Checks for breakpoints on the block diagram, including breakpoints on wires, nodes, and subdiagrams.

1.3.4. Bundling Duplicate Names

Checks element names in the Bundle By Name and Unbundle By Name functions for duplicates.
Duplicate elements can cause confusing and sometimes incorrect block diagram behavior.

1.3.5. Error Cluster Wired

Checks that the error output on a block diagram node is wired. You can set the test to ignore VIs with
automatic error handling disabled. You also can ignore nodes that usually have unwired error outputs.

1.3.6. For Loop Iteration Count

Checks For Loops to ensure that the VI does not use both auto-indexing arrays and the N terminal to
govern the number of iterations the For Loop runs. You also can check for multiple auto-indexing arrays
governing the iteration count.

1.3.7. Globals and Locals

Checks whether a block diagram contains global and local variables.

1.3.8. Hidden Objects in Structures

Checks whether any objects in structures are hidden outside the visible bounds of the structure.

1.3.9. Hidden Tunnels

Checks tunnels, shift registers, and other structure border elements to see if they overlap each other. 
Overlapping tunnels can make your block diagram difficult to read.  The test currently does not check
dynamic event tunnels, tunnels on Timed Loops with frames, or tunnels on Timed Sequence Structures.

1.3.10. Indexer Datatype

Checks functions that index array elements and string characters to ensure that signed or unsigned 8-bit
or 16-bit integer data types do not index string or array elements.  The test ignores functions that use
constants for indexing.

1.3.11. Pattern Label

Checks whether a file dialog box that uses file patterns specifies a pattern label. The items you can check
are the File Dialog function, File Dialog Express VIs, and the browse options on a path control.

1.3.12. Reentrant VI Issues

Checks for uninitialized shift registers, unitialized Feedback Nodes, and non-reentrant subVIs in a
reentrant VI. Because reentrant VIs maintain multiple data spaces, unexpected results can occur when
using uninitialized shift registers or Feedback Nodes.  Additionally, parallelism could be inhibited if the
reentrant VI calls non-reentrant subVIs.

1.3.13. Type Casting References

This test detects the situation where a Type Cast function is being used to cast one reference type into
another reference type.  This can sometimes lead to instabilities or crashes with certain reference data
types.

1.3.14. Typedef Cluster Constants

Checks cluster constants on the block diagram that are linked to typedef controls to determine whether
their values match the default value of the typedef control. If a constant has a non-default value and the
structure of the typedef changes, the value of the constant might reset. Use the Bundle By Name
function to change the value of any elements inside a cluster constant linked to a typedef control.
2. Complexity Metrics
2.1.1. Cyclomatic Complexity
Checks that the cyclomatic complexity for the block diagram is below the user-specified limit. The
cyclomatic complexity measures the number of linearly independent paths in the block diagram code. It
gives an indication on the amount of branching in the code and subsequently the recommended number
of tests for the VI.

2.1.2. Depth of Nesting of Structures

Checks that the nesting of structures is within the user-specified limit.

2.1.3. Fan In
This test checks if the number of VIs calling this VI is less than the user specified number.

2.1.4. Fan Out

This test checks if the number of SubVIs called by a given VI is less than the configured value.

2.1.5. Modularity Index

Checks that the Modularity Index for the VI is above the user-specified limit. The Modularity Index
measures the ratio of number of SubVIs vs total nodes in the block diagram excluding the terminals of
front panel objects. It gives an indication of how Modularized the VI is. It is desireable to have larger
value for Modularity Index.
3. Documentation
3.1.Developer
3.1.1. Comment Usage
Checks whether the block diagram contains a minimum user-specified number of comments. The test
also can check whether all subdiagrams of multiframe structures, such as Case, Event, and sequence
structures, contain at least one comment.

3.1.2. Label Call Library Nodes

Checks Call Library Function Nodes on the block diagram for labels. You can improve the readability of a
VI by using the label of a Call Library Function Node to describe the function you are calling in a shared
library. The test fails if a Call Library Function Node has no label or the default label.

3.1.3. Revision History

Checks for revision history comments. Clear the revision history when you complete a VI so users cannot
see developer comments.

3.2.User
3.2.1. Spell Check
Checks the spelling of words on a VI's front panel and block diagram.  Certain VI properties, such as
description, are also checked.

3.2.2. VI Documentation
Checks for text in the VI description, control description, and/or tip strip fields on all controls.
4. Front Panel
4.1.SubVI
4.1.1. Array Default Values
Checks charts, graphs, and arrays on a front panel for empty default values. Saving non-empty default
values inside charts, graphs, or arrays uses memory unnecessarily. When the VI runs, it overwrites
values wired to indicators on the block diagram. If the VI is used as a subVI, the VI overwrites values
wired to controls connected to the connector pane.  This test will not check graphs and charts that are
not array datatypes (this includes scalar Waveform Charts and Digital Waveform Graphs).  It will also
ignore fixed-size arrays.

4.1.2. Cluster Sized to Fit

Checks that front panel clusters are set to Size to Fit, Arrange Horizontally, or Arrange Vertically. If you
do not select one of these autosizing options, cluster objects might not be visible to the user. This test
ignores error clusters.

4.1.3. Control Alignment

Checks that the alignment of controls on the front panel roughly matches the alignment of controls on
the connector pane.

4.2.User Interface
4.2.1. Clipped Text
Checks that any visible text on the front panel is not cut off. This includes text in control labels, control
captions, free labels, and text controls such as strings and paths. The test cannot check the text inside
listboxes, tables, tree controls, and tab controls.

4.2.2. Dialog Controls

Checks that front panel controls are from the System palette. The test ignores controls that do not have
a dialog counterpart.

4.2.3. Duplicate Control Labels

Checks that controls on the front panel do not share the same label.

4.2.4. Empty List Items

Checks listbox, multicolumn listbox, table, and tree controls to ensure that they are empty. The contents
of these controls populate when a VI runs, so saving a VI with contents in these controls uses memory
unnecessarily.

4.2.5. Font Usage

Checks that front panel controls, indicators, and free labels use user-specified fonts, such as application,
system, or dialog fonts.
 4.2.6. Overlapping Controls
Checks that front panel controls and indicators do not overlap. The test does not analyze front panel
decorations.

4.2.7. Panel Size and Position

Checks that a front panel completely resides within the bounds of the screen. The test also checks
whether the front panel is larger than the maximum specified width and height. If you are using a multi-
monitor system, the test fails if the panel does not reside entirely within the bounds of the primary
monitor. This test works only on standard, control, and global VIs.

4.2.8. Scalar Chart Updates

This test checks for Waveform Chart indicators with individual updates.  You can minimize the number
of front panel updates by passing array data instead of scalar data to the chart terminal.

4.2.9. Synchronous Display

This test checks for the "Synchronous Display" setting on controls and indicators.  Enabling Synchronous
Display causes the control or indicator to redraw every time its value is updated on the diagram. This
rapid updating is not required in most applications.

4.2.10. Transparent Labels

Checks that free labels, control labels, and control captions all have transparent backgrounds.
5. General
5.1.File Properties
5.1.1. SubVI and TypeDef Locations
Checks that subVIs and TypeDefs reside in one of an arbitrary number of user-specified locations (paths
and LLBs). If you do not specify a location, the test passes. The test does not check Express VIs on a block
diagram.

5.1.2. VI Extension
Checks the filename extension. The test fails for any VI that does not have a .vi or .vit extension, or for
any custom control that does not have a .ctl or .ctt extension. The test is case insensitive.

5.1.3. VI Name
Checks the name of a VI for potentially invalid characters.

5.1.4. VI Saved Version

Checks that the VI is saved in the most current version of LabVIEW.

5.1.5. VI Size
Compares the file size of a VI to the maximum allowable size the user specifies.

5.2.Icon and Connector Pane

5.2.1. Connected Pane Terminals
Checks that control and indicator terminals on the connector pane are wired on the block diagram.

5.2.2. Connector Pane Alignment

Checks that inputs wire to connector pane terminals on the left side and that outputs wire to connector
pane terminals on the right side.

5.2.3. Connector Pane Pattern

Checks that the connector pane pattern, regardless of rotation, matches one of the user-specified
connector pane patterns.

5.2.4. Default Icon

Checks that the icons of Standard and Polymorphic VIs are neither default nor empty.

5.2.5. Error Style

Checks that error connections appear in the lower-left and lower-right corners of the connector pane.
This part of the test runs only if the connector pane wires a single error in and a single error out
terminal. The test also checks whether an error case appears around the contents of the block diagram.
 5.2.6. Full Connector Pane
Checks that the connector pane is not full.  Your VI should have extra connector pane terminals available
for future expansion.

5.2.7. Icon Size and Border

Checks that the icon image is 32 × 32 pixels in size and has a solid border. The test does not check the
icons of control or global VIs.

5.2.8. Polymorphic Terminals

Checks that terminals on all instances of a polymorphic VI appear in the same position on the connector
pane of the instance VI. The test does not analyze broken polymorphic VIs.

5.2.9. Terminal Connection Type

Checks that controls and indicators on the connector pane that match user-specified names or patterns
include the user-specified terminal connection type, such as required, recommended, or optional.

5.2.10. Terminal Positions

This test checks controls and indicators connected to a VI's connector pane for user-specified names or
patterns at certain positions.

5.3.VI Properties
5.3.1. Broken VI
Checks for broken VIs.

5.3.2. Built Application Compatibility

Checks for properties or methods that are not supported in built applications.  Run this test on any VIs
you want to build into an application to ensure they will function properly.

5.3.3. Driver Usage

Checks for subVIs, functions, or Property Nodes that are part of National Instruments driver software
packages.  This test does not check for Express VIs that are part of the driver software packages.

5.3.4. Platform Portability

Checks for potential problems that might occur when you attempt to port a VI from one operating
system to another.

5.3.5. Removed Diagram

Checks whether the block diagram is present. Do not remove a block diagram from a VI because you
cannot recover it. You can password protect a VI if you do not want users to view the block diagram.

5.3.6. Toolkit Usage

Checks whether subVIs are National Instruments LabVIEW toolkit VIs. When you distribute a VI that
includes toolkit VIs as subVIs, each computer that runs the VI must have the toolkit VIs installed or the VI
does not run correctly.
 5.3.7. VI Lock State
Checks the lock state of a VI against the user-specified lock state(s).
6. VI Metrics
6.1.1. Connector Inputs and Outputs
Checks that the number of controls and indicators on the connector pane is within the user-specified
range.

6.1.2. Controls and Indicators

Checks that the number of controls and indicators are within the user-specified limits.

6.1.3. Diagram Count

Checks that the number of diagrams on the block diagram is within the user-specified limit.

6.1.4. Diagram Size

Checks that the block diagram size is within the user-specified maximum width and height. Block
diagrams that have a large area require a lot of scrolling to read the code.

6.1.5. Node Count

Checks that the number of nodes on the block diagram is within the user-specified limit.

6.1.6. Property Reads and Writes

Checks that the number of Property Reads and Property Writes is within the user-specified limit.

6.1.7. Shared Library Calls

Checks if the number of Shared Library Calls is within the user-specified limit.

6.1.8. Structure Count

Checks that the number of structures on the block diagram is within the user-specified limit.

6.1.9. Wire Sources

Checks that the number of wire sources on the block diagram is within the user-specified limit.