A Family of High Power Density
Unregulated Bus Converters
Yuancheng Ren, Ming Xu, Julu Sun, and Fred C. Lee, Fellow, IEEE
Abstract—This paper begins by reviewing current bus con-
verters and exploring their limitations. Next, a family of in-
ductor-less bus converters is proposed to overcome the limitations.
In the new bus converters, magnetizing current is used to achieve
zero-voltage-switching (ZVS) turn-on for all switches. The res-
onant concept is used to achieve nearly zero-current-switching
(ZCS) turn-off for the primary switches and no body diode loss
for the synchronous rectifiers (SRs). Meanwhile, the self-driven
method can be easily applied to save drive loss of SRs. Based
on these concepts, a full-bridge bus converter is built in the
quarter-brick size to verify the analysis. The experimental results
indicate that it can achieve 95.5% efficiency at 500-W, 12-V/45-A
output. Compared with industry products, this topology can
dramatically increase the power density. These concepts are also
applied to nonisolated dc/dc converters. As an example, a resonant
Buck converter is proposed and experimentally demonstrated.
Index Terms—Body diode loss, bus converter, two-stage ap-
proach, zero-voltage zero-current-switching (ZVZCS).
I. INTRODUCTION
M OST OF today’s high-performance microprocessors for
computer and telecommunication applications operate
with voltage levels of between 1–2 V and employ power-man-
agement strategies to minimize power consumption. For a long
time, 48-V bus voltage has been used as a standard. Most of the
dc/dc brick products convert the 48-V input voltage directly to
the voltage required by the load.
However, as the output current continually increases and the
output voltage decreases, the single-stage dc/dc structure is be-
coming more and more costly and inefficient. Just three years
ago, the intermediate bus architecture (IBA) (shown in Fig. 1)
[1]–[3] attracted great numbers of power-supply manufacturers
because of its cost-effectiveness and high efficiency. As a re-
sult, the bus converter, for use as the first stage, is becoming a
hot product. Many bus converters have recently been released.
Basically, the bus converter can be divided into two categories
[4]. One is regulated. Another one is unregulated.
Normally, in telecommunication application, the input
voltage is as wide as 36–75 V. The output regulation is re-
quired. For server and other computer applications, the input
voltage range is narrow. It is usually % (42–53 V). The
Manuscript received September 27, 2004; revised January 7, 2005. This
work was supported by Intel, Texas Instruments, National Semiconductors,
Intersil, Infineon, International Rectifier, Linear Technology, Renesas, Hipro,
Artesyn, Delta Electronics, and the National Science Foundation under Award
EEC-9731677. Recommended by Associate Editor F. Blaabjerg.
The authors are with the Center for Power Electronics Systems, Virginia
Polytechnic Institute and State University, Blacksburg, VA 24061 USA (e-mail:
yuren@vt.edu).
Digital Object Identifier 10.1109/TPEL.2005.854025
© 2005 IEEE. Reprinted, with permission, from IEEE Transactions on Power Electronics 2005.
58
Fig. 1. Intermediate bus architecture.
output regulation is optional. In this paper, the unregulated bus
converter is discussed.
Most of the current unregulated bus converters are open loop
designed, convert 48-V input to 12-V output, and deliver around
20-A current in a quarter-brick size. The power density is about
100–150 W/in . The duty cycle is fixed at 50% to maximize the
efficiency. To increase the output power and handle more output
current, more SRs should be paralleled to reduce the conduc-
tion loss. However, the bulky passive components, especially
the transformer and inductor, consume a lot of real estate and
thus very little room is left for more active components. In order
to shrink these passive components, the switching frequency
should increase. Unfortunately, due to the high switching loss
and body diode loss of today’s bus converters, it is difficult to
achieve high efficiency at high frequencies.
This paper proposes a family of high power density bus
converters and its advantages are listed as follows. The output
inductor is eliminated so a lot of real estate can be saved for
SRs. The magnetizing current of the transformer is used to
achieve zero-voltage-switching (ZVS) for all switches. The
resonant technique is utilized in these bus converters. The
leakage inductor of the transformer resonates with the output
capacitor to achieve zero-current-switching (ZCS) for the SRs
and nearly ZCS for the primary switches. Most importantly,
these converters can eliminate body diode loss, which is very
critical for high-efficiency applications. Meanwhile, self-driven
techniques can be easily applied to the SRs to reduce the drive
loss. As an example, a full-bridge converter based on these
concepts is analyzed thoroughly.
A 48-V input, 12-V-output unregulated bus converter proto-
type is built in the quarter-brick form factor. The experimental
results indicate that it can achieve over 95.5% efficiency at
500 W output. Compared with industry products, the proposed
bus converter can significantly improve the power density over
three times.
Based on these concepts, a family of isolated and nonisolated
bus converters are proposed. Some of them are experimentally
verified.
Fig. 2. Conventional full-bridge converter with center-tapped rectifier.
Fig. 3. Loss breakdown of the conventional full-bridge converter at 150 kHz
and 800 kHz.
II. LIMITATION OF TODAY’S TOPOLOGY FOR BUS CONVERTER
Generally, the unregulated bus converter has higher efficiency
because the primary switches run at a duty cycle of around 50%,
which facilitates ZVS. Today’s bus converters still use the con-
ventional topology, e.g., a full-bridge converter with a center-
tapped rectifier, as shown in Fig. 2. To increase the output power,
the output current must be pushed as high as possible. In order
to reduce the conduction loss, more and more devices should
be paralleled. However, the real estate is limited and there is no
room for more devices. It is obvious that the transformer and
inductor are the bulkiest components on the board. High fre-
quency is an effective way to shrink these passive components.
Unfortunately, the performance of the conventional topology is
severely degraded as the switching frequency increases.
Fig. 3 shows the loss breakdowns of the conventional
full-bridge converter running at 150-kHz and 800-kHz, respec-
tively. It is apparent that the body diode loss [5]–[7] and the
switching loss of the primary switches dramatically increase as
the frequency increases. Fig. 4 shows the severe ringing across
the SRs, which is caused by the reverse-recovery charge of
the body diode. For the 12-V-output-voltage application, the
voltage spike is usually higher than 30 V. Therefore, a 60-V
device instead of 30-V device has to be used. Generally, the
of a 60-V device is higher than that of a 30-V device,
which in turn results in higher conduction loss. The waveforms
in Fig. 5 indicate that although ZVS can be achieved at certain
load condition, the turn-off current of the primary switches is
very high, which causes high turn-off loss. In order to achieve
higher power density, the body diode loss and switching loss
should be reduced.
59
Fig. 4. Typical drain-to-source voltage across the synchronous rectifier and
the primary current of phase-shift full bridge converter.
Fig. 5. Typical gate signal, drain-to-source voltage of the primary switch and
the primary current of phase-shift full bridge converter.
III. PROPOSED INDUCTOR-LESS FULL-BRIDGE CONVERTER
A. Operation Principle
Taking a hard look at the conventional full-bridge converter, it
is found that the leakage inductor could be used as the “bridge”
linking the input source and the output capacitors [8]. Therefore,
the output inductor might not be necessary. After the output in-
ductor is eliminated, other benefits appear. First of all, the mag-
netizing current of the transformer can be used to achieve ZVS.
Furthermore, if the output capacitor is small enough, the leakage
inductor will resonate with it and ZCS could also be achieved.
Most importantly, the body diode loss can be easily eliminated
by the use of simple timing synchronization. These concepts can
be applied to many topologies, e.g., half-bridge, active-clamped
forward, resonant-reset forward, push-pull, push-pull forward,
and so on.
Compared with the conventional resonant converter, the
output capacitor serves as the resonant capacitor to further
simplify the circuit. The output voltage is composed of a
dc component, which is V , and a large ripple, e.g., for
12-V/30-A output case, the peak-to-peak voltage is around 1 V.
However, it is not difficult for the second stage to get rid of the
high frequency ripple by its input filter. Therefore, certain large
ripple is allowed in the unregulated bus converter.
Fig. 6. Proposed inductor-less full-bridge converter.

Fig. 6 shows the proposed inductor-less full-bridge converter

with a center-tapped rectifier. The resonant inductors are the Fig. 7. Operation waveforms of the inductor-less full-bridge converter.
leakage inductors and . The resonant capacitor is the
output cap C . And Fig. 7 shows its key operation waveforms at
full load condition and no load condition, respectively. The con- lighter, the energy transferred by the resonant tank automati-
verter operates at 50% duty cycle with open loop control. The cally reduced. In the conventional resonant converter, more and
full load condition is used to elaborate the operation principle more energies need to be circulated back to the input source as
of this converter. the load decreases. Therefore, the circuit has very high energy
During and , the primary switches and and the transfer efficiency. As an extreme case, the resonant tank totally
secondary switch are on, the energy is transferred from stops working at no load condition as illustrated in Fig. 7(b).
the primary side to the secondary side through the leakage The magnetizing current is still used to achieve ZVS for all de-
inductor of the transformer. Its equivalent circuit is shown vices. Hence, the proposed converter is able to realize ZVS over
in Fig. 8(a). the whole load range, which is different from the conventional
Considering the switching period and carefully designing the PWM full-bridge converter.
resonant components value, the current resonates back to zero
and ZCS can be achieved for (shown in Fig. 7). Meanwhile, B. Design Guideline
the turn-off current of the primary switches is only magnetizing
current. As long as the secondary switch is turned off when the During and , the primary switches and and the
secondary current reverts to zero, there is no body diode con- secondary switch are on, the output voltage and leakage in-
duction and therefore no body diode reverse-recovery loss. This ductor current are expressed as
is very important for SRs, because the voltage spike is elimi-
nated and a low-voltage-rating device can be safely used, which
results in smaller conduction loss.
In order to achieve proper timing design, the values of reso- (1)
nant components need to be well designed. In the bus converter
application, planar transformer with PCB winding is widely
used, which makes the leakage inductance control easy. So only (2)
the capacitance tolerance is taken into consideration, which is
discussed in Section IV. where is the transformer turns ratio,
At , switches , and turn-off. The resonant tank is the leakage inductance at the secondary side with the rela-
stops working. The output current is only supplied by the tionship V is the input voltage, is the
output capacitor C . Meanwhile, The magnetizing current output current, is the initial current of the leakage inductor,
starts to charge and discharge the output capacitors of the and VC is the initial voltage across the output capacitor C .
primary switches [as shown in Fig. 8(b)]. Therefore, ZVS can In order to properly design the circuit, the following equations
be achieved for the primary switches. In addition, the output should be satisfied. As we know, with a proper timing design, the
capacitors of the SRs, C and C , also serve as the snubber inductor initial current 0. After , the leakage inductor
capacitors. So ZVS for the SRs can also be accomplished. current goes back to zero. Therefore
After , the body diode of , and are on as shown
in Fig. 8(c), the magnetizing current is recovered by the input (3)
source.
Starting from , another half-cycle begins and the resonant
And, the average inductor current in a half switching cycle is
tank restarts to work. The operation is exactly same as that de-
dictated by
scribed above except that the polarity is changed.
It can be seen that the circulating energy of the proposed cir-
cuit is very small. If only the resonant tank and C is con- (4)
sidered, the circulating energy is zero. As the load is getting
60
Fig. 8. Equivalent circuits: (a) during [t ;t ] , (b) during [t ;t ] , and (c) during [t ;t ] .

Fig. 10. Control signal for the SRs with proposed self-driven scheme.
Fig. 9. Self-driven structure for the inductor-less full-bridge converter.

where is the switching period and is the turn-on time of Meanwhile, the gate capacitor of is charged. At and
and as depicted in Fig. 7(a). Meanwhile, the capac- turn-on with ZVS condition. Although the rising edge of V
itor initial voltage is given by for and goes through a differential circuit, which is com-
posed of a capacitor and resistor (shown in Fig. 9), and a nega-
(5) tive pulse is generated, this pulse doesn’t affect the operation.
At and turn-off. The signal goes through the dc
where is the dead time equal to . And the average block capacitor C . Therefore, the voltage across the trans-
capacitor voltage in a half switching cycle is equal to V , former is only ac components shown as V . The falling edge
that is signal passes through the differential circuit and generates a
narrow positive pulse. This pulse is used to trigger the auxil-
(6) iary MOSFET . When turns on, the gate source of
is directly shorted and turns off. Because the auxiliary trans-
Given a switching period and the load condition, based on former only transfers a narrow pulse, a small toroidal core is
(3)–(6), the leakage inductance, the output capacitance, the ini- sufficient.
tial voltage across the output capacitor and the turn-on time Based on this self-driven structure, the gate capacitors of the
can be derived. SRs also serve as the snubber capacitors of the primary switches
and are charged by the magnetizing current. As long as ZVS is
C. Self-Driven Scheme achieved, a part of the turn-on drive loss can be saved. Basi-
To further simplify the circuit, self-driven technique is ap- cally, the proposed self-driven scheme utilizes a current source
plied to this application. Fig. 9 shows the self-driven scheme. instead of a voltage source, which is the magnetizing current,
Compared with Fig. 6, there are two additional windings in the to charge the gate capacitors. The smaller gate resistance, more
power transformer, which are used to turn-on SRs. Besides that, drive loss can be saved. However, it is very difficult to give an
two auxiliary transformers and corresponding circuits are used expression to quantify the relationship between the gate resis-
to turn-off SRs. Its control timing is shown in Fig. 10. tances and drive loss because the expression will be more than
At , when and turn-off, the magnetizing current dis- 4th order. Therefore simulation results are provided. The device
charges the output capacitors of and to achieve ZVS. model is downloaded from the website of the device vendor.
61
Fig. 11. Turn-on drive loss comparison between the self-driven structure and
the conventional external driver.
Fig. 12. Loss breakdown comparison between conventional full bridge at
150 kHz and the proposed topology at 800 kHz.
For the conventional external driver scheme, which uses a
voltage source to charge the gate capacitor, the turn-on drive
loss can always be calculated by
(7)
where C is the gate-source capacitance of the device, V is
the drive voltage, and is the switching frequency. It is clear
that the drive loss is independent with the gate resistances. Eight
HAT2165s running at 1 MHz is used as an example. The drive
voltage is 10 V. The turn-on drive loss is always 2.9 W no matter
how large the gate resistance is.
Fig. 11 shows the turn-on drive loss comparison between the
conventional external driver and the self-driven structure. For
a practical design, the gate resistance is around 0.2- . At this
point, around 80% turn-on drive loss can be saved.
On the other hand, the turn-off drive loss is completely dis-
sipated because the auxiliary MOSFET is triggered on by the
primary signal to turn-off SRs.
As a summary, the loss breakdown comparison of the whole
circuit is shown in Fig. 12. By the resonant technique, the body
diode conduction loss and reverse recovery loss are eliminated.
ZVS is realized for all devices and nearly ZCS is accomplished
for the primary switches. Therefore, 65% power loss reduction
is achieved when the converter is operating at 800 kHz. Com-
pared with 150 kHz conventional ZVS full bridge converter, the
proposed topology is able to achieve even smaller power loss
with much higher switching frequency.
62
Fig. 13. Photographs of the prototype.
IV. EXPERIMENTAL VERIFICATION
A prototype with the quarter-brick-sized design is built to
verify the described benefits. The specification is: V 48 V,
V 12 V, 500 W, 800 kHz, 1 nH, and C
10 F. The primary devices are four Fairchild FD10AN06s. The
driver is Intersil HIP2101s. The secondary switches are four
HAT2165s. Instead of single transformer, two transformers in
series are used in order to distribute the loss and to achieve
evenly distributed loss. The transformers use TDK PC44 EIR18
cores with turns-ratios of 2:1. In order to get sufficient magne-
tizing current to realize ZVS, the core is with 0.05-mm air gap
in the center leg. The magnetizing inductance is 3 H. Fig. 13
shows a picture of the prototype.
Fig. 14 indicates that ZVS for the primary switches can be
achieved. And most importantly, the turn-off current of the pri-
mary switches is only 2 A. Compared with 10-A turn-off cur-
rent shown in Fig. 5, the turn-off loss can be dramatically re-
duced. Fig. 15 shows that the gate drive signal for the SR is very
clean even without using an external gate resistor for damping.
Fig. 16 shows the clean drain-to-source voltage across the SRs.
Because there is no voltage spike across the SRs, a 30-V de-
vice (HAT2165) can be safely used. Fig. 17 zooms in the parts
1 and 2 that are circled in Fig. 16. The voltage scale of V
is 2 V/scale. If the body diode conducts current, the drain-to-
source voltage of the SRs is around 0.7 V. Fig. 17 clearly
shows that there is no body diode conduction.
The efficiency and the power density comparisons are shown
in Figs. 18 and 19. The proposed bus converter reaches over
95.5% efficiency at 500 W. Normally, the quarter-brick can sus-
tain losses of around 13 W without necessitating a heat-sink
or airflow. At this condition, the output power of the proposed
bus converter is around 350 W, and the power density is around

Fig. 14. Gate signal, drain-to-source voltage of the primary switch and the
primary side current.
Fig. 15. Top: the gate signal for the primary switch. Bottom: the gate signal
for the SR.
Fig. 16. Gate signal and the drain-to-source voltage of the SR, and the primary
side current.
600 W/in , which is much higher than most of today’s industry
practices. Although it is still lower than Vicor’s product, it has
the potential to be improved. Please note that only two-thirds of
63
Fig. 17. Close-up of Fig. 16: (a) S turn-off edge and (b) S turn-on edge.
Fig. 18. Efficiency versus output power.
Fig. 19. Power density comparison with industry products.
the quarter-brick is used (see Fig. 13). More SRs can fit into the
board to reduce the conduction loss and improve the power den-
sity. Meanwhile, integration can also improve the power density,
which is adopted by Vicor.
As mentioned in the previous section, one design concern
is the impact of the tolerance of the output capacitors, which
resonate with the leakage inductor of the transformer. If the
timing is not perfectly matched, the turn-off current of the pri-
mary switches could be relatively larger, which would result in
a larger turn-off loss. Fig. 20 illustrates the impact of the output
capacitance tolerance on the efficiency at full load 500 W.
The tolerance in the test is 25%. The efficiency variation is
only 1.1%. Therefore, the efficiency is not very sensitive to the
resonant capacitance tolerance in this circuit.
Another design concern is the output voltage regulation and
its large output voltage ripple. Fig. 21 shows the bus voltage
regulation. Thanks to the low output impedance, the voltage
drop is only 0.7 V. Fig. 22 shows the bus voltage ripple, V ,
across the resonant capacitor C . At 40-A output condition, the
peak-to-peak voltage ripple is around 1.2 V. Fortunately, the

Fig. 20. Impact of the output capacitance tolerance on the efficiency at
500 W.
Fig. 21. Output voltage regulation.
1
Fig. 22. Intermediate bus voltage ripple V , and the input voltage ripple,
1 V , which is right after the L–C input filter of the second stage.
ripple frequency is as high as 1.6 MHz, which can be easily
attenuated by the input – filter of the second stage. As an
example, the input inductance is designed only 27 nH and the
input capacitance is 100 F. The experimental results indicate
that the voltage ripple after the input filter, V as shown in
Fig. 22, can be attenuated down to 150 mV, which doesn’t ad-
versely impact the second stage’s performance at all.
V. CONCEPT EXTENSION
A. Isolated Bus Converter
These concepts can be applied to many other topologies
[9], [10], e.g., half-bridge [see Fig. 23(a)], active-clamped for-
ward [see Fig. 23(b)], resonant-reset forward [see Fig. 23(c)],
push-pull [see Fig. 23(d)], push-pull forward [see Fig. 23(e)],
and so on. The resonant-reset forward converter is the simplest
topology, employing only two devices and one transformer.
In order to verify the generic characteristics of these concepts,
hardware is built. The experimental waveforms of a resonant-
reset forward converter are provided in Fig. 24. It is obvious
that the ZVS and nearly ZCS condition is achieved. Therefore,
high efficiency and high power density can be accomplished.
Po =
B. Nonisolated Bus Converter
In [11], the two-stage approach is proposed for 12-V VR in
desktop and laptop computer applications. The high di/dt load is
handled by the second stage, which is operating at multimega-
hertz. The task for the first stage is relatively easy, which is to
step down the input voltage from 12 V to a certain intermediate
bus voltage. It can also be treated as a nonisolated bus converter.
In [11], a conventional PWM buck converter is used as the first
stage running at 300–500 kHz. It can be seen that the output in-
ductors occupied too much area. In order to increase the power
density, high frequency is necessary. However, the conventional
PWM buck converter lacks the high frequency capability. An
alternative has to be found. Can we apply the aforementioned
concepts to the nonisolated topologies?
In [12], a general method is proposed to convert an isolated
topology to its nonisolated version. Therefore, every topology
shown in Fig. 23 has its own nonisolated version. Following
this method, a resonant Buck converter is proposed as shown in
Fig. 25. The same concepts are applied to this topology to min-
imize the switching loss and body diode losses. The converter
is operating at 50% duty cycle and open loop control. To sim-
plify the circuit, self-driven scheme is also applied to the SRs
by directly using the phase node as the gate signal. Compared
with the isolated bus converter, this self-driven scheme is much
simpler.
The key operation waveforms are drawn in Fig. 26. The de-
tailed description of the circuit operation is omitted in this paper
because it is very similar to the isolated bus converters. ZVS,
nearly ZCS and no body diode loss still can be achieved.
Hardware is built to verify the analysis. The circuit is run-
ning at 1-MHz. The specification is: V 12 V, V 6 V,
120 W, 1 MHz, 1 nH, and C 8 F. The
devices are four HAT2165 for both top and bottom switches.
The driver for the top switches is National LM2726. The core is
TDK EIR18. Fig. 27 shows the dimension comparison between
the proposed resonant Buck and conventional PWM Buck. The
footprint can be reduced by 33%. And the power density can
increase 2.5 times.
The waveforms in Fig. 28 indicate no body diode conduc-
tion and ZVS condition. In Fig. 29, the output inductor current
waveform looks good to achieve nearly ZCS operation. When
the corresponding devices turn-off, the current almost resonates
64
Fig. 23. Concepts applied to (a) half-bridge converter, (b) active-clamped forward, (c) resonant-rest forward, (d) push-pull, and (e) push-pull forward.

Fig. 24. Waveforms of the inductor-less resonant-reset forward converter: (a) the drain-source voltage and gate signal of switch Q and (b) the primary current
and gate signal of Q
.

condition, the proposed one has lower efficiency because there is

circulating energy in the magnetizing inductor. The self-driven
scheme helps the light load efficiency somewhat because the
drive loss can be partially recovered by the ZVS condition as
analyzed in Section III-C (see Fig. 30).

Fig. 25. Proposed resonant Buck converter with self-driven scheme.
back to zero. Therefore, the turn-off loss can be dramatically
reduced.
In summary, the efficiency of the proposed resonant Buck is
compared with the conventional PWM Buck. At full load con-
dition, the resonant Buck has 2% higher efficiency. At light load
65
VI. CONCLUSION
In this paper, a family of inductor-less bus converters is pro-
posed. A full-bridge converter is used as an example to ex-
plain the operation principle of the isolated bus converter and
a proposed resonant Buck converter is used as an example for
the nonisolated bus converters. Based on the concept of energy
transferring by the leakage inductor, the bulky output inductor
can be eliminated. Through careful design of the resonant tank,
nearly ZCS turn-off can be achieved for the primary switches,
and the body diode loss of SRs can be eliminated. Meanwhile,
the magnetizing current is used to realize ZVS turn-on for all
switches. And a self-driven structure is proposed for this family
 Fig. 29. Output inductor current waveform and drain-source waveform of S .

Fig. 26. Key operation waveforms of the proposed resonant Buck converter.

Fig. 30. Efficiency comparison.

Fig. 27. Size comparison between the proposed resonant Buck and
conventional PWM Buck. Hardware is also built to demonstrate the resonant Buck con-
verter. Compared with the conventional PWM Buck converter
as the first stage in [11], its footprint is reduced over 33% and
power density increases 2.5 times.
Therefore, the proposed bus converters are promising for
telecommunication and computer applications.

Fig. 28. Drain-source waveform and gate signal of synchronous rectifier S .
of bus converters in order to further simplify the circuits and
save drive loss.
As a result, the proposed inductor-less bus converter is able to
run at high frequencies with higher efficiency. The experimental
results of the inductor-less full bridge bus converter show that
it reaches over 95.5% efficiency at 500-W output in a quarter-
brick size. Its power density is around three times higher than
today’s industry practices.
66
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Yuancheng Ren received the B.S. and M.S. degrees
in electrical engineering from Zhejiang University,
Zhejiang, China, in 1997 and 2000, respectively, and
is currently pursuing the Ph.D. degree in power elec-
tronics at the Center for Power Electronics Systems
(CPES), Virginia Polytechnic Institute and State Uni-
versity, Blacksburg.
His research interests include low-voltage power
management, high-frequency high-density power
supplies, modeling and control for converters, and
design for distribute-power systems. He holds one
U.S. patent and has four U.S. patents pending.
Ming Xu received the B.S. degree in electrical en-
gineering from the Nanjing University of Aeronau-
tics and Astronautics, Nanjing, China, in 1991 and
the M.S. and Ph.D. degrees in electrical engineering
from Zhejiang University, Zhejiang, China, in 1994
and 1997, respectively.
He is currently a Research Assistant Professor at
the Center for Power Electronics Systems (CPES),
Virginia Polytechnic Institute and State University,
Blacksburg. He holds two U.S. patents, seven Chi-
nese patents, 18 invention disclosures, and has seven
U.S. patent pending. He has published one book and approximately 80 tech-
nical papers in journals and conferences. His research interests include high-
frequency power conversion, distributed power system, power factor correc-
tion techniques, low voltage high current conversion techniques, high-frequency
magnetics, and modeling and control of converters.
Julu Sun received the B.S. degree in electrical
engineering from Zhejiang University, Zhejiang,
China, in 1996, the M.S. degree in electrical engi-
neering from Tsinghua University, Beijing, China, in
2001, and is currently pursuing the Ph.D. degree at
the Center for Power Electronics Systems (CPES),
Virginia Polytechnic Institute and State University,
Blacksburg.
His research interests include high-frequency
power conversion, low voltage high current conver-
sion techniques, converter modeling, and control.
67
Fred C. Lee (S’72–M’74–SM’87–F’90) received
the B.S. degree in electrical engineering from the
National Cheng Kung University, Taiwan, R.O.C.,
in 1968 and the M.S. and Ph.D. degrees in electrical
engineering from Duke University, Durham, NC, in
1971 and 1974, respectively.
He is a University Distinguished Professor with
Virginia Polytechnic Institute and State University
(Virginia Tech), Blacksburg, and prior to that he was
the Lewis A. Hester Chair of Engineering at Virginia
Tech. He directs the Center for Power Electronics
Systems (CPES), a National Science Foundation engineering research center
whose participants include five universities and over 100 corporations. In
addition to Virginia Tech, participating CPES universities are the University
of Wisconsin-Madison, Rensselaer Polytechnic Institute, North Carolina A&T
State University, and the University of Puerto Rico-Mayaguez. He is also
the Founder and Director of the Virginia Power Electronics Center (VPEC),
one of the largest university-based power electronics research centers in
the country. VPEC’s Industry-University Partnership Program provides an
effective mechanism for technology transfer, and an opportunity for industries
to profit from VPEC’s research results. VPEC’s programs have been able to
attract world-renowned faculty and visiting professors to Virginia Tech who, in
turn, attract an excellent cadre of undergraduate and graduate students. Total
sponsored research funding secured by him over the last 20 years exceeds
$35 million. His research interests include high-frequency power conversion,
distributed power systems, space power systems, power factor correction
techniques, electronics packaging, high-frequency magnetics, device charac-
terization, and modeling and control of converters. He holds 30 U.S. patents,
and has published over 175 journal articles in refereed journals and more than
400 technical papers in conference proceedings.
Dr. Lee received the Society of Automotive Engineering’s Ralph R. Teeter
Education Award (1985), Virginia Tech’s Alumni Award for Research Excel-
lence (1990), and its College of Engineering Dean’s Award for Excellence in
Research (1997), in 1989, the William E. Newell Power Electronics Award, the
highest award presented by the IEEE Power Electronics Society for outstanding
achievement in the power electronics discipline, the Power Conversion and In-
telligent Motion Award for Leadership in Power Electronics Education (1990),
the Arthur E. Fury Award for Leadership and Innovation in Advancing Power
Electronic Systems Technology (1998), the IEEE Millennium Medal, and
honorary professorships from Shanghai University of Technology, Shanghai
Railroad and Technology Institute, Nanjing Aeronautical Institute, Zhejiang
University, and Tsinghua University. He is an active member in the professional
community of power electronics engineers. He chaired the 1995 International
Conference on Power Electronics and Drives Systems, which took place in
Singapore, and co-chaired the 1994 International Power Electronics and Motion
Control Conference, held in Beijing. During 1993-1994, he served as President
of the IEEE Power Electronics Society and, before that, as Program Chair
and then Conference Chair of IEEE-sponsored power electronics specialist
conferences.