CEF02N6

Sep. 2002

N-Channel Logic Level Enhancement Mode Field Effect Transistor

FEATURES
D

600V , 1.5A , RDS(ON)=5 @VGS=10V.

Super high dense cell design for extremely low RDS(ON).

High power and current handling capability.

TO-220F full-pak for through hole

G
G
D
S

S
TO-220F

ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)

Symbol

Limit

Unit

Drain-Source Voltage

VDS

600

Gate-Source Voltage

VGS

30

ID

1.5

-Pulsed

IDM

4.5

Drain-Source Diode Forward Current

IS

4.5

Maximum Power Dissipation @Tc=25 C

Derate above 25 C

PD

29
0.23

W
W/ C

Parameter

Drain Current-Continuous

Operating and Storage Temperautre Range

TJ, TSTG

-65 to 150

THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case

RJC

4.3

C/W

Thermal Resistance, Junction-to-Ambient

RJA

65

C/W

6-117

CEF02N6
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter

Condition

Symbol

Min Typ Max Unit

DRAIN-SOURCE AVALANCHE RATING

6

Single Pulse Drain-Source

Avalanche Energy

EAS

Maximum Drain-Source
Avalanche Current

IAS

VDD =50V, L=60mH

RG=9.1

125

mJ

OFF CHARACTERISTICS
Drain-Source Breakdown Voltage

BVDSS

VGS = 0V,ID = 250A

Zero Gate Voltage Drain Current

IDSS

VDS = 600V, VGS = 0V

Gate-Body Leakage

IGSS

VGS = 30V, VDS = 0V

Gate Threshold Voltage

VGS(th)

VDS = VGS, ID = 250A

Drain-Source On-State Resistance

RDS(ON)

VGS =10V, ID = 1A

On-State Drain Current

ID(ON)
gFS

VGS = 10V, VDS = 10V

VDS = 50V, ID = 1A

1.2

tD(ON)

VDD = 300V,
ID = 2A,
VGS = 10V
RGEN=18

18

35

ns

18

35

ns

50

90

ns

600

V
25

100 nA

ON CHARACTERISTICS a

Forward Transconductance

2
3.8

5.0

A
S

SWITCHING CHARACTERISTICS
Turn-On Delay Time
Rise Time
Turn-Off Delay Time

tr
tD(OFF)

Fall Time

tf

16

40

ns

Total Gate Charge

Qg

20

25

nC

Gate-Source Charge

Qgs

Gate-Drain Charge

Qgd

VDS =480V, ID = 2A,

VGS =10V
6-118

nC

12

nC

CEF02N6
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter

Min Typ Max Unit

Condition

Symbol

DYNAMIC CHARACTERISTICS b
Input Capacitance

CISS

Output Capacitance

COSS

Reverse Transfer Capacitance

CRSS

VDS =25V, VGS = 0V

f =1.0MHZ

DRAIN-SOURCE DIODE CHARACTERISTICS

Diode Forward Voltage

250

PF

50

PF

30

PF

VGS = 0V, Is =1.5A

VSD

1.5

Notes
a.Pulse Test:Pulse Width 300s, Duty Cycle 2%.
b.Guaranteed by design, not subject to production testing.

3.0
VGS=10,9,8,7V

ID, Drain Current (A)

ID, Drain Current(A)

2.5
2.0
1.5

VGS=6V

1.0

VGS=5V
0.5

150 C

-55 C

0.1

0
0

10

12

1.VDS=40V
2.Pulse Test

25 C

10

VDS, Drain-to-Source Voltage (V)

VGS, Gate-to-Source Voltage (V)

Figure 1. Output Characteristics

Figure 2. Transfer Characteristics

6-119

CEF02N6
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)

600

C, Capacitance (pF)

500

400
Ciss

300
200

Coss

100

Crss
0
0

10

15

20

25

2.2
ID=1A
VGS=10V

1.9
1.6
1.3
1.0
0.7

0.4
-100

VDS=VGS
ID=250A

1.10
1.0
0.90
0.80
0.70
25

50

75 100 125 150

BVDSS, Normalized
Drain-Source Breakdown Voltage

Vth, Normalized
Gate-Source Threshold Voltage

1.30

150

200

1.15
ID=250A

1.10
1.05
1.00
0.95
0.90

0.85
-50 -25

25

50

75 100 125 150

Tj, Junction Temperature ( C)

Tj, Junction Temperature ( C)

Figure 6. Breakdown Voltage Variation

with Temperature

Figure 5. Gate Threshold Variation

with Temperature

20
10

4
VDS=50V

Is, Source-drain current (A)

gFS, Transconductance (S)

100

Figure 4. On-Resistance Variation with

Temperature

Figure 3. Capacitance

0.60
-50 -25

50

TJ, Junction Temperature( C)

VDS, Drain-to Source Voltage (V)

1.20

-50

VGS=0V

0.1

0
0

0.4

IDS, Drain-Source Current (A)

0.6

0.8

1.0

1.2

VSD, Body Diode Forward Voltage (V)

Figure 7. Transconductance Variation

with Drain Current
6-120

Figure 8. Body Diode Forward Voltage

Variation with Source Current

CEF02N6
10

VDS=480V
ID=2A

1m

ID, Drain Current (A)

12
9

3
0
0

12

(O

10

0m

0.1

0.01

24

18

RD

i
)L

10

t
mi
D

VGS, Gate to Source Voltage (V)

15

Tc=25 C
Tj=150C
Single Pulse
1

Qg, Total Gate Charge (nC)

500 1000

100

10

VDS, Drain-Source Voltage (V)

Figure 9. Gate Charge

Figure 10. Maximum Safe

Operating Area

VDD
t on
RL

V IN
D

td(off)

tf
90%

90%

VOUT
VOUT

VGS
RGEN

toff
tr

td(on)

10%

INVERTED

10%

G
90%

VIN

50%

50%

10%

PULSE WIDTH

Figure 12. Switching Waveforms

Figure 11. Switching Test Circuit

0.2

r(t),Normalized Effective
Transient Thermal Impedance

2
1
D=0.5

0.1

PDM

0.1
0.05

t1
t2
1. RJC (t)=r (t) * RJC
2. RJC=See Datasheet
3. TJM-TC = P* RJC (t)
4. Duty Cycle, D=t1/t2

0.02
0.01
0.01
0.01

0.1
Single Pulse

10

100

1000

Square Wave Pulse Duration (msec)

Figure 13. Normalized Thermal Transient Impedance Curve

6-121

10000