1 2 3 4 5 6

gps
SCL
SDA
TX_READY
TIMEPULSE
RESET#

V_BACKUP VCC
A A
gps.sch

audio hackrf_if lcd_sw_sd

PDN# AUDIO_RESET# LCD_RESET# LCD_RESET#
H2
MCKI I2S0_MCLK LCD_BACKLIGHT LCD_BACKLIGHT
BICK I2S0_SCK LCD_CS# LCD_CS#
HOLE1
LRCK I2S0_WS LCD_RS LCD_RS
SDTI I2S0_TX_SDA LCD_RD# LCD_RD#
H3
SDTO I2S0_RX_SDA LCD_WR# LCD_WR#
LCD_DB[15..0] LCD_DB[15..0]
SCL SCL
HOLE1
SDA SDA
LCD_TE LCD_TE
H4
GPS_TX_READY
GPS_TIMEPULSE TP_U TP_U
GPS_RESET# TP_R TP_R
HOLE1
TP_D TP_D
TP_L TP_L
H5
B B
SW_U SW_U
SW_R SW_R
HOLE1
SW_D SW_D
SW_L SW_L
SW_ROT_A SW_ROT_A
SW_ROT_B SW_ROT_B
SW_SEL SW_SEL

SD_CD SD_CD
SD_CLK SD_CLK
SD_CMD SD_CMD
SD_DAT0 SD_DAT0
SD_DAT1 SD_DAT1
SD_DAT2 SD_DAT2
SD_DAT3 SD_DAT3
CLKIN
REF_EN VBUS
VBUSCTRL
VBAT VIN
C hackrf_if.sch C

power
VBAT VBUS
VBUSCTRL
TVDD AUDIO_TVDD VIN
DVDD AUDIO_DVDD
AVDD AUDIO_AVDD
SVDD AUDIO_SVDD LCD_VBL LCD_VBL
audio.sch lcd_sw_sd.sch
REF_EN GPS_VCC
REF_CLK
power.sch

License: GNU General Public License, version 2

FID1 FID3 Copyright © 2014-2018 Jared Boone
ShareBrained Technology, Inc.
FIDUCIAL FIDUCIAL Sheet: /
D File: portapack_h1.sch D
FID2
Title: PortaPack H1
FIDUCIAL Size: A4 Date: 2018-10-29 Rev: 20181029
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 1/6
1 2 3 4 5 6
 1 2 3 4 5 6

A A
RHPOUT
LHPOUT

C23 C22
J1 MIC_X S TRRS_SW_JACK
SPP 3 220N 220N GND_X R2
2
DNP RHPOUT_X R1
P2
I2C Addresses on HackRF I2C bus (I2C0?): SPN 1 LHPOUT_X RSW
TSW

R12
33R

R11
33R
0b1100000: Si5351C-B T
0b0010010: AK4951 audio codec

DVDD

SVDD
VEE

U5

24
23
22
21
20
19
18
17
C8
LHPOUT 1
C1A C1B
8 LHPOUT_X
GND_X

VEE

SVDD
DVDD
HPR

VSS3
2 7

SPN/ROUT
HPL

SPP/LOUT
C6 2U2 C2A C2B
MIC 3
C3A C3B
6 MIC_X

GND
B 25 16 RHPOUT 4 5 RHPOUT_X B
2U2 VSS2 TVDD TVDD C4A C4B
CP 26 15
MCKI
CP MCKI RP1
CN 27 14 BICK_R NUF4220MN
CN BICK BICK

9
28 U1 13 LRCK_R
AVDD AVDD LRCK LRCK
29 AK4951EN 12 SDTO_R
VSS1 SDTO SDTO
VCOM 30
VCOM SDTI
11
SDTI PDN#
REGFIL

RIN1/DMCLK
31 10

LIN1/DMDAT
REGFIL SDA SDA 220R
32 9
C10

2U2

RIN3/BEEP SCL SCL

MPWR2
MPWR1
RIN2
LIN3

LIN2

PDN
33
PAD
C12

2U2

1
2
3
4
5
6
7
8
PDN#_R
TP1

TP2
TP3

TP4
TP5
TP6

DNP
C R2 C

C25
PDN/SCL/SDA/SDTI/LRCK/BICK/MCKI:
R18
2K2

1U
L: < 0.3 TVDD, H > 0.7 TVDD

Init: power down, EXT slave, PLL off

BICK, LRCK: inputs

Input float OK: [LR]IN[123]

MIC

License: GNU General Public License, version 2

TVDD DVDD AVDD SVDD
Copyright © 2014-2018 Jared Boone
C2 C7 C3 C4 C11 C5 C13 ShareBrained Technology, Inc.
Sheet: /audio/
D 100N 10U 100N 100N 10U 100N DNP File: audio.sch D

Title: PortaPack H1
Size: A4 Date: 2018-10-29 Rev: 20181029
No 10U on DVDD, very near regulator 10U. No 10U on SVDD to comply with USB inrush spec.
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 2/6
1 2 3 4 5 6
 1 2 3 4 5 6

J3
SW1 1
LCD_VBL LEDA
SW_SEL S1
SEL D
S2
SW_D LEDK1 2
LEDK1
A S4 S3 LEDK2 3
SW_ROT_A ROT_A R SW_R LEDK2
SW_ROT_B B
ROT_B U
S4
SW_U LEDK3 4
LEDK3
L
S5
SW_L LEDK4 5
LEDK4
6

+1V8
A IM0 A
S5 A S1 B S3 7
IM1
8
IM2
9
IM3
10
LCD_RESET# RESET
CA S2 CB 11
COM_A COM_B VSYNC
12
HSYNC
CK_TSWB-3N-CB 13

DNP
LCD_DB[15..0] DOTCLK

R19
14
DE
15
DB17
16
DB16
EN/DIM: 200k PD internal, enable > 1.3V, disable < 0.4V LCD_DB15 17
DB15
RSET: not required, default 25mA current LCD_DB14 18
DB14
UVLO: 2.0V typ LCD_DB13 19
DB13
LCD_DB12 20
DB12
U4 LCD_DB11 21
DB11
LCD_BACKLIGHT 1
EN/DIM VIN
8
LCD_VBL LCD_DB10 22
DB10
2
GND RSET/NC
7 LCD_DB9 23
DB9
LEDK1 3
LED1 LED4
6 LEDK4 C14
LCD_DB8 24
DB8
PAD

LEDK2 4 5 LEDK3 LCD_DB7 25

DNP
LED2 LED3 DB7

R20
B LCD_DB6 26 B
1U DB6
CAT4004[_AB] LCD_DB5 27
DB5
9

LCD1 LCD_DB4 28
DB4
LCD_DB3 29
DB3
LCD_DB2 30
DB2
LCD_DB1 31
DB1
LCD_DB0 32
DB0
33
SDO
34
SDI
35
LCD_RD# RD
36
LCD_WR# WRX(D/CX)
37
LCD_RS D/CX(SCL)
38
LCD_CS# CSX
39
LCD_TE TE
40

+1V8
VDDI
41
VDDI
42

+3V3
VCI
43
GND
44
TP_R XP
45
C TP_D YP C
46
TP_L XN
47
TP_U YN
ER-TFT024-3_PANEL 48
+3V3 GND
J2 MICROSD_DETSW 49
GND
1 50
SD_DAT2 DAT2 GND
2
SD_DAT3 DAT3/CD
3 LCD Mode: SHLD
SD_CMD CMD
4 8080 MCU 16-bit bus interface I
VDD
5 IM[3:0] = 0b0001, DB[15:0] active ER-TFT024-3_FPC
SD_CLK CLK
6
VSS
7
SD_DAT0 DAT0
8
SD_DAT1 DAT1
SHIELD

A
DETA
GND

B
SD_CD DETB
License: GNU General Public License, version 2
Copyright © 2014-2018 Jared Boone
SH

C26 C27
0

ShareBrained Technology, Inc.

10U 100N Sheet: /lcd_sw_sd/
D File: lcd_sw_sd.sch D

Title: PortaPack H1
Size: A4 Date: 2018-10-29 Rev: 20181029
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 3/6
1 2 3 4 5 6
 1 2 3 4 5 6

P20 Init: I/O is hi-Z with pull-ups. LCD_DB[15..0]

1 2 SRAM download when VCCINT reaches 1V55. LCD_RD#
VBAT VBAT RTC_ALARM
3 4 User mode once downloaded and VCCIO OK. LCD_WR# +1V8

+3V3
VCC WAKEUP
MCU_D0 5 6 MCU_D1 VCCINT stable to user mode: 200 usec max. LCD_RS

LCD_DB0
LCD_DB1

LCD_DB2
LCD_DB3
LCD_DB4
LCD_DB5
LCD_DB6
LCD_DB7
LCD_DB8
LCD_DB9
GPIO3_8 GPIO3_9
MCU_D2 7 8 MCU_D3 VCCIOs stable to user mode: 2 usec. LCD_CS#
GPIO3_10 GPIO3_11
MCU_D4 9 10 MCU_D5 LCD_TE
GPIO3_12 GPIO3_13
MCU_D6 11 12 MCU_D7 Pull-ups: 5-25k @ 3V3, 25-60k @ 1V8.
GPIO3_14 GPIO3_15 External R-pull: 1K PD, 10K PU recommended.
A 13 14 TP_R A
GND ADC0_6 TP_R VCCIO=3V3: 2V5, 3V3 inputs OK.
15 16
GND ADC0_2 TP_D VCCIO=1V8: 1V5, 1V8, 2V5, 3V3 inputs OK.

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
17 18
VBUSCTRL VBUSCTRL ADC0_5 TP_L
19 20 JTAG active w/VCCINT, but refers to VCCIO.
GND ADC0_0 TP_U

VCCIO2
IO

IO
IO/DIFFIO_T1p

IO/DIFFIO_T1n
IO/DIFFIO_T2p
IO/DIFFIO_T2n
IO/DIFFIO_T3p

IO/DIFFIO_T3n
IO/DIFFIO_T4p
IO/DIFFIO_T4n
IO/DIFFIO_T5p
IO/DIFFIO_T5n

IO/DIFFIO_T6p
IO/DIFFIO_T6n
IO/DIFFIO_L1p
21 22 TDI, TMS: weak internal PU
VBUS VBUS VIN VIN
TCK: weak internal PD (keep low at power-up)
HACKRF_ONE_P20

P22 1 48 LCD_DB10
TP_D IO/DIFFIO_L1n IO
1
CLKOUT CLKIN
2
CLKIN TP_L 2
IO IO/DIFFIO_R1p
47 LCD_DB11
RESET# 3 4 3 BANK2 46 LCD_DB12
RESET# GND TP_U IO/DIFFIO_L2p IO/DIFFIO_R1n
MCU_LCD_RD 5
I2C1_SCL I2C1_SDA
6 MCU_LCD_TE AUDIO_RESET# 4
IO/DIFFIO_L2n IO
45 LCD_DB13
7
SPIFI_MISO SPIFI_SCK
8
REF_EN 5
IO IO/DIFFIO_R2p
44 LCD_DB14
9 10 6 43 LCD_DB15

+3V3
SPIFI_MOSI GND VCCIO1 IO/DIFFIO_R2n
11 12 7 42 MCU_DIR
+3V3

VCC I2S0_RX_SCK GPS_RESET# IO/CLK0 IO/CLK3

13 14 8 41

+1V8

+1V8
I2S0_TX_SDA I2S0_RX_SDA I2S0_RX_MCLK VCCINT U3 VCCINT
I2S0_WS 15 16
I2S0_SCK SW_R 9 40 MCU_LCD_WR
I2S0_RX_WS I2S0_TX_SCK IO/CLK1 5M40ZE64 IO/CLK2
17 18 10 39

+1V8
I2S0_MCLK I2S0_TX_MCLK GND SW_D IO VCCIO2
MCU_ADDR 19
U0_RXD U0_TXD
20 MCU_IO_STBX SW_ROT_A 11
IO/DIFFIO_L3p IO
38
LCD_RESET#
B MCU_LCD_WR 21 22 MCU_DIR 12 37 B
P2_9 P2_13 SW_ROT_B IO/DIFFIO_L3n IO/DIFFIO_R3p LCD_BACKLIGHT
P2_8 23
P2_8 SDA
24
SDA SW_SEL 13
IO IO/DIFFIO_R3n
36
GPS_TX_READY
25 26 PP_CPLD_TMS 14 35

IO/DEV_CLRn/DIFFIO_B5n
CLK6 SCL SCL TMS IO/DIFFIO_R4p GPS_TIMEPULSE

IO/DEV_OE/DIFFIO_B5p
H1_CPLD_TDI 15 34 P2_8
TDI BANK1 IO/DIFFIO_R4n
HACKRF_ONE_P22 H1_CPLD_TCK 16 33 MCU_ADDR
TCK IO/DIFFIO_B7n

IO/DIFFIO_B1p
IO/DIFFIO_B1n
IO/DIFFIO_B2p
IO/DIFFIO_B2n
IO/DIFFIO_B3p

IO/DIFFIO_B3n

IO/DIFFIO_B4p
IO/DIFFIO_B4n

IO/DIFFIO_B6p
IO/DIFFIO_B6n
IO/DIFFIO_B7p
P28
1 2
+3V3

VCCIO1
VCC GND
3 4

GND
TDO
SD_CD SD_CD SD_DAT3 SD_DAT3

IO
5 6
SD_DAT2 SD_DAT2 SD_DAT1 SD_DAT1
SD_DAT0 7
SD_DAT0 SD_VOLT0
8 PP_CPLD_TMS

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

65
SD_CMD 9
SD_CMD SD_POW
10 PP_CPLD_TDO
11 12
SD_CLK SD_CLK GND
13 14
GCLK2 GCK1

PP_CPLD_TDO

MCU_IO_STBX
MCU_LCD_RD
15 16 +3V3

MCU_LCD_TE
B1AUX14 B1AUX13
H1_CPLD_TCK 17
CPLD_TCK BANK2F3M2
18
H1_CPLD_TDI 19 20

MCU_D7
MCU_D6
MCU_D4
MCU_D5
MCU_D3

MCU_D2

MCU_D0
MCU_D1
CPLD_TDI BANK2F3M6

RESET#
21 22
BANK2F3M12 BANK2F3M4
C I2S0_RX_SDA C
HACKRF_ONE_P28

SW_U

SW_L
+3V3

C28 C30 C32 C34 C42 C43

100N 100N 10U 10U 10U 10U

+1V8

License: GNU General Public License, version 2

C29 C31 C33 C35 C36 C37 Copyright © 2014-2018 Jared Boone
ShareBrained Technology, Inc.
100N 100N 100N 100N 10U 10U Sheet: /hackrf_if/
D File: hackrf_if.sch D

Title: PortaPack H1
Size: A4 Date: 2018-10-29 Rev: 20181029
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 4/6
1 2 3 4 5 6
 1 2 3 4 5 6

VBAT

DNP

DNP
TODO: Connect SYSOFF to a CPLD pin and to PGOOD#.

R3

R5
If VBUS is present, or CPLD is holding line low,

+
1
BT1 C41
device will stay on during battery operation.
A But how to turn it on with a button press?! A
...and not leave the button "jammed" once on DNP

2
-
(and SYSOFF is being held low). Need a bit of

DNP

DNP
logic to fuse two OC active low signals into one?

D1

D2
7

9
AUDIO_SVDD

CHG#
PGOOD#
10
OUT VIN
13 11
VBUS IN OUT
C16 +3V3 +1V8
U2
C1
1 5
VIN VOUT

DNP
DNP
R7

DNP
DNP >26V

R13

GND
8 3 4
VSS C38 EN BP C40
17 U6
PAD
DNP TCR2EF18,LM(CT

2
VBUSCTRL 10U C39 10U
6
R8 EN1
B 1 5 B
DNP TS EN2 DNP

J4 3 15
BAT SYSOFF
1 BBAT 2
BAT CE#
4

DNP
R14
DNP 2

ISET
TMR

ILIM
C15

DNP

DNP
R10
R9
14

12

16
DNP

VCC
+3V3
TODO:
DNP

DNP

DNP
R1

R4

R6
V(ISET) indicates charge current. Monitor w/ADC. LCD_VBL
R3,R5=100K, remove LEDs, if monitoring status w/GPIOs. GPS_VCC
ISET (fast charge current) R6=1K8 (500mA). AUDIO_AVDD
R4 is required, otherwise no charging. AUDIO_TVDD
ILIM (input limit) R4=1K8 (850mA). +1V8

+3V3
TMR=open for default timer values. AUDIO_DVDD
VCC
C C

FB2
C18
100N

DNP
C9

+3V3
4

X1
DNP
R15

U7
VCC

74HC1G04GW
C17

DNP

R22
1 3 2 4
REF_EN EN OUT DNP REF_CLK
DNP
GND
DNP
R16

R17
10.00000M License: GNU General Public License, version 2
DNP
2

Copyright © 2014-2018 Jared Boone

R21 ShareBrained Technology, Inc.
100R Sheet: /power/
D Clock Reference File: power.sch D

Default is HCMOS output oscillator with tri-state output. Title: PortaPack H1

Alternative is clipped-sine, running through CMOS squarer.
Size: A4 Date: 2018-10-29 Rev: 20181029
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 5/6
1 2 3 4 5 6
 1 2 3 4 5 6

A A

R23 R24
VCC 0R 0R V_BACKUP
DNP DNP

U8
MAX-M8
P1 DNP
DNP 10 9
GND RESET_N RESET#
1 11 8
RF_IN VCC
12 7

100K
GND VCC_IO R25

27N
2

DNP
13 6

L1
R26 LNA_EN V_BCKP DNP
14 5 TP8
FB1 10R VCC_RF EXTINT
15 4
DNP DNP V_ANT TIMEPULSE TIMEPULSE
GND 16 3
SDA SDA RXD TP9
17 2 GND
SCL TXD/READY TX_READY
18 1
FB3 TP7 SAFEBOOT_N GND
B B

DNP
DNP C20

C19
10N
SCL 100N
GND GND DNP

GND GND

C C

License: GNU General Public License, version 2

Copyright © 2014-2018 Jared Boone
ShareBrained Technology, Inc.
Sheet: /gps/
D File: gps.sch D

Title: PortaPack H1
Size: A4 Date: 2018-10-29 Rev: 20181029
KiCad E.D.A. kicad 5.0.2-bee76a070ubuntu18.04.1 Id: 6/6
1 2 3 4 5 6