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AC-to-DC Converters
The single-phase full converter has four SCRs connected in the form of bridge as shown in Fig. (1). This circuit
is also known as:
𝑣𝑠 = 𝑉𝑝 sin(𝜔𝑡) (1)
Where 𝑉𝑝 and are the supply peak voltage and radian frequency respectively.
Thyristors T1 and T2 (Fig.1) are triggered at the same instant at (𝜔𝑡 = f ). SCRs T3 and T4 triggered at
t=f+. The load voltage and current are denoted by 𝑣𝑜 𝑎𝑛𝑑𝑖𝑜 respectively. Other assumptions made in the
following analysis include:
Vs vo
f+ f
T4 T2
- The angle at which thyristors T1 and T2 are triggered by applying the gate pulse is known as the
triggering or firing angle and denoted by f
- This angle is synchronized with the input AC voltage and measured on t axis.
- Thyristors T3 and T4 are triggered at angle (𝛼𝑓 + 𝜋), that is 180° after triggering T1 and T2. , the
difference of π between the two firing angles is important to ensure symmetry at DC side and AC side
as follows:
o At DC side: To make sure that the output voltage for the interval 𝜋 < 𝜔𝑡 < 2𝜋 is identical to
that of interval 0 < 𝜔𝑡 < 𝜋.
o At AC side: To make sure that AC supply current is is half wave symmetrical to eliminate the DC
component in AC supply current.
- When f=0 the SCR act as a diode.
- The SCR can be triggered as long as 𝑣𝑠 positive and therefore (0 < 𝛼𝑓 < 𝜋)
When T1 and T2 are ON; the equivalent circuit is shown in Fig. 2-a. When T3 and T4 are ON, the equivalent
circuit is shown in Fig. 2-b. If the load current reduces to zero, the SCRs will turn-OFF and the equivalent circuit
in this case is shown in Fig. 2-c. The three states are summarized in Table-1.
f
T1 T3
Vs vo
f
T4 T2
f +
T1 T3
Vs vo
f +
T4 T2
T1 T3
Vs vo
T4 T2
In this section we will consider a highly inductive load. High inductance reduces the current ripple. We will
assume the idealized case of pure DC load current; therefore the load is drawn as a DC current source as
shown in Fig. 3. The analysis of this circuit includes:
f f +
is T1 T3
vo
Vs Io
f + f
T4 T2
The continuous load current assures that at any time there are two SCRs ON to carry load current. The
conducting SCR are as follows:
T1 and T2 conduct for 𝛼𝑓 < 𝜔𝑡 < 𝛼𝑓 + 𝜋: the supply is directly connected to the load makes 𝑣𝑜 = 𝑣𝑠 and 𝑖𝑠 =
𝐼𝑜 (equivalent to State 1 of the generic converter)
T3 and T4 conduct for 𝛼𝑓 + 𝜋 < 𝜔𝑡 < 𝛼𝑓 + 2𝜋: the supply is cross connected to the load makes 𝑣𝑜 =
−𝑣𝑠 and 𝑖𝑠 = −𝐼𝑜 . (equivalent to State 2 of the generic converter )
From that the waveforms of the load voltage and input current can be drawn as show in Fig. 4.
𝛼𝑓 +𝜋
1
𝑉𝑜,𝑑𝑐 = ∫ 𝑉𝑝 𝑠𝑖𝑚(𝜔𝑡)𝑑𝜔𝑡
𝜋
𝛼𝑓
𝟐
𝑽𝒐,𝒅𝒄 = 𝝅 𝑽𝒑 𝒄𝒐𝒔𝛼𝑓 …(2)
Vp
t
0 + 2 2+
igT1, igT2
igT3, igT4
T3,T4 T1, T2 T3,T4 T1,T2
T3
T1 T3
Vs
Io
Vs vo
T4 T2 T4
is
vo vs ; vo vs ;
is I o is I o
vo
Vp
Vo,av
0 + 2 2+
Io
is,1
is
f1
Notice that the average voltage becomes negative for f>/2 (Fig. 5). The reason is that the negative region is
greater than the positive region under the voltage curve. In this case the average load power becomes
negative and this means that the power is being transferred from the load (the DC side) to the supply (the AC
side). Therefore, converter is said to be operating in inverting mode in contrast to the rectification mode for
positive 𝑉𝑜,𝑑𝑐 as indicated in Fig. 5.
The inversion mode is possible only if the load has the capacity to produce power (Example: DC machine in
generation mode). For passive load (R / RL) the converter can only operate in rectification region.
Vo,av/Vo,av(max)
1
Rectification mode
Constant current
load
0
/2
Inversion mode
-1
Fig. 5
The output voltage RMS expression is similar to that of the sine wave as the squares of the two voltages are
identical:
𝟏
𝑽𝒐 = 𝑽𝒑 (independent of f)
√𝟐
𝑉𝑜,𝑎𝑐
𝑅𝐹𝑣𝑜 =
𝑉𝑜,𝑑𝑐
Power Electronics EEP303/Chapter 3 (6/Nov/2018) Page 6
2 2
𝑉𝑜,𝑎𝑐 = √𝑉𝑜,𝑟𝑚𝑠 − 𝑉𝑜,𝑑𝑐
1 4
𝑉𝑜,𝑎𝑐 = 𝑉𝑝 √ − 2 𝑐𝑜𝑠 2 𝛼
2 𝜋
𝝅𝟐
𝑹𝑭 = √𝟖𝒄𝒐𝒔𝟐 𝜶 − 𝟏 …(3)
The variation of the ripple factor with f is shown in Fig. 6. The ripple factor increases dramatically for
around /2. And the minimum RF is for f=0, (𝑅𝐹(𝛼𝑓 = 0) = 0.483).
3.5
3
Ripple Factor (p.u.)
2.5
1.5
0.5
0
0 0.5 1 1.5 2 2.5 3
Firing angle (alpha (Rad)
Fig. 6
Without much mathematical analysis, the supply power factor is determined using is waveform drawn Fig. 4
and the definition of the power factor for sinusoidal supply having non-sinusoidal current given earlier as:
𝐼𝑠,1
𝑃𝐹 = 𝑐𝑜𝑠∅1 .
𝐼𝑠
From Fig, 4
∅1 = 𝛼𝑓
𝐼𝑠,1 4
And we can show that for the square-wave is, = √2𝜋 ≈ 0.9 (left for student to verify as a practice)
𝐼𝑠
Therefore:
𝑷𝑭 = 𝟎. 𝟗𝒄𝒐𝒔𝜶𝒇
The converter circuit with R load is shown in Fig. 7. The following discussion focuses on the differences
between the R load and the constant load current cases.
As the instantaneous voltage reaches a negative the range at 𝜔𝑡 > 𝜋, the resistive load current also tends to
follow the voltage to negative. But as the current reaches zero1, SCRs (T1 and T2) turn-off. This leaves the
converter with all four switches at off state until the next triggering action at 𝜔𝑡 = 𝛼𝑓 + 𝜋. In other words, for
( 𝜋 < 𝜔𝑡 < 𝛼𝑓 + 𝜋), converter will be with four blocking switches or in state 0 shown in Fig. 2 c.
f f+
T1 T3
Vs R
f+ f
T4 T2
Fig. 8 shows the waveforms of the voltages and currents for R load. Obviously the analysis and performance
indicators calculations determined earlier for constant current load are not applicable for R load. Therefore we
need to re-calculate it:
𝜋
1 𝑉𝑝
𝑉𝑜,𝑑𝑐 = ∫ 𝑉𝑝 𝑠𝑖𝑛𝜔𝑡𝑑𝜔𝑡 = (1 + 𝑐𝑜𝑠𝛼𝑓 )
𝜋 𝜋
𝛼𝑓
The variation of 𝑉𝑜,𝑑𝑐 with f is shown in Fig. 9. This fig. shows that the converter with R load does not go
operate in inversion mode.
It is left for the student as practice to determine the following parameters for R-load case:
1
Recall that the SCR turns off as its forward current goes bellow the holding current (I H). The holding current is very small compared
to the load current; therefore in this discussion and almost all future discussions we will approximate IH to zero.
Power Electronics EEP303/Chapter 3 (6/Nov/2018) Page 8
vs
Vp
t
0 + 2 2+
igT1, igT2
igT3, igT4
T3,T4 - T1, T2 - T3,T4 - T1,T2 -
Vp
Vo,av
0 + 2 2+
io
Io,av
is
Fig. 8
Vo,av/Vo,av(max)
1
Rectification mode
Resistive load
Constant current
load
0
/2
Inversion mode
-1
Fig. 9