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Schematic Tutorial in Cadence


1. Starting Cadence
1. Once the setup is complete, type source .446 at your prompt. Then use the command
icfb& to start Cadence.

You will see the line “Loading NCSU SKILL routines “in your command interpreter
window (CIW).

2. Go to Tools in CIW and click on Library Manager.

Written by Vinod Mukundagiri email:vlm014200@utdallas.edu


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2. Creating a Library
1. Go to File in Library Manager -> New -> Library.
2. Enter the name of your library. Then chose “Attach to existing tech library” and then
select the option TSMC 0.4u CMOS035 (4M, 2P, HV FET). Then click OK.

3. Making a Schematic
1. Click on the library you created and go to File and choose Cell View.

2. Type in your cell view name and click OK.

Written by Vinod Mukundagiri email:vlm014200@utdallas.edu


Check & Save

Save

Zoom in by 2

Zoom out by 2

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Stretch
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Copy

Delete

Undo

Property

Component

Wire (narrow)

Wire (wide)

Wire name

Pin

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3. In the Composer-Schematic Editing Window, click on the Component button to open


the Add Instance window. As you open this, in the Component Browser select the
desired device.

Written by Vinod Mukundagiri email:vlm014200@utdallas.edu


The University of Texas at Dallas

4. Once you select this, in the Add Instance window, you can modify the parameters of
your device.
5. Further devices can be added by clicking on Browse and choosing the desired
components.
6. For the design of the inverter, we will be using the following components: nmos4,
pmos4, vdd, gnd, vdc, vpulse.
7. Once placed in the schematic window, connect the devices using the Wire (narrow)
button in the Schematic window. You can move the devices by clicking “m” and clicking
on the device to move it.
8. Pressing “ESC” will quit the current operation and you can click on Property to
change the parameters of the selected component.

Written by Vinod Mukundagiri email:vlm014200@utdallas.edu


The University of Texas at Dallas

9. Click on Check and Save button to save the schematic. Now you have finished your
schematic and ready to run a simulation.

Written by Vinod Mukundagiri email:vlm014200@utdallas.edu

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