Modeling of a SEPIC Converter Operating in

Continuous Conduction Mode

Vuthchhay Eng, Unnat Pinsopon, and Chanin Bunlaksananusorn
Faculty of Engineering, King Mongkut’s Institute of Technology Ladkrabang (KMITL),
Chalongkrung Rd. Ladkrabang, Bangkok 10520
vouthchhay_oeung@yahoo.com and kbchanin@kmitl.ac.th
Abstract - A SEPIC (Single-Ended Primary Inductor Converter) substitution of the power switch and diode of the converter by
DC-DC converter is capable of operating in either step-up or step- the so called small-signal PWM switch model [1, 2] and small-
down mode and widely used in battery-operated equipment. There signal averaged switch model [3, 4]. This paper presents an
are two possible modes of operation in the SEPIC converter:
Continuous Conduction Mode (CCM) and Discontinuous alternative modeling method for a SEPIC converter, using the
Conduction Mode (DCM). This paper presents modeling of a State-Space Averaging (SSA) technique [4, 5]. Unlike the PWM
SEPIC converter operating in CCM using the State-Space and averaged switch model methods which are based on
Averaging (SSA) technique. The modeling leads to a small-signal equivalent circuit manipulation, the SSA technique is performed
linear model of the converter, from which the transfer functions via matrix; hence, formal matrix treatment can be applied to
used for feedback control design can be determined. Results are facilitate the modeling process.
presented to verify the accuracy of the obtained model.
II. OVERVIEW OF SSA TECHNIQUE
I. INTRODUCTION
For DC-DC converters operating in Continuous Conduction
Nowadays, the use of a DC-DC converter is widespread in Mode (CCM), there exist two circuit states within one switching
modern portable electronic equipment and systems. In battery- period, T. One is when the MOSFET is turned on for an interval
operated portable devices, when not connected to the AC mains, dT, and another is when the MOSFET is turned off for an
the battery provides an input voltage to the converter, which interval (1-d)T, where d is a duty cycle. The state-space
then converts it into the output voltage suitable for use by the equations for these two circuit states are represented by:
electronic load. The battery voltage can vary over a wide range,
depending on a charge level. At the low charge level, it may
drop below the load voltage. Hence, to continue supplying the
{ dx / dt = A1x + B1u
y = C1x + E1u (1)

constant load voltage over the entire battery voltage range, the
converter must be able to work in both buck and boost modes.
The DC-DC converters that meet this operational requirement
{ dx / dt = A2 x + B2 u
y = C2 x + E2 u
(2)
To find the averaged behavior of the converter over one
are Buck-boost, Cuk, and SEPIC converters. However, the switching period, (1) and (2) are weighed average by the duty
Buck-boost and Cuk converters, in their basic form, produce the cycle:

{
output voltage, whose polarity is reversed from the input voltage. d x / dt = As x + Bs u
The problem can be corrected by incorporating an isolation (3)
transformer into the circuits, but this will inevitably lead to the y = Cs x + Es u
increased size and cost of the converters. On the other hands, the where As = A1 d + A2 (1 − d ) , Bs = B1 d + B 2 (1 − d ) ,
SEPIC (Single-Ended Primary Inductor Converter) converter is Cs = C1 d + C2 (1 − d ) , and Es = E1 d + E2 (1 − d ) .
capable of operating in both step-up and step-down modes and Equation (3) is a nonlinear continuous-time equation. It can be
does not suffer from the polarity reversal problem. It is therefore linearized by small-signal perturbation with x = X + x̃, y = Y + ỹ,
attractive for the aforementioned application. u = U + ũ, and d = D + d̃, where the  symbol represents a small-
The SEPIC converter consists of an active power switch, a signal value and the capital letter a DC value. It should be noted
diode, two inductors, and two capacitors and is thus a fourth- that X >> x̃, Y >> ỹ, U >> ũ, and D >> d̃. The perturbation
order nonlinear system. Feedback control is usually incorporated yields the steady-state and linear small-signal state-space
into the converter’s circuit to regulate its output voltage, equations in (4) and (5) respectively.
typically by means of Pulse Width Modulation (PWM). To
facilitate the feedback controller design or system stability { dX / dt = AX + BU = 0
Y = CX + EU
(4)

{
analysis, the linear model of the converter is needed. Recently,
modeling of the SEPIC converter has been carried out by some  + B d d
dx / dt = Ax + Bu
(5)
researchers. The linear converter models were found by y = Cx + Eu + Ed d

978-1-4244-3388-9/09/$25.00 ©2009 IEEE

where A = A1 D + A2 (1− D ), B = B1 D + B2 (1− D ), C = C1 D + C 2 (1− D ) discharging phase; L1 and L2 release the stored energy to the
E = E1 D + E2 (1− D ), B d = (A1 − A2 )X + (B1 − B2 ) U , capacitors and load respectively. Thus, iL1 and iL2 decrease
and Bd = (A1 − A2 )X + (B1 − B2 ) U. linearly as shown in Fig. 2.
The steady-state solution of the converter can be found by The output voltage, VO, is a DC voltage that contains small
solving (4), which gives: ripple due to the switching action. For ideal SEPIC converter,

{ the relationship between VO and Vg is given by:

−1
X = − A BU
−1 (6) M =VO /Vg = D /(1− D) (10)
Y = ( − CA B + E )U
where M is a voltage conversion ratio. It can be seen that VO
The small-signal transfer function of the converter can be found
by applying Laplace transform to (5). In a matrix form, we get: could be larger or smaller than Vg, depending on the duty cycle.
From Fig. 2, the averaged inductor currents, IL1 and IL2, must be
⎧x (s ) = [( sI − A ) −1 B ( sI − A ) −1 B d ][u ( s ) d( s )]
T

(7) greater than one-half of their ripple components, ΔiL1 and ΔiL2,
⎨
⎩y (s ) = [C( sΙ − A ) B + E C( sI − A ) B d + E d ][u ( s ) d( s )]
−1 −1 T for the circuit to remain in CCM. It can be shown that for CCM
operation L1 and L2 must satisfy the following conditions:
In the DC-DC converters, the input variable u usually contains
⎧ (1− D)2 R 1 1 RE MrC1 rL 2
the input voltage and load current. Hence, u is express as u = [u1 ⎪L1 > 2 Df ( r + + + )
u2]T, the matrix B as B = [Bu1 Bu2], and the matrix E as E = [Eu1 1− D R R R
⎪⎪ C2
+1
Eu2]. Therefore, (7) becomes: ⎨ R (11)
⎧⎪x(s) = ⎡⎣(sI − A) Bu1 (sI − A) Bu2 (sI − A) Bd⎤⎦[u1(s) u2(s) d(s)]
−1 −1 −1 T ⎪L2 > (1− D) R ( 1 + 1 rL 2 + RE + MrC1 − M rC1 + rL 2 )
⎪ 2f rC 2 1− D R R R
⎨ T (8) +1
⎪⎩y(s) = ⎣⎡C(sI − A) Bu1 + Eu1 C(sI − A) Bu2 + Eu2 C(sI − A) Bd + Ed⎤⎦[u1(s) u2(s) d(s)]
−1 −1 −1
⎪⎩ R
For the fourth-order converter, (sI–A)–1Bu1, (sI–A)–1Bu2, and where RE = rC 2 R /(rC 2 + R ) .
(sI–A)–1Bd are the matrices that have four rows and one column.
So, (8) can be expanded into: A. State-Space Description of SEPIC Converter
The state-space equations of the SEPIC converter for the on
⎧ ⎡G vi ( s ) G zi ( s ) G di ( s ) ⎤
1 1 1 and off states of the switch can be written from Figs. 1(b) and (c)
⎪⎪x ( s ) = ⎢G vi ( s ) G zi ( s ) G di ( s ) ⎥[u ( s ) u ( s ) d( s )]T
2 2 2
respectively, which are given by:
⎨ ⎢G vv ( s ) G zv ( s ) G dv ( s ) ⎥ 1 2
(9) diL1 −iL1
=
Ri v R v R I
[r + (1− δ )(rC1 + RE )] − (1− δ )( E L 2 + C1 + E C 2 − E Z ) +
Vg

⎢⎣G vv ( s ) G zv ( s ) G dv ( s )⎥⎦ dt L1 L1 L1 L1 rC 2 L1 L1 L1
1 1 1

⎪ 2 2 2
diL 2 I i v i v
= (1−δ )( Z − L1 − C 2 ) RE − L 2 [rC1δ + rL 2 + (1−δ ) RE ] + C1 δ
⎪⎩y ( s ) = [G vv ( s ) G zv ( s ) G dv ( s )][u1 ( s ) u2 ( s ) d( s )]T dt
dvC1 iL1
L2 L2 rC 2 L2
i
L2 L2
(12)
= (1− δ ) − L 2 δ
where dt C1 C1
−1 −1 −1 dvC 2 1− δ RE R
G vi ( s ) = [( sI − A ) Bu1 ]11 , Gzi ( s ) = [( sI − A ) Bu2 ]11 , Gdi ( s ) = [( sI − A ) Bd ]11 , = (i + i ) R − v − E I
1
−1
1
−1
1
−1 dt C2 rC 2 L1 L 2 E C2 rC 2 R C 2 C2 rC 2 Z
G vi ( s ) = [( sI − A ) Bu1 ]21 , Gzi ( s ) = [( sI − A ) Bu2 ]21 , Gdi ( s ) = [( sI − A ) Bd ]21 , R
2
−1
2
−1
2
−1 vO = (1− δ )(iL1 + iL 2 ) RE. + E vC 2 − RE I Z
G vv ( s ) = [( sI − A ) Bu1 ]31 , Gzv ( s ) = [( sI − A ) Bu2 ]31 , Gdv ( s ) = [( sI − A ) Bd ]31 , rC 2
1 1 1
−1 −1 −1
G vv ( s ) = [( sI − A ) Bu1 ]41 , Gzv ( s ) = [( sI − A ) Bu2 ]41 , Gdv ( s ) = [( sI − A ) Bd ]41 , C1 rC1 iC1
2
−1
2
−1
2 iL1 L1 D
G vv ( s ) = C( sI − A ) Bu1 + Eu1 , Gzv ( s ) = C( sI − A ) Bu2 + Eu2 , and _ iC 2
+ rL 2
−1
.
+
Gdv ( s ) = C( sI − A ) Bd + Ed
Vg Q C2 V R
L2 O
III. MODELING OF SEPIC CONVERTER BY SSA TECHNIQUE rC 2
iL 2
A SEPIC converter is shown in Fig. 1(a). It is comprised of (a). SEPIC converter.
the MOSFET switch (Q), diode (D), two capacitors (C1 and C2), iL1 L1 rL1 C1 rC1 iC1
and two inductors (L1 and L2). The resistor, R, represents a _ iC 2
+ rL 2
+

standing load, and the current source, IZ, models the load current. C2 V R
The resistors, rC1, rC2, rL1, and rL2, are equivalent series Vg L2 O
rC 2
resistances (ESRs) of the capacitors and inductors respectively. iL 2
Their values are usually very small compared to R. In the ideal (b) SEPIC converter during the first state d1T.
converter, these ESRs are zero. In CCM, the converter exhibits iL1 L1 rL1 C1 rC1 iC1
two circuit states. The first state is when Q is turned on (Fig. _ iC 2
+ rL 2
+

1(b)). During this interval (dT), L1 is charged by the source, Vg, C2 V R

and L2 by the capacitor C1. Hence iL1 and iL2 increase linearly as Vg L2 O
rC 2
shown in Fig. 2. The second state is when Q is turned off (Fig. iL 2
1(c)). During this interval ((1-d)T), L1 and L2 are in a (c) SEPIC converter during the second state d2T.
Fig. 1. Operation of the SEPIC converter in CCM.
 ⎡ rL1 + (rC1 + RE )(D −1) D −1 ⎤
R D −1 D −1 RE ⎥
iL1 iL 2
I L1 IL2 ⎢
I L1,max I L 2,max L1 L1 E L1 L1rC 2
ΔiL1 I L 2,min ΔiL 2 ⎢
⎡iL1 ⎤ (D −1)RE r + DrC1 + RE (1− D) D D −1 ⎥⎥ ⎡iL1 ⎤
I L1,min ⎢ − L2 R
⎢  ⎥
d ⎢iL2 ⎥ = ⎢ L2 L2 L2 L2rC 2 E ⎥ ⎢⎢iL2 ⎥⎥ +
0 dT (1− d )T T t t dt ⎢vC1 ⎥ ⎢1− D −D ⎥ ⎢vC1 ⎥
2T 0 dT (1− d )T T 2T
⎢ 0 0 ⎥ ⎢v ⎥
(a) iL1 waveform. (b) iL2 waveform. ⎣⎢vC 2⎦⎥ ⎢ C1 C1
⎥ ⎣ C 2⎦
⎢ 1 − D RE 1 − D RE 0 − 1 ⎥
Fig. 2. Current waveforms. ⎢⎣ C2rC2 C2rC 2 C2 (rC 2 + R) ⎥⎦
Note that the equations are expressed in a compact form using ⎡ R 2 ⎤
⎢ 1 1− D R Vg[RE (MrC1 + rL2 + 1− D ) − MR ] − MrL1RRE IZ ⎥
the switching function, δ. When the switch is on, δ =1, (12) will ⎢ L1 L1 E
η (1− D)rC 2 R L1 3 ⎥
become the on-state equation. When the switch is off, δ =0, (12) ⎢ R ) − MR2 ] − (r + Mr )I RR ⎥⎥ 
⎢ V [ R (r + ⎡vg ⎤ (20)
will become the off-state equation. ⎢0 1− D RE 1− D
g E L2 C1 L1 Z E
⎥ ⎢ ⎥
The averaged matrices for the steady-state and the linear ⎢ L2 η (1− D)rC 2 R3L2 ⎥ ⎢iZ ⎥
⎢ −RE[MVg + RIZ ] ⎥ ⎢⎣d ⎥⎦
small-signal state-space equations can be written according to (4) ⎢0 0 ⎥
⎢ η (1− D)rC 2C1R 3
⎥
and (5). − MV − RI
⎢ −RE g Z ⎥
⎡[rL1 + (rC1 + RE )(D −1)]/ L1 (D −1)RE / L1 (D −1)/L1 (D −1)RE /(Lr 0
1 C 2)⎤ ⎢ C2rC 2 η (1− D)RC2 ⎥
⎢(D −1)R / L [Dr + R (1− D) − r ]/ L D / L (D −1)R /(L r ) ⎥ ⎣ ⎦
A=⎢ E 2 C1 E L2 2 2 E 2 C2
⎥ (13) ⎡iL1 ⎤ ⎡v ⎤
⎢(1− D)/C1 − D/C1 0 0 ⎥ ⎡ R ⎤ ⎢ ⎥ ⎡ −MVg − RIZ ⎤ ⎢g ⎥
⎢⎣(1− D)RE /(C2rC2) (1− D)RE /(C2rC 2) 0 −1/[C2(rC2 + R)] ⎥⎦ vO = ⎢(1− D)RE (1− D)RE 0 E ⎥ ⎢iL2 ⎥ + ⎢0 − RE rC 2⎥ ⎢iZ ⎥
⎣ rC 2 ⎦⎢vC1 ⎥ ⎣ η (1− D)R ⎦ ⎢d ⎥
⎡1/ L1 (1− D)RE / L1 ⎤ ⎢⎣vC 2 ⎥⎦ ⎣ ⎦
⎢ 0 (1− D)RE /L2 ⎥
B=⎢ ⎥ D. Finding Transfer Functions
⎢ 0 0 ⎥ (14)
⎣⎢ 0 − RE /(C2rC 2)⎦⎥ Referring to (9), fifteen transfer functions can be determined
C = ⎣⎡(1− D) RE (1− D) RE 0 RE / rC 2 ⎦⎤ from (20). However, only a few of them are useful for feedback
(15)
E = ⎡⎣ 0 − RE ⎤⎦ control design. These transfer functions are:
(16)
The duty ratio-to-output voltage transfer function
⎡Vg[RE[MrC1 + rL2 + R /(1− D)]− MR2]− MrL1RRE IZ ⎤
⎢ ⎥ Gdv(s) = vO (s)/ d(s) = C(sI − A)−1Bd +Ed
⎢ η (1− D)rC 2R3L1 ⎥ = KD (advs4 + bdvs3 + cdvs2 + ddv s + edv )/ Δ (21)
⎢Vg[RE[rL2 + R /(1− D)]− MR2]− (rC1 + MrL1)RRE IZ ⎥
Bd = ⎢ ⎥
(17) where KD =1/ RT D'+ R(n − M )D'2 . .
⎢ η (1− D)rC 2R3L2 ⎥ The input voltage-to-output voltage transfer function
⎢ − RE (MVg + RIZ )/[(1− D)η rC 2C1R3] ⎥
⎢ ⎥ G vv (s) = vO (s)/ vg (s) = C(sI − A)−1Bu1 +Eu1
⎣ − (MV + RI )/[(1− D)η RC ] ⎦ (22)
= RD'(avv s3 + bvvs2 + cvv s + dvv )/ Δ
g Z 2

Ed = −rC 2 ( MVg + RIZ )/[η R(1− D)] (18) The output impedance transfer function
B. Steady-State Equations G zv(s) = vO (s)/iZ (s) = C(sI − A)−1Bu2 +Eu2
Given the averaged matrices in (13) to (18), the steady-state = R(azvs4 + bzvs3 + czvs2 + dzvs + ezv )/ Δ (23)
solution of converter is obtained from (6): where Δ = as4 + bs3 + cs2 + ds + e
⎧ ⎡rC 2M /(RE R) (rC 2/)RE ⎤ The coefficients in (21) to (23) are listed in TABLE I.
⎪⎡I L1 ⎤ ⎢ ⎥
⎢
⎪ I L2 ⎥ ⎢ rC 2 /( R E R) ( rC 2 /MR E ) ⎥ IV. RESULTS
⎢ ⎥ M
= ⎢ rC 2
⎪ 1 rL2 + R ) −1 (rL2 − MrL1)rC 2 ⎥
⎢V
⎨ C1 ⎥ η (r
⎢ R R C1 M 1− D+ ⎥ (19) To validate the accuracy of the SEPIC converter model, Gdv(s)
⎢ ⎥ MRE
⎪V ⎢ E
⎥ in (21) is plotted and compared with the results from the other
⎢
⎣ C2⎦⎥
⎪ ⎣⎢rC 2 / RE − (rC1 + MrL1 + rL2 / M )rC 2 / RE − rC 2 /(1− D)⎦⎥ two methods, PWM switch model [1, 2] and averaged switch
⎪
⎩VO = [Vg +[rL2rC 2R /[MRE (1− D)]− RE − rC1 − rL1M ]IZ ]MrC 2 /(η RE ) model [3, 4]. They are shown in Fig. 3(a) to Fig. 3(c)
respectively. The following circuit parameters are used to create
where RE = rC 2 R /(rC 2 + R), LT = L1 + L2 , RT = R + rC 2 , M = D /(1− D) = D / D'
these plots: L1 = 100μH, rL1 = 1mΩ, L2 = 100μH, rL2 = 1mΩ, C1
, η =1+ n + r /[(1− D) R], and n = (1+ r / R)(r / R + Mr / R + M 2 r / R).
C2 C2 L2 C1 L1
= 680μF, rC1 = 3mΩ, C2 = 2200μF, rC2 = 1mΩ, Vg = 10V, VO =
Note that if rC1, rC2, rL1, and rL2 are assumed to be zero, the 15V, IZ = 0, and R = 1Ω. The plotted Gdv(s) in Fig 3(a) has four
equation (19) will be reduced to M=VO/Vg=D/(1-D), the same as complex poles at p1,2 = (–0.0158±2.7771i)x103 and p3,4 = (–
the expression for the ideal SEPIC converter in (10). 0.2403±1.1578i)x103; and two real zeros at z1 = –4.5455x105, z2
= 0.0510x105 and two complex zeros at z3,4 =
C. Linear Small-Signal State-Space Equations
(0.0010±0.0277i)x105. It can be seen from Fig. 3(a) to Fig. 3(c)
Given the averaged matrices (13) to (18), the linear small-
that Gdv(s) derived by the SSA technique is exactly the same as
signal state-space equations of the SEPIC converter can be
the other two methods, validating the accuracy of the model
formulated in accordance with (5):
derived by the SSA technique.
 TABLE I [3] A. Hren and P. Slibar, "Full Order Dynamic Model of SEPIC Converter,"
COEFFICIENTS OF Gdv(s), Gzv(s), AND Gvv(s). Proc. of the IEEE International Symposium on Industrial Electronics, pp.
553-558, June 2005.
adv =−rC 2 L1C1 L2C2 RT 2 ( DVg + RD'IZ ), [4] R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics,
bdv =[ D'2 rC 2 LT C2 RT − DL2 (rL1rC 2C2 + L1 ) − rC 2C2 DL1 ( DrC1 + rL 2 )]RT2CV 2nd ed., Kluwer Academic Publishers, 2001.
1 g
[5] R. D. Middlebook and S. Cuk, "A General Unified Approach to Modeling
− D'C1 RRT IZ [rC 2C2 LT [ RT ( DrL1 + rC1 ) + rC 2 RD ']
Switching-Converter Power Stages," International Journal of Electronics,
+ RT [ L1 (rC 2 rL 2C2 + L2 ) + rC 2 L2C2 (rL1 − DrC1 )]],
vol. 42, pp. 521-550, June 1977.
cdv = RT2Vg [ D '2 [C1 (rL 2 + R)[C2 ( rL 2 rC 2 + rC 2 rC 1 + rL1rC 2 ) + LT ]
− D2 rC 2C2 L1 ]− C1D ( DrC1 + rL 2 )( L1 + rL1rC 2C2 ) + DL2 rL1 ] −
D 'RT2 RIZ [C1[ D 'rC1 + (1+ D )rL1 ][rC 2C2 (rL 2 + rC1 ) + L2 ]+ L1C1 (rL 2 + rC1 ) +

Magnitude (dB)
DL1 (rL1C1 + rC 2C2 ) + DrL21rC 2C1C2 + D 'C1 RE [ LT + (rL 2 + rC 1 + rL1 )C2 rC 2 ]],
ddv = − D 'RRT I Z [ RT [ D( L1 − rC1rL 2C1 + 2rC 2 rL1C2 ) + C1rL 2 (rL1 + rC1 )]
+ (rC 2 RD'+ rL1 RT D)( rL1 + rL 2 )C1 + (rC1 RT + rC 2 R )(rC1C1 + rC 2C2 ) D ']
+ RT2Vg [ D '2 [C1 R( rL1 + rL 2 ) + rL 2C1 ( rL 2 − rL1 ) + ( rC1C1 + C2 rC 2 )( R + rL 2 )]
− rL1 D2 (rC1C1 + rC 2C2 ) − L1 D2 − DrL 2 rL1C1 ],

Phase (deg)
edv =Vg RT2 [ D'2 ( R + rL 2 ) − D2rL1 ]− D'RT RIZ [2DRT rL1 + D'(rC1RT + rC 2 R)].
avv = rC 2 L2C1C2 RT , bvv = C1 RT [rC 2C2 ( DrC1 + rL 2 ) + L2 ], dvv = DRT ,
cvv = RT [( rC1C1 + rC 2C2 ) D + rL 2C1 ].
azv = − rC 2 L1C1L2C2 RT , ezv =−RT ( D2rL1 − D'2 rL 2 ) − DD'(rC1RT + rC 2 R),
bzv = C1 L1 L2 − rC 2C1C2 [rC 2 RLT DD'+ RT ( L2 rL1 + L1rL 2 + rC1 L1 D + rC1 L2 D')], Frequency (Hz)
czv =−rC 2C1 RDD '[ LT + C2 (rL1rC 2 + rC1rC 2 + rL 2 )]− RT [rC1C1 ( L1D + L2 D ') + (a)
rC 2C2 ( L1 D2 + L2 D '2 )]− C1 RT [rC 2C2 ( DrC1 + rL 2 )(rL1 + rC1D ') + rL1 L2 + rL 2 L1 ],

Magnitude (dB)
dzv =−(C1rC1rC 2 + C1rC 2 rL 2 + C2 rC22 ) RDD '− RT [( D 'rC1 + rL1 )( DrC1 + rL 2 )C1
+ L1D2 + L2 D '2 ] − (rL1C1RD + rC1C2 DD'+ rL1C2 D2 + rL 2C2 D '2 )rC 2 RT .
1 1 L2C2 RT ,
a = LC 2
e = RT (D2rL1 + D'2 rL 2 + DD'rC1 ) + (D'R + rC 2 )D'R,
b =C1RT [C2 RT [L2rL1 + L1 (rL2 + DrC1 )]+C2 D'(rC1L2 RT + rC 2 LT R)+ L1L2 ],
c = C1 RT [ D'rC 2C2 R(rL1 + rL 2 + rC1 ) + rC1D'L2 + L1 ( DrC1 + rL 2 ) + rL1 L2 ]+
RT2C2 [C1 ( DrC1 + rL 2 )(rL1 + rC1 D') + D '2 L2 + L1 D2 ]+ ( RD'+ rC 2 ) D 'RC1 LT ,
Phase (deg)

d = RT [C1 ( DrC1 + rL 2 )(rL1 + rC1 D') + rC 2C2 RD'+ L1 D2 + L2 D'2 ]

+( rL1 D2 + rL 2 D'2 + rC1 DD') RT2C2 + ( RD'+ rC 2 )( rL1 + rL 2 + rC1 ) RC1 D'.

V. CONCLUSION
Frequency (Hz)
In this paper, modeling of a SEPIC converter in CCM has (b)
been performed with the State-Space Averaging (SSA)
technique. The results yield an insight into the steady-state and
Magnitude (dB)

small-signal dynamic properties of the converter, as given in (19)

and (20) respectively. To provide a basis for feedback control
design, three relevant transfer functions (Gdv(s), Gvv(s), and
Gzv(s)) were derived. The derived transfer function, Gdv(s), was
verified to be accurate as shown in Fig. 3, where the frequency
responses of the derived Gdv(s) were seen to be identical to the
Phase (deg)

AC simulation results by PSPICE of the SEPIC converter

employing the PWM-switch model (Fig. 3(b)) and averaged
switch model (Fig. 3(c)). Though not shown in the paper, other
derived transfer functions, Gvv(s) and Gzv(s), have been found to
be accurate as well. Frequency (Hz)
(b)
REFERENCES Fig. 3 Frequency responses of Gdv(s) from: (a) SSA technique,
[1] V. Vorpérian, "Analysis of the Sepic Converter by Dr. Vatché Vorpérian," (b) PWM-switch model, and (c) Averaged switch model.
Ridley Engineering Inc, www.switchingpowermagazine.com, 2006.
[2] R. Ridley, "Analyzing the Sepic Converter," Power Systems Design
Europe Magazine, pp. 14-18, November 2006.