Dell Motherboard Scheme E5410 PDF

5 4 3 2 1
D
Fonseca 14.1" DIS Schematics Document D
rPGA988A Mobile Arrandale
C
Intel Ibex Peak-M C
2010-03-22
REV : -1
B B
DY : Nopop Component
B_TPM:Use Lom TPM
C_TPM:Use China TPM
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
Custom
Fonseca 14.1" DIS -1
Date: Monday, March 22, 2010 Sheet 1 of 89
5 4 3 2 1
5 4 3 2 1
Fonseca 14" DIS Block Diagram Project name: DF3-14D

Project code: 91.4GQ01.001
PCB P/N : 48.4GQ01.011
gDDR3 Revision : 09281 - 1
800MHz CPU DC/DC
Intel Mobile CPU PEG ATI M92LP-S2 VRAM ISL62883 47
D Clock Generator DDR III DIMM1 D
Channel A 64Mx16bx4 (512MB) INPUTS OUTPUTS
SLG8SP585VTR 7 1333Mhz 18 84,85
4
Arrandale 80,81,82,83 +PWR_SRC +VCC_CORE
Thermal & Fan DDR III DIMM2 Channel B

eDP
CRT SYSTEM DC/DC
EMC4022 39 1333Mhz 19
rPGA988A 8~14 TPS51125 46
VSW INPUTS OUTPUTS

MAX4885EETG+ 75 CRT CONN
14.1" eDP-LCD 55 +3.3V_ALW
+PWR_SRC
DMIx4 +5V_ALW
BTO(1) BL Converter
54
Smart CARD O2 USB2.0
Display Port (C) SYSTEM DC/DC
Socket 67 OZ77CR6 TPS51116 50
X1 Display Port (B)
34 Intel PCH INPUTS OUTPUTS
BTO(2) USB2.0 +1.5V_SUS
+PWR_SRC
C PC CARD Ibex Peak-M USB2.0 +0.75V_DDR_VTT C
Socket 72 SATA X2
Ricoh PCIE
PCIE Docking SYSTEM DC/DC
1394 Connector TPS51218 52
71 R5U242 12 USB 2.0/1.1 ports Digital MIC E/Family INPUTS OUTPUTS
10/100/1000Mb ETHERNET Module 73
+PWR_SRC +1.05V_VTT
SD/SDHC/MMC High Definition Audio
Socket 32 4 SATA ports TLV320AIC3004
71 75
6 PCIE ports Azalia SYSTEM LDO
BTO(3) USB2.0 RT9035 51
Power SW(NewCard)
ACPI 1.1 CODEC MIC Jack INPUTS OUTPUTS
New Card PCIE LPC I/F
TPS2231MRGPR 72 Connector 72 HD AUDIO
PCI/PCI BRIDGE IDT 74 +3.3V_SUS +1.8V_RUN
SMBus 92HD81 HP Jack
INT2 Free Fall Sensor
DE351DL 40 INT1 Bluetooth (Option) SYSTEM LDO
RT9035 51
20~28
OP AMP Module 73
B
SATA SATA 2CH INPUTS OUTPUTS B
HDD CONN 59 SPEAKER

30 (1W/1W) Camera (Option) +3.3V_SUS +1.8V_DELAY
LPC SPI 60
SATA Module 73
ODD CONN 59
SPI FLASH MDC (Option)
RJ11 SYSTEM DC/DC
32Mb + 16Mb Module 76 USB Port x 2 TPS51511 86
USB2.0 IO Board 76 IO Board
USB Port x 2 62 X2 IO Board 76 INPUTS OUTPUTS
X2
63
TCM (Option) LPC RJ45 +PWR_SRC +VCC_GFX_CORE
FLASH 76
ZTE, Jetway 36 LOM IO Board 1/2 Mini-Card
8Mb 35 ESW
WLAN Module BATTERY CHARGER
LPC BCM5761E TI BQ24745 45
WLAN Switch 35 64
64 (AC, Battery Existence)
INPUTS OUTPUTS
Mini-Card +DC_IN_SS +PBATT
A BC WWAN Module A
TouchPad EC SIO Expander <Core Design>
Int KB KSI/KSO BC IO Board 76

ECE1077 PS2 MEC 5045 ECE 5028 Wistron Corporation
37 38 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
68 Taipei Hsien 221, Taiwan, R.O.C.
Finger Printer
Title
AES2880 (Option)
FP Board 78
Size Document Number
Block Diagram Rev
Custom
Date: Thursday, March 18, 2010 Sheet 2 of 89
5 4 3 2 1
5 4 3 2 1
Regulator
ADAPTER
ISL62883 LDO
D 47 +VCC_CORE47 D
Switch
BATTERY +PWR_SRC
+3V_ALW_246
TPS51218 TPS51511 86 TPS51116
52 50
TPS51125
CHARGER
BQ24745 +5V_ALW_246
46
C
+1.05V_VTT +GPU_CORE +1.1V_GFX_PCIE +1.5V_SUS +0.75V_DDR_VTT C
52 86 86 50 50
SIR460DP
42
+5V_ALW 46
+3.3V_ALW
46 +1.5V_RUN
42
B B
SI2301CDS
SI4800BDY SI4800BDY SI4800BDY SI3456DDV SI3456DDV
42
42 42 42 35 42
+15V_ALW SI4800BDY
46 42
+3.3V_SUS 42
+3.3V_DELAY
42 +1.5V_RUN_CPU
42
42
+5V_MOD +5V_RUN +3.3V_RUN +3.3V_LAN 35 RT9035 RT9035
42 42 51 51
SI3456DDV
42
+1.8V_RUN
51
+CAMERA_VDD73 NJT4030PT1G
35
A A
+1.8V_DEALY
51 <Core Design>
Wistron Corporation
+1.2V_LOM 35 Taipei Hsien 221, Taiwan, R.O.C.
+3.3V_ALW_PCH 42 Title
Power Diagram
Custom Fonseca 14.1" DIS -1
5 4 3 2 1
5 4 3 2 1
2.2K 2.2K
+3.3V_ALW_PCH +3.3V_RUN
2.2K 2.2K
H14 2N7002 DIMM A(DM1) SMB
PCH_SMB_CLK 202 Addr=[A0]
C8 2N7002
PCH_SMB_DATA 200
202 DIMM B(DM2) SMB Addr=[A4]

D
PCH 200 D
ibex Peak-M
2.2K
53 XDP1
C6 +3.3V_ALW_PCH
PCH_SML0CLK 51 Dummy
G8
PCH_SML0DATA 2.2K
G12 E10
53 XDP2
51 Dummy
2.2K
+3.3V_ALW_PCH FFSensor
KBC_SCL1
14 SMB Addr=[3A]
KBC_SDA1 2.2K DE351DL
13
2.2K
A5 B6
+3.3V_LAN
LAN_SMBCLK 2.2K LOM
A50 2N7002
LAN_SMBDAT A3 SMB Addr=[XX]
B53 2N7002 BCM5761E
A4
C C
EC Dummy
Dummy
MEC5045 2.2K 2.2K
+3.3V_ALW +3.3V_RUN
2.2K 2.2K CLK Gen
A7 2N7002
CKG_SMBCLK 32 SMB Addr=[D2]
B7 2N7002 SLG8SP585VTR
CKG_SMBDAT 31
2.2K 10K
+3.3V_ALW +3.3V_ALW
2.2K
A2
DOCK_SMB_ALERT# 133 Docking SMB Addr=[C4/72/70/48]
B4
DOCK_SMB_CLK 127
A3
DOCK_SMB_DAT 129
2.2K 2.2K
B
+3.3V_ALW +LCDVDD B
2.2K 2.2K LCD Panel

B5 2N7002
LCD_SMBCLK 13 SMB Addr=[XX]
A4 2N7002 (eDP Type)
LCD_SMBDAT 12
2.2K
+3.3V_ALW
100 ohm
2.2K Battery
A56
PBAT_SMBCLK 3 SMB Addr=[XX]
B59 connector
PBAT_SMBDAT 4
100 ohm
2.2K
+3.3V_ALW
2.2K Charger
B50
CHARGER_SMBCLK 10 SMB Addr=[12]
A47 BQ24745RHDR
CHARGER_SMBDAT 9
2.2K 2.2K
+3.3V_ALW +3.3V_RUN
2.2K 2.2K ADC/DAC
B49 2N7002
AUD_DOCK_SMBCLK 8 SMB Addr=[30]
B48 2N7002 TLV320AIC3004
AUD_DOCK_SMBDAT 9
A A
2.2K
+3.3V_ALW
2.2K
A49
CARD_SMBCLK 20
ExpressCard <Core Design>
B52 connector Wistron Corporation

CARD_SMBDAT 19
Title
SMBus Diagram
A2 Fonseca 14.1" DIS -1
5 4 3 2 1
5 4 3 2 1
Audio Block Diagram

D
Thermal Block Diagram D
AUD_EXT_MIC_L
HP0_PORT_A_L
AUD_EXT_MIC_R
HP0_PORT_A_R
AUD_VREFOUT_B
MIC
VREFOUT_A_OR_F 60
HP1_PORT_B_L
AUD_HP_OUT_L
AUD_HP_OUT_R
Earphone
HP1_PORT_B_R
DP1 60
MMBT3904-3-GP
SC470P50V3JN-2GP
DN1
CPU
PORT_C_L
C C
PORT_C_R
DP2
MMBT3904-3-GP VREFOUT_C
SC470P50V3JN-2GP
Thermal DN2
Skin
Anti-Parallel Diodes
EMC4022 DP3
Codec
SC470P50V3JN-2GP
MMBT3904-3-GP
92HD81
DN3
VGA SPKR_PORT_D_L+ AUD_SPK_L+ AUD_SPK_L+_R
SPKR_PORT_D_L- AUD_SPK_L- AUD_SPK_L-_R

DP4
MMBT3904-3-GP SPKR_PORT_D_R- AUD_SPK_R+ AUD_SPK_R+_R
SPEAKER
SC470P50V3JN-2GP
SPKR_PORT_D_R+ AUD_SPK_R- AUD_SPK_R-_R 60
DN4
DIMM 0R3-0-U-V-GP
Anti-Parallel Diodes
DP5
B PORT_E_L AUD_DOCK_HP_OUT_L_C DOCKING B
TLV320AIC3004
PORT_E_R AUD_DOCK_HP_OUT_R_C
DN5 DAI_BCLK#
SCD47U25V3KX-1GP
DAI_LRCK#
DOCK
DAI_DO#
HP
DAI_DI
THERMTRIP1#
PORT_F_L AUD_DOCK_MIC_IN_L DOCK
PORT_F_R AUD_DOCK_MIC_IN_R 75 MIC 74
THERMTRIP2# CPU_ThermalTrip SC1U16V3KX-2GP
0R2J-2-GP
PCH_ThermalTrip DMIC_CLK/GPIO1 AUD_DMIC_CLK AUD_DMIC_CLK_G_C Digital
DMIC0/GPIO2 AUD_DMIC_IN0 AUD_DMIC_IN0_C
THERMTRIP3# +3.3V_SUS
33R2J-2-GP
MIC 50
A <Core Design>
SC1U10V3KX-3GP A
39
30
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
AUDIO/THERMAL Diagram
A3
5 4 3 2 1
5 4 3 2 1
PCH Strapping Processor Strapping

Calpella Schematic Checklist Rev: 1.6 Calpella Schematic Checklist Rev: 1.6
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
D No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ ~ 10-kΩ weak Embedded DisplayPort. D
pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Internal pull-up. Leave as "No Connect" connected to the Embedded Display Port.
GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
GPIO55 Low (0) = Top Block Swap Mode Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Note: Connect to ground with 4.7-kΩ weak pull-down resistor.
CRB uses a 1 kΩ ; do not stuff resistor CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
Configuration Select 0: Bifurcation enabled
INTVRMEN High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Note: CRB uses a 330-k resistor.
GNT0#, Default (SPI): Leave both GNT0# and GNT1# floating. No pull up required
GNT1#
Boot from PCI: Connect GNT1# to ground with 1-kΩ pull-down resistor.
Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kΩ pull-down
resistor.
GNT2#/ Default - Internal pull-up.
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers only.
Not for mobile/desktops).
C C
SPI_MOSI Enable Intel Anti-Theft Technology: Connect to Vcc3_3 with 8.2-kΩ weak pull-up
resistor.
Disable Intel Anti-Theft Technology:Left floating, no pull-down required.
NV_ALE Enable Intel Anti-Theft Technology: Connect to +NVRAM_VCCQ with 8.2-kΩ weak
pull-up resistor [CRB has it pulled up with 1-kΩ no-stuff resistor]
Disable Intel Anti-Theft Technology: Leave floating (internal pull-down).
NV_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
HDA_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.

/GPIO[33] Also, when this signals is sampled on the rising edge of PWROK then
it will also disable Intel ME and its features.
High (1): Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down
depending on the desired settings.
PCIE Routing USB Routing
If a jumper option is used to tie this signal to GND as required by USB
the functional strap, the signal should be pulled low through a weak pull-down LANE1 WWAN Pair Device
in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: 0 USB0 @ MB
B
CRB recommends 1-kΩ pull-down for FD Override. LANE2 WLAN 1 USB1 @ MB B
There is an internal pull-up of 20 kΩ for HDA_DOCK_EN# which is only
enabled at boot/reset for strapping functions. 2 USB2 @ IO Board
LANE3 PCMCIA 3 USB3 @ IO Board
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
4 WLAN
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
LANE4 Express Card 5 Bluetooth
GPIO15 Low (1) - Intel ME Crypto Transport Layer Security TLS) cipher suite with no
confidentiality. 6 Not available for HM55
High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with LANE5 None 7 Not available for HM55
confidentiality.
Note: 8 DOCKING PORT1
This is an unmuxed signal. LANE6 10M/100M/1G LAN 9 DOCKING PORT2
This signal has a weak internal pull-down of 20KΩ which is enabled when PWROK is
low. 10 Finger Printer
Sampled at rising edge of RSMRST#. LANE7 Not available for HM55
CRB has a 1K pull-up on this signal to +3.3VA rail. 11 Camera
12 PCCard/ SmartCard/ ExpCard
LANE8 Not available for HM55
GPIO8 Weak internal pull-up. Do not pull low. Sampled at rising edge of RSMRST#. 13 WWAN
GPIO27 Default = Do not connect (floating). Internal pull-up.
High(1) = Enables the internal VccVRM to have a clean supply for analog rails.
No need to use on-board filter circuit.
A <Core Design> A
Low (0) = Disables the VccVRM.
Need to use on-board filter circuits for analog rails.
Wistron Corporation
Title
Table of Content
5 4 3 2 1
5 4 3 2 1
SSID = CLOCK +3.3V_RUN +3.3V_RUN
37 CKG_SMBDAT
2
1
+3.3V_RUN +3.3V_RUN_CLKGEN RN702
Q701 SRN2K2J-1-GP
1 L702 2
0R0805-PAD-2-GP 4 3
3
4
1
1
C702 C703 C704 C705 C706 C707 C708 C709 5 2
D DY DY DY CLK_SCLK
D
SC1U10V2KX-1GP
6 1
SC10U10V5ZY-1GP
37 CKG_SMBCLK
2
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DMN66D0LDW -7-GP CLK_SDATA
R709
1 DY 2
0R2J-2-GP
CLK_SCLK_HDDFALL 40
R710
1 DY 2
0R2J-2-GP
CLK_SDATA_HDDFALL 40
+1.05V_VTT +1.05V_RUN_CLKGEN_IO
1 L701 2 +3.3V_RUN_CLKGEN +1.05V_RUN_CLKGEN_IO

0R0805-PAD-2-GP
1
C710 C711 C712 C713

DY DY -1.10/0310 Damping need to check
SC1U10V2KX-1GP
series resistance
SC10U10V5ZY-1GP
2
2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK_GPU27M_NSS 81
1
24
17
29
15
18
1
5
U701 EC703
C SC10P50V2JN-4GP C
VDD_27
VDD_SRC_IO
VDD_CPU_IO
VDD_CPU
VDD_SRC
VDD_REF
VDD_DOT
2
-1.10/0310 1 2 CLK_GPU27M_SS 81
R703 33R2J-2-GP
1
DREFCLK# 4 6 CLK_GPU27M_NSS EC702
23 DREFCLK#
23 DREFCLK DREFCLK 3
DOT_96# SLG8SP585VTR-GP 27MHZ_SS
27MHZ
7 CLK_GPU_27M_SS SC10P50V2JN-4GP
2
DOT_96
CLKIN_DMI# 14 +3.3V_RUN
23 CLKIN_DMI# SRC_2#
23 CLKIN_DMI CLKIN_DMI 13 16 CPU_STOP# 2 1
SRC_2 CPU_STOP# CK_PW RGD R704 10KR2J-3-GP R705
CKPWRGD/PD# 25
23 CLK_PCIE_SATA# CLK_PCIE_SATA# 11 30 FSC 1 2 CLK_PCH_14M 23
CLK_PCIE_SATA SRC_1/SATA# REF_0/CPU_SEL
23 CLK_PCIE_SATA 10 SRC_1/SATA 33R2J-2-GP
22 28 CLK_XTAL_IN
CPU_0# XTAL_IN
1
23 27 CLK_XTAL_OUT
CPU_0 XTAL_OUT C714
CLK_CPU_BCLK# CLK_SDATA
DY SC4D7P50V2CN-1GP
23 CLK_CPU_BCLK# 19 31
2
CLK_CPU_BCLK CPU_1# SDA CLK_SCLK
23 CLK_CPU_BCLK 20 CPU_1 SCL 32
VSS_SATA
VSS_CPU
VSS_SRC
VSS_DOT
VSS_REF
VSS_27
For EMI
GND
33
26
21
12
9
B B
Main Source: 71.08585.003 (SLG8SP585VTR) +3.3V_RUN_CLKGEN
2nd Source: 71.93197.003 (ICS9LRS3197AKLFT)
2
3rd Source: 71.00875.D03 (RTM875N-632-VB-GRT)
R706
10KR2J-3-GP
1
CK_PW RGD
D
Q702
2N7002A-7-GP
+1.05V_VTT G VR_CLKEN# 47
S
1
R701
DY 4K7R2J-2-GP
2
A FSC X701 <Core Design> A

CLK_XTAL_IN 1 2 CLK_XTAL_OUT
1
X-14D31818M-37GP
Wistron Corporation
1
R707
10KR2J-3-GP FSC 0 1 C715 C701 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SC15P50V2JN-2-GP SC15P50V2JN-2-GP Taipei Hsien 221, Taiwan, R.O.C.
2
2
2
133MHz Title
SPEED 100MHz
(Default) Clock Generator - SLG8SP585
5 4 3 2 1
5 4 3 2 1
SSID = CPU
D CPU1A 1 OF 9 R801
D
B26 PEG_IRCOMP_R 1 2 49D9R2F-GP
PEG_ICOMPI
PEG_ICOMPO A26
22 DMI_PTX_CRXN0 A24 B27 R802
DMI_RX0# PEG_RCOMPO
AUBURNDALE
22 DMI_PTX_CRXN1 C23 A25 EXP_RBIAS 1 2 750R2F-GP
DMI_RX1# PEG_RBIAS
22 DMI_PTX_CRXN2 B22 DMI_RX2#
22 DMI_PTX_CRXN3 A21 K35 PEG_CRX_GTX_N15
DMI_RX3# PEG_RX0# PEG_CRX_GTX_N14
PEG_RX1# J34
22 DMI_PTX_CRXP0 B24 J33 PEG_CRX_GTX_N13
DMI_RX0 PEG_RX2# PEG_CRX_GTX_N12
22 DMI_PTX_CRXP1 D23 DMI_RX1 PEG_RX3# G35
DMI
22 DMI_PTX_CRXP2 B23 G32 PEG_CRX_GTX_N11
DMI_RX2 PEG_RX4# PEG_CRX_GTX_N10
22 DMI_PTX_CRXP3 A22 DMI_RX3 PEG_RX5# F34
F31 PEG_CRX_GTX_N9
PEG_RX6# PEG_CRX_GTX_N8
22 DMI_CTX_PRXN0 D24 DMI_TX0# PEG_RX7# D35
22 DMI_CTX_PRXN1 G24 E33 PEG_CRX_GTX_N7
DMI_TX1# PEG_RX8# PEG_CRX_GTX_N6 PEG_CTX_GRX_P[0..15]
22 DMI_CTX_PRXN2 F23 DMI_TX2# PEG_RX9# C33 PEG_CTX_GRX_P[0..15] 80
22 DMI_CTX_PRXN3 H23 D32 PEG_CRX_GTX_N5
DMI_TX3# PEG_RX10# PEG_CRX_GTX_N4 PEG_CTX_GRX_N[0..15]
PEG_RX11# B32 PEG_CTX_GRX_N[0..15] 80
22 DMI_CTX_PRXP0 D25 C31 PEG_CRX_GTX_N3
DMI_TX0 PEG_RX12# PEG_CRX_GTX_N2 PEG_CRX_GTX_N[0..15]
22 DMI_CTX_PRXP1 F24 DMI_TX1 PEG_RX13# B28 PEG_CRX_GTX_N[0..15] 80
22 DMI_CTX_PRXP2 E23 B30 PEG_CRX_GTX_N1
DMI_TX2 PEG_RX14# PEG_CRX_GTX_N0 PEG_CRX_GTX_P[0..15]
22 DMI_CTX_PRXP3 G23 DMI_TX3 PEG_RX15# A31 PEG_CRX_GTX_P[0..15] 80
J35 PEG_CRX_GTX_P15
PEG_RX0 PEG_CRX_GTX_P14
PEG_RX1 H34
H33 PEG_CRX_GTX_P13
E22 FDI_TX0# PEG_RX3 F35
D21 G33 PEG_CRX_GTX_P11
FDI_TX1# PEG_RX4
C D19
D18
FDI_TX2# PEG_RX5 E34
F32
PEG_CRX_GTX_P10
PEG_CRX_GTX_P9 C
FDI_TX3# PEG_RX6
Intel(R) FDI
G21 D34 PEG_CRX_GTX_P8
FDI_TX4# PEG_RX7 PEG_CRX_GTX_P7
E19 FDI_TX5# PEG_RX8 F33
F21 B33 PEG_CRX_GTX_P6
FDI_TX6# PEG_RX9 PEG_CRX_GTX_P5
G18 FDI_TX7# PEG_RX10 D31
A32 PEG_CRX_GTX_P4
PEG_RX12 C30
D22 A28 PEG_CRX_GTX_P2
FDI_TX0 PEG_RX13
PCI EXPRESS -- GRAPHICS

C21 B29 PEG_CRX_GTX_P1
FDI_TX1 PEG_RX14 PEG_CRX_GTX_P0
D20 FDI_TX2 PEG_RX15 A30
C18 FDI_TX3
G22 L33 PEG_CTX_GRX_C_N15 1 2 C817 SCD1U10V2KX-4GP PEG_CTX_GRX_N15
FDI_TX4 PEG_TX0# PEG_CTX_GRX_C_N14 C816 SCD1U10V2KX-4GP PEG_CTX_GRX_N14
E20 FDI_TX5 PEG_TX1# M35 1 2
F20 M33 PEG_CTX_GRX_C_N13 1 2 C815 SCD1U10V2KX-4GP PEG_CTX_GRX_N13
FDI_TX6 PEG_TX2# PEG_CTX_GRX_C_N12 C814 SCD1U10V2KX-4GP PEG_CTX_GRX_N12
G19 FDI_TX7 PEG_TX3# M30 1 2
L31 PEG_CTX_GRX_C_N11 1 2 C813 SCD1U10V2KX-4GP PEG_CTX_GRX_N11
PEG_TX4# PEG_CTX_GRX_C_N10 C812 SCD1U10V2KX-4GP PEG_CTX_GRX_N10
F17 FDI_FSYNC0 PEG_TX5# K32 1 2
E17 M29 PEG_CTX_GRX_C_N9 1 2 C811 SCD1U10V2KX-4GP PEG_CTX_GRX_N9
FDI_FSYNC1 PEG_TX6# PEG_CTX_GRX_C_N8 C810 SCD1U10V2KX-4GP PEG_CTX_GRX_N8
PEG_TX7# J31 1 2
FDI_INT C17 K29 PEG_CTX_GRX_C_N7 1 2 C809 SCD1U10V2KX-4GP PEG_CTX_GRX_N7
FDI_INT PEG_TX8# PEG_CTX_GRX_C_N6 C808 SCD1U10V2KX-4GP PEG_CTX_GRX_N6
PEG_TX9# H30 1 2
F18 H29 PEG_CTX_GRX_C_N5 1 2 C807 SCD1U10V2KX-4GP PEG_CTX_GRX_N5
FDI_LSYNC0 PEG_TX10# PEG_CTX_GRX_C_N4 C806 SCD1U10V2KX-4GP PEG_CTX_GRX_N4
D17 FDI_LSYNC1 PEG_TX11# F29 1 2
E28 PEG_CTX_GRX_C_N3 1 2 C805 SCD1U10V2KX-4GP PEG_CTX_GRX_N3
PEG_TX12# PEG_CTX_GRX_C_N2 C804 SCD1U10V2KX-4GP PEG_CTX_GRX_N2
PEG_TX13# D29 1 2
D27 PEG_CTX_GRX_C_N1 1 2 C803 SCD1U10V2KX-4GP PEG_CTX_GRX_N1
PEG_TX14#
4
3
C26 PEG_CTX_GRX_C_N0 1 2 C802 SCD1U10V2KX-4GP PEG_CTX_GRX_N0

RN801 PEG_TX15#
L34 PEG_CTX_GRX_C_P15 1 2 C828 SCD1U10V2KX-4GP PEG_CTX_GRX_P15
B SRN1KJ-7-GP PEG_TX0
PEG_TX1 M34 PEG_CTX_GRX_C_P14 1 2 C823 SCD1U10V2KX-4GP PEG_CTX_GRX_P14 B
M32 PEG_CTX_GRX_C_P13 1 2 C871 SCD1U10V2KX-4GP PEG_CTX_GRX_P13
PEG_TX2 PEG_CTX_GRX_C_P12 C832 SCD1U10V2KX-4GP PEG_CTX_GRX_P12
L30 1 2
1
2

PEG_TX4 M31 1 2
K31 PEG_CTX_GRX_C_P10 1 2 C822 SCD1U10V2KX-4GP PEG_CTX_GRX_P10
PEG_TX6 M28 1 2
H31 PEG_CTX_GRX_C_P8 1 2 C826 SCD1U10V2KX-4GP PEG_CTX_GRX_P8
PEG_TX8 K28 1 2
G30 PEG_CTX_GRX_C_P6 1 2 C830 SCD1U10V2KX-4GP PEG_CTX_GRX_P6
PEG_TX10 G29 1 2
F28 PEG_CTX_GRX_C_P4 1 2 C820 SCD1U10V2KX-4GP PEG_CTX_GRX_P4
PEG_TX12 E27 1 2
D28 PEG_CTX_GRX_C_P2 1 2 C824 SCD1U10V2KX-4GP PEG_CTX_GRX_P2
PEG_TX14 C27 1 2
C25 PEG_CTX_GRX_C_P0 1 2 C818 SCD1U10V2KX-4GP PEG_CTX_GRX_P0
PEG_TX15
A <Core Design>
A
Wistron Corporation
Title
CPU - PCIE/DMI/FDI (1/7)

Date: Friday, March 19, 2010 Sheet 8 of 89
5 4 3 2 1
SSID = CPU Processor Compensation Signals
CPU1B 2 OF 9
1 2 H_COMP3 AT23
+1.05V_VTT R902 20R2F-GP COMP3 BCLK_CPU_P_R
Processor Pullups H_COMP2 BCLK A16
BCLK_CPU_N_R
BCLK_CPU_P_R 25
1 2 AT24 COMP2 BCLK# B16 BCLK_CPU_N_R 25
AUBURNDALE
R904 20R2F-GP
MISC
CLOCKS
1 DY 2 H_CATERR# 1 2 H_COMP1 G16 AR30 BCLK_ITP_P_R 1 4 BCLK_ITP_P 58
R903 49D9R2F-GP R905 49D9R2F-GP COMP1 BCLK_ITP BCLK_ITP_N_R
H_PROCHOT# H_COMP0 BCLK_ITP# AT30
RN903
2 DY 3
SRN0J-6-GP
BCLK_ITP_N 58
1 2 1 2 AT26 COMP0
R906 49D9R2F-GP R907 49D9R2F-GP E16 PEG_CLK_R PEG_CLK_R 23
PEG_CLK DDR_HVREF_RST_GATE 37
1 DY 2 H_CPURST# D16 PEG_CLK#_R PEG_CLK#_R 23
PEG_CLK#
1
D R908 68R2-GP
37 H_SKTOCC#
H_SKTOCC# AH24 SKTOCC#
A18
C903
SCD047U10V2KX-2GP
D
DPLL_REF_SSCLK +1.5V_SUS
A17
2
H_CATERR# DPLL_REF_SSCLK#
AK14 CATERR# Q902 1 2
THERMAL
R934 1KR2J-1-GP
+3.3V_RUN +1.05V_VTT F6 SM_DRAMRST# S D
SM_DRAMRST# DDR3_DRAMRST# 18,19
AT15 2N7002A-7-GP
25 H_PECI PECI
AL1 SM_RCOMP_0
SM_RCOMP0
1
AM1 SM_RCOMP_1 1 DY 2
R912 R913 SM_RCOMP1 SM_RCOMP_2 R936
SM_RCOMP2 AN1
1
2K2R2J-2-GP H_PROCHOT# +1.05V_VTT 0R2J-2-GP
8K2R2J-3-GP DY AN26
100KR2J-1-GP
47 H_PROCHOT# PROCHOT#
1
AN15 PM_EXTTS#_R R915 C902
PM_EXT_TS0# SC470P50V2JN-GP
AP15 2 1 DY
2
1 2
PM_EXT_TS1# R914 10KR2J-3-GP
2
DDR3
MISC
Q901 H_THERMTRIP# AK15
2
25,39 H_THERMTRIP# THERMTRIP#
38 CPU_CATERR# 3 DY 2 H_CATERR#
MMBT3904-7-F-GP AT28 XDP_PRDY#
PRDY# XDP_PREQ# XDP_PRDY# 58
PREQ# AP27 XDP_PREQ# 58
1
DY C901 AN28 XDP_TCLK

Place near U3801 SCD1U10V2KX-4GP H_CPURST# TCK XDP_TMS XDP_TCLK 58
AP26 AP28 XDP_TMS 58 DDR3 Compensation Signals
2
58 H_CPURST# RESET_OBS# TMS
PWR MANAGEMENT
AT27 XDP_TRST#
TRST# XDP_TRST# 58
SM_RCOMP_0
JTAG & BPM

1 2
AL15 AT29 XDP_TDI_R R909 100R2F-L1-GP-U
22 H_PM_SYNC PM_SYNC TDI
AR27 XDP_TDO_R SM_RCOMP_1 1 2
TDO XDP_TDI_M R910 24D9R2F-L-GP
TDI_M AR29
-1.10/0318 25,58 H_PW RGD 1 R917 2 VCCPW RGOOD AN14 VCCPWRGOOD_1 TDO_M AP29 XDP_TDO_M SM_RCOMP_2 1 2
C 0R0402-PAD-2-GP
AN25 H_DBR#_R 1 2 XDP_DBRESET#
R911 130R2F-1-GP
C
DBR# XDP_DBRESET# 22,38,58
1 R919 2 VCCPW RGOOD_0 AN27 VCCPWRGOOD_0
R918 0R0402-PAD-2-GP
0R0402-PAD-2-GP
AJ22 XDP_OBS0
DRAM_PW ROK BPM0# XDP_OBS1 XDP_OBS0 58
22 DRAM_PW ROK AK13 SM_DRAMPWROK BPM1# AK22 XDP_OBS1 58
AK24 XDP_OBS2
BPM2# XDP_OBS3 XDP_OBS2 58
BPM3# AJ24 XDP_OBS3 58
52 H_VTTPW RGD H_VTTPW RGD AM15 AJ25 XDP_OBS4
VTTPWRGOOD BPM4# XDP_OBS5 XDP_OBS4 58
BPM5# AH22 XDP_OBS5 58
AK23 XDP_OBS6
H_PW RGD_XDP BPM6# XDP_OBS7 XDP_OBS6 58
58 H_PW RGD_XDP AM26 TAPPWRGOOD BPM7# AH23 XDP_OBS7 58 +1.05V_VTT
21,58,80 PLTRST1# 1 2 PLT_RST#_R AL14 XDP_TMS 1 DY 2

R921 RSTIN# R922 51R2J-2-GP
1
1K5R2F-2-GP XDP_TDI_R 1 DY 2
R924 R923 51R2J-2-GP
750R2F-GP XDP_PREQ#
R925
1 DY 2
51R2J-2-GP
2
XDP_TCLK 1 DY 2
R926 51R2J-2-GP
JTAG MAPPING
B B
XDP_TDI_R 1 2 XDP_TDI
XDP_TDI 58
R929 0R0402-PAD-2-GP
XDP_TDO_M 1 DY 2 XDP_TDO
R930 0R2J-2-GP XDP_TDO 58
1
R901
0R0402-PAD-2-GP
+3.3V_ALW _PCH
2
XDP_TDI_M 1 DY 2
+3.3V_ALW _PCH R931 0R2J-2-GP
1
R941
U901 DY 0R2J-2-GP XDP_TDO_R 1 2
22,35,38,50 SIO_SLP_S3# 1 2 SIO_SLP_S3#_C 1 R932 0R0402-PAD-2-GP XDP_TRST#
R927 0R0402-PAD-2-GP B
VCC 5
1
37,38,58 RUNPW ROK 1 2 RUNPW ROK_C 2 Scan Chain Stuff --> R901, R929, R932
2
R920 0R0402-PAD-2-GP A DRAM_PW ROK_R DRAM_PW ROK R933

4 1 2
3
Y R937 (Default) No Stuff --> R930, R931 51R2J-2-GP
GND 1K5R2F-2-GP CPU Only Stuff --> R929, R930
1
74LVC1G08GW -1-GP
No Stuff --> R901, R931, R932
2
R939
750R2F-GP GMCH Only Stuff --> R931, R932
No Stuff --> R929, R930, R901
2
A <Core Design>
A
Wistron Corporation
Title
CPU Thermal/Clock/PM (2/7)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
SSID = CPU CPU1D 4 OF 9
CPU1C 3 OF 9
AUBURNDALE
AUBURNDALE
SB_CK0 W8 M_CLK_DDR2 19
19 M_B_DQ[63..0] SB_CK0# W9 M_CLK_DDR#2 19
AA6 M_CLK_DDR0 18 M_B_DQ0 B5 M3 M_CKE2 19
SA_CK0 M_B_DQ1 SB_DQ0 SB_CKE0
SA_CK0# AA7 M_CLK_DDR#0 18 A5 SB_DQ1
P7 M_CKE0 18 M_B_DQ2 C3
18 M_A_DQ[63..0] SA_CKE0 SB_DQ2
M_A_DQ0 A10 M_B_DQ3 B3 V7 M_CLK_DDR3 19
M_A_DQ1 SA_DQ0 M_B_DQ4 SB_DQ3 SB_CK1
D C10 SA_DQ1 E4 SB_DQ4 SB_CK1# V6 M_CLK_DDR#3 19 D
M_A_DQ2 C7 M_B_DQ5 A6 M2 M_CKE3 19
M_A_DQ3 SA_DQ2 M_B_DQ6 SB_DQ5 SB_CKE1
A7 SA_DQ3 SA_CK1 Y6 M_CLK_DDR1 18 A4 SB_DQ6
M_A_DQ4 B10 Y5 M_CLK_DDR#1 18 M_B_DQ7 C4
M_A_DQ5 SA_DQ4 SA_CK1# M_B_DQ8 SB_DQ7
D10 SA_DQ5 SA_CKE1 P6 M_CKE1 18 D1 SB_DQ8
M_A_DQ6 E10 M_B_DQ9 D2
M_A_DQ7 SA_DQ6 M_B_DQ10 SB_DQ9
A8 SA_DQ7 F2 SB_DQ10 SB_CS0# AB8 M_CS#2 19
M_A_DQ8 D8 M_B_DQ11 F1 AD6 M_CS#3 19
M_A_DQ9 SA_DQ8 M_B_DQ12 SB_DQ11 SB_CS1#
F10 SA_DQ9 SA_CS0# AE2 M_CS#0 18 C2 SB_DQ12
M_A_DQ10 E6 AE8 M_CS#1 18 M_B_DQ13 F5
M_A_DQ11 SA_DQ10 SA_CS1# M_B_DQ14 SB_DQ13
F7 SA_DQ11 F3 SB_DQ14
M_A_DQ12 E9 M_B_DQ15 G4 AC7 M_ODT2 19
M_A_DQ13 SA_DQ12 M_B_DQ16 SB_DQ15 SB_ODT0
B7 SA_DQ13 H6 SB_DQ16 SB_ODT1 AD1 M_ODT3 19
M_A_DQ14 E7 AD8 M_ODT0 18 M_B_DQ17 G2
M_A_DQ15 SA_DQ14 SA_ODT0 M_B_DQ18 SB_DQ17
C6 SA_DQ15 SA_ODT1 AF9 M_ODT1 18 J6 SB_DQ18
M_A_DQ16 H10 M_B_DQ19 J3
G8 SA_DQ17 G1 SB_DQ20
M_A_DQ18 K7 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ19 SA_DQ18 M_B_DQ22 SB_DQ21 SB_DM0 M_B_DM1
J8 SA_DQ19 J2 SB_DQ22 SB_DM1 E1
M_A_DQ20 G7 M_B_DQ23 J1 H3 M_B_DM2
M_A_DQ21 SA_DQ20 M_B_DQ24 SB_DQ23 SB_DM2 M_B_DM3
G10 SA_DQ21 J5 SB_DQ24 SB_DM3 K1
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ25 K2 AH1 M_B_DM4
M_A_DQ23 SA_DQ22 SA_DM0 M_A_DM1 M_B_DQ26 SB_DQ25 SB_DM4 M_B_DM5
J10 SA_DQ23 SA_DM1 D7 L3 SB_DQ26 SB_DM5 AL2
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ27 M1 AR4 M_B_DM6 M_B_DM[7..0] 19
M_A_DQ25 SA_DQ24 SA_DM2 M_A_DM3 M_B_DQ28 SB_DQ27 SB_DM6 M_B_DM7
M6 SA_DQ25 SA_DM3 M7 K5 SB_DQ28 SB_DM7 AT8
M_A_DQ26 M8 AG6 M_A_DM4 M_A_DM[7..0] 18 M_B_DQ29 K4 M_B_DQS#[7..0] 19
M_A_DQ27 SA_DQ26 SA_DM4 M_A_DM5 M_B_DQ30 SB_DQ29
L9 SA_DQ27 SA_DM5 AM7 M4 SB_DQ30
M_A_DQ28 L6 AN10 M_A_DM6 M_A_DQS#[7..0] 18 M_B_DQ31 N5
M_A_DQ29 SA_DQ28 SA_DM6 M_A_DM7 M_B_DQ32 SB_DQ31
K8 SA_DQ29 SA_DM7 AN13 AF3 SB_DQ32 M_B_DQS[7..0] 19
C M_A_DQ30 N8 M_B_DQ33 AG1 C
M_A_DQ31 SA_DQ30 M_B_DQ34 SB_DQ33 M_B_DQS#0
P9 SA_DQ31 M_A_DQS[7..0] 18 AJ3 SB_DQ34 SB_DQS0# D5 M_B_A[15..0] 19
M_A_DQ32 AH5 M_B_DQ35 AK1 F4 M_B_DQS#1
M_A_DQ33 SA_DQ32 M_B_DQ36 SB_DQ35 SB_DQS1# M_B_DQS#2
AF5 SA_DQ33 M_A_A[15..0] 18 AG4 SB_DQ36 SB_DQS2# J4
M_A_DQ34 AK6 C9 M_A_DQS#0 M_B_DQ37 AG3 L4 M_B_DQS#3
M_A_DQ35 SA_DQ34 SA_DQS0# M_A_DQS#1 M_B_DQ38 SB_DQ37 SB_DQS3# M_B_DQS#4
AK7 SA_DQ35 SA_DQS1# F8 AJ4 SB_DQ38 SB_DQS4# AH2
M_A_DQ36 AF6 J9 M_A_DQS#2 M_B_DQ39 AH4 AL4 M_B_DQS#5
M_A_DQ37 SA_DQ36 SA_DQS2# M_A_DQS#3 M_B_DQ40 SB_DQ39 SB_DQS5# M_B_DQS#6
AG5 SA_DQ37 SA_DQS3# N9 AK3 SB_DQ40 SB_DQS6# AR5
M_A_DQ38 AJ7 AH7 M_A_DQS#4 M_B_DQ41 AK4 AR8 M_B_DQS#7
SA_DQ38 SA_DQS4# SB_DQ41 SB_DQS7#
DDR SYSTEM MEMORY A
M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6
DDR SYSTEM MEMORY - B

M_A_DQ40 SA_DQ39 SA_DQS5# M_A_DQS#6 M_B_DQ43 SB_DQ42
AJ10 SA_DQ40 SA_DQS6# AP11 AN2 SB_DQ43
M_A_DQ41 AJ9 AT13 M_A_DQS#7 M_B_DQ44 AK5
M_A_DQ42 SA_DQ41 SA_DQS7# M_B_DQ45 SB_DQ44
AL10 SA_DQ42 AK2 SB_DQ45
M_A_DQ43 AK12 M_B_DQ46 AM4
AK8 SA_DQ44 AM3 SB_DQ47
M_A_DQ45 AL7 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ46 SA_DQ45 M_A_DQS0 M_B_DQ49 SB_DQ48 SB_DQS0 M_B_DQS1
AK11 SA_DQ46 SA_DQS0 C8 AN5 SB_DQ49 SB_DQS1 E3
M_A_DQ47 AL8 F9 M_A_DQS1 M_B_DQ50 AT4 H4 M_B_DQS2
M_A_DQ48 SA_DQ47 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS2 M_B_DQS3
AN8 SA_DQ48 SA_DQS2 H9 AN6 SB_DQ51 SB_DQS3 M5
M_A_DQ49 AM10 M9 M_A_DQS3 M_B_DQ52 AN4 AG2 M_B_DQS4
AR11 SA_DQ50 SA_DQS4 AH8 AN3 SB_DQ53 SB_DQS5 AL5
M_A_DQ51 AL11 AK10 M_A_DQS5 M_B_DQ54 AT5 AP5 M_B_DQS6
AM9 SA_DQ52 SA_DQS6 AN11 AT6 SB_DQ55 SB_DQS7 AR7
M_A_DQ53 AN9 AR13 M_A_DQS7 M_B_DQ56 AN7
M_A_DQ54 SA_DQ53 SA_DQS7 M_B_DQ57 SB_DQ56
AT11 SA_DQ54 AP6 SB_DQ57
M_A_DQ55 AP12 M_B_DQ58 AP8
AM12 SA_DQ56 AT9 SB_DQ59
M_A_DQ57 AN12 M_B_DQ60 AT7
M_A_DQ58 SA_DQ57 M_A_A0 M_B_DQ61 SB_DQ60
AM13 SA_DQ58 SA_MA0 Y3 AP9 SB_DQ61
B M_A_DQ59 M_A_A1 M_B_DQ62 B
AT14 SA_DQ59 SA_MA1 W1 AR10 SB_DQ62
M_A_DQ60 AT12 AA8 M_A_A2 M_B_DQ63 AT10 U5 M_B_A0
M_A_DQ61 SA_DQ60 SA_MA2 M_A_A3 SB_DQ63 SB_MA0 M_B_A1
AL13 SA_DQ61 SA_MA3 AA3 SB_MA1 V2
M_A_DQ62 AR14 V1 M_A_A4 T5 M_B_A2
M_A_DQ63 SA_DQ62 SA_MA4 M_A_A5 SB_MA2 M_B_A3
AP14 SA_DQ63 SA_MA5 AA9 SB_MA3 V3
V8 M_A_A6 R1 M_B_A4
SA_MA6 M_A_A7 SB_MA4 M_B_A5
SA_MA7 T1 19 M_B_BS0 AB1 SB_BS0 SB_MA5 T8
Y9 M_A_A8 19 M_B_BS1 W5 R2 M_B_A6
SA_MA8 M_A_A9 SB_BS1 SB_MA6 M_B_A7
18 M_A_BS0 AC3 SA_BS0 SA_MA9 U6 19 M_B_BS2 R7 SB_BS2 SB_MA7 R6
18 M_A_BS1 AB2 AD4 M_A_A10 R4 M_B_A8
SA_BS1 SA_MA10 M_A_A11 SB_MA8 M_B_A9
18 M_A_BS2 U7 SA_BS2 SA_MA11 T2 SB_MA9 R5
U3 M_A_A12 19 M_B_CAS# AC5 AB5 M_B_A10
SA_MA12 M_A_A13 SB_CAS# SB_MA10 M_B_A11
SA_MA13 AG8 19 M_B_RAS# Y7 SB_RAS# SB_MA11 P3
T3 M_A_A14 19 M_B_W E# AC6 R3 M_B_A12
SA_MA14 M_A_A15 SB_WE# SB_MA12 M_B_A13
18 M_A_CAS# AE1 SA_CAS# SA_MA15 V9 SB_MA13 AF7
18 M_A_RAS# AB3 P5 M_B_A14
SA_RAS# SB_MA14 M_B_A15
18 M_A_W E# AE9 SA_WE# SB_MA15 N1
A <Core Design> A
Wistron Corporation
Title
CPU - DDR (3/7)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CPU
D D
CPU Piin AJ13 and AJ12:

Core voltage sense line.
Via from PGA pad to the back of the MB
CPU1E 5 OF 9 and provide test point.
AJ13 H_RSVD32 1
Do not route any additional trace.
TP1118
AUBURNDALE
RSVD#AJ13 H_RSVD33
AJ12 1 TP1119
RSVD#AJ12
AP25
SO-DIMM VREFDQ (M3) Circuit AL25
RSVD#AP25
RSVD#AL25 RSVD#AH25
AH25
AL24 AK26 H_RSVD35 1 TP1120
for Clarksfield Processor AL22
RSVD#AL24
RSVD#AL22
RSVD#AK26
H_RSVD36
AJ33 AL26 1 TP1121
RSVD#AJ33 RSVD#AL26
AG9 AR2
RSVD#AG9 RSVD_NCTF#AR2
M27
RSVD#M27
L28 AJ26
TP1116 SA_DIMM_VREF# RSVD#L28 RSVD#AJ26
1 J17 AJ27
TP1117 SB_DIMM_VREF# SA_DIMM_VREF# RSVD#AJ27
1 H17
SB_DIMM_VREF#
G25
RSVD#G25
G17
RSVD#G17
E31
RSVD#E31
E30
RSVD#E30
C AL28 C
CFG0 RSVD#AL28
AM30 AL29
CFG1 CFG0 RSVD#AL29
TP1101 1 AM28 AP30
CFG2 CFG1 RSVD#AP30
TP1102 1 AP31 AP32
CFG3 CFG2 RSVD#AP32
AL32 AL27
CFG4 CFG3 RSVD#AL27
AL30 AT31
CFG5 CFG4 RSVD#AT31
TP1103 1 AM31 AT32
CFG6 CFG5 RSVD#AT32
TP1104 1 AN29 AP33
CFG7 CFG6 RSVD#AP33
AM32 AR33
CFG8 CFG7 RSVD#AR33
TP1105 1 AK32
CFG9 CFG8
TP1106 1 AK31
RESERVED
CFG10 CFG9
TP1107 1 AK28
CFG11 CFG10
TP1108 1 AJ28
CFG12 CFG11
TP1109 1 AN30 AR32
CFG13 CFG12 RSVD#AR32
TP1110 1 AN32
CFG14 CFG13
TP1111 1 AJ32
CFG15 CFG14
TP1112 1 AJ29 E15
CFG16 CFG15 RSVD_TP#E15
TP1113 1 AJ30 F15
CFG0 CFG17 CFG16 RSVD_TP#F15
TP1114 1 AK30 A2
CFG17 KEY
PCI-Express Configuration Select H16
RSVD_TP#H16 RSVD#D15
D15
1
C15
R1102 RSVD#C15
AJ15
RSVD#AJ15
DY 3K01R2F-3-GP 1:Single PEG RSVD#AH15
AH15
CFG0 0:Bifurcation enabled B19
2
RSVD#B19
For Clarksfield A19
RSVD#A19
A20
RSVD#A20
B20
RSVD#B20
AA5
CFG3 RSVD_TP#AA5
U9 AA4
RSVD#U9 RSVD_TP#AA4
CFG3 - PCI-Express Static Lane Reversal T9 R8
1
RSVD#T9 RSVD_TP#R8
AD3
R1105 RSVD_TP#AD3
B AC9 AD2 B
3K3R2J-3-GP RSVD#AC9 RSVD_TP#AD2
1 :Normal Operation AB9
RSVD#AB9 RSVD_TP#AA2
AA2
CFG3 0 :Lane Numbers Reversed RSVD_TP#AA1
AA1
R9
2
15 -> 0, 14 -> 1, ... RSVD_TP#R9

AG7
RSVD_TP#AG7
AE3
RSVD_TP#AE3
V4
RSVD_TP#V4
V5
CFG4 RSVD_TP#V5
N2
RSVD_TP#N2
CFG4 - Display Port Presence J29
RSVD#J29 RSVD_TP#AD5
AD5 VSS (AP34) can be left NC is
1
J28 AD7
R1109 RSVD#J28 RSVD_TP#AD7
W3 CRB implementation; EDS/DG
RSVD_TP#W3
DY 3K01R2F-3-GP 1:Disabled; No Physical Display Port RSVD_TP#W2
W2 recommendation to GND.
CFG4 attached to Embedded Display Port RSVD_TP#N3
N3
AE5
2
0:Enabled; An external Display Port RSVD_TP#AE5

AD9
RSVD_TP#AD9
device is connected to the Embedded
Display Port AP34 RSVD_VSS 1 2
VSS
R1117
0R0402-PAD-2-GP
CFG7
CFG7(Reserved) - Temporarily used for early
1
R1103 Clarksfield samples.

DY 3K01R2F-3-GP
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor.
2
A A
Note: Only temporary for early CFD sample <Core Design>

(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
Wistron Corporation
the pull-down resistor shouble be used. Does Taipei Hsien 221, Taiwan, R.O.C.
not impact AUB functionality.
Title
Size
CPU - Reserve (4/7)
Document Number Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CPU CPU1F 6 OF 9
AUBURNDALE
+VCC_CORE
+1.05V_VTT
PROCESSOR CORE POWER
AG35 AH14
VCC VTT0
AG34 AH12
1
VCC VTT0 C1202 C1203 C1204 C1205 C1206 C1216 C1207 C1208 C1209
AG33 AH11
+VCC_CORE 48A AG32
VCC
VCC
VTT0
VTT0
AH10 DY
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5KX-2GP
AG31 J14
2
VCC VTT0
D AG30 J13 D
VCC VTT0
AG29 H14
C1210 C1211 C1212 C1213 C1214 C1215 VCC VTT0
AG28 H12
VCC VTT0
1
1
AG27 G14
VCC VTT0
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
AG26 G13
VCC VTT0
AF35 G12
2
2
VCC VTT0
AF34 G11
VCC VTT0
AF33 F14
VCC VTT0
AF32 F13
VCC VTT0 +1.05V_VTT
AF31 F12
VCC VTT0
AF30 F11
VCC VTT0
AF29
VCC VTT0
E14 The decoupling capacitors, filter
AF28 E12
VCC VTT0 recommendations and sense resistors on the
1
AF27 D14 C1217 C1218 C1219
VCC VTT0
AF26
VCC VTT0
D13 CPU/PCH Rails are specific to the CRB
SC22U6D3V5MX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1.1V RAIL POWER
C1220 C1221 C1222 C1223 C1224 C1225 AD35 D12
2
VCC VTT0 Implementation. Customers need to follow the
1
1
AD34 D11
VCC VTT0
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5KX-2GP
AD33
VCC VTT0
C14 recommendations in the Calpella Platform
AD32 C13
2
AD31
VCC VTT0
C12 Design Guide.
VCC VTT0
AD30 C11
VCC VTT0
AD29 B14
VCC VTT0
AD28 B12
VCC VTT0
AD27 A14
VCC VTT0
AD26 A13
VCC VTT0
AC35 A12
VCC VTT0
AC34 A11
VCC VTT0
AC33
C1226 C1227 C1228 C1229 C1230 C1231 C1232 C1233 VCC +1.05V_VTT
AC32
VCC
1
AC31
VCC
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
AC30 AF10
VCC VTT0
AC29 AE10
2
VCC VTT0
AC28 AC10
VCC VTT0
1
CPU CORE SUPPLY
C AC27 AB10 C1234 C1235 C
VCC VTT0 SC10U10V5KX-2GP SC22U6D3V5MX-2GP
AC26 Y10
VCC VTT0
AA35 W10
2
VCC VTT0
AA34 U10
VCC VTT0
AA33 T10
VCC VTT0
AA32 J12
VCC VTT0
AA31 J11
VCC VTT0
AA30 J16
C1201 C1236 C1237 C1238 C1239 C1240 C1241 C1242 VCC VTT0
AA29 J15
1
VCC VTT0
AA28
VCC
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC22U6D3V5MX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY DY AA27
VCC
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
AA26
2
VCC
Y35
Y34
VCC Please note that
VCC
Y33
Y32
VCC The VTT Rail values are
VCC
Y31
VCC Arrandale for VTT=1.05V
Y30
VCC
Y29
VCC Clarksfield for VTT=1.1V
Y28
VCC
Y27
VCC
Y26
VCC
V35 AN33 PSI# 47
VCC PSI#
V34
VCC
V33 H_VID[6..0] 47
VCC H_VID0
V32 AK35
VCC VID0 H_VID1
V31 AK33
VCC VID1 H_VID2
V30 AK34
V29
VCC
VCC
POWER VID2
VID3
AL35 H_VID3
CPU VIDS
V28 AL33 H_VID4
VCC VID4 H_VID5
V27 AM33
VCC VID5 H_VID6
V26 AM35
VCC VID6
U35 AM34 PM_DPRSLPVR 47
VCC PROC_DPRSLPVR
B U34 B
VCC
U33
VCC
U32
VCC H_VTTVID1
U31 G15 1 TP1201
VCC VTT_SELECT
U30
VCC
U29
VCC Arrandale drives this pin High for 1.05V
U28
U27
VCC Clarksfield drives this pin Low for 1.1V
VCC +VCC_CORE
U26
VCC
R35
VCC R1205
R34
1
VCC 0R0402-PAD-2-GP R1202
R33
VCC CPU_IMON_R 100R2F-L1-GP-U
R32 AN35 1 2 CPU_IMON 39,47
VCC ISENSE
R31
VCC R1203
R30
VCC 0R0402-PAD-2-GP
R29
2
VCC VCC_SENSE_R
SENSE LINES
R28 AJ34 1 2 VCC_SENSE 47

VCC VCC_SENSE VSS_SENSE_R
R27 AJ35 1 2 VSS_SENSE 47
VCC VSS_SENSE R1206 R1201
R26
1
VCC 0R2J-2-GP 0R0402-PAD-2-GP
P35
VCC VTT_SENSE_R R1204
P34 B15 1 DY 2 VTT_SENSE 52
1
VCC VTT_SENSE TP_VSS_SENSE_VTT 1 100R2F-L1-GP-U
P33 A15 TP1202
VCC VSS_SENSE_VTT
P32
VCC
P31 DY DY
27D4R2F-L1-GP
27D4R2F-L1-GP
2
VCC
P30
VCC
R1207
R1208
P29
2
VCC
P28
VCC
P27
VCC
P26
VCC
VSS_SENSE_R 47
A A
<Core Design>
Wistron Corporation
Title

CPU - VCC_CORE (5/7) Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1G 7 OF 9
AT21 VAXG1
AUBURNDALE
AT19 VAXG2 VAXG_SENSE AR22
SENSE
LINES
D AT18 VAXG3 VSSAXG_SENSE AT22 D
AT16 VAXG4
AR21 VAXG5
AR19 VAXG6
AR18 VAXG7
AR16 VAXG8 GFX_VID0 AM22
AP21 VAXG9 GFX_VID1 AP22
GRAPHICS VIDs
AP19 VAXG10 GFX_VID2 AN22
AP18 VAXG11 GFX_VID3 AP23
AP16 VAXG12 GFX_VID4 AM23
AN21 VAXG13 GFX_VID5 AP24
GRAPHICS
AN19 VAXG14 GFX_VID6 AN24
AN18 VAXG15
AN16 VAXG16
AM21 VAXG17 GFX_VR_EN AR25 R1301
AM19 VAXG18 GFX_DPRSLPVR AT25
AM18 AM24 GFX_IMON_R 1 2
VAXG19 GFX_IMON
AM16 VAXG20
AL21 1KR2J-1-GP
VAXG21 +1.5V_RUN_CPU
AL19 VAXG22
AL18
AL16
AK21
VAXG23
VAXG24
AJ1
3A
VAXG25 VDDQ
AK19 VAXG26 VDDQ AF1
1
AK18 AE7 C1309 C1310 C1311 C1312 C1313 C1314 C1315 TC1304
- 1.5V RAILS
VAXG27 VDDQ
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V5KX-1GP
SC22U6D3V5MX-2GP
AK16 AE4 DY SE330U2VDM-L-GP
VAXG28 VDDQ
AJ21 AC1
2
VAXG29 VDDQ
AJ19 VAXG30 VDDQ AB7
AJ18 VAXG31 VDDQ AB4
C AJ16 Y1 C
VAXG32 VDDQ
AH21 VAXG33 VDDQ W7
AH19 VAXG34 VDDQ W4
AH18 VAXG35 VDDQ U1
AH16 VAXG36 VDDQ T7
VDDQ T4
POWER
VDDQ P1
VDDQ N7
+1.05V_VTT N4
VDDQ
DDR3
VDDQ L1
J24 VTT1 VDDQ H1
FDI
J23 VTT1
H25 VTT1
1
C1316 C1317 +1.05V_VTT

SC10U10V5KX-2GP SC10U10V5KX-2GP
P10
2
VTT1
VTT1 N10
1
L10 C1318 C1319
VTT1 SC22U6D3V5MX-2GP SC10U10V5KX-2GP
VTT1 K10
2
+1.05V_VTT
+1.05V_VTT
18A
1.1V
VTT1 J22
K26 VTT1 VTT1 J20
1
J27 J18 C1324 C1325
VTT1 VTT1
PEG & DMI

C1320 C1321 C1322 C1323 J26 H21 SC10U10V5KX-2GP SC10U10V5KX-2GP
VTT1 VTT1
1
J25 H20
2
VTT1 VTT1
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC22U6D3V5MX-2GP
H27 VTT1 VTT1 H19

B B
G28
2
VTT1
G27 VTT1
G26 +1.8V_RUN
VTT1
F26 VTT1
E26 VTT1 VCCPLL VTT1 L26
1.8V
E25 L27
VTT1 VCCPLL VTT1
1.35A
1
VCCPLL VTT1 M26 C1326 C1327 C1328 C1329 C1330
SC1U25V5KX-1GP
SC1U25V5KX-1GP
SC4D7U6D3V3KX-GP
SC2D2U10V5KX-2GP
SC22U6D3V5MX-2GP
DY
2
Please note that the VTT Rail Values
Arrandale for VTT=1.05V
Clarksfield for VTT=1.1V
A <Core Design> A
Wistron Corporation
Title
CPU - GFXCORE (6/7)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9
CPU1I 9 OF 9
AT20 VSS VSS AE34
AT17 VSS VSS AE33
AUBURNDALE
AR31 VSS VSS AE32
AUBURNDALE
AR28 VSS VSS AE31 K27 VSS
D AR20 VSS VSS AE27 J32 VSS D
AR17 VSS VSS AE26 J30 VSS
AR15 VSS VSS AE6 J21 VSS
AR12 VSS VSS AD10 J19 VSS
AR9 VSS VSS AC8 H35 VSS
AP20 VSS VSS AB35 H26 VSS
AN34 VSS VSS AB28 H8 VSS
AN20 VSS VSS AB6 G34 VSS
AN17 VSS VSS AA10 G31 VSS AT35 AR35 B35 A35
AM29 VSS VSS Y8 G20 VSS AT34 A34
AM27 VSS VSS Y4 G9 VSS
AM25 VSS VSS Y2 G6 VSS 3X 2X
AM20 VSS VSS W35 G3 VSS
AM17 VSS VSS W34 F30 VSS
AM14
AM11
VSS VSS W33
W32
F27
F25
VSS NCTF
VSS VSS VSS
AM8 VSS VSS W31 F22 VSS CPU1, Board Top View
C AL34 W28 E35 4X 1X C
AL31
AL23
VSS
VSS
VSS
VSS VSS
VSS
VSS
W27
W26
E32
E29
VSS
VSS
VSS VSS AT2
A3
AL20 VSS VSS W6 E24 VSS AT1 AR1 C1 B1
AL17 VSS VSS V10 E21 VSS
AL12 VSS VSS U8 E18 VSS
AL3 VSS VSS T35 E8 VSS
AK29 VSS VSS T34 E5 VSS
AK27 VSS VSS T33 E2 VSS VSS_NCTF#AR34 AR34
AK25 VSS VSS T32 D33 VSS VSS_NCTF#B34 B34
AK20 T31 D30 B2
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
VSS VSS VSS VSS_NCTF#B2
AK17 T30 D26
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
VSS VSS VSS
AJ31 VSS VSS T29 D9 VSS
AJ23 T28 D6 B1 TP_MCP_VSS_NCTFB1 1
VSS VSS VSS VSS_NCTF#B1 TP1401
AJ20 T27 D3 A35 TP_MCP_VSS_NCTFA35 1
VSS VSS VSS VSS_NCTF#A35 TP1404
AJ17 T26 C34 AT1 TP_MCP_VSS_NCTFAT1 1
VSS VSS VSS VSS_NCTF#AT1 TP1410
AJ14 T6 C32 AT35 TP_MCP_VSS_NCTFAT35 1
VSS VSS VSS VSS_NCTF#AT35 TP1407
AJ11 VSS VSS R10 C29 VSS RSVD_NCTF#AT33 AT33
AJ8 P8 C28 AT34 TP_MCP_VSS_NCTFAT34 1
VSS VSS VSS RSVD_NCTF#AT34 TP1409
AJ5 VSS VSS P4 C24 VSS RSVD_NCTF#AP35 AP35
AJ2 P2 C22 AR35 TP_MCP_VSS_NCTFAR35 1
VSS VSS VSS RSVD_NCTF#AR35 TP1408
AH35 VSS VSS N35 C20 VSS RSVD_NCTF#AT3 AT3
AH34 N34 C19 AR1 TP_MCP_VSS_NCTFAR1 1
VSS VSS VSS RSVD_NCTF#AR1 TP1412
AH33 VSS VSS N33 C16 VSS RSVD_NCTF#AP1 AP1
AH32 N32 B31 AT2 TP_MCP_VSS_NCTFAT2 1
VSS VSS VSS RSVD_NCTF#AT2 TP1411
AH31 N31 B25 C1 TP_MCP_VSS_NCTFC1 1
VSS VSS VSS RSVD_NCTF#C1 TP1402
AH30 N30 B21 A3 TP_MCP_VSS_NCTFA3 1
NCTF TEST PIN:

B VSS VSS VSS RSVD_NCTF#A3 TP1403 B
AH29 VSS VSS N29 B18 VSS RSVD_NCTF#C35 C35
AH28 VSS VSS N28 B17 VSS RSVD_NCTF#B35 B35
AH27 N27 B13 A34 TP_MCP_VSS_NCTFA34 1
VSS VSS VSS RSVD_NCTF#A34 TP1405
AH26 VSS VSS N26 B11 VSS RSVD_NCTF#A33 A33
AH20 VSS VSS N6 B8 VSS
AH17 VSS VSS M10 B6 VSS
AH13 VSS VSS L35 B4 VSS
AH9 VSS VSS L32 A29 VSS
AG10 VSS VSS L5 A9 VSS
AF8 VSS VSS L2
AF4 VSS VSS K34
AF2 VSS VSS K33 All NCTF pins should be Test
AE35 K30
VSS VSS Points and should be routed as
trace.
A <Core Design> A
Wistron Corporation
Title
CPU - VSS (7/7)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Memory SO-DIMMA

M_A_DM[7..0] 10
DM1 M_A_DQS#[7..0] 10
M_A_A0 98
H = 9.2mm NP1 +3.3V_RUN
M_A_A1 A0 NP1
97 NP2 M_A_DQS[7..0] 10
M_A_A2 A1 NP2
96
M_A_A3 A2
95 110 M_A_RAS# 10 M_A_A[15..0] 10
A3 RAS#
1
M_A_A4 92 113 M_A_WE# 10
M_A_A5 A4 WE# R1802
91 115 M_A_CAS# 10
A5 CAS#
M_A_A6
M_A_A7
90
A6 DY 10KR2J-3-GP
86 114 M_CS#0 10
M_A_A8 A7 CS0#
89 121 M_CS#1 10
2
M_A_A9 A8 CS1#
85
M_A_A10 A9
D 107 73 M_CKE0 10 D
M_A_A11 A10/AP CKE0 SA0_DIMM1
84 74 M_CKE1 10
M_A_A12 A11 CKE1
83
M_A_A13 A12 SA1_DIMM1
119 101 M_CLK_DDR0 10
M_A_A14 A13 CK0
80 103 M_CLK_DDR#0 10
M_A_A15 A14 CK0#
78
A15
2
10 M_A_BS2 79 102 M_CLK_DDR1 10
A16/BA2 CK1 R1803 R1801
104 M_CLK_DDR#1 10
CK1# 0R0402-PAD-2-GP
10 M_A_BS0 109 0R0402-PAD-2-GP
BA0 M_A_DM0
10 M_A_BS1 108 11
BA1 DM0 M_A_DM1
10 M_A_DQ[63..0] 28
1
M_A_DQ0 DM1 M_A_DM2
5 46
M_A_DQ1 DQ0 DM2 M_A_DM3
7 63
15 136
17 153
4 170
6 187
M_A_DQ6 DQ5 DM7
16
DQ6 R1804 1
M_A_DQ7 18 200 SODIMM1_1_SMB_DATA_R 2 0R0402-PAD-2-GP PCH_SMBDATA_MEM 19,23,40,58
DQ7 SDA R1805 1
M_A_DQ8 21 202 SODIMM1_1_SMB_CLK_R 2 0R0402-PAD-2-GP PCH_SMBCLK_MEM 19,23,40,58 Note:
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 +3.3V_RUN If SA0 DIM0 = 0, SA1_DIM0 = 0
33 198
M_A_DQ11 DQ10 EVENT#
35 SO-DIMMA SPD Address is 0xA0
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD SO-DIMMA TS Address is 0x30
24
1
M_A_DQ14 DQ13 SA0_DIMM1 C1802 C1803
34 197
M_A_DQ15 DQ14 SA0 SA1_DIMM1
36
DQ15 SA1
201 DY DY
SC2D2U16V3KX-GP
SCD1U10V2KX-5GP
M_A_DQ16 39 If SA0 DIM0 = 1, SA1_DIM0 = 0
2
M_A_DQ17 DQ16
41 77
M_A_DQ18 51
DQ17 NC#1
122 SO-DIMMA SPD Address is 0xA2
DQ18 NC#2 +1.5V_SUS
M_A_DQ19 53
DQ19 NC#/TEST
125 SO-DIMMA TS Address is 0x32
M_A_DQ20 40
M_A_DQ21 DQ20
42 75
M_A_DQ22 DQ21 VDD1
C 50 76 C
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
M_A_DQ25
57
DQ24 VDD4
82 SODIMM A DECOUPLING
59 87
M_A_DQ26 DQ25 VDD5 +1.5V_SUS
67 88
M_A_DQ27 DQ26 VDD6
69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
58 99
M_A_DQ30 DQ29 VDD9
68 100
M_A_DQ31 DQ30 VDD10
70 105
M_A_DQ32 DQ31 VDD11 TC1801 C1804 C1805 C1806 C1807 C1808 C1801 C1809 C1810
129 106
DQ32 VDD12
1
SE330U2VDM-L-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
M_A_DQ33 131 111 0904 SA
M_A_DQ34 DQ33 VDD13
M_A_DQ35
141
DQ34 VDD14
112 DY DY DY
143 117
2
M_A_DQ36 DQ35 VDD15
+V_DDR_MCH_REF M_A_DQ37
130
DQ36 VDD16
118 Layout Note:
132 123
M_A_DQ38 DQ37 VDD17 Place these Caps near
140 124
M_VREF_CA_DIMM1 M_A_DQ39 DQ38 VDD18
1 2 142 SO-DIMMA.
R1807 M_A_DQ40 DQ39
147 2
1
0R0603-PAD-2-GP M_A_DQ41 DQ40 VSS

149 3
C1811 C1812 M_A_DQ42 DQ41 VSS
157 8
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_A_DQ43 DQ42 VSS
159 9
2
M_A_DQ44 DQ43 VSS C1813 C1814 C1815 C1816 C1817 C1818 C1819
146 13
DQ44 VSS
1
SCD1U16V2KX-3GP
SCD1U10V2KX-5GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_A_DQ45 148 14
M_A_DQ46 DQ45 VSS
158 19
M_A_DQ47 DQ46 VSS
160 20
2
M_A_DQ48 DQ47 VSS
163 25
M_A_DQ49 DQ48 VSS
165 26
M_A_DQ50 DQ49 VSS
175 31
+V_DDR_MCH_REF M_A_DQ51 DQ50 VSS
177 32
M_A_DQ52 DQ51 VSS
164 37
M_VREF_DQ_DIMM1 M_A_DQ53 DQ52 VSS
1 2 166 38
R1808 M_A_DQ54 DQ53 VSS
174 43
DQ54 VSS
1
B 0R0603-PAD-2-GP M_A_DQ55 176 44 B

C1820 C1821 M_A_DQ56 DQ55 VSS
181 48
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_A_DQ57 DQ56 VSS
183 49
2
M_A_DQ58 DQ57 VSS

191 54
M_A_DQ59 DQ58 VSS
193 55
M_A_DQ60 DQ59 VSS
180 60
M_A_DQ61 DQ60 VSS
182 61
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
Place between DM1 and DM2. 194
DQ63 VSS
66
+1.5V_SUS +1.5V_RUN_CPU
71
+0.75V_DDR_VTT M_A_DQS#0 VSS
10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45
DQS2# VSS
128
C1827
1 DY2 SCD1U16V2ZY-2GP
M_A_DQS#3 62 133 Near Memory Near CPU
1
+0.75V_DDR_VTT C1822 M_A_DQS#4 DQS3# VSS

SC10U10V5KX-2GP M_A_DQS#5
135
DQS4# VSS
134 +1.5V_SUS C1828
1 DY2 SCD1U16V2ZY-2GP +1.5V_RUN
152 138
M_A_DQS#6 DQS5# VSS Plane Plane
169 139 1 DY2
2
DQS6# VSS
1
M_A_DQS#7 186 144 C1829 SCD1U16V2ZY-2GP

R1809 DQS7# VSS
0R0603-PAD-2-GP M_A_DQS0 VSS
145
C1830
1 DY2 SCD1U16V2ZY-2GP
12 150
M_A_DQS1 DQS0 VSS
29 151
M_A_DQS2 DQS1 VSS
47 155
2
M_A_DQS3 DQS2 VSS

64 156
M_A_DQS4 DQS3 VSS
Place these caps M_A_DQS5
137
DQS4 VSS
161
154 162
close to VTT1 and MA_VTT M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
VTT2. 188 168
DQS7 VSS
172
VSS
10 M_ODT0 116 173
ODT0 VSS
10 M_ODT1
120 178
ODT1 VSS
179
1
C1823 C1824 C1825 C1826 M_VREF_CA_DIMM1 VSS

126 184
M_VREF_DQ_DIMM1 VREF_CA VSS
1 185
VREF_DQ VSS
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
A 189 A
2
VSS
9,19 DDR3_DRAMRST#
30 190
RESET# VSS
195 <Core Design>
VSS
196
MA_VTT VSS
203 205
VTT1 VSS
204
VTT2 VSS
206
Wistron Corporation
DDR3-204P-42-GP
62.10017.N61 Title
Main:62.10017.N61 DDR III Socket - DM1
2nd:62.10017.F91 Custom
5 4 3 2 1
5 4 3 2 1
DM2 SO-DIMMB
SSID = Memory H = 5.2mm
M_B_A0 98 NP1 M_B_DM[7..0] 10
M_B_A1 A0 NP1 +3.3V_RUN
97 NP2
M_B_A2 A1 NP2
96 M_B_DQS#[7..0] 10
M_B_A3 A2
95 110 M_B_RAS# 10
M_B_A4 A3 RAS#
92 113 M_B_WE# 10
A4 WE#
1
M_B_A5 91 115 M_B_CAS# 10 M_B_DQS[7..0] 10
M_B_A6 A5 CAS# R1902
90
M_B_A7 A6 10KR2J-3-GP
86 114 M_CS#2 10 M_B_A[15..0] 10
M_B_A8 A7 CS0#
89 121 M_CS#3 10
M_B_A9 A8 CS1#
85
2
M_B_A10 A9
107 73 M_CKE2 10
M_B_A11 A10/AP CKE0
84 74 M_CKE3 10
M_B_A12 A11 CKE1 SA1_DIMM2
D 83 D
M_B_A13 A12
119 101 M_CLK_DDR2 10
M_B_A14 A13 CK0 SA0_DIMM2
80 103 M_CLK_DDR#2 10
M_B_A15 A14 CK0#
78
A15
10 M_B_BS2 79 102 M_CLK_DDR3 10
2
A16/BA2 CK1
104 M_CLK_DDR#3 10
CK1# R1903 R1904
10 M_B_BS0 109
BA0 M_B_DM0 0R0402-PAD-2-GP
10 M_B_BS1
108
BA1 DM0
11
M_B_DM1
DY 0R2J-2-GP
10 M_B_DQ[63..0] 28
M_B_DQ0 DM1 M_B_DM2
5 46
1
M_B_DQ1 DQ0 DM2 M_B_DM3
7 63
15 136
17 153
4 170
6 187
M_B_DQ6 DQ5 DM7
16
DQ6 R1905 1
M_B_DQ7 18 200 SODIMM2_1_SMB_DATA_R 2 0R0402-PAD-2-GP PCH_SMBDATA_MEM 18,23,40,58
M_B_DQ8 DQ7 SDA SODIMM2_1_SMB_CLK_R R1906 1
21 202 2 0R0402-PAD-2-GP PCH_SMBCLK_MEM 18,23,40,58
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9
33 198
M_B_DQ11 DQ10 EVENT# +3.3V_RUN
35
M_B_DQ12 DQ11
22 199
M_B_DQ13 DQ12 VDDSPD
24
DQ13
1
M_B_DQ14 34 197 SA0_DIMM2 C1902 C1903
M_B_DQ15 DQ14 SA0 SA1_DIMM2
36
DQ15 SA1
201 DY DY
SC2D2U16V3KX-GP
SCD1U10V2KX-5GP
M_B_DQ16 39
2
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 122
M_B_DQ19 DQ18 NC#2 +1.5V_SUS
53 125
M_B_DQ20 DQ19 NC#/TEST
40
M_B_DQ21 DQ20
42 75
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 81
M_B_DQ24 DQ23 VDD3
C 57 82 C
M_B_DQ25 DQ24 VDD4
59 87
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 99
M_B_DQ30 DQ29 VDD9
68 100
M_B_DQ31 DQ30 VDD10
70 105
+V_DDR_MCH_REF M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111
M_VREF_CA_DIMM2 M_B_DQ34 DQ33 VDD13
1 2 141 112
R1907 M_B_DQ35 DQ34 VDD14
143 117
1
0R0603-PAD-2-GP M_B_DQ36 DQ35 VDD15

130 118
C1904 C1905 M_B_DQ37 DQ36 VDD16
132 123
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_B_DQ38 DQ37 VDD17
140 124
2
M_B_DQ39 DQ38 VDD18

142
M_B_DQ40 DQ39
M_B_DQ41
147
DQ40 VSS
2 SODIMM B DECOUPLING
149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS +1.5V_SUS
159 9
M_B_DQ44 DQ43 VSS
146 13
M_B_DQ45 DQ44 VSS
+V_DDR_MCH_REF M_B_DQ46
148
DQ45 VSS
14 Layout Note:
158 19
M_B_DQ47 DQ46 VSS Place these Caps near
160 20
M_VREF_DQ_DIMM2 M_B_DQ48 DQ47 VSS C1906 C1901 C1907 C1908 C1909 C1910 C1911 C1912
1 2 163 25 SO-DIMMB.
DQ48 VSS
1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R1908 M_B_DQ49 165 26
DQ49 VSS
1
0R0603-PAD-2-GP M_B_DQ50 175 31 DY DY

C1913 C1914 M_B_DQ51 DQ50 VSS
177 32
2
SCD1U10V2KX-5GP SC2D2U16V3KX-GP M_B_DQ52 DQ51 VSS
164 37
2
M_B_DQ53 DQ52 VSS

166 38
M_B_DQ54 DQ53 VSS
174 43
M_B_DQ55 DQ54 VSS
176 44
M_B_DQ56 DQ55 VSS
181 48
M_B_DQ57 DQ56 VSS
B 183 49 B
M_B_DQ58 DQ57 VSS
191 54
M_B_DQ59 DQ58 VSS
193 55
M_B_DQ60 DQ59 VSS C1915 C1916 C1917 C1918 C1919 C1920 C1921
180 60
1
DQ60 VSS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_B_DQ61 182 61
M_B_DQ62 DQ61 VSS
M_B_DQ63
192
DQ62 VSS
65 DY DY
194 66
2
DQ63 VSS
71
M_B_DQS#0 VSS
10 72
M_B_DQS#1 DQS0# VSS
27 127
M_B_DQS#2 DQS1# VSS
45 128
M_B_DQS#3 DQS2# VSS
62 133
M_B_DQS#4 DQS3# VSS
135 134
M_B_DQS#5 DQS4# VSS
152 138
M_B_DQS#6 DQS5# VSS
169 139
M_B_DQS#7 DQS6# VSS
186 144
DQS7# VSS
145
M_B_DQS0 VSS
12 150
M_B_DQS1 DQS0 VSS
29 151
M_B_DQS2 DQS1 VSS
47 155
M_B_DQS3 DQS2 VSS
64 156
M_B_DQS4 DQS3 VSS
137 161
M_B_DQS5 DQS4 VSS
154 162
M_B_DQS6 DQS5 VSS
171 167
M_B_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
+0.75V_DDR_VTT VSS
10 M_ODT2 116 173
ODT0 VSS
10 M_ODT3 120 178
ODT1 VSS
179
1
M_VREF_CA_DIMM2 VSS
126 184
R1909 M_VREF_DQ_DIMM2 VREF_CA VSS
1 185
0R0603-PAD-2-GP VREF_DQ VSS
189
VSS
9,18 DDR3_DRAMRST# 30 190
RESET# VSS
A 195 A
2
VSS
MB_VTT VSS
196 Note:
203 205 <Core Design>
VTT1 VSS SO-DIMMB SPD Address is 0xA4
204 206
VTT2 VSS
SO-DIMMB TS Address is 0x34
Place these caps Wistron Corporation
1
close to VTT1 and C1922 C1923 C1924 C1925 DDR3-204P-48-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VTT2. 62.10017.P41 SO-DIMMB is placed farther from
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
Main:62.10017.P41 the Processor than SO-DIMMA Title
2nd:62.10017.F81 Size Document Number

DDR III Socket - DM2 Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1D 4 OF 10
T48 L_BKLTEN SDVO_TVCLKINN BJ46
T47 L_VDD_EN SDVO_TVCLKINP BG46
D D
Y48 L_BKLTCTL SDVO_STALLN BJ48
SDVO_STALLP BG48
AB48 L_DDC_CLK
Y45 L_DDC_DATA SDVO_INTN BF45
SDVO_INTP BH45
AB46 L_CTRL_CLK
V48 L_CTRL_DATA
AP39 LVD_IBG SDVO_CTRLCLK T51
AP41 LVD_VBG SDVO_CTRLDATA T53
AT43 LVD_VREFH
AT42 LVD_VREFL DDPB_AUXN BG44
DDPB_AUXP BJ44
DDPB_HPD AU38
LVDS
AV53 LVDSA_CLK#
AV51 LVDSA_CLK DDPB_0N BD42
DDPB_0P BC42
BB47 LVDSA_DATA#0 DDPB_1N BJ42
BA52 BG42
Digital Display Interface

LVDSA_DATA#1 DDPB_1P
AY48 LVDSA_DATA#2 DDPB_2N BB40
AV47 LVDSA_DATA#3 DDPB_2P BA40
DDPB_3N AW38
BB48 LVDSA_DATA0 DDPB_3P BA38
BA50 LVDSA_DATA1
AY49 LVDSA_DATA2
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
C C
AP48 LVDSB_CLK#
AP47 LVDSB_CLK DDPC_AUXN BE44
DDPC_AUXP BD44
AY53 LVDSB_DATA#0 DDPC_HPD AV40
AT49 LVDSB_DATA#1
AU52 LVDSB_DATA#2 DDPC_0N BE40
AT53 LVDSB_DATA#3 DDPC_0P BD40
DDPC_1N BF41
AY51 LVDSB_DATA0 DDPC_1P BH41
AT48 LVDSB_DATA1 DDPC_2N BD38
AU50 LVDSB_DATA2 DDPC_2P BC38
AT51 LVDSB_DATA3 DDPC_3N BB36
DDPC_3P BA36
AA52 CRT_BLUE DDPD_CTRLCLK U50

AB53 CRT_GREEN DDPD_CTRLDATA U52
AD53 CRT_RED
DDPD_AUXN BC46
V51 CRT_DDC_CLK DDPD_AUXP BD46
V53 CRT_DDC_DATA DDPD_HPD AT38
DDPD_0N BJ40
Y53 CRT_HSYNC DDPD_0P BG40
Y51 CRT_VSYNC DDPD_1N BJ38
DDPD_1P BG38
CRT
DDPD_2N BF37
B CRT_IREF B
AD48 DAC_IREF DDPD_2P BH37
AB51 CRT_IRTN DDPD_3N BE36
DDPD_3P BD36
1
R2019 IBEXPEAK-M-GP-NF
1KR2J-1-GP
2
A <Core Design> A
Wistron Corporation
Title
PCH - LVDS/CRT/DDI (1/9)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
DMI Termination Voltage

SSID = PCH +3.3V_ALW _PCH H40
PCH1E
AD0
5 OF 10
NV_CE#0 AY9 NV_CLE Set to Vss when low.
N34 BD1 Set to Vcc when high. +V_NVRAM_VCCQ
AD1 NV_CE#1
C44 AD2 NV_CE#2 AP15
A38 AD3 NV_CE#3 BD8 DMI termination voltage
1
14
C36 AD4 Weak internal pull-up
RN2102 +3.3V_RUN U2101A J34 AV9 R2103
PCI_REQ0# AD5 NV_DQS0 Do not pull low
PCH_PIRQF#
1 10
PCI_REQ1#
1 A40 AD6 NV_DQS1 BG8 DY 1KR2J-1-GP
2 9 3 D45 AD7
INT_PIRQB# 3 8 PCI_SERR# 2 E36 AP7
2
AD8 NV_DQ0/NV_IO0
PCI_PLOCK# 4 7 PCI_TRDY# H48 AD9 NV_DQ1/NV_IO1 AP6 Check list 1.6
5 6 PCI_PERR# TSLVC08APW -1-GP E40 AT6 If not implemented, the dual channel NV_CLE
7
RN2105 AD10 NV_DQ2/NV_IO2
D +3.3V_RUN C40 AD11 NV_DQ3/NV_IO3 AT9 NAND interface signals, including D
SRN8K2J-2-GP-U 2 3 PLTRST1# 9,58,80 M48 BB1
AD12 NV_DQ4/NV_IO4 NV_RCOMP, can be left as No Connect
1 4 PLTRST2# 32,34,58,72 M45 AD13 NV_DQ5/NV_IO5 AV6
F53 AD14 NV_DQ6/NV_IO6 BB3
SRN33J-5-GP-U M40 BA4
AD15 NV_DQ7/NV_IO7
NVRAM
RN2101
14
+3.3V_RUN M43 AD16 NV_DQ8/NV_IO8 BE4
PCI_FRAME# 1 10 U2101B J36 BB6 +V_NVRAM_VCCQ
PCI_DEVSEL# 2 INT_PIRQA# AD17 NV_DQ9/NV_IO9
9 4 K48 AD18 NV_DQ10/NV_IO10 BD6
INT_PIRQD# 3 8 INT_PIRQC# 6 F40 BB7
AD19 NV_DQ11/NV_IO11
1
4 7 PCI_STOP# 5 C42 AD20 NV_DQ12/NV_IO12 BC8 Danbury Technology:
+3.3V_RUN 5 6 PCI_IRDY# K46 BJ8 Disabled when Low. R2105
TSLVC08APW -1-GP AD21 NV_DQ13/NV_IO13
M51 BJ6 Enable when High. DY 1KR2J-1-GP
7
SRN8K2J-2-GP-U AD22 NV_DQ14/NV_IO14
J52 AD23 NV_DQ15/NV_IO15 BG6
K51
2
AD24 NV_ALE
L34 AD25 NV_ALE BD3
F42 AY6 NV_CLE NV_ALE
AD26 NV_CLE
J40 AD27
14
G46 AD28
+3.3V_RUN U2101C F44 AU2 USB
AD29 NV_RCOMP
9 M47 AD30
PCI
RN2103 8 H36 AD31 NV_RB# AV7 Pair Device
1 8 FFS_PCH_INT PCI_PLTRST# 10
2 7 PCIE_MCARD2_DET# J50 C/BE0# NV_WR#0_RE# AY8 0 USB0 @ MB (Charger)
3 6 LVDS_CBL_DET# TSLVC08APW -1-GP RN2106 G42 AY5
7
C/BE1# NV_WR#1_RE#
4 5 2 3 PLTRST3# 37,38,70 H47 C/BE2# 1 USB1 @ MB
1 4 PLTRST4# 35,64,76 G34 C/BE3# NV_WE#_CK0 AV11
SRN8K2J-4-GP
NV_WE#_CK1 BF5 2 USB2 @ IO Board
SRN33J-5-GP-U INT_PIRQA#
14
G38 PIRQA#
U2101D INT_PIRQB# H51 PIRQB# 3 USB3 @ IO Board
C 1 2 BT_DET# 12 INT_PIRQC# B37 H18 USBP0- 63
C
PIRQC# USBP0N
R2108 100KR2J-1-GP 11 INT_PIRQD# A44 PIRQD# USBP0P J18 USBP0+ 63 4 WLAN
13 USBP1N A18 USBP1- 63
PCI_REQ0# F51 REQ0# USBP1P C18 USBP1+ 63 5 Bluetooth
1 2 CAM_MIC_CBL_DET# 7 TSLVC08APW -1-GP PCI_REQ1# A46 N20 USBP2- 76
REQ1#/GPIO50 USBP2N
R2124 100KR2J-1-GP For WWAN 76 PCIE_MCARD2_DET#
PCIE_MCARD2_DET# B45 REQ2#/GPIO52 USBP2P P20 USBP2+ 76 6 Not available for HM55
BT_DET# M53 J20 USBP3- 76
REQ3#/GPIO54 USBP3N
73 BT_DET# USBP3P L20 USBP3+ 76 7 Not available for HM55
PCI_GNT0# F48 F20 USBP4- 64
GNT0# USBP4N
PCI_GNT1# K45 GNT1#/GPIO51 USBP4P G20 USBP4+ 64 8 DOCK1
TP2102 1 PCI_GNT2# F36 A20 USBP5- 73
GNT2#/GPIO53 USBP5N
PCI_GNT3# H53 GNT3#/GPIO55 USBP5P C20 USBP5+ 73 9 DOCK2
M22 USBP6- 1
USBP6N TP2106
54 LVDS_CBL_DET#
LVDS_CBL_DET# B41 PIRQE#/GPIO2 USBP6P N22 USBP6+ 1 TP2107 10 Finger Printer
PCH_PIRQF# K53 B21 USBP7- 1
PIRQF#/GPIO3 USBP7N TP2101
73 CAM_MIC_CBL_DET#
CAM_MIC_CBL_DET# A36 PIRQG#/GPIO4 USBP7P D21 USBP7+ 1 TP2103 11 Camera
1 2 FFS_PCH_INT A48 H22 USBP8- 74
37,40 FFS_INT1 PIRQH#/GPIO5 USBP8N
R2110
USBP8P J22 USBP8+ 74 12 PCCard/SmartCard/ExpCard
USB
0R0402-PAD-2-GP 1 PCIRST# K6 E22 USBP9- 74
TP2104 PCIRST# USBP9N
USBP9P F22 USBP9+ 74 13 WWAN
PCI_SERR# E44 A22 USBP10- 78
PCI_PERR# SERR# USBP10N
E50 PERR# USBP10P C22 USBP10+ 78
USBP11N G24 USBP11- 73
USBP11P H24 USBP11+ 73
PCI_IRDY# A42 L24 USBP12- 32,34,72
IRDY# USBP12N
H44 PAR USBP12P M24 USBP12+ 32,34,72
PCI_DEVSEL# F46 A24 USBP13- 76
PCI_FRAME# DEVSEL# USBP13N
C46 FRAME# USBP13P C24 USBP13+ 76
B PCI_PLOCK# B
D49 PLOCK#
B25 USB_RBIAS_PN 1 2
PCI_STOP# USBRBIAS# R2112
D41 STOP#
PCI_TRDY# C48 D25 22D6R2F-L1-GP
TRDY# USBRBIAS
1 PCH_PME# M7
TP2105 PME#
N16 USB_OC#0_1_R R2113 1 2 0R0402-PAD-2-GP
OC0#/GPIO59 USB_OC#0_1 63
RN2107 PCI_PLTRST# D5 J16 USB_OC#2_3_R R2114 1 2 0R0402-PAD-2-GP
PLTRST# OC1#/GPIO40 USB_OC#2_3 76
SRN22-3-GP F16 USB_OC#4_5
CLK_PCI_5028_R OC2#/GPIO41 USB_OC#6_7
38 CLK_PCI_5028 2 3 N52 CLKOUT_PCI0 OC3#/GPIO42 L16 USB_OC#0_1_R 58
37 CLK_PCI_EC 1 4 CLK_PCI_EC_R P53 E14 USB_OC#8_9 USB_OC#2_3_R 58
CLK_PCI_DOCK_R CLKOUT_PCI1 OC4#/GPIO43 USB_OC#10_11
74 CLK_PCI_DOCK
R2117
1 Dock 2
22R2J-2-GP
P46 CLKOUT_PCI2 OC5#/GPIO9 G16
USB_OC#12_13
USB_OC#4_5 58
P51 CLKOUT_PCI3 OC6#/GPIO10 F12 USB_OC#6_7 58
23 CLK_PCI_LOOPBACK 1 2 CLK_PCI_LOOPBACK_R P48 T15 PCH_OC7# USB_OC#8_9 58
R2115 22R2J-2-GP CLKOUT_PCI4 OC7#/GPIO14
USB_OC#10_11 58
USB_OC#12_13 58
IBEXPEAK-M-GP-NF PCH_OC7# 58
RN2104
+3.3V_ALW _PCH
USB_OC#0_1_R 1 10
PCH_OC7# 2 9 USB_OC#12_13
USB_OC#6_7 3 8 USB_OC#8_9
USB_OC#2_3_R 4 7 USB_OC#10_11
5 6 USB_OC#4_5
+3.3V_ALW _PCH
SRN10KJ-L3-GP
PCI_GNT0# BOOT BIOS Strap
A <Core Design> A
PCI_GNT1# PCI_GNT#0 PCI_GNT#1 BOOT BIOS Location A16 swap override Strap/Top-Block
Swap Override jumper
0 0 LPC Wistron Corporation
1
R2120 R2121
1KR2J-1-GP
1KR2J-1-GP
0 1 Reserved (NAND) PCI_GNT3# PCI_GNT#3 Low = A16 swap 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
R2122
DY 2
4K7R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
DY DY override/Top-Block
1 0 PCI Swap Override enabled Title
High = Default
2
1 1 SPI(Default)
PCH - PCI/USB/NVRAM (2/9)
PCI_GNT[3:0]#: Internal pull high during Strap A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1C 3 OF 10
FDI_RXN0 BA18
8 DMI_CTX_PRXN0 BC24 DMI0RXN FDI_RXN1 BH17
8 DMI_CTX_PRXN1 BJ22 DMI1RXN FDI_RXN2 BD16
8 DMI_CTX_PRXN2 AW20 DMI2RXN FDI_RXN3 BJ16
8 DMI_CTX_PRXN3 BJ20 DMI3RXN FDI_RXN4 BA16
FDI_RXN5 BE14
8 DMI_CTX_PRXP0 BD24 DMI0RXP FDI_RXN6 BA14
8 DMI_CTX_PRXP1 BG22 DMI1RXP FDI_RXN7 BC12
D 8 DMI_CTX_PRXP2 BA20 DMI2RXP D
8 DMI_CTX_PRXP3 BG20 DMI3RXP FDI_RXP0 BB18
FDI_RXP1 BF17
8 DMI_PTX_CRXN0 BE22 DMI0TXN FDI_RXP2 BC16
8 DMI_PTX_CRXN1 BF21 DMI1TXN FDI_RXP3 BG16
8 DMI_PTX_CRXN2 BD20 DMI2TXN FDI_RXP4 AW16
8 DMI_PTX_CRXN3 BE18 DMI3TXN FDI_RXP5 BD14
FDI_RXP6 BB14
8 DMI_PTX_CRXP0 BD22 DMI0TXP FDI_RXP7 BD12
8 DMI_PTX_CRXP1 BH21 DMI1TXP
8 DMI_PTX_CRXP2 BC20 DMI2TXP
8 DMI_PTX_CRXP3 BD18 DMI3TXP FDI_INT BJ14
DMI
FDI
FDI_FSYNC0 BF13
+1.05V_VTT BH25 DMI_ZCOMP
FDI_FSYNC1 BH13
1 2 DMI_IRCOMP_R BF25
R2203 49D9R2F-GP DMI_IRCOMP
FDI_LSYNC0 BJ12
+3.3V_RUN BG14
FDI_LSYNC1
1
+3.3V_RUN
R2204 +3.3V_ALW _PCH
1KR2J-1-GP
1
2 1
R2205 10KR2J-3-GP R2206
2
9,38,58 XDP_DBRESET# 1 2 PM_SYSRST#_R T6 J12 PCH_PCIE_W AKE# PCH_PCIE_W AKE# 38 8K2R2J-3-GP
R2201 0R0402-PAD-2-GP SYS_RESET# WAKE#
C C
2
RESET_OUT#_R 1 2 PM_PW ROK M6 Y1 CLKRUN# CLKRUN#
SYS_PWROK CLKRUN#/GPIO32 CLKRUN# 36,37,38
R2207 0R0402-PAD-2-GP
2
Option to " Disable "
1
System Power Management
R2208 1 2 PW ROK B17
R2209 0R0402-PAD-2-GP PWROK R2211 clkrun. Pulling it
8K2R2J-3-GP DY
10KR2J-3-GP down
1 2 ME_PW ROK K5 P8 PM_SUS_STAT# 1
TP2202 will keep the clks
1
R2210 0R0402-PAD-2-GP MEPWROK SUS_STAT#/GPIO61
2
running.
1 2 PCH_LAN_RST# A10 F3 PCH_SUSCLK 1
LAN_RST# SUSCLK/GPIO62 TP2201
R2213 10KR2J-3-GP
9 DRAM_PW ROK DRAM_PW ROK D9 E4 PCH_SLP_S5# 1 2 SIO_SLP_S5# 37

DRAMPWROK SLP_S5#/GPIO63 R2214 0R0402-PAD-2-GP
37 PCH_RSMRST# 1 2 PCH_RSMRST#_R C16 H7 PM_SLP_S4#_R 1 2 SIO_SLP_S4# 38,50,72

R2215 0R0402-PAD-2-GP RSMRST# SLP_S4# R2216 0R0402-PAD-2-GP
37 ME_SUS_PW R_ACK 1 2 ME_SUS_PW R_ACK_R M1 P12 PM_SLP_S3#_R 1 2 SIO_SLP_S3# 9,35,38,50

R2217 0R0402-PAD-2-GP SUS_PWR_DN_ACK/GPIO30 SLP_S3# R2218 0R0402-PAD-2-GP
58 PM_PW RBTN#_R
37 SIO_PW RBTN# 1 2 PM_PW RBTN#_R P5 K8 SIO_SLP_M#_R 1 2 SIO_SLP_M# 38
R2219 0R0402-PAD-2-GP PWRBTN# SLP_M# R2220 0R0402-PAD-2-GP
37 AC_PRESENT 1 2 AC_PRESENT_R P7 N2 PM_SLP_DSW # 1

ACPRESENT/GPIO31 TP23 TP2203
R2221 0R0402-PAD-2-GP
1 2 PCH_BATLOW # A6 BJ10 H_PM_SYNC

B +3.3V_ALW _PCH BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 9 B
R2222 8K2R2J-3-GP
1 2 PCH_RI# F14 F6 SIO_SLP_LAN#_R 1 DY 2 SIO_SLP_LAN# 38

R2223 10KR2J-3-GP RI# SLP_LAN#/GPIO29 R2224 0R2J-2-GP
IBEXPEAK-M-GP-NF
+3.3V_ALW _PCH
R2225
0R0402-PAD-2-GP
1 2
1 2 ME_SUS_PW R_ACK_R
+3.3V_ALW R2226 10KR2J-3-GP
U2201
37 RESET_OUT# RESET_OUT# 1 1 DY 2 AC_PRESENT_R
B R2228 10KR2J-3-GP
VCC 5
SIO_SLP_S3# 1 DY 2 SIO_SLP_S3#_R 2 DY
R2227 A RESET_OUT#_R
Y 4
0R2J-2-GP 3 1 2 AC_PRESENT_R
GND R2229 10KR2J-3-GP
74LVC1G08GW -1-GP
A 1 2 PCH_RSMRST#_R <Core Design> A
R2231 10KR2J-3-GP
Wistron Corporation
Title
PCH - DMI/FDI/PM (3/9)

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH
+3.3V_ALW _PCH
+3.3V_ALW _PCH
PCH1B 2 OF 10 RN2313
PCIE_CLK_RQ3# 1 4
BG30 B9 PCH_GPIO11 PCH_GPIO11 2 3
76 PCIE_PRX_W W ANTX_N1 PERN1 SMBALERT#/GPIO11
1
2
3
4
76 PCIE_PRX_W W ANTX_P1 BJ30 PERP1 WWAN
C2301 1 2 PCIE_PTX_W W ANRX_N1 BF29 H14 PCH_SMB_CLK RN2303 SRN10KJ-5-GP
76 PCIE_PTX_W W ANRX_N1_C PETN1 SMBCLK PCH_SMB_CLK 37
C2302 1 2 PCIE_PTX_W W ANRX_P1 BH29 SRN2K2J-2-GP
76 PCIE_PTX_W W ANRX_P1_C SCD1U10V2KX-4GP PETP1 PCH_SMB_DATA
SMBDATA C8 PCH_SMB_DATA 37
D 64 PCIE_PRX_W LANTX_N2 AW30 PERN2 D
BA30 +3.3V_ALW _PCH
64 PCIE_PRX_W LANTX_P2
8
7
6
5
PERP2
64 PCIE_PTX_W LANRX_N2_C
C2305 1 2 PCIE_PTX_W LANRX_N2 BC30 PETN2 WLAN SML0ALERT#/GPIO60 J14 PCH_GPIO60 1 DY 2
C2306 1 2 PCIE_PTX_W LANRX_P2 BD30 R2303
64 PCIE_PTX_W LANRX_P2_C SCD1U10V2KX-4GP PETP2 PCH_SML0CLK 10KR2J-3-GP
SML0CLK C6
AU30
SMBus
32 PCIE_PRX_R5U241TX_N3 PERN3
AT30 G8 PCH_SML0DATA
32 PCIE_PRX_R5U241TX_P3 PERP3 SML0DATA
32 PCIE_PTX_R5U241RX_N3_C
C2307 1 2 PCIE_PTX_R5U241RX_N3 AU32 PETN3 PCMCIA
C2304 1 2 PCIE_PTX_R5U241RX_P3 AV32 R2301
32 PCIE_PTX_R5U241RX_P3_C SCD1U10V2KX-4GP PETP3 PCH_GPIO74
SML1ALERT#/GPIO74 M14 1 DY 2 +3.3V_ALW _PCH
BA32 10KR2J-3-GP
72 PCIE_PRX_EXPTX_N4 PERN4
72 PCIE_PRX_EXPTX_P4 BB32 PERP4 Express SML1CLK/GPIO58 E10 KBC_SCL1
KBC_SCL1 37
C2312 1EXP 2 PCIE_PTX_EXPRX_N4 BD32
72 PCIE_PTX_EXPRX_N4_C C2311 1EXP 2 PCIE_PTX_EXPRX_P4 BE32
PETN4 Card G12 KBC_SDA1
72 PCIE_PTX_EXPRX_P4_C PETP4 SML1DATA/GPIO75 KBC_SDA1 37
SCD1U10V2KX-4GP
PCI-E*
BF33 PERN5
BH33 T13 CL_CLK 1
PERP5 CL_CLK1 TP2301
Controller
BG32 PETN5 WPAN
BJ32 T11 CL_DATA 1
PETP5 CL_DATA1 TP2302
Link
BA34 T9 CL_RST# 1
35 PCIE_PRX_GLANTX_N6 PERN6 CL_RST1# TP2303 +3.3V_RUN +3.3V_ALW _PCH
35 PCIE_PRX_GLANTX_P6 AW34 PERP6
35 PCIE_PTX_GLANRX_N6_C
C2303 1 2 PCIE_PTX_GLANRX_N6 BC34 PETN6 LAN
C2308 1 2 PCIE_PTX_GLANRX_P6 BD34 R2304
35 PCIE_PTX_GLANRX_P6_C SCD1U10V2KX-4GP PETP6 PCH_GPIO47
PEG_A_CLKRQ#/GPIO47 H1 1 2
1
2
1
2
PCIe port 7 and 8 may not be available AT34 PERN7
AU34 10KR2J-3-GP
for all Ibex Peak SKUs. AU36
PERP7
AD43 CLK_PCIE_GPU# RN2304 +3.3V_RUN RN2305
PETN7 CLKOUT_PEG_A_N CLK_PCIE_GPU# 80
AV36 AD45 CLK_PCIE_GPU CLK_PCIE_GPU 80 SRN4K7J-8-GP SRN2K2J-1-GP
C PETP7 CLKOUT_PEG_A_P C
BG34 AN4 PEG_CLK#_R PEG_CLK#_R 9
4
3
4
3
PERN8 CLKOUT_DMI_N
PEG
BJ34 AN2 PEG_CLK_R PEG_CLK_R 9
PERP8 CLKOUT_DMI_P U2301
BG36 PETN8
BJ36 -1.10/0310 1 6 PCH_SMB_CLK
PETP8 18,19,40,58 PCH_SMBCLK_MEM
CLKOUT_DP_N/CLKOUT_BCLK1_N AT1
CLKOUT_DP_P/CLKOUT_BCLK1_P AT3 2 5
AK48 CLKOUT_PCIE0N
+3.3V_ALW _PCH AK47 3 4
CLKOUT_PCIE0P
From CLK BUFFER

AW24 CLKIN_DMI# CLKIN_DMI# 7
PCIE_CLK_RQ0# CLKIN_DMI_N CLKIN_DMI
R2307
DY1 2
10KR2J-3-GP
P9 PCIECLKRQ0#/GPIO73 CLKIN_DMI_P BA24 CLKIN_DMI 7 DMN66D0LDW -7-GP
18,19,40,58 PCH_SMBDATA_MEM
-1.10/0310
35 CLK_PCIE_LOM# CLK_PCIE_LOM# AM43 AP3 CLK_CPU_BCLK# CLK_CPU_BCLK# 7 PCH_SMB_DATA
CLK_PCIE_LOM CLKOUT_PCIE1N CLKIN_BCLK_N CLK_CPU_BCLK
35 CLK_PCIE_LOM AM45 CLKOUT_PCIE1P CLKIN_BCLK_P AP1 CLK_CPU_BCLK 7
LAN
35 LOM_CLKREQ# LOM_CLKREQ# U4 PCIECLKRQ1#/GPIO18 DREFCLK#
CLKIN_DOT_96N F18 DREFCLK# 7
-1.10/0310 E18 DREFCLK DREFCLK 7
CLK_PCIE_R5U241# CLKIN_DOT_96P
32 CLK_PCIE_R5U241# AM47 CLKOUT_PCIE2N
32 CLK_PCIE_R5U241 CLK_PCIE_R5U241 AM48 CLKOUT_PCIE2P
PCMCIA CLKIN_SATA_N/CKSSCD_N AH13 CLK_PCIE_SATA# CLK_PCIE_SATA# 7
32,58 PCMCLK_REQ# PCMCLK_REQ# N4 AH12 CLK_PCIE_SATA CLK_PCIE_SATA 7
PCIECLKRQ2#/GPIO20 CLKIN_SATA_P/CKSSCD_P
+3.3V_RUN
1 2 AH42 P41 CLK_PCH_14M CLK_PCH_14M 7
R2318 10KR2J-3-GP CLKOUT_PCIE3N REFCLK14IN
AH41 CLKOUT_PCIE3P
WPAN
PCIE_CLK_RQ3# A8 J42 CLK_PCI_LOOPBACK CLK_PCI_LOOPBACK 21
B PCIECLKRQ3#/GPIO25 CLKIN_PCILOOPBACK B
RN2310
72 CLK_PCIE_EXP# 2 3 CLK_PCIE_EXP_N AM51 AH51 XTAL25_IN XTAL25_IN 1 2
CLKOUT_PCIE4N XTAL25_IN +1.05V_VTT
CLKOUT_PCIE4P Express
72 CLK_PCIE_EXP 1 EXP 4 CLK_PCIE_EXP_P AM53 AH53 XTAL25_OUT C2310
SRN0J-6-GP XTAL25_OUT 0R0402-PAD-2-GP
Card
1
EXPCLK_REQ#_PCH M9 AF38 XCLK_RCOMP 1 2
PCIECLKRQ4#/GPIO26 XCLK_RCOMP R2317 90D9R2F-1-GP R2316 X2301
-1.10/0310 DY
CLK_PCIE_MINI1# CLK_SIO_14M_R
DY 1MR2J-1-GP XTAL-25MHZ-96GP
64 CLK_PCIE_MINI1# AJ50 T45 1 2 CLK_SIO_14M 38
2
CLK_PCIE_MINI1 CLKOUT_PCIE5N CLKOUTFLEX0/GPIO64 R2314 1
64 CLK_PCIE_MINI1 AJ52 J 2 22R2J-2-GP CLK_JETW AY_14M 36
2
CLKOUT_PCIE5P
WLAN R2315 22R2J-2-GP XTAL25_OUT 1 DY2
MINI1CLK_REQ#_PCH H6 P43 CLK_PCI_TPM_CHA_R 1C_TPM 2 C2309
Clock Flex
PCIECLKRQ5#/GPIO44 CLKOUTFLEX1/GPIO65 CLK_PCI_TPM_CHA 36

-1.10/0310 R2309 22R2J-2-GP SC12P50V2JN-3GP
76 CLK_PCIE_MINI2# CLK_PCIE_MINI2# AK53 T42 CLK_PCI_TPM_R 1B_TPM 2 CLK_PCI_TPM 35,70

CLK_PCIE_MINI2 CLKOUT_PEG_B_N CLKOUTFLEX2/GPIO66 R2313 22R2J-2-GP
76 CLK_PCIE_MINI2 AK51 CLKOUT_PEG_B_P From Intel checklist
WWAN RN2314
CLKOUTFLEX{3:0}
MINI2CLK_REQ#_PCH P13 N50 CLK48_PCH 1 4 CLK_SC_48M 34
PEG_B_CLKRQ#/GPIO56 CLKOUTFLEX3/GPIO67
2 3 CLK_FD_48M 75 PCI Routing:
IBEXPEAK-M-GP-NF SRN22-3-GP
47-Ω series resistor (single load),
+3.3V_ALW _PCH 39-Ω series resistor (for double load)
RN2312 Non PCI routing:
4 1 MINI2CLK_REQ#_PCH 1 DY 2 PCMCLK_REQ# PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +V3.3A.
3 2 MINI1CLK_REQ#_PCH R2319 10KR2J-3-GP 33-Ω series resistor (single-load),
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3S 22-Ω series resistor (for double-load)
SRN10KJ-5-GP
+3.3V_RUN +3.3V_ALW _PCH

A
+3.3V_RUN +3.3V_RUN <Core Design> A
1
R2310 Wistron Corporation
Q2304 Q2302 Q2303 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
G
2N7002A-7-GP 2N7002A-7-GP 2N7002A-7-GP Taipei Hsien 221, Taiwan, R.O.C.
EXP 2 Title
S D MINI2CLK_REQ#_PCH S D MINI1CLK_REQ#_PCH S D EXPCLK_REQ#_PCH
76 MINI2CLK_REQ# 58,64 MINI1CLK_REQ# 72 EXPCLK_REQ#
PCH - PCIE/SMBUS/CLOCK/CL (4/9)
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH +RTC_CELL

+RTC_CELL
RN2401
PCH_RTCX1 1 4 1 2 SM_INTRUDER#
2 3 R2402 INTVRMEN- Integrated SUS
1 2 PCH_RTCX2 1MR2J-1-GP
1.1V VRM Enable
2
R2404 10MR2J-L-GP SRN20KJ-GP-U
SC1U10V3KX-3GP
1
G2401 PCH_INTVRMEN
C2404
1
R2405
2 High - Enable internal VRs
GAP-OPEN
330KR2F-L-GP
2
X2401
1
D PCH1A 1 OF 10 LPC_LAD[0..3] D
LPC_LAD[0..3] 35,36,37,38,70
1 4
PCH_RTCX1 B13 D33 LPC_LAD0
PCH_RTCX2 RTCX1 FWH0/LAD0 LPC_LAD1 +3.3V_RUN
D13 RTCX2 FWH1/LAD1 B33
1
1
C2403 C2405 C32 LPC_LAD2
FWH2/LAD2
SC15P50V2JN-2-GP
SC12P50V2JN-3GP
2 3 A32 LPC_LAD3
PCH_RTCRST# FWH3/LAD3
C14
2
2
RTCRST#
1
SRTCRST# new signal Pin C34
X-32D768KHZ-46GP SRTCRST# FWH4/LFRAME# LPC_LFRAME# 35,36,37,38,70 R2407
D17 SRTCRST#
A34 8K2R2J-3-GP
RTC
LPC
LDRQ0# LPC_LDRQ0# 38
SM_INTRUDER# A16 F34
INTRUDER# LDRQ1#/GPIO23 LPC_LDRQ1# 38
2
C2402 PCH_INTVRMEN A14 AB9 IRQ_SERIRQ 35,36,37,38
RN2402 SC1U10V3KX-3GP INTVRMEN SERIRQ
2
SRN33J-5-GP-U
2 3
ACZ_BIT_CLK 76 PCH_AZ_MDC_BITCLK
30 PCH_AZ_CODEC_BITCLK 1 4 ACZ_BIT_CLK A30 HDA_BCLK
HDD
SATA0RXN AK7 SATA_PRX_HTX0- 59
1
ACZ_SYNC_R D29 AK6 SATA_PRX_HTX0+ 59

EC2401 RN2403 HDA_SYNC SATA0RXP SATA_PTX_HRX0-_C C2406 1
DY SATA0TXN AK11 2 SCD01U50V2KX-1GP SATA_PTX_HRX0- 59
SC33P50V2JN-3GP 1 8 ACZ_SPKR P1 AK9 SATA_PTX_HRX0+_C C2407 1 2 SCD01U50V2KX-1GP
30 ACZ_SPKR SATA_PTX_HRX0+ 59
2
76 PCH_AZ_MDC_SYNC SPKR SATA0TXP

2 7
30
30,75
PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_RST# 3 6 ACZ_RST#_R C30 HDA_RST# ODD
For EMI, RF Cap. 76 PCH_AZ_MDC_RST# 4 5
SRN33J-7-GP SATA1RXN AH6 SATA_PRX_OTX1- 59
SATA1RXP AH5 SATA_PRX_OTX1+ 59
2 3 30 PCH_CODEC_SDIN0 PCH_CODEC_SDIN0 G30 AH9 SATA_PTX_ORX1-_C C2408 1 2 SCD01U50V2KX-1GP SATA_PTX_ORX1- 59
76 PCH_MDC_SDOUT HDA_SDIN0 SATA1TXN SATA_PTX_ORX1+_C C2409 1
30 PCH_CODEC_SDOUT 1 4 SATA1TXP AH8 2 SCD01U50V2KX-1GP SATA_PTX_ORX1+ 59
76 PCH_MDC_SDIN1 PCH_MDC_SDIN1 F30
RN2404 HDA_SDIN1
SATA2RXN AF11
C SRN33J-5-GP-U 1 HDA_SDIN2 E32 AF9 C
TP2401
IHDA
HDA_SDIN2 SATA2RXP
SATA2TXN AF7
1 HDA_SDIN3 F32 AF6 SATA port 2 and 3 may not be available
TP2402 HDA_SDIN3 SATA2TXP
AH3
for all Ibex Peak SKUs.
ACZ_SDATAOUT_R SATA3RXN
B29 HDA_SDO SATA3RXP AH1
SATA3TXN AF3
+3.3V_RUN AF1
+3.3V_ALW _PCH ME_FW P SATA3TXP
38 ME_FW P H32
SATA
HDA_DOCK_EN#/GPIO33
SATA4RXN AD9
1 2 PCH_GPIO13 J30 AD8
HDA_DOCK_RST#/GPIO13 SATA4RXP
1 2 ME_FW P R2408 8K2R2J-3-GP
SATA4TXN AD6
R2432 10KR2J-3-GP AD5
PCH_JTAG_TCK
SATA4TXP DOCKING eSATA
58 PCH_JTAG_TCK M3 JTAG_TCK SATA5RXN AD3 SATA_PRX_DTX_5- 74
SATA5RXP AD1 SATA_PRX_DTX_5+ 74
PCH_JTAG_TMS K3 AB3 SATA_PTX_DRX_N5_C C2410 2 SCD01U50V2KX-1GP
1Dock
58 PCH_JTAG_TMS JTAG_TMS SATA5TXN SATA_PTX_DRX_5- 74
SATA5TXP AB1 SATA_PTX_DRX_P5_C C2411 2 SCD01U50V2KX-1GP
1Dock SATA_PTX_DRX_5+ 74
PCH_JTAG_TDI K1
58 PCH_JTAG_TDI JTAG_TDI +1.05V_VTT
JTAG
PCH_JTAG_TDO J2 AF16
58 PCH_JTAG_TDO JTAG_TDO SATAICOMPO
+3.3V_RUN NO REBOOT STRAP PCH_JTAG_RST# SATAICOMP
58 PCH_JTAG_RST# J4 TRST# SATAICOMPI AF15 1 2
1210 SB R2409 37D4R2F-GP
+3.3V_RUN
1 DY 2 ACZ_SPKR
R2410 1KR2J-1-GP PCH_SPI_CLK BA2 HDD_DET#_R 1 2
62 PCH_SPI_CLK SPI_CLK R2412 10KR2J-3-GP
No Reboot Strap R23 PCH_SPI_CS0# AV3 PCH_GPIO19 1 2
B 62 PCH_SPI_CS0# SPI_CS0# R2413 10KR2J-3-GP B
Low = Default PCH_SPI_CS1# AY3 T3

62 PCH_SPI_CS1# SPI_CS1# SATALED# SATA_ACT#_R 66
HDA_SPKR High = No Reboot
PCH_SPI_DO HDD_DET#_R HDD_DET#_R 58
62 PCH_SPI_DO AY1 SPI_MOSI SATA0GP/GPIO21 Y9 1 2 HDD_DET# 59
R2414 0R0402-PAD-2-GP
SPI
1 2 PCH_SPI_DIN_R AV1 V1 PCH_GPIO19
62 PCH_SPI_DIN SPI_MISO SATA1GP/GPIO19 PCH_GPIO19 58
R2415 33R2J-2-GP
Place near PCH side
IBEXPEAK-M-GP-NF
+3.3V_SUS
09/0416, SPI_MISO +3.3V_RTC_LDO
From Intel checklist, 25 RTC_BAT_DET#
1
+RTC_CELL D2401
DY R2416 No series resistor required if routing length is 1.5"-6.5" if using 1 SPI device. W=20mils 1
20KR2F-L-GP +COIN_CELL RTC1
Use a 33- series resistors close to them PCH if using 2 SPI devices.
1 2RTC_PW R_L 3 5
R2418 0R0402-PAD-2-GP 3
2
PCH_JTAG_RST# Form DG1.5 W=20mils 2+COIN_CELLL_R 2 1 2
1
TRST# on PCH does not belong to JTAG interface. R2419 1KR2J-1-GP
1
For ES1 silicon, an ext. pull up 3.3-V Sus is required C2401 BAT54CW -1-GP 1
R2401 for bias internal state. SC1U10V3KX-3GP 4
2
A 20-K/10-K voltage divider to this signal to 1.1 V.
DY 10KR2J-3-GP However, from ES2 silicon onward, -1.10/0308
this signal is a No Connect regardless Main:20.F1000.003 MLX-CON3-10-GP-U
if JTAG interface on PCH is enabled or not.
2
2nd:20.D0210.103
A <Core Design>
20.F1000.003 A
+3.3V_RUN ME_FW P
integrated VccSus1_05,VccSus1_5,VccCL1_5
Wistron Corporation
1 DY 2 PCH_SPI_DO INTVRMEN High=Enable Low=Disable 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1
R2421 8K2R2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.

R2431 integrated VccLan1_05VccCL1_05
Title
DY 1KR2J-1-GP
LAN100_SLP High=Enable Low=Disable
Pull up +3.3V_M enable iAMT(DY disable) PCH - SPI/RTC/LPC/SATA/IHDA (5/9)
2

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1F 6 OF 10 +3.3V_RUN
58 SIO_EXT_SCI#_R
1 2 SIO_EXT_SCI#_R Y3 AH45 PCH_SRC6_XDP_N 1
37 SIO_EXT_SCI# BMBUSY#/GPIO0 CLKOUT_PCIE6N TP2502
R2502 0R0402-PAD-2-GP AH46 PCH_SRC6_XDP_P 1 RN2507
CLKOUT_PCIE6P TP2503
PCH_GPIO1 C38 SIO_A20GATE 1 4
TACH1/GPIO1 SIO_RCIN# 2 3
PCH_GPIO6 D37 TACH2/GPIO6 PCH_SRC7_DMI_LAI_N
D
CLKOUT_PCIE7N AF48 1 TP2501 D
MISC
PCH_GPIO7 J32 AF47 PCH_SRC7_DMI_LAI_P 1 SRN10KJ-5-GP
TACH3/GPIO7 CLKOUT_PCIE7P TP2504
SIO_EXT_SMI# F10
37 SIO_EXT_SMI# GPIO8
PCH_GPIO12 K9 U2 SIO_A20GATE 37
LAN_PHY_PWR_CTRL/GPIO12 A20GATE
38 SIO_EXT_W AKE# T7 GPIO15 -1.10/0310
1
PCH_GPIO16 AA2 AM3 BCLK_CPU_N_R BCLK_CPU_N_R 9
C2501 58 PCH_GPIO16 SATA4GP/GPIO16 CLKOUT_BCLK0_N/CLKOUT_PCIE8N
SC47P50V2JN-3GP
DY SPEAKER_DET# BCLK_CPU_P_R
60 SPEAKER_DET# F38 AM1 BCLK_CPU_P_R 9
2
TACH0/GPIO17 CLKOUT_BCLK0_P/CLKOUT_PCIE8P
PCH_GPIO22 Y7 BG10
SCLOCK/GPIO22 PECI H_PECI 9
GPIO
+1.05V_VTT
PCIE_MCARD1_DET# H10 T1 SIO_RCIN# 37
64 PCIE_MCARD1_DET# GPIO24 RCIN#
64 USB_MCARD1_DET#
TP_ONDIE_PLL_VR AB12 BE10 H_PW RGD 9,58 RN2508
GPIO27 PROCPWRGD
1
CPU
1 4
C2502 DY 1 2 LED_BD_DET#_R V13 BD10 PCH_THERMTRIP_R 2 3 H_THERMTRIP# 9,39
77 LED_BD_DET# GPIO28 THRMTRIP#
SC47P50V2JN-3GP R2506
2
58 LED_BD_DET#_R 0R0402-PAD-2-GP STP_PCI# SRN56J-4-GP

M11 STP_PCI#/GPIO34
V6 SATACLKREQ#/GPIO35
+3.3V_RUN
24 RTC_BAT_DET# 1 R2532 2 AB7 SATA2GP/GPIO36 TP1 BA22 Place close to PCH
RN2502 0R0402-PAD-2-GP
1 8 PCH_GPIO22 PCH_GPIO37 AB13 AW22
PCH_GPIO1 58 RTC_BAT_DET#_R 58 PCH_GPIO37 SATA3GP/GPIO37 TP2
2 7
C 3 6 PCH_GPIO6 TPM_ID0 V3 BB22 C
PCH_GPIO7 SLOAD/GPIO38 TP3
4 5
TPM_ID1 P3 AY45
SDATAOUT0/GPIO39 TP4
SRN10KJ-6-GP USB_MCARD2_DET#
76 USB_MCARD2_DET# H3 PCIECLKRQ6#/GPIO45 TP5 AY46
1
+3.3V_RUN C2503 PCH_GPIO46

SC47P50V2JN-3GP
DY F1 PCIECLKRQ7#/GPIO46 TP6 AV43
2
RN2503 FFS_INT2_R AB6 AV45

40 FFS_INT2_R SDATAOUT1/GPIO48 TP7
1 8 SIO_EXT_SCI#_R
2 7 PCH_GPIO37 TEMP_ALERT# AA4 AF13
PCH_GPIO16 38,58 TEMP_ALERT# SATA5GP/GPIO49 TP8
3 6
4 5 BIO_DET# F8 M18
78 BIO_DET# GPIO57 TP9
SRN10KJ-6-GP TP10 N18
TP2510 1 TP_VSS_NCTF13 A4 AJ24

+3.3V_RUN VSS_NCTF_1 TP11
A49
NCTF
VSS_NCTF_2
RSVD
A5 VSS_NCTF_3 TP12 AK41
A50 VSS_NCTF_4
1 2 SPEAKER_DET# TP2512 1 TP_VSS_NCTF22 A52 AK42
R2513 100KR2J-1-GP TP_VSS_NCTF21 VSS_NCTF_5 TP13
TP2511 1 A53 VSS_NCTF_6
TP2508 1 TP_VSS_NCTF11 B2 M32
USB_MCARD1_DET# VSS_NCTF_7 TP14
1 2 B4 VSS_NCTF_8
R2514 100KR2J-1-GP B52 N32
TP_VSS_NCTF23 VSS_NCTF_9 TP15
TP2513 1 B53 VSS_NCTF_10
1 2 STP_PCI# BE1 M30
R2515 8K2R2J-3-GP VSS_NCTF_11 TP16
BE53 VSS_NCTF_12
BF1 VSS_NCTF_13 TP17 N30
B B
1 2 RTC_BAT_DET#_R BF53 VSS_NCTF_14
R2522 10KR2J-3-GP TP2519 1 TP_VSS_NCTF43 BH1 H12
VSS_NCTF_15 TP18
BH2 VSS_NCTF_16
BH52 VSS_NCTF_17 TP19 AA23
+3.3V_ALW _PCH 1 TP_VSS_NCTF32 BH53
TP2515 VSS_NCTF_18
TP2517 1 TP_VSS_NCTF41 BJ1 AB45
RN2504 TP_VSS_NCTF42 VSS_NCTF_19 NC_1
TP2518 1 BJ2 VSS_NCTF_20
1 8 SIO_EXT_SMI# BJ4 AB38
PCH_GPIO46 VSS_NCTF_21 NC_2
2 7 BJ49 VSS_NCTF_22
3 6 USB_MCARD2_DET# BJ5 AB42
PCH_GPIO12 VSS_NCTF_23 NC_3
4 5 BJ50 VSS_NCTF_24
TP2516 1 TP_VSS_NCTF33 BJ52 AB41
SRN10KJ-6-GP TP_VSS_NCTF31 VSS_NCTF_25 NC_4
TP2514 1 BJ53 VSS_NCTF_26
TP2509 1 TP_VSS_NCTF12 D1 T39
VSS_NCTF_27 NC_5
D2 VSS_NCTF_28
D53 VSS_NCTF_29
+3.3V_ALW _PCH E1 P6 INIT3_3V# 1
VSS_NCTF_30 INIT3_3V# TP2506
E53 VSS_NCTF_31
1 2 SIO_EXT_W AKE# C10
R2516 1KR2J-1-GP TP24
IBEXPEAK-M-GP-NF
1 4 PCIE_MCARD1_DET#
2 3 BIO_DET#
RN2506 SRN100KJ-6-GP +3.3V_RUN +3.3V_RUN
1 2 LED_BD_DET#_R BJ53 BH53 B53 A53

R2521 100KR2J-1-GP BJ52 A52 1 B_TPM and DisableBTPM
1
R2526 B_TPM
A 1 TP_ONDIE_PLL_VR
DY 2 8K2R2J-3-GP 3X 2X 100KR2J-1-GP R2527 <Core Design> A
R2528 TPM_ID0 TPM_ID0 100KR2J-1-GP
Internal pull up GPIO27 to NCTF TPM ID (0) (1)
2
enable VccVRM Wistron Corporation
2
PCH1, Board Top View TPM_ID1 TPM_ID0 TPM_ID1
(0) C_TPM RSVD
1
1
CTPM and Disable B_TPM C_TPM
TPM_ID1
4X 1X R2531 R2529 Title
A4 (1) NONE B_TPM
BJ2 B2
100KR2J-1-GP 100KR2J-1-GP
PCH - GPIO/CPU/MISC (6/9)
2
2
BJ1 BH1 D1 Size Document Number Rev
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH +3.3V_RUN
+VCCA_DAC_1_2 1
L2602
2 69mA
C2604 C2605 C2602 0R0603-PAD-2-GP
1
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SC10U6D3V5MX-3GP
+1.05V_VTT
PCH1G POWER 7 OF 10
DY DY
1.524A
2
AB24 VCCCORE VCCADAC AE50
AB26 VCCCORE
1
C2606 C2603 AB28 AE52
VCCCORE VCCADAC
AD26 VCCCORE
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
CRT
D AD28 AF53 D
2
VCCCORE VSSA_DAC
AF26 VCCCORE
VCC CORE
AF28 VCCCORE VSSA_DAC AF51
AF30 VCCCORE
AF31 VCCCORE
AH26 VCCCORE
AH28 VCCCORE
AH30 VCCCORE
AH31 VCCCORE VCCALVDS AH38
AJ30 VCCCORE
AJ31 VCCCORE VSSA_LVDS AH39
VCCTX_LVDS AP43
+1.05V_VTT AP45
VCCTX_LVDS
AT46
LVDS
VCCTX_LVDS
AK24 VCCIO VCCTX_LVDS AT45
+1.05V_VTT
42mA 1
L2603
DY 2 +1.05VS_VCCAPLL_EXP BJ24 VCCAPLLEXP
AB34
VCC3_3
1
IND-1UH-2-GP C2610
SC10U6D3V5MX-3GP +3.3V_RUN
DY AN20 VCCIO VCC3_3 AB35
AN22
357mA
HVCMOS
2
VCCIO
AN23 VCCIO VCC3_3 AD35
AN24 VCCIO
1
AN26 C2611
+1.05V_VTT VCCIO SCD1U10V2KX-5GP
AN28 VCCIO
BJ26
3.208A
2
C VCCIO C
BJ28 VCCIO
AT26 VCCIO
1
1
C2612 C2613 C2614 C2615 C2616 AT28 VCCIO
AU26 VCCIO
SC22U6D3V5MX-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AU28 +1.5VS_+1.8VS
2
2
VCCIO
AV26
AV28
AW26
VCCIO
VCCIO VCCVRM AT24 35mA +1.05VS_VCC_DMI +1.05V_VTT
VCCIO
AW28 VCCIO
61mA +1.8V_RUN +3.3V_RUN
DMI
BA26 VCCIO VCCDMI AT16 2 1
BA28 R2607 0R0402-PAD-2-GP
VCCIO
1
BB26 AU16 C2617
VCCIO VCCDMI
1
BB28 SC1U10V3KX-3GP
VCCIO R2609
BC26
2
VCCIO
PCI E*
BC28 VCCIO +V_NVRAM_VCCQ DY R2608
0R2J-2-GP
0R0402-PAD-2-GP
BD26 VCCIO
BD28
156mA
2
VCCIO
BE26 VCCIO VCCPNAND AM16
BE28 VCCIO VCCPNAND AK16
BG26 VCCIO VCCPNAND AK20
1
BG28 AK19 C2618
VCCIO VCCPNAND SCD1U10V2KX-5GP
BH27 VCCIO VCCPNAND AK15
AK13
2
VCCPNAND
AN30 VCCIO VCCPNAND AM12
NAND / SPI
AN31 VCCIO VCCPNAND AM13
+3.3V_RUN AM15
VCCPNAND
357mA AN35 VCC3_3
B +3.3V_RUN B
1
C2619 +1.05V_VTT VCCAFDI_VRM AT22

SCD1U10V2KX-4GP +1.05VS_VCCAPLL_FDI VCCVRM[1]
1 DY 2 BJ18 AM8 PCH_VCCME3_3 85mA 2 1
2
L2604 VCCFDIPLL VCCME3_3 R2610 0R0402-PAD-2-GP

VCCME3_3 AM9
1
FDI
IND-1UH-2-GP C2621 AM23 AP11

VCCIO VCCME3_3
1
DY SC10U6D3V5MX-3GP AP9 C2620
VCCME3_3 SCD1U10V2KX-5GP
2
2
+1.05V_VTT
IBEXPEAK-M-GP-NF
+1.5VS_+1.8VS
196mA
VCCAFDI_VRM 2 1
R2611
0R0402-PAD-2-GP
+1.5VS_+1.8VS
A
+1.8V_RUN <Core Design> A
1
R2612
2
Wistron Corporation
0R0603-PAD-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
PCH (7/9)
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH +1.05V_VTT

L2701
+1.05VS_VCCA_CLK
52mA 1 DY 2 PCH1J POWER 10 OF 10 +1.05V_VTT
1
IND-10UH-30-GP C2703 AP51 V24
VCCACLK VCCIO
SC1U10V2KX-1GP
DY VCCIO V26
1
AP53 Y24 C2707
(344mA)
2
VCCACLK VCCIO SC1U10V2KX-1GP
VCCIO Y26
2
VCC_LAN_PCH AF23 V28
VCCLAN VCCSUS3_3 +3.3V_ALW _PCH
VCCSUS3_3 U28
2
AF24 VCCLAN VCCSUS3_3 U26
D R2708 U24 D
0R0402-PAD-2-GP VCCSUS3_3
VCCSUS3_3 P28
1
DCPSUSBYP Y20 P26
DCPSUSBYP VCCSUS3_3 C2708
N28
1
VCCSUS3_3
1
C2709 N26 SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP VCCSUS3_3
AD38 VCCME VCCSUS3_3 M28
M26
2
VCCSUS3_3
AD39 L28
USB
VCCME VCCSUS3_3
VCCSUS3_3 L26
+1.05V_VTT AD41 J28
VCCME VCCSUS3_3
J26
1.998A AF43 VCCME
VCCSUS3_3
VCCSUS3_3 H28
H26
VCCSUS3_3
1
C2705 C2710 C2706 AF41 G28
VCCME VCCSUS3_3
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC1U10V2KX-1GP
VCCSUS3_3 G26
AF42 F28 +3.3V_ALW _PCH
2
VCCME VCCSUS3_3
VCCSUS3_3 F26
V39 E28 +3.3V_ALW _PCH
VCCME VCCSUS3_3
E26
Clock and Miscellaneous

VCCSUS3_3
1
V41 VCCME VCCSUS3_3 C28
C26 C2701
A
VCCSUS3_3 SCD1U10V2KX-4GP +3.3V_RUN
V42 B27
2
VCCME VCCSUS3_3 D2702
VCCSUS3_3 A28
1
C2711 Y39 A26 SDMK0340L-7-F-GP
VCCME VCCSUS3_3
SC1U10V2KX-1GP
+1.05V_VTT DY +1.05V_VTT
L2702 Y41 U23
A
VCCME VCCSUS3_3
1 2 +1.05VS_VCCA_A_DPL Y42 V23 +5V_ALW _PCH D2701
VCCME VCCIO
SDMK0340L-7-F-GP
1
C COIL-10UH-9-GP C2735 C2712 F24 +5VALW _PCH_VCC5REFSUS 1 2 C

SC22U6D3V5MX-2GPDY SC1U10V2KX-1GP <1mA V5REF_SUS R2701 100R2J-2-GP
K
1
+VCCRTCEXT V9 C2713
2
DCPRTC SC1U10V2KX-1GP +5V_RUN

1
C2714 +1.5VS_+1.8VS
2
SCD1U10V2KX-4GP K49 +5VS_PCH_VCC5REF 1 2
L2703 V5REF
AU24 R2702 100R2J-2-GP
2
VCCVRM
PCI/GPIO/LPC
1
1 2 +1.05VS_VCCA_B_DPL C2715
J38 +3.3V_RUN SC1U10V2KX-1GP
VCC3_3
1
COIL-10UH-9-GP C2736 C2716 BB51

72mA +1.05VS_VCCA_A_DPL
2
SC22U6D3V5MX-2GPDY SC1U10V2KX-1GP VCCADPLLA
BB53 VCCADPLLA VCC3_3 L38
2
1
M36
73mA +1.05VS_VCCA_B_DPL BD51
BD53
VCCADPLLB
VCC3_3
N36
C2717
SCD1U10V2KX-4GP
2
VCCADPLLB VCC3_3
AH23 VCCIO VCC3_3 P36
AJ35 VCCIO
+1.05V_VTT AH35 U35 C2718
VCCIO VCC3_3 +3.3V_RUN
1 2
AF34 VCCIO
AD13 SCD1U10V2KX-4GP
VCC3_3
1
C2719 C2720 C2721 AH34

SC1U10V2KX-1GP SC1U10V2KX-1GP SC1U10V2KX-1GP VCCIO +1.05VS_VCCAPLL +1.05V_VTT
L2704
AF32
32mA
2
VCCIO
VCCSATAPLL AK3 1 DY 2
V12 DCPSST VCCSATAPLL AK1
1
C2722 C2723 IND-10UH-30-GP
+1.5V_PCH_DcpSST SC1U10V2KX-1GP DY DY SC1U10V2KX-1GP
B +1.05V_VTT B
2
1
+1.05V_PCH_DcpSUS Y22
C2724 DCPSUS
VCCIO AH22
1
SCD1U10V2KX-4GP
2
1
C2726 +1.5VS_+1.8VS C2725
SCD1U10V2KX-4GP P18 AT20 SC1U10V2KX-1GP
2
VCCSUS3_3 VCCVRM
2
+3.3V_ALW _PCH U19
SATA
VCCSUS3_3
PCI/GPIO/LPC
AH19
163mA U20 VCCSUS3_3
VCCIO
AD20
VCCIO
1
U22 VCCSUS3_3
C2727 AF22
SCD1U10V2KX-4GP +3.3V_RUN VCCIO
2
VCCIO AD19
V15 VCC3_3 VCCIO AF20
VCCIO AF19
1
V16 VCC3_3 VCCIO AH20

C2728
SCD1U10V2KX-4GP Y16 AB19
2
VCC3_3 VCCIO
VCCIO AB20
+1.05V_VTT AB22
VCCIO +1.05V_VTT
AD22
1mA AT18 V_CPU_IO
VCCIO
AA34
CPU
VCCME
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C2729 C2730 C2731 Y34

SC4D7U6D3V3KX-GP VCCME
AU18 V_CPU_IO VCCME Y35
AA35
2
VCCME +3.3V_ALW _PCH

A
+3VS_+1.5VS_HDA_IO <Core Design> A
+RTC_CELL
RTC
A12 VCCRTC VCCSUSHDA L30 2 1

HDA
R2707 0R0402-PAD-2-GP
2mA 6mA Wistron Corporation
1
IBEXPEAK-M-GP-NF C2732 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

1
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C2737 C2733 C2734 SC1U10V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.

2
SC1U10V2KX-1GP
Title
2
PCH (8/9)
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PCH PCH1I 9 OF 10

AY7 VSS VSS H49
B11 VSS VSS H5
B15 VSS VSS J24
B19 VSS VSS K11
B23 VSS VSS K43
B31 VSS VSS K47
B35 VSS VSS K7
B39 VSS VSS L14
B43 VSS VSS L18
B47 VSS VSS L2
D B7 VSS VSS L22 D
PCH1H 8 OF 10 BG12 L32
VSS VSS
AB16 VSS BB12 VSS VSS L36
BB16 VSS VSS L40
AA19 VSS VSS AK30 BB20 VSS VSS L52
AA20 VSS VSS AK31 BB24 VSS VSS M12
AM19 VSS VSS AK34 BB34 VSS VSS M20
AA24 VSS VSS AK35 BB38 VSS VSS N38
AA31 VSS VSS AK49 BC10 VSS VSS M46
AA32 VSS VSS AK5 BC14 VSS VSS M49
AB11 VSS VSS AK8 BC18 VSS VSS M5
AB15 VSS VSS AL2 BC2 VSS VSS M8
AB23 VSS VSS AL52 BC22 VSS VSS N24
AB30 VSS VSS AM11 BC32 VSS VSS P11
AB31 VSS VSS BB44 BC36 VSS VSS AD15
AB32 VSS VSS AD24 BC40 VSS VSS P22
AB47 VSS VSS AM24 BH9 VSS VSS P34
AB5 VSS VSS AM26 BD48 VSS VSS P42
AB8 VSS VSS AM28 BD49 VSS VSS P45
AC2 VSS VSS BA42 BD5 VSS VSS P47
AC52 VSS VSS AM30 BE12 VSS VSS R2
AD11 VSS VSS AM31 BE16 VSS VSS R52
AD12 VSS VSS AM32 BE20 VSS VSS T12
C AD16 AM34 BE24 T41 C
VSS VSS VSS VSS
AD34 VSS VSS AU20 BE46 VSS VSS U30
AU22 VSS VSS AM46 BE48 VSS VSS U31
AD42 VSS VSS AV22 BE50 VSS VSS U32
AD46 VSS VSS AM49 BE6 VSS VSS U34
AD49 VSS VSS AM7 BE8 VSS VSS P38
AD7 VSS VSS AA50 BF3 VSS VSS V11
AE2 VSS VSS BB10 BF49 VSS VSS P16
AE4 VSS VSS AN32 BF51 VSS VSS V19
AF12 VSS VSS AN50 BG18 VSS VSS V20
Y13 VSS VSS AN52 BG24 VSS VSS V22
AH49 VSS VSS AP12 BG4 VSS VSS V30
AU4 VSS VSS AP42 BG50 VSS VSS V31
AF35 VSS VSS AP46 BH11 VSS VSS V32
AP13 VSS VSS AP49 BH15 VSS VSS V34
AN34 VSS VSS AP5 BH19 VSS VSS V35
AF45 VSS VSS AP8 BH23 VSS VSS V38
AF46 VSS VSS AR2 BH31 VSS VSS V43
AF49 VSS VSS AR52 BH35 VSS VSS V45
AF5 VSS VSS AT11 BH39 VSS VSS V46
AF8 VSS VSS BA12 BH43 VSS VSS V47
AG2 VSS VSS AH48 BH47 VSS VSS V49
AG52 VSS VSS AT32 BH7 VSS VSS V5
AH11 VSS VSS AT36 C12 VSS VSS V7
AH15 VSS VSS AT41 C50 VSS VSS V8
B B
AH16 VSS VSS AT47 D51 VSS VSS W2
AH24 VSS VSS AT7 E12 VSS VSS W52
AH32 VSS VSS AV12 E16 VSS VSS Y11
AV18 VSS VSS AV16 E20 VSS VSS Y12
AJ19 VSS VSS AV34 E38 VSS VSS Y28
AJ28 VSS VSS AV8 F49 VSS VSS Y46
AJ32 VSS VSS AW14 F5 VSS VSS P49
AJ34 VSS VSS AW18 G10 VSS VSS Y5
AT5 VSS VSS AW2 G14 VSS VSS Y6
AJ4 VSS VSS BF9 G18 VSS VSS Y8
AK12 VSS VSS AW32 G2 VSS VSS P24
AM41 VSS VSS AW36 G22 VSS VSS T43
AN19 VSS VSS AW40 G32 VSS VSS AD51
AK26 VSS VSS AW52 G36 VSS VSS AT8
AK22 VSS VSS AY11 G40 VSS VSS AD47
AK23 VSS VSS AY43 G44 VSS VSS Y47
AK28 VSS VSS AY47 G52 VSS VSS AT12
AF39 VSS VSS AM6
IBEXPEAK-M-GP-NF H16 AT13
VSS VSS
H20 VSS VSS AM5
A H30 VSS VSS AK45 <Core Design> A
H34 VSS VSS AK39
H38 VSS VSS AV14
H42 VSS Wistron Corporation
IBEXPEAK-M-GP-NF Title
PCH (9/9)
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
+VDDA +5V_RUN
+3.3V_RUN +3.3V_RUN Close to codec Close to codec
1 2
+5V_RUN
SC1U10V3KX-3GP
Close to codec R3002 0R0402-PAD-2-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AUD_DVDDCORE
1
C3006
C3007
C3003 Close to codec
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
C3002
1
1
D D
C3004
C3005
SC10U6D3V5MX-3GP
DY
2
U3001
SC1U10V3KX-3GP
SC10U6D3V3MX-GP
SCD1U10V2KX-4GP
2
C3008
C3009
C3010
1
1
1 DVDD_CORE AVDD 27
PCH_AZ_CODEC_BITCLK 66mA 38
AVDD
9
2
DVDD
1
120mA PVDD 39
R3005 3 1.35A 45
10KR2J-3-GP DVDD_IO PVDD
DY 120mA
13 AUD_SENSE_A
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B
6 14 AUD_SENSE_B 75
1 2
24 PCH_AZ_CODEC_BITCLK HDA_BITCLK SENSE_B

R3006 1 2 33R2J-2-GP PCH_CODEC_SDIN0_R 8
24 PCH_CODEC_SDIN0 HDA_SDI C3011 1
SC1KP50V2KX-1GP
DY C3001 AUD_EXT_MIC_L 2 SC2D2U25V5KX-1GP
SC10P50V2JN-4GP PCH_CODEC_SDOUT 5
HP0_PORT_A_L 28
29 AUD_EXT_MIC_R C3012 1 2 SC2D2U25V5KX-1GP
MIC_IN_L_2 60
MIC_IN_R_2 60
Ext. MIC AUD_DOCK_HP_OUT_L_C1 1Dock2
2
24 PCH_CODEC_SDOUT HDA_SDO HP0_PORT_A_R AUD_VREFOUT_B C3041

VREFOUT_A_OR_F 23 AUD_VREFOUT_B 60
PCH_AZ_CODEC_SYNC 10 AUD_DOCK_HP_OUT_R_C1 1Dock2
24 PCH_AZ_CODEC_SYNC HDA_SYNC AUD_HP_OUT_L R3007 1
HP1_PORT_B_L 31 2 60D4R2F-GP AUD_HP_JACK_L_2 60
C3038
PCH_AZ_CODEC_RST# 11 32 AUD_HP_OUT_R R3008 1 2 60D4R2F-GP AUD_DOCK_MIC_IN_L_C1 1Dock2
24,75 PCH_AZ_CODEC_RST# HDA_RST# HP1_PORT_B_R AUD_HP_JACK_R_2 60 C3043
AUD_DOCK_MIC_IN_R_C1 1Dock2
PORT_C_L
PORT_C_R
19
20 Earphone C3037
Digi. MIC AUD_DMIC_CLK 2 DMIC_CLK/GPIO1
VREFOUT_C 24
AUD_DMIC_IN0_R AUD_SPK_L+
73 AUD_DMIC_IN0 1
R3009
2
0R0402-PAD-2-GP
4 DMIC0/GPIO2 SPKR_PORT_D_L+
SPKR_PORT_D_L-
40
41 AUD_SPK_L- AUD_SPK_L+ 60
AUD_SPK_L- 60
Speaker
46 DMIC1/GPIO0/SPDIF_OUT_1
+3.3V_RUN 43 AUD_SPK_R-
SPKR_PORT_D_R- AUD_SPK_R+ AUD_SPK_R- 60
C
1 DY 2
48 SPDIF_OUT_0 SPKR_PORT_D_R+ 44 AUD_SPK_R+ 60 DOCK HP C
R3010 10KR2J-3-GP AUD_NB_MUTE 47 15 AUD_DOCK_HP_OUT_L 2 Dock 1 AUD_DOCK_HP_OUT_L_C1 1Dock2 AUD_DOCK_HP_OUT_L_C 75

38 AUD_NB_MUTE EAPD PORT_E_L AUD_DOCK_HP_OUT_R R3029 2
PORT_E_R 16 Dock 1 2KR2F-3-GP AUD_DOCK_HP_OUT_R_C1 C3042 1Dock
SC1U16V3KX-2GP
2 AUD_DOCK_HP_OUT_R_C 75
R3030 2KR2F-3-GP C3040 SC1U16V3KX-2GP
PUMP_CAPN 17 AUD_DOCK_MIC_IN_L 1 Dock
2 AUD_DOCK_MIC_IN_L_C1 2 Dock 1
PORT_F_L AUD_DOCK_MIC_IN_L_C 75
35 18 AUD_DOCK_MIC_IN_R C3039 1 SC1U16V3KX-2GP
Dock
2 AUD_DOCK_MIC_IN_R_C1 R3019 2 Dock 1 2KR2F-3-GP
CAP- PORT_F_R AUD_DOCK_MIC_IN_R_C 75
1
C3017 C3036 SC1U16V3KX-2GP R3028 2KR2F-3-GP
SC2D2U25V5KX-1GP
2 36 CAP+
PC_BEEP 12
DOCK MIC
PUMP_CAPP 25 AUD_PC_BEEP
MONO_OUT C3020
AUD_PC_BEEP 2 1 ACZ_SPKR_R R3013 1 2 ACZ_SPKR 24 From PCH
7 SCD1U10V2KX-4GP 499KR2F-1-GP
DVSS Trace width>15 mils C3021 2 1 EC_BEEP R3016 1 2 From EC
+3.3V_RUN BEEP 37
33 22 AUD_CAP2 SCD1U10V2KX-4GP 499KR2F-1-GP
AVSS CAP2
2
U3002 30 AVSS AUD_VREFFLT
5 VCC OE# 1 26 AVSS VREFFILT 21
AUD_DMIC_CLK_Y
DY A 2
AUD_V_B R3015
4 Y GND 3 42 PVSS V- 34
DUMMY-C2
74LVC1G125DC-GP 49 37 AUD_VREG
1
GND VREG
1
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
C3022
C3023
C3024
C3025
SC1U6D3V2KX-GP
0R2J-2-GP 92HD81B1A5NLGXUAX8-GP
DY
1
R3018
U3001 change to UA version. For Codec pop noise
2
2
1 2 AUD_DMIC_CLK
73 AUD_DMIC_CLK_G R3017 100R2J-2-GP AUD_HP_JACK_R_2 AUD_HP_JACK_L_2
1
B EC3001DY B
SC22P50V2JN-4GP +15V_ALW
D
2
Close to codec Q3002 Q3003
1
AO3418-GP AO3418-GP
R3020
DY DY
G G
100KR2J-1-GPDY
+VDDA
S
2
Place this block
Azalia I/F EMI
1
HP_CODEC_MUTE AUD_HP_L_Q
R3021 close to Audio Codec Pin13 AUD_HP_R_Q
PCH_CODEC_SDOUT 2K49R2F-GP
S
2
1
AUD_SENSE_A Q3004 G G
R3022 DY DY DY
1
47R2J-2-GP AUD_NB_MUTE AO3418-GP AO3418-GP

DY C3026 R3001 R3023
G
2N7002A-7-GP Q3005 Q3001
SC1KP50V2KX-1GP 20KR2F-L-GP 39K2R2F-L-GP +3.3V_RUN
2
D
S
Low -> Mute
PCH_AZ_CODEC_SDOUT1
2 1
2
HP_NB_SENSE R3024 100KR2J-1-GP

AUD_MIC_SWITCH 60
YD version need d-pop circuit

UA version no need d-pop circuit
3
A
Now is YD version A
Q3006 <Core Design>
DMN66D0LDW-7-GP
1
Wistron Corporation
4
DY C3027
SCD1U10V2KX-4GP MIC_SWITCH 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

AUD_HP_NB_SENSE 38,60
Title
Audio Codec
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = 1394
+3.3V_RUN +3.3V_RUN_CB
1 2
SC10U6D3V5MX-3GP
R3201 0R0805-PAD-2-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PCIE_VOUT/VIN
1
1
C3202
C3203
C3204
C3205
C3206
2
2
D D
+3.3V_RUN_CB U3201
K3 M4 CBS_CAD26
VCC_3V CADR0 CBS_CAD25
J4 N4
C10 N3
M3
PCIE_VOUT/VIN CADR3 CBS_CAD22
N11 L3
PCIE_VIN CADR4 CBS_CAD21
M11 M2
PCIE_VIN CADR5
Close to VCC_3V_R5U241 M13 M1 CBS_CAD20
+3.3V_RUN_CB PCIE_VIN CADR6 CBS_CAD18
L1
CADR7 CBS_CC/BE1#
J3 E3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SDMSXD_VCC PCIE_VOUT CADR8 CBS_CC/BE1# 72

C8 D2 CBS_CAD14
PCIE_VOUT CADR9 CBS_CAD9
C3
+3.3V_RUN_CB CADR10
SDMSXD_VCC trace = 40mil D13 C2 CBS_CAD12
MF_VOUT CADR11
1
K1 CBS_CC/BE2#
CADR12 CBS_CC/BE2# 72
CBS_CPAR
C3208
C3207
D7 F1 CBS_CPAR 72
AVCC_3V CADR13 CBS_CPERR#
G1 CBS_CPERR# 72
2
VCC_SD CADR14 CBS_CIRDY#

1 2 D8 J2 CBS_CIRDY# 72
C3219 SC1U10V2KX-1GP SD18C CADR15 CBS_CCLK_R
H3 2 R3204 1 CBS_CCLK 72
CADR16 CBS_CAD16 0R0402-PAD-2-GP
E2
CADR17 CBS_DATA18
23 CLK_PCIE_R5U241# M8 F2 CBS_DATA18 72
REFCLKN CADR18
23 CLK_PCIE_R5U241 N8 G2 CBS_CBLOCK#
CBS_CBLOCK# 72
Shield GND
REFCLKP CADR19 CBS_CSTOP#
F3 CBS_CSTOP# 72
CADR20 CBS_CDEVSEL#
23 PCIE_PTX_R5U241RX_N3_C M10 G3 CBS_CDEVSEL# 72
RXN CADR21 CBS_CTRDY#
23 PCIE_PTX_R5U241RX_P3_C N10 J1 CBS_CTRDY# 72
RXP CADR22 CBS_CFRAME#
H4 CBS_CFRAME# 72
RXC_R5U241 CADR23 CBS_CAD17
L9 K2
RXC CADR24 CBS_CAD19
Close to AVCC_3V_R5U241 CADR25
L2
C3209 1 2SCD1U10V2KX-4GP PCIE_PRX_R5U241TX_N3_C N13
+3.3V_RUN_CB 23 PCIE_PRX_R5U241TX_N3 PCIE_PRX_R5U241TX_P3_C TXN CBS_CAD27
1 2 N12 N5
23 PCIE_PRX_R5U241TX_P3 C3210 SCD1U10V2KX-4GP TXP CDATA0 CBS_CAD29
N6
CPO_R5U241 CDATA1 CBS_DATA2
L10 N7
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
CPO CDATA2 CBS_DATA2 72

RREF_R5U241 L11 C5 CBS_CAD0
CB_RST#_R RREF CDATA3 CBS_CAD1
21,34,58,72 PLTRST2# 1 2 M12 A4
R3202 0R0402-PAD-2-GP PERST# CDATA4 CBS_CAD3
A3
CDATA5
1
A2 CBS_CAD5
CDATA6 CBS_CAD7
C3211
C3212
C
71 TPA0N B5 A1 C
TPAN0 CDATA7 CBS_CAD28
71 TPA0P A5 M5
2
TPAP0 CDATA8 CBS_CAD30

M6
CDATA9 CBS_CAD31
71 TPB0N B6 M7
TPBN0 CDATA10 CBS_CAD2
71 TPB0P A6 B4 CBS_CAD[0..31] 72
TPBP0 CDATA11 CBS_CAD4
C4
+3.3V_RUN_CB CDATA12 CBS_CAD6
C7 B3
71 TPBIAS0 TPBIAS0 CDATA13 CBS_DATA14
B2 CBS_DATA14 72
CPS CDATA14 CBS_CAD8
1 2 D4 B1
R3203 0R0402-PAD-2-GP CPS CDATA15
D1 CBS_CAD13 IORD#=>USBD+
1394_XI IORD# CBS_CAD15
A8 E1 IOWR#=>USBD-
SDMSXD_VCC XI IOWR#
Close to chip 1394_XO_R B8
XO CBS_CAD11
C1
OE# CBS_CGNT#
F4
WE# CBS_CGNT# 72
A11
GND
1
B11 D5 CBS_CC/BE0#
GND CE1# CBS_CC/BE0# 72
C3214 B9 D3 CBS_CAD10
SCD1U10V2KX-4GP GND CE2#
A9
2
GND CBS_CSTSCHNG
K7 CBS_CSTSCHNG 72
BVD1 CBS_CAUDIO
C9 L6 CBS_CAUDIO 72
GND BVD2
A10
CPO_R5U241 GND
1 R3222 2 SDBWP# B10 D6 CBS_CCD1#
CBS_CCD1# 72
0R0402-PAD-2-GP GND CD1# CBS_CCD2#
G10 K8 CBS_CCD2# 72
MFCD2# CD2#
H10
NC#H10
1
E4 CBS_CVS1
C3201 VS1# CBS_CVS2 CBS_CVS1 72
K5
SC1500P50V2KX-2GP R3223 VS2# CBS_CVS2 72
K13
2
PCMCLK_REQ#_C UDIO0 CBS_CC/BE3#

1 2 K12 L4 CBS_CC/BE3# 72
23,58 PCMCLK_REQ# UDIO1 REG# CBS_CINT#
J13 G4 CBS_CINT# 72
0R0402-PAD-2-GP UDIO2 RDY/IREQ CBS_CCLKRUN#
J12 L7 CBS_CCLKRUN# 72
UDIO3 WP#/IOIS16# CBS_CRST#
J11 N1
RXC_R5U241 UDIO4 RESET CBS_CSERR# CBS_CRST# 72
H11 N2
UDIO5 WAIT# CBS_CREQ# CBS_CSERR# 72
K6 CBS_CREQ# 72
INPACK#
1
CBS_SPK J10
C3215 SPKROUT VPPEN0
L13 E10
SCD022U16V2KX-3GP GBRST# WAKE# VPPEN0 VPPEN1 VPPEN0 72
K9 D9
2
B GBRST# VPPEN1 VPPEN1 72 B

K10
TEST VCC5EN#
E11
VCC5EN# VCC3EN# VCC5EN# 72
F10
VCC3EN# VCC3EN# 72
H13
RREF_R5U241 71 SDWP SD_MMC_DAT1_R MFIO0 +3.3V_RUN_CB
71 SD_MMC_DAT1 1 2 H12
R3218 1 SD_MMC_DAT0_R MFIO1
71 SD_MMC_DAT0 2 33R2J-2-GP G13 K11
R3217 33R2J-2-GP MFIO2 AGND
G12 L12
MFIO3 AGND
1
F13
MFIO4
2
R3207 R3207 close to U3201 1 2 SD_MMC_CLK_R F12 M9
5K1R2F-2-GP trace need Shield GND 71 SD_MMC_CLK MFIO5 GND
R3205 33R2J-2-GP -1.10/0302 D12
MFIO6 GND
N9 R3206
D10 E13 47KR2F-GP
SD_MMC_CMD_R MFIO7 GND
71 SD_MMC_CMD 1 2 C13 E12
2
R3214 0R0402-PAD-2-GP MFIO8 GND

C12 L8
1
SD_MMC_DAT3_R MFIO9 GND
71 SD_MMC_DAT3 1 2 B13 L5
R3220 1 MFIO10 GND
71 SD_MMC_DAT2 2 33R2J-2-GP SD_MMC_DAT2_R C11 K4 GBRST#
R3219 33R2J-2-GP MFIO11 GND USBP12-
A13 H2 USBP12- 21,34,72
MFIO12 USBDM
1
B12 H1 USBP12+ USBP12+ 21,34,72
+3.3V_RUN_CB MFIO13 USBDP C3216
A12 A7
MFIO14 GND SC1U10V2KX-1GP
B7
2
GND
R3208 3 in 1 - Flash Card 71 SD_MMC_CD#
SD_MMC_CD# F11 C6
MFCD0# GND
SD,SDHC/ use 4 bit G11 D11
CBS_SPK MFCD1# GND
1 2 MMC / use 1 bit
MMC+ / use 8 bit R5U242-CSP144P-GP-U
47KR2F-GP
Global Reset (GBRST#)
Note:De-asserted before PERST# de-assertion
1394_XI
A X3201 A
1 2 1394_XO 1 R3209 2 1394_XO_R
0R0402-PAD-2-GP
X-24D576MHZ-70GP
<Core Design>
1
C3217 C3218
SC15P50V2JN-2-GP SC15P50V2JN-2-GP Wistron Corporation
2
Title
Shield GND Flash Reader / 1394 / PCMCIA

Xtal for XO/XI as close as possible to R5U241 Size Document Number Rev
C
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Reserve
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = SmartCard
D D
SmartCard Chip
+3.3V_RUN +5V_RUN
2 SC1C3404 1 SC2 RN3402

SCD1U10V2KX-4GP C3405 SCD1U10V2KX-4GP 1 8
SC4D7U6D3V3KX-GP
2 SC1C3406 1
C3407
SC2 SC4D7U6D3V3KX-GP
2 7
3 SC 6
4 5
SC_VCC
SRN15KJ-2-GP
U3401
Full Speed Device 5 19 SC_DP_D-
5_0VCC DP_DN
1
28 SC 18 SC_DP_D+ C3402 C3403
5_0VCC DP_DP
C SC SC C
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
RN3403 1 SC 2 8 21 SC_EG_D- SC_EG_D- 67
2
SRN0J-6-GP R3403 1K5R2J-3-GP 3_3VCC EGATE_DN SC_EG_D+
EGATE_DP 20 SC_EG_D+ 67
21,32,72 USBP12- 2 3 USBP12-_C 17 SC_VCC confirm FAE
USBP12+_C UP_DN SC_VCC
21,32,72 USBP12+ 1 SC 4 16 UP_DP SC_VCC 27
SC_RST#
SC_VCC 67 20 mils is OK
SC_RST# 24 SC_RST# 67
12 23 SC_CLK SC_CLK 67
21,32,58,72 PLTRST2# RST# SC_CLK SC_C4
SC_C4 22 SC_C4 67
23 CLK_SC_48M 3 25 SC_IO SC_IO 67
48M_IN SC_IO SC_DET#
4 NC#4 SC_DET# 13 SC_DET# 67
Near OZ77CR6L
MODE0_LED 32 MODE0/SC_LED
1 MODE1 RFIO_1 15
2 MODE2 RFIO_0 14
SC_C4
OZ77CR6LN-GP-U1 This pin connects to the C4 pin of the Smart Card connector.
1
9 GND
VR_CPR_0
VR_CPR_1
R3409 11 GND NC#7 7 It is required to support ISO7816-10 synchronous type 2 cards.
3V_CPR
4K7R2J-2-GP SC 26 30
GND NC#30
33 GND NC#31 31
6
10
29
CLK_SC_48M
1
1
R3411 C3408 C3401
DY 10KR2J-3-GP SC
SC
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
2
B B
2
1CLK_SC_48M_C
VR filter.
DY C3409
SC10P50V2JN-4GP An external capacitor shall connect to this terminal.
2
This terminal is an output indicating Smart Card activity; Contactless Smart Card Interface Signal 0 and 1.
capable to drive an external LED device. This signal provides detection and data communication
The SC_LED terminal drives a low logic level during Smart Card data RFIO_0 with an external RF device.
read/write activity, and is capable to source 12mA of IOL current to If contactless is disabled, then this terminal shall be pulled-down
drive an external LED circuit. RFIO_1 to GND through a pull-down resistor, or directly connected to GND.
MODE0 / SC_LED When RST# is asserted, this terminal is sampled to select the
downstream port configuration for DP_DP and DP_DN (Internal Port 1).
A
When sampled low (4.7k), the downstream port device is removable. A
When sampled high, the downstream port is a non-removable device. <Core Design>
Includes internal input pull-up resistor.
Wistron Corporation
MODE1 Test Pin. This terminal shall be externally connected to GND.
Title
MODE2 Test Pin. This terminal shall be externally connected to GND.

Size
Smart Card (OZ77CR6LN)
Document Number Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = LOM +3.3V_LAN

+3.3V_LAN
RN3502 +3.3V_ALW_2 +15V_ALW
SYMBOL: 71.05761.00U LOM_SMBDAT 4 1
LOM_SMBCLK 3 2 +3.3V_ALW +3.3V_LAN
1
Product : P802H / U3503
SRN2K2J-1-GP R3502 R3503
LOM_SMBCLK 1 6 100KR2J-1-GP 100KR2J-1-GP U3504
71.05761.M02(Rev:B0) LAN_SMBCLK 37
SMBCLK 3 2 1 D D 6
2 5 SMBDATA 4 1 2 D D 5
2
RN3503 +3.3V_LAN_EN1 +3.3V_LAN_EN2 3 G S 4
3 4 SRN2K2J-1-GP
SI3456DDV-T1-GE3-GP
+3.3V_LAN
LOM_SMBDAT DMN66D0LDW-7-GP U3502
1
1
1
R3504 C3502
D LAN_SMBDAT 37 D
R3505 DY 470KR2J-2-GP SC4700P50V2KX-1GP
4K7R2J-2-GP
2
1
2
2
+1.2V_LOM U3501A 1 OF 2 DMN66D0LDW-7-GP
Core Power Decoupling +3.3V_LAN
APE_GPIO0 TP3502
E4 A11 1 Design current: 89.6mA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
VDDC APE_GPIO0 LOM_SMB_ALERT#
E7 A10
VDDC APE_GPIO1 LOM_SMB_ALERT# 38
1
Max current: 128mA
C3505
C3506
C3503
C3507
C3508
C3501
C3509
C3504
C3510
F5 A9
VDDC APE_GPIO2
1
2
H9 A8 APE_GPIO3 1 TP3503
VDDC APE_GPIO3 APE_GPIO4 TP3504
J4 A7 1
2
VDDC APE_GPIO4 APE_GPIO5 TP3505 RN3504
K4 A2 1
VDDC APE_GPIO5 APE_GPIO6 TP3506 SRN4K7J-8-GP
K7 B1 1
VDDC APE_GPIO6 AUX_ON_R 1
L4 2 AUX_ON 37
VDDC SMBCLK R3507 0R0402-PAD-2-GP
E8
4
3
+3.3V_LAN VDDC_IO SMB_CLK LOM_SMBCLK
M13 A3
VDDC_IO APE_SMB_CLK0 LAN_SMBCLK1
VDDIOPower Decoupling APE_SMB_CLK1
A5
B7 C7 SMBDATA 8Mb for 5761E:
VDDIO SMB_DATA LOM_SMBDAT
B11 A4
VDDIO APE_SMB_DATA0 Main source: 72.45081.B01(Small PAD)
1
1
C3511 C3512 C3513 C3514 G11 A6 LAN_SMBDATA1
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SC4D7U6D3V3KX-GP VDDIO APE_SMB_DATA1
D2
VDDIO Second source: 72.45081.D01(Small PAD)
H2 H1
2
2
VDDIO HUSB_DN
K3 G1
VDDIO HUSB_DP +3.3V_LAN U3505 +3.3V_LAN
N2
VDDIO
+1.2V_LOM
Close to LAN chip
J1 6 5
VDDIO_USB VCC WP# LOM_CS#
Put 0.1u cap close to Chip A1 4
VSS CS#
1 2 +1.2V_AVDDL E11 A12 3
AVDDL VSS RESET#
1
L3502 D11 A13 LOM_SO 1 C3544
AVDDL VSS +1.2V_LOM LOM_SI SI
BLM18AG601SN-3GP 1 2 1 2 1 2 C11 B4 8 Atmel SCD1U10V2KX-4GP
AVDDL VSS LOM_SCLK SO
C3515 C3516 C3517 B10 2 7
SCK GND
2
+3.3V_LAN SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VSS
E10 D6
D10
AVDDH VSS
E5 Small PAD
+2.5V_AVDD AVDDH VSS +1.2V_PCIE_PLLVDD AT45DB081D-SSU-GP
1 2 F11 E9 1 2
L3501 BLM18AG601SN-3GP AVDDH VSS L3503
F6
+2.5V_XTALVDD VSS SCD1U10V2KX-4GP 2 C3518 BLM18AG601SN-3GP
C3520
C3521
C3522
L7 F7 1 2 1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
XTALVDDH VSS
1
09/0529 VSS
F8 C3519
C +2.5V_BIASVDD F12 F9 SC4D7U6D3V3KX-GP C
BIASVDDH VSS +1.2V_PCIE_SDSVDD
G5 1 2
SCD1U10V2KX-4GP
2
+1.2V_USB_PLLVDD VSS L3504
C3523
C3524
L1 G6
SCD1U10V2KX-4GP
USB_PLLVDDL VSS
1
1
G7 SCD1U10V2KX-4GP 1 2 C3525 2 1 BLM18AG601SN-3GP
+1.2V_PCIE_SDSVDD VSS C3526
N4 G8
PCIE_SDSVDD VSS SC4D7U6D3V3KX-GP
G9
2
2
+1.2V_PCIE_PLLVDD VSS +1.2V_GPHY_PLLVDD
L5 G10 1 2
PCIE_PLLVDDL VSS L3505 U3506
H4
+1.2V_GPHY_PLLVDD VSS SCD1U10V2KX-4GP
G12 H5 1 2 C3527 2 1 BLM18AG601SN-3GP
+3.3V_LAN GPHY_PLLVDDL VSS C3528 LOM_CS#
H6 8 1
VSS SC4D7U6D3V3KX-GP VCC S# LOM_SI
H7 7 2
VSS +1.2V_USB_PLLVDD LOM_SCLK RESET# Q
1 2 H10 1 2 6 3
L3506 BLM18AG601SN-3GP VSS L3507 LOM_SO C TSL#/W#
J5 5 4
VSS SCD1U10V2KX-4GP D VSS
K1 1 2 C3529 2 1 BLM18AG601SN-3GP Numonyx
VSS
1 2 TP3507 1 G3 K5
L3508 BLM18AG601SN-3GP TDI VSS C3530 M25PE80-VMN6TP-GP
TP3508 1 F2 L6
TMS VSS SC4D7U6D3V3KX-GP
TP3509 1 D5 M1
TDO VSS
TP3510 1 C6 M4
TP3511 1 C3
TCK
TRST#
VSS
VSS
M6 Close to the power pins and 72.25P80.D01
DY 2 NB_GPHY_TVCOI
1 F10 N1
R3512
DY 2 4K7R2J-2-GP DK_GPHY_TVCOI
1 N13
NB_GPHY_TVCOI VSS
N6 0.1u cap should be closer to Chip
R3513 4K7R2J-2-GP DK_GPHY_TVCOI VSS
Populate resister for debug
BCM5761EA0KFBG-GP
U3501B 2 OF 2
H12 M9 LOM_XTALI
74 DOCK_LOM_TRD0+ DK_TRD0+ XTALI
H13 N9 LOM_XTALO 1 2 LOM_XTAL1 Place crystal less
74 DOCK_LOM_TRD0- DK_TRD0- XTALO
SIO_SLP_S3# J12 R3514 200R2F-L-GP X3501
9,22,38,50 SIO_SLP_S3# 74 DOCK_LOM_TRD1+ DK_TRD1+ than 0.75" (~1.9cm)
74 DOCK_LOM_TRD1- J13 1 2
IRQ_SERIRQ DK_TRD1-
74 DOCK_LOM_TRD2+ K12
DK_TRD2+ DK_LINKLED#
E3
DOCK_LOM_SPD10LED_GRN# 74 from LAN Controller
K13 E2 XTAL-25MHZ-96GP
74 DOCK_LOM_TRD2- DK_TRD2- DK_SPD100LED# DOCK_LOM_SPD100LED_ORG# 74
74 DOCK_LOM_TRD3+ L12 D3
DK_TRD3+ DK_SPD1000LED#
1
+3.3V_LAN L13 F3
74 DOCK_LOM_TRD3- DK_TRD3- DK_TRAFFICLED# DOCK_LOM_ACTLED_YEL# 74
6
B8 NB_LOM_SPD10LED_GRN# 1 2 C3532 C3533

Q3502 NB_LINKLED# NB_LOM_SPD100LED_ORG# R3515 1 NB_LOM_SPD10LED_GRN#_R 76 SC15P50V2JN-2-GP SC15P50V2JN-2-GP
B 76 NB_LOM_TRD0+ E12 C8 2 150R2F-1-GP B
2
NB_TRD0+ NB_SPD100L# NB_LOM_SPD100LED_ORG#_R 76
1
DMN66D0LDW-7-GP E13 D8 R3516 150R2F-1-GP

76 NB_LOM_TRD0- NB_TRD0- NB_SPD1000LED#
R3548 D12 D7 NB_LOM_ACTLED_YEL# 1 2
100KR2J-1-GP 76 NB_LOM_TRD1+ NB_TRD1+ NB_TRAFFICLED# NB_LOM_ACTLED_YEL#_R 76
D13 R3517 150R2F-1-GP
76 NB_LOM_TRD1-
1
NB_TRD1- LOM_CS#
DOCKED 76 NB_LOM_TRD2+ C12
NB_TRD2+ CS#
C10 1 DY 2 +3.3V_LAN
C13 R3518 4K7R2J-2-GP
76 NB_LOM_TRD2-
2
SEL 0:RJ45. B12

NB_TRD2-
K2 LOM_NV_STRAP0 1 DY 2
76 NB_LOM_TRD3+ NB_TRD3+ NV_STRAP0
SEL 1:Dock. B13 M2 LOM_NV_STRAP1 R3519 1 DY 2 4K7R2J-2-GP
76 NB_LOM_TRD3- NB_TRD3- NV_STRAP1 R3520 4K7R2J-2-GP
38 DOCKED F4 D9 LOM_SI 1 DY 2
LOM_CABLE_DET E_SWITCH_CONT SI LOM_SO R3521 1
1 DY 0R2J-2-GP
2 C4 C9 DY 2 4K7R2J-2-GP
38 LOM_CABLE_DETECT R3522 ENERGYDET SO LOM_SCLK R3523 1
B9 DY 2 4K7R2J-2-GP
CLK_PCI_TPM SCLK R3524 4K7R2J-2-GP
23,70 CLK_PCI_TPM
N8
RN3508 GPIO0 TP3512 +3.3V_LAN
M8 1
SRN0J-7-GP GPIO1 TP3501
C5 1
GPIO2
1 8 H8
+3.3V_LAN LPC_LAD0_BTPM LCLK LOM_SERIAL_DI
24,36,37,38,70 LPC_LAD0 2 7
LPC_LAD1_BTPM SERIAL_DI
J3
LOM_SERIAL_DO R3525 1
1 DY 2 +3.3V_LAN
24,36,37,38,70 LPC_LAD1 3 B_TPM 6 L9
LAD0 SERIAL_DO
L3 DY 2 4K7R2J-2-GP
1
4 5 LPC_LAD2_BTPM J8 R3527 4K7R2J-2-GP C3535
24,36,37,38,70 LPC_LAD2 LAD1
1
K10 J2 LAN_LOW_PWR R3531 C3534 SC4D7U6D3V3KX-GP

LAD2 LOW_PWR LAN_LOW_PWR 38
CTPM and DisableBTPM RN3507 1 4 LPC_LAD3_BTPM J10 K11 SUPER_LOW_PWR 1R2512J-1-GP SCD1U10V2KX-4GP
24,36,37,38,70 LPC_LAD3
2
SRN0J-6-GP 2 LPC_LFRAME#_BTPM LAD3 PWR_DOWN RN3501
24,36,37,38,70 LPC_LFRAME# B_TPM 3
1
R3530 L11 B6 VAUX_PRSNT 2 3 +3.3V_LAN
2
4K7R2J-2-GP 0R2J-2-GP R3534 LOM_PCIE_RST#_L LFRAME# VAUXPRSNT
1B_TPM 2 L8 H11 VMAIN_PRSNT 1 4 +3.3V_RUN R3536 +3.3V_LAN_R
2
36 LOM_PCIE_RST# IRQ_SERIRQ_R LRESET# VMAINPRSNT

1 R3535 2 L10 SRN1KJ-7-GP 0R0402-PAD-2-GP
24,36,37,38 IRQ_SERIRQ SERIRQ
3
2 B_TPM
1 0R0402-PAD-2-GP LOM_TPM_EN#_R L2 Logic High Voltage must Design Current: 627mA
38 LOM_TPM_EN# TPM_EN#
R3537 0R2J-2-GP F13 NB_LOM_RDAC 2 1
2
NB_RDAC be 0.7V to 2.75V
1
1 DY 2 TPM_GPIO0 K9 G13 DOCK_LOM_RDAC 1K24R2F-GP 2 Dock 1 R3538

R3539 1 TPM_GPIO0 DK_RDAC
B_TPM DY 2 10KR2J-3-GP TPM_GPIO1 K8 1K24R2F-GP R3540 1 Q3501
R3543 10KR2J-3-GP TPM_GPIO2 TPM_GPIO1 NJT4030PT1G-GP
J9
R3542 TPM_GPIO2/TPMSTATUS
N11
REGSUP12
2
4K7R2J-2-GP R3544 M12 +1.2V_LOM

+1.2V_LOM
2
2
4
REGSEN12
2
10KR2J-3-GP M11 LOM_REGCTL12_PNP C3536 C3537
REGCTL12 LOM_REGCTL25_PNP VDDC_IO SCD047U10V2KX-2GP DY
CTPM and DisableBTPM REGIO_OUT12
N12 2
R3545
1
0R0402-PAD-2-GP
1 2
SC1U10V2KX-1GP
Reserve for EMI TP3513 1 C1
1
NC#C1
1
+3.3V_LAN 1 D1 C3538 C3539
TP3514
1
A NC#D1 SCD1U10V2KX-4GP SC10U6D3V5KX-1GP A

D4 N7 PCIE_PTX_GLANRX_P6_C 23
CLK_PCI_TPM RN3505 NC#D4 PCIE_RXDP
TP3515 1 E1 M7 PCIE_PTX_GLANRX_N6_C 23
2
LPC_LAD2_BTPM NC#E1 PCIE_RXDN
1 8 E6
NC#E6
1
2 7 LPC_LAD1_BTPM 1 F1 N3 PCIE_PRX_GLANTX_P_C 2 1 <Core Design>

TP3516 NC#F1 PCIE_TXDP PCIE_PRX_GLANTX_P6 23 +3.3V_RUN
R3501 3 6 LPC_LAD0_BTPM G2 M3 PCIE_PRX_GLANTX_N_C SCD1U10V2KX-4GP 2 1 C3540
NC#G2 PCIE_TXDN PCIE_PRX_GLANTX_N6 23
DY 22R2J-2-GP 4 5 CLK_PCI_TPM G4
NC#G4
SCD1U10V2KX-4GP C3541
CTPM and DisableBTPM H3
NC#H3 REFCLK+
N5 CLK_PCIE_LOM 23 Wistron Corporation
2
J6 M5 CLK_PCIE_LOM# 23 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
CLK_PCIGLAN SRN10KJ-6-GP NC#J6 REFCLK- R3546

J7 Taipei Hsien 221, Taiwan, R.O.C.
RN3506 NC#J7
J11 B3 10KR2J-3-GP
NC#J11 REFCLK_SEL
1
C3542 1 8 K6 B2 LOM_PCIE_RST# 1 2
NC#K6 PERST# PLTRST4# 21,64,76 Title
DY SC4D7P50V2CN-1GP 2 7 LPC_LAD3_BTPM M10 B5 R3547 0R0402-PAD-2-GP
GLAN - BCM5761E
1
LPC_LFRAME#_BTPM NC#M10 WAKE# LOM_CLKREQ# PCIE_WAKE# 38,64,72
3 6 N10 C2
2
LOM_PCIE_RST#_L NC#N10 CLKREQ# LOM_CLKREQ# 23

4 5 Size Document Number Rev
CTPM and DisableBTPM Custom -1
SRN10KJ-6-GP
BCM5761EA0KFBG-GP Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
Symbol : Jetway, but linked to ZTE

SSID = TCM Product : 71.08172.00W (ZTE)
D D
TCM +3.3V_RUN
U3601
1 GPIO1 NC VDD 10
TP3601 TCM_GPIO3
2 GPIO2 NC VDD 19 C_TPM C_TPM C_TPM
1 6 GPIO_EXPRESS_00 VDD 24
1
R3615 GPIO3 C3602 C3603 C3604 +3.3V_RUN
0R0402-PAD-2-GP SC1U6D3V2KX-GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
1 2 SP_TPM_LPC_EN_R 28
38 SP_TPM_LPC_EN
2
LPC_LAD0 LPCPD#
24,35,37,38,70 LPC_LAD0 26 LAD0 GND 11
2
LPC_LAD1 23 18
24,35,37,38,70 LPC_LAD1 LAD1 GND
LPC_LAD2 20 25 R3601
24,35,37,38,70 LPC_LAD2 LAD2 GND
1
LPC_LAD3
R3602
24,35,37,38,70 LPC_LAD3 17 LAD3 C_TPM GND 4 DY 10KR2J-3-GP
4K7R2J-2-GP
DY
1
+3.3V_RUN 21 BA1 NC#3 3 TCM_BA1
23 CLK_PCI_TPM_CHA
2
LPC_LFRAME# LCLK TCM_PIN5

24,35,37,38,70 LPC_LFRAME# 22 LFRAME# NC#5 5
C 35 LOM_PCIE_RST# 16 LRESET# GPIO15NC#12 12 C
2
27 GPIO16NC#13 13 CLK_PCH_14M_TCM 1 2
24,35,37,38 IRQ_SERIRQ SERIRQ CLK_JETWAY_14M 23
2
CLKRUN#_CTPM 15 VR25 14 TCM_VR25 R3604 R3608
CLKRUN# NC#14
1
1 DY 2 TPM_PP 7 0R0402-PAD-2-GP R3607 C3605 Z 10KR2J-3-GP
TCM_BA0 PP SCD1U10V2KX-4GP
R3606 TCM_TEST1
9 TESTBI/BADDBA0 DY 1KR2J-1-GP J
8
1
4K7R2J-2-GP +3.3V_RUN +3.3V_RUN TESTI
1
1
SSX44-B-D-T-GP
2
71.08172.A0W Z C3601
R3609 R3610
Symbol is J China TPM
2
DY 100KR2J-1-GP DY 10KR2J-3-GP SC2D2U6D3V3KX-GP
R3616
0R0402-PAD-2-GP
1
22,37,38 CLKRUN# 1 2 CLKRUN#_CTPM TCM_BA0

2
R3612 Z R3613 1
DY 10KR2J-3-GP 1KR2J-1-GP 0R2J-2-GP
DY R3614
1
B B
Z J
Base BA1 BA0 1(default) 0
Address PIN3 PIN9
PIN12 FLASH SRAM
EE/EF 0 0 J has internal PU with PIN12.
7E/7F 0 1
2E/2F 1 0
4E/4F 1 1
Default EE/EF as Amy recommended
A A
<Core Design>
Wistron Corporation
Title
TCM
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
+RTC_CELL +3.3V_ALW +3.3V_RUN

SSID = KBC 1 R3702 RUNPWROK
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2 1 2
R3707 10KR2J-3-GP
+3.3V_ALW
C3711
0R0402-PAD-2-GP 1 2 VTT_PWRGD 52
1
+5V_RUN
C3703
C3704
C3705
C3706
C3707
C3708
C3709
C3710
R3709 0R0402-PAD-2-GP
+3.3V_ALW C3702
RN3702 SCD1U10V2KX-4GP
2
1 8 CLK_KBD
1
2 7 DAT_KBD
B64
A11
A22
B35
A41
A58
A52
A26
R3704 CLK_MSE
B3
10KR2J-3-GP
3 Dock 6
DAT_MSE U3701 RN3703
4 5
DOCK_SMB_CLK 4 1
VBAT
VTR
VTR
VTR
VTR
VTR
VTR
VTR
VTR
SRN4K7J-10-GP DOCK_SMB_DAT 3 Dock 2
2
D JTAG_RST# D
SRN2K2J-1-GP
2
R3706 C3713 PS/2 INTERFACE MISC INTERFACE

1
KBC_SDA1 A5 A10 SYSTEM_ID RN3705

23 KBC_SDA1 GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1
KBC_SCL1 BOARD_ID HOST_DEBUG_TX
100R2J-2-GP
SCD1U10V2KX-4GP
DY 23 KBC_SCL1 B6 GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2 B10

DDR_ON HOST_DEBUG_RX
4 1
68 CLK_TP_SIO A37 B14 3 2
2
GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK HOST_DEBUG_TX DDR_ON 42,50

68 DAT_TP_SIO B40 B44
1
GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_RX HOST_DEBUG_TX 64 SRN10KJ-5-GP

74 CLK_KBD A38 GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX B46 HOST_DEBUG_RX 64,70
B41 B26 RUNPWROK
74 DAT_KBD GPIO113/PS2_DAT1A VCC_PRW GD RUNPWROK 9,38,58
A39 A25 EN_INVPWR -1.10/0301 RN3701
74 CLK_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR 54
B42 B36 EC_GPIO101 1 PBAT_SMBDAT 8 1
74 DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK TP3706
B59 B37 EC_GPIO103 1 PBAT_SMBCLK 7 2
44 PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_SIN TP3708
A56 B38 EC_GPIO105 1 CKG_SMBCLK 6 3
44 PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_SOUT TP3705
A34 DDR_HVREF_RST_GATE CKG_SMBDAT 5 4
GPIO102/HSPI_SCLK EC_GPIO104 DDR_HVREF_RST_GATE 9
GPIO104/HSPI_MISO A35 1 TP3707
CLK_PCI_EC A36 CPU1.5V_S3_GATE SRN2K2J-2-GP
GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE 42
JTAG INTERFACE GPIO116/MSDATA A40 MSDATA 64,70
1
JTAG_TDI A51 B43 MSCLK RN3720

70 JTAG_TDI GPIO145/JTAG_TDI GPIO117/MSCLK MSCLK 64,70
R3710 JTAG_TDO B55 A45 SIO_A20GATE CHARGER_SMBDAT 4 5
70 JTAG_TDO GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE 25
DY 10R2J-2-GP 70 JTAG_CLK
JTAG_CLK
JTAG_TMS
B56 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 A55 PS_ID
BAT1_LED#
PS_ID 43
CHARGER_SMBCLK
AUD_DOCK_SMBCLK
3 6
70 JTAG_TMS A53 GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 A57 BAT1_LED# 66 2 7
JTAG_RST# B57 B61 BAT2_LED# AUD_DOCK_SMBDAT 1 8
2
JTAG_RST# GPIO157/LED2 FWP# BAT2_LED# 66

Place close
CLK_PCI5035
B65
to Pin58 0 = Reset JTAG I/F MEC5045-LZY-GP FW P# SRN2K2J-2-GP
1 = Disable FAN PWM & TACH
DOCK_POR_RST# B22 GENERAL PURPOSE I/O RN3708
74 DOCK_POR_RST# SUS_ON GPIO050/FAN_TACH1 EC_GPIO001 BC_DAT_ECE1077
42 SUS_ON
A21 GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1 B2 1 TP3709 8 1
1
AUX_ON B23 A2 DOCK_SMB_ALERT# BC_DAT_ECE5028 7 2

35 AUX_ON GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# 74
1
C
C3716 C3715 R3711 BREATH_LED# B24 B8 FFS_INT# 2 DY R3712
1 BC_C_DAT 6 3 C
66,74 BREATH_LED# GPIO053/PW M0 GPIO014/GPTP-IN7/HSPI_CS1 FFS_INT1 21,40
1MR2J-1-GP
DY SC4D7P50V2CN-1GP SCD1U10V2KX-4GP Dock Dock 42 PCH_ALW_ON

PCH_ALW_ON
EC_GPIO55
A23 GPIO054/PW M1 GPIO040/GPTP-OUT3/HSPI_CS2 B18 H_SKTOCC#
ME_SUS_PWR_ACK
H_SKTOCC# 9
0R2J-2-GP
BC_DAT_EMC4022 5 4
1 B25 A8 ME_SUS_PWR_ACK 22
2
TP3711 EC_GPIO56 GPIO055/PW M2 GPIO015/GPTP-OUT7 1.5V_SUS_PWRGD SRN100KJ-5-GP

1 A24 B9 1.5V_SUS_PWRGD 50
2
TP3712 GPIO056/PW M3 GPIO016/GPTP-IN8 EC_GPIO017 DOCK_SMB_ALERT#

GPIO017/GPTP-OUT8 A9 1 TP3713 2 Dock 1
A14 EC_GPIO026 1 R3713 10KR2J-3-GP
GPIO26/GPTP-IN1 TP3719
BC-LINK B15 ALW_PWRGD_3V_5V RN3713
GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V 46
-1.10/0301 BC_CLK_ECE5028 A43 A17 ODD_DET# CARD_SMBDAT 4 1
38 BC_CLK_ECE5028 GPIO123/BCM_A_CLK GPIO041 ODD_DET# 59
BC_DAT_ECE5028 B45 B39 RESET_OUT# CARD_SMBCLK 3 2
38 BC_DAT_ECE5028 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# 22
BC_INT#_ECE5028 A42 A44 EC_GPIO125 1
R3741 38 BC_INT#_ECE5028 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5 TP3714
BC_CLK_EMC4022 A12 B47 PCH_RSMRST# SRN2K2J-1-GP
39 BC_CLK_EMC4022 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# 22
1 2 EN_INVPWR BC_DAT_EMC4022 B13 A54 AC_PRESENT MSCLK 2 1
39 BC_DAT_EMC4022 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT 22
BC_INT#_EMC4022 A13 B58 SIO_PWRBTN# R3737 100KR2J-1-GP
39 BC_INT#_EMC4022 GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4 SIO_PWRBTN# 22
100KR2J-1-GP TP3715 1 EC_GPIO44 B20
RN3710 BC_C_DAT GPIO044/BCM_C_CLK MSDATA
DDR_ON EC_GPIO42
A18 GPIO043/BCM_C_DAT R3734
1 DY 2
10KR2J-3-GP
4 1 TP3716 1 B19 GPIO042/BCM_C_INT#
3 2 SUS_ON
68 BC_CLK_ECE1077
BC_CLK_ECE1077 A20 R3734 pull DN, Enable JTAG debug mode
BC_DAT_ECE1077 GPIO047/LSBCM_D_CLK
68 BC_DAT_ECE1077 B21 GPIO046/LSBCM_D_DAT
SRN100KJ-6-GP BC_INT#_ECE1077 A19
68 BC_INT#_ECE1077 GPIO045/LSBCM_D_INT#
2 1 AUX_ON BEEP A16 SMBUS INTERFACE
100KR2J-1-GP R3720 30 BEEP SIO_SLP_S5# GPIO032/GPTP-IN3/BCM_E_CLK DOCK_SMB_DAT +3.3V_RUN
22 SIO_SLP_S5# B16 GPIO31/GPTP-OUT2/BCM_E_DAT GPIO003/I2C1A_DATA A3 DOCK_SMB_DAT 74
ACAV_IN_NB A15 B4 DOCK_SMB_CLK
38,45 ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO004/I2C1A_CLK DOCK_SMB_CLK 74
RN3716 A4 LCD_SMBDAT RN3718
GPIO005/I2C1B_DATA LCD_SMBDAT 54,81
1 4 DDR_HVREF_RST_GATE B5 LCD_SMBCLK ODD_DET# 1 4
GPIO006/I2C1B_CLK LCD_SMBCLK 54,81
2 DY 3 CPU1.5V_S3_GATE HOST INTERFACE B7 CKG_SMBDAT H_SKTOCC# 2 3
+3.3V_ALW GPIO012/I2C1H_DATA/I2C2D_DATA CKG_SMBDAT 7
SIO_EXT_SMI# A6 A7 CKG_SMBCLK
25 SIO_EXT_SMI# GPIO011/SMI# GPIO013/I2C1H_CLK/I2C2D_CLK CKG_SMBCLK 7
SRN100KJ-6-GP SIO_RCIN# A27 B48 AUD_DOCK_SMBDAT SRN100KJ-6-GP
25 SIO_RCIN# GPIO061/LPCPD# GPIO130/I2C2A_DATA AUD_DOCK_SMBDAT 75
1 DY 2 LPC_LDRQ#_MEC B29 B49 AUD_DOCK_SMBCLK
R3738 LDRQ# GPIO131/I2C2A_CLK AUD_DOCK_SMBCLK 75
R3715 IRQ_SERIRQ A28 A47 CHARGER_SMBDAT
SER_IRQ GPIO132/I2C1G_DATA CHARGER_SMBDAT 45
1 DY 2 PCH_ALW_ON 100KR2J-1-GP 24,35,36,38 IRQ_SERIRQ PLTRST3# B30 B50 CHARGER_SMBCLK CHARGER_SMBCLK 45
21,38,70 PLTRST3# LRESET# GPIO140/I2C1G_CLK
B CLK_PCI_EC A29 B52 CARD_SMBDAT B
21 CLK_PCI_EC PCI_CLK GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT 72
100KR2J-1-GP LPC_LFRAME# B31 A49 CARD_SMBCLK CARD_SMBCLK 72
24,35,36,38,70 LPC_LFRAME# LFRAME# GPIO142/I2C1F_CLK/I2C2B_CLK
LPC_LAD0 A30 B53 LAN_SMBDAT
24,35,36,38,70 LPC_LAD0 LAD0 GPIO143/I2C1E_DATA LAN_SMBDAT 35
LPC_LAD1 B32 A50 LAN_SMBCLK LAN_SMBCLK 35
24,35,36,38,70 LPC_LAD1 LAD1 GPIO144/I2C1E_CLK
LPC_LAD2 A31
24,35,36,38,70 LPC_LAD2 LAD2
1 RESET_OUT#
DY 2 8K2R2J-3-GP LPC_LAD3 B33
24,35,36,38,70 LPC_LAD3 LAD3
R3724 CLKRUN# A32
22,36,38 CLKRUN# CLKRUN#
09/0703 SIO_EXT_SCI# A33 DELL PWR SW INF
25 SIO_EXT_SCI# GPIO100/EC_SCI# EC_BGPO0
A59 1
PCH side, pull down 8.2k BGPO0
B63 VCI_IN2#
TP3717
VCI_IN2# ALW_ON +RTC_CELL
MASTER CLOCK VCI_OUT A60 ALW_ON 46
EC_XTAL1 A61 A63 VCI_IN1# RN3722
EC_XTAL2 XTAL1 VCI_IN1# POWER_SW_IN# VCI_IN1#
A62 XTAL2 VCI_IN0# B67 POWER_SW_IN# 39 8 1
1 EC_32KHZ_OUT B62 B1 ACAV_IN VCI_IN2# 7 2
TP3718 GPIO160/32KHZ_OUT VCI_OVRD_IN ACAV_IN 39,45
A1 DOCK_PWR_SW# 6 3
VCI_IN3# DOCK_PWR_SW# 39
5 4
VR_CAP1
VSS_RO
NC#B17
NC#B34
NC#A46
NC#A48
NC#B51
NC#A64
NC#B68
AGND
SRN100KJ-5-GP
VSS2
VSS5
VSS7
VSS8
X3701
EP
1 4 RN3719
C3717 +3.3V_ALW POWER_SW_IN# 1 4 POWER_SW#_MB 76
B17
B34
A46
A48
B51
A64
B68
B66
B27
B60
B11
B28
KBC_VR_CAP B12
B54
C1
1
SC39P50V2JN-1GP DOCK_PWR_SW# 2 3
+3.3V_ALW DOCK_PWR_BTN# 74
C3718
1
-1.10/0302 2 3 SC39P50V2JN-1GP SRN10KJ-5-GP

2
R3732
1
10KR2J-3-GP C3720 Dock C3701
1
2
+3.3V_ALW SC1U6D3V2KX-GP SC1U6D3V2KX-GP
X-32D768KHZ-40GPU RN3714
2
2
FWP# DY SRN2K2J-1-GP
C3719
1
A SC4D7U6D3V3KX-GP A
R3705 R3703
Fonseca 14.1" DIS Revision R3733
<Core Design>
DY
4
3
2KR2F-3-GP 33KR2J-3-GP BOARD_ID BOARD_ID 10KR2J-3-GP
2
SYSTEM_ID Cap. Value Cap. Value REV 23 PCH_SMB_DATA 1 R3739 2 LAN_SMBDAT

Wistron Corporation
2
BOARD_ID 0R0402-PAD-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

4700pF 240k ohm X00 Taipei Hsien 221, Taiwan, R.O.C.
SYSTEM_ID
2k ohm 4700pF 130k ohm X01
1
C3714 C3712 Title

SC4700P50V2KX-1GP SC4700P50V2KX-1GP 4700pF 4700pF 62k ohm X02 1 R3740 LAN_SMBCLK
23 PCH_SMB_CLK 2
KBC - MEC5045
2
0R0402-PAD-2-GP Size Document Number Rev

4700pF 33k ohm -1 Custom
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW
SSID = KBC DOCK_AC_OFF_EC 1
U3802
B
+3.3V_ALW
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
VCC 5
1
C3801
C3803
C3804
C3805
C3806
C3807
37,45 ACAV_IN_NB 2 ADock
1
4 C3802 DY
+3.3V_ALW Y DOCK_AC_OFF_R 44
3 DY SCD1U10V2KX-4GP
2
GND
2
RN3805 74LVC1G08GW-1-GP
A17
B30
A43
A54
B34
B35
B68
SLICE_BAT_PRES#
B5
B1
1 8
2 7 TP_DET# U3801
3 6 PCIE_WAKE#
VCC1
VCC1
VCC1
VCC1
VCC1
NC#B1
NC#B34
NC#B35
NC#B68
4 5 PWR_BTN_BD_DET#
PBAT_PRES# B52 B63 SIO_SLP_M# +3.3V_RUN
D 44 PBAT_PRES# GPIOA0 GPIOI1 SIO_SLP_M# 22 D
SRN100KJ-5-GP SCRL_LED# A49 A60 0.75V_DDR_VTT_ON
66 SCRL_LED# NUM_LED# GPIOA1 GPIOI2 SIO_SLP_S4# 0.75V_DDR_VTT_ON 50 RN3809
66 NUM_LED# B53 GPIOA2 GPIOI3 A61 SIO_SLP_S4# 22,50,72
1 SIO_GPIOA3 A50 B65 SIO_SLP_S3# D_DLDRQ1# 8 1
TP3802 GPIOA3 GPIOI4 SIO_SLP_S3# 9,22,35,50
PBATT_OFF B54 A62 IMVP_PWRGD D_SERIRQ 7 Dock 2
44 PBATT_OFF GPIOA4 GPIOI5 IMVP_PWRGD 39,47
MDC_RST_DIS# A51 B66 IMVP_VR_ON D_CLKRUN# 6 3
76 MDC_RST_DIS# PCIE_WAKE# GPIOA5 GPIOI6 DOCK_AC_OFF_EC IMVP_VR_ON 47
35,64,72 PCIE_WAKE# B55 GPIOA6 GPIOI7 A63 5 4
1 SIO_GPIOA7 A52
TP3803 GPIOA7 SRN100KJ-5-GP
USB_SIDE_EN# A33 B67 AUX_EN_WOWL
63,76 USB_SIDE_EN# EN_I2S_NB_CODEC# GPIOB0/INIT# GPIOJ0 TP_DET# AUX_EN_WOWL 64
75 EN_I2S_NB_CODEC#
B36 GPIOB1/SLCTIN# GPIOJ1 A64 TP_DET# 68
GFX_MEM_ON A34 A5 SIO_SLP_LAN#
1.5V VRAM 42,51 GFX_MEM_ON EN_DOCK_PWR_BAR B37
GPIOC2/SLCT GPIOJ2
B6 SIO_GPIOJ3 1
SIO_SLP_LAN# 22
44 EN_DOCK_PWR_BAR GPIOC3/PE GPIOJ3 TP3804
1 A35 A6 GPIO_PSID_SELECT
+3.3V_ALW TP3822 GPIOC4/BUSY GPIOJ4 GPIO_PSID_SELECT 43
LCDVDD_EN_GPU B38 B7 CRT_SWITCH
54,80 LCDVDD_EN_GPU GPIOC5/ACK# GPIOJ5 CRT_SWITCH 75
1 DY 2 A36 A7 DOCK_HP_DET
9,22,58 XDP_DBRESET# R3807 PSID_DISABLE# GPIOC6/ERROR# GPIOJ6 DOCK_MIC_DET DOCK_HP_DET 75
54 LCD_TST 43 PSID_DISABLE# A37 GPIOC7/ALF# GPIOJ7 B8 DOCK_MIC_DET 75
1 2 USB_SIDE_EN# 0R2J-2-GP
54,81 PANEL_BKEN_GPU
PANEL_BKEN_GPU B40 GPIOD0/STROBE#
R3805 100KR2J-1-GP DOCKED A38
+3.3V_RUN 35 DOCKED DOCK_DET# GPIOC1/PD7 ME_FWP
44,74,75 DOCK_DET# B41 GPIOC0/PD6 GPIOK0 A8 ME_FWP 24
AUD_NB_MUTE A39 B9 NB_AC_OFF
30 AUD_NB_MUTE GPIOB7/PD5 GPIOK1 NB_AC_OFF 43,44,45
MCARD_WWAN_PWRENB42 B10 1.8V_RUN_PWRGD
65 MCARD_WWAN_PWREN GPIOB6/PD4 GPIOK2 1.8V_RUN_PWRGD 51
1
LCD_VCC_TEST_EN A40 A10 SIO_GPIOK3 1

54 LCD_VCC_TEST_EN GPIOB5/PD3 GPIOK3 TP3807
R3836 TP3824 1 SIO_GPIOB4 B43 B11 TEMP_ALERT#
100KR2J-1-GP GPIOB4/PD2 GPIOK4 TEMP_ALERT# 25,58
DY AUD_HP_NB_SENSE A41 A11 RUN_ON
30,60 AUD_HP_NB_SENSE GPIOB3/PD1 GPIOK5 RUN_ON 42,51,72,86
1 SIO_GPIOB2 B44 B12 CPU_CATERR#
+3.3V_RUN TP3808 GPIOB2/PD0 GPIOK6 CPU_CATERR# 9
A12 SPI_WP#_SEL
2
GPIOK7 SPI_WP#_SEL 62
SP_TPM_LPC_EN
DOCK_IDENTIFY
69 LID_CL_SIO#
LID_CL_SIO#
CPU_VTT_ON
B32 GPIOD1
ECE5028-LZY-GP LPC_LAD0
LPC_LAD[0..3] 24,35,36,37,70
1
R3808
DY 2
10KR2J-3-GP 52 CPU_VTT_ON GFX_CORE_ON
A31 GPIOD2 LAD0 A27
LPC_LAD1
B33 A26
C GFX CORE 86 GFX_CORE_ON GPIOD3 LAD1 C
1
CRD_DET0 B15 B26 LPC_LAD2

R3835 CRD_DET1 GPIOD4 LAD2 LPC_LAD3
RN3806 100KR2J-1-GP SIO_GPIOD6
A15 GPIOD5 LAD3 B25
LPC_LFRAME#
Place close to
DY TP3820 1 B16 GPIOD6 LFRAME# A21 LPC_LFRAME# 24,35,36,37,70
1
2
8
7
WIRELESS_ON#/OFF
AUD_HP_NB_SENSE 42 MODC_EN
MODC_EN A16 GPIOD7 LRESET# B22
A28
PLTRST3#
CLK_PCI_5028
PLTRST3# 21,37,70 Pin.A28
CLK_PCI_5028 21
2
DOCK_HP_DET PCICLK CLKRUN# CLK_PCI_5028

3 6 CLKRUN# B20 CLKRUN# 22,36,37
4 5 DOCK_MIC_DET 1 SIO_GPIOE0 A1 A23 LPC_LDRQ0#
TP3809 GPIOE0/RXD LDRQ0# LPC_LDRQ0# 24
1
1 SIO_GPIOE1 B2 A22 LPC_LDRQ1#
TP3810 GPIOE1/TXD LDRQ1# LPC_LDRQ1# 24
GFX_CORE_PWRGD A2 B21 IRQ_SERIRQ R3812 DY
86 GFX_CORE_PWRGD GPIOE2/RTS# SER_IRQ IRQ_SERIRQ 24,35,36,37
SRN100KJ-5-GP 1 SIO_GPIOE3 B3 A32 CLK_SIO_14M 10R2J-2-GP
TP3816 GPIOE3/DSR# 14_318MHZ CLK_SIO_14M 23
1 SIO_GPIOE4 A3
TP3819 GPIOE4/CTS#
3.3V_RUN_GFX_ON B45
3.3V DELAY LDO
CLK_PCI50282
42,51 3.3V_RUN_GFX_ON 1.8V_RUN_GFX_ON GPIOE5/DTR#
A42 B51
1.8V DELAY LDO 51 1.8V_RUN_GFX_ON GFX_MEM_VTT_ON B4
GPIOE6/RI# VSS
GFX 1.1V LDO 86 GFX_MEM_VTT_ON GPIOE7/DCD#
VGA_IDENTIFY
1 SIO_GPIOF0 A59 B29 D_LAD0
High = Discrete TP3811
1 SIO_GPIOF1 B62
GPIOF0/IRMODE/IRRX3A DLAD0
B28 D_LAD1
D_LAD0 74
+3.3V_ALW TP3812 GPIOF1/IRRX2 DLAD1 D_LAD1 74
Low = UMA TP3813 1 SIO_GPIOF2 A58 GPIOF2/IRTX2 DLAD2 A25 D_LAD2
D_LAD2 74
1
1 2 TEMP_ALERT# 1 SIO_GPIOF3 B61 A24 D_LAD3 C3808 DY
TP3814 GPIOF3/IRMODE/IRRX3B DLAD3 D_LAD3 74
R3831 10KR2J-3-GP 1 SIO_GPIOF4 A56 B23 D_LFRAME# SC4D7P50V2CN-1GP
TP3815 GPIOF4 DLFRAME# D_LFRAME# 74
1 2 VGA_IDENTIFY B59 A19 D_CLKRUN#
D_CLKRUN# 74
2
R3815 DOCK_IDENTIFY GPIOF5 DCLKRUN# D_DLDRQ1#
A55 GPIOF6 DLDRQ1# B24 D_DLDRQ1# 74
100KR2J-1-GP LOM_SMB_ALERT# B58 A20 D_SERIRQ D_SERIRQ 74
35 LOM_SMB_ALERT# GPIOF7 DSER_IRQ
LAN_LOW_PWR B47
35 LAN_LOW_PWR CAP_LED# GPIOG0 BC_INT#_ECE5028
66 CAP_LED# A45 GPIOG1 BC_INT# A29 BC_INT#_ECE5028 37
LOM_TPM_EN# B48 B31 BC_DAT_ECE5028
35 LOM_TPM_EN# GPIOG2 BC_DAT BC_DAT_ECE5028 37
SIO_GPIOG3 BC_CLK_ECE5028
B
1 R3817 2
TP3817 1
SIO_EXT_WAKE#_R
A46
B49
GPIOG3 BC_CLK A30 BC_CLK_ECE5028 37 Place close to B
25 SIO_EXT_WAKE# GPIOG4
0R0402-PAD-2-GP
TP3818 1 SIO_GPIOG5
PCH_PCIE_WAKE#
A47
B50
GPIOG5
A4 RUNPWROK
Pin.A32 CLK_SIO_14M
22 PCH_PCIE_WAKE# GPIOG6 PW RGD RUNPWROK 9,37,58
RN3804 WLAN_RADIO_DIS# A48
64 WLAN_RADIO_DIS# GPIOG7
1
8 1 0.75V_DDR_VTT_ON B56 SP_TPM_LPC_EN
RUN_ON OUT65 SP_TPM_LPC_EN 36 R3818
7 2
6 3 LCD_TST WIRELESS_ON#/OFF B13 10R2J-2-GP DY
64 WIRELESS_ON#/OFF GPIOH0
5 4 CPU_VTT_ON BT_RADIO_DIS# A13 B19 TEST_PIN 1 2
SRN100KJ-5-GP 73 BT_RADIO_DIS# WWAN_RADIO_DIS# GPIOH1 TEST_PIN R3819 1KR2F-3-GP
A53
CLK_SIO14M 2
76 WWAN_RADIO_DIS# LOM_CABLE_DETECT SYSOPT1/GPIOH2 CAP_LDO
35 LOM_CABLE_DETECT B57 SYSOPT0/GPIOH3 CAP_LDO B46
RN3801 EXPRCRD_PWREN# B14
72 EXPRCRD_PWREN# GPIOH4
1
4 1 GFX_CORE_ON EXPRCRD_STDBY# A14 C3809
PBATT_OFF 72 EXPRCRD_STDBY# SLICE_BAT_PRES# GPIOH5 SC4D7U6D3V3KX-GP
3 2 74 SLICE_BAT_PRES# B17 GPIOH6 VSS A9
SRN100KJ-6-GP PWR_BTN_BD_DET# B18 A18
76 PWR_BTN_BD_DET#
2
GPIOH7 VSS
VSS B27
VSS B39
1
RN3807 TP3825 1 IRTX B60 A44 C3810
3.3V_RUN_GFX_ON IRRX IRTX VSS SC4D7P50V2CN-1GP
1 8
PANEL_BKEN_GPU
2 1 A57 IRRX VSS B64 DY
2 7
2
3 6 GFX_MEM_ON R3820
4 5 LCDVDD_EN_GPU 10KR2J-3-GP
EP
+3.3V_RUN
C1
SRN100KJ-5-GP
1
R3822 R3811
100KR2J-1-GP 100KR2J-1-GP CRD_DET1 CRD_DET0 Function
A RN3808 A
MODC_EN
PCC_EXP SC_EXP <Core Design>
1 4 Low Low No Option Installed
2 3 GFX_MEM_VTT_ON
2
SRN10KJ-5-GP
CRD_DET1
CRD_DET0
Low High Smartcard Wistron Corporation
High 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Low Cardbus
1
R3823 R3816 Taipei Hsien 221, Taiwan, R.O.C.

100KR2J-1-GP 100KR2J-1-GP High High Express Card Title
NOCRD_SC NOCRD_PCC
1 2 1.8V_RUN_GFX_ON SIO - MEC5028
2
R3834 100KR2J-1-GP Size Document Number Rev

Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Thermal
37 BC_DAT_EMC4022
BC Bus clock and data signal trace length
37 BC_CLK_EMC4022 should be matched with +/- 0.1 inch.
Q3902 and C3902 Place under CPU

PORT 1
1
D C3901 D
C3902 Q3902 1 SC470P50V2JN-GP REM_DIODE3_N, REM_DIODE3_P routing together.
SC100P50V2JN-3GP MMBT3904-7-F-GP close to the Trace width / Spacing = 10 / 10 mil
2
Guardian pins Place near the bottom SODIMM SYS_IMON 45
1
Place C3902 close to the Q3902 as possible
R3923
Q3905 and C3906 Place near DIMM Skin Temp Sensor 12K7R2F-GP
C3905
2
2
1
SC2200P50V2KX-2GP
C3906 Q3905
PORT 4 PORT 2 C3904 Q3901
DY MMBT3904-7-F-GP 1 DY 1
1
SCD22U25V3KX-GP
SC100P50V2JN-3GP SC100P50V2JN-3GP MMBT3904-7-F-GP close to the U3901 C3919
1
2
Guardian pins 7 1 R3928
3
2
SMDATA/BC_DATA 5K62R2F-GP
8 SMCLK/BC_CLK DY
Place C3906 close to Q3905 Place optimally between VGA and PCH 2
Place C3904 close to Q3901
2
REM_DIODE1_P 24
REM_DIODE1_N DP1/VREF_T
23 DN1/THERM
81 GPU_THERM_DP
C3908 REM_DIODE4_P 27 R3905 ~ if use 4.7k
DP2/DN4
1
SC2200P50V2KX-2GP REM_DIODE4_N 26 about 2% inaccuracy for IMON
DN2/DP4
PORT 3 close to the Place near fork into U3901
Guardian pins GPU_THERM_DP 30 25 SYS_IMON_4022
2
GPU_THERM_DN DP3/DN5 VIN CPU_IMON_4022
29 DN3/DP5 VCP 31 1 2 CPU_IMON 12,47
81 GPU_THERM_DN R3905 1KR2F-3-GP
+3.3V_SUS
1 2 3VSUS_THRM 1 2 1 +3.3V_ALW
R3906 22R2J-2-GP +RTC_CELL VDD R3907 10KR2J-3-GP
C C
1
+3.3V_SUS C3918 C3909 BC_INT#_EMC4022
SC1U6D3V2KX-GP
ATF_INT#/BC_IRQ# 9 BC_INT#_EMC4022 37
DY 16 20 POWER_SW_IN#_4022
SCD1U10V2KX-4GP RTC_PW R3V POW ER_SW # ACAV_IN
2 1 21 ACAV_IN 37,45
2
2
ACAVAIL_CLR
4
3
C3910 SC1U6D3V2KX-GP 15 THERMTRIP_SIO 2 DY 1 +3.3V_SUS

RN3901 GPIO3/PW M/THERMTRIP_SIO THERM_STP# R3909 10KR2J-3-GP
SYS_SHDN# 19 THERM_STP# 46
SRN8K2J-3-GP THERM_VDD_PWRGD 13
PCH_PWRGD# VDD_PW RGD
1 R3901 2 THERM_3V_PWROK# 12
3V_PW ROK# 1 DY 2 +RTC_CELL
0R0402-PAD-2-GP R3912 47KR2J-2-GP
1
2
THERMTRIP2# 17
THERMTRIP3# THERMTRIP2#
18 THERMTRIP3#
Rset=953,Tp=88degree
1
THERMAL_VSET 28
C3913 VSET
2
1
C3912
R3915
SCD1U10V2KX-4GP 3VSUS_THRM 1 23VSUS_THRM_1
953R2F-GP
SCD1U10V2KX-4GP
32
2
ADDR_MODE/XEN
1
C3911 R3914 4K7R2J-2-GP
SCD1U10V2KX-4GP
1
2
VDD_HA
3
2
+1.05V_VTT VDD_HB
3
6 VDD_L
1 2 THERM_B1 1
R3913 Q3906 FAN1_VOUT 4
2K2R2J-2-GP MMBT3904-7-F-GP 58 FAN1_VOUT FAN_OUTA
5 14
2
FAN_OUTB TEST1
TEST2 22
FAN1_TACH_FB 10
9,25 H_THERMTRIP# 58 FAN1_TACH_FB TACH/GPIO1
FAN1_DET#
GND_SLG
11 GPIO2
B +5V_RUN B
EMC4022-1-EZK-TR-1-GP-U
33
DOCK_PWR_SW#_R 1 R3918 2
SCD1U10V2KX-4GP
DOCK_PWR_SW# 37
0R0402-PAD-2-GP
SC10U10V5KX-2GP
09/0824, symbol updated

2
2
C3914
C3915
D3901
1
+3.3V_SUS +3.3V_RUN +RTC_CELL

3 DockBAT54A-3-GP
1
4
3
2
POWER_SW_IN#_R 1 R3921 2 POWER_SW_IN# 37
R3927 R3920 0R0402-PAD-2-GP
RN3902 100KR2J-1-GP Dock 100KR2J-1-GP
SRN100KJ-6-GP
2
+3.3V_RUN R3924
FAN1_DET# 58
1
0R2J-2-GP
1
2
THERM_VDD_PWRGD POWER_SW_IN#_4022 1 DY 2
PCH_PWRGD#
1N-Dock 2
2
C3916 C3917 DY
DY SCD1U10V2KX-4GP R3925
D
SC10U10V5KX-2GP 0R2J-2-GP
1
Q3908
2N7002A-7-GP
38,47 IMVP_PWRGD 1 R3926 2IMVP_PWRGD_R G
0R0402-PAD-2-GP
A A
<Core Design>
S
Wistron Corporation
Title
Thermal, Fan controller

5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D D
Free Fall Sensor

+3.3V_RUN
-1.10/0310
1
C4001
C4002 SCD1U10V2KX-4GP
SC1U10V3KX-3GP
2
+3.3V_RUN
C C
1
6
1
U4001 R4001
DY 100KR2J-1-GP
VDD_IO
VDD
2
CLK_SCLK_HDDFALL 14 8 FFS_INT1
SCL/SPC INT1 FFS_INT1 21,37
+3.3V_RUN CLK_SDATA_HDDFALL 13 9 FFS_INT2_R
SDA/SDI/SDO INT2
HDD_FALL_SDO +3.3V_RUN
1
R4004
DY 0R2J-2-GP
2 12 SDO
1
7 CS
1
+3.3V_RUN 2
R4011 GND R4005
0R2J-2-GP
DY GND 4
100KR2J-1-GP
3 RESERVED#3 GND 5
11 10
2
RESERVED#11 GND
2
FALL_INT2
09/0422
DE351DLTR8-GP
(#1) Just pull +3.3V_RUN ~ Ref. Rothschild
1
(#2) FAE/ DY is ok, chip internal pull-up resistors
+3.3V_RUN Q4002 +3.3V_RUN
(#3) From spec, Slave ADdress(SAD) is 001110xb
DMN66D0LDW-7-GP
Pull HIGH SAD is 0011101b
1
B B
Pull GND SAD is 0011100b
6
R4006 R4008
100KR2J-1-GP 10KR2J-3-GP
DY DY
2
FFS_INT2_R
FFS_INT2 59
R4007
1 DY 2
0R2J-2-GP
FFS_INT2_R 25
1 2 CLK_SCLK_HDDFALL HDD_FALL_INT2#
18,19,23,58 PCH_SMBCLK_MEM
R4009 0R0402-PAD-2-GP
INT2 will pull as push pull and resverse R4006
1 2 CLK_SDATA_HDDFALL
R4010 0R0402-PAD-2-GP
CLK_SCLK_HDDFALL 7
CLK_SDATA_HDDFALL 7
A <Core Design> A
Wistron Corporation
Note 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom. Title

Free Fall Sensor Rev
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Reset.Suspend
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Power On Logic
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Reset.Suspend For Discrete

Q4298
SI2301CDS-T1-GE3-GP
+3.3V_ALW_2 +15V_ALW
Design current: 1700mA S D
+3.3V_ALW +3.3V_DELAY
Max current: 2400mA
1
1 2SUS_ON_3V#
R4202 R4203 Id: 2A
G
100KR2J-1-GP D G S 100KR2J-1-GP +3.3V_ALW R4296 Rds: 0.15ohm
+3.3V_SUS 100KR2J-1-GP
2
6
4
3.3V_ALW_1
Q4202 U4202
DMN66D0LDW-7-GP 1 D D 6
D D
2 D D 5
1
3V_SUS_ENABLE 3 G S 4
1
4
R4299
1
S G D SI3456DDV-T1-GE3-GP Q4299 100R2F-L1-GP-U
1
C4202 DMN66D0LDW-7-GP
SC4700P50V2KX-1GP C4203 R4204
2
6A SC10U10V5KX-2GP 20KR2J-L2-GP
3
2
37 SUS_ON
3.3V_DELAY_1
+3.3V_ALW_2 +15V_ALW Design current: 2152mA

Max current: 3074.4mA R4232
1 2RUN_ON_5V# 38,51 3.3V_RUN_GFX_ON 1 2 3.3V_DELAY_EN_1
R4205
1
100KR2J-1-GP D G S +5V_ALW +5V_RUN 10KR2F-2-GP
1
U4203 C4299
R4201 8 1 SCD1U16V2KX-3GP
2
6
D S
100KR2J-1-GP 7 2
1
D S
Q4203 6 3
1
D S
DMN66D0LDW-7-GP 5 4 C4204 R4208
2
D G
6.5A 20KR2J-L2-GP Optional RC network to fine tune PWR SEQ.
SI4800BDY-T1-GP
DY SC10U10V5KX-2GP
1
2
RUN_ENABLE
2
S G D
-1.10/0302
1
C4208
SC470P50V2JN-GP +3.3V_ALW_2 Design current: 1750mA
+5V_RUN +5V_MOD
Max current: 2500mA
2
38,51,72,86 RUN_ON Design current: 4297mA R4207
2
C
+3.3V_ALW_2 Max current: 6138.5mA R4206 +15V_ALW +5V_ALW
1 DY 2
C
1
100KR2J-1-GP C4222 0R1210J-GP
1 23.3V_RUN_ON# +15V_ALW +3.3V_ALW +3.3V_RUN SC10U6D3V5MX-3GPDY
1
R4211 MODC_EN#
2
1
100KR2J-1-GP U4204 C4205
1
8 1 D G S SC10U6D3V5MX-3GP U4201
1
D S
R4212 7 2 8 1
2
6
1
D S D S
100KR2J-1-GP 6 3 R4209 7 2
1
D S D S
Q4205 5 4 C4210 R4213 100KR2J-1-GP 6 3
1
D G D S
DMN66D0LDW-7-GP DY SC10U6D3V5MX-3GP 20KR2J-L2-GP Q4204 5 4 C4206 R4210 C4207
2
D G
SI4800BDY-T1-GP DMN66D0LDW-7-GP 6.5A SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP
2
2
11A SI4800BDY-T1-GP
1
2
MODC_EN_5V
2
SCD1U50V3KX-GP
3.3V_RUN_ENABLE
1
S G D C4209
1
C4211
Design current: 682mA
2
SC4700P50V2KX-1GP
2
38,51,72,86 RUN_ON +3.3V_ALW +3.3V_ALW_PCH 38 MODC_EN

+3.3V_ALW_2
1 2
R4230 0R0805-PAD-2-GP
1 DY 2 PCH_ALW_ON_3V# +15V_ALW U4205 Design current: 700mA
1 D D 6
Max current: 1000mA
R4216 D G S 2 D DY D 5
1
100KR2J-1-GP 3 G S 4
R4218
6
DY 100KR2J-1-GP SI3456DDV-T1-GE3-GP
1
Q4206 4.5A R4219 +5V_RUN +3.3V_RUN

DY DMN66D0LDW-7-GP DY C4214 DY 20KR2J-L2-GP
HDD use. HDD use.
2
SC4D7U6D3V3KX-GP
2
B PCH_ALW_ENABLE B
1
1
S G D
1
1
C4216
DY SC4700P50V2KX-1GP C4212 R4215 DY C4213 DY C4215 DY R4220 DY C4201 DY
SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP SCD1U10V2KX-4GP 100KR2J-1-GP SC10U6D3V5MX-3GP
2
2
+5V_ALW
G
37 PCH_ALW_ON
2
+5V_ALW_PCH
D DY S Q4210
+1.5V_RUN_CPU 2N7002A-7-GP
1
R4237
1
Q4208 C4221 R4227 1.5V_RUN_CPU_DISCHARGE D

+3.3V_ALW_2 1 2 S
2N7002A-7-GP DY 20KR2J-L2-GP
SCD1U10V2KX-4GP
100R2J-2-GP
2
1 2 RUN_ON_1.5V# 1 2
2
R4221 100KR2J-1-GP R4238 0R0402-PAD-2-GP
G
D G S Design current: 2400mA +3.3V_ALW_2 RUN_ON_1.5V_CPU#
Max current: 3500mA
DMN66D0LDW-7-GP
1 2 RUN_ON_1.5V_CPU#
Q4201 R4226 100KR2J-1-GP
+15V_ALW +1.5V_SUS +1.5V_RUN D G S +15V_ALW +1.5V_SUS +1.5V_RUN_CPU
U4206 U4207
8 D S 1 8 1
1
1
D S
7 D S 2 7 2
1
1
D S
S G D R4222 6 D S 3 Q4207 R4225 6 3
1
1
D S
100KR2J-1-GP 5 D G 4 C4217 R4223 DMN66D0LDW-7-GP 100KR2J-1-GP 5 D G 4 C4220 R4224
DY 20KR2J-L2-GP
DY SC10U10V5KX-2GP 6.5A DY 20KR2J-L2-GP
DY SC10U10V5KX-2GP
11A SIR460DP-T1-GE3-GP SI4800BDY-T1-GP
1 2
2
1 2 1.5V_RUN_ENABLE
38,51 GFX_MEM_ON
2
2
A A
R4229 0R0402-PAD-2-GP C4218 S G D
SC4700P50V2KX-1GP <Core Design>
1
1.5V_CPU_ENABLE C4219
2
SC4700P50V2KX-1GP
RUN_ON_1.5V
+1.5V_RUN
Q4209
2N7002A-7-GP
37,50 DDR_ON
R4234
1 DY 0R2J-2-GP
2 2
Wistron Corporation
R4233
1 DY 0R2J-2-GP
2 Taipei Hsien 221, Taiwan, R.O.C.
1 2 1.5V_RUN_DISCHARGE D S 38,51,72,86 RUN_ON
R4236
Title
100R2J-2-GP
1 2
37 CPU1.5V_S3_GATE
R4235 0R0402-PAD-2-GP Power Plane Enable
G
Custom -1
RUN_ON_1.5V# Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Support Adapter In

*PIN NAME DIFFERENCES* DC_IN CONN
PIN MAXIM INTERSIL BQ24745 PIN 3,4 DC_IN+
1 GND NC ICREF
3 REF VREF VREF PIN 4,5 DC_IN-
4 CCS ICOMP EAO PIN 1 ID
5 CCI NC EAI
6 CCV VCOMP FBO PIN 6,7,8,9 GND
TABLE 7 DAC NC CE
MAXIM & INTERSIL BOM DIFFERENCES 8 IINP ICM VICM
REF DES MAXIM INTERSIL TI 11 VDD VDDSMB VDDSMB
D D
R411 8.45K 1% DUMMY DUMMY 14 BATSEL NC NC
C98 0.01uF 0.1uF 0.1uF 15 FBSA VFB VFB
C459 0.1uF 10V DUMMY 200P 10V 16 FBSB NC NC
C5 1uF 10V DUMMY 1uF 10V 17 CSIN CSON CSON
R16 365K 1% 215K 1% 309K 1% 18 CSIP CSOP CSOP
R434 0 5% 10 5% 0 5% 20 DLO LGATE LGATE
R414 0 5% 10 5% 0 5% 21 LDO VDDP VDDP
C473 DUMMY 0.22uF 0.1uF 23 LX PHASE PHASE
C457 DUMMY 0.22uF 0.1uF 24 DHI UGATE UGSTE
25 BST BOOT BOOT
C442 0.01uF DUMMY DUMMY
26 VCC VCC ICOUT
C453 0.1uF 10V DUMMY DUMMY "NC" means no-connect
C36 220pF 50V DUMMY DUMMY
D23 RB751V-40 DUMMY RB751V-40
C58 3.3nF DUMMY DUMMY
R64 1 1% 0 5% 0 5%
R394 100 5% 0 5% 0 5%
R110 0 5% 8.45K 1% 8.45K 1%
R401 10K 5% 2.2K 5% 4.7K 5%
C441 0.01uF 0.01uF DUMMY +5V_ALW
C449 0.01uF 0.01uF DUMMY
R397 1K 5% DUMMY DUMMY
15KR2J-1-GP
2
1
Q41 ISS355 DUMMY DUMMY
10KR2J-3-GP
PR4302
C16 1uF 10V 1uF 10V DUMMY
1
DY PD4302
R30 33 1% 33 1% DUMMY BAV99-4-GP
PR4301
2
R408 DUMMY DUMMY 0 5%
1
R400 DUMMY DUMMY 200K 5% PSID_DISABLE#_1 1
3
PQ4302 +5V_ALW +3.3V_ALW
R403 DUMMY DUMMY 7.5K 5%
2
MMBT3904-7-F-GP PR4313
100KR2J-1-GP
3
2
C450 DUMMY DUMMY 51P 10V PSID_DISABLE#_R 1 DY 2 0R2J-2-GP
2K2R2F-GP
PSID_DISABLE# 38
1
PR4303 0R2J-2-GP
PR4304
C C444 DUMMY DUMMY 2000P 10V C
1N-Dock 2
PR4305
BAV99-4-GP
C448 DUMMY DUMMY 130P 10V PQ4303 +5V_ALW
G
C446 DUMMY DUMMY 0.1uF FDV301N-NL-GP
PD4301
1
C483 DUMMY DUMMY 0.1uF PU4301
2
R438 10K 1% 10K 1% DUMMY
3
PS_ID_IN_1 D S PS_ID_1 1 2 NB_PSID_TS5A63157 3 4
D
R412 DUMMY DUMMY 10k 5% PR4306 B0 A PS_ID 37
2 DockVCC
GND
5
R440 15.8K 1% 15.8K 1% DUMMY 33R2J-2-GP 74 DOCK_PSID 1 6 GPIO_PSID_SELECT 38
BLM18BD102SN1D-GP
B1 S
1
R407 DUMMY 10K 5% DUMMY
1
PD4303
R9 0 5% 10 5% 0 5% DY NC7SB3157P6X-1GP
PL4302
SM24DTCT-GP
C482 DUMMY DUMMY DUMMY 1 DY 2
PR4307
C12 DUMMY DUMMY DUMMY
3
33R2J-2-GP
R435 0 5% 10 5% 0 5%
DCIN1
4
EL4303 +DC_IN +DC_IN_SS
3 6 200mil BLM41PG600-GP
200mil PU4302
1 +DC_IN_L +DC_IN_L 1 2 1 S D 8
SCD022U50V3KX-GP
2 S D 7
1
5 JACK_PSID 3 S D 6
1MR3J-L-GP
1
1
PC4302 PD4304 G D
PC4303
PR4308
2 4 5
DY
PC4301
PC4304
1 PC4305
PC4306
PR4309
7 1SMA24AT3-G-GP
SCD1U50V3KX-GP
9 AO4407A-GP
2
8
2
A
1
1
1
SKT-JACK-190-GP-U
SCD1U50V3KX-GP
SCD01U50V2KX-1GP
22.10140.321
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
1MR3J-L-GP
2
1
PR4310
PC4307
4K7R3J-2-GP
2
B B
Main:22.10140.321 DY
22KR3J-L-GP
C
E
2
2nd:22.10140.341 PQ4301
PR4311
2
PDTA124EU-1-GP Dock
R2
Dock
R1
2
B
MAX 8731A/ISL88731
Adapter Trip Current R416 R502 R501 R504
D
(W) (A)
65 3.17 57.6K 13.0K 105 24.9K PQ4304 PR4312
Dock 100KR2J-1-GP
90 4.43 51.1K 17.8K 348 33.2K 3 OUT AC_OFF_R G 1 2
R1 NB_AC_OFF 38,44,45
*R504 is populated if ADAPT_TRIP_SEL is used 44 NB_AC_OFF_BJT 1 Dock 2N7002A-7-GP
1
IN 2 GND
to program for the next lower adapter. R2
D-Change
S
PQ4305
1
2
DDTC124EUA-7F-GP
SCD1U50V3KX-GP
BQ247451 Dock PC4309
SCD1U10V2KX-4GP
PC4308
2
Adapter Trip Current R416 R502 R501 R504

(W) (A)
65 3.17 57.6K 12.4K 205 24.3K
90 4.43 51.1K 16.9K 499 32.4K
*R504 is populated if ADAPT_TRIP_SEL is used
to program for the next lower adapter.
A A
<Core Design>
Wistron Corporation
Title
DC IN Jack
C -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Support +PWR_SRC_VCHGR +DOCK_PWR_BAR

+PWR_SRC PD4402
PDS1040-13-GP-U
+VCHGR 2
3 Dock PR4435
PU4404 PU4401 1
1 S D 8 8 D S 1 1 2
DY10KR5F-2-GP
SC2200P50V2KX-2GP
SCD1U25V2ZY-1GP
2 S D 7 7 D S 2
240KR2J-1-GP
1
1
S D D S 3 PU4405 +3.3V_ALW_2
PC4421
PC4422
3 6 6
G D D G 4
PR4436
4 5 5 1 8
100KR2J-1-GP
D
PR4437 SW_GND 45
2 Dock 7 PQ4404
1
AO4407A-GP AO4407A-GP 3 6 100KR2J-1-GP
DY Dock
PR4438
4 5
D
PQ4405
2
G DOCK_DET# 38,74,75 Dock
FDS6679AZ-GP
2N7002A-7-GP 3 4 PQ4407
Dock
C
E
2
D D
2 Dock 5 G
S
1
PQ4406 74 ACAV_DOCK_SRC# 2N7002A-7-GP
PDTA124EU-1-GP PR4439 +3.3V_ALW 1 6
47KR2J-2-GP
R2
S
R1
DMN66D0LDW-7-GP
1
2 3
22KR2J-GP
2
1 Dock 4
B
Dock
PR4440
PD4403
3 OUT AC_OFF_1 PRN4402
1 R1 2 SRN100KJ-6-GP +5V_ALW
38 PBATT_OFF +DC_IN_SS
2
IN 2 GND +NBDOCK_DC_IN_SS
R2 3
22KR2J-GP
PQ4409
1
PQ4408
PR4441
DDTC124EUA-7F-GP 1 4 3
NB_AC_OFF 38,43,45
Dock
1
SDMG0340LC7F-GP-U
5 Dock 2
2
1KR6J-1-GP DY PR4442 43 NB_AC_OFF_BJT
6 1
2
DMN66D0LDW-7-GP +3.3V_ALW_2
PQ4410 +PWR_SRC
1
+PWR_SRC
DY PC4423
1
SC1U25V3KX-1-GP FDN358P-1-GP
+DOCK_PWR_BAR
SCD47U25V3KX-1GP
PD4404
1
PR4444
2
S D A PR4443 Dock100KR2J-1-GP
Dock DockK PQ4411
1
100KR2J-1-GP
Dock
1
R2
Dock PR4446
PC4424
E
2
SDMK0340L-7-F-GP
Dock Dock240KR2J-1-GP Dock B
240KR2J-1-GP
2
G
R1 45 ACAV_DOCK_SRC
C
2
EN_DOCK_PWR_BAR#
100KR2J-1-GP
2
2
PR4445
D
PDTA115EU-GP
1
PD4409 PQ4413
PQ4412
PR4447
1
2 C Dock
47KR2F-GP
38 PBATT_OFF R1 ACAV_DOCK_SRC#
Dock G
PR4448
B
1
3 E 2N7002A-7-GP
Dock Dock
2
DOCK_AC_OFF 74 PR4449 R2
C C
47KR2J-2-GP
1 2
Dock1 Dock PDTC115EU-GP-U
S
38 DOCK_AC_OFF_R
2
PQ4414
D
PR4454 2N7002A-7-GP
2
BAT54CW-1-GP 33KR2J-3-GP 1 PR4450 2 EN_DOCK_PWR_BAR#
PQ4401 PQ4415 0R0402-PAD-2-GP Dock
D
D
2N7002A-7-GP 2N7002A-7-GP G
EN_DOCK_PWR_BAR 38
1
Dock Dock G 1 2
G DY ACAV_DOCK_SRC 45 PR4452
S
PR4451 22KR2J-GP
0R2J-2-GP Dock
PD61
1'nd 83.R2004.C81
S
2
S
2'nd 83.00040.M81
SSID = RBATT
+3.3V_ALW
PD4401
2
Batt Connecter PBAT_SMBDAT 3
BAV99-4-GP
BATT1 PD4406
B B
2
10
1 +VCHGR PBAT_SMBCLK 3
2 PRN4401 1
3 PBAT_SMBCLK1 1 4 PBAT_SMBCLK 37
4 PBAT_SMBDAT1 2 3 BAV99-4-GP
PBAT_SMBDAT 37
5 PBAT_PRES1#
6 SRN100J-3-GP
7 PBAT_ALARM# PD4407
8 PR4453 1 2 100R2J-2-GP PR4401 PBAT_PRES# 38 2
9 1 2 10KR2J-3-GP +3.3V_ALW
11 PBAT_PRES# 3
SYN-CON9-19-GP 1
20.81329.009 BAV99-4-GP
PC4401 PC4425
SCD1U50V3KX-GP SC2200P50V2KX-2GP
1
PD4408
2
2
PBAT_ALARM# 3
DY
1
BAV99-4-GP
A A
<Core Design>
Wistron Corporation
Title
DOCK DCIN/BATT Connector

C -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Charger
+DC_IN_SS +SDC_IN +PWR_SRC CHAGER_SRC

44 ACAV_DOCK_SRC
PU4501
8 D S 1 PG4520
SCD1U50V3KX-GP
7 D S 2 1 2 1 2
1
D S +DC_IN PR4501
PC4522
PC4523
6 3
10KR2F-2-GP 100KR2J-1-GP
33KR2J-3-GP
SC2200P50V2KX-2GP
2
SCD1U25V2ZY-1GP
PR4535
5 D G 4 D01R2512F-4-GP GAP-CLOSE-PWR
2
PG4501 G1 1 6 D1 PG4522
PR4536
PC4521
1 2
DY DY
160KR2F-GP
DOCK_DCIN_IS- 74
2
AO4407A-GP GAP-CLOSE-PWR-3-GP 1 2
2
PG4521
PR4537
2
1
S2 2 5 S1 GAP-CLOSE-PWR
GAP-CLOSE-PWR-3-GP Dock
1 1
D D
3 4 PG4523
1
2
G2 D2
1 2
10KR2J-3-GP
2
G2 3 4 D2
PR4539
DOCK_DCIN_IS+ 74
GAP-CLOSE-PWR
PR4538
S2 2 5 S1
PQ4505 PG4524
SCD1U50V3KX-GP
1
SI3993DV-T1-GP 1 2
33KR2J-3-GP
D
1
D 2
+SDC_IN
PR4540
leakage A G1 1 6 D1
PQ4506 GAP-CLOSE-PWR
100KR2J-1-GP
100KR2J-1-GP
D
PQ4507 PQ4501 PG4525
Dock
1
PQ4504
PR4543
PR4544
G 1 2
1
PQ4508 G SI3993DV-T1-GP PR4542
G PR4541 0R0402-PAD-2-GP GAP-CLOSE-PWR
2
2N7002A-7-GP DY PG4526
0R2J-2-GP Dock Dock
2N7002A-7-GP
S
2N7002A-7-GP
PC4524
G 1 2
NB_AC_OFF 38,43,44 Dock
2
S
1
1 2
2N7002A-7-GP
SW_GND 44
2
S
PR4545 1 2 PR4546 GAP-CLOSE-PWR
SCD1U50V3KX-GP
2
PC4525 100KR2J-1-GP CHAGER_SRC
PC4531
200KR2F-L-GP
300KR3F-GP
SCD1U50V3KX-GP
S
1
1
CHG_AGND SCD1U50V3KX-GP PR4552
PC4526
+DC_IN_SS 1
1
0R0402-PAD-2-GP CHAGER_SRC
SC1U6D3V2KX-GP
2
1
need 20mil DY
PR4547
SC2D2U25V5KX-1GP
2
PR4548
33R3J-2-GP
ICREF
+NBDOCK_DC_IN_SS
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SC2200P50V2KX-2GP
1
1
MAX8731A_DCIN MAX8731A_CSSP 1
PR4549
PC4528
PC4534
PC4533
PC4529
PC4530
2 1 2 22 28 2
DY
2
DCIN CSSP
5
6
7
8
5
6
7
8
1
PD4502 PC4532
PC4527
SI4800BDY-T1-GP
SI4800BDY-T1-GP
0R2J-2-GP MAX8731A_ACIN 2 SCD1U50V3KX-GP
D
D
D
D
D
D
D
D
BAT54CW-1-GP
MAX8731A_REF ACIN MAX8731A_CSSN CHG_AGND DY DY
PU4506
PU4505
27
+3.3V_ALW
charger current
2
CSSN
1
PR4553 MAX8731A_LDO 11 26
2 10KR2F-2-GP
2
VDDSMB ICOUT
1
PC4535 PR4554 PD4503

10KR2F-2-GP
49K9R2F-L-GP
SCD01U50V2KX-1GP
0R3J-0-U-GP SD103AWS-1-GP CHG_AGND

BQ24745RHDR-GP 2MAX8731A_BST1 K
1.4~6.3A
PR4551
25 1 A 1 2
DY
2
G
S
S
S
G
S
S
S
BOOT MAX8731A_LDO PC4536
PR4550
21
SCD1U10V2KX-4GP
2
4
3
2
1
4
3
2
1
MAX8731A_ACOK VDDP
1 PR4555 2 13 SCD1U50V3KX-GP
0R0402-PAD-2-GP ACOK
2
PG4527 24
37,39 ACAV_IN UGATE
1
1
1 2 10 PR4557 1 2 PC4539 PL4501 +VCHGR1 +VCHGR
37 CHARGER_SMBCLK SCL
1
CHG_AGND 0R3J-0-U-GP PC4537 SC3300P50V3KX-1GP IND-5D6UH-42-GP

PC4538
DY
15K8R3F-GP
GAP-CLOSE-PWR-3-GP 23 1 2 SCD1U50V3KX-GP MAX8731A_LX1 1 2 1 2

2
2
PHASE PR4558
PG4528
DY D01R2512F-3-GP
PR4556
C 1 2 9 1 2 C
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
37 CHARGER_SMBDAT
3
SDA
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
CHG_AGND PC4540 SC220P50V2JN-3GP
PC4542
20
DY
SCD1U50V3KX-GP
SC2D2U25V5KX-1GP
K
2
LGATE
5
6
7
8
1
GAP-CLOSE-PWR-3-GP PC4541
PC4543
PC4544
PC4545
PC4546
PC4547
DY
1
SC1000P50V3JN-GP-U PD4504
D
D
D
D
DY
1 2
SI4812BDY-T1-E3-GP
PR4561 +3.3V_ALW
PG4529
PG4530
39 SYS_IMON 14 19 1SMA18AT3G-GP
100KR2J-1-GP NC#14 PGND
SCD1U50V3KX-GP
2
1 PR4560 2 2 1 18
A
0R0402-PAD-2-GP CHG_AGND CSOP PR4559
PC4548
PU4507
DY DY
2
17 4D7R6J-GP
G
S
S
S
MAX8731A_IINP CSON
8
4K7R2J-2-GP
4
3
2
1
2
MAX8731A_CCV VICM
1
1
2
PR4562
200KR2F-L-GP PR4564
PR4563
1 2 0R0402-PAD-2-GP
8K45R2F-2-GP
6 CHG_AGND 1 2 MAX8731A_CSIP
FBO
1MAX8731A_CCV1
MAX8731A_CCI PR4565
PR4566
5 16
2
1
SC220P50V2JN-3GP
EAI NC#16
2
PC4549 PR4567 MAX8731A_CCS 0R0402-PAD-2-GP
PC4552
4
EAO
1
1 2 SC2200P50V2KX-2GP 7K5R2F-1-GP MAX8731A_REF 3 +VCHGR
SCD1U50V3KX-GP
VREF
1
2 1 2 1 1 PR4568 2 MAX8731A_DAC
7
1
PC4550 0R0402-PAD-2-GP CE +VCHGR_R MAX8731A_CSIN
12 15 1 PR4569 2
DY
GND
SCD1U10V2KX-4GP
SC150P50V2JN-3GP1 GND VFB 0R0402-PAD-2-GP
PC4551
2
1K8R6J-GP
SCD1U50V3KX-GP
2
2
PC4558
1K8R6J-GP
2
PC4553 DY PU4504
PR4570
PC4559
DY
29
1
DY DY SC56P50V2JN-2GP DY
PR4572
DY
2
1
DY
2
1 PR4571 2
2
PC4554 PC4555 PC4556 PC4557 0R0603-PAD-2-GP
SCD1U50V3KX-GP SCD01U50V2KX-1GP SCD01U50V2KX-1GP SC1U6D3V2KX-GP
2
CHG_AGND CHG_AGND
CHG_AGND
D
This Resistor PQ4509
must be 1%
ACAV_IN G DY
tolerance.
B B
2N7002A-7-GP
S
PR4573 +3.3V_ALW
+DC_IN_SS +3.3V_ALW 1 2
1MR2F-GP
59KR2F-GP
232KR2F-GP
1
+5V_ALW +5V_ALW
PR4574
PR4575
PR4576
PU4508A 100KR2J-1-GP PU4508B
2
3 + 5 +
1
1 1 PR4577 2 ACAV_IN_NB 37,38 7

2 0R0402-PAD-2-GP 6
SCD1U50V3KX-GP
- -
PC4501
20KR2F-L-GP
SC100P50V2JN-3GP
1
LM393ADR-1-GP LM393ADR-1-GP
PC4560
PR4578
PR4579
42K2R2F-L-GP
4
2
PD4501
K A leakage A
1
2
2
SDMK0340L-7-F-GP
A A
<Core Design>
Wistron Corporation
Title
Battery Charger
C -1
Fonseca 14.1" DIS
5 4 3 2 1
A B C D E
SSID = PWR.Plane.Regulator_5v3p3v +3.3V_ALW_2

51125_VCLK
SC1KP50V2KX-1GP
1
PC4622
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PR4635
2
100KR2J-1-GP
PC4601
PC4621
PD4602
BAT54-7-F-GP
2
51125_ENTRIP
DY
3
+PWR_SRC +PWR_SRC_5V/3V
3
4 4
PG4620 PD4603 PD4601
1 2 51125_ENTIP1 D S BAT54S-7F-GP BAT54S-7F-GP
1
GAP-CLOSE-PWR
PR4636
PG4621 PC4623 DY PQ4601
1
+15V_ALW +5V_PWR
147KR2F-GP
1 2 PQ4602 SC18P50V2JN-1-GP
2
2N7002A-7-GP PG4624
2N7002A-7-GP
GAP-CLOSE-PWR 37 ALW_ON 1 2 G GAP-CLOSE-PWR-3-GP
G
2
PG4622 PR4656 10KR2J-3-GP
1 2 1 2
S
1
GAP-CLOSE-PWR 51125_ENTIP2 D S
1
PG4623 39 THERM_STP# 1 2 PR4657 PC4624
100KR2F-L1-GP
1 2 PR4637 0R0402-PAD-2-GP DY 200KR2J-L1-GP PD4604 SC1U25V3KX-1-GP PC4625 PC4626
PR4638
BZT52C15S-GP SCD1U25V3KX-GP SCD1U25V3KX-GP
PQ4603
2
GAP-CLOSE-PWR PC4627 DY
2
PG4625 SC18P50V2JN-1-GP 2N7002A-7-GP
A
2
1 2
2
GAP-CLOSE-PWR
+PWR_SRC
+PWR_SRC_5V/3V
PC4630 PC4631 +PWR_SRC_5V/3V
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
1
1
PC4628 PC4629 +5V_PWR +5V_ALW
DY
1
PG4626
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 2
2
PC4632 PC4633 PC4634
D
2
8
7
6
5
5
6
7
8
1
GAP-CLOSE-PWR
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
3 3
D
D
D
D
D
PU4602 PU4603 PG4627
SCD1U50V3KX-GP
16
FDS8880-NL-GP FDS8884-GP 1 2
2
PU4601
Design Current = 10.2A Design Current = 8A GAP-CLOSE-PWR
VIN
PG4628
16<OCP<18.9A 12.54A<OCP< 14.82A
G
S
S
S
SCD1U25V3KX-GP 1 2
S
S
S
G
+3.3V_ALW +3D3V_PWR PC4635 PC4636

G S
1
2
3
4
4
3
2
1
51125_VBST2 51125_VBST1 GAP-CLOSE-PWR
2
PG4629
1
S G 2 1 1 2
0R3J-0-U-GP PR4639
9
VBST2 VBST1
22 1 2
0R3J-0-U-GP PR4640
1 2
PG4630
+3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 +5V_PWR 1 2
GAP-CLOSE-PWR PL8602 DRVH2 DRVH1 PL4601
PG4601 1 2 51125_LL2 11 20 51125_LL1 1 2 GAP-CLOSE-PWR
LL2 LL1
2 1 PG4633
1
IND-1UH-98-GP 51125_DRVL2 51125_DRVL1 IND-1D5UH-45-GP

D 12
DRVL2 DRVL1
19 1 2
1
1
ST100U6D3VBM-7GP
GAP-CLOSE-PWR
D
8
7
6
5
5
6
7
8
ST220U6D3VDM-15GP
PG4631 DY PR4641 DY PR4642 GAP-CLOSE-PWR
D
D
D
D
SCD1U10V2KX-4GP
PTC4601
PTC4605
D
D
D
D
PG4632 2D2R5F-2-GP PU4606 51125_VO2 51125_VO1 PU4607 2D2R5F-2-GP PG4635 PC4639 PTC4603 PTC4604 PG4634
2 1 7 24 DY
2
VO2 VO1
1
1
PC4637
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
FDS6676AS-GP 1 2
2
SCD1U10V2KX-4GP
ST220U6D3VDM-15GP
ST100U6D3VBM-7GP
GAP-CLOSE-PWR 51125_FB2 5 2 51125_FB1 DY
2
VFB2 VFB1
FDS6690AS-GP
PG4636 GAP-CLOSE-PWR
2
1
2 1 PG4637
2
2
1
G
S
S
S
DY 1 2 51125_EN 13 23 ALW_PWRGD_3V_5V 1 2
DY
S
S
S
G
GAP-CLOSE-PWR PC4638 PR4643 820KR2F-GP EN0 PGOOD PC4640

G S DY
2
1
2
3
4
4
3
2
1
SC330P50V3KX-GP 51125_ENTIP2 6 51125_ENTIP1 SC560P50V-GP GAP-CLOSE-PWR
PG4638 S G 1
2
51125_VREF ENTRIP2 ENTRIP1
2 1 PG4639
3 15 1 2
GAP-CLOSE-PWR VREF GND
1
SCD22U10V2KX-1GP
PC4641
PG4640 51125_TONSEL 4 25 GAP-CLOSE-PWR

TONSEL GND
2 1 -1.10/0322
1
2
1
GAP-CLOSE-PWR 14 18 51125_VCLK PR4646

SKIPSEL VCLK
1
PG4643 PR4645 51125_SKIPSEL 0R2J-2-GP DY
2 1 PR4644 DY 0R2J-2-GP PR4647
VREG3
VREG5
6K65R2F-GP 32K4R2F-1-GP
1 2
2 GAP-CLOSE-PWR TPS51125RGER-GP 51125_FB1_R 2
2
1 2
PG4642 51125_FB2_R 74.51125.073
2
2 1 PC4643 PC4642 DY
3D3V_AUX_S5_5_51125 8
17
+3.3V_ALW
DYSC18P50V2JN-1-GP +5V_ALW_2 SC18P50V2JN-1-GP
2
GAP-CLOSE-PWR +3.3V_ALW_2
PG4641
2
PG4644
1
2 1 1 2
1
PR4650 PR4649 PR4651

GAP-CLOSE-PWR PR4648 GAP-CLOSE-PWR-3-GP 21K5R2F-GP
10KR2F-2-GP
+3.3V_ALW_2 2
DY0R2J-2-GP
1 100KR2J-1-GP
PR4652 Close to VFB Pin (pin2)
2
+5V_ALW_2 2 1 ALW_PWRGD_3V_5V 37
2
0R0402-PAD-2-GP
PR4653
51125_VREF 2 1 PC4644
1
0R0402-PAD-2-GP PC4645
SC4D7U6D3V5KX-3GP
Close to VFB Pin (pin5) PC4646 I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP
2 PR4654
1
+3.3V_ALW_2 DY Inductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10A
2
0R2J-2-GP +3.3V_ALW_2 +3.3V_RTC_LDO

O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
2 PR4655
1 H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
DY 0R2J-2-GP 1 PR4601 2
0R0402-PAD-2-GP L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

Inductor: 3.3UH FDV0630-3R3M=P3 TOKO 31mohm Isat =6.9Arms 68.3R31A.10E
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L SKIPSEL VREG3 or VREG5 VREF(2V) GND
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37 Operating OOA Auto Skip Auto Skip
Mode PWM only
1 1
TONSEL CH1 CH2 EN0 Open 820kΩ to GND GND <Core Design>
GND 200kHz 265kHz Operating

VREF 245kHz 305kHz
Mode enable both
LDOs, VCLK on
enable both LDOs, disable all Wistron Corporation
VCLK off and circuit 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
and ready to ready to turn on Taipei Hsien 221, Taiwan, R.O.C.
VREG3 300kHz 375kHz turn on
switcher
switcher channels Title
VREG5 365kHz 460kHz
channels
DCDC 5V/3D3V (TPS51125)
A B C D E
5 4 3 2 1
+PWR_SRC
-1.10/0305
7 VR_CLKEN#
PM_DPRSLPVR 12 SSID = CPU.Regulator
1
+PWR_SRC IMVP_VR_ON 38 PC4702 PC4703 PC4704 PC4705
SCD1U50V3KX-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
2
5
6
7
8
H_VID[6..0] 12
D
D
D
D
SI7686DP-T1-GP
PU4702
1
PTC4702 PTC4703 +3.3V_RUN
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
DY
SE100U25VM-11GP
SE100U25VM-11GP
2
G
S
S
S
4
3
2
1
UGATE1 +VCC_CORE
PL4702
D PHASE1 1 2 D
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
0R0402-PAD-2-GP
2 PR4735 1
62883_DPRSLPVR 2 PR4749 1
2 PR4773 1
2 PR4718 1
2 PR4755 1
2 PR4746 1
2 PR4730 1
2 PR4762 1
2 PR4729 1
2 PR4766 1
1
L-D36UH-1-GP
PR4775
2D2R5J-1-GP
1
1
PR4745 PTC4704 PTC4705
5
6
7
8
1K91R2F-1-GP
D
D
D
D
SIR460DP-T1-GE3-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PU4703 DY
ST330U2VDM-4-GP
SE220U2VDM-12GP
1SNUBBER_1
2
2
PG4708
PG4706
2
1
62883_CLK_EN#
62883_VR_ON
PC4712
SC330P50V2KX-3GP
62883_VID6
62883_VID5
62883_VID4
62883_VID3
62883_VID2
62883_VID1
62883_VID0
S
S
S
4 G
3
2
1
2
DY
+VCC_CORE_PHASE1
2
+3.3V_RUN LGATE1
PHASE1_R
40
39
38
37
36
35
34
33
32
31
1
PU4705
PR4720 ISEN1 1 2
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
1K91R2F-1-GP +5V_ALW PR4756 10KR2F-2-GP
VSUM+ 1 2
PR4772 PR4767 3K65R3F-GP
2
1 PR4704 2 62883_PGOOD 1 30 BOOT2 1 2B00T2_R VSUM- 1 2

38,39 IMVP_PWRGD 0R0402-PAD-2-GP PGOOD BOOT2 PR4742 1R2F-GP
12 PSI# 1 PR4733 2 62883_PSI# 2 29 UGATE2 2D2R3J-2-GP PR4770 ISEN2 1 2
0R0402-PAD-2-GP PSI# UGATE2 PR4716 10KR2F-2-GP
1 DY 2
1 2 62883_RBIAS 3 28 PHASE2 ISEN3 1 2
1
RBIAS PHASE2
2
NTC 470K close to H/S MOSFET of Phase1 PR4781 147KR2F-GP X01.09/1020 4K02R2F-GP PR4738 10KR2F-2-GP
9 H_PROCHOT#
1 DY 2H_PROCHOT#_R 4
VR_TT# VSSP2
27 PC4710 PR4751
PR4771 PR4758 SCD22U25V3KX-GP 0R0603-PAD-2-GP
6266A_NTC_R NTC-470K-1-GP 4K02R2F-GP 62883_NTC LGATE2 +PWR_SRC
1
PR4774
DY 2 1 DY 2 5
NTC LGATE2
26
2
4K02R2F-GP 1 DY2 62883_VW 6 74.62883.B73 25 62883_VCCP
SCD01U25V2KX-3GP VW VCCP
PC4737 1 2 62883_COMP 7 24 62883_PWM3 PC4708 PC4728 PC4715 PC4716 PC4717 PC4718
1
PR4726 COMP PWM3/LGATE1#
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
8K06R2F-GP 62883_FB 8 23 LGATE1
FB LGATE1
2
1 2 ISEN3 9 22
5
6
7
8
ISEN3/FB2 VSSP1
1
D
D
D
D
SCD22U10V2KX-1GP
SI7686DP-T1-GP
PC4719 PC4706 ISEN2 10 21 PHASE1 PU4704
SC1KP50V2KX-1GP ISEN2 PHASE1
C C
1
UGATE1
+1.05V_VTT
SCD22U10V2KX-1GP
PC4707
PC4709
BOOT1
SCD22U25V3KX-GP
ISUM+
2
ISEN1
ISUM-
VSEN
IMON
PR4744 41
VDD
RTN
2
GND
VIN
2
1 DY 2 1 2
2
PR4723
G
S
S
S
PC4738
2
1
0R2J-2-GP SC33P50V2JN-3GP ISL62883CHRTZ-T-GP 0R0402-PAD-2-GP Design Current = 48A
11
12
13
62883_ISUM- 14
15
16
17
18
19
20
4
3
2
1
PR4786
DY DY 100KR2F-L1-GP
1
ISEN3 1 2 1 262883_COMP_R
1 2 ISEN1 UGATE1 PR4722 UGATE2 +VCC_CORE
62883_VDD
PL4703
PC4725 PC4740 PR4752 BOOT1 1 2BOOT1_PHASE1
1
1
SC22P50V2JN-4GP SC150P50V2JN-3GP 324KR2F-GP PC4736 SCD22U10V2KX-1GP 2D2R3J-2-GP PHASE2 1 2

CPU_IMON
CPU_IMON 12,39
+5V_ALW L-D36UH-1-GP
PR4728
2D2R5J-1-GP
2
5
6
7
8
1
1 PR4754 2 +PWR_SRC PR4776 PC4730 PTC4706
D
D
D
D
SIR460DP-T1-GE3-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
VSUM- 0R0402-PAD-2-GP SCD22U10V2KX-1GP PC4734 PU4706
6K65R2F-GP
1 2 1 PR4731 2 1 2 DY
ST330U2VDM-4-GP
+5V_ALW
2
1SNUBBER_2
PC4722
PG4712
PG4713
PC4713 PR4759 0R0402-PAD-2-GP
1
1
1 262883_FB_VSEN1 2 1 1R2F-GP SC1U10V2KX-1GP PR4734
2
PR4714 BOOT3 1 2 6208_PHASE3
PR4712
6208_FCCM
S
S
S
562R2F-GP SC390P50V2KX-GP PC4729
PC4726
2
SC330P50V2KX-3GP
VSS_SENSE_R 12
2 SC1U10V2KX-1GP
2
1 2 SCD22U25V3KX-GP 2D2R3J-2-GP
6208_PWM
4
3
2
1
2
PC4723
1
1
PU4707 SCD22U25V3KX-GP DY
2KR2F-3-GP LGATE2
1210 SB
VCC
BOOT
2
1210 SB
PHASE2_R
+VCC_CORE_PHASE2
VSUM+
PC4714
C4714 2 7 PHASE3
PWM PHASE
1
1
2P
PC4741 8 UGATE3
UGATE
SCD33U16V3KX-1GP
SCD01U16V2KX-3GP
PC4721 PR4750 4 LGATE3

1
SC330P50V2KX-3GP 2K61R2F-1-GP LGATE ISEN2

6 1 2
2
PR4725 FCCM PR4780 10KR2F-2-GP
GND
GND
1
82D5R2F-1-GP PR4736 VSUM+ 1 2

1VSUM_RR
2
PR4739 3K65R3F-GP
VSUM_RC
11KR2F-L-GP
ISL6208CRZ-TGP-U VSUM- 1 2
2
9
3
12 VCC_SENSE PR4708 1R2F-GP
ISEN1 1 2
2
1
PC4711 PR4760 10KR2F-2-GP

SC330P50V2KX-3GP PC4742 PR4721 ISEN3 1 2
2
SCD01U25V2KX-3GP NTC-10K-26-GP PR4707 10KR2F-2-GP

2
12 VSS_SENSE +PWR_SRC
PR4748
1
B 1 2 VSUM- B
2
NTC 10K close to Choke of Phase1

PC4727 649R2F-GP
1
SC1KP50V2KX-1GP PC4701 PC4735 PC4732 PC4733

1
1
PC4731
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U25V3KX-GP
Intel support POC (Power On Configuration).
2
2
5
6
7
8
+1.05V_VTT
D
D
D
D
SI7686DP-T1-GP
PU4701
1 PR4741 2
0R0402-PAD-2-GP
PR4737 PR4701 PR4709 PR4732 PR4713 PR4705 PR4769 PR4724 PR4753
1
G
S
S
S
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
4
3
2
1
DY DY DY DY
UGATE3 +VCC_CORE
PL4701
2
PHASE3 1 2
H_VID0
H_VID1 L-D36UH-1-GP
PR4740
2D2R5J-1-GP
5
6
7
8
1
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
H_VID2 PTC4708 PTC4701
D
D
D
D
SIR460DP-T1-GE3-GP
H_VID3 PU4708
PG4701
PG4714
H_VID4
DY
ST330U2VDM-4-GP
ST330U2VDM-4-GP
1SNUBBER_3
2
1
1
H_VID5
H_VID6
2
PM_DPRSLPVR
S
S
S
PSI#
PC4739
SC330P50V2KX-3GP
2
4
3
2
1
PR4715 PR4702 PR4768 PR4743 PR4727 PR4710 PR4706 PR4703 PR4777
1
DY
PHASE3_R
+VCC_CORE_PHASE3
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
2
DY DY DY DY DY LGATE3
2
ISEN3 1 2
PR4763 10KR2F-2-GP
VSUM+ 1 2
PR4764 3K65R3F-GP
A VSUM- A
1 2
PR4747 1R2F-GP
ISEN1 1 2
PR4719 10KR2F-2-GP
ISEN2 1 2
PR4765 10KR2F-2-GP
<Core Design>
Wistron Corporation
Title
ISL62883_CPU_CORE_1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A <Core Design> A
Wistron Corporation
Title
Reserve
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A <Core Design> A
Wistron Corporation
Title
DC to DC 1.05V
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p5v0p75v
+5V_ALW +5V_ALW
1
PR5001
5D1R3J-GP
+5V_ALW
SC1U10V3KX-3GP
SC1U10V3KX-3GP
D PR5002 D
2
1 2 51116_VDD PR5003 1 2 0R0402-PAD-2-GP 0D75V_EN
A
38 0.75V_DDR_VTT_ON
PC5003
10KR2F-2-GP
PC5004
PC5002 PD5001 PR5004 1 DY 2 0R2J-2-GP
9,22,35,38 SIO_SLP_S3#
1
+3.3V_ALW 1 2 DY SDMK0340L-7-F-GP
PR5005 1 DY 2 0R2J-2-GP DY PC5005
2
SC1KP50V2KX-1GP 22,38,72 SIO_SLP_S4# SCD1U10V2KX-4GP
2
1
PR5006
16
14
15
20KR2F-L-GP PU5001
ILIM
VDDP
VDDP
PR5008
2
BST 22 TPS51116_VBST1 1 2 TPS51116_VBST

37 1.5V_SUS_PWRGD 13
PGD 0R3J-0-U-GP
PR5007 1 DY 2 620KR2F-GP 12 21 TPS51116_UGT
NC#12 DH
37,42 DDR_ON 11
EN/PSV +1.5V_SUS_P +1.5V_SUS
0D75V_EN 10 20 TPS51116_PHS PG5002
RT: Non_ASM VTTEN LX
1 2
TI: ASM 23 +PWR_SRC +5116_PWR_SRC
+1.5V_SUS_P VTTIN PG5003 GAP-CLOSE-PWR
PC5001 1 DL
19 TPS51116_LGT 2 1 PG5004
SC1U10V3KX-3GP 7 1 2
+5V_ALW NC#7 GAP-CLOSE-PWR
2
PR5009 1 DY 2 1M1R2J-GP TPS51116RGER-GP-U PG5005 GAP-CLOSE-PWR

1 18 2 1 PG5006
PGND2 PGND1
PGND1 17 1 2
C 1 PR5010 2 4 GAP-CLOSE-PWR C
0R0402-PAD-2-GP TON TPS51116_VDDQSNS PG5007 GAP-CLOSE-PWR
8
VDDQS
2
2 1 PG5008
PC5006 DY 24 9 51116_VDDQSET 1 2
SC1KP50V2KX-1GP VTT FB +5V_ALW GAP-CLOSE-PWR
1
2 PR5011 PG5009 GAP-CLOSE-PWR

VTTS +5116_PWR_SRC PG5010
VCCA 6 1 DY 2 2 1
VSSA
1 2
GND
REF
0R2J-2-GP GAP-CLOSE-PWR
1
PG5011 GAP-CLOSE-PWR
+0D75V_DDR_P
DY PC5007 2 1 PG5001
25
5
+V_DDR_MCH_REF SC1U10V3KX-3GP 1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
GAP-CLOSE-PWR
PC5009
PC5010
PC5011
PC5012
1 PR5012 2 GAP-CLOSE-PWR
1
0R0603-PAD-2-GP PG5012
1
1 2
5
6
7
8
PC5008
2
D
D
D
D
SCD033U16V3KX-GP PU5002 GAP-CLOSE-PWR
2
SI7686DP-T1-GP Design Current = 13A PG5013

1 2
20.4 <OCP< 24.1A
GAP-CLOSE-PWR
+0D75V_DDR_P
G
S
S
S
PG5014
1 2
4
3
2
1
+0D75V_DDR_P +0.75V_DDR_VTT +1.5V_SUS_P
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
GAP-CLOSE-PWR
PC5013
PG5015 TPS51116_UGT PG5019

PL5001
1
1
PC5014
PC5015
PC5016
1 2 1 2
TPS51116_VBST 1 2 TPS51116_PHS 1 2
B B
GAP-CLOSE-PWR GAP-CLOSE-PWR
2
SC4D7U6D3V5KX-3GP
PG5016 PC5017 IND-1UH-80-GP PG5020
PTC5001
PTC5002
SCD1U10V2KX-4GP
1 2 SCD1U25V3KX-GP 1 2
PC5018
PC5019
5
6
7
8
1
GAP-CLOSE-PWR PR5013 GAP-CLOSE-PWR
DY
D
D
D
D
PG5017
PU5003 2D2R5F-2-GP PG5018
ST220U2D5VDM-13GP
ST220U2D5VDM-13GP
SIR460DP-T1-GE3-GP
GAP-CLOSE-PWR-3-GP
1 2
2
1
TPS51116_PHS_SET GAP-CLOSE-PWR
1
S
S
S
G
State S3 S5 VDDR VTTREF VTT DY PC5020
4
3
2
1
SC330P50V3KX-GP
2
S0 Hi Hi On On On
TPS51116_LGT
S3 Lo Hi On On Off(Hi-Z) TPS51116_VDDQSNS
1
S4/S5 Lo Lo Off Off Off PR5014
30K1R2F-L-GP PC5021
DY SC18P50V2JN-1-GP
2
2
51116_VDDQSET
1
VDDQSET VDDQ (V) VTTREF and VTT NOTE
PR5015
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L 29K4R2F-GP
GND 2.5 VVDDQSNS/2 DDR Close to
Inductor: 1.5UHPCMC063T-1R5MN Cyntec DCR:14~15mohm VFB=18Arms
Isat Pin (pin5)
68.1R510.10K
2
A
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L <Core Design> A
V5IN 1.8 VVDDQSNS/2 DDR2 H/S: FDS8880 SO-8/9.6mohm/ 12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
FB Resistors Adjustable VVDDQSNS/2 1.5 V < VVDDQ < 3 V Switching freq-->400KHz Wistron Corporation
Title
DC to DC 1.5V / 0.75V
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
+3.3V_SUS
SSID = PWR.Plane.Regulator_1p8v
1
PR5101
100KR2J-1-GP
LDO for +1.8V_RUN
2
1.8V_RUN_PW RGD
38 1.8V_RUN_PW RGD
D D
+3.3V_SUS +1.8V_LDOIN
VOUT = 0.8 *(1+Rtop/Rbot)
PG5102
1 2
GAP-CLOSE-PW R
+1.8V_RUN
PG5103 Design current = 1.1A
1 2
5
4
3
2
1
GAP-CLOSE-PW R
NC#4
NC#3
NC#1
GND
POK
PU5101
RT9035-18GQW -GP-U
PR5103
0R3J-0-U-GP 21
GND +1D8V_RUN_P +1.8V_RUN
1 DY 2 6 NC#6 NC#20 20
38,42,72,86 RUN_ON 1 PR5102 2 7 EN ADJ 19 PG5101
0R0402-PAD-2-GP 8 18 1 2
VIN VOUT
9 VIN VOUT 17
10 16 GAP-CLOSE-PW R
VIN VOUT
1
PC5102 PC5101 PG5108
NC#12
NC#13
NC#14
NC#15
DY DY PR5104 1 2
VDD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1K27R2F-L-GP PC5105 PC5106
1
PC5103 PC5104 GAP-CLOSE-PW R
SC10U10V5KX-2GP
DY DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
11
12
13
14
15
2
SC1KP50V2KX-1GP
1
2
C +5V_ALW C
1
PR5105
1
1KR2F-3-GP
PR5106
0R0603-PAD-2-GP
2
2
1
PC5107
SC1U10V2KX-1GP
2
+3.3V_SUS
1
PR5108
LDO for +1.8V_DELAY 100KR2J-1-GP

VOUT = 0.8 *(1+Rtop/Rbot)
2
+3.3V_SUS +1.8V_DELAY_IN
PG5104
+1.8V_DELAY
B
1 2 Design current = 1.13A B
38 1.8V_RUN_GFX_ON 1 PR5114 2
5
4
3
2
1
0R0402-PAD-2-GP GAP-CLOSE-PW R
NC#4
NC#3
NC#1
GND
POK
PG5106 PU5102
38,42 3.3V_RUN_GFX_ON 1 DY 2 1 2 RT9035-18GQW -GP-U
PR5107
PR5113 GAP-CLOSE-PW R 0R3J-0-U-GP 21
0R2J-2-GP GND +1D8V_DELAY_P +1.8V_DELAY
1 DY 2 6 NC#6 NC#20 20
PG5105
38,42 GFX_MEM_ON 1 DY 2 7 EN ADJ 19
8 VIN VOUT 18 1 2
PR5112 9 17
0R2J-2-GP VIN VOUT GAP-CLOSE-PW R
10 VIN VOUT 16
PG5107
1
1
PC5109 PC5114 1 2
NC#12
NC#13
NC#14
NC#15
DY DY PR5109
VDD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1K27R2F-L-GP PC5108 PC5112 GAP-CLOSE-PW R

2
1
PC5113 PC5111
SC10U10V5KX-2GP
DY DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
11
12
13
14
15
2
SC1KP50V2KX-1GP
1
2
+5V_ALW
1
PR5111
1
1KR2F-3-GP
PR5110
0R0603-PAD-2-GP
2
2
A <Core Design> A
Wistron Corporation
1
PC5110 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

SC1U10V2KX-1GP Taipei Hsien 221, Taiwan, R.O.C.
2
Title
DC to DC 1.8V_RUN/1.8V_DELAY
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
+PWR_SRC +1.05V_VTT_PWR_SRC
PG5260
1 2
+1.05V_VTT_PWR_SRC +1.05V_VTT_P +1.05V_VTT +1.05V_VTT_P +1.05V_VTT
GAP-CLOSE-PWR
PG5261 PG5262 PG5263
1 2 1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-CLOSE-PWR
TPS51218 for +1.05V_VTT
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
PG5264 PG5266 PG5267
1 2 PC5268 1 2 1 2
1
SC4D7U25V5KX-GP
GAP-CLOSE-PWR PC5265 PC5267 GAP-CLOSE-PWR GAP-CLOSE-PWR
C PG5265 PC5266 PG5268 PG5270 C
2
5
6
7
8
1 2 1 2 1 2
D
D
D
D
PU5210
GAP-CLOSE-PWR SI7686DP-T1-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
PG5269 PG5201 PG5271
1 2 1 2 1 2
Design Current = 22.7A
G
S
S
S
GAP-CLOSE-PWR GAP-CLOSE-PWR GAP-CLOSE-PWR
PG5272 37 VTT_PWRGD PU5201 27.1<OCP<32A PG5273 PG5274
PR5289
4
3
2
1
1 2 PR5290 PC5269 1 2 1 2
56K2R2F-2-GP 1 11 0R3J-0-U-GP SCD1U25V3KX-GP
GAP-CLOSE-PWR 51218_TRIP PGOOD GND 51218_VBST 1
1 2 2 TRIP VBST 10 251117B_LL1 2 1 PL5201
GAP-CLOSE-PWR GAP-CLOSE-PWR
3 9 51218_DRVH 51218_DRVH +1.05V_VTT_P PG5275 PG5276
38 CPU_VTT_ON EN DRVH
51218_VFB 4 8 51218_SW 1 2 1 2 1 2
VFB SW
1
SC1KP50V2KX-1GP
PC5201 5 7 IND-1UH-80-GP
CCM V5IN
SC4D7U6D3V5KX-3GP
6 51218_DRVL +5V_ALW GAP-CLOSE-PWR GAP-CLOSE-PWR
DRVL
1
GAP-CLOSE-PWR-3-GP
PC5270 PC5271 PTC5201 PTC5306 PG5278
2
1
SCD1U10V2KX-4GP
PR5291 1 2
5
6
7
8
5
6
7
8
PG5277
SE220U2VDM-8GP
SE220U2VDM-8GP
470KR2F-GP TPS51218DSCR-GP-U1 PC5272 PR5292
1
D
D
D
D
D
D
D
D
SC1U10V2KX-1GP PU5004 PU5005 2D2R5J-1-GP GAP-CLOSE-PWR
DY
2
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
2
2
1
S
S
S
S
S
S
PC5273
G
Frequency setting DY SC330P50V2KX-3GP
4
3
2
1
4
3
2
1
VTT_SENSE
420K -->300KHz VTT_SENSE 12
1
B
200K -->350KHz PR5293
10KR2F-2-GP
B
R1
100K -->390KHz
2
47K -->450KHz 51218_VFB
51218_DRVL Vout=0.704V*(R1+R2)/R2
1
PR5294
R2 20KR2F-L-GP
2
+3.3V_ALW
1
PR5295
100KR2J-1-GP
2
PU5213
1 6
VTT_PWRGD 2 5 H_VTTPWRGD_R
+1.05V_VTT
A <Core Design> A
3 4
1
DMN66D0LDW-7-GP
PR5297 Wistron Corporation
1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1210 SB
2
Title
H_VTTPWRGD
H_VTTPWRGD 9
DC to DC +1.05V_VTT
5 4 3 2 1
DS2-Intel
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
CPU_GFXCORE
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
LED Location from left to right
HDD BATTERY
+LCDVDD
D D
C5402
C5403
LCD1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
48
41 50
2
1 LVDS_CBL_DET#
LVDS_CBL_DET# 21
2
3
4 eDP_CTX_LRX_N1 80 1 2 LCD_TST 38
5 eDP_CTX_LRX_P1 80 R5404 0R0402-PAD-2-GP
42 6 Near LCD1 CONN
7 eDP_CTX_LRX_N0 80
8 eDP_CTX_LRX_P0 80
9
10 +3.3V_RUN
eDP_AUX 81
11 eDP_AUX# 81
12
43 13 BAT1_LED_AMBER_P 66 For DPST function
1
14 BAT2_LED_BLUE_P 66
15 R5405 R5406
LCD_TST_C BREATH_PW RLED_P 66 10KR2J-3-GP DY DY 10KR2J-3-GP
16
17 LCD_SMBDAT_1_R +LCDVDD +3.3V_ALW
18 LCD_SMBCLK_1_R
2
LCD_PW M LCD_PW M_R +3.3V_RUN LCD_SMBUS_PW R
19
LCD_BL_EN R5410
1 2
0R0402-PAD-2-GP R5412
1 DY 2 LBKLT_CTL_GPU 80 1 DY 2
44 20 1 DY 2 0R2J-2-GP PANEL_BKEN_GPU 38,81 R5418 0R2J-2-GP
1
2
1
2
21 R5411 0R2J-2-GP
22 eDP_LCD_HPD 81 1 R5417 2
2
23 0R0402-PAD-2-GP RN5402 RN5403
24 +LCDVDD R5425 SRN2K2J-1-GP SRN2K2J-1-GP
25 DY 100KR2J-1-GP
C 26 C
4
3
4
3
45 27 U5401
1
28
29 LCD_SMBDAT_1 1 6 LCD_SMBDAT 37,81
30
31 RN5404 2 5
32 LCD_SMBDAT_1_R 1 4
33 LCD_SMBCLK_1_R 2 3 3 4
46 34 LCD_DET_G 1 2 +3.3V_RUN
35 R5403 0R0402-PAD-2-GP SRN100J-3-GP
eDP_AUX# LCD_SMBCLK_1 DMN66D0LDW -7-GP
36
R5424
1 DY 2
100KR2J-1-GP
37
38 +INV_PW R_SRC
LCD_SMBCLK 37,81
39 1 DY 2 eDP_AUX
40 R5423 100KR2J-1-GP
47 51
49
IPEX-CONN40-2R-GP-U
LCD POWER
20.F1093.040 +3.3V_RUN +LCDVDD
2nd:20.F1289.040
Q5401
1 D D 6
2 D D 5
+15V_ALW 3 G S 4
1
1 2 SI3456DDV-T1-GE3-GP
B R5414 330KR2J-L1-GP R5415 C5405 C5406 B
1
1 2 FPVCC_CTL1 100R3J-4-GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
C5404 SCD1U50V3KX-GP
SSID = Inverter LED BACKLIGHT CONVERTER POWER
2
1
R5416
DY 100KR2J-1-GP
2
Q5402
-1.10/0301
4 3 LCDVDD_1
+INV_PW R_SRC 5 2
6 1
+PW R_SRC DMN66D0LDW -7-GP

U5402 Need confirm
1
1 D D 6
C5411 C5410 2 D D 5
SC1KP50V2KX-1GP SCD1U50V3KX-GP 3 G S 4 +3.3V_ALW 1 2
2
R5419 47KR2J-2-GP
1
SI3457BDV-T1-1GP LCDVDD_EN_GPU 1
38,80 LCDVDD_EN_GPU
1
C5412 R5427 3 OUT FPVCC_CTL3

SCD1U25V2ZY-1GP 100KR2J-1-GP 3 LCDVCC_EN 2 R1
IN 1 GND
2
LCD_VCC_TEST_EN 2 R2
38 LCD_VCC_TEST_EN
2
R_PW R_SRC Q5404

D5401 DDTC144EUA-7F-GP
-1.10/0305 BAT54C-7-F-GP
C_PW R_SRC 1 2
A R5426 A
100KR2J-1-GP <Core Design>
D
Q5405
37 EN_INVPW R G
2N7002A-7-GP
Wistron Corporation
S
Title
LCD
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
RED_CRT L5502 1 2 CRT_R
75 RED_CRT
BLM18BA220SN1D-GP
GREEN_CRT L5501 1 2 CRT_G
75 GREEN_CRT
BLM18BA220SN1D-GP
BLUE_CRT L5503 1 2 CRT_B
75 BLUE_CRT
BLM18BA220SN1D-GP
C5502
C5503
C5504
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1
1
R5502
R5503
R5501
D
DY DY DY D
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
C5505 C5506 C5507
2
2
2
CRT_SW ITCH_VSYNC 1 2 VSYNC_BUF
75 CRT_SW ITCH_VSYNC
R5504 0R0402-PAD-2-GP
1 2 VSYNC_DOCK 74 Layout Note:
R5505 0R0402-PAD-2-GP +5V_CRT_RUN
*Pi-filter & 150 Ohm pull-down
75 CRT_SW ITCH_HSYNC
CRT_SW ITCH_HSYNC 1 2 HSYNC_BUF resistors should be as close
R5506 0R0402-PAD-2-GP
as to CRT CONN.
1
1 2 C5508
R5507 0R0402-PAD-2-GP HSYNC_DOCK 74 SCD1U10V2KX-4GP * RGB signal will hit 75 Ohm
first, then pi-filter, finally
2
CRT CONN.
14
1
R5508
HSYNC_BUF 2 3 HSYNC_5 2 1 JVGA_HS
C 33R2J-2-GP C
U5501A
14
7
4
SSAHCT125PW R-GP
R5509
VSYNC_BUF 5 6 VSYNC_5 2 1 JVGA_VS
33R2J-2-GP
U5501B
1
SSAHCT125PW R-GP
C5509 DY DY C5501
SC100P50V2JN-3GP SC100P50V2JN-3GP
2
I2C +5V_RUN
A
DAT_DDC2_CRT D5501
75 DAT_DDC2_CRT +5V_CRT_RUN
B0530W S-7-F-GP
CLK_DDC2_CRT
75 CLK_DDC2_CRT
K
1
1
C5510 C5511
SC22P50V2JN-4GP SC22P50V2JN-4GP
2
FUSE5501
FUSE-3A32V-7-GP
B +5V_CRT_RUN_R B
1
MAX4885E has internal ESD protection
and internal level shift -1.10/0310
CRT1
AFTP5501 1 +5V_CRT_RUN_R 9 4
CRT_R VCC_CRT NC#4
AFTP5502 1 NC#11 11
AFTP5503 1 CRT_G
AFTP5504 1 CRT_B DAT_DDC2_CRT 12
CLK_DDC2_CRT DDCDATA_ID1
15 DDCCLK_ID3
GND 5
CRT_R 1 6
CRT_G CRT_RED GND
2 CRT_GREEN GND 7
CRT_B 3 8
CRT_BLUE GND
GND 10
JVGA_VS 14 16
JVGA_HS VSYNC GND
13 HSYNC GND 17
D-SUB-15-36-GP-U2
20.20431.015
CRT Connector
A <Core Design> A
Wistron Corporation
Title
CRT
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A <Core Design> A
Wistron Corporation
Title
Reserve
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A <Core Design> A
Wistron Corporation
Title
Reserve
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CPU SSID = Thermal

+3.3V_RUN
1
R5802
10KR2J-3-GP
2
FAN1_TACH_FB
39 FAN1_TACH_FB
1
DY EC5801
SCD1U10V2KX-4GP
2
D D
FAN1
5
FAN1_VOUT 1
39 FAN1_VOUT
AFTP5801 1 2
K
3
1
D5801 C5801 4
SDMK0340L-7-F-GP DY SC10U10V5KX-2GP 6
2
MLX-CON4-25-GP-U
A
CPU XDP
-1.10/0308 20.F1000.004
XDP1
NP1 -1.10/0308 2nd:20.D0241.104
FAN1_VOUT 39 FAN1_DET#
61 AFTP5802 1
-1.10/0308 1 2 AFTP5803 1 FAN1_TACH_FB
62 1 FAN1_DET#
AFTP5804
9 XDP_PREQ# XDP_PREQ# 3 4 XDP_OBS16 1 TP5802
XDP_PRDY# 5 6 XDP_OBS17 1 TP5803
9 XDP_PRDY#
7 8
Place R near XDP1 CONN XDP_OBS0 9 10 XDP_OBS8 1 TP5804
within 2" 9 XDP_OBS0
XDP_OBS1 11 12 XDP_OBS9 1 TP5805
9 XDP_OBS1 +1.05V_VTT
-1.10/0308 13 14
9 XDP_OBS2
9 XDP_OBS3
R5803 19 20
1 2 TP5808 1 XDP_OBS21 21 22 XDP_OBS18 1 TP5809
9,25 H_PWRGD
TP5810 1 XDP_OBS20 23 24 XDP_OBS19 1 TP5811
1
PAD-2P-29-GP 25 26
XDP_OBS4 27 28 XDP_OBS12 1 TP5812 C5802
9 XDP_OBS4
R5804 XDP_OBS5 29 30 XDP_OBS13 1 TP5801 PAD-2P-29-GP
9 XDP_OBS5
1 2 31 32
22 PM_PWRBTN#_R XDP_OBS6 XDP_OBS14 1 TP5813
9 XDP_OBS6 33 34
2
C PAD-2P-29-GP XDP_OBS7 35 36 XDP_OBS15 1 TP5814 C
9 XDP_OBS7
37 38
+1.05V_VTT H_CPUPWRGD_XDP 39 40 BCLK_ITP_P
BCLK_ITP_P 9
PM_PWRBTN#_XDP 41 42 BCLK_ITP_N 1 DY 2 PLTRST1# 9,21,80
BCLK_ITP_N 9
43 44 R5805 0R2J-2-GP
1 2 PCIE_CLK_XDP_P 45 46 XDP_RST#_R 1 2 H_CPURST# 9
9 H_PWRGD_XDP
R5806 PAD-2P-29-GP 1 TP_PCIE_CLK_XDP_N 47 48 XDP_DBRESET# R5807 PAD-2P-29-GP XDP_DBRESET# 9,22,38
TP5815 49 50
1
51 52 XDP_TDO XDP_TDO 9
C5803 53 54 XDP_TRST#
18,19,23,40 PCH_SMBCLK_MEM XDP_TRST# 9
PAD-2P-29-GP 55 56 XDP_TDI
XDP_TCLK XDP_TMS XDP_TDI 9 +1.05V_VTT
57 58 R5808
9 XDP_TCLK XDP_TMS 9
59 60
2
63 2 1
64
NP2
PAD-2P-29-GP
PAD-60P-GP -1.10/0308
ZZ.00PAD.Q81
B SSID = PCH B
A 33 ohm series resistor should be placed

within 1 inch (or 25.4 mm) of the PCH to
source terminate the interface.
PCH XDP
Place near PCH side Place near XDP CONN Place near PCH side
XDP2
NP1 +3.3V_SUS +3.3V_SUS
61
1 2
62
1
3 4 XDP_FN16 2 DY 1 R5814 R5815 R5811
LED_BD_DET#_R 25
5 6 XDP_FN17 R5809 2 DY 1 33R2J-2-GP SIO_EXT_SCI#_R 25
200R2F-L-GP
200R2F-L-GP
200R2F-L-GP
7 8 R5810 33R2J-2-GP DY DY DY
21 USB_OC#0_1_R 1 DY 2 XDP_FN0 9 10 XDP_FN8 2 DY 1 PCMCLK_REQ# 23,32
21 USB_OC#2_3_R R5812 1 DY 2 33R2J-2-GP XDP_FN1 11 12 XDP_FN9 R5801 2 DY 1 33R2J-2-GP MINI1CLK_REQ# 23,64
2
R5816 33R2J-2-GP 13 14 R5817 33R2J-2-GP
21 USB_OC#4_5 1 DY 2 XDP_FN2 15 16 XDP_FN10 2 DY 1 PCH_JTAG_TDI
HDD_DET#_R 24
PCH_JTAG_TCK 21 USB_OC#6_7 R5813 1 DY 2 33R2J-2-GP XDP_FN3 17 18 XDP_FN11 R5818 2 DY 1 33R2J-2-GP PCH_JTAG_TDO
PCH_GPIO19 24
R5819 33R2J-2-GP 19 20 R5820 33R2J-2-GP PCH_JTAG_TMS
21 22
23 24
25 26
1
1
21 USB_OC#8_9 1 DY 2 XDP_FN4 27 28 XDP_FN12 2 DY 1 R5830 R5827 R5831
RTC_BAT_DET#_R 25
21 USB_OC#10_11 R5821 1 DY 2 33R2J-2-GP XDP_FN5 29 30 XDP_FN13 R5822 2 DY 1 33R2J-2-GP
51R2F-2-GP PCH_GPIO37 25
100R2F-L1-GP-U
100R2F-L1-GP-U
100R2F-L1-GP-U
R5823 33R2J-2-GP 31 32 R5824 33R2J-2-GP DY DY DY
R5839 XDP_FN6 XDP_FN14
21 USB_OC#12_13 1
R5825 1
DY 2
XDP_FN7
33 34
XDP_FN15
2 DY 1 PCH_GPIO16 25
21 PCH_OC7# DY 2 33R2J-2-GP 35 36 R5828 2 DY 1 33R2J-2-GP TEMP_ALERT# 25,38
2
2
R5829 33R2J-2-GP 37 38 R5826 33R2J-2-GP
9,37,38 RUNPWROK 39 40
1 DY 2 XDP_PWRBTN#_R 41 42
22 PM_PWRBTN#_R R5832 0R2J-2-GP +3.3V_RUN 43 44 +3.3V_RUN
45 46 PCH_XDP_RST# 2 DY 1 PLTRST2# 21,32,34,72
A 47 48 XDP_DBRESET# R5833 1KR2J-1-GP XDP_DBRESET# 9,22,38 A
49 50
51 52 PCH_JTAG_TDO_R 2 DY 1
18,19,23,40 PCH_SMBDATA_MEM PCH_JTAG_TDO 24
53 54 PCH_JTAG_RST#_R R5834 2 DY 1 0R2J-2-GP
18,19,23,40 PCH_SMBCLK_MEM PCH_JTAG_RST# 24
55 56 PCH_JTAG_TDI_R R5835 2 DY 1 0R2J-2-GP
PCH_JTAG_TDI 24 <Core Design>
24 PCH_JTAG_TCK 1 DY 2 PCH_JTAG_TCK_R 57 58 PCH_JTAG_TMS_R R5836 2 DY 1 0R2J-2-GP
R5837 0R2J-2-GP R5838 0R2J-2-GP PCH_JTAG_TMS 24
59 60
63
64 Wistron Corporation
NP2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PAD-60P-GP Title
-1.10/0308 Reserve
ZZ.00PAD.Q81 Size Document Number Rev
C
5 4 3 2 1
5 4 3 2 1
SSID = SATA SATA ODD Connector
ODD1
SATA_RX- and SATA_RX+ Trace 13
S1
Length match within 20 mil
24 SATA_PTX_ORX1+ S2
24 SATA_PTX_ORX1- S3
S4
D 24 SATA_PRX_OTX1- C5902 2 1 SCD01U50V2KX-1GP SATA_PRX_OTX1-_C S5 D
24 SATA_PRX_OTX1+ C5903 2 1 SCD01U50V2KX-1GP SATA_PRX_OTX1+_C S6
S7
+5V_MOD
37 ODD_DET# P1
P2
P3
1
P4
C5904 C5905 P5
SC10U6D3V5KX-1GP SCD1U10V2KX-4GP P6
2
14
SKT-SATA7P+6P-85-GP
62.10065.B01
C C
SSID = SATA SATA HDD Connector Place near HDD CONN

SATA HDD Interface comment +3.3V_RUN +5V_RUN
HDD1
23
******************************
NP1 --- GND
1 RX+
1
C5906 C5907 C5908 C5909
24 SATA_PTX_HRX0+ 2 RX- DY DY
B B
3 --- GND
SCD1U10V2KX-4GP
24 SATA_PTX_HRX0-
SC10U6D3V5KX-1GP
2
2
4
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
C5901 2 1 SCD01U50V2KX-1GP SATA_PRX_HTX0-_C 5
TX-
24 SATA_PRX_HTX0-
24 SATA_PRX_HTX0+ C5910 2 1 SCD01U50V2KX-1GP SATA_PRX_HTX0+_C 6 TX+
7 --- GND
******************************
+3.3V_RUN 8 ------------ 3.3V
9
10
------------ 3.3V
11 ------------ 3.3V
HDD_DET# 12
24 HDD_DET# --- GND
13
14 --- GND / Dell Detected Pin
15 --- GND
+5V_RUN 16
17
------------ 5V
40 FFS_INT2
FFS_INT2 18 ------------ 5V
19 ------------ 5V
20
09/0603 21 --- GND
22 Staggered spinup/activity (in supporting drives)
NP2
24 --- GND
------------ 12V
SKT-SATA22P-20-GP
------------ 12V
62.10065.261 ------------ 12V
A ****************************** <Core Design> A
FFS_INT2 Main:62.10065.261
#1) It is active High when Free Fall is detected, 2nd:62.10065.511
allowing Pin.11 to be pulled high. Wistron Corporation
Pin.11 driven low on power up and then Taipei Hsien 221, Taiwan, R.O.C.
held low unless free fall.
Title
HDD / ODD Connector

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO SSID = AUDIO
D D
AUD_VREFOUT_B
30 AUD_VREFOUT_B SPEAKER
1
C6002
1
DY SC1U10V2KX-1GP
MIC IN
R6002
R6003
4K7R2J-2-GP
4K7R2J-2-GP
2
AUD_MIC_SW ITCH SPK1
30 AUD_MIC_SW ITCH
7
AFTP6002 1 1
2
MIC1
1 AUD_SPK_L+ 2
30 AUD_SPK_L+
MIC_IN_L_2 1 2 MIC_IN_L_C 2 AUD_SPK_L- 3
30 MIC_IN_L_2 30 AUD_SPK_L-
EL6002 6 AUD_SPK_R+ 4
30 AUD_SPK_R+
MIC_IN_R_2 1 2 MIC_IN_R_C 3 AUD_SPK_R- 5
30 MIC_IN_R_2 30 AUD_SPK_R-
EL6003 BLM18BD601SN1D-GP 4 6
EC6002 EC6003 5 8
1
600ohm 100MHz
EC6009
EC6006
EC6007
EC6008
7
SC470P50V2JN-GP
SC470P50V2JN-GP
SC270P50V2JN-2GP
SC270P50V2JN-2GP
SC270P50V2JN-2GP
SC270P50V2JN-2GP
8 MLX-CON6-10-GP-U
200mA 0.5ohm DC
1
NP1 SPEAKER_DET#
2
25 SPEAKER_DET#
NP2 DY DY DY DY
2
AUDIO-JK128-GP
20.F0693.006
22.10088.F61
Main:20.F0693.006
2nd:20.F0711.006
C C
AFTP6003 1 AUD_SPK_L+
AFTP6004 1 AUD_SPK_L-
AFTP6005 1 AUD_SPK_R+
AFTP6001 1 AUD_SPK_R-
AFTP6006 1 SPEAKER_DET#
SSID = AUDIO
Earphone
B B
AUD_HP_NB_SENSE
30,38 AUD_HP_NB_SENSE
LOUT1
1
AUD_HP_JACK_L_2 1 2 AUD_HP_JACK_L_1 2
30 AUD_HP_JACK_L_2
EL6004 6
AUD_HP_JACK_R_2 1 2 AUD_HP_JACK_R_1 3
30 AUD_HP_JACK_R_2
EL6001 BLM18BD601SN1D-GP 4
5
600ohm 100MHz 7
EC6004
EC6005
8
SC270P50V2JN-2GP
SC270P50V2JN-2GP
200mA 0.5ohm DC NP1

1
C6001 C6003 NP2
SC1000P50V3JN-GP-U SC1000P50V3JN-GP-U
2
AUDIO-JK128-GP
22.10088.F61
A <Core Design> A
Wistron Corporation
Title
Audio Jack / Speaker Connector

A3
5 4 3 2 1
5 4 3 2 1
SSID = LOM
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
LAN
C -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Flash.ROM
09/0416, Pin.2
From Intel checklist, 09/0416, Pin.6
SPI_CS0#/CS1# Intel checklist
No series resistor required No series resistor required if routing length is 1.5"-6.5"
if routing length is 1.5"-6.5" (with 1 or 2 SPI device)
D (with 1 or 2 SPI device) D
+3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN
1
R6202 R6203 R6204 R6205
3K3R2J-3-GP DY 0R2J-2-GP 0R0402-PAD-2-GP DY 0R2J-2-GP
2
1
1
C6202 DY C6201
1
SCD1U10V2KX-4GP SC10U6D3V5MX-3GP
2
R6206
U6201 3K3R2J-3-GP
1 2 PCH_SPI_CS0#_R 1 8 SPI_VCC
24 PCH_SPI_CS0#
2
R6207 0R0402-PAD-2-GP PCH_SPI_DIN CS# VCC SPI_HOLD# RN6201
24 PCH_SPI_DIN 2 DO/IO1 HOLD#/IO3 7
SPI_W P#_SEL_R 3 6 SPI_CLK_R 1 4 PCH_SPI_CLK
WP#/IO2 CLK PCH_SPI_CLK 24
4 5 SPI_DO_R 2 3 PCH_SPI_DO
GND DI/IO0 PCH_SPI_DO 24
SRN33J-5-GP-U
C SPI_W P#_SEL 1 2 SPI_W P#_SEL_R W 25Q16BVSSIG-GP C
38 SPI_W P#_SEL
R6210 0R0402-PAD-2-GP
+3.3V_ALW _PCH +3.3V_RUN +3.3V_ALW _PCH +3.3V_RUN
1
R6211 R6212 R6213 R6201
3K3R2J-3-GP DY 0R2J-2-GP 0R0402-PAD-2-GP DY 0R2J-2-GP
2
1 2 SPI_W P#_SEL_R2
1
R6214 0R0402-PAD-2-GP
C6203 DY C6204
1
SCD1U10V2KX-4GP SC10U6D3V5MX-3GP
2
R6215
U6202 3K3R2J-3-GP
1 2 PCH_SPI_CS1#_R 1 8 SPI_VCC2
24 PCH_SPI_CS1#
2
R6216 0R0402-PAD-2-GP PCH_SPI_DIN CS# VCC SPI_HOLD#2
2 DO HOLD# 7
B SPI_W P#_SEL_R2 SPI_CLK_R B
3 WP# CLK 6
4 5 SPI_DO_R
VSS DI
W 25Q32BVSSIG-1-GP
#1 source: 72.25Q16.001 (2MB, Winbond)

-1.10/0305 #2 source: 72.25165.B01 (2MB, MXIC)
#3 source: 72.02516.A01 (2MB, Numonyx)
#1 source: 72.25Q32.A01 (4MB, Winbond)

#2 source: 72.25325.A01 (4MB, MXIC)
#3 source: 72.25P32.B01 (4MB, Numonyx)
#1 source: 72.25Q64.001 (8MB, Winbond)

A #2 source: 72.25644.001 (8MB, MXIC) <Core Design> A
Wistron Corporation
Title
Flash / EEPROM
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = USB
1 2 USB Power
G6302 GAP-CLOSE-PWR-2U-GP
D 1 2 USB_OC#0_1 21 D
G6303 GAP-CLOSE-PWR-2U-GP U6301
+5V_ALW 1 2 +5V_USB0
G6301 GAP-CLOSE-PWR-2U-GP 1 8 100 mil
USB_5V_IN GND OC1#
1 2 2 7
G6304 GAP-CLOSE-PWR-2U-GP IN OUT1
3 6
EN1# OUT2
4 5
1
EN2# OC2# C6301 C6303 C6304 TC6301
C6302 DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ST150U6D3VDML3GP
SC4D7U10V5ZY-3GP
SC1U6D3V2KX-GP TPS2062AD-GP
2
(1A / Port)
38,76 USB_SIDE_EN#
C C
Dual USB Connector
+5V_USB0 +5V_USB0
USB1
11
9
EL6302 1 5 EL6301
1 4 1 4
21 USBP0- USB_0-_R 2 6 USB_01-_R USBP1- 21
21 USBP0+ USB_0+_R 3 7 USB_01+_R USBP1+ 21
2 3 4 8 2 3
10
ACM2012-900-2P-T-GP 12 ACM2012-900-2P-T-GP
SKT-USB-375-GP
22.10321.751
Main source: 22.10321.751
Second source: 22.10321.F61
B B
S OE# Function
X H Disconnect
L L D=1D
H L D=2D
ED6301
+5V_USB0
USB_01-_R 1 6 USB_01+_R
ESD I/O1 ESD I/O4
2 5
USB_0-_R GND VP USB_0+_R
3 4
ESD I/O2 ESD I/O3
IP4220CZ6-GP
A A
<Core Design>
Wistron Corporation
09/0429 Title

USB Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
JMINI Pin Debug Pin Name EC Pin

16 HOST_DEBUG_TX 70
-1.10/0318
17 HOST_DEBUG_RX 71
19 8051_TX 82
R6413
D 0R3J-0-U-GP D
42 8051_RX 81
1 2 USBP4-_R
DEBUG PINS 21 USBP4-
21 USBP4+ 1 2 USBP4+_R
R6416
0R3J-0-U-GP
Close WLAN1
WLAN1
53
NP1
+3.3V_RUN PCIE_WAKE# 1 2
R6402 35,38,72 PCIE_WAKE# +3.3V_WLAN
0R0402-PAD-2-GP
2 DY 1 1 R6420 2 COEX2_WLAN_ACTIVE_R 3 4
73 COEX2_WLAN_ACTIVE
73 COEX1_BT_ACTIVE 1 R6421 2 COEX1_BT_ACTIVE_R 5 6 +1.5V_RUN_CPU
10KR2J-3-GP 0R0402-PAD-2-GP MINI1CLK_REQ# 7 8
23,58 MINI1CLK_REQ# 9 10
CLK_PCIE_MINI1# 11 12
23 CLK_PCIE_MINI1#
CLK_PCIE_MINI1 13 14
23 CLK_PCIE_MINI1
15 16 HOST_DEBUG_TX
HOST_DEBUG_TX 37
HOST_DEBUG_RX 17 18
37,70 HOST_DEBUG_RX MS_CLK_1 WLAN_RADIO_OFF#
37,70 MSCLK 1 2 19 20 A K WLAN_RADIO_DIS# 38
R6411 DY 0R2J-2-GP 21 22 WLAN_PCIE_RST# SDMK0340L-7-F-GP D6401
23 PCIE_PRX_WLANTX_N2
23 24 +3.3V_WLAN 1 2 PLTRST4# 21,35,76
C 25 26 0R0402-PAD-2-GP R6401 C
23 PCIE_PRX_WLANTX_P2
27 28 +1.5V_RUN_CPU
29 30
23 PCIE_PTX_WLANRX_N2_C 31 32
23 PCIE_PTX_WLANRX_P2_C 33 34 WIMAX_LED# 66
35 36 USBP4-_R
PCIE_MCARD1_DET# 37 38 USBP4+_R
25 PCIE_MCARD1_DET# USB_MCARD1_DET#
39 40
1 DY 0R2J-2-GP
2 +3.3V_WLAN 41 42 WIMAX_LED# 2 DY 1 MSDATA 37,70
25 USB_MCARD1_DET# R6412 LED_WLAN_OUT# 0R2J-2-GP R6414
43 44
1
+5V_RUN 1 2 +5V_DBG_RUN 45 46
G6401 GAP-OPEN-PWR 47 48 +1.5V_RUN_CPU R6415
Debug Only. 49 50 0R2J-2-GP DY
+3.3V_ALW 1 2 +3.3V_DBG_ALW 51 52 +3.3V_WLAN
G6402 GAP-OPEN-PWR NP2
2
54 LED_WLAN_OUT# 66
SKT-MINI52P-8-GP-U
62.10043.391
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN_CPU

1
C6402 C6403 C6401 C6404 C6405 C6406 C6407 C6408

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD047U10V2KX-2GP
SCD047U10V2KX-2GP
SCD047U10V2KX-2GP
SCD047U10V2KX-2GP
SC4D7U6D3V3KX-GP
B +15V_ALW B
2
4
3
SRN100KJ-6-GP
RN6402
+3.3V_ALW +3.3V_WLAN
U6401
1
2
SI3456DDV-T1-GE3-GP
3.3V_WLAN_ENABLE#
1 D D 6
1
2 D D 5
R6417 3.3V_WLAN_ENABLE 3 G S 4
200KR2J-L1-GP
6
1
2
U6402 C6410
DMN66D0LDW-7-GP SC4700P50V2KX-1GP
2
Wireless Switch
1
WLAN SW (Top View)

-1.10/0317 -1.10/0302
SW1
OFF ON 1
NP1
A 38 AUX_EN_WOWL
A
A A
38 WIRELESS_ON#/OFF 1 2 WIRELESS_ON#/OFF_R B <Core Design>
COM
R6418 0R0402-PAD-2-GP R6419

B
1 C 100KR2J-1-GP
1
C6409
SC1U10V2KX-1GP AFTP6402
NP2
2 Wistron Corporation
2

2
SW-SLIDE7-2-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
62.40018.601 -1.10/0302 WLAN / Serial Out Connector
1 WIRELESS_ON#/OFF_R Size Document Number Rev
AFTP6401 Custom
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
PCH1 BTB1 BTB2
WWAN SIM
D D
CONN SKT
Page.76 IO Board Side
MB Board Side
+15V_ALW
4
3
SRN100KJ-6-GP
RN6501
C C
+3.3V_ALW
1
2
+3.3V_RUN_W W AN
3.3V_W W AN_ENABLE# U6501
1 D D 6
1
2 D D 5
R6501 3.3V_W W AN_ENABLE 3 G S 4
200KR2J-L1-GP
SI3456DDV-T1-GE3-GP
4
-1.10/0305
1
U6502 C6501
DMN66D0LDW -7-GP SC4700P50V2KX-1GP
+3.3V_RUN_W W AN
2
1
1
R6503
-1.10/0302 100R2J-2-GP
2
38 MCARD_W W AN_PW REN
W W AN_DIS
2
R6502
100KR2J-1-GP
D
1
B 3.3V_W W AN_ENABLE# B
G
-1.10/0302 2N7002A-7-GP
S
Q6501
A <Core Design> A
Wistron Corporation
Title

WWAN Rev
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = User.interface LED Location from left to right

(MB, Top View)
NUM CAPS SCRLK +3.3V_SUS
+5V_ALW
+5V_ALW
LED6603 LED6602 LED6601 BREATH POWER LED
SCRLK LED
G
Q6602 1 2
R2
Q6604 R6624 120R2J-2-GP BREATH_PW RLED_B 76
E R6603 R2
D 38 SCRL_LED# 2 1 SCRL_LED_R# B R1 LED6601 E R6604 D
R6602 20KR2J-L2-GP C SCRLK_LED 1 2LED_SCRLK_R A K S D BREATH_PW RLED_R# B 330R2J-3-GP
37,74 BREATH_LED# R1
C BREATH_PW RLED_R 2 1
DDTA143ECA-7-F-GP BREATH_PW RLED_P 54
LED-B-98-GP
680R2J-3-GP
1
+5V_ALW EC6602 DDTA143ECA-7-F-GP
CAPS LED DY Q6603
1
SCD1U10V2KX-4GP EC6601
Q6605 2N7002A-7-GP DY SCD1U10V2KX-4GP
2
R2
RN6603 E R6606
2
1 4 CAP_LED_R# B LED6602
38 CAP_LED# R1
2 3 C CAP_LED 1 2LED_CAP_R A K
38 NUM_LED#
SRN20KJ-GP-U DDTA143ECA-7-F-GP LED-B-98-GP
680R2J-3-GP
1
+5V_ALW EC6603
NUM LED DY SCD1U10V2KX-4GP
Q6606 +5V_RUN
2
R2
Q6607
NUM_LED_R# B R1
E R6608
LED6603
R2
E R6610 HDD LED
C NUM_LED 1 2LED_NUM_R A K 2 1 SATA_ACT_C# B 1KR2J-1-GP
24 SATA_ACT#_R R1
R6609 20KR2J-L2-GP C HDD_LED 2 1
DDTA143ECA-7-F-GP HDD_LED_B 77
LED-B-98-GP
680R2J-3-GP
1
EC6605 DDTA143ECA-7-F-GP
DY
1
SCD1U10V2KX-4GP EC6604
+3.3V_W LAN DY SCD1U10V2KX-4GP
2
WI-MAX LED
2
1
R6625
100KR2J-1-GP
DY
C C
2
64 W IMAX_LED#
D6602
1
+3.3V_RUN BAT54A-3-GP
WWAN LED
1
3
R6613
100KR2J-1-GP
DY
2
76 LED_W W AN_OUT#
+3.3V_W LAN
WLAN LED
1
R6614
+5V_RUN
DY100KR2J-1-GP Q6609
R2
D6601 E R6618
2
64 LED_W LAN_OUT# K A 2 1LED_W LAN_OUT_R# B R1

1KR2J-1-GP
R6617 20KR2J-L2-GP C LED_W AN_OUT_R 1 2
SDMK0340L-7-F-GP LED_W LAN_OUT_B 77
B DDTA143ECA-7-F-GP B
1
EC6608
DY SCD1U10V2KX-4GP
Bluetooth LED +5V_RUN
2
Q6608
R2
E R6612
BT_ACTIVE_K# 1 BT_ACT_K_R# 1KR2J-1-GP
Battery LED (Blue) 73 BT_ACTIVE_K# 2
R6611 20KR2J-L2-GP
B R1
C BT_LED_R 1 2 BT_LED_B 77
+5V_ALW 2 1 BAT2_LED_BLUE_B DDTA143ECA-7-F-GP
BAT2_LED_BLUE_B 77
1
R6601 1KR2J-1-GP EC6606
Q6610
R2
DY SCD1U10V2KX-4GP
RN6601 E
2
4 1 BAT2_LED_R# B
37 BAT2_LED# R1
3 2 C BAT2_LED 2 1 BAT2_LED_BLUE_P
37 BAT1_LED# BAT2_LED_BLUE_P 54
R6620 330R2J-3-GP
SRN10KJ-5-GP DDTA143ECA-7-F-GP
1
EC6609
DY SCD1U10V2KX-4GP
Battery LED (Amber)
2
+5V_ALW
Q6611
R2 RN6602
E
BAT1_LED_R# B 3 2 BAT1_LED_AMBER_B
R1
BAT1_LED BAT1_LED_AMBER_P BAT1_LED_AMBER_B 77
C 4 1 BAT1_LED_AMBER_P 54
A <Core Design> A
DDTA143ECA-7-F-GP
SRN1KJ-7-GP
1
EC6610
DY SCD1U10V2KX-4GP
Wistron Corporation
2

Title
LED
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = SmartCard
D D
-1.10/0317
-1.10/0319 Smartcard Socket

SmartCard
1
SC C6705 -1.10/0317
SC390P50V2KX-GP SC1SKT1
2
C 2 1 C
SC1 DY
SC_EG_D+ 34 4 3
34 SC_VCC 1 VCC RESERVED#4 4
220R2F-GP
2 SC 1
R6702
SC_C4 34
SMARTCARD-4P-GP-U
RESERVED#8 8 SC_EG_D- 34
1
-1.10/0319 SC1_VPP 6 VPP

1
C6701 C6702 R6707 21.H0136.011

SCD1U10V2KX-4GP
SC SC SC SC_RST#_R NP1 NP1

SC1U10V2KX-1GP
10KR2J-3-GP
34 SC_RST# 1 SC 2 2 SC NP2
2
R6703 1 RST NP2

34 SC_CLK SC 2 220R2F-GP SC_CLK_R 3
2
R6701 0R2J-2-GP SC_DET# CLK

SW SW
GND 5
34 SC_IO 1 SC 2 SC_IO_R 7 GND Belong to DIP, not SMT.
R6704 220R2F-GP I/O GND
R6705
1 SC 2
10KR2J-3-GP SMARTCARD-8P-1-GP
Pleace near SC1 CONN
1
SC C6704
SC22P50V2JN-4GP 62.10024.C11
2
-1.10/0319
+3.3V_RUN
1
R6706 DY
B 100KR2J-1-GP B
2
SC_DET# 1 SC1_VPP
34 SC_DET# TP6701
1
C6703
SC_RST#_R
SCD1U10V2KX-4GP
DY
2
1
SC C6706
SC270P50V2JN-2GP
2
-1.10/0318
A A
<Core Design>
Wistron Corporation
Title
Size
Smart Card Socket
Document Number Rev
Custom -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = Touch.Pad
D D
TouchPad Connector
TPAD1 Touch PAD Module Side
18
16 TP_DET#
38 TP_DET#
TP_DET# 16 15 GND
15 14 GND
14
BC_CLK_ECE1077 13 13 BC_CLK (ECE1077)
37 BC_CLK_ECE1077
37 BC_DAT_ECE1077
BC_DAT_ECE1077 12 12 BC_DAT (ECE1077)
C BC_INT#_ECE1077 11 C
37 BC_INT#_ECE1077
10
11 BC_INT# (ECE1077)
+3.3V_ALW
EC6801 EC6802 EC6803 9 10 3.3V_ALW
1
1
CLK_TP_SIO_1 8 09 3.3V_RUN (Internal NC)
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
+3.3V_ALW DAT_TP_SIO_1
DY DY DY 7
08 PS2_CLK
6
2
2
+5V_ALW 5 07 PS2_DATA
4 06 5V_RUN (Backlight, No Use)
3
2
1
2 05 5V_ALW
RN6801
04 PWM (Backlight, No Use)
AFTP6802 1 1
SRN4K7J-8-GP 17 03 GND (Backlight, No Use)
02 GND
01 Diag_loop
3
4
ERN6801
1 4 MLX-CON16-10-GP
37 DAT_TP_SIO
37 CLK_TP_SIO 2 3
SRN100J-3-GP 20.K0227.016
1
EL6801 EL6802
DY DY
MLVG0402220NV09BP-GP
MLVG0402220NV09BP-GP
2
B B
AFTP6801 1 BC_DAT_ECE1077
AFTP6803 1 BC_CLK_ECE1077
AFTP6804 1 BC_INT#_ECE1077
AFTP6805 1 +3.3V_ALW
AFTP6806 1 CLK_TP_SIO_1
AFTP6807 1 DAT_TP_SIO_1
AFTP6808 1 +5V_ALW
AFTP6809 1 TP_DET#
+3.3V_ALW
CLK_TP_SIO_1
4
ED6801
PRTR5V0U2X-GP
DY
A <Core Design> A
Wistron Corporation
1

DAT_TP_SIO_1 Taipei Hsien 221, Taiwan, R.O.C.
Title
Touch Pad Connector

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = User.interface
D D
+3.3V_ALW +3.3V_ALW
Hall Sensor
C C
1
R6902 C6902
100KR2J-1-GP SCD1U10V2KX-4GP
U6901
2
AFTP6901 1 1
2
VDD
VSS 2 1 AFTP6903
38 LID_CL_SIO# 1 2 LID_CL_SIO#_R 3 OUTPUT

R6901 0R0402-PAD-2-GP
EM-6781-T30-GP
1
C6901 74.06781.07B
SCD047U10V2KX-2GP
2
1st : AKE 74.06781.07B
2nd : Allegro 75.03212.060
AFTP6902 1 LID_CL_SIO#_R
B B
A <Core Design> A
Wistron Corporation
Title
Hall Sensor
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
LPC Debug port

+3.3V_RUN
LDBG1
1
2 LPC_LAD0
LPC_LAD0 24,35,36,37,38
3 LPC_LAD1
LPC_LAD1 24,35,36,37,38
4 LPC_LAD2
LPC_LAD2 24,35,36,37,38
5 LPC_LAD3
LPC_LAD3 24,35,36,37,38
6 LPC_LFRAME#
LPC_LFRAME# 24,35,36,37,38
DY 7 R7008
2 DY 1
0R2J-2-GP
PLTRST3# 21,37,38
8
9 CLK_PCI_TPM_C 2 DY 1 CLK_PCI_TPM 23,35
10 R7002 0R2J-2-GP
11
12
MLX-CON10-7-GP
20.D0183.110
C JTAG Debug port C
+3.3V_ALW +3.3V_ALW
-1.10/0310
1
2
3
4
R7001 RN7001
49D9R2F-GP DY SRN10KJ-6-GP
2
JTAG1
8
7
6
5
7
1 JTAG_PU
2 JTAG_TDI
JTAG_TDI 37
DY 3 JTAG_TMS
JTAG_TMS 37
4 JTAG_CLK
JTAG_CLK 37
5 JTAG_TDO
JTAG_TDO 37
6
8
MLX-CON6-9-GP
20.D0198.106
B B
+3.3V_ALW
JDBG2
7
5
4 MSDATA
MSDATA 37,64
DY 3 MSCLK
MSCLK 37,64
2 HOST_DEBUG_RX
HOST_DEBUG_RX 37,64
1
6
MLX-CON5-10-GP-U
A 20.D0198.105 <Core Design> A
Wistron Corporation
Title
JTAG Debug
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = 1394
SDMSXD_VCC
R7104
Flash Reader Socket
D D
0R0603-PAD-2-GP
CARD1
1 2 SD_VCC SD_VCC 4 10
VDD COMMON GROUND SWITCH SD_MMC_CD#
CARD DETECT SWITCH 11 SD_MMC_CD# 32
SD_MMC_DAT0 7 12 SDW P
SCD1U10V2KX-4GP
32 SD_MMC_DAT0 DAT0 WRITE PROTECT SWITCH SDW P 32
1
SD_MMC_DAT3 1 13
SC10U6D3V3MX-GP
32 SD_MMC_DAT3 CD/DAT3 GROUND SWITCH
1
C7102 C7103 R7105 SD_MMC_DAT1 8
32 SD_MMC_DAT1 DATE1
DY 32 SD_MMC_DAT2 SD_MMC_DAT2 9
SD_MMC_CMD DATE2
150KR2J-GP
32 SD_MMC_CMD 2 3
2
SD_MMC_CLK CMD VSS
32 SD_MMC_CLK 5 6
2
CLK VSS
NP1 NP1 GND 14
NP2 NP2 GND 15
Place near CARD1 SKT-SDCARD-16-GP-U

20.I0086.001
Main:20.I0086.001
C SDW P C
SD_MMC_CD#
SD_MMC_CLK
SD_MMC_CMD
SD_MMC_DAT0
SD_MMC_DAT1
SD_MMC_DAT2
SD_MMC_DAT3
EC7105
EC7106
EC7107
EC7108
EC7109
EC7110
EC7111
EC7112
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1
1
DY DY DY DY DY DY DY DY
2
For EMI
B SSID = 1394 B
Shield GND separately for pairs of

TPBIAS0
32 TPBIAS0 TPA+ & TPA- and TPB+ & TPB-
SCD33U10V3KX-3GP
SCD01U16V2KX-3GP
1
C7101
C7104
1
R7107 R7108
DY 56R2J-4-GP 56R2J-4-GP
1394 Connector
2
-1.10/0302
1394
TPA0P TPB0N 1 2 TPB0- 1

32 TPA0P TPB0-
TPA0N TPB0P R7106 1 2 0R3J-0-U-GP TPB0+ 2
32 TPA0N TPB0+
TPB0P TPA0N R7101 1 2 0R3J-0-U-GP TPA0- 3
32 TPB0P TPA0-
TPB0N TPA0P R7109 1 2 0R3J-0-U-GP TPA0+ 4
32 TPB0N TPA0+
R7113 0R3J-0-U-GP 5 GND
1
6 GND
1
R7110 R7111
56R2J-4-GP 56R2J-4-GP SKT-1394-4P-26-GP-U1
2
A <Core Design> 22.10218.T41 A

2
TPB_EMI
1
Wistron Corporation
1
C7105 R7112
SC270P50V2JN-2GP 5K11R2F-L1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
Title
Close to U3201
1394 Connector / Flash Socket
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = CARDBUS
Cardbus Connector Cardbus Socket
CBS_CCD1# CBS_CCD2# PCMCIA1
CBS_CAD[0..31] 32 3
1
SC270P50V2JN-2GP
SC270P50V2JN-2GP
DY
1
69
70
71
72
73
74
75
76
77
2
CBUS1
C7202
C7203
PCC PCC 4
35 1
69
70
71
72
73
74
75
76
77
2
2 35 1
D CBS_CCD1# 36 2 CBS_CAD0 D
32 CBS_CCD1# CBS_CAD2 36 2 CBS_CAD1 CARDBUS-SKT104-GP-U
37 37 3 3
CBS_CAD4 38 4 CBS_CAD3 21.H0164.001
CBS_CAD6 38 4 CBS_CAD5
39 39 PCC 5 5
Close to Socket 32 CBS_DATA14
CBS_DATA14 40 40 6 6 CBS_CAD7
CBS_CAD8 41 41 7 7 CBS_CC/BE0#
CBS_CC/BE0# 32 Belong to DIP, not SMT.
CBS_CVS1 42 8 CBS_CAD11
32 CBS_CVS1 43 43 9 9
CBS_CAD13, CBS_CAD15 Can be used CBS_CAD13 44 44 10 10 CBS_CAD12
as Express Card USB differential pair. CBS_CAD16 46
45 11
12 CBS_CC/BE1#
46 12 CBS_CC/BE1# 32
CBS_DATA18 47 13 CBS_CPAR
32 CBS_DATA18 47 13 CBS_CPAR 32
CBS_CBLOCK# 48 14 CBS_CPERR#
32 CBS_CBLOCK# 48 14 CBS_CPERR# 32 +5V_RUN
CBS_CSTOP# 49 15 CBS_CGNT#
32 CBS_CSTOP# 49 15 CBS_CGNT# 32
CBS_CDEVSEL# 50 16 CBS_CINT#
32 CBS_CDEVSEL# 50 16 CBS_CINT# 32
+CBS_VCC 51 51 17 17 +CBS_VCC
52 18
SC1U6D3V2KX-GP
+CBS_VPP 52 18 +CBS_VPP
1
CBS_CTRDY# 53 19 CBS_CCLK C7207
32 CBS_CTRDY# 53 19 CBS_CCLK 32
CBS_CFRAME# 54 20 CBS_CIRDY# PCC
32 CBS_CFRAME# 54 20 CBS_CIRDY# 32
CBS_CAD17 55 21 CBS_CC/BE2#
CBS_CC/BE2# 32
2
CBS_CAD19 55 21 CBS_CAD18 +3.3V_RUN
56 56 22 22
CBS_CVS2 57 23 CBS_CAD20
32 CBS_CVS2 57 23
CBS_CRST# 58 24 CBS_CAD21 U7201
32 CBS_CRST# 58 24
CBS_CSERR# 59 25 CBS_CAD22 PCC
32 CBS_CSERR# 59 25
1
CBS_CREQ# 60 26 CBS_CAD23 VPPEN0 3 15 C7208
32 CBS_CREQ# 60 26 32 VPPEN0 EN0 VCC5_IN
CBS_CC/BE3# 61 27 CBS_CAD24 VPPEN1 4 13 PCC SC1U6D3V2KX-GP
32 CBS_CC/BE3# 61 27 32 VPPEN1 EN1 VCC5_IN
CBS_CAUDIO 62 28 CBS_CAD25
32 CBS_CAUDIO
2
+CBS_VCC +CBS_VPP CBS_CSTSCHNG 63 62 28 CBS_CAD26 +CBS_VCC
32 CBS_CSTSCHNG 63 29 29 6 NC#6 VCC3_IN 11
CBS_CAD28 64 30 CBS_CAD27 7
C CBS_CAD30 64 30 CBS_CAD29 NC#7 C
65 65 31 31 10 NC#10 VCC_OUT 14
CBS_CAD31 66 32 CBS_DATA2 12
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC10U6D3V5KX-1GP
66 32 CBS_DATA2 32 VCC_OUT
1
1
C7206 CBS_CCD2# CBS_CCLKRUN# +CBS_VPP C7210
C7205
67 33 5 9
SC10U6D3V5KX-1GP
CBS_CCLKRUN# 32
NP1
NP2
SCD1U10V2KX-4GP 32 CBS_CCD2# 67 33 FLG VCC_OUT C7209
C7204
C7201
PCC PCC PCC PCC 68 34 PCC PCC
78
79
80
81
82
83
84
68 34 SCD01U16V2KX-3GP
8
2
2
FOX-CONN84-GP VPP_OUT
2
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
78
79
80
81
82
83
84
NP1
NP2
VCC3_EN
62.10024.981 16 GND VCC5_EN 1
1
C7211
C7212
PCC PCC R5531V002-GP VCC3EN#
VCC3EN# 32
2
VCC5EN#
VCC5EN# 32
Close to Socket Close to Socket
+CBS_VCC Short Current Limit, 1400mA
+CBS_VPP Short Current Limit, 300mA
-1.10/0303
SSID = ExpressCard +3.3V_ALW +1.5V_RUN_CPU +3.3V_RUN +3.3V_RUN +3.3V_ALW
RN7201 +1.5V_RUN_CPU
1 DY 4 CPUSB# U7202
2 3 CPPE#
NewCard Connector SRN100KJ-6-GP
2 3_3VIN EXP NC#4 4
+3.3V_CARD 3 3_3VOUT NC#5 5 +3.3V_CARD
13
NewCard Socket 12 1_5VIN
NC#13
NC#14 14
+1.5V_CARD
+1.5V_CARD 11 1_5VOUT NC#16 16

B B
NEW 1 R7207 1 DY 2 0R2J-2-GP 15 +3.3V_CARDAUX
38 EXPRCRD_STDBY# AUXOUT
NEW 1SKT1 1 2 R7206 EXPRCRD_STDBY#_R 1 17
38,42,51,86 RUN_ON STBY# AUXIN
1 DY 2 28 1 2 0R0402-PAD-2-GP EXPRCRD_RST# 6
21,32,34,58 PLTRST2# SYSRST#
26 R7201 0R0402-PAD-2-GP PERST# 8 18
PERST# RCLKEN
1
CARD-PUSH-2P-4-GP-U 25 R7208 1 DY 2 0R2J-2-GP CPUSB# 9
PCIE_PTX_EXPRX_P4_C 23 CPUSB#
24 C7226 DY 1 2 CPPE# 10
PCIE_PTX_EXPRX_N4_C 23 +3.3V_RUN CPPE#
21.I0036.001 23 SC22P50V2JN-4GP R7209 0R0402-PAD-2-GP 19 7
2
OC# GND
22 PCIE_PRX_EXPTX_P4 23 1 DY 20R2J-2-GP EXPRCRD_SHDN# 20 SHDN# GND 21
1
Belong to DIP, not SMT. 21 PCIE_PRX_EXPTX_N4 23

R7210
20 38 EXPRCRD_PW REN#
19 DY R7211 TPS2231MRGPR-GP
CLK_PCIE_EXP 23
18 10KR2J-3-GP EXPRCRD_CPPE#
CLK_PCIE_EXP# 23
17 EXPRCRD_CPPE#
2
+3.3V_CARD 16 EXPCLK_REQ# 23 +3.3V_CARD 22,38,50 SIO_SLP_S4#

15
EXP 14
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
13 PERST# +3.3V_CARDAUX +3.3V_ALW +1.5V_RUN_CPU +3.3V_RUN

1
+1.5V_CARD Max. 650mA, Average 500mA.

C7223
C7222
12
SC4D7U6D3V5KX-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
R7204 11 PCIE_W AKE#

2K2R2J-2-GP PCIE_W AKE# 35,38,64 +1.5V_CARD +3.3V_CARD Max. 1300mA, Average 1000mA
C7215
C7216
EXP DY DY 10
1
9 C7213 C7214 +3.3V_CARDAUX Max. 275mA
2
8 CARD_SMBDAT 37 EXP DY EXP EXP

2
7 CARD_SMBCLK 37
2
2
6
5
4 CPUSB# RN7202
3 USBP12+_R 2 3 USBP12+ 21,32,34
+1.5V_CARD USBP12-_R
A 2 1 EXP 4 USBP12- 21,32,34 +3.3V_CARDAUX +1.5V_CARD +3.3V_CARD <Core Design> A
1 SRN0J-6-GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
27
Wistron Corporation
1
C7225
C7224
C7219
C7218
C7221
C7220
1
1
R7205 EXPRESSCARD-26P-14-GP C7217 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
EXP DY DY 2K2R2J-2-GP EXP EXP EXP EXP EXP Taipei Hsien 221, Taiwan, R.O.C.
2
2
Title
62.10081.321
2
Size
PCMCIA / ExpressCard
Document Number Rev
Place them near to NEW1 A3 -1
Place them near to U7202 Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
User.interface
Camera Connector
+CAMERA_VDD CCD1 +CAMERA_VDD
12
10
9
CAM_MIC_CBL_DET#
C7302
C7303
8
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
21 CAM_MIC_CBL_DET#
1
USBP11+_R 7
D USBP11-_R 6 D
5
2
4
30 AUD_DMIC_CLK_G 2 1 AUD_DMIC_CLK_G_C 3
30 AUD_DMIC_IN0 R7304 2 1 0R2J-2-GP AUD_DMIC_IN0_C 2
R7305 33R2J-2-GP
1
11
+3.3V_RUN +CAMERA_VDD
Close to connector
FOX-CON10-GP-U
1 2
R7306 0R0603-PAD-2-GP
20.F0711.010
21 USBP11+ USBP11+_R
4
EL7301
DLW 21HN900SQ2LGP-U
C C
1 +CAMERA_VDD
AFTP7301
AFTP7302 1 USBP11-_R
1
1 USBP11+_R
AFTP7303
1 CAM_MIC_CBL_DET#
AFTP7304
21 USBP11- USBP11-_R 1 AUD_DMIC_CLK_G_C
AFTP7305
1 AUD_DMIC_IN0_C
AFTP7306
User.interface MB BT CONN BT Module CONN

PIN Define PIN Define
Bluetooth Connector
1 GND 1 GND
BT1
1
12 2 USBP5+_R 12 USB_DP
+3.3V_RUN
21 USBP5+ 2
3
3 USBP5-_R 11 USB_DN
B 21 USBP5- B
4
C7301
C7304
5 GND GND
SCD1U10V2KX-4GP
4 10
SC2D2U6D3V3KX-GP
21 BT_DET#
1
BT_RADIO_DIS# 6
38 BT_RADIO_DIS#
64 COEX1_BT_ACTIVE 7
1
C7305
64 COEX2_W LAN_ACTIVE 8 5 BT_DET# 2 MOD_DET
2
SC100P50V2JN-3GP DY BT_LED 9
+3.3V_RUN 10
2
11 6 BT_RADIO_DIS# 7 RADIO_DIS
JST-CON10-12-GP
Close to CONN Pin.4

21.D0214.110 7 COEX1_BT_ACTIVE 3 COEX1_BT_ACTIVE
+5V_RUN 8 COEX2_WLAN_ACTIVE 8 COEX2_WLAN_ACT

9 BT_LED 6 LINK_IND
1
R7310
100KR2J-1-GPDY
1 +3.3V_RUN 10 +3.3V_RUN 9 3.3V
AFTP7307
1 COEX1_BT_ACTIVE
AFTP7308
2
1 COEX2_W LAN_ACTIVE
AFTP7309 BT_ACTIVE_K# 66
1 USBP5+
AFTP7310
1 USBP5-
AFTP7311
1 BT_RADIO_DIS#
D
AFTP7312
1 BT_LED
AFTP7313
1 BT_DET#
AFTP7314
A <Core Design> A
1 R7302 2BT_LED_C G Q7303
0R0402-PAD-2-GP 2N7002A-7-GP
Wistron Corporation
S

Title
Size
Bluetooth / Camera / DMIC
Document Number Rev
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
+DOCK_PWR_BAR
SSID = Docking DK1
145 Clost to DK1
1
C7402
153 160 Dock SCD1U50V3KX-GP
D7401
2
147 +DOCK_PWR_BAR DPC_DOCK_AUX_SW 10 DYTMDS_D2+ 1 DPC_DOCK_AUX_SW
DPC_DOCK_AUX_SW# NC#10 DPC_DOCK_AUX_SW#
9 2
TMDS_D2- NC#2
+DOCK_PWR_BAR 148 146 8 3 +5V_RUN
DPC_DOCK_CA_DET TMDS_GND TMDS_VDD DPC_DOCK_CA_DET
7 4
DPC_DOCK_HPD NC#7 TMDS_D1+ DPC_DOCK_HPD
1 2 6 5
DOCK_AC_OFF 44 TMDS_D1- NC#5
161
3 4 IP4280CZ10-GP
35 DOCK_LOM_SPD10LED_GRN# DPB_DOCK_CA_DET DPC_DOCK_CA_DET DOCK_LOM_SPD100LED_ORG# 35
5 6
7 8
NP1 D7402
Dock
1 2 C7403 SCD1U10V2KX-4GP DPB_LANE_0P_GPU_R 9 10 DPC_LANE_0P_GPU_R Dock
1 2 C7404 SCD1U10V2KX-4GP DPB_DOCK_AUX_SW 10 DYTMDS_D2+ 1 DPB_DOCK_AUX_SW
81 DPB_LANE_0P_GPU C7405 SCD1U10V2KX-4GP DPB_LANE_0N_GPU_R DPC_LANE_0N_GPU_R C7406 SCD1U10V2KX-4GP DPC_LANE_0P_GPU 81 DPB_DOCK_AUX_SW# NC#10 DPB_DOCK_AUX_SW#
D
81 DPB_LANE_0N_GPU Dock
1 2 11 12 Dock
1 2
DPC_LANE_0N_GPU 81
9
TMDS_D2- NC#2
2 D
13 14 8 TMDS_GND TMDS_VDD 3 +5V_RUN
Dock
1 2 C7413 SCD1U10V2KX-4GP DPB_DOCK_CA_DET 7 4 DPB_DOCK_CA_DET
81 DPB_LANE_1P_GPU C7408 SCD1U10V2KX-4GP DPB_LANE_1N_GPU_R DPC_LANE_1N_GPU_R C7414 SCD1U10V2KX-4GP DPC_LANE_1P_GPU 81 DPB_DOCK_HPD NC#7 TMDS_D1+ DPB_DOCK_HPD
1 2 17 18 Dock
1 2 DPC_LANE_1N_GPU 81
6 TMDS_D1- NC#5 5
19 20
Dock
1 2 C7415 SCD1U10V2KX-4GP IP4280CZ10-GP
81 DPB_LANE_2P_GPU C7410 SCD1U10V2KX-4GP DPB_LANE_2N_GPU_R DPC_LANE_2N_GPU_R C7416 SCD1U10V2KX-4GP DPC_LANE_2P_GPU 81
1 2 23 24 Dock
1 2 DPC_LANE_2N_GPU 81
25 26
Dock
1 2 C7401 SCD1U10V2KX-4GP
81 DPB_LANE_3P_GPU C7412 SCD1U10V2KX-4GP DPB_LANE_3N_GPU_R DPC_LANE_3N_GPU_R C7417 SCD1U10V2KX-4GP DPC_LANE_3P_GPU 81
1 2 29 30 Dock
1 2 DPC_LANE_3N_GPU 81 DOCK_LOM_TRD0+
31 32
DPB_DOCK_AUX_SW 33 34 DPC_DOCK_AUX_SW DOCK_LOM_TRD0-
DPB_DOCK_AUX_SW# 35 36 DPC_DOCK_AUX_SW# DOCK_LOM_TRD1+
37 38 DOCK_LOM_TRD1-
DPB_DOCK_HPD 39 40 DPC_DOCK_HPD DOCK_LOM_TRD2+
81 DPB_DOCK_HPD DPC_DOCK_HPD 81
+NBDOCK_DC_IN_SS 41 42 DOCK_LOM_TRD2-
ACAV_DOCK_SRC# 44
43 44 DOCK_LOM_TRD3+
45 46 DOCK_LOM_TRD3-
75 BLUE_DOCK DAT_DDC2_DOCK 75
47 48 CLK_DDC2_DOCK 75
1
C7431
C7426
C7437
C7435
C7423
C7432
C7419
C7422
49 50
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
DY DY DY DY DY DY DY DY
2
154 159
162 Dock eSATA

51 52
53 54 SATA_PRX_DTX_5+_C SCD01U50V2KX-1GP 1Dock2 C7427 SATA_PRX_DTX_5+ 24
75 RED_DOCK
55 56 SATA_PRX_DTX_5-_C SCD01U50V2KX-1GP 1Dock2 C7424 SATA_PRX_DTX_5- 24
57 58
75 GREEN_DOCK 59 60 SATA_PTX_DRX_5+ 24
61 62 SATA_PTX_DRX_5- 24
63 Dock 64
55 HSYNC_DOCK 65 66 USBP8+ 21
55 VSYNC_DOCK 67 68 USBP8- 21 ----->Dock_1
69 70
37 CLK_MSE 71 72 USBP9+ 21
C 37 DAT_MSE 73 74 USBP9- 21 ----->Dock_2 C
75 76
75 DAI_BCLK# 77 78 CLK_KBD 37
75 DAI_LRCK# 79 80 DAT_KBD 37
81 82
75 DAI_DI
83 84
75 DAI_DO# 85 86
87 88
75 DAI_12MHZ# 89 90
91 92
93 94
155 158
163
95 96
38 D_LAD0 97 98
BREATH_LED# 37,66
38 D_LAD1 99 100
DOCK_LOM_ACTLED_YEL# 35
101 102
38 D_LAD2 103 104
DOCK_LOM_TRD0+ 35
38 D_LAD3 105 106
DOCK_LOM_TRD0- 35
107 108
38 D_LFRAME# 109 110
DOCK_LOM_TRD1+ 35
38 D_CLKRUN# 111 112 DOCK_LOM_TRD1- 35
113 114
38 D_SERIRQ 115 116 1DY 2
117 118 C7438 1DY 2SCD1U10V2KX-4GP
38 D_DLDRQ1#
119 120 C7421 SCD1U10V2KX-4GP
CLK_PCI_DOCK 121 122
21 CLK_PCI_DOCK DOCK_LOM_TRD2+ 35
123 124 DOCK_LOM_TRD2- 35
1
125 126 +RTC_CELL +3.3V_ALW

R7408 127 128
10R2F-L-GP 37 DOCK_SMB_CLK DOCK_LOM_TRD3+ 35
DY 37 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 35 From GPU to DOCK
2
131 132
2
133 134 R7410 R7412 DPB_DOCK_AUX 1Dock2DPB_DOCK_AUX_SW
37 DOCK_SMB_ALERT# DOCK_DCIN_IS+ 45 81 DPB_DOCK_AUX
1 2
135 136 DY 100KR2J-1-GP 100KR2J-1-GP C7443 SCD1U10V2KX-4GP

B 43 DOCK_PSID DOCK_DCIN_IS- 45 B
EC7401 137 138 Dock
DY SC4D7P50V2CN-1GP 139 140 DPB_DOCK_AUX# 1Dock2DPB_DOCK_AUX_SW#
37 DOCK_PWR_BTN# 81 DPB_DOCK_AUX#
1
DOCK_POR_RST# 37 C7440 SCD1U10V2KX-4GP
141 142 D7403
2
1
38 SLICE_BAT_PRES# 143 144 K Dock A DOCK_DET# 38,44,75
DPC_DOCK_AUX
NP2 81 DPC_DOCK_AUX 1Dock2DPC_DOCK_AUX_SW
164 SDMK0340L-7-F-GP C7444 SCD1U10V2KX-4GP
1
+DOCK_PWR_BAR 149 151 +DOCK_PWR_BAR
R7416 +3.3V_DELAY DPC_DOCK_AUX# 1Dock2DPC_DOCK_AUX_SW#
910KR2J-GP
DY 81 DPC_DOCK_AUX#
150 C7439 SCD1U10V2KX-4GP
2
C7420
1
D7404 156 157 Dock SCD1U50V3KX-GP
2
+3.3V_DELAY PESD24VS2UT-GP R7430
2
DY 152 Dock10KR2F-2-GP
1
JAE-CONN144D-3-GP-U
3
2
R7431
Dock10KR2F-2-GP DPC_DOCK_EN_DET#
20.F1572.144 D G S
2
SCD1U25V3KX-GP
DPC_DOCK_AUX_SW
DPB_DOCK_EN_DET#
4
+15V_ALW
C7442
1
D G S Q7408 +3.3V_DELAY
Dock
4
SCD1U25V3KX-GP
DPB_DOCK_AUX_SW DMN66D0LDW-7-GP Dock

Q7407
2
6
1
+15V_ALW
C7441
DMN66D0LDW-7-GP Dock RN7401
3
1
Q7401 +3.3V_DELAY R7432 DPC_DOCK_AUX_SW_R 1 4DPC_DOCK_AUX_SW

6
DMN66D0LDW-7-GP Dock Dock S G D 100KR2J-1-GP

Dock 2 Dock 3DPC_DOCK_AUX_SW#
3
Q7403
2
DMN66D0LDW-7-GP Dock RN7404 SRN10KJ-5-GP

1
4
R7428 DPB_DOCK_AUX_SW_R 1 4 DPB_DOCK_AUX_SW DPC_DOCK_AUX
S G D Dock100KR2J-1-GP 2 Dock 3 DPB_DOCK_AUX_SW# DPC_DOCK_CA_DET DPC_DOCK_EN_DET Q7405
1
Dock DMN66D0LDW-7-GP
R7433 DPC_DOCK_AUX_SW#
2
DPB_DOCK_AUX SRN10KJ-5-GP Dock 1MR2J-1-GP
3
DPB_DOCK_CA_DET DPB_DOCK_EN_DET Q7402
1
A Dock DMN66D0LDW-7-GP A
2
4
R7429 DPB_DOCK_AUX_SW#
Dock 1MR2J-1-GP Q7406 DPC_DOCK_AUX_SW#_R
1
DMN66D0LDW-7-GP Dock
<Core Design>
2
3
Q7404 DPB_DOCK_AUX_SW#_R
DMN66D0LDW-7-GP Dock DPC_DOCK_AUX#
Wistron Corporation
1
DPB_DOCK_AUX# Title

Fonseca 14.1" DIS Rev
Custom
5 4 3 2 1
5 4 3 2 1
SSID = DOCK CRT SWITCH SSID = DOCK AUDIO +3.3V_RUN Close to Pin.24 Close to Pin.18 Close to Pin.25
L7502
1 Dock 2 +3.3V_RUN_I2S_VDD
GPU_DAT_DDC +3.3V_RUN BLM18EG601SN1D-GP
81 GPU_DAT_DDC
DAT_DDC2_CRT C7502 C7503 C7504 C7505 C7506 C7507 C7508
55 DAT_DDC2_CRT
1
DAT_DDC2_DOCK
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
74 DAT_DDC2_DOCK
2
R7503
DY Dock Dock Dock Dock Dock Dock
2
Dock 100KR2J-1-GP
GPU_CLK_DDC
81 GPU_CLK_DDC
1
D 1 DY 33R2J-2-GP
2 DOCK_AUD_RST# D
CLK_DDC2_CRT 24,30 PCH_AZ_CODEC_RST# R7506
55 CLK_DDC2_CRT
1
CLK_DDC2_DOCK C7509
74 CLK_DDC2_DOCK
CRT_SW ITCH_VSYNC
DockSCD1U10V2KX-4GP
19
20
21
22
2
CRT_SW ITCH_VSYNC 55
1
U7501 U7502
SCL2
SCL1
SCL0
SDA2
SDA1
SDA0
CRT_VSYNC_GPU +3.3V_RUN_I2S_VDD 25 5 I2S_DO
CRT_VSYNC_GPU 81,83 AVDD DOUT
LEFT_LO 27 AUD_DOCK_MIC_IN_L_C 30
25 12 +3.3V_RUN 18 29
GND V1 L7501 +1.8V_RUN DRVDD RIGHT_LO AUD_DOCK_MIC_IN_R_C 30
10 7 CRT_SW ITCH_HSYNC 24
GND V0 CRT_SW ITCH_HSYNC 55 DRVDD
1 Dock 2
+3.3V_DELAY BLM18EG601SN1D-GP
MAX4885EETG-GP 32 DVDD NC#20 20
1
24 11 C7512 C7511 19
38 CRT_SW ITCH SEL H1 NC#19
23 6 CRT_HSYNC_GPU Dock DockSCD1U10V2KX-4GP +3.3V_RUN_IOVDD 7 22
EN H0 CRT_HSYNC_GPU 81,83 IOVDD NC#22
SC1U10V2KX-1GP 23
2
C7522 C7510 I2S_BCLK NC#23
2 28
SCD1U10V2KX-4GP
BCLK NC#28
1
17 9 I2S_DI# 4 11
SC1U10V2KX-1GP
74 BLUE_DOCK R2 VL +3.3V_DELAY CLK_12M_R DIN NC#11

DY 55 BLUE_CRT 18 R1 1 MCLK NC#13 13
3 8 Dock 14
2
R0 VCC AUD_DOCK_HP_OUT_L_C NC#14
5V_CRT_RUN
30 AUD_DOCK_HP_OUT_L_C 10 LINEL NC#16 16
AUD_DOCK_HP_OUT_R_C 12 15
30 AUD_DOCK_HP_OUT_R_C LINER NC#15
G2
G1
G0
30
B2
B1
B0 NC#30
1
DOCK_AUD_RST# 31
CRT_BLUE_GPU +5V_RUN C7514 RESET#
81 CRT_BLUE_GPU 17
15
16
4
13
14
5
SCD1U10V2KX-4GP AUD_DOCK_SMB_CLK AVSS

8 26
2
SCL AVSS
1 R7501 2
RED_DOCK 0R0603-PAD-2-GP AUD_DOCK_SMB_DAT 9 21
SCD1U10V2KX-4GP
74 RED_DOCK SDA DRVSS
1
C RED_CRT C7513 I2S_LRCLK 3 6 C
55 RED_CRT WCLK DVSS
2
GPAD 33
TLV320AIC3004IRHBR-GP
CRT_RED_GPU +3.3V_RUN
81 CRT_RED_GPU
OSC7501 +3.3V_RUN RN7501
GREEN_DOCK 3 2
74 GREEN_DOCK CRT_MUX_SWITCH CRT display
GREEN_CRT
4 Dock 1
MB 1
55 GREEN_CRT 0 VCONT
GND 2 SRN2K2J-1-GP U7505
CRT_GREEN_GPU DY 3 OSC_12MHZ AUD_DOCK_SMB_DAT 1 6
81 CRT_GREEN_GPU
1 Dock OUTPUT
4
AUD_DOCK_SMBDAT 37
VDD
2 Dock 5
1
C7517
OSC-12MHZ-1-GP DY 3 4
SCD1U10V2KX-4GP
2
DMN66D0LDW -7-GP
+3.3V_RUN AUD_DOCK_SMBCLK 37
AUD_DOCK_FD_LOOP1 AUD_DOCK_FD_LOOP2 AUD_DOCK_SMB_CLK
+VDDA Place this block
close to Audio Codec Pin14
1
C7518 C7519 R7521 OSC_12MHZ 1 DY 20R2J-2-GP

1
Dock Dock Dock R7522
10
SC1U6D3V2KX-GP
4
R7526 U7504A U7504B R7523
100KR2J-1-GP
SCD1U10V2KX-4GP
2
Dock2K49R2F-GP 14 5 14 9 CLK_FD_12M 1 2 CLK_12M 2 3 CLK_12M_R
PR
PR
B VCC Q VCC Q 0R0402-PAD-2-GP I2S_12MHZ B
2 12 1 Dock 4
2
D D
Dock Dock
2
AUD_SENSE_B AUD_SENSE_B 30 23 CLK_FD_48M 3 CLK_FD_24M 11 RN7502

CLK CLK SRN33J-5-GP-U
Q 6 Q 8
1
7 7
CL
CL
C7520 R7527 R7528 GND GND +3.3V_RUN
Dock
SC1KP50V2KX-1GPDock20KR2F-L-GP Dock39K2R2F-L-GP TSLVC74APW R-1GP TSLVC74APW R-1GP
2
13
AUD_DOCK_FD_CLR#
2
DOCK_MIC_DET_R#
Frequency Divider (12M Output)
D
1
D7502 D7503 D7501 D7504
DOCK_HP_DET 38
Q7502
Dock DY DY DY DY
38,44,74 DOCK_DET# G
2N7002A-7-GP BAV99-4-GP BAV99-4-GP BAV99-4-GP BAV99-4-GP
3
3
Q7501
S
Dock DMN66D0LDW -7-GP

+3.3V_RUN +3.3V_RUN +3.3V_RUN U7507
4
16 3 DAI_BCLK#_R 1 2
C7521 C7501 VCC 1Y#/1Y DAI_LRCK#_R R7513 1 DAI_BCLK# 74
2Y#/2Y 5 2 0R0402-PAD-2-GP DAI_LRCK# 74
1
SCD1U10V2KX-4GP SCD1U10V2KX-4GP 7 DAI_DO#_R R7514 1 2 0R0402-PAD-2-GP

DOCK_HP_DET_R# D7505 I2S_BCLK 3Y#/3Y R7515 0R0402-PAD-2-GP DAI_DO# 74
BAV99-4-GP
DY Dock I2S_LRCLK
2 1A 4Y#/4Y 9 DAI_12MHZ# 74
DOCK_MIC_DET 38 DY 4 11
2
I2S_DO 2A 5Y#/5Y I2S_DI#

14
14
6 3A 6Y#/6Y 13
U7402C U7402D I2S_12MHZ 10 Dock
4A
A 12 <Core Design> A
3
DAI_DI_1 DAI_DI_R 5A
74 DAI_DI 5 DY 6 9 DY 8 14 6A
U7402A U7402B TSAHC14PW -GP TSAHC14PW -GP

38 EN_I2S_NB_CODEC#
1 R7529 2 DAI_OE2#
1 OE1# Wistron Corporation
14
14
15 8
7
0R0402-PAD-2-GP OE2# GND 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 DY 2 3 DY 4 74HC366D-GP
Title
TSAHC14PW -GP TSAHC14PW -GP 1 R7516 2 Docking IC / SW

7
0R0402-PAD-2-GP Size Document Number Rev

A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
+5V_ALW +1.5V_RUN_CPU +3.3V_LAN +3.3V_SUS +3.3V_RUN_W W AN
2
2
C7601 C7602 C7603 C7604 C7605
SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP
1
1
D D
Place near BTB1
IO Board Connector
BTB1
84 86 +3.3V_SUS
85 NP2
40 41 PW R_BTN_BD_DET# 38
C 39 42 C
66 BREATH_PW RLED_B
25 USB_MCARD2_DET# 38 43 POW ER_SW #_MB 37
21 PCIE_MCARD2_DET# 37 44
36 45
35 46 +3.3V_RUN_W W AN
34 47 +5V_ALW
33 48
38 MDC_RST_DIS# 32 49
38 W W AN_RADIO_DIS# 31 50
38,63 USB_SIDE_EN# 30 51
21 USB_OC#2_3 29 52
28 53 +1.5V_RUN_CPU
27 54 NB_LOM_SPD10LED_GRN#_R 35
26 55 +3.3V_LAN
25 56
24 57 NB_LOM_ACTLED_YEL#_R 35
23 58
22 59 NB_LOM_SPD100LED_ORG#_R 35
21 60 LED_W W AN_OUT# 66
20 61 PLTRST4# 21,35,64
21 USBP13- 19 62 MINI2CLK_REQ# 23
21 USBP13+ 18 63
17 64 NB_LOM_TRD0+ 35
23 CLK_PCIE_MINI2# 16 65 NB_LOM_TRD0- 35
23 CLK_PCIE_MINI2 15 66
14 67 NB_LOM_TRD1+ 35
23 PCIE_PRX_W W ANTX_N1 13 68 NB_LOM_TRD1- 35
23 PCIE_PRX_W W ANTX_P1 12 69
11 70 NB_LOM_TRD2+ 35
B B
23 PCIE_PTX_W W ANRX_N1_C 10 71 NB_LOM_TRD2- 35
23 PCIE_PTX_W W ANRX_P1_C 9 72
8 73 NB_LOM_TRD3+ 35
24 PCH_AZ_MDC_BITCLK 7 74 NB_LOM_TRD3- 35
6 75
24 PCH_MDC_SDOUT 5 76 USBP3- 21
24 PCH_AZ_MDC_RST# 4 77 USBP3+ 21
24 PCH_MDC_SDIN1 3 78
2 79 USBP2- 21
24 PCH_AZ_MDC_SYNC 1 80 USBP2+ 21
82 NP1
81 83
TYCO-CONN80E-GP
20.F1612.080
A <Core Design> A
Wistron Corporation
Title

IO Board CONN Rev
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = User.interface
D D
LED BD Connector
LEDB1
13
AFTP7702 1 1
BAT1_LED_AMBER_B 2
66 BAT1_LED_AMBER_B
BAT2_LED_BLUE_B 3
66 BAT2_LED_BLUE_B
4
BT_LED_B 5 *Pin12 for Daughter Board DET
66 BT_LED_B
6
LED_WLAN_OUT_B 7
*Daughter Board Pin12 connect to Pin1
66 LED_WLAN_OUT_B
C 8 C
9
HDD_LED_B 10
66 HDD_LED_B
11
LED_BD_DET# 12
25 LED_BD_DET#
14
Main:20.K0227.012
MLX-CON12-11GP
2nd:20.K0230.012
20.K0227.012
1 BAT1_LED_AMBER_B
AFTP7701
1 BAT2_LED_BLUE_B
AFTP7703
B 1 BT_LED_B
LED Location from left to right B
AFTP7704
1 LED_WLAN_OUT_B
AFTP7705
HDD BATTERY WLAN BLUE TOOTH
1 HDD_LED_B
AFTP7706
1 LED_BD_DET#
AFTP7707
<Core Design>
A
Wistron Corporation A
Title
LED Board Connector

A4 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
D D
AFTP7802 1 +3.3V_RUN
AFTP7803 1 Biometric_USBP-
AFTP7804 1 Biometric_USBP+
AFTP7805 1 BIO_DET#
+3.3V_RUN
1
C7801
C SCD1U10V2KX-4GP FP1 C
7
2
R7801 1
0R0603-PAD-2-GP
21 USBP10- 1 2 Biometric_USBP- 2
21 USBP10+ 1 2 Biometric_USBP+ 3
0R0603-PAD-2-GP AFTP7801 1 4
R7802 5
-1.10/0310 25 BIO_DET# 6
8
Main:20.K0227.006
MLX-CON6-11-GP
2nd:20.K0230.006
20.K0227.006
Biometric Connector
B B
<Core Design>
A
Wistron Corporation A
Title
Finger Printer Board CONN

A4 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
Hole SSID = Mechanical Unused

BOSS1
H1 H2 H3 H4
STF217R128H83-GP
+3.3V_RUN +3.3V_RUN
SPRING
HOLE296R166-GP
HOLE296R166-GP
HOLE296R166-GP
HOLE296R166-GP
14
14
U7402E U7402F
1
1
SPR1 SPR2 SPR3 SPR4 SPR5 SPR6 SPR7
11 DY 10 13 DY 12
SPRING-51-GP
SPRING-51-GP
SPRING-51-GP
D D
SPRING-24-GP-U
SPRING-24-GP-U
SPRING-24-GP-U
SPRING-24-GP-U
ZZ.00PAD.J11 ZZ.00PAD.J11 ZZ.00PAD.J11 ZZ.00PAD.J11 34.4Y702.001
TSAHC14PW -GP TSAHC14PW -GP
7
H6 H7 H8 H9 H10
HTE10BE10R32-D-55-GP
HTE10BE10R32-D-55-GP
HOLE256R126-GP
HT65B85X925R29-S-GP
HOLET256B315R111-GP
1
1
34.4F822.002 34.4F822.002 34.4F822.002 34.45T31.001 34.45T31.001 34.45T31.001 34.45T31.001
1
+5V_CRT_RUN +5V_CRT_RUN
ZZ.00PAD.I51 ZZ.00PAD.I51 ZZ.00PAD.J01 ZZ.00PAD.M01 EMI CAPS
14
10
14
13
+DC_IN +PW R_SRC +PW R_SRC
H11 H12 H13 H14 H15 H16 H17
HOLE 9 8 12 11
HOLE355X355R126-GP
HOLE355X355R126-GP
HOLE355X355R126-GP
HOLE355X355R126-GP
HOLE355X355R126-GP
HOLE355X355R126-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
1
EC7906 EC7907 EC7908
DY U5501C U5501D
7
SSAHCT125PW R-GP SSAHCT125PW R-GP
1
2
C ZZ.00PAD.I71 ZZ.00PAD.I71 ZZ.00PAD.I71 ZZ.00PAD.I71 ZZ.00PAD.I71 ZZ.00PAD.I71 1 +COIN_CELL +PW R_SRC +PW R_SRC C
H27
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U10V2KX-4GP
1
HOLE EC7909 EC7910 EC7911
DY DY
2
1
-1.10/0317
H18 H19 H20 H21
HOLE78X42R54X34-S-GP HOLE78X42R54X34-S-GP
HOLE300X166R111-GP
HOLE300X166R111-GP
1
ZZ.00PAD.S31 ZZ.00PAD.S31 ZZ.00PAD.I61 ZZ.00PAD.I61

B
H23
H24 H25
RF B
HOLE197R99-1-GP HOLE197R91-GP HOLE197R91-GP +VCC_GFX_CORE +1.5V_RUN +5V_ALW +5V_ALW +5V_ALW +PW R_SRC_GFX_CORE +1.5V_RUN +1.5V_RUN +1.5V_RUN
EC7912 EC7913 EC7914 EC7923 EC7927 EC7924 EC7925

1
1
EC7904
SCD1U50V3KX-GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
DY DY EC7905 DY DY DY DY DY DY
1
2
ZZ.00PAD.J71 ZZ.00PAD.I81 ZZ.00PAD.I81
+1.5V_RUN +1.5V_RUN +1.5V_RUN +5V_ALW +5V_ALW +1.05V_VTT_PW R_SRC
H22 EC7915 EC7916

1
1
HT65X75B62X56R28-2P-S-GP EC7901 EC7902 EC7903
SCD1U50V3KX-GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
H26 EC7922
HTE54B5R28-D-42-GP DY DY DY DY DY
2
2
1
2
A <Core Design> A
+PW R_SRC +PW R_SRC +1.5V_SUS +1.5V_SUS +1.5V_SUS
ZZ.00PAD.M51 ZZ.00PAD.M61 Wistron Corporation

SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
EC7917 EC7918 EC7919 EC7920 EC7921 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY DY DY
2
Title
Unused Parts / EMI RF Cap.

5 4 3 2 1
5 4 3 2 1
SSID = VIDEO U8001A 1 OF 7
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_P[0..15] 8
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_N[0..15] 8
PEG_CTX_GRX_P0 AF30 AH30 PEG_CRX_GTX_R_P0 C8002 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P0
PEG_CTX_GRX_N0 PCIE_RX0P PCIE_TX0P
AE31 PCIE_RX0N PCIE_TX0N AG31 PEG_CRX_GTX_R_N0 1 2 PEG_CRX_GTX_N0
C8003 SCD1U16V2KX-3GP PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_P[0..15] 8
PEG_CTX_GRX_P1 AE29 AG29 PEG_CRX_GTX_R_P1 C8005 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P1
PEG_CTX_GRX_N1 PCIE_RX1P PCIE_TX1P PEG_CRX_GTX_N[0..15]
AD28 PCIE_RX1N PCIE_TX1N AF28 PEG_CRX_GTX_R_N1 1 2 PEG_CRX_GTX_N1
PEG_CRX_GTX_N[0..15] 8
D C8004 SCD1U16V2KX-3GP D
PEG_CTX_GRX_P2 AD30 AF27 PEG_CRX_GTX_R_P2 C8006 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P2

AC31 PCIE_RX2N PCIE_TX2N AF26 PEG_CRX_GTX_R_N2 1 2 PEG_CRX_GTX_N2
PEG_CTX_GRX_P3 AC29 AD27 PEG_CRX_GTX_R_P3 C8009 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P3

AB28 PCIE_RX3N PCIE_TX3N AD26 PEG_CRX_GTX_R_N3 1 2 PEG_CRX_GTX_N3
PEG_CTX_GRX_P4 AB30 AC25 PEG_CRX_GTX_R_P4 C8010 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P4

PCIE_RX4P PCIE_TX4P
PCI EXPRESS INTERFACE

PEG_CTX_GRX_N4 AA31 AB25 PEG_CRX_GTX_R_N4 1 2 PEG_CRX_GTX_N4
PCIE_RX4N PCIE_TX4N C8011 SCD1U16V2KX-3GP
PEG_CTX_GRX_P5 AA29 Y23 PEG_CRX_GTX_R_P5 C8001 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P5

PEG_CTX_GRX_N5 PCIE_RX5P PCIE_TX5P PEG_CRX_GTX_R_N5 PEG_CRX_GTX_N5
Y28 PCIE_RX5N PCIE_TX5N Y24 1 2
PEG_CTX_GRX_P6 Y30 AB27 PEG_CRX_GTX_R_P6 C8013 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P6

W 31 PCIE_RX6N PCIE_TX6N AB26 1 2
PEG_CTX_GRX_P7 W 29 Y27 PEG_CRX_GTX_R_P7 C8015 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P7

V28 PCIE_RX7N PCIE_TX7N Y26 1 2
PEG_CTX_GRX_P8 V30 W 24 PEG_CRX_GTX_R_P8 C8017 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P8

PEG_CTX_GRX_N8 PCIE_RX8P PCIE_TX8P PEG_CRX_GTX_R_N8 PEG_CRX_GTX_N8 U8001F 6 OF 7
U31 PCIE_RX8N PCIE_TX8N W 23 1 2
C C
PEG_CTX_GRX_P9 U29 V27 PEG_CRX_GTX_R_P9 C8019 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P9
PEG_CTX_GRX_N9 PCIE_RX9P PCIE_TX9P PEG_CRX_GTX_R_N9 PEG_CRX_GTX_N9 LVDS CONTROL
T28 PCIE_RX9N PCIE_TX9N U26 1 2 VARY_BL AB11 LBKLT_CTL_GPU 54
C8023 SCD1U16V2KX-3GP AB12
DIGON LCDVDD_EN_GPU 38,54
PEG_CTX_GRX_P10 T30 U24 PEG_CRX_GTX_R_P10 C8020 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P10
R31 PCIE_RX10N PCIE_TX10N U23 1 2
4
3
TXCLK_UP_DPF3P AH20
PEG_CTX_GRX_P11 R29 T26 PEG_CRX_GTX_R_P11 C8022 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P11 AJ19 RN8001
PEG_CTX_GRX_N11 PCIE_RX11P PCIE_TX11P PEG_CRX_GTX_R_N11 PEG_CRX_GTX_N11 TXCLK_UN_DPF3N SRN10KJ-5-GP
P28 PCIE_RX11N PCIE_TX11N T27 1 2
C8024 SCD1U16V2KX-3GP AL21
TXOUT_U0P_DPF2P
AK20
1
2
PEG_CTX_GRX_P12 PEG_CRX_GTX_R_P12 C8025 1 PEG_CRX_GTX_P12 TXOUT_U0N_DPF2N
P30 PCIE_RX12P PCIE_TX12P T24 2 SCD1U16V2KX-3GP
PEG_CTX_GRX_N12 N31 T23 PEG_CRX_GTX_R_N12 1 2 PEG_CRX_GTX_N12 AH22
PCIE_RX12N PCIE_TX12N C8026 SCD1U16V2KX-3GP TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N AJ21
PEG_CTX_GRX_P13 N29 P27 PEG_CRX_GTX_R_P13 C8027 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P13 AL23

PEG_CTX_GRX_N13 PCIE_RX13P PCIE_TX13P PEG_CRX_GTX_R_N13 PEG_CRX_GTX_N13 TXOUT_U2P_DPF0P
M28 PCIE_RX13N PCIE_TX13N P26 1 2 TXOUT_U2N_DPF0N AK22
TXOUT_U3P AK24
PEG_CTX_GRX_P14 M30 P24 PEG_CRX_GTX_R_P14 C8029 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P14 AJ23
PEG_CTX_GRX_N14 PCIE_RX14P PCIE_TX14P PEG_CRX_GTX_R_N14 PEG_CRX_GTX_N14 TXOUT_U3N
L31 PCIE_RX14N PCIE_TX14N P23 1 2
LVTMDP
PEG_CTX_GRX_P15 L29 M27 PEG_CRX_GTX_R_P15 C8032 1 2 SCD1U16V2KX-3GP PEG_CRX_GTX_P15
K30 PCIE_RX15N PCIE_TX15N N26 1 2 TXCLK_LP_DPE3P AL15
C8031 SCD1U16V2KX-3GP AK14 CAPs close to eDP Panel Connector
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P AH16
B CLOCK AJ15 SCD1U10V2KX-4GP B
CLK_PCIE_GPU TXOUT_L0N_DPE2N SCD1U10V2KX-4GP
23 CLK_PCIE_GPU AK30 PCIE_REFCLKP
CLK_PCIE_GPU# AK32 AL17 eDP_CTX_LRX_GPU_P1 1 DY2C8033 eDP_CTX_LRX_P1 eDP_CTX_LRX_P1 54
23 CLK_PCIE_GPU# PCIE_REFCLKN TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N AK16 eDP_CTX_LRX_GPU_N1 1 DY2C8034 eDP_CTX_LRX_N1 eDP_CTX_LRX_N1 54
CALIBRATION AH18 eDP_CTX_LRX_GPU_P0 1 2C8035 eDP_CTX_LRX_P0
TXOUT_L2P_DPE0P eDP_CTX_LRX_P0 54
L9 Y22 PCIE_CALRP R8004 1 2 1K27R2F-L-GP AJ17 eDP_CTX_LRX_GPU_N0 1 2C8036 eDP_CTX_LRX_N0 eDP_CTX_LRX_N0 54
NC#L9 PCIE_CALRP TXOUT_L2N_DPE0N
N9 NC#N9
1 PARK 2 N10 AA22 PCIE_CALRN R8005 1 2 2KR2F-3-GP +1.1V_GFX_PCIE AL19 SCD1U10V2KX-4GP
R8006 10KR2J-3-GP NC_PW RGOOD PCIE_CALRN TXOUT_L3P SCD1U10V2KX-4GP
TXOUT_L3N AK18
9,21,58 PLTRST1# 1 R8001 2 PLTRST_DELAY# AL27 PERSTB

0R0402-PAD-2-GP Cap. place near LCD connector
M92-S2-GP M92-S2-GP
For Park-S3: the PWRGOOD pin

must need to pull down to GND
For M9X-S2/S3: This PWRGOOD pin
is not connected
A A
<Core Design>
Wistron Corporation
Title
GPU-PCIE/LVDS(1/4)
Custom
5 4 3 2 1
5 4 3 2 1
+DPLL_VDDC
L8102 2 OF 7
U8001B
SSID = VIDEO +1.8V_DELAY 1 2
BLM15BD121SS1D-GP
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
AF2 DPB_LANE_3P_GPU
C8104
C8106
C8107
SCD01U16V2KX-3GP
TXCAP_DPA3P
1
+DPLL_PVDD DPB_LANE_3P_GPU 74
AF4 DPB_LANE_3N_GPU
C8105
SC10U6D3V5KX-1GP
L8103 TXCAM_DPA3N DPB_LANE_3N_GPU 74
+1.8V_DELAY 1 2 AG3 DPB_LANE_2P_GPU
2
MUTI GFX TX0P_DPA2P DPB_LANE_2P_GPU 74
AG5 DPB_LANE_2N_GPU
BLM15BD121SS1D-GP DPA TX0M_DPA2N DPB_LANE_2N_GPU 74
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AH3 DPB_LANE_1P_GPU
C8108
C8102
C8109
C8103
SCD01U16V2KX-3GP
TX1P_DPA1P DPB_LANE_1P_GPU 74
1
AH1 DPB_LANE_1N_GPU
TX1M_DPA1N DPB_LANE_1N_GPU 74
DY DPC_VSSR_5 AA1 AK3 DPB_LANE_0P_GPU
2
DVPCNTL_MVP_0 TX2P_DPA0P DPB_LANE_0P_GPU 74
Y4 AK1 DPB_LANE_0N_GPU
DVPCNTL_MVP_1 TX2M_DPA0N DPB_LANE_0N_GPU 74
AC7
DVPCNTL_0
Y2 AK5 DPC_LANE_3P_GPU
D DVPCNTL_1 TXCBP_DPB3P DPC_LANE_3P_GPU 74 D
U5 AM3 DPC_LANE_3N_GPU
DPC_VSSR_1 DVPCNTL_2 TXCBM_DPB3N DPC_LANE_3N_GPU 74
U1
DVPCLK
83 DVPDATA0 Y7 AK6 DPC_LANE_2P_GPU
+1.8V_DELAY DVPDATA_0 TX3P_DPB2P DPC_LANE_2P_GPU 74
L8104 AM5 DPC_LANE_2N_GPU
BLM15BD121SS1D-GP M92/ PARK switch 83 DVPDATA2
V2
Y8
DVPDATA_1
DVPDATA_2
DPB TX3M_DPB2N DPC_LANE_2N_GPU 74
V4 AJ7 DPC_LANE_1P_GPU
DVPDATA_3 TX4P_DPB1P DPC_LANE_1P_GPU 74
AB7 AH6 DPC_LANE_1N_GPU
DPC_VDD18_1 DPC_VSSR_2 DVPDATA_4 TX4M_DPB1N DPC_LANE_1N_GPU 74
1 PARK 2 W1
DVPDATA_5
PARK AB8 AK8 DPC_LANE_0P_GPU
DPC_VDD18_2 DVPDATA_6 TX5P_DPB0P DPC_LANE_0P_GPU 74
1 2 W3 AL7 DPC_LANE_0N_GPU
SC1U6D3V2KX-GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
DVPDATA_7 TX5M_DPB0N DPC_LANE_0N_GPU 74
AB9
DVPDATA_8
1
R8117 W5
0R2J-2-GP DPC_VDD18_1 DVPDATA_9
PARK
C8110
PARK
C8111
PARK
C8112
AC6
DPC_PVDD DVPDATA_10
W6
2
+1.1V_GFX_PCIE DVPDATA_11
AD7
AA3
DVPDATA_12
DVPDATA_13
M92/ PARK switch RN8101
L8105 AC8 1 8 DPC_VSSR_1
DPC_VDD10_1 DVPDATA_14
AA5 2 PARK 7 DPC_VSSR_2
1 PARK 2 AE8 3 6 DPC_VSSR_5
AA6 4 5
DVPDATA_17
BLM15BD121SS1D-GP 1 PARK 2 DPC_VDD10_2 AE9
SC10U6D3V5MX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DVPDATA_18
83 DVPDATA19 AB4 SRN0J-7-GP
DVPDATA_19
1
R8119 DVPDATA_20
C8115
AFTP8101 1 AD9
0R2J-2-GP DVPDATA_20
C8113
C8114
PARK PARK PARK 83 DVPDATA21 AB2

DVPDATA_21
AC10
2
+3.3V_DELAY DPC_VDD18_2 DVPDATA_22

AC5
DVPDATA_23
1
R8120 DY 1
DY R8121
4K7R2F-GP 4K7R2F-GP +DAC1_AVDD +1.8V_DELAY
I2C
0R2J-2-GP L8106 1 2
2
R8122 1 DY BLM15BD121SS1D-GP
C8116
C8117
C8118
C8119
2 R1
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
SC4D7U6D3V5KX-3GP
SCL
1
37,54 LCD_SMBCLK R8123 1
37,54 LCD_SMBDAT DY 2 R3
SDA
C 0R2J-2-GP AM26 CRT_RED_GPU CRT_RED_GPU 75 C
2
GENERAL PURPOSE I/O R R8124
AK26 1 2 150R2F-1-GP
RB
83 GPIO_VGA_00 U6
+3.3V_DELAY GPIO_0 CRT_GREEN_GPU
83 GPIO_VGA_01 U10 AL25 CRT_GREEN_GPU 75
GPIO_1 G R8125
83 GPIO_VGA_02 T10 AJ25 1 2 150R2F-1-GP
GPIO_2 GB
R8126 U8
GPIO_3_SMBDATA
3
U7 AH24 CRT_BLUE_GPU CRT_BLUE_GPU 75

MMBT3904-7-F-GP GPIO_4_SMBCLK B R8127 +DAC1_VDD1DI +1.8V_DELAY
74 DPC_DOCK_HPD 1 DY 2 1 DY 83 GPIO_VGA_05 T9 AG25 1 2 150R2F-1-GP
Q8102 TP8102 GPIO_5_AC_BATT DAC1 BB
1 T8
GPIO_6
2
200KR2J-L1-GP PANEL_BKEN_GPU T7 AH26 CRT_HSYNC_GPU 75,83 L8107 1 2

38,54 PANEL_BKEN_GPU
2
R8148 GPIO_7_BLON HSYNC BLM15BD121SS1D-GP
C8120
C8121
C8122
P10 AJ27 CRT_VSYNC_GPU 75,83
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
83 GPIO_VGA_08 GPIO_8_ROMSO VSYNC
1
200KR2J-L1-GPDY P4
83 GPIO_VGA_09 GPIO_9_ROMSI
1
P2 (Placed between this pin and AVSSQ)

10KR2J-3-GP
GPIO_10_ROMSCK CRT_RSET
83 GPIO_VGA_11 N6 AD22 1 2
1
2
GPIO_11 RSET R8128 499R2F-2-GP
R8101
DY 83 GPIO_VGA_12 N5
GPIO_12
83 GPIO_VGA_13 N3 70mA AG24 +DAC1_AVDD
HPD2 GPIO_13 AVDD
Y9 AE22
2
GPIO_14_HPD2 AVSSQ
86 PWRCNTL_0 N1
GPIO_15_PWRCNTL_0
7 CLK_GPU27M_SS M4 45mA AE23 +DAC1_VDD1DI
GPU_THERM# GPIO_16_SSIN VDD1DI
TP8103 1 R6 AD23
GPIO_17_THERMAL_INT VSS1DI
TP8104 1 W10
GPIO_18_HPD3
1 R8152 2 M2
0R0402-PAD-2-GP GPIO_19_CTF +1.8V_DELAY
86 PWRCNTL_1
R8129 1 2
P8
P7
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
R2
R2B
AM12
AK12 M92/ PARK switch
10KR2J-3-GP N8 +1.8V_DELAY
+3.3V_DELAY 83 GPIO_VGA_22 GPIO_22_ROMCSB +DAC2_VDD2DI
GPU_CLK_REQ# N7 AL11
GPU_GPIO_29 GPIO_23_CLKREQB G2 DPC_PVDD
2 RN8102 3 T11 AJ11 1 PARK 2 40mA
GPU_GPIO_30 GPIO_29_DRM_0 G2B
R8131 1 4 R11 1 2
GPIO_30_DRM_1
3
0R4P2R-PAD AK10 L8108 R8130 0R0402-PAD-2-GP
SC10U6D3V5MX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
MMBT3904-7-F-GP JTAG_TRSTB B2 BLM15BD121SS1D-GP
54 eDP_LCD_HPD 1 DY 2 1 DY L6
JTAG_TRSTB B2B
AL9
1
1
Q8103
RN
C8127
1 L5
1KR2J-1-GP
JTAG_TDI
2
200KR2J-L1-GP TP8105
R8132
C8123
C8124
1 L3 PARK PARK PARK
2
R8149 TP8106 JTAG_TCK

1 L1 AH12
2
200KR2J-L1-GPDY TP8107 JTAG_TMS C
1 K4 AM10
JTAG_TDO Y
1
TP8101 AF24 AJ9

10KR2J-3-GP
83 JTAG_TESTEN
2
TESTEN COMP
1
1KR2J-1-GP
1
TP8108 DAC2
R8133
R8134
DY TP8109
1
GENERICB
AB13
GENERICA
1 W8 AL13 DAC2_HSYNC 83
B GENERICB H2SYNC B
W9 AJ13 DAC2_VSYNC 83
2
GENERICC V2SYNC +DAC2_A2VDD +3.3V_DELAY

W7
2
GENERICD
1 R8144 2 HPD4 AD10 65mA
0R0402-PAD-2-GP GENERICE_HPD4
40mA AD19 +DAC2_VDD2DI 1 2
+3.3V_DELAY HPD1 VDD2DI R8135 0R0402-PAD-2-GP
AC14 AC19
HPD1 VSS2DI
R8136
3
+1.8V_DELAY AE20
MMBT3904-7-F-GP 65mA A2VDD +DAC2_A2VDD
74 DPB_DOCK_HPD 1 DY 2 1 DY Q8104
1mA AE17 +DAC2_A2VDDQ
A2VDDQ
2
200KR2J-L1-GP GPU_VREFG AC16

2
R8150 R8137 VREFG

AE19
200KR2J-L1-GPDY 499R2F-2-GP A2VSSQ
1
VREFG VOLTAGE DIVIDER IS

10KR2J-3-GP
(VREFG = VDDR4,5(1.8V) / 3 = .6V) AG13 GPU_R2SET 1 2

1
R2SET R8139 715R2F-GP +DAC2_A2VDDQ +1.8V_DELAY

R8138
DY
1mA
L8101 1 2
2
+DPLL_PVDD DDC/AUX BLM15BD121SS1D-GP
C8136
C8134
AE6
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DDC1CLK
1
R8140 C8132 PLL/CLOCK AE5
249R2F-GP SCD1U16V2KX-3GP DDC1DATA
AF14 120mA
2
+DPLL_VDDC DPLL_PVDD DPB_DOCK_AUX

1 R8143 2 AE14 AD2 DPB_DOCK_AUX 74
2
0R0402-PAD-2-GP DPLL_PVSS AUX1P DPB_DOCK_AUX#
AD4 DPB_DOCK_AUX# 74
2
AUX1N
AD14 AC11
DPLL_VDDC 300mA DDC2CLK
AC13
R8141 DDC2DATA
1 2 XTALIN_R AM28 AD13 DPC_DOCK_AUX DPC_DOCK_AUX 74
7 CLK_GPU27M_NSS XTALIN AUX2P
1 AK28 AD11 DPC_DOCK_AUX# DPC_DOCK_AUX# 74
XTALOUT AUX2N
1
124R2F-U-GP TP8110
R8142
150R2F-1-GP AB22
NC#AB22
AC22 CAPs close to eDP Panel Connector
NC#AC22 +3.3V_DELAY
2
GPU_THERM_DP T4 SCD1U10V2KX-4GP
39 GPU_THERM_DP DPLUS THERMAL
GPU_THERM_DN T2
39 GPU_THERM_DN DMINUS
AE16 eDP_AUX_GPU 1 2 C8140 eDP_AUX 54 RN8103
DDCAUX5P eDP_AUX#_GPU C8139
A AD16 1 2 eDP_AUX# 54 3 2 A
L8109 TP8111 FAN_PWM DDCAUX5N SCD1U10V2KX-4GP
1 R5 4 1
+TSVDD TS_FDO
+1.8V_DELAY 1 2 AD17 20mA AC1 M92CRT_DDCCLK 1 2 GPU_CLK_DDC +3.3V_DELAY
TSVDD DDC6CLK M92CRT_DDCDATA GPU_DAT_DDC SRN2K2J-1-GP
AC17 AC3 1 2
BLM15BD121SS1D-GP TSVSS DDC6DATA R8145 0R0402-PAD-2-GP
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
<Core Design>
R8146 0R0402-PAD-2-GP
C8142
AD20
NC_DDCAUX7P
1
1
C8141
AC20 U8101
NC_DDCAUX7N
2 DY 1 R8147 GPU_CLK_REQ#
+3.3V_DELAY
10KR2J-3-GP M92CRT_DDCDATA 1 6 GPU_DAT_DDC
GPU_DAT_DDC 75
Wistron Corporation
2

1
M92-S2-GP Taipei Hsien 221, Taiwan, R.O.C.

R8151
2 DY 5
10KR2J-3-GP GPU_CLK_DDC 3 4 M92CRT_DDCCLK Title

75 GPU_CLK_DDC
5V @ CRT side GPU-TV/CRT/DP PORT (2/4)

2
DMN66D0LDW-7-GP Size Document Number Rev

C -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO U8001E 5 OF 7
+1.5V_RUN +1.5V_RUN
AA27 A3
PCIE_VSS GND
AB24 A30
PCIE_VSS GND
AB32 AA13
SC22U6D3V5MX-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
PCIE_VSS GND
C8207
C8208
C8209
C8210
C8212
AC24 AA16
SC10U6D3V5KX-1GP
1
PCIE_VSS GND
C8203
C8204
C8205
C8206
C8211
AC26 AB10
1
PCIE_VSS GND
C8202
AC27
PCIE_VSS GND
AB15 DY
AD25 AB6 DY
2
PCIE_VSS GND +1.8V_DELAY
AD32 AC9
2
PCIE_VSS GND
AE27 AD6
PCIE_VSS GND
AF32 AD8
PCIE_VSS GND
AG27 AE7
PCIE_VSS GND
AH32 AG12
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
PCIE_VSS GND
C8220
C8226
C8227
C8228
C8229
C8230
C8221
K28 AH10
PCIE_VSS GND
1
K32 AH28 U8001D 4 OF 7
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PCIE_VSS GND
C8213
C8214
C8216
C8217
C8218
C8219
L27 B10 DY
1
PCIE_VSS GND MEM I/O
C8215
D M32 B12 D
2
PCIE_VSS GND PCIE
N25
PCIE_VSS GND
B14 DY
N27 B16 H13 AB23
2
PCIE_VSS GND VDDR1 PCIE_VDDR
P25 B18 H16 AC23
P32 B20 H19 AD24
R27 B22 J10 AE24
500mA
T25 B24 J23 AE25
T32 B26 J24 AE26
U25 B6 J9 AF25
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
C8222
C8223
C8224
C8225
C8231
U27 B8 K10 AG26 +1.1V_GFX_PCIE
1
V32
PCIE_VSS GND
C1 K23
VDDR1
2.2A
W25
PCIE_VSS GND
C32 DY K24
VDDR1
W26 E28 K9 L23
2
PCIE_VSS GND VDDR1 PCIE_VDDC
W27 F10 L11 L24
Y25 F12 L12 L25
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
C8233
C8232
C8236
C8237
C8238
C8239
C8240
Y32 F14 L13 L26
1
F16 L20 M22
GND L8202 VDDR1 PCIE_VDDC
GND
F18
F2 +1.8V_DELAY M92/ PARK switch BLM15BD121SS1D-GP
L21
L22
VDDR1 2A PCIE_VDDC
N22
N23
2
GND VDDR1 PCIE_VDDC
F20 N24
GND +VDD_CT PCIE_VDDC
M6 F22 1 2 R22
GND GND PCIE_VDDC
N11 F24 T22
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
GND GND PCIE_VDDC
N12
GND GND
F26 L8203 300mA LEVEL
PCIE_VDDC
U22
1
BLM15BD121SS1D-GP TRANSLATION
C8241
C8242
C8243
C8244
C8245
N13 F6 V22
GND GND +SPV18 PCIE_VDDC
N16 F8 AA20
N18
GND
GND GND
G10 1 PARK 2 AA21
VDD_CT
136mA
2
2
GND GND VDD_CT
N21 G27 AB20 AA15
1
GND GND C8246 C8247 VDD_CT CORE VDDC
P6 G31 AB21 N15
GND GND SCD1U16V2KX-3GP SC1U10V2KX-1GP VDD_CT VDDC +VCC_GFX_CORE
P9
GND GND
G8 PARK PARK VDDC
N17
R12 H14 R13
2
GND GND I/O VDDC
R15 H17 R16
GND GND +3.3V_DELAY VDDC
R17 H2 AA17 R18
GND GND L8204 VDDR3 VDDC
R20 H20
M92/ PARK switch AA18 R21
60mA
GND GND BLM15BD121SS1D-GP VDDR3 VDDC
T13 H6 AB17 T12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
GND GND +MPV18 VDDR3 VDDC
C8261
C8262
C8263
C8264
C8265
C8248
C8256
C8249
C8257
C8267
C8268
C8258
C8259
C8260
T16 J27 AB18 T15
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
GND GND VDDR3 VDDC
T18
GND GND
J31 1 PARK 2
VDDC
T17
1
+1.8V_DELAY
C8252
C8253
C8254
C8255
T21 K11 T20
1
GND GND C8250 C8251 VDDC
T6 K2 DY DY 1 M92 2 U11 U13
2
GND GND VDDR5 VDDC
U15 K22 09/0623 PARK SCD1U16V2KX-3GP PARK SC1U10V2KX-1GP R8202 1 PARK 2 0R2J-2-GP U12 U16
170mA
2
2
GND GND R8203 0R2J-2-GP VDDR5 VDDC
U17 K6 V11 U18
2
GND GND VDDR5 VDDC
U20 1 M92 2 V12 U21
GND VDDR5 VDDC
POWER
C U3 R8204 0R2J-2-GP V15 C
GND VDDC
U9 V17
GND VDDC
V13 AA11 V20
GND +1.8V_DELAY VDDR4 VDDC
V16 1 M92 2 AA12 V21
170mA
GND R8201 VDDR4 VDDC
V18 1 M92 2 0R2J-2-GP Y11 Y13
GND R8205 0R2J-2-GP VDDR4 VDDC
V6 Y12 Y16
GND VDDR4 VDDC +VCC_GFX_CORE +VCC_GFX_CORE
Y10 A32 Y18
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
GND VSS_MECH +1.5V_RUN VDDC
Need find
C8269
Y15 AM1 Y21
1
GND VSS_MECH MEM CLK VDDC
C8270
C8271
C8272
Y17 AM32
GND VSS_MECH 470ohm bead +VDDRHA
Y20
GND DY 1 M92 2 L17
VDDRHA
Y6 300mA
SC1U6D3V2KX-GP
2
2
GND L8205 ISOLATED
L16
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
VSSRHA
1
BLM15BD121SS1D-GP CORE I/O
C8273
C8276
C8277
C8278
C8279
C8280
C8274
C8288
1
1
+PCIE_PVDD
M92-S2-GP
M92 PLL VDDCI
M13
M15 DY DY DY
2
VDDCI
AM30 68mA M16
2
PCIE_PVDD VDDCI
M17
+MPV18 VDDCI
M18
VDDCI
L8 M20
NC_MPV18 VDDCI
M21
+SPV18 VDDCI
N20
VDDCI
H7
NC_SPV18
+SPV10 H8 35mA
SPV10
J7
SC1U10V2KX-1GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
+1.8V_DELAY +PCIE_PVDD SPVSS
L8206
1
1 2
BACK BIAS
C8281
C8283
C8282
BLM15BD121SS1D-GP DY
300mA M11
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
2
BBP#1 144mA
C8285
C8286
C8287
M12
BBP#2
1
1
2
2
M92-S2-GP
+VCC_GFX_CORE
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
+1.8V_DELAY
B +1.8V_DELAY B
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
L8201
L8209
1 2 U8001G 7 of 7 1 PARK 2
M92/ PARK switch
C8292
C8293
C8294
C8295
C8296
C8297
BLM15BD121SS1D-GP
1
1
300mA DP E/F POWER DP A/B POWER BLM15BD121SS1D-GP +VCC_GFX_CORE +SPV10
PARK PARK PARK L8210
+DPE_VDD18 AG15 AE11 +DPA_VDD18 1 M92 2
200mA
2
2
DPE_VDD18 NC_DPA_VDD18
AG16 AF11
DPE_VDD18 NC_DPA_VDD18 BLM15BD121SS1D-GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
+1.1V_GFX_PCIE L8214 +1.1V_GFX_PCIE +1.1V_GFX_PCIE 300mA
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
L8211
L8218
PARK-S3:110mA@1.0V +DPE_VDD10 +DPA_VDD10
D-Change
1 2 AG20 AF6 1 2 1 PARK 2
170mA
200mA
DPE_VDD10 DPA_VDD10
M92-S2:170mA@1.1V
C8302
C8303
C8304
C8305
C8306
C8307
BLM15BD121SS1D-GP BLM15BD121SS1D-GP
AG21 AF7 PARK-S3:110mA@1.0V
1
1
DPE_VDD10 DPA_VDD10 BLM15BD121SS1D-GP
Dock Dock Dock M92-S2:200mA@1.1V
AG14 AE1
2
2
DPE_VSSR DPA_VSSR
AH14 AE3
DPE_VSSR DPA_VSSR +1.8V_DELAY
AM14 AG1
DPE_VSSR DPA_VSSR L8213
AM16 AG6
SC4D7U6D3V5KX-3GP
DPE_VSSR DPA_VSSR
1 R8215 2 AM18 AH5 1 PARK 2
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
DPE_VSSR DPA_VSSR
C8311
C8312
C8313
1
1
0R0603-PAD-2-GP BLM15BD121SS1D-GP
+DPF_VDD18 +DPB_VDD18
PARK PARK PARK
AF16 AE13
200mA
2
DPF_VDD18 NC_DPB_VDD18
AG17 AF13
DPF_VDD18 NC_DPB_VDD18
+1.1V_GFX_PCIE L8212 +1.1V_GFX_PCIE
+DPF_VDD10 +DPB_VDD10
D-Change
PARK-S3:110mA@1.0V 1 R8214 2 AF22 AF8 1 2
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
170mA
200mA
0R0603-PAD-2-GP DPF_VDD10 DPB_VDD10 BLM15BD121SS1D-GP

C8317
C8318
C8319
AG22 AF9
SC4D7U6D3V5KX-3GP
1
1
DPF_VDD10 DPB_VDD10
M92-S2:170mA@1.1V PARK-S3:110mA@1.0V
Dock Dock Dock
AF23 AF10 M92-S2:200mA@1.1V
2
2
DPF_VSSR DPB_VSSR
AG23 AG9
DPF_VSSR DPB_VSSR
AM20 AH8
DPF_VSSR DPB_VSSR
AM22 AM6
R8209 DPF_VSSR DPB_VSSR R8210
AM24 AM8
150R2F-1-GP DPF_VSSR DPB_VSSR 150R2F-1-GP
+1.8V_DELAY 2 1 DPEF_CALR_GND DPAB_CALR_GND 1 2 L8208 +1.8V_DELAY

SC4D7U6D3V5KX-3GP
L8215 D-Change
A A
1 2 AF17 AE10 1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC4D7U6D3V5KX-3GP
DPEF_CALR DPAB_CALR
C8320
C8201
C8321
C8322
C8323
C8324
BLM15BD121SS1D-GP BLM15BD121SS1D-GP
1
300mA
20mA 20mA Dock Dock Dock
+DPE_PVDD AG18 DP PLL POWER AG8 +DPA_PVDD
2
DPE_PVDD DPA_PVDD
AF19 AG7
DPE_PVSS DPA_PVSS <Core Design>
L8207 +1.8V_DELAY
20mA D-Change
AG19 AG10 +DPB_PVDD 1 2 Wistron Corporation
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC4D7U6D3V5KX-3GP
NC_DPF_PVDD DPB_PVDD BLM15BD121SS1D-GP

C8328
C8329
C8330
AF20 AG11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
NC_DPF_PVSS DPB_PVSS
Dock Dock Dock
Title
2
M92-S2-GP
GPU-POWER/GND(3/4)
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO U8001C 3 OF 7

84,85 MDA[0..63]
MAA[0..12] 84,85
ATI RESERVED CONFIGURATION STRAPS
MDA0 K27 K17 MAA0 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
MDA1 DQA_0 MAA_0 MAA1
J29 J20 THEY MUST NOT CONFLICT DURING RESE
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) MDA3
H30
H32
DQA_2
DQA_3
MAA_2
MAA_3
H23
G23 MAA3 RDQSA0 and WDQSA0 = differential pair
MDA4 MAA4 GPIO3 , H2SYNC , V2SYNC
G29 G24
RDQSA1 and WDQSA1 = differential pair
MEMORY INTERFACE
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) DQA_4 MAA_4
MDA5 F28 H24 MAA5
MDA6 DQA_5 MAA_5 MAA6 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
MDA7
F32
F30
DQA_6
DQA_7
MAA_6
MAA_7
J19
K19 MAA7 ETC THEY MUST NOT CONFLICT DURING RESET
MDA8 C30 J14 MAA8
F27 K14
A28 J11
C28
DQA_11 MAA_11
J13 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDA12 E27 H11 MAA12
MDA13 DQA_12 MAA_12 BA2
G26
DQA_13 MAA_13/BA2
G11 BA2 84,85 Size of the primary
MDA14 D26 J16 BA0 GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
MDA15 DQA_14 MAA_14/BA0 BA1 BA0 84,85 memory apertures
D F25 L15 BA1 84,85 D
MDA16 DQA_15 MAA_15/BA1
A25
MDA17 DQA_16 DQMA#0
C25
DQA_17 DQMA_0
E32 128MB x000 M25P05A 0100
MDA18 E25 E30 DQMA#1 ST
MDA19 D24
DQA_18 DQMA_1
A21 DQMA#2 V 256MB x001 M25P10A 0101
MDA20 DQA_19 DQMA_2 DQMA#3 64MB x010 Microelectronics M25P20 0101
E23 C21
MDA21 DQA_20 DQMA_3 DQMA#4
F23
DQA_21 DQMA_4
E13 DQMA#[0..3] 84 32MB x M25P40 0101
MDA22 D22 D12 DQMA#5
MDA23 F21
DQA_22 DQMA_5
E3 DQMA#6 512MB x M25P80 0101
MDA24 DQA_23 DQMA_6 DQMA#7 1GB x
E21 F4
MDA25 DQA_24 DQMA_7 Chingis
D20 DQMA#[4..7] 85 2GB x Pm25LV512A 0100
MDA26 DQA_25 RDQSA0
F19 H28 (formerly PMC)
MDA27 A19
DQA_26 RDQSA_0
C27 RDQSA1 4GB x Pm25LV010A 0101
MDA28 DQA_27 RDQSA_1 RDQSA2
D18 A23
F17 E19
A17 E15 RDQSA[0..3] 84
C17 D10
E17 D6
D16
DQA_33 RDQSA_7
G5 STRAPS PIN DESCRIPTION
MDA34 F15
DQA_34 RDQSA[4..7] 85
MDA35 A15 H27 WDQSA0 Tansmitter Power Savings Enable
MDA36 DQA_35 WDQSA_0 WDQSA1
D14
DQA_36 WDQSA_1
A27 TX_PWRS_ENB GPIO0 V 0= 50% Tx output swing
MDA37 F13 C23 WDQSA2
MDA38 DQA_37 WDQSA_2 WDQSA3 1= Full Tx output swing
A13
DQA_38 WDQSA_3
C19 (Internal PD)
MDA39 C13 C15 WDQSA4
DQA_39 WDQSA_4 WDQSA[0..3] 84
MDA40 E11 E9 WDQSA5 Transmitter De-emphasis Enable
MDA41 DQA_40 WDQSA_5 WDQSA6
A11
DQA_41 WDQSA_6
C5 TX_DEEMPH_EN GPIO1 V 0= Tx de-emphasis disabled
MDA42 C11 H4 WDQSA7
MDA43 DQA_42 WDQSA_7 1= Tx de-emphasis enabled
F11
DQA_43 WDQSA[4..7] 85 (Internal PD)
MDA44 A9 L18 ODTA0
MDA45 DQA_44 ODTA0 ODTA1 ODTA0 84
C9
DQA_45 ODTA1
K16 ODTA1 85 V 0 = Advertises the PCI-E device
MDA46 F9 BIF_GEN2_EN_A GPIO2 as 2.5GT/s
+1.5V_RUN MDA47 DQA_46 CLKA0
D8 H26 CLKA0 84 1 = Advertises the PCI-E device
MDA48 DQA_47 CLKA0 CLKA0#
E7 H25 CLKA0# 84
MDA49 DQA_48 CLKA0B as 5GT/s
A7
MDA50 DQA_49 CLKA1
C7 G9 CLKA1 85
DQA_50 CLKA1
1
R8301 MDA51 F7 H9 CLKA1#

DQA_51 CLKA1B CLKA1# 85
100R2F-L1-GP-U MDA52 A5
MDA53 DQA_52 RASA0#
E5
DQA_53 RASA0B
G22 RASA0# 84 BIF_CLK_PM_EN GPIO8 V 0= Disable CLKREQ#power management capability
MDA54 C3 G17 RASA1# 1= Enable CLKREQ# power management capability
DQA_54 RASA1B RASA1# 85
MDA55 E1
2
MDA56 DQA_55 CASA0#

C G7 G19 C
SCD1U16V2KX-3GP
DQA_56 CASA0B CASA0# 84

MDA57 G6 G16 CASA1#
DQA_57 CASA1B CASA1# 85
MDA58 ROMIDCFG[3:0] if BIOS_ROM_EN=1,then Config[3:0]
C8331
G1
MDA59 DQA_58 CSA0_0#
G3 H22 CSA0_0# 84 GPIO[13,12,11] defines the ROM type
1
MDA60 DQA_59 CSA0B_0

R8302 J6
DQA_60 CSA0B_1
J22 (Internal PD) if BIOS_ROM_EN=0,then Config[3:0]
+1.5V_RUN 100R2F-L1-GP-U MDA61 J1
MDA62 DQA_61 CSA1_0# defines the primary memory apeture size
J3 G13 CSA1_0# 85
2
MDA63 DQA_62 CSA1B_0

J5 K13
DQA_63 CSA1B_1
2
1
R8303 MVREFD K26 K20 CKEA0 Enable external BIOS ROM device
MVREFDA CKEA0 CKEA0 84
100R2F-L1-GP-U MVREFS J26 J17 CKEA1 BIOS_ROM_EN GPIO_22_ROMCSB V 0= Disable external BIOS ROM device
MVREFSA CKEA1 CKEA1 85
R8304
+1.5V_RUN VGA_CALRN0 J25 WEA0#
1= Enable external BIOS ROM device
243R2F-2-GP 1
PARK 2
NC_MEM_CALRN0 WEA0B
G25 WEA0# 84 (Internal PD)
R8305 1 2 VGA_CALRN1 K7 H10 WEA1#
243R2F-2-GP PARK
81 JTAG_TESTEN WEA1# 85
2
NC_MEM_CALRN1 WEA1B
AUD[1:0]
VGA_CALRP1 J8 AB16 AUD[1] VGA_HSYNC 00:No audio function
VGA_CALRP0 K25 MEM_CALRP1 RSVD#1
C8336
1
PARK2R8307 243R2F-2-GP G14
SCD1U16V2KX-3GP
NC_MEM_CALRP0 RSVD#2 AUD[0] 01:Audio for DisplayPort and HDMI

1
MAA13_R 1 MAA13 VGA_VSYNC

R8309 L10
RSVD#3
G20
R8308 PARK20R2J-2-GP MAA13 84,85 ( if adapter is detected)
+1.5V_RUN DRAM_RST 10:Audio for DisplayPort only
100R2F-L1-GP-U (Internal PD)
2
R8310 K8 11:Audio for both DisplayPort and HDMI

CLKTESTA
2KR2J-1-GP L7 V
2
CLKTESTB
1
R8334 +3.3V_DELAY
M92 0R0402-PAD-2-GP M92-S2-GP
1 2 GPIO_5_AC_BATT is an optional input which
81 GPIO_VGA_00 R8314 1
DY 2 10KR2J-3-GP GPIO_VGA_05 allows the system to request a fast power
2
84,85 MEM_RST reductionby setting GPIO_5_AC_BATT to

1
low (0 V).The resulting state transition may

C8338
1 R8315 1 2 10KR2J-3-GP
PARK2 DY
1
81 GPIO_VGA_01 disturb the display momentarily.Power

(Internal PD)
R2325
SC2200P50V2KX-2GP C8337
M92
PARK
10KR2J-3-GP
PARK R8335 route 50ohms reductions that are less time critical should
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
680R2F-GP
single-ended/100ohms diff
R8316 1
DY 2 10KR2J-3-GP V use the standard software methods only in
VGA_CLKTSTA
VGA_CLKTSTB
81 GPIO_VGA_02
2
1
2
order to prevent display disturbances.

and keep short
C8334
C8332
PARK PARK
SC68P50V2JN-1GP
R8317 1 2 10KR2J-3-GP
81 GPIO_VGA_05 DY
2
Use this option ONLY 81 GPIO_VGA_08

R8318 1
DY 2 10KR2J-3-GP
for Park-S3
2
1
B R8319 1 2 10KR2J-3-GP B
DY
51D1R2F-GP
51D1R2F-GP
81 GPIO_VGA_09
1
For PARK-S3, R7620 change RN8302

M92SRN4K7J-8-GP
R8332
R8333
to 150 ohms (1%) R8320 1 2 10KR2J-3-GP

PARK PARK 81 GPIO_VGA_11
3
4
R8321 2 10KR2J-3-GP
81 GPIO_VGA_12 1
DY
For M9X-S2/S3,J8 Pin Connect to VSS STRAPS PIN DESCRIPTION
through 240 Ohms(0.5%) resistor. Use this option ONLY 81 GPIO_VGA_13
R8322 1
DY 2 10KR2J-3-GP
MEMORY TYPE,SIZE INFO AND MANUFACTURER
For Park-S3,J8 Pin Connect to VSS for M9x-S2/S3vFamily MEM_TYPE DVPDATA(19,21,2,0) V 0000 - gDDR3 64Mx16 Hynix
through 150 Ohms(1%) resistor for DPC_CALR 81 GPIO_VGA_22
R8323 1
DY 2 10KR2J-3-GP V 0001 - gDDR3 64Mx16 Samsung
(Internal PD) 0010 - gDDR3 128Mx16 Hynix
R8324 1 2 10KR2J-3-GP 0011 - gDDR3 128Mx16 Samsung
81 DAC2_VSYNC DY
R8306
1 2 VGA_CALRP1 R8325 1 2 10KR2J-3-GP
M92 81 DAC2_HSYNC DY
240R2F-1-GP
1 +1.8V_DELAY
R8326 PARK2
150R2F-1-GP
1 2
81 DVPDATA0
R8328VRAM 10KR2J-3-GP
1
81 DVPDATA2
R8329VRAM2 10KR2J-3-GP
81 DVPDATA21 1
R8330 DY 2
10KR2J-3-GP
81 DVPDATA19 1
R8331 DY 2
10KR2J-3-GP
+3.3V_DELAY
A A
RN8301
75,81 CRT_VSYNC_GPU 1 4
75,81 CRT_HSYNC_GPU 2 3
SRN10KJ-5-GP
<Core Design>
Wistron Corporation
Title
GPU-MEMORY/STRAPS(4/4)
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
Place blow decouping caps close VDD pin. Place blow decouping caps close VDD pin.
+1.5V_RUN +1.5V_RUN
DIVIDER RESISTORS DDR2/3 GDDR3
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
D D
C8401
C8402
C8403
C8404
C8405
C8406
C8407
C8408
C8409
C8410
C8411
C8412
C8413
C8414
C8415
C8416
C8417
C8418
C8419
C8420
C8421
C8422
MVREF TO 1.8V 100R 40.2R
1
DY DY
MVREF TO GND 100R 100R
2
+1.5V_RUN +1.5V_RUN +1.5V_RUN
U8401 U8402
MDA[0..63]
4K99R2F-L-GP
83,85 MDA[0..63]
1
K8 E3 MDA16 K8 E3 MDA26
VDD DQL0 VDD DQL0
R8403
K2 F7 MDA20 K2 F7 MDA25
VDD DQL1 MDA17 VDD DQL1 MDA28
N1 VDD DQL2 F2 N1 VDD DQL2 F2
VREF=0.75V R9 F8 MDA21 R9 F8 MDA24
VDD DQL3 83 RDQSA[0..3] VDD DQL3
B2 H3 MDA22 B2 H3 MDA29
2

D9 VDD DQL5 H8 D9 VDD DQL5 H8
VREFDQ_0_2 G7 G2 MDA18 VREFDQ_0_2 G7 G2 MDA27
4K99R2F-L-GP
R1 VDD DQL7 H7 83 WDQSA[0..3] R1 VDD DQL7 H7

1
N9 VDD N9 VDD
1
1
R8401
MDA7 MDA8
SCD1U10V2KX-4GP
DQU0 D7 DQU0 D7
C
C8423 A8 C3 MDA3 A8 C3 MDA9 C
SCD1U10V2KX-4GP VDDQ DQU1 MDA5 VDDQ DQU1 MDA11
A1 C8 A1 C8
2
2
+1.5V_RUN VDDQ DQU2 MDA2 VDDQ DQU2 MDA14
C1 C2 C1 C2
2
VDDQ DQU3 VDDQ DQU3
C8424
C9 A7 MDA0 C9 A7 MDA10
VDDQ DQU4 MDA4 VDDQ DQU4 MDA15
4K99R2F-L-GP
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2

1
E9 B8 MDA1 E9 B8 MDA12
VDDQ DQU6 VDDQ DQU6
R8405
Place C8423 C8425 F1 A3 MDA6 Place C8424 C8426 F1 A3 MDA13

VDDQ DQU7 VDDQ DQU7
H9 H9
close to H1 M8 H2
VDDQ
C7 RDQSA0 close to H1 M8 H2
VDDQ
C7 RDQSA1
VDDQ DQSU RDQSA0 83 VDDQ DQSU RDQSA1 83
B7 WDQSA0 B7 WDQSA1
WDQSA0 83 WDQSA1 83
2
DQSU# DQSU#
VREF=0.75V H1 VREFDQ H1 VREFDQ
VREFCA_0_2 M8 F3 RDQSA2 VREFCA_0_2 M8 F3 RDQSA3
VREFCA DQSL RDQSA2 83 VREFCA DQSL RDQSA3 83
ZQ_0_2 WDQSA2 ZQ_1_3 WDQSA3
4K99R2F-L-GP
L8 ZQ DQSL# G3 WDQSA2 83 L8 ZQ DQSL# G3 WDQSA3 83

1
1
R8408
ODTA0 ODTA0
243R2F-2-GP
243R2F-2-GP
ODT K1 ODTA0 83 ODT K1 ODTA0 83
1
R8407
R8410
C8425 MAA0 N3 MAA0 N3
SCD1U10V2KX-4GP MAA1 A0 MAA1 A0
SCD1U10V2KX-4GP
P7 P7
2
MAA2 A1 CSA0_0# MAA2 A1 CSA0_0#

P3 L2 CSA0_0# 83 P3 L2 CSA0_0# 83
2
2
A2 CS# A2 CS#
C8426
MAA3 N2 T2 MEM_RST MAA3 N2 T2 MEM_RST
MEM_RST 83,85 MEM_RST 83,85
2
2
MAA4 A3 RESET# MAA4 A3 RESET#
P8 A4 P8 A4
MAA5 P2 VRAM MAA5 P2 VRAM
MAA6 A5 MAA6 A5
R8 A6 NC#T7 T7 R8 A6 NC#T7 T7
MAA7 R2 L9 MAA7 R2 L9
MAA8 A7 NC#L9 MAA8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAA9 R3 J9 MAA9 R3 J9
MAA10 A9 NC#J9 MAA10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAA11 R7 MAA11 R7
MAA12 A11 MAA12 A11
N7 A12/BC# N7 A12/BC#
MAA13 T3 J8 MAA13 T3 J8
83,85 MAA[0..12] A13 VSS 83,85 MAA[0..12] A13 VSS
83,85 MAA13 M7 A15 VSS M1 83,85 MAA13 M7 A15 VSS M1
B
VSS M9 VSS M9 B
VSS J2 VSS J2
BA0 M2 P9 BA0 M2 P9
83,85 BA0 BA0 VSS 83,85 BA0 BA0 VSS
BA1 N8 G8 BA1 N8 G8
BA2 M3 B3 BA2 M3 B3
VSS T1 VSS T1
VSS A9 VSS A9
CLKA0 J7 T9 CLKA0 J7 T9
83 CLKA0 CK VSS 83 CLKA0 CK VSS
CLKA0# K7 E1 CLKA0# K7 E1
83 CLKA0# CK# VSS 83 CLKA0# CK# VSS
VSS P1 VSS P1
CKEA0 K9 CKEA0 K9
83 CKEA0 CKE 83 CKEA0 CKE
VSSQ G1 83 DQMA#[0..3] VSSQ G1
VSSQ F9 VSSQ F9
DQMA#0 D3 E8 DQMA#1 D3 E8
83 DQMA#0 DMU VSSQ 83 DQMA#1 DMU VSSQ
DQMA#2 E7 E2 DQMA#3 E7 E2
83 DQMA#2 DML VSSQ 83 DQMA#3 DML VSSQ
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
WEA0# L3 B9 WEA0# L3 B9
83 WEA0# W E# VSSQ 83 WEA0# W E# VSSQ
CASA0# K3 B1 CASA0# K3 B1
83 CASA0# CAS# VSSQ 83 CASA0# CAS# VSSQ
RASA0# J3 G9 RASA0# J3 G9
83 RASA0# RAS# VSSQ 83 RASA0# RAS# VSSQ
H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
R8411
CLKA0 1 2 CLKA0_GND
A A
<Core Design>
56R2J-4-GP
Wistron Corporation
1
R8412
CLKA0# 1 2 C8427 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD01U16V2KX-3GP Taipei Hsien 221, Taiwan, R.O.C.
2
56R2J-4-GP
Title
VRAM (1/2)
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
Place blow decouping caps close VDD pin. Place blow decouping caps close VDD pin.
+1.5V_RUN +1.5V_RUN
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C8501
C8502
C8503
C8504
C8505
C8506
C8507
C8508
C8509
C8510
C8511
C8512
C8513
C8514
C8515
C8516
C8517
C8518
C8519
C8520
C8521
C8522
1
1
D D
DY
2
+1.5V_RUN +1.5V_RUN MDA[0..63] +1.5V_RUN
83,84 MDA[0..63]
U8501 U8502
4K99R2F-L-GP
1
K8 E3 MDA37 K8 E3 MDA44
VDD DQL0 VDD DQL0
R8501
K2 F7 MDA36 K2 F7 MDA45
VDD DQL1 83 RDQSA[4..7] VDD DQL1
N1 F2 MDA39 N1 F2 MDA47
VREF=0.75V R9 VDD DQL3 F8 R9 VDD DQL3 F8
B2 H3 MDA32 B2 H3 MDA46
2

D9 VDD DQL5 H8 83 WDQSA[4..7] D9 VDD DQL5 H8
VREFDQ_4_6 G7 G2 MDA38 VREFDQ_4_6 G7 G2 MDA41
4K99R2F-L-GP
R1 VDD DQL7 H7 R1 VDD DQL7 H7

1
N9 VDD N9 VDD
1
1
R8502
MDA51 MDA62
SCD1U10V2KX-4GP
DQU0 D7 DQU0 D7
C8523 A8 C3 MDA53 A8 C3 MDA63
SCD1U10V2KX-4GP VDDQ DQU1 MDA48 VDDQ DQU1 MDA61
C A1 C8 A1 C8 C
2
2
+1.5V_RUN VDDQ DQU2 MDA55 VDDQ DQU2 MDA60
C1 C2 C1 C2
2
VDDQ DQU3 VDDQ DQU3
C8528
C9 A7 MDA49 C9 A7 MDA58
VDDQ DQU4 MDA54 VDDQ DQU4 MDA56
4K99R2F-L-GP
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2

1
E9 B8 MDA50 E9 B8 MDA59
VDDQ DQU6 VDDQ DQU6
R8505
Place C8523 C8525 F1 A3 MDA52 F1 A3 MDA57

VDDQ DQU7 VDDQ DQU7
close to H1 M8 H9 VDDQ Place C8528 C8529 H9 VDDQ
H2 C7 RDQSA6 H2 C7 RDQSA7
VDDQ DQSU
B7 WDQSA6
RDQSA6 83 close to H1 M8 VDDQ DQSU
B7 WDQSA7
RDQSA7 83
WDQSA6 83 WDQSA7 83
2
DQSU# DQSU#
VREF=0.75V H1 VREFDQ H1 VREFDQ
VREFCA_4_6 M8 F3 RDQSA4 VREFCA_4_6 M8 F3 RDQSA5
VREFCA DQSL RDQSA4 83 VREFCA DQSL RDQSA5 83
ZQ_4_6 WDQSA4 ZQ_5_7 WDQSA5
4K99R2F-L-GP
L8 ZQ DQSL# G3 WDQSA4 83 L8 ZQ DQSL# G3 WDQSA5 83

1
1
R8507
ODTA1 ODTA1
243R2F-2-GP
243R2F-2-GP
ODT K1 ODTA1 83 ODT K1 ODTA1 83
1
R8508
R8510
C8525 MAA0 N3 MAA0 N3
SCD1U10V2KX-4GP MAA1 A0 MAA1 A0
SCD1U10V2KX-4GP
P7 P7
2
MAA2 A1 CSA1_0# MAA2 A1 CSA1_0#

P3 L2 CSA1_0# 83 P3 L2 CSA1_0# 83
2
2
A2 CS# A2 CS#
C8529
MAA3 N2 T2 MEM_RST MAA3 N2 T2 MEM_RST
MEM_RST 83,84 MEM_RST 83,84
2
2
MAA4 A3 RESET# MAA4 A3 RESET#
P8 A4 P8 A4
MAA5 P2 MAA5 P2
MAA6 A5 MAA6 A5
R8 A6 NC#T7 T7 R8 A6 NC#T7 T7
MAA7 R2 L9 MAA7 R2 L9
MAA8 A7 NC#L9 MAA8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAA9 R3 J9 MAA9 R3 J9
MAA10 A9 NC#J9 MAA10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAA11 R7 VRAM MAA11 R7 VRAM
MAA12 A11 MAA12 A11
N7 A12/BC# N7 A12/BC#
MAA13 T3 J8 MAA13 T3 J8
83,84 MAA[0..12] A13 VSS 83,84 MAA[0..12] A13 VSS
83,84 MAA13 M7 A15 VSS M1 83,84 MAA13 M7 A15 VSS M1
VSS M9 VSS M9
B
VSS J2 VSS J2 B
BA0 M2 P9 BA0 M2 P9
BA1 N8 G8 BA1 N8 G8
BA2 M3 B3 BA2 M3 B3
VSS T1 VSS T1
VSS A9 VSS A9
CLKA1 J7 T9 CLKA1 J7 T9
83 CLKA1 CK VSS 83 CLKA1 CK VSS
CLKA1# K7 E1 CLKA1# K7 E1
83 CLKA1# CK# VSS 83 CLKA1# CK# VSS
VSS P1 VSS P1
CKEA1 K9 CKEA1 K9
83 CKEA1 CKE 83 DQMA#[4..7] 83 CKEA1 CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
DQMA#6 D3 E8 DQMA#7 D3 E8
83 DQMA#6 DMU VSSQ 83 DQMA#7 DMU VSSQ
DQMA#4 E7 E2 DQMA#5 E7 E2
83 DQMA#4 DML VSSQ 83 DQMA#5 DML VSSQ
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
WEA1# L3 B9 WEA1# L3 B9
83 WEA1# W E# VSSQ 83 WEA1# W E# VSSQ
CASA1# K3 B1 CASA1# K3 B1
83 CASA1# CAS# VSSQ 83 CASA1# CAS# VSSQ
RASA1# J3 G9 RASA1# J3 G9
83 RASA1# RAS# VSSQ 83 RASA1# RAS# VSSQ
H5TQ1G63BFR-12C-GP H5TQ1G63BFR-12C-GP
R8511
CLKA1 1 2 CLKA1_GND
A 56R2J-4-GP A
<Core Design>
1
CLKA1# 1
R8512
2 C8527 Wistron Corporation
SCD01U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
56R2J-4-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
VRAM (2/2)
Custom
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_GFX +PW R_SRC +PW R_SRC_GFX_CORE
+1.5V_SUS +1.5V_LDOIN_GFX PG8617

2 1
PG8602 +PW R_SRC_GFX_CORE
1 2 +5V_ALW GAP-CLOSE-PW R
PG8618
GAP-CLOSE-PW R 2 1
SC2200P50V2KX-2GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
PG8603
1
GAP-CLOSE-PW R
PC8602
PC8603
PC8604
D 1 2 D
PG8601
SC1U10V3KX-3GP
GAP-CLOSE-PW R 2 1
2
1
PG8605
PC8605
5
6
7
8
1 2 GAP-CLOSE-PW R
D
D
D
D
PG8619 PU8602 Design Current = 7.5A
2
-1.10/0302 GAP-CLOSE-PW R 1 2 SI7686DP-T1-GP
11.8<OCP<13.9A
1
+1.1V_RUN PC8618 PC8606 GAP-CLOSE-PW R
SC1U6D3V2KX-GP SCD1U10V2KX-4GP
14
Design current = 1.7A
G
S
S
S
PU8601
peak current = 2.5A TPS51511RHLRG4-GP
NC#2
V5IN
4
3
2
1
+VCC_GFX_CORE
+VCC_GFX_COREP
+1.1V_GFX_PCIE +1D1V_RUN_P +GFX_CORE_DRVH
PG8604 1 9 +GFX_CORE_VOUT
VLDOIN VOSW PL8601
1 2 3 10 +GFX_CORE_VFB PG8606
+GFX_CORE_VLDOFB VLDO VSWFB +GFX_CORE_LL
4 VLDOFB 1 2 2 1
GAP-CLOSE-PW R
ST330U2D5VDM-13GP
1
PC8607 PC8608 +GFX_ODOFF 11 GFX_MEM_VTT_ON_C IND-2D2UH-111-GP GAP-CLOSE-PW R
ST220U2D5VBM-2GP
SCD1U10V2KX-4GP
ENLDO
1
PR8602 6 12 GFX_CORE_EN PG8608

ODOFF ENSW
1
PG8607 15KR2F-GP +GFX_CORE_VFB1
PC8609
2 7 2 1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
R8603 OD
PTC8603
PTC8601
1 2 DY
2
1
130KR2F-GP 17 +GFX_CORE_DRVL GAP-CLOSE-PW R
2
2
DRVL
5
6
7
8
GAP-CLOSE-PW R +5V_ALW 8 18 +GFX_CORE_LL PG8610
GAP-CLOSE-PWR-3-GP
COMP LL
D
D
D
D
+GFX_CORE_DRVH PR8605 PC8610 PU8603 PR8604
PG8609 38 GFX_CORE_PW RGD 13
15
PGOOD DRVH 19
20 +GFX_CORE_VBST 2 1+GFX_CORE_LL1
1 2
DY 2D2R5F-2-GP PG8611
2 1
SIR460DP-T1-GE3-GP
CS VBST
1
1 2 GAP-CLOSE-PW R
2
1
2
0R3J-0-U-GP SCD1U25V3KX-GP
PGND
C GAP-CLOSE-PW R PR8606 PR8607 PC8611 C
GND
GND
SC1000P100V3KX-GP
30KR2F-GP
S
S
S
6K2R2F-GP
G
1
2
1
4
3
2
1
PC8612
VOUT = 0.5 *(1+Rtop/Rbot) DY
2
21
5
16
+5V_ALW 1 PR8608 2 SC330P50V3KX-GP
2
0R0603-PAD-2-GP +GFX_CORE_DRVL +GFX_CORE_VOUT
SC4D7U10V3KX-GP
PC8617
1
PC8613 PR8609 PG8612
SC1KP50V2KX-1GP
1
+3.3V_SUS 10KR2F-2-GP 1 2
2
GAP-CLOSE-PW R
2
PG8613
Vout=0.75V*(R1+R2)/R2
2
1
+GFX_CORE_VFB 1 2
PR8610 1 PR8611 2
38 GFX_CORE_ON
1
100KR2J-1-GP 0R0402-PAD-2-GP GAP-CLOSE-PW R
SCD01U50V2KX-1GP
GFX_CORE_EN PR8613
38,42,51,72 RUN_ON 1 2
DY DY
1
PR8612 0R2J-2-GP 39K2R2F-L-GP

PC8614
2
+3.3V_DELAY
2
2
GFX_CORE_PW RGD PG8614
PWRCNTL_1#
1 2
1
PD8602 GAP-CLOSE-PW R
1 PR8615 2 GFX_MEM_VTT_ON_C PR8625 PG8615
38 GFX_MEM_VTT_ON K
DY A 1
DY 2
1
1
0R0402-PAD-2-GP 10KR2F-2-GP
DY 1 2
D
PC8615 B0530W S-7-F-GP PR8623 PR8616
SCD1U10V2KX-4GP 5K1R2F-2-GP PQ8601 49K9R2F-L-GP GAP-CLOSE-PW R
DY PR8624
2
2
2N7002A-7-GP PG8616
PW RCNTL_1_R DY
81 PW RCNTL_1 1
DY 2 G 1 2
2
B B
2
10K7R2F-GP GAP-CLOSE-PW R
PC8601
100KR2J-1-GP
SCD047U16V2KX-1-GP
1
PR8622
DY
S
PWRCNTL_0=GPIO15 DY
VID1 VID0
2
PWRCNTL_1=GPIO20
1
GPIO20 GPIO15 Voltage +3.3V_RUN
x 1 0.9V
1
x 0 0.95V PR8617
10KR2F-2-GP
+3.3V_DELAY DY
Power team check
2
+GFX_ODOFF
1
PD8601
PR8620
10KR2F-2-GP
K
DY A 1
DY 2
D
B0530W S-7-F-GP PR8619

5K1R2F-2-GP PQ8602
2
2N7002A-7-GP
PW RCNTL_0_R DY
81 PW RCNTL_0 1
PR8621 DY 2
0R2J-2-GP
G
2
PC8616
100KR2J-1-GP
SCD047U16V2KX-1-GP
1
PR8618
DY
S
DY
2
A <Core Design> A
1
Wistron Corporation
1 PR8614 2 Title
0R0402-PAD-2-GP
Fonseca
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
Title
Fonseca 14.1" DIS
Custom
DC to DC 1.5V/1.1V -1
5 4 3 2 1
5 4 3 2 1
VERSION DATE NO PAGE Modified List Issue Description OWNER
02/24 1 54 Delete FUSE5401, C5407, C5408. Add C5410, C5411, C5412, U5402, R5427, R5426, EE
Q5405.
03/01 2 37,54 Rename net "EC_GPIO060" into "EN_INVPWR". Delete TP3702. Add R3741, 63.10434.1DL. To solve panel white screen issue on pulling off ADP and apply EE
D
it on again within 2 seconds. D
3 64 Add C6410, pop R6419. Solve +3.3V_ALW drop issue. EE
4 65 Add C6501, pop R6502. Solve +3.3V_ALW drop issue. EE
5 86 Add PC8618. Solve +1.5V_SUS drop issue. EE

03/02 6 42 Change C4208 to 470pF. Solve +5V_ALW drop issue. EE
7 32 R3214 change to short pad. EE
8 65 Add R6503, Q6501. +3.3V_RUN_WWAN discharge circuit. EE
9 71 Delete L7101, L7102. EE
10 37 R3703 change to 33k ohm. Change board ID. EE
03/03 11 72 Add extra power pins to U7202. Add Ricoh as express card power switch second source. EE
C C
12 47 PTC4702 pop. PTC4703 dummy. Add Ricoh as express card power switch second source. EE
-1
03/05 13 54 Change Q5405 to 84.2N702.E31. EE
14 65 Name net "WWAN_DIS". EE
15 58 XDP1, XDP2, R5803, R5804, R5806, C5803, C5802, R5808, R5807, TP5808, TP5810, Change the symbols so that when SMT, solder paste will not be EE
TP5815, TP5802, TP5803, TP5804, TP5805, TP5806, TP5807, TP5809, TP5811, TP5812, applied onto the locations.
03/08 TP5801, TP5813, TP5814 change symbols.
EE
16 24 Delete AFTP2401, AFTP2402.
17 7,23, Delete RN701, RN703, RN704, RN705, R708, RN2311, RN2302, RN2306, RN2307, RN2308, EE
25 RN2301, RN2505.
18 40 C4002 pop. EE
B 03/10 19 55 Add AFTP5502, AFTP5503, AFTP5504. Factory request. EE B
20 67 C6705, C6704 set as SC. Smart Card use only. EE
21 70 R7001 dummy. EE
22 78 Delete EL7801. Common mode choke longer needed. EE
23 67 Change Smart Card socket into 21.H0136.011, Smart Card connector into EE
62.10024.C11.
03/17
24 68 Change SW1 into 62.40018.601. EE
25 79 Change H18 and H19 into ZZ.00PAD.S31. EE
A <Core Design> A
Wistron Corporation
Title
Change List - 1
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1
5 4 3 2 1
VERSION DATE NO PAGE Modified List Issue Description OWNER

26 9 Dummy R903, R913, Q901, C901. CPU_CATERR# continously pull high. EE
03/18 27 67 Add C6706, 78.27134.1FL. Eliminate ripple. EE
D 28 64 Remove EL6401. EE D
29 67 Change R6705 into 63.10334.1DL, C6704 into 78.22034.1FL, C6705 into 78.39124.2FL, Smart card VCC ripple eliminate. EE
03/19 R6701 change to 63.R0034.1DL.
03/22 30 46 Change PR4647 into 64.32425.6DL. Raise +5V_ALW voltage level. EE
C C
-1
B B
A <Core Design> A
Wistron Corporation
Title
Change List - 2
A3 -1
Fonseca 14.1" DIS
5 4 3 2 1

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5 4 3 2 1

rPGA988A Mobile Arrandale

Fonseca 14" DIS Block Diagram Project name: DF3-14D

Arrandale 80,81,82,83 +PWR_SRC +VCC_CORE

Thermal & Fan DDR III DIMM2 Channel B

VSW INPUTS OUTPUTS

HDD CONN 59 SPEAKER

Int KB KSI/KSO BC IO Board 76

+1.2V_LOM 35 Taipei Hsien 221, Taiwan, R.O.C.

202 DIMM B(DM2) SMB Addr=[A4]

2.2K 2.2K LCD Panel

B52 connector Wistron Corporation

Audio Block Diagram

SPKR_PORT_D_L- AUD_SPK_L- AUD_SPK_L-_R

PCH Strapping Processor Strapping

HDA_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.

SSID = CLOCK +3.3V_RUN +3.3V_RUN

1 L701 2 +3.3V_RUN_CLKGEN +1.05V_RUN_CLKGEN_IO

C710 C711 C712 C713

Main Source: 71.08585.003 (SLG8SP585VTR) +3.3V_RUN_CLKGEN

2nd Source: 71.93197.003 (ICS9LRS3197AKLFT)

A FSC X701 <Core Design> A

PCI EXPRESS -- GRAPHICS

C26 PEG_CTX_GRX_C_N0 1 2 C802 SCD1U10V2KX-4GP PEG_CTX_GRX_N0

PEG_TX3 PEG_CTX_GRX_C_P11 C827 SCD1U10V2KX-4GP PEG_CTX_GRX_P11

CPU - PCIE/DMI/FDI (1/7)

PM_EXT_TS1# R914 10KR2J-3-GP

DY C901 AN28 XDP_TCLK

58 H_CPURST# RESET_OBS# TMS

JTAG & BPM

21,58,80 PLTRST1# 1 2 PLT_RST#_R AL14 XDP_TMS 1 DY 2

R920 0R0402-PAD-2-GP A DRAM_PW ROK_R DRAM_PW ROK R933

CPU Thermal/Clock/PM (2/7)

SSID = CPU CPU1D 4 OF 9

M_A_DQ39 AJ6 AK9 M_A_DQS#5 M_B_DQ42 AM6

DDR SYSTEM MEMORY - B

CPU - DDR (3/7)

CPU Piin AJ13 and AJ12:

15 -> 0, 14 -> 1, ... RSVD_TP#R9

0:Enabled; An external Display Port RSVD_TP#AE5

R1103 Clarksfield samples.

Note: Only temporary for early CFD sample <Core Design>

SSID = CPU CPU1F 6 OF 9

R28 AJ34 1 2 VCC_SENSE 47

Size Document Number

C1316 C1317 +1.05V_VTT

PEG & DMI

H27 VTT1 VTT1 H19

CPU - GFXCORE (6/7)

NCTF TEST PIN:

CPU - VSS (7/7)

SSID = Memory SO-DIMMA

0R0603-PAD-2-GP M_A_DQ41 DQ40 VSS

B 0R0603-PAD-2-GP M_A_DQ55 176 44 B

M_A_DQ58 DQ57 VSS

+0.75V_DDR_VTT C1822 M_A_DQS#4 DQS3# VSS

M_A_DQS#7 186 144 C1829 SCD1U16V2ZY-2GP

M_A_DQS3 DQS2 VSS

C1823 C1824 C1825 C1826 M_VREF_CA_DIMM1 VSS

0R0603-PAD-2-GP M_B_DQ36 DQ35 VDD15

M_B_DQ39 DQ38 VDD18

0R0603-PAD-2-GP M_B_DQ50 175 31 DY DY

M_B_DQ53 DQ52 VSS