Yamaha RX v573 HTR 5065 PDF

AV RECEIVER
RX-V573/HTR-5065 SERVICE MANUAL

Note: When the following parts are replaced, the model name MUST be written to the back-up IC (EEPROM: IC22 on
DIGITAL P.C.B.) to have proper operation. (For details, refer to “S5. SOFT SWITCH” menu of the self-diagnostic
function.)
注意：下記の部品を交換した場合、正常動作のためにモデル名をバックアップ IC（EEPROM：DIGITAL P.C.B. の IC22）へ

書き込む必要があります。（詳細は、ダイアグの S5. SOFT SWITCH メニューを参照してください。）
• DIGITAL P.C.B.
• EEPROM: IC22 on DIGITAL P.C.B.
IMPORTANT NOTICE
This manual has been provided for the use of authorized YAMAHA Retailers and their service personnel.
It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are already known
and understood by the users, and have therefore not been restated.
WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury,
destruction of expensive components, and failure of the product to perform as specified. For these reasons, we advise
all YAMAHA product owners that any service required should be performed by an authorized YAMAHA Retailer or
the appointed service representative.
RX-V573/HTR-5065
IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification or
recognition of any applicable technical capabilities, or establish a principle-agent relationship of any form.
The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, and service
departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitable and
specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the
distributor's Service Division.
WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may have
accumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss).
IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit.
■ CONTENTS
TO SERVICE PERSONNEL ............................................2 POWER AMPLIFIER ADJUSTMENT /
FRONT PANELS .............................................................3 パワーアンプ調整 ..........................................................51
REAR PANELS ...........................................................4–7 DISPLAY DATA .......................................................52–53
REMOTE CONTROL PANEL ..........................................8 IC DATA ...................................................................54–73
SPECIFICATIONS / 参考仕様 ................................... 9–14 BLOCK DIAGRAMS ................................................ 74–75
INTERNAL VIEW .......................................................... 15 PRINTED CIRCUIT BOARDS ................................. 76–89
SERVICE PRECAUTIONS / サービス時の注意事項 ..... 15 PIN CONNECTION DIAGRAMS ...................................90
DISASSEMBLY PROCEDURES / 分解手順 ........... 16–18 SCHEMATIC DIAGRAMS ..................................... 91–100
UPDATING FIRMWARE / REPLACEMENT PARTS LIST .............................101–115
ファームウェアのアップデート .............................. 19–20 REMOTE CONTROL ............................................116–118
SELF-DIAGNOSTIC FUNCTION / CONFIGURING THE SYSTEM SETTINGS ................. 119
ダイアグ（自己診断機能）.......................................21–50 システム設定を変更する ............................................. 120
FIRMWARE UPDATING PROCEDURE .............. 121–126
ファームウェア更新手順 ..................................... 127–132
Copyright © 2012 All rights reserved.

101236 This manual is copyrighted by YAMAHA and may not be copied or
redistributed either in print or electronically without permission.
P.O.Box 1, Hamamatsu, Japan
'12.04
RX-V573/HTR-5065
■ TO SERVICE PERSONNEL AC LEAKAGE

1. Critical Components Information WALL EQUIPMENT TESTER OR
Components having special characteristics are marked and OUTLET UNDER TEST EQUIVALENT
must be replaced with parts having specifications equal to those
originally installed.
2. Leakage Current Measurement (For 120V Models Only)
When service has been completed, it is imperative to verify
INSULATING
that all exposed conductive surfaces are properly insulated TABLE
from supply circuits.
• Meter impedance should be equivalent to 1500 ohms shunted • Leakage current must not exceed 0.5mA.
by 0.15 μF. • Be sure to test for leakage with the AC plug in both polarities.
For U model
“CAUTION”
“F5402: FOR CONTINUED PROTECTION AGAINST RISK OF FIRE, REPLACE ONLY WITH SAME TYPE 6A,
125V FUSE.”
For C model
CAUTION
F5402: REPLACE WITH SAME TYPE 6A, 125V FUSE.
ATTENTION
F5402: UTILISER UN FUSIBLE DE RECHANGE DE MÉME TYPE DE 6A, 125V.
WARNING: CHEMICAL CONTENT NOTICE!

This product contains chemicals known to the State of California to cause cancer, or birth defects or other reproductive
harm.
RX-V573/HTR-5065
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON
WHATSOEVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or
expose eyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before
handling food.
About lead free solder / 無鉛ハンダについて

All of the P.C.B.s installed in this unit and solder joints are 本機に搭載されているすべての基板およびハンダ付けに
soldered using the lead free solder. よる接合部は無鉛ハンダでハンダ付けされています。
Among some types of lead free solder currently available, 無鉛ハンダにはいくつかの種類がありますが、修理時に
it is recommended to use one of the following types for は下記のような無鉛ハンダの使用を推奨します。
the repair work. Sn+Ag+Cu（錫 + 銀 + 銅）
• Sn + Ag + Cu (tin + silver + copper) Sn+Cu（錫 + 銅）
• Sn + Cu (tin + copper) Sn+Zn+Bi（錫 + 亜鉛 + ビスマス）
• Sn + Zn + Bi (tin + zinc + bismuth)
注意：
Caution: 無鉛ハンダの融点温度は通常の鉛入りハンダに比べ 30 ∼
As the melting point temperature of the lead free solder 40℃程度高くなっていますので、それぞれのハンダに合っ
is about 30°C to 40°C (50°F to 70°F) higher than that of たハンダごてをご使用ください。
the lead solder, be sure to use a soldering iron suitable
to each solder.
2
RX-V573/HTR-5065
■ FRONT PANELS
RX-V573
U, C, R, T, K, A, B, G, F, L models
J model
HTR-5065
RX-V573/HTR-5065
3
RX-V573/HTR-5065
■ REAR PANELS
RX-V573 (U, C models)
RX-V573 (R model)
RX-V573/HTR-5065
RX-V573 (T model)
4
RX-V573/HTR-5065
RX-V573 (K model)
RX-V573 (A model)
RX-V573/HTR-5065
RX-V573 (B, G, F models)
5
RX-V573/HTR-5065
RX-V573 (L model)
RX-V573 (J model)
RX-V573/HTR-5065
6
RX-V573/HTR-5065
HTR-5065 (U model)
HTR-5065 (F model)
RX-V573/HTR-5065
7
RX-V573/HTR-5065
■ REMOTE CONTROL PANEL

RAV465
Remote control sheet

(T model)
RX-V573/HTR-5065
8
RX-V573/HTR-5065
■ SPECIFICATIONS / 参考仕様
■ Audio Section / オーディオ部
Rated Output Power (Power Amplifier Section) / Frequency Response / 再生周波数帯域 (10 Hz to 100 kHz)
定格出力（パワーアンプ部） AV5 etc., FRONT ..................................................................0 / -3 dB
(1 kHz, 0.9 % THD) Signal to Noise Ratio / 信号対雑音比 (IHF-A network)
– 1 channel driven – AV5, etc. (PURE DIRECT) to SP OUT (Input shorted 250 mV)
U, C models (8 ohms) .............................................................................. 100 dB or more
FRONT L/R ................................................................ 115 W/ch Residual Noise / 残留ノイズ (IHF-A Network)
CENTER .......................................................................... 115 W FRONT L/R to SP OUT ................................................150 μV or less
SURROUND L/R ........................................................ 115 W/ch
SURROUND BACK L/R ............................................. 115 W/ch Channel Separation / チャンネルセパレーション
AV5, etc. (Input 5.1 k-ohms shorted)
R, T, K, A, B, G, F, L, J models (6 ohms)
1 kHz / 10 kHz ............................... 60 dB or more / 45 dB or more
FRONT L/R ................................................................ 115 W/ch
CENTER .......................................................................... 115 W Volume Control / 可変範囲／ステップ
SURROUND L/R ........................................................ 115 W/ch ......................................... MUTE / -80 dB to +16.5 dB / 0.5 dB step
SURROUND BACK L/R ............................................. 115 W/ch
Tone Control Characteristics / トーンコントロール特性
– 2 channels driven simultaneously –
FRONT L/R
U, C models (8 ohms)
Bass
FRONT L/R ...........................................................95 W + 95 W
Boost/Cut ...................................... ±6 dB / 0.5 dB step, at 50 Hz
CENTER ............................................................................ 95 W
Turnover frequency .......................................................... 350 Hz
SURROUND L/R ...................................................95 W + 95 W
SURROUND BACK L/R ........................................95 W + 95 W Treble
Boost/Cut .....................................±6 dB / 0.5 dB step, at 20 kHz
(20 Hz to 20 kHz, 0.09 % THD)
Turnover frequency ......................................................... 3.5 kHz
– 2 channels driven simultaneously –
Filter Characteristics / フィルタ特性
U, C models (8 ohms)
FRONT L/R ...........................................................80 W + 80 W FRONT, CENTER, SURROUND, SURROUND BACK small (H.P.F.)
.................... fc=40/60/80/90/100/110/120/160/200 Hz, 12 dB/oct.
R, T, K, A, B, G, F, L, J models (6 ohms)
FRONT L/R ...........................................................80 W + 80 W SUBWOOFER small (L.P.F.)
.................... fc=40/60/80/90/100/110/120/160/200 Hz, 24 dB/oct.
Maximum Effective Output Power / 実用最大出力 (JEITA)
RX-V573/HTR-5065
(1 kHz, 10 % THD, 6 ohms / 1 channel driven) Optical Jack, Coaxial Jack Support Frequencies /
[R, T, K, L J models] Optical 端子、Coaxial 端子対応 fs
FRONT L/R ......................................................................... 135 W/ch ............................................................................... 32 kHz to 96 kHz
CENTER .................................................................................. 135 W
SURROUND L/R ................................................................ 135 W/ch
■ Video Section / ビデオ部
SURROUND BACK L/R ..................................................... 135 W/ch
Video Signal Type / ビデオ信号方式
Dynamic Power Per Channel / ダイナミックパワー (IHF)
U, C, R, K, J models ................................................................ NTSC
FRONT L/R drive
T, A, B, G, F, L models ................................................................ PAL
U, C models
(8 / 6 / 4 ohms) ................................................ 110 / 130 / 160 W Composite Video Signal Level / コンポジットビデオ信号
R, T, K, A, B, G, F, L, J models ...............................................................................1 Vp-p / 75 ohms
(6 / 4 ohms) .............................................................. 110 / 130 W Component Video Signal Level / コンポーネントビデオ信号
Dynamic Headroom [U, C models] Y .............................................................................1 Vp-p / 75 ohms
8 ohms ....................................................................................0.2 dB Pb/Pr ...................................................................0.7 Vp-p / 75 ohms
Damping Factor / ダンピングファクター (20 Hz to 20 kHz, 8 ohms) Video Maximum Input Level / ビデオ最大許容入力
FRONT L/R to SPEAKER-A ............................................ 120 or more (VIDEO Conversion Off)
Input Sensitivity/Input Impedance / 入力感度／入力インピーダンス ............................................................................... 1.5 Vp-p or more
(1 kHz, 100 W/8 ohms) Video Signal to Noise Ratio / ビデオ信号対雑音比
AV5 etc. ............................................................ 200 mV / 47 k-ohms ................................................................................... 50 dB or more
Maximum Input Signal / 最大許容入力 (1 kHz, 0.5 % THD) Monitor Out Frequency Response / モニター出力周波数帯域
AV5 etc. (EFFECT ON) .............................................................. 2.3 V (VIDEO Conversion Off)
Output Level/Output Impedance / 出力電圧／出力インピーダンス Component video signal level / コンポーネントビデオ信号
AV OUT ............................................................ 200 mV / 1.2 k-ohms ....................................................................5 Hz to 60 MHz, -3 dB
SUBWOOFER (2 ch stereo and FRONT SP: small) D4 video signal / D4 ビデオ信号 [J model]
............................................................................. 1 V / 1.2 k-ohms .....................................................................5 Hz to 60 MHz, -3 dB
Headphone Jack Rated Output/Output Impedance /

ヘッドホン出力／出力インピーダンス (1 kHz, 50 mV, 8 ohms)
AV5 etc. input ..................................................... 100 mV / 470 ohms
9
RX-V573/HTR-5065
■ FM Section / FM 部
Tuning Range / 受信周波数範囲 Finish / 仕上げ

U, C models ......................................................... 87.5 to 107.9 MHz [RX-V573]
R, L models ......................87.5 to 108.0 MHz / 87.50 to 108.00 MHz T model ..........................................................................Gold color
U, C, R, T, K, A, B, G, F, L, J models ............................ Black color
T, K, A, B, G, F models .................................... 87.50 to 108.00 MHz
R, K, B, G, F, L models .............................................Titanium color
J model .................................................................. 76.0 to 90.0 MHz
[HTR-5065]
50 dB Quieting Sensitivity / 50 dB SN 感度 (IHF) U, F models .................................................................. Black color
(1 kHz, 100 % MOD.)
Accessories / 付属品
Mono ......................................................................... 3 μV (20.8 dBf)
Remote control ..............................................................................x 1
Signal to Noise Ratio / 信号対雑音比 (IHF)
Battery (R03, AAA, UM-4) .............................................................x 2
Mono ........................................................................................71 dB
FM antenna (1.4 m) ......................................................................x 1
Stereo ......................................................................................69 dB
AM antenna (1.0 m) ......................................................................x 1
Harmonic Distortion / 歪率 (1 kHz) YPAO microphone (6.0 m) ............................................................x 1
Mono ........................................................................................ 0.3 % Remote control sheet (T model) ...................................................x 1
Stereo ...................................................................................... 0.5 %
Antenna Input / アンテナ入力

* Specifications are subject to change without notice.
....................................................................... 75 ohms unbalanced
※ 参考仕様および外観は、製品の改良のため予告なく変更すること
があります。
■ AM Section / AM 部
Tuning Range / 受信周波数範囲 U .......................U.S.A. model B ......................British model

C .................Canadian model G .................European model
U, C models ........................................................... 530 to 1,710 kHz R ....................General model F .................... Russian model
R, L models .............................. 530 to 1,710 kHz / 531 to 1,611 kHz T .................... Chinese model L .................Singapore model
K ..................... Korean model J .................. Japanese model
T, K, A, B, G, F, J models ....................................... 531 to 1,611 kHz
A ................Australian model
Antenna / アンテナ
RX-V573/HTR-5065
..................................................................................... Loop antenna
■ General / 総合
Power Supply / 電源電圧 Manufactured under license from Dolby Laboratories. Dolby, Pro Logic and
U, C models ............................................................ AC 120 V, 60 Hz the double-D symbol are trademarks of Dolby Laboratories.
ドルビーラボラトリーズからの実施権に基づき製造されています。「ドルビー」、
R model .......................................AC 110–120/220–240 V, 50/60 Hz
「Pro Logic」およびダブル D 記号はドルビーラボラトリーズの商標です。
T model ................................................................... AC 220 V, 50 Hz
K model .................................................................. AC 220 V, 60 Hz
A model .................................................................. AC 240 V, 50 Hz
B, G, F models ........................................................ AC 230 V, 50 Hz DTS-HD, the Symbol, & DTS-HD and the Symbol together are registered
trademarks & DTS-HD Master Audio is a trademark of DTS, Inc. Product
L model ...................................................... AC 220–240 V, 50/60 Hz includes software. © DTS, Inc. All Rights Reserved.
J model .............................................................. AC 100 V, 50/60 Hz DTS-HD および記号は DTS 社の登録商標です。また、DTS-HD Master Audio は
DTS 社の商標です。製品にはソフトウェアを含みます。著作権 DTS 社。不許複製。
Power Consumption / 消費電力
U, C models ..............................................................270 W / 320 VA
R, T, K, A, B, G, F, L models .................................................... 280 W
J model ................................................................................... 175 W AirPlay, the AirPlay logo, iPad, iPhone, iPod, iPod nano, and iPod touch are
trademarks of Apple Inc., registered in the U.S. and other countries.
Standby Power Consumption (reference data) /
AirPlay、AirPlay ロゴ、iPad、iPhone、iPod、iPod nano、iPod touch は、米国
待機時消費電力（参考値）
およびその他の国々で登録されている Apple Inc. の商標です。
HDMI control: OFF / Standby through: OFF .................0.1 W or less
HDMI control: ON / Standby through: ON
INPUT: HDMI1 (HDMI no signal)
............................................................................. 1.0 W (typical)
Network standby: ON ................................................ 2.0 W (typical)
Dimensions (W x H x D) / 寸法（幅 × 高さ × 奥行き） MPEG Layer-3 audio coding technology licensed from Fraunhofer IIS and
............................... 435 x 161 x 315 mm (17-1/8" x 6-3/8" x 12-3/8") Thomson.
Weight / 質量 MPEG Layer 3 音声圧縮技術は Fraunhofer IIS および Thomson によってライセン

ス供与されています。
............................................................................... 8.2 kg (18.1 lbs.)
10
RX-V573/HTR-5065
DLNA™ and DLNA CERTIFIED™ are trademarks or registered trademarks

This receiver supports network connections.
of Digital Living Network Alliance. All rights reserved. Unauthorized use is
本機はネットワーク接続に対応しています。 strictly prohibited.
DLNA ™ および DLNA CERTIFIED ™ はデジタルリビングネットワークアライアン
スの登録商標です。無断使用は固く禁じられています。
“HDMI,” the “HDMI” logo and “High-Definition Multimedia Interface” are

trademarks, or registered trademarks of HDMI Licensing LLC.
Windows is a registered trademark of Microsoft Corporation in the United
HDMI、HDMI ロゴ、および High-Deﬁnition Multimedia Interface は、HDMI States and other countries.
Licensing, LLC の商標または登録商標です。
Windows は米国 Microsoft Corporation の米国およびその他の国における登録商
標です。
“x.v.Color” is a trademark of Sony Corporation.

Windows XP, Windows Vista, Windows 7, Windows Media Audio, Windows
「x.v.Color」は、ソニー株式会社の商標です。 Media Connect and Windows Media Player are either registered trademarks
or trademarks of Microsoft Corporation in the United States and/or other
countries.
Windows XP、Windows Vista、Windows 7、Windows Media Audio、Windows
Media Connect、Windows Media player は、米国 Microsoft Corporation の米
“SILENT CINEMA” is a trademark of Yamaha Corporation.
国およびその他の国における登録商標、または商標です。
「サイレントシネマ™ SILENT CINEMA ™」はヤマハ株式会社の登録商標です。
AAC ロゴマークはドルビーラボラトリーズの商標です。
RX-V573/HTR-5065
• DIMENSIONS
(7/8")
(1-7/8")
ø 60
22
Top view
47
275 (10-7/8")
315 (12-3/8")
170 (6-5/8")
58
(2-1/4")
18
(3/4")
50 335 (13-1/4")
(2")
Front view
140 (5-1/2")
161 (6-3/8")
21
(7/8")
Unit: mm (inch)
435 (17-1/8") 単位：mm（インチ）
11
RX-V573/HTR-5065
• SELECT MENU
Sound Field Effects (CINEMA DSP)
Unit Sound Program CINEMA DSP 3D Music Enhancer
MOVIE Standard ○ ○
Spectacle ○ ○
Sci-Fi ○ ○
Adventure ○ ○
Drama ○ ○
Mono Movie ○ ○
Sports ○ ○
Action Game ○ ○
Roleplaying Game ○ ○
MUSIC Hall in Munich ○ ○
Hall in Vienna ○ ○
Chamber ○ ○
Cellar Club ○ ○
The Roxy Theatre ○ ○
The Bottom Line ○ ○
Music Video ○ ○
RX-V573/HTR-5065
2ch Stereo ○
7ch Stereo ○
SUR. DECODE (*1) ○
*1 Decode Type
Pro Logic
PLIIx Movie
PLIIx Music
Decode Type
PLIIx Game
Neo: 6 Cinema
Neo: 6 Music
12
RX-V573/HTR-5065
• SET MENU TABLE
MAIN
SUB-MENU PARAMETER VALUE [INITIAL VALUE]
MENU
Speaker Configuration Power Amp Assign [Basic] / BI-AMP / Zone B
Subwoofer [Use] / None
Front [Small] / Large
Center [Small] / Large / None
Surround [Small] / Large / None
Surround Back Small x1 / [Small x2] / Large x1 / Large x2 / None
Crossover 40 Hz / 60 Hz / [80 Hz] / 90 Hz / 100Hz / 110 Hz / 120 Hz / 160 Hz /
200 Hz
Subwoofer Phase [Normal] / Reverse
Extra Bass [Off] / On
Distance Unit Feet / Meter
Front L 0.30 to 24.00 m, [3.00 m], 0.05 m step
Front R 1.0 to 80.0 ft, [10.0 ft], 0.2 ft step
Center 0.30 to 24.00 m, [2.60 m], 0.05 m step
1.0 to 80.0 ft, [8.6 ft], 0.2 ft step
Surround L
Surround R 0.30 to 24.00 m, [2.40 m], 0.05 m step
Surround Back L 1.0 to 80.0 ft, [8.0 ft], 0.2 ft step
Surround Back R
Subwoofer 0.30 to 24.00 m, [3.00 m], 0.05 m step
1.0 to 80.0 ft, [10.0 ft], 0.2 ft step
Level Front L
-10.0 to +10.0 dB, [0.0 dB], 0.5 dB step
Front R
Center
Surround L
RX-V573/HTR-5065
Surround R -10.0 to +10.0 dB, [-1.0 dB], 0.5 dB step
Surround Back L
Surround Back R
Subwoofer -10.0 to +10.0 dB, [0.0 dB], 0.5 dB step
Equalizer EQ Select PEQ / [GEQ] / Off
* “PEQ” is available only when the YPAO has been performed
“PEQ” は自動測定（YPAO）を行った場合のみ選択可能
GEQ Edit Front L 63 Hz ···········||···········
Front R 160 Hz ···········||···········
Center 400 Hz ···········||···········
Surround L 1 kHz ···········||··········· -6.0 to +6.0 dB, [0 dB], 0.5 dB step
Surround R 2.5 kHz ···········||···········
6.3 kHz ···········||···········
16 kHz ···········||···········
Test Tone [Off] / On
HDMI Configuration HDMI Control [Off] / On (U, C, R, T, K, A, B, G, F, L models), Off / [On] (J model)
Audio Output Amp Off / [On]
HDMI OUT (TV) [Off] / On
* This setting is available only when “HDMI Control” is set to “Off”.
“HDMI Control” が “Off” の場合のみ設定可能
Standby Through [Off] / On
* This setting is available only when “HDMI Control” is set to “Off”.
“HDMI Control” が “Off” の場合のみ設定可能
TV Audio Input AV1 / AV2 / AV3 / [AV4] / AV5 / AUDIO1 / AUDIO2
Standby Sync Off / On / [Auto]
ARC Off / [On]
SCENE BD / DVD
Off / [On]
TV
NET
[Off] / On
RADIO
13
RX-V573/HTR-5065
MAIN
SUB-MENU PARAMETER VALUE [INITIAL VALUE]
MENU
Sound DSP Parameter CINEMA DSP 3D Mode Off / [On]
Panorama [Off] / On
Center Width 0 to 7, [3]
Dimension -3 to +3, [0]
Center Image 0.0 to 1.0, [0.3]
Lipsync Select Manual / [Auto]
Adjustment 0 to 250 ms, [0 ms], 1 ms step
Volume Dynamic Range [Maximum] / Standard / Min/Auto
Max Volume -30.0 to +15.0 dB / +16.5 dB (Maximum volume), [+16.5 dB], 5.0 dB step
Initial Volume [Off] / Mute / -80.0 to +16.5 dB, 0.5 dB step
ECO Auto Power Down U, C, R, T, K, A, L, J models: [Off] / 2 hours / 4 hours / 8 hours /
12 hours
B, G, F models: Off / 2 Hours / 4 Hours / [8 Hours] / 12 Hours
ECO Mode [Off] / On
Function Input Rename Input sources: HDMI1 / HDMI2 / HDMI3 / HDMI4 / AV1 / AV2 / AV3 /
AV4 / AV5 / AV6 / AUDIO / USB / V-AUX
Input is possible to 9 characters
Input possible Character type
Capital: A to Z
Small: a to z
Figure: 0 to 9
Symbols: + , - etc.
Space
Preset name select: Blu-ray / DVD / SetTopBox / Game / TV / DVR /
CD / CD-R / Satellite / VCR / Tape / MD / PC /
RX-V573/HTR-5065
iPod / HD DVD
Dimmer -4 to 0 (higher to brighten), [0]
Memory Guard [Off] / On
Network IP Address DHCP Off / [On]
IP Address xxx.xxx.xxx. x
Subnet Mask xxx.xxx.xxx. x
Default Gateway xxx.xxx.xxx. x
DNS Server (Primary) x. x. x. x
(Secondary) x. x. x. x
* This setting is available only when “DHCP” is set to “Off”.
“DHCP” が “Off” の場合のみ設定可能
MAC Address Filter [Off] / On
MAC Address 1–10 xx:xx:xx:xx:xx:xx
* This setting is available only when “MAC Address Filter” is set to “On”.
“MAC Address Filter” が “On” の場合のみ設定可能
DMC Control Disable / [Enable]
Network Standby [Off] / On
Network Name Input is possible to 15 characters
Information MAC Address xx:xx:xx:xx:xx:xx
IP Address xxx.xxx.xxx. x
Subnet Mask xxx.xxx.xxx. x
Default Gateway xxx.xxx.xxx. x
DNS Server (Primary) x. x. x. x
(Secondary) x. x. x. x
Status The connection status of the NETWORK jack
vTuner ID xxxxxxxxxxxx
Network Update Perform Update
Firmware Version x.xx
System ID xxxxxxxx
Language English (English) / Français (French) / Deutsch (German) /
(U, C, R, T, K, A, B, G, F, L models) Español (Spanish) / Рyccкий (Russian) / 中文 (Chinese)
14
RX-V573/HTR-5065
■ INTERNAL VIEW
Rear view
1 2 1 AM/FM TUNER
2 MAIN (5) P.C.B. (R model)
3 OPERATION (2) P.C.B.
4 MAIN (4) P.C.B.
5 MAIN (1) P.C.B.
6 DIGITAL P.C.B.
8 MAIN (3) P.C.B.
9 MAIN (2) P.C.B.
Top view
10 MAIN (6) P.C.B.
3 4 5 6 7 8 9
14 POWER TRANSFORMER
14 13 12 11 10
Front view
15 16 17
RX-V573/HTR-5065
18
■ SERVICE PRECAUTIONS / サービス時の注意事項

Safety measures 安全対策
• Some internal parts in this product contain high voltages ・この製品の内部には高電圧部分があり危険です。修理
and are dangerous. の際は、絶縁性の手袋を使用するなどの安全対策を
Be sure to take safety measures during servicing, such 行ってください。
as wearing insulating gloves.
• Note that the capacitors indicated below are dangerous ・下記のコンデンサには電源を OFF にした後も電荷が残
even after the power is turned off because an electric り、高電圧が維持されており危険です。
charge remains and a high voltage continues to exist 修理作業前に放電用抵抗（5 k Ω /10 W）を下記の各コ
there. ンデンサの端子間に接続して放電してください。
Before starting any repair work, connect a discharging 放電所用時間は各々約 30 秒間です。
resistor (5 k-ohms/10 W) to the terminals of each
MAIN（1）P.C.B. の C2084、C2085
capacitor indicated below to discharge electricity.
The time required for discharging is about 30 seconds OPERATION（2）P.C.B. の C5407
per each. 詳しくは PRINTED CIRCUIT BOARDS を参照してくだ
C2084 and C2085 on MAIN (1) P.C.B. さい。
C5407 on OPERATION (2) P.C.B.
For details, refer to “PRINTED CIRCUIT BOARDS”.
15
RX-V573/HTR-5065
■ DISASSEMBLY PROCEDURES / 分解手順

(Remove parts in the order as numbered.) （番号順に部品を外してください。）
Disconnect the power cable from the AC outlet. AC 電源コンセントから、電源コードを抜いてください。
1. Removal of Top Cover 1. トップカバーの外し方

a. Remove 4 screws (①) and 5 screws (②). (Fig. 1) a. ① のネジ 4 本、② のネジ 5 本を外します。（Fig. 1）
b. Lift the rear of the top cover to remove it. (Fig. 1) b. トップカバーの後部を持ち上げ、外します。（Fig. 1）
2. Removal of Front Panel Unit 2. フロントパネルユニットの外し方

a. Remove 7 screws (③), and remove W4761. (Fig. 1) a. ③ のネジ 7 本を外し、W4761 を外します。（Fig. 1）
b. Remove CB21, CB61, CB371, CB477 and CB952. b. CB21、CB61、CB371、CB477、CB952 を外します。
（Fig. 1）
(Fig. 1) c. ロックを外し、CB525 を外します。（Fig. 1）
c. Unlock and remove CB525. (Fig. 1) d. フック 2 箇所を外し、フロントパネルユニットを外し
d. Release 2 hooks on both ends and remove the front ます。（Fig. 1）
panel unit. (Fig. 1)
Remove CB525 Top cover

1 Unlock the connector
コネクターロック解除トップカバー
Connected 2 Remove the cable
接続ケーブルを外す
1 1
2
①
Cable
ケーブル
RX-V573/HTR-5065
Connect CB525 ②
1 Lock the connector
コネクターロック
Connected 2 Insert the cable
接続ケーブルを差し込む
CB61
1 1 CB525
CB952
OPERATION (4) P.C.B.
DIGITAL P.C.B.
2
Cable ①
ケーブル
Hook CB21
フック
W4761
CB477
OPERATION (7) P.C.B.
③
CB371
Front panel unit Hook MAIN (6) P.C.B.
フロントパネルユニットフック
③
Fig. 1
16
RX-V573/HTR-5065
3. Removal of DIGITAL P.C.B. 3. DIGITAL P.C.B. の外し方

a. Remove 2 screws (④) and 5 screws (⑤). (Fig. 3) a. ④ のネジ 2 本、⑤ のネジ 5 本を外します。（Fig. 3）
b. Remove 2 screws (⑥). (Fig. 2) b. ⑥ のネジ 2 本を外します。（Fig. 2）
c. Remove CB22, CB26, CB64 and CB91. (Fig. 2) c. CB22、CB26、CB64、CB91 を外します。（Fig. 2）
d. Unlock and remove CB23–CB25. (Fig. 2) d. ロックを外し、CB23 ∼ CB25 を外します。（Fig. 2）
e. Remove the DIGITAL P.C.B. which is connected directly e. DIGITAL P.C.B. を外します。ただし、DIGITAL P.C.B. は
to the MAIN (2) P.C.B. and MAIN (3) P.C.B. with board- MAIN（2）P.C.B.、MAIN（3）P.C.B. に基板対基板コネクター
to-board connectors. (Fig. 2) で直接接続されています。（Fig. 2）
4. Removal of AMP Unit 4. アンプユニットの外し方

a. Remove 4 screws (⑦), 4 screws (⑧) and 2 screws (⑨). a. ⑦ のネジ 4 本、⑧ のネジ 4 本、⑨ のネジ 2 本を外し
(Fig. 2) ます。（Fig. 2）
b. Remove 3 screws (⑩). (Fig. 3) b. ⑩ のネジ 3 本を外します。（Fig. 3）
c. Remove the amp unit. (Fig. 2) c. アンプユニットを外します。（Fig. 2）
CB91
Remove CB23–CB25 CB24 DIGITAL P.C.B.
1 Unlock the connector CB64
コネクターロック解除
Connected 2 Remove the cable
接続ケーブルを外す CB62
1 1
2
CB22 Board-to-board connectors
⑦
CB23 基板対基板コネクター
CB25
Cable CB26
ケーブル CB63
Connect CB23−CB25
1 Lock the connector ⑦ Board-to-board connectors
コネクターロック ⑧
Connected 2 Insert the cable
基板対基板コネクター
RX-V573/HTR-5065
接続ケーブルを差し込む
⑧ ⑧
1 1
2
Cable
ケーブル CB271
CB251
MAIN (3) P.C.B.

AMP unit
アンプユニット MAIN (2) P.C.B.
⑨
Fig. 2
⑤ ④ Rear view
⑨
Fig. 3
17
RX-V573/HTR-5065
When checking the P.C.B.s: P.C.B. をチェックする場合には：

• Place the P.C.B.s (with rear panel) upright. (Fig. 4) ・リアパネルと一緒に P.C.B. を立ち上げて置きます。
• Connect the heatsink and rear panel to the chassis （Fig. 4）
with a ground lead or the like. (Fig. 4) ・ヒートシンク、リアパネルをリード線等でシャーシ
• Reconnect all cables (connectors) that have been に接続してください。（Fig. 4）
disconnected. ・外したケーブル（コネクター）をすべて接続します。
• When connecting the flexible flat cable, be careful ・フラットケーブルを接続する際、極性に注意してく
with polarity. ださい。
Rear panel
リアパネル
Ground lead
アース線
RX-V573/HTR-5065
Chassis
シャーシ
MAIN (1) P.C.B.

Ground lead
Heat sink アース線
ヒートシンク
Fig. 4
18
RX-V573/HTR-5065
■ UPDATING FIRMWARE / ファームウェアのアップデート

When the following parts are replaced, the firmware must 下記の部品を交換した場合、ファームウェアを最新バー
be updated to the latest version. ジョンにアップデートする必要があります。
DIGITAL P.C.B. DIGITAL P.C.B.
IC2 on DIGITAL P.C.B. DIGITAL P.C.B. の IC2
● Confirmation of firmware version and checksum ● ファームウェアのバージョンとチェックサムの

確認
Before and after updating the firmware, check the ファームウェアのアップデートの前後に、ファーム
firmware version and checksum by using the self- ウェアのバージョンとチェックサムをダイアグで確
diagnostic function menu. 認します。
Start up the self-diagnostic function and select “S4. ダイアグを起動し、 S4. ROM VERSION/CHECKSUM
ROM VERSION/CHECKSUM” menu. メニューを選択します。
Using the sub-menu, have the firmware version and サブメニューでファームウェアのバージョンと

checksum displayed, and note them down. チェックサムを表示し、それらを書きとめます。
(See “SELF-DIAGNOSTIC FUNCTION”) （「ダイアグ」参照）
* When the firmware version is different from ※ アップデート後、ファームウェアのバージョンが
written one after updating, perform the updating 書き込まれたものと異なる場合、アップデートの
procedure again from the beginning again. 操作を最初からやり直してください。
● Initializing the back-up IC ● バックアップ IC の初期化

(EEPROM: IC22 on DIGITAL P.C.B.) （EEPROM：DIGITAL P.C.B. の IC22）
After updating the firmware, the back-up IC MUST ファームウェアのアップデート後、設定情報（音
RX-V573/HTR-5065
be initialized by the following procedure to store the 場プログラムのパラメーターやシステムメモリー、
setting information (soundfield parameters, system チューナープリセット等）を正常に保存するために、
memory and tuner presetting, etc.) properly. 下記の方法でバックアップ IC を初期化する必要が
あります。
Start up the self-diagnostic function and select “S3. 本機のダイアグを起動し、 S3. FACTORY PRESET メ
FACTORY PRESET” menu. (See “SELF-DIAGNOSTIC ニューを選択します。
FUNCTION”) （「ダイアグ」参照）
Select “PRESET RSRV”, press the “ ” (Power) key to PRESET RSRV を選択し、（電源）キーを押して
turn off the power once and turn on the power again. 電源を一度きってから、もう一度電源を入れるとバッ
Then the back-up IC is initialized. クアップ IC が初期化されます。
● Required Tools ● 必要なツール

• USB storage device ・ USB フラッシュメモリー
• Firmware ・ファームウェア
RX-V573/HTR-5065: R0305-xxxx.bin RX-V573： R0305-xxxx.bin
● Preparation ● 準備
1. Download the latest firmware from the specified 1. 指定のダウンロード先から、最新のファームウェ
download source to the folder of the PC. アを PC のフォルダへダウンロードしてください。
2. Copy the latest firmware from the PC to the root 2. PC から USB フラッシュメモリーのルートフォル
folder of the USB storage device. ダへ最新のファームウェアをコピーします。
Note) When the latest firmware is copied to a sub- 注意）最新のファームウェアをサブフォルダにコピー

folder of the USB storage device, the update した場合、書き込みはできません。
will not proceed.
19
RX-V573/HTR-5065
● Operation Procedures ● 操作手順

1. Insert the USB storage device to the USB jack. 1. USB 端子に USB フラッシュメモリーを差し込みま
(Fig. 1) す。（Fig. 1）
2. While pressing the “INFO” key, connect the power 2. INFO キーを押しながら、電源コードを AC コン
cable to the AC outlet. (Fig. 1) セントに接続します。（Fig. 1）
" " (Power) key

" （電源）
" キー
USB jack
USB 端子
"INFO" key
INFO キー
USB storage device

USB フラッシュメモリー
Fig. 1
3. The USB UPDATE mode is activated and “USB 3. USB UPDATE モードが起動し、 USB Update が表
Update” is displayed. Writing of the firmware 示されて、ファームウェアの書き込みが自動的に
starts automatically. (Fig. 2) 開始されます。（Fig. 2）
RX-V573/HTR-5065
Writing is started. / 書き込み開始 Writing being executed. / 書き込み中
USB Update VERIFYING... Sx-x:xx%
Fig. 2
4. When writing of the firmware is completed, 4. ファームウェアの書き込み完了後、 UPDATE

“UPDATE SUCCESS”, “PLEASE...” and “POWER SUCCESS 、 PLEASE... 、 POWER OFF! が繰り返
OFF!” are displayed repeatedly. (Fig. 3) し表示されます。（Fig. 3）
Writing is completed. / 書き込み完了
UPDATE SUCCESS PLEASE... POWER OFF!
Fig. 3
5. Press the “ ” (Power) key to turn off the power. 5. （電源）キーを押して電源を切ります。（Fig. 1）

(Fig. 1)
6. USB 端子から USB フラッシュメモリーを抜きま
6. Remove the USB storage device from the USB す。（Fig. 1）
jack. (Fig. 1)
7. ダイアグを起動し、ファームウェアのバージョン
7. Start up the self-diagnostic function and check とチェックサムが、書き込まれたものと同じであ
that the firmware version and checksum are ることを確認します。
（ファームウェアのバージョ
the same as written ones. (See “Confirmation of ンとチェックサムの確認参照）
firmware version and checksum”)
20
RX-V573/HTR-5065
■ SELF-DIAGNOSTIC FUNCTION / ダイアグ（自己診断機能）

This unit has self-diagnostic functions that are intended 本機には、検査、測定、不良個所の発見を目的にしたダ
for inspection, measurement and location of faulty point. イアグ（自己診断機能）があります。
There are 21 main menu items, each of which has sub- ダイアグには 21 個のメインメニューがあり、そのそれぞ
menu items. れにサブメニューがあります。
Listed in the table below are main menu items and sub- 下表はダイアグメニュー一覧です。
menu items.
注意：以下のメニュー項目の一部は、このサービスマニュ
Note: Some of the menu items listed below may not apply アルに記載されているモデルに適用されない場合
to the models covered in this service manual. があります。
No. Main menu No. Sub-menu

A: Audio system / オーディオ系
A1 DSP AUDIO 1 DSP MARGIN
2 DSP NON MARGIN
3 DSP FULL CENTER
4 DSP FULL SURROUND
5 DSP FULL SURROUND BACK
6 DSP FULL SUBWOOFER
A2 DIRECT AUDIO 1 ANALOG DIRECT
A3 HDMI AUDIO 1 HDMI AUTO
2 ARC
A4 SPEAKERS SET 1 BI-AMP (Not for service / サービスでは使用しません )
2 FULL MUTE
3 AC B : HIGH (Not for service / サービスでは使用しません )
4 AC B : LOW (Not for service / サービスでは使用しません )
RX-V573/HTR-5065
A5 MIC CHECK 1 MIC ROUTE CHECK
A6 MANUAL TEST 1 TEST ALL
D: Display system / 表示系
D1 FL CHECK 1 INITIAL DISPLAY
2 ALL SEGMENT OFF
3 ALL SEGMENT ON
4 CHECK PATTERN 1
5 CHECK PATTERN 2
U: Universal system / 特殊端子系
U1 USB 1 USB FRONT 1 TRACK
2 USB FRONT 2 TRACK
3 USB_VBUS HIGH POWER
N: Network system / ネットワーク系
N1 NETWORK 1 IP ADDRESS CHECK
2 MAC ADDRESS CHECK
3 LINE NOISE 100 MDI (Not for service / サービスでは使用しません )
4 LINE NOISE 100 MDIX (Not for service / サービスでは使用しません )
5 LINE NOISE 10 MDI (Not for service / サービスでは使用しません )
6 LINE NOISE 10 MDIX (Not for service / サービスでは使用しません )
7 LINK CHECK
8 EXT TEST
21
RX-V573/HTR-5065
No. Main menu No. Sub-menu

C: Communication system / 通信・バスライン系
C1 DIGITAL PCB CHECK 1 ALL
2 BUS FLASH ROM
3 I2C
4 BUS DIR
5 BUS DSP1
6 EEPROM
C2 HDMI INFO 1 HDMI MODEL NAME
2 HDMI PRODUCT ID
C3 NETWORK IC CHECK 1 ALL
2 NET RAM
3 PHY TEST
4 APL ID
V: Video system / ビデオ系
V1 ANALOG VIDEO CHECK 1 ANALOG BYPASS
2 MUTE CHECK
V2 DIGITAL VIDEO CHECK 1 HDMI REPEAT
2 OSD-VIDEO OUT
P: Power supply and protection system / 電源・プロテクション系
P1 SYSTEM MONITOR 1 DC
2 PS1/PS2/PS3
3 THM1/THM2/THM3
4 OUTPUT LEVEL
RX-V573/HTR-5065
5 LIMITER CONTROL
6 USB/L3 (J model)
7 KEY1/KEY2
P2 PROTECTION HISTORY 1 HISTORY 1
2 HISTORY 2
3 HISTORY 3
4 HISTORY 4
S: System and version system / システム・バージョン系
S1 FIRMWARE UPDATE 1 DSP FIRMWARE UPDATE (Not for service / サービスでは使用しません )
S2 SET INFORMATION 1 INITIAL DISPLAY
2 MODEL/DESTINATION
3 DEBUG (Not for service / サービスでは使用しません )
S3 FACTORY PRESET 1 PRESET INHIBIT
2 PRESET RESERVED
S4 ROM VERSION/CHECKSUM 1 SYSTEM VERSION
2 MICROPROCESSOR VERSION
3 MICROPROCESSOR CHECKSUM
4 DSP VERSION
5 DSP CHECKSUM
6 OSD VERSION
7 OSD CHECKSUM
8 NETWORK VERSION
9 NETWORK CHECKSUM
10 MODEL/DESTINATION
11 VERIFY ERROR (Not for service / サービスでは使用しません )
S5 SOFT SWITCH 1 SWITCH MODE
2 MODEL NAME
22
RX-V573/HTR-5065
● Starting Self-Diagnostic Function ● ダイアグの起動

While pressing the “TONE CONTROL” and “INFO” keys, TONE CONTROL と INFO キーを押しながら（電源）
press the “ ” (Power) key to turn on the power, and release キーを押して電源を入れた後、2 つのキーを放します。
those 2 keys. ダイアグが起動します。
The self-diagnostic function mode is activated.
Keys of this unit / 本機キー
(Power)
While pressing these keys, turn on the power.
これらのキーを押しながら、電源を入れます。
● Starting Self-Diagnostic Function in ● プロテクション解除モードでの起動

the protection cancel mode
RX-V573/HTR-5065
If the protection function works and causes hindrance プロテクションが動作することにより、故障箇所の診断
to troubleshooting, cancel the protection function by the に支障をきたすような場合は、次の方法によりプロテク
procedure below, and it will be possible to enter the self- ションを解除した状態でダイアグモードに入ることがで
diagnostic function mode. (The protection functions other きます。（過電流検出以外のプロテクション動作を解除す
than the excess current detect function will be disabled.) る）
While pressing the “TONE CONTROL” and “INFO” keys, TONE CONTROL と INFO キーを押しながら（電源）
press the “ ” (Power) key to turn on the power and keep キーを押して電源を入れ、２つのキーと（電源）キー
pressing those 2 keys and “ ” (Power) key for 3 seconds を 3 秒以上押し続けます。
or longer. プロテクション解除モードでダイアグが起動します。
The self-diagnostic function mode is activated with the このモードでは FL の SLEEP セグメントが点滅し、プロ
protection functions disabled. テクションを解除した状態でのダイアグモードであるこ
In this mode, the “SLEEP” segment of the FL display flashes とを知らせます。
to indicate that the mode is self-diagnostic function mode
with the protection functions disabled.
CAUTION! 注意！
Using this unit with the protection function disabled may プロテクションを解除した状態でのダイアグモードは、
cause further damage to this unit. Use special care for 危険な状態でもプロテクションが作動しないため、動作
this point when using this mode. させると、本機を破壊することがあります。このモード
を使用する場合は十分注意してください。
23
RX-V573/HTR-5065
● Canceling Self-Diagnostic Function ● ダイアグの解除

1. Before canceling self-diagnostic function, execute 1. ダイアグを解除する前に、 S3. FACTORY PRESET メ
setting for “S3. FACTORY PRESET” menu. (Memory ニュー（メモリーの初期化禁止／またはメモリーの
initialization inhibited or Memory initialized). 初期化）の設定をします。
* In order to keep the user memory preserved, be ※ ユーザーメモリーを保持したい場合は、必ず
sure to select PRESET INHIBIT (Memory initialization PRESET INHIBIT（メモリー初期化禁止）を選択し
inhibited). てください。
2. Press the “ ” (Power) key to turn off the power. 2. （電源）キーを押して電源を切ります。
● Display provided when Self-Diagnostic ● ダイアグ起動時の表示

Function started
The display is as described below depending on the 本機の電源が切れたときの状況により、下記のように表
situation when the power to this unit is turned off. 示されます。
1. When the power is turned off by usual operation: 1. 通常の操作で電源を切った場合：

“NO PROTECT” is displayed. Then “A1-1. DSP NO PROTECT が表示されます。数秒後、 A1-1. DSP
MARGIN” is displayed in a few seconds. MARGIN が表示されます。
Opening message / オープニング表示 Main menu display / メインメニュー表示

After a few seconds / 数秒後
RX-V573/HTR-5065
A1-1
NO PROTECT DSP MARGIN
24
RX-V573/HTR-5065
2. When the protection function worked to turn 2. プロテクションが働いて電源が切れた場合：

off the power:
The information of protection function which worked at そのときに働いたプロテクションの情報が表示され
that time is displayed. Then “A1-1. DSP MARGIN” is ます。数秒後、 A1-1. DSP MARGIN が表示されます。
displayed in a few seconds. 注）このとき、一旦電源を切った後にダイアグを再
Note: At that time if you restart the self-diagnostic 起動すると、 NO PROTECT が表示されます。
function after turning off the power once, “NO それは、その状況が「1. 通常の操作で電源を切っ
PROTECT” will be displayed. That is because た場合：」と同じだからです。
that situation is equal to “1. When the power is ただし、プロテクションの履歴はバックアップ
turned off by usual operation:”. データとしてメモリーに保存されます。詳細は、
However history of the protection function is P2. PROTECTION HISTORY メニューを参照し
stored in memory as backup data. For details, てください。
refer to “P2. PROTECTION HISTORY” menu.
2-1. When there is a history of protection function 2-1. 過電流によるプロテクション履歴がある場合

due to excess current.
I PROTECT
Cause: An excessive current flowed through the power 原因：パワーアンプに過電流が流れた。

amplifier. 補足：パワーアンプの電流を検出していますので、電流
Supplementary information: As current of the power 検出トランジスタをチェックすれば異常チャンネ
amplifier is detected, the abnormal channel can be ルが特定できます。
identified by checking the current detect transistor.
異常状態のまま電源を入れると、瞬時にプロテクション
Turning on the power without correcting the abnormality
が働き、すぐに電源が切れます。
RX-V573/HTR-5065
will cause the protection function to work immediately and
the power supply will instantly be shut off.
Notes: 注意：
• Applying the power to this unit without correcting ・異常状態のまま本機の電源を入れると、危険な状態
the abnormality can be dangerous and cause になり、さらに回路が損傷を受ける原因になります。
additional circuit damage. To avoid this, if “I それを避けるために、「I PROTECT」が１回働いた場
PROTECT” protection function works 1 time, the 合、それ以降（電源）キーを押しても電源が入
power will not turn on even when the “ ” (Power) らなくなります。再度電源を入れる場合、ダイアグ
key is pressed. In order to turn on the power を起動してください。
again, start up the self-diagnostic function. ・本機の電源をいれる前に、各パワーアンプの出力ト
• The output transistors in each amplifier channel ランジスタに損傷がないかチェックしてください。
should be checked for damage before applying ・パワーアンプの電流は、各チャンネルのエミッター
power to this unit. の抵抗器間 DC 電圧を測定することによりモニター
• Amplifier current should be monitored by してください。
measuring DC voltage across the emitter resistors
for each channel.
25
RX-V573/HTR-5065
2-2. When the protection function worked due to 2-2. DC 出力異常によりプロテクションが働いた場合

abnormal DC output.
H: Displayed when the voltage is HIGHER than upper limit
電圧が上限値より高い場合に表示されます
L: Displayed when the voltage is LOWER than lower limit
電圧が下限値より低い場合に表示されます
DC PRT:xxxH
xxx: A/D conversion value of voltage at the moment when the protection function worked
(Reference voltage: 3.3 V=255)
プロテクションが働いた瞬間の電圧の A/D 変換値
（基準電圧：3.3 V=255）
Cause: DC output of the power amplifier is abnormal. 原因：パワーアンプの DC 出力が異常。

Supplementary information: The protection function 補足：アンプの故障でスピーカー端子に直流電圧が掛か
worked due to a DC voltage appearing at the speaker るなどが原因で、プロテクションが働いたことを
terminal. A cause could be a defect in the amplifier. 示します。
異常状態のまま電源を入れると、5 秒後にプロテクション
will cause the protection function to work in 5 seconds
が働き、電源が切れます。
and the power supply will be shut off.
2-3. When the protection function worked due to 2-3. 電源部の電圧異常によりプロテクションが働い

abnormal voltage in the power supply section. た場合
PSxPRT:xxxL
RX-V573/HTR-5065
（基準電圧：3.3 V=255）
PS1/PS2/PS3
Cause: The voltage in the power supply section is 原因：電源部の電圧が異常。

abnormal. 補足：電源電圧による原因で、プロテクションが働いた
Supplementary information: The protection function ことを示します。
worked due to a defect or overload in the power supply.
異常状態のまま電源を入れると、1 秒後にプロテクション
Notes: 注意：
• Applying the power to this unit without correcting ・異常状態のまま本機の電源を入れると、危険な状態
the abnormality can be dangerous and cause になり、さらに回路が損傷を受ける原因になります。
additional circuit damage. To avoid this, if “PS” それを避けるために、「DC」、「PS」プロテクション
and “DC” protection function works 3 times が連続して 3 回目働いた場合、それ以降（電源）
consecutively, the power will not turn on even キーを押しても電源が入らなくなります。再度電源
when the “ ” (Power) key is pressed. In order を入れる場合、ダイアグを起動してください。
to turn on the power again, start up the self- ・本機の電源をいれる前に、各パワーアンプの出力ト
diagnostic function. ランジスタに損傷がないかチェックしてください。
• The output transistors in each amplifier channel ・パワーアンプの電流は、各チャンネルのエミッター
should be checked for damage before applying の抵抗器間 DC 電圧を測定することによりモニター
power to this unit. してください。
• Amplifier current should be monitored by
measuring DC voltage across the emitter resistors
for each channel.
26
RX-V573/HTR-5065
2-4. When the protection function worked due to 2-4. ヒートシンクの異常温度によりプロテクション

excessive heatsink temperature. が働いた場合
TMPxPRT:xxxL
（基準電圧：3.3 V=255）
TMP1/TMP2/TMP3
Cause: The temperature of the heatsink is excessive. 原因：ヒートシンクの温度が異常。

Supplementary information: The protection function 補足：温度制限を越えた原因で、プロテクションが働い
worked due to the temperature limit being exceeded. たことを示します。
Causes could be poor ventilation or a defect related to
the thermal sensor. 異常状態のまま電源を入れると、1 秒後にプロテクション
RX-V573/HTR-5065
● History of protection function ● プロテクションの履歴
When the protection function has worked, its history プロテクションが働いた場合、その履歴はバックアッ
is stored in memory as backup data. プデータとしてメモリーに保存されます。
Even if no abnormality is noted while servicing the 修理のときに異常が認められなくても、バックアッ
unit, an abnormality which has occurred previously プデータが残っていれば、お客様のところで起きた
can be defined as long as the backup data has been 異常を区別できます。
stored. 詳細は、 P2. PROTECTION HISTORY メニューを参照
For details, refer to “P2. PROTECTION HISTORY” してください。
menu.
27
RX-V573/HTR-5065
● Operation procedure of Main menu ● メインメニューとサブメニューの操作

and Sub-menu
There are 21 main menu items, each of which has sub- ダイアグには 21 個のメインメニューがあり、そのそれぞ
menu items. れにサブメニューがあります。
Main menu selection メインメニューの選択

Select the main menu using “SCENE TV” (forward) and SCENE TV （順送り）、 SCENE BD/DVD （逆送り）キー
“SCENE BD/DVD” (reverse) keys. で選択します。
Sub-menu selection サブメニューの選択

Select the sub-menu using “SCENE RADIO” (forward) and SCENE RADIO （順送り）
、 SCENE NET （逆送り）キーで
“SCENE NET” (reverse) keys. 選択します。
Keys of this unit / 本機キー
Main menu selection Sub-menu selection

メインメニューの選択サブメニューの選択
Reverse Forward Reverse Forward

逆送り順送り逆送り順送り
RX-V573/HTR-5065
● Functions in Self-Diagnostic Function ● ダイアグ中の機能

mode
In addition to the self-diagnostic function menu items, ダイアグメニューの他に、以下の機能が動作します。
functions listed below are available.
・電源オン／オフ
• Power ON/OFF ・マスターボリューム
• Master volume ・ミューティング
• Muting ・インプットセレクト
• Input selection ※ チューナー関連、セットメニュー関連は機能しません。
* Functions related to the tuner and the set menu are
not available.
● Initial settings when Self-Diagnostic ● ダイアグ開始時の初期設定

Function started
The following initial settings are used when self-diagnostic ダイアグ開始時に以下のような設定になります。
function is started. ダイアグ解除時にはダイアグ開始前の状態に戻ります。
When self-diagnostic function is canceled, these settings
・マスターボリューム： -20 dB
are restored to those before starting self-diagnostic
・インプット： AV5
function.
・メインメニュー： A1-1. DSP MARGIN
• Master volume: -20 dB ・スピーカー設定： LARGE、Bass out to SWFR
• Input: AV5 （すべてのチャンネル）
• Main menu: A1-1. DSP MARGIN ・ HDMI コントロール： OFF
• Speaker setting: LARGE, Bass out to SWFR
(All channels)
• HDMI Control: Off
28
RX-V573/HTR-5065
● Details of Self-Diagnostic Function ● ダイアグメニュー詳細

menu
A1. DSP AUDIO A1. DSP AUDIO
This menu is used to check audio signal route via DSP. DSP を経由する音声信号の経路をチェックします。
A1-1. DSP MARGIN A1-1. DSP MARGIN

The audio signal is output including the head 音声信号が DSP を経由してヘッドマージンを
margin via DSP. 含んで出力されます。
* When input source is stereo, signal is ※ 2ch 信号入力時、以下のように信号が振り
assigned as below. 分けられて出力されます。
Front L: Front L, Center, Surround L, Front L： Front L、Center、Surround L、
Surround Back L Surround Back L
Front R: Front R, Surround R, Surround Back Front R： Front R、Surround R、Surround
R Back R
Front L +10 dB: Subwoofer Front L +10 dB：Subwoofer
A1-1
DSP MARGIN
A1-2. DSP NON MARGIN A1-2. DSP NON MARGIN

The SUBWOOFER signal is output including サブウーファーの音声信号が DSP を経由して
the head margin via DSP. ヘッドマージンを含んで出力されます。
RX-V573/HTR-5065
The audio signal other than SUBWOOFER is サブウーファー以外の音声信号は DSP を経由
output without including the head margin via してヘッドマージンを含まず出力されます。
DSP.
A1-2
DSP NON MARGIN
A1-3. DSP FULL CENTER A1-3. DSP FULL CENTER

The audio signal is output to only CENTER 音声信号がヘッドマージンを含まず、デジタ
channel in digital full bit without including the ルフルビットで CENTER チャンネルのみへ出
head margin. 力されます。
A1-3
DSP FULL C
INPUT: AV5 ANALOG

SPEAKER OUT: 1 kHz, SUBWOOFER OUTPUT: 50 Hz
SPEAKER OUTPUT
SUBWOOFER
Input level Volume SURROUND
FRONT CENTER SURROUND OUTPUT
BACK
Both ch, -20 dBm +6.5 dB -∞ +13.0 dBm -∞ -∞ -∞
29
RX-V573/HTR-5065
A1-4. DSP FULL SURROUND A1-4. DSP FULL SURROUND

The audio signal is output to only SURROUND 音声信号がヘッドマージンを含まず、デジタ
L/R channels in digital full bit without including ルフルビットで SURROUND L/R チャンネルの
the head margin. みへ出力されます。
A1-4
DSP FULL SUR
INPUT: AV5 ANALOG

SPEAKER OUTPUT
SUBWOOFER
BACK
Both ch, -20 dBm +6.5 dB -∞ -∞ +13.0 dBm -∞ -∞
A1-5. DSP FULL SURROUND BACK A1-5. DSP FULL SURROUND BACK
The audio signal is output to only SURROUND 音声信号がヘッドマージンを含まず、デジタ
BACK L/R channel in digital full bit without ルフルビットで SURROUND BACK L/R チャン
including the head margin. ネルのみへ出力されます。
A1-5
DSP FULL SB
RX-V573/HTR-5065
INPUT: AV5 ANALOG

SPEAKER OUTPUT
SUBWOOFER
BACK
Both ch, -20 dBm +6.5 dB -∞ -∞ -∞ +13.0 dBm -∞
A1-6. DSP FULL SUBWOOFER A1-6. DSP FULL SUBWOOFER

The audio signal is output to only SUBWOOFER 音声信号がヘッドマージンを含まず、デジタ
channel in digital full bit without including the ルフルビットで SUBWOOFER チャンネルのみ
head margin. へ出力されます。
A1-6
DSP FULL SW
INPUT: AV5 ANALOG

SPEAKER OUTPUT
SUBWOOFER
BACK
Both ch, -20 dBm +6.5 dB -∞ -∞ -∞ -∞ -6.5 dBm
30
RX-V573/HTR-5065
A2. DIRECT AUDIO A2. DIRECT AUDIO

This menu is used to check audio signal route of DIRECT モードの音声信号の経路をチェックします。
DIRECT mode.
A2-1. ANALOG DIRECT A2-1. ANALOG DIRECT

The analog input audio signal is output to アナログ入力の音声信号が DIRECT モードで
FRONT L/R in DIRECT mode. FRONT L/R へ出力されます。
A2-1
ANALOG DIRECT
INPUT: AV5 ANALOG

SPEAKER OUTPUT
SUBWOOFER
BACK
Both ch, -20 dBm +6.5 dB +13.0 dBm -∞ -∞ -∞ -∞
RX-V573/HTR-5065
A3. HDMI AUDIO A3. HDMI AUDIO
This menu is used to check the route of audio signal HDMI IN/OUT 端子へ入力された音声信号の経路を
input to HDMI IN/OUT jack. チェックします。
* Before check using “A3-2. ARC” menu, be sure to ※ A3-2. ARC メニューでのチェックの前に、あらか
connect a TV monitor equipped with Audio Return じめ必ず Audio Return Channel 機能に対応してい
Channel function to this unit in advance. るテレビを接続してください。
A3-1 A3-1. HDMI AUTO

HDMI AUTO The audio signal input to selected HDMI IN jack is output.
選択された HDMI IN 端子へ入力された音声信号が出力されます。
A3-2 A3-2. ARC (Audio Return Channel function)

ARC The audio signal input to HDMI OUT jack is output.
HDMI OUT 端子へ入力された音声信号が出力されます。
31
RX-V573/HTR-5065
A4. SPEAKERS SET A4. SPEAKERS SET

This menu is used to check the speaker output. スピーカー出力をチェックします。
A4-1 A4-1. BI-AMP

BI-AMP Not for service.
サービスでは使用しません。
A4-2 A4-2. FULL MUTE

FULL MUTE The audio signals are muted at all channels.
音声信号がすべてのチャンネルでミュートされます。
A4-3 A4-3. AC B HIGH

AC_B:Hi Not for service.
A4-4 A4-4. AC B LOW

AC_B:Lo Not for service.
RX-V573/HTR-5065
A5. MIC CHECK A5. MIC CHECK
A5-1. MIC ROUTE CHECK A5-1. MIC ROUTE CHECK

The audio signal input to the YPAO MIC jack is YPAO マイク端子へ入力された音声信号が A/D
output to FRONT L and FRONT R channels via − D/A 経由で FRONT L、FRONT R チャンネル
A/D-D/A. へ出力されます。
A5-1
MIC ROUTE
32
RX-V573/HTR-5065
A6. MANUAL TEST A6. MANUAL TEST

The test noise generated by built-in noise generator DSP に内蔵されたノイズジェネレータによって生成
in DSP is output to the channels specified by the sub- されたテストノイズが、サブメニューで指定したチャ
menu. ンネルへ出力されます。
Test noise / テストノイズ

30 Hz to 80 Hz
for SUBWOOFER / SUBWOOFER 用
pink noise / ピンクノイズ
500 Hz to 2 kHz
for other than SUBWOOFER / SUBWOOFER 以外
pink noise / ピンクノイズ
A6-1. TEST ALL A6-1. TEST ALL

The test noise is output to all channels. テストノイズが全てのチャンネルへ出力され
ます。
A6-1
TEST ALL
RX-V573/HTR-5065
33
RX-V573/HTR-5065
D1. FL CHECK D1. FL CHECK

This menu is used to check operation of the FL display. FL 表示の動作をチェックします。
FL display / FL 表示
D1-1. INITIAL DISPLAY / 初期表示
D1-2. ALL SEGMENT OFF / 全セグメント消灯
D1-3. ALL SEGMENT ON / 全セグメント点灯
* After check, change to next menu at once.

RX-V573/HTR-5065
確認後、すみやかに次のサブメニューを選択してください。
D1-4. CHECK PATTERN 1 / チェックパターン 1
Example / 例
Lighting on segments in lattice.
セグメント格子状点灯
D1-5. CHECK PATTERN 2 / チェックパターン 2 Short Normal

ショート正常
Segment conditions of the FL tube is checked by 全セグメント消灯・全セグメント点灯により FL 管の

turning ON and OFF all segments. セグメントの不良を確認します。
Next, a short between segments next to each other 次に、全セグメントを交互（格子状）に点灯／消灯
is checked by turning ON and OFF all segments することで、隣り合うセグメントのショートをチェッ
alternately (in lattice). クします。
(In the above example, the segments in the second （上記の例は、上から 2 列目のセグメントがショート
row from the top are shorted.) しています。）
34
RX-V573/HTR-5065
U1. USB U1. USB

This menu is used to check the audio signal route from USB フラッシュメモリーからの音声信号の経路をチェッ
USB storage device. クします。
U1-1. USB FRONT 1 TRACK U1-1. USB FRONT 1 TRACK

The 1st music file stored in the USB storage USB 端子に接続された USB フラッシュメモ
device connected to the USB jack is リーに保存された音楽ファイルの 1 曲目が再
reproduced. 生されます。
* Copy 2 or more music files from PC to the ※ あらかじめ PC から USB フラッシュメモリー
root folder of the USB storage device in のルートフォルダに音楽ファイルを 2 曲以
advance. 上コピーしてください。
U1-1
USB_F 1 TRACK
U1-2. USB FRONT 2 TRACK U1-2. USB FRONT 2 TRACK

The 2nd music file stored in the USB storage USB 端子に接続された USB フラッシュメモ
device connected to the USB jack is リーに保存された音楽ファイルの 2 曲目が再
reproduced. 生されます。
U1-2
USB_F 2 TRACK
RX-V573/HTR-5065
U1-3. USB_VBUS HIGH POWER U1-3. USB_VBUS HIGH POWER
The output current (USB_VBUS) of USB jack is USB 端子の出力電流（USB_VBUS）が最大 2.1A
output at up to 2.1A/5V. ／ 5V で出力されます。
U1-3
USB_VBUS_HPWR
35
RX-V573/HTR-5065
N1. NETWORK N1. NETWORK

This menu is used to check functions related to ネットワークに関連する機能をチェックします。
NETWORK. ブロードバンドルーターの LAN ポートと本機の
Connect between LAN port of broadband router and NETWORK 端子をネットワークケーブルで接続しま
NETWORK jack of this unit with a network cable. す。
* When the network condition varies while sub-menu ※ サブメニュー表示中にネットワークの状態が変わ
is displayed (e.g., the network is deactivated ると（たとえばネットワークが一時切れるなど）
once), the correct result will not be displayed. 正しい結果が表示されません。
In that case, once turn off the power to this unit, その場合、一度本機の電源を切り、ダイアグを再
then start up the self-diagnostic function again 起動して本メニューを選択します。
and select this menu.
N1-1. IP ADDRESS CHECK N1-1. IP ADDRESS CHECK

This menu is used to check that IP address IP アドレスが取得されていることをチェック
can be obtained. します。
N1-1
IP AD CHK:OK
OK: Connected (IP address obtained)
接続（IP アドレス取得完了）
NG: No traffic / Disconnected
通信不能／接続が切れている
N1-2. MAC ADDRESS CHECK N1-2. MAC ADDRESS CHECK

RX-V573/HTR-5065
This menu is used to check that MAC address MAC アドレスが書き込まれていることを

is written. チェックします。
N1-2
MAC AD CHK:OK
OK: Normal / 正常
NG: Unwritten / 書き込まれていない
N1-3. LINE NOISE 100 MDI N1-3. LINE NOISE 100 MDI
Not for service. サービスでは使用しません。
N1-3
LN MDI 100
N1-4. LINE NOISE 100 MDIX N1-4. LINE NOISE 100 MDIX
N1-4
LN MDIX 100
36
RX-V573/HTR-5065
N1-5. LINE NOISE 10 MDI N1-5. LINE NOISE 10 MDI

N1-5
LN MDI 10
N1-6. LINE NOISE 10 MDIX N1-6. LINE NOISE 10 MDIX

N1-6
LN MDIX 10
N1-7. LINK CHECK N1-7. LINK CHECK

This menu is used to check that the broadband ブロードバンドルーターが正しく接続されて
router is connected correctly. いることをチェックします。
N1-7
LINK CHK:OK
OK: Connected / 接続
NG: No traffic / Disconnected
通信不能／接続が切れている
RX-V573/HTR-5065
N1-8. EXT TEST N1-8. EXT TEST
Transmission/reception of the NETWORK port NETWORK ポートの送受信テストを行います。
is checked. 電源を切った状態で、下図のように NETWORK
With the power turned off, short the pins of the 端子のピンをショートさせます。
NETWORK jack as shown in the figure below. ダイアグを起動して本メニューを選択します。
Start up the self-diagnostic function and select 送受信テストを行い、その結果が表示されま
this menu. す。
Transmission/reception test is executed and
its result is displayed.
Note) Be sure to return the shorted pins 注意）検査後、ショートしたピンを必ず元の

to their original condition after 状態に戻してください。
executing this test.
N1-8
8 7 6 5 4 3 2 1
EXT TEST:OK
OK: Normal / 正常
NG: Abnormal / 異常
--: Checking / チェック中
NETWORK jack
37
RX-V573/HTR-5065
C1. DIGITAL P.C.B. CHECK C1. DIGITAL P.C.B. CHECK

This menu is used to check the communication and DIGITAL P.C.B. 上の各デバイス間の通信とバスライン
bus line connection between devices on DIGITAL 接続をチェックします。
P.C.B.
C1-1. ALL C1-1. ALL

The synthetic judgment result of sub-menu サブメニュー C1-2 ∼ C1-6 の総合判定結果を
C1-2 to C1-6 is displayed. 表示します。
C1-1
ALL:OK
OK: No error detected / 不良検出なし
NG: An error is detected / 不良検出あり
C1-2. BUS FLASH ROM C1-2. BUS FLASH ROM

FLASH ROM (IC953)’s reading/writing are FLASH ROM（IC953）の読み出し／書き込みを
checked. チェックします。
C1-2
BUS FROM:OK
RX-V573/HTR-5065
C1-3. I2C C1-3. I2C

The I2C (Inter integrated circuit) bus line I2C（Inter integrated circuit）バスライン接続
connection is checked. をチェックします。
C1-3
I2C:000 0 : No error detected / 不良検出なし
1 : An error is detected / 不良検出あり
Error detection of AM/FM tuner / AM/FM チューナーの不良検出

Error detection of Video selector receiver (IC502) / ビデオセレクター（IC502）の不良検出
Error detection of HDMI receiver/transmitter (IC1) / HDMI レシーバー／トランスミッター（IC1）の不良検出
C1-4. BUS DIR C1-4. BUS DIR

Communication and bus line connection マイコン（IC21）と DIR（IC61）間の通信とバ
between microprocessor (IC21) and DIR (IC61) スライン接続をチェックします。
are checked.
C1-4
DIR BUS:OK
38
RX-V573/HTR-5065
C1-5. BUS DSP1 C1-5. BUS DSP1

Communication and bus line connection マイコン（IC21）と DSP1（IC41）間の通信と
between microprocessor (IC21) and DSP1 バスライン接続をチェックします。
(IC41) are checked.
C1-5
DSP1 BUS:OK
C1-6. EEPROM C1-6. EEPROM

EEPROM (IC22)'s reading is checked. EEPROM（IC22）の読み出しをチェックします。
C1-6
EEPROM:OK
RX-V573/HTR-5065
C2. HDMI INFORMATION C2. HDMI INFORMATION
This menu is used to display information about HDMI. HDMI に関する情報が表示されます。
C2-1. HDMI MODEL NAME C2-1. HDMI MODEL NAME

The model name of this unit written to HDMI HDMI モジュールに書き込まれている本機のモ
module is displayed. デル名が表示されます。
C2-1
HMN:RX-V573
RX-V573
HTR-5065
C2-2. HDMI PRODUCT ID C2-2. HDMI PRODUCT ID

The product ID of this unit written to HDMI HDMI モジュールに書き込まれている本機のプ
module is displayed. ロダクト ID が表示されます。
C2-2
HID:3172
3172: RX-V573
3175: HTR-5065
39
RX-V573/HTR-5065
C3. NETWORK IC CHECK C3. NETWORK IC CHECK

This menu is used to check the communication and bus ネットワークに関連する各デバイス間の通信とバス
line connection between devices related to network. ラインの接続をチェックします。
C3-1. ALL C3-1. ALL

The synthetic judgment result of sub-menu サブメニュー C3-2 ∼ C3-4 の総合判定結果を
C3-2 to C3-4 is displayed. 表示します。
C3-1
ALL:OK
C3-2. NET RAM C3-2. NET RAM

Communication and bus line connection ネットワークマイコン（IC951）と SDRAM
between network microprocessor (IC951) and （IC952）の通信とバスラインの接続チェック
SDRAM (IC952) are checked. します。
C3-2
NET RAM:OK
RX-V573/HTR-5065
C3-3. PHY (Ethernet PHYceiver) TEST C3-3. PHY（Ethernet PHYceiver）TEST

The perform a loopback test in PHY (IC955). PHY（IC955）内でループバックテストを行い
ます。
C3-3
PHY TEST:OK
C3-4. APL (Apple) ID C3-4. APL（Apple）ID

Apple authentication IC (IC956) device ID is Apple 認証 IC（IC956）のデバイス ID をチェッ
checked. クします。
C3-3
APL ID:OK
40
RX-V573/HTR-5065
V1. ANALOG VIDEO CHECK V1. ANALOG VIDEO CHECK

This menu is used to check the analog video signal アナログ映像信号の経路をチェックします。
route.
V1-1. ANALOG BYPASS V1-1. ANALOG BYPASS

The video signal is converted and output as 映像信号が以下のように変換され、出力され
shown below. ます。
V1-1
ANALOG BYPASS
ANALOG BYPASS
HDMI IN HDMI OUT
DIGITAL
IC1
HDMI Receiver/
Transmitter
Component In Component Out
OPERATION
IC502
Video
Selector
Composite In Composite Out
RX-V573/HTR-5065
V1-2. MUTE CHECK V1-2. MUTE CHECK
The video signal is muted. 映像信号がミュートされます。
V1-2
MUTE CHECK
MUTE CHECK
HDMI IN HDMI OUT
DIGITAL
IC1
HDMI Receiver/
Transmitter
Component In Component Out
MUTE
OPERATION
IC502
Video
Selector
Composite In Composite Out
41
RX-V573/HTR-5065
V2. DIGITAL VIDEO CHECK V2. DIGITAL VIDEO CHECK

This menu is used to check the digital video signal デジタル映像信号の経路をチェックします。
route.
V2-1. HDMI REPEAT V2-1. HDMI REPEAT

The video/audio signals input to HDMI IN jack HDMI IN 端子へ入力された映像信号と音声信
are output to HDMI OUT jack. 号が HDMI OUT 端子へ出力されます。
V2-1
HDMI REPEAT **
The Deep Color video signals is input, “30” bit or
“36” bit is displayed.
Deep Color 映像信号を入力すると、 30 bit または
36 bit が表示されます。
HDMI output TV
HDMI
HDMI
BD/DVD player
CB4 CB3 CB2 CB1 CB6

HDMI HDMI HDMI HDMI HDMI
IN1 IN2 IN3 IN4 OUT
IC1
RX-V573/HTR-5065
HDMI Receiver/Transmitter
SII9573CTUC
42
RX-V573/HTR-5065
V2-2. OSD (On-Screen Display) VIDEO OUT V2-2. OSD（On-Screen Display）VIDEO OUT
The “OSD CHECK” screen is output to HDMI OSD CHECK 画面が HDMI OUT 端子へ出力され
OUT jack. ます。
V2-2
OSD-VIDEO OUT
TV
HDMI
CB6
HDMI
OUT
IC1
HDMI Receiver/Transmitter
SII9573CTUC IC2
FLASH ROM
(OSD data)
TV screen display / TV 画面表示
RX-V573/HTR-5065
OSD CHECK screen
OSD CHECK 画面
43
RX-V573/HTR-5065
P1. SYSTEM MONITOR P1. SYSTEM MONITOR

This menu is used to display the A/D conversion value パネルキー、プロテクションなどを検出しているマ
of the microprocessor which detects panel keys and イコンの A/D 変換値を、サブメニューで表示します。
protection functions by using the sub-menu. サブメニュー P1-7. KEY1/KEY2 にすると、全キー
When “P1-7. KEY1/KEY2” sub-menu is selected, keys の値を検出するためキー操作はできなくなりますが、
become inoperable due to detection of the values VOLUME ツマミを回すことにより、次のメニューに
of all keys. However, it is possible to advance to the 進めることができます。
next menu by turning the VOLUME knob. ※ 図中の数値は参考例です。
* Numeric values in the figure are given as reference
only.
P1-1. DC P1-1. DC
Power amplifier DC (DC voltage) output is パワーアンプ DC（直流電圧）出力の検出
detected.
IC21 の 120 ピン（DC_PRT）の電圧が表示され
The voltage at 120 pin (DC_PRT) of IC21 is ます。
displayed.
正常値： 27 ∼ 89
Normal value: 27 to 89 （基準電圧：3.3 V=255）
※ DC が正常値を外れるとプロテクションが
* If DC becomes out of the normal value range, 働き、電源が切れます。
the protection function works to turn off the
power.
P1-1
DC: 046
RX-V573/HTR-5065
P1-2. PS1/PS2/PS3 P1-2. PS1/PS2/PS3

Power supply voltage (PS) protection detection. 電源電圧（PS）プロテクションの検出
The voltage at 126 pin (PS1_PRT)/107 pin (PS2_ IC21 の 126 ピン（PS1_PRT）／ 107 ピン（PS2_
PRT)/106 pin (PS3_PRT) of IC21 are displayed. PRT）／ 106 ピン（PS3_PRT）の電圧が表示さ
れます。
Voltage detects
PS1: AC_BL, AC_V, AC_12, ±7A, +3.3S 検出電圧
PS2: ±12A, +5A, ±3.3V, -VP PS1： AC_BL、AC_V、AC_12、±7A、+3.3S
PS3: +5.5V PS2： ± 12A、+5A、± 3.3V、-VP
PS3： +5.5V
Normal value
PS1: 12 to 100 正常値
PS2: 34 to 106 PS1： 12 ∼ 100
PS3: 132 to 168 PS2： 34 ∼ 106
(Reference voltage: 3.3 V=255) PS3： 132 ∼ 168
（基準電圧：3.3 V=255）
* If PS1, PS2 or PS3 becomes out of the
normal value range, the protection function ※ PS1、PS2 または PS3 が正常値を外れると
works to turn off the power. プロテクションが働き、電源が切れます。
P1-2
PS:051/068/153
PS3
PS2
PS1
44
RX-V573/HTR-5065
P1-3. THM1/THM2/THM3 P1-3. THM1/THM2/THM3

Temperature of the heatsink (THM) is detected. ヒートシンク温度（THM）の検出
The voltage at 122 pin (THM1)/123 pin (THM2) IC21 の 122 ピン（THM1）／ 123 ピン（THM2）
/110 pin (THM3) of IC21 is displayed. ／ 110 ピン（THM3）の電圧が表示されます。
Normal value 正常値
THM1: 42 to 255 THM1： 42 ∼ 255
THM2: 42 to 255 (U, C models) THM2：（サービスでは使用しません。）
THM3: 114 to 255 THM3： 114 ∼ 255
(Reference voltage: 3.3 V=255) （基準電圧：3.3 V=255）
* If THM1, THM2 or THM3 becomes out of ※ THM1 または THM3 が正常値を外れるとプ
the normal value range, the protection ロテクションが働き、電源が切れます。
function works to turn off the power.
P1-3
TH:115/115/217
THM3
THM2
THM1
P1-4. OUTPUT LEVEL P1-4. OUTPUT LEVEL

Output level of speaker output is detected. スピーカー出力の出力レベルの検出
The voltage at 121 pin (AMP_OLV) of IC21 is IC21 の 121 ピン（AMP_OLV）の電圧が表示さ
displayed. れます。
RX-V573/HTR-5065
P1-4
OUTLVL: 255
P1-5. LIMITER CONTROL P1-5. LIMITER CONTROL

Power limitter control is detected. 電源リミッター制御の検出
The voltage at 7 pin (AMP_LMT) of IC21 is IC21 の 7 ピン（AMP_LMT）の電圧が表示され
displayed. ます。
P1-5
LMTCNT: 255
P1-6. USB/L3 (J model) P1-6. USB/L3（J model）
USB USB
Power supply voltage of USB jack is detected. USB 端子の電源電圧の検出
The voltage at 109 pin (USB_VBUS_PRT) of IC21 の 109 ピン（USB_VBUS_PRT）の電圧が
IC21 is detected. 表示されます。
L3 (J model) L3（J model）
Not for service. D 端子の L3（OPERATION P.C.B. CB502 の 11
ピン）レベルの検出
IC21 の 108 ピン（L3_DET）の電圧が表示され
ます。
（基準電圧：3.3 V=255）
P1-6
USB:010 L3:000
45
RX-V573/HTR-5065
P1-7. KEY1/KEY2 P1-7. KEY1/KEY2

Panel key is detected. パネルキーの検出
When the A/D conversion value of the panel パネルキーの A/D 値が規定範囲から外れると、
key becomes out of the specified range, normal 正常な動きをしません。
operation will not be available. 下表をご覧になり、各キーの分圧抵抗の定数、
In that case, check the constant of voltage dividing ハンダ不良等の確認をしてください。
resistor, solder condition, etc. Refer to table. ※ P1-7. KEY1/KEY2 メニューにすると、全キー
* When “P1-7. KEY1/KEY2” menu is selected, の値を検出するためキー操作はできなくな
keys become inoperable due to detection りますが、VOLUME ツマミを回すことによ
of the values of all keys. However, it is り、次のメニューに進めることができます。
possible to advance to the next menu by （基準電圧：3.3 V=255）
turning the VOLUME knob.
P1-7
K1:254 K2:255
KEY2
KEY1
Display / 表示 KEY1 Display / 表示 KEY2

RADIO
0 – 11 0 – 11 DIRECT
(SCENE4)
NET TUNING
12 – 32 12 – 32
(SCENE3) >>
TV TUNING
33 – 54 33 – 54
(SCENE2) <<
RX-V573/HTR-5065
BD/DVD
55 – 75 55 – 77 AM
(SCENE1)
76 – 96 – 78 – 99 FM
PRESET
97 – 119 – 100 – 121
>
INPUT PRESET
120 – 142 122 – 144
> <
INPUT
143 – 163 145 – 166 MEMORY
<
182 – 197 167 – 186 INFO

(Power)
TONE
198 – 229 187 – 205 STRAIGHT
CONTROL
PROGRAM
255 Key off 206 – 226
>
PROGRAM
227 – 246
<
255 Key off
46
RX-V573/HTR-5065
P2. PROTECTION HISTORY P2. PROTECTION HISTORY

This menu is used to display the history of protection プロテクション履歴が表示されます。
function.
STRAIGHT キーを押すとプロテクション履歴はすべ
All history of protection function will be erased by て消去されます。
pressing the “STRAIGHT” key.
※ 図中の数値は参考例です。
only.
P2-1 P2-1. History 1 / 履歴 1

1.Tmp 000L
H: Displayed when the voltage is HIGHER than upper limit.
L: Displayed when the voltage is LOWER than lower limit.
xxx: A/D conversion value of voltage at the moment when the protection function
worked.
（基準値：3.3 V=255）

2.PS1 000L
RX-V573/HTR-5065
3.Dc 000L

4.I 000L
S1. FIRMWARE UPDATE S1. FIRMWARE UPDATE

S1-1
UPDATE TI
S2. SET INFORMATION S2. SET INFORMATION

The model name and destination of this unit are 本機のモデル名、仕向け先が表示されます。
displayed.
S2-1. INITIAL DISPLAY S2-1. INITIAL DISPLAY
S2-1
MODEL/DEST
47
RX-V573/HTR-5065
S2-2. MODEL/DESTINATION S2-2. MODEL/DESTINATION

The model name and destination of this unit 本機のモデル名、仕向け先が表示されます。
are displayed.
S2-2
M/D:V573 U 0
Not for service / サービスでは使用しません
Destination / 仕向け先
U / C / R / T / K / A / G (B, G, F) / L / J
Model name / モデル名

V573 : RX-V573
H5065 : HTR-5065
S2-3. DEBUG S2-3. DEBUG

S2-3
NRC: 11
NRC (Net Restart Counter)
RX-V573/HTR-5065
S3. FACTORY PRESET S3. FACTORY PRESET

This menu is used to reserve/inhibit initialization of the バックアップ IC（EEPROM：DIGITAL P.C.B. の IC22）
back-up IC (EEPROM: IC22 on DIGITAL P.C.B.). の初期化を予約／禁止します。
S3-1 S3-1. PRESET INHIBIT (Initialization inhibited) / PRESET INHIBIT（初期化禁止）

PRESET INHI Initialization of the back-up IC is not executed. Select this sub-menu to protect the values set by the user.
バックアップ用 IC の初期化は行われません。ユーザーの設定値を保護するときは、こちらを選択してく
ださい。
S3-2 S3-2. PRESET RESERVED (Initialization reserved) / PRESET RESERVED（初期化予約）

PRESET RSRV Initialization of the back-up IC is reserved. (Actual initialization is executed when the power is turned on
next.) To reset to the original factory settings or to reset the backup IC, select this sub-menu and press
the “ ” (Power) key to turn off the power.
ユーザーメモリーの初期化が予約されます。（実際に初期化されるのは、次回の電源投入時です。）工場
出荷時やユーザーメモリーをリセットしたいときは、こちらを選択してから“ ”（電源）キーを押して
電源を切ってください。
CAUTION: Before setting to the PRESET RESERVED, 注意： PRESET RESERVED を選んで初期化をする前に、

write down the existing preset memory content チューナーのユーザーメモリーの内容を書き写し
of the tuner. (This is because setting to the てください。（初期化をすると、チューナーのユー
PRESET RESERVED will cause the user ザーメモリーの内容は消えてしまいます。）
memory content to be erased.)
48
RX-V573/HTR-5065
S4. ROM VERSION/CHECKSUM S4. ROM VERSION/CHECKSUM

The firmware version and checksum values are ファームウェアのバージョン、チェックサムが表示
displayed. されます。
The checksum is obtained by adding the data at every チェックサムは、データを 8 ビットごとに加算して
8-bit and expressing the result as a hexadecimal いき、16 進数で表記したものです。
notation. ※ 図中の数値は参考例です。
only.
S4-1 S4-1. SYSTEM VERSION

System: 1.00 The firmware version is displayed.
ファームウェアのバージョンが表示されます。
S4-2 S4-2. MICROPROCESSOR VERSION

Ver: 0026 The firmware version of MICROPROCESSOR (IC21 on DIGITAL P.C.B.) is displayed.
マイコン（DIGITAL P.C.B. の IC21）のファームウェアのバージョンが表示されます。
S4-3 S4-3. MICROPROCESSOR CHECKSUM

Sum: 5C41 The checksum value of MICROPROCESSOR (IC21 on DIGITAL P.C.B.) is displayed.
マイコン（DIGITAL P.C.B. の IC21）のチェックサムが表示されます。
S4-4 S4-4. DSP VERSION

TiVer.01.02r1 The firmware version of DSP (IC43 on DIGITAL P.C.B.) is displayed.
DSP（DIGITAL P.C.B. の IC43）のファームウェアのバージョンが表示されます。
RX-V573/HTR-5065
S4-5 S4-5. DSP CHECKSUM
TiSum:B4E31372 The checksum value of DSP (IC43 on DIGITAL P.C.B.) is displayed.
DSP（DIGITAL P.C.B. の IC43）のチェックサムが表示されます。
S4-6 S4-6. OSD (On-Screen Display) VERSION

O-V:20120216 The firmware version of OSD data (IC2 on DIGITAL P.C.B.) is displayed.
OSD データ（DIGITAL P.C.B. の IC2）のファームウェアのバージョンが表示されます。
S4-7 S4-7. OSD (On-Screen Display) CHECKSUM

O-Sum:C602 The checksum value of OSD data (IC2 on DIGITAL P.C.B.) is displayed.
OSD データ（DIGITAL P.C.B. の IC2）のチェックサムが表示されます。
S4-8 S4-8. NETWORK VERSION

N:0031 The firmware version of Network microprocessor (IC953 on DIGITAL P.C.B.) is displayed.
ネットワークマイコン（DIGITAL P.C.B. の IC953）のファームウェアのバージョンが表示されます。
S4-9 S4-9. NETWORK CHECKSUM

N-Sum:976A49BD The checksum value of Network microprocessor (IC953 on DIGITAL P.C.B.) is displayed.
ネットワークマイコン（DIGITAL P.C.B. の IC953）のチェックサムが表示されます。
49
RX-V573/HTR-5065
S4-10 S4-10. MODEL/DESTINATION

V5 333 U 111 The model name and destination are displayed.
モデル名と仕向け先が表示されます。
DESTINATION detection value
Detection value 000 111 222 333 444 555 666 777 888
Destination J U C R T K A G (B, G, F) L
MODEL detection value

Detection value 333 444
Model name V5 (RX-V573) H5 (HTR-5065)
S4-11 S4-11. VERIFY ERROR

Verify 106 01 Not for service.
S5. SOFT SWITCH S5. SOFT SWITCH

This menu is used to write the model name to the モデル名をバックアップ IC（DIGITAL P.C.B. の IC22）
back-up IC (EEPROM: IC22 on DIGITAL P.C.B.). に書き込みます。
When the following parts are replaced, the model 下記の部品を交換した場合、正常動作のために本メ
name MUST be written by using this menu to have ニューでモデル名を書き込む必要があります。
proper operation. DIGITAL P.C.B.
RX-V573/HTR-5065
DIGITAL P.C.B. EEPROM：DIGITAL P.C.B. の IC22

EEPROM: IC22 on DIGITAL P.C.B. モデル名を書き込むには、まず最初に S5-1. SWITCH
To write the model name, first switch to the write MODE メニューで書き込みモードに切り替えて、そ
mode by using the “S5-1. SWITCH MODE” menu and れから S5-2. MODEL NAME メニューで目的のモデ
then select the desired model name by using “S5-2. ル名を選択します。
MODEL NAME” menu.
S5-1. SWITCH MODE S5-1. SWITCH MODE

Pressing the “STRAIGHT” key will change the STRAIGHT キーを押すと表示が下記のように
display alternately as shown below. When 交互に切り替わります。 S5-1. SW: MODEL が
“S5-1. SW: MODEL” is displayed, this unit is in 表示されているときに本機は書き込みモード
the write mode. になっています。
Write mode / 書き込みモード
S5-1 S5-1
SW :PCB SW :MODEL
Press the “STRAIGHT” key
Note: After writing of the model name is 注意 : モデル名の書き込みを完了した後、必
completed, be sure to change to “S5-1. ず S5-1. SW: PCB に切り替えてくだ
SW: PCB”. さい。
S5-2. MODEL NAME S5-2. MODEL NAME

Select the desired model name by pressing STRAIGHT キーを押して目的のモデル名を選
the “STRAIGHT” key. Then the selected model 択します。選択されたモデル名が自動的に書
name is written automatically. き込まれます。
S5-2 S5-2
MODEL: V573 MODEL:H5065
Press the “STRAIGHT” key
50
RX-V573/HTR-5065
■ POWER AMPLIFIER ADJUSTMENT / パワーアンプ調整

1. Right after power is turned on, confirm that the voltage 1. 電源投入直後、R2154（SURROUND BACK Rch）、R2152
across the terminals of R2154 (SURROUND BACK Rch), （SURROUND Rch）、R2149（FRONT Rch）、R2151
R2152 (SURROUND Rch), R2149 (FRONT Rch), R2151 （CENTER）、R2150（FRONT Lch）、R2153（SURROUND
(CENTER), R2150 (FRONT Lch), R2153 (SURROUND Lch）、R2155（SURROUND BACK Lch）の端子間電圧を
Lch) and R2155 (SURROUND BACK Lch) are within the 測定し、0.1 mV から 10 mV の間であることを確認してく
confines of 0.1 mV to 10 mV. ださい。
2. If measured voltage exceeds 10 mV, remove R2108 2. 電圧が 10 mV を超えている場合は、R2108（SURROUND
(SURROUND BACK Rch), R2107 (SURROUND BACK Rch）、R2107（SURROUND Rch）、R2111（FRONT
Rch), R2111 (FRONT Rch), R2110 (CENTER), R2109 Rch）、R2110（CENTER）、R2109（FRONT Lch）、R2112
(FRONT Lch), R2112 (SURROUND Lch) and R2133 （SURROUND Lch）、R2113（SURROUND BACK Lch）を
(SURROUND BACK Lch), and then reconfirm the 外し、電圧を再確認してください。
voltage.
Attention 注意
If the measured voltage exceeds 10 mV after repairing パワーアンプ修理後に 10 mV を超えている場合は、抵
the power amplifier, check other parts again for any 抗を外す前に故障箇所を調べてください。
possible defect before removing the resistor.
3. Confirm that the voltage is within the confines of 0.2 3. 60 分後、電圧が 0.2 mV ∼ 15 mV であることを確認して
mV to 15 mV after 60 minutes. ください。
0.1 mV – 10 mV
(DC)
R2154 (SURROUND BACK Rch)

R2152 (SURROUND Rch)
R2149 (FRONT Rch)
RX-V573/HTR-5065
R2151 (CENTER)
R2150 (FRONT Lch)
R2153 (SURROUND Lch)
R2155 (SURROUND BACK Lch)
Front side
R2110 R2109 R2111 R2108 R2113 R2107 R2112
R2151 R2150 R2149 R2154 R2155 R2152 R2153
MAIN (1) P.C.B.
51
RX-V573/HTR-5065
■ DISPLAY DATA
● V4001 : 18-MT-11GNK (OPERATION P.C.B.)
69 1
PATTERN AREA
● PIN CONNECTION
Pin No. 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
Connection F2 NX NP NP P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31
Pin No. 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Connection P32 P33 P34 P35 P36 NX NX NX NX NX NX NX 18G 17G 16G 15G 14G 13G 12G 11G 10G 9G 8G 7G 6G 5G 4G 3G 2G 1G NP NP NX F1
Note : 1) F1, F2 ..... Filament pin 2) NP ..... No pin 3) NX ..... No extend pin 4) 1G-18G ..... Grid pin
● GRID ASSIGNMENT
18G 17G 16G 17G 15G

S8 S9 S15 S5 S7 S5
RX-V573/HTR-5065
1a 2a 1a 2a 1a 2a 1a 2a
S12 S10 S11 S6 S13

1G 2G 3G 4G 5G 6G 7G 8G 9G 10G 11G 12G 13G 14G
a
a S2
1-1 2-1 3-1 4-1 5-1
j
1-2 2-2 3-2 4-2 5-2 S3
f b f b
h k 1-3 2-3 3-3 4-3 5-3 S3
g m S4
S2
r n 1-4 2-4 3-4 4-4 5-4
g
e c e c
p 1-5 2-5 3-5 4-5 5-5
1-6 2-6 3-6 4-6 5-6

d d
(18G–16G) 1-7 2-7 3-7 4-7 5-7

(15G)
S1
(1G–14G)
52
RX-V573/HTR-5065
● ANODE CONNECTION
18G 17G 16G 15G 1G–14G
P1 1a 1a 1a S5 1-1
P2 1h 1h 1h S7 2-1
P3 1j 1j 1j 1d 3-1
P4 1k 1k 1k 2d 4-1
P5 1b 1b 1b S2 5-1
P6 1f 1f 1f 1e 1-2
P7 1m 1m 1m 2e 2-2
P8 1g 1g 1g S3 3-2
P9 1c 1c 1c 1c 4-2
P10 1e 1e 1e 2c 5-2
P11 1r 1r 1r S4 1-3
P12 1p 1p 1p 1g 2-3
P13 1n 1n 1n 2g 3-3
P14 1d 1d 1d 1f 4-3
P15 2a 2a 2a 2f 5-3
P16 2h 2h 2h 1b 1-4
P17 2j 2j 2j 2b 2-4
P18 2k 2k 2k 1a 3-4
P19 2b 2b 2b 2a 4-4
RX-V573/HTR-5065
P20 2f 2f 2f 5-4
P21 2m 2m 2m 1-5
P22 2g 2g 2g 2-5
P23 2c 2c 2c 3-5
P24 2e 2e 2e 4-5
P25 2r 2r 2r 5-5
P26 2p 2p 2p 1-6
P27 2n 2n 2n 2-6
P28 2d 2d 2d 3-6
P29 S8 4-6
P30 S9 5-6
P31 S6 1-7
P32 S13 2-7
P33 S15 3-7
P34 S12 4-7
P35 S10 5-7
P36 S11 – S1
53
RX-V573/HTR-5065
■ IC DATA
IC1: SII9573CTUC (DIGITAL P.C.B.)
HDMI port processors
* No replacement part available. / サービス部品供給なし
Always-On
CEC A0
Section
CEC A1
73 CEC Interface
CBUS/ CEC Interface
Mobile HD
Controller 0 Controller 1 72
HPD Control
78,82,86,90,94,99 CBUS0
Serial Ports CBUS1
DDC0 RnPWR5V,
DDC1 SBVCC5V
DDC Booting
DDC2 NVRAM Power
DDC3 EDID SRAM Sequencer 101
DDC4
DDC5 INT
DDC6
Configuration, Status, 69
HDCP and Interrupt-Control
I2C OTP
Local Registers Registers
I2C
DDC TX
TPI HW
E I2S/SPDIF/
DSD
Power-Down
M Main
Section Audio Output
R0X U 76,80,84,88,92,97
TMDS Rx Multi-Channel I2S/SPDIF
10-17
(Port 0)
A X
Audio Input
HDMI/
R1X TMDS Rx
M
U
MHL
Stream
C OSD
SPI
(Port 1) Receiver
X Mixer
20-27 InstaPort
M
U Main
TMDS Tx T0X
R2X TMDS Rx X
(Port 0) HDCP
(Port 2) 151-158
28-35 Encryption
SRC
HDCP
InstaPrevue
Decryption
R3X TMDS Rx
39-46
(Port 3)
B D
R4X Video/
TMDS Rx M HDMI/ Sub
Audio
(Port 4) U MHL M TMDS Tx T1X
47-54 Splitter
X Receiver U (Port 1)
InstaPort
R5X
TMDS Rx
X
M G HDCP Encryption 141-148
57-64 U
(Port 5)
X
F
D[19..0] Parallel M
Audio Output ENB I2S/SPDIF
Video U Sub
1-6,161-171,174-176 2 Channel
Input X
RX-V573/HTR-5065
Audio Input
Video
Pattern
Generator
ARC0/1 Rx
136,137 ARC
Input
ARC0/1 Tx
and
Output
37 CVCC12
38 AVDD33
36 AVDD12
19 AVDD33
18 AVDD12
9 HSYNC
8 VSYNC
40 R3XC+
29 R2XC+
21 R1XC+
11 R0XC+
44 R3X1+
42 R3X0+
35 R2X2+
33 R2X1+
31 R2X0+
27 R1X2+
25 R1X1+
23 R1X0+
17 R0X2+
15 R0X1+
13 R0X0+
39 R3XC-
28 R2XC-
20 R1XC-
10 R0XC-
43 R3X1-
41 R3X0-
34 R2X2-
32 R2X1-
30 R2X0-
26 R1X2-
24 R1X1-
22 R1X0-
16 R0X2-
12 R0X0-
14 T0X1-
6 D19
5 D18
4 D17
3 D16
2 D15
1 D14
7 DE
R3X2- 45 176 D13
R3X2+ 46 175 D12
R4XC- 47 174 D11
R4XC+ 48 173 IOVCC33
R4X0- 49 172 IDCK
R4X0+ 50 171 D10
R4X1- 51 170 D9
R4X1+ 52 169 D8
R4X2- 53 168 D7
R4X2+ 54 167 D6
AVDD12 55 166 D5
AVDD33 56 165 D4
R5XC- 57
R5XC+ 58
HDMI 164 D3
163 D2
R5X0- 59 RECEIVER/TRANSMITTER 162 D1
R5X0+ 60 161 D0
R5X1- 61 160 CVCC12
R5X1+ 62 159 TOX2+
G
R5X2- 63 DGND 158 TOX2-
R5X2+ 64 157 TOX1+
CVCC12 65 156 TOX1-
CSCL 66 155 TOX0+
CSDA 67 154 TOX0-
INT 68 153 TOXC+
RESET# 69 152 TOXC-
TPWR_CI2CA 70 151 TDVDD12
CEC_A1 71 150 TPVDD12
CEC_A0/WAKEUP 72 149 T1X2+
DSDA6(VGA) 73 148 T1X2-
DSCL6(VGA) 74 147 T1X1+
RSVDL 75 146 T1X1-
DSDA0 76 145 T1X0+
DSCL0 77 144 T1X0-
CBUS_HPD0 78 143 T1XC+
R0PWR5V 79 142 T1XC-
DSDA1 80 141 TDVDD12
DSCL1 81 140 TPVDD12
CBUS_HPD1 82 139 CVCC12
R1PWR5V 83 138 ARC1
DSDA2 84 137 ARC0
DSCL2 85 136 SD1_IN/SD1_OUT/SPDIF1_IN/SPDIF1_OUT
CBUS_HPD2 86 135 WS1_IN/WS1_OUT
R2PWR5V 87 134 SCK1_IN/SCK1_OUT

133
DSDA3 88 SD0_IN/SPDIFO_IN
R5PWR5V 100
SBVCC5V 101
VCC33OUT 102
MHL_CD0/GPIO0 103
MHL_CD1/GPIO1 104
TX_HPD0 105
TXDSDA0 106
TXDSCL0 107
TX_HPD1 108
TXDSDA1 109
TXDSCL1 110
APLL12 111
XTALVCC33 112
XTALOUT 113
XTALIN 114
XTALGND 115
CVCC12 116
SS/GPIO2 117
SCLK/GPIO3 118
SD0/GPIO4 119
SDI/GPIO5 120
WS0_OUT/DR0 121
SCK0/DDCK 122
IOVCC33 123
SD0_0/DL0 124
MCLK 125
SD0_1/DR1/GPIO6 126
SD0_2/DL1/GPIO7 127
SD0_3/DR2/GPIO8 128
MUTEOUT/GPIO9 129
SPDIF0_OUT/DL2 130
WS0_IN/GPIO11 131
132
DSCL3 89
CBUS_HPD3 90
R3PWR5V 91
DSDA4 92
DSCL4 93
CBUS_HPD4 94
R4PWR5V 95
RSVDL 96
DSDA5 97
DSCL5 98
CBUS_HPD5 99
SCK0_IN/GPIO10
54
RX-V573/HTR-5065
HDMI Receiver and MHL Port Pins HDMI Transmitter Port Pins
Pin Function Pin Function

Type I/O Detail of Function Type I/O Detail of Function
No. Name No. Name
12 R0X0- 154 T0X0-
13 R0X0+ 155 T0X0+ HDMI transmitter Port 0 TMDS output
14 R0X1- HDMI receiver Port 0 TMDS input data 156 T0X1- data pairs.
TMDS Input TMDS Output
15 R0X1+ pairs. 157 T0X1+ Main HDMI transmitter output Port
16 R0X2- 158 T0X2- TMDS data pairs.
17 R0X2+ 159 T0X2+
10 R0XC- HDMI receiver Port 0 TMDS input clock HDMI transmitter Port 0 TMDS output
TMDS Input 152 T0XC-
11 R0XC+ pair. clock pair.
TMDS Output
22 R1X0- Main HDMI transmitter output Port
153 T0XC+
23 R1X0+ TMDS clock pair.
24 R1X1- HDMI receiver Port 1TMDS input data 144 T1X0-
TMDS Input
25 R1X1+ pairs. 145 T1X0+ HDMI transmitter Port 1 TMDS output
26 R1X2- 146 T1X1- data pairs.
TMDS Output
27 R1X2+ 147 T1X1+ Sub HDMI transmitter output Port
20 R1XC- HDMI receiver Port 1 TMDS input clock 148 T1X2- TMDS data pairs.
TMDS Input
21 R1XC+ pair. 149 T1X2+
30 R2X0- HDMI transmitter Port 1 TMDS output
142 T1XC-
31 R2X0+ clock pair.
TMDS Output
32 R2X1- HDMI receiver Port 2 TMDS input data Sub HDMI transmitter output Port
TMDS Input 143 T1XC+
33 R2X1+ pairs. TMDS clock pair.
34 R2X2-
35 R2X2+
28 R2XC- HDMI receiver Port 2 TMDS input clock
TMDS Input
29 R2XC+ pair.
41 R3X0-
42 R3X0+ Audio Return Channel Pins
RX-V573/HTR-5065
43 R3X1- HDMI receiver Port 3 TMDS input data Pin Function
TMDS Input Type I/O Detail of Function
44 R3X1+ pairs. No. Name
45 R3X2- 137 ARC0 Audio Return Channels 0 and 1.
46 R3X2+ These pins are used to transmit or
39 R3XC- receive an IEC60958-1 audio stream.
HDMI receiver Port 3 TMDS input clock
TMDS Input In ARC transmitter mode, received
40 R3XC+ pair.
on the SPDIFn_IN input pin, this pin
49 R4X0- transmits an S/PDIF signal to an ARC
50 R4X0+ receiver-capable source (such as HTiB)
or a repeater (such as AVR) devices,
51 R4X1- HDMI receiver Port 4 TMDS input data
TMDS Input Input/ using single-mode ARC.
52 R4X1+ pairs. Analog
138 ARC1 Output In ARC receiver mode, transmitted
53 R4X2- through the SPDIFn_OUT pin, this pin
54 R4X2+ receives an S/PDIF signal from an ARC
47 R4XC- transmitter-capable sink (such as DTV)
HDMI receiver Port 4 TMDS input clock
TMDS Input device, using single-mode ARC. In
48 R4XC+ pair.
combination with external components,
59 R5X0- common-mode ARC can be received.
60 R5X0+ Each channel can either be an ARC
61 R5X1- input or an ARC output at one time.
HDMI receiver Port 5 TMDS input data
TMDS Input
62 R5X1+ pairs.
63 R5X2-
64 R5X2+
57 R5XC- HDMI receiver Port 5 TMDS input clock
TMDS Input
58 R5XC+ pair.
Note: For Port 0 and Port 5 that have been configured as MHL inputs, the
R0X0+ and R0X0- pin pair and R5X0+ and R5X0- pin pair carry the
respective MHL signals.
55
RX-V573/HTR-5065
Audio Pins SPI Interface Pins
Pin Function Pin Function

Type I/O Detail of Function Type I/O Detail of Function
No. Name No. Name
WS0_OUT/ Main port I2S word select output/DSD Input/
121 LVTTL Output 117 SS/GPIO2 LVTTL SPI slave select/programmable GPIO 2.
DR0 data right bit 0. Output
SCK0/ Main port I2S serial clock output/DSD LVTTL
122 LVTTL Output
DDCK clock output. SCLK/ Schmitt Input/
118 SPI clock/programmable GPIO 3.
Main port I2S serial data 0 output/DSD GPIO3 Open Output
124 SDO_0/DL0 LVTTL Output drain/
data left bit 0 output.
125 MCLK LVTTL Output Master clock output. LVTTL

Schmitt Input/ SPI slave data output/master data
119 SDO/GPIO4
Open Output input/programmable GPIO 4.
Main port I2S serial data 1 output/DSD
SDO_1/ drain
126 LVTTL Output data right bit 1 output/programmable
DR1/GPIO6
GPIO 6.
LVTTL
Main port I2S serial data 2 output/DSD Schmitt Input/ SPI slave data input/master data
SDO_2/DL1/ 120 SDI/GPIO5
127 LVTTL Output data left bit 1 output/programmable Open Output output/programmable GPIO 5.
GPIO7 drain
GPIO 7.
SDO_3/ Main port I2S serial data 3 output/DSD

128 LVTTL Output
DR2/GPIO8 data right bit 2/programmable GPIO 8.
MUTEOUT/ Input/ Mute audio output/programmable GPIO
129 LVTTL
GPIO9 Output 9.
SPDIF0_ Analog/ Main port S/PDIF output/DSD data left
130 Output Parallel Video Bus
OUT/DL2 LVTTL bit 2.
WS0_IN/ Input/ Main port I2S word select input/ Pin Function
131 LVTTL Type I/O Detail of Function
GPIO11 Output programmable GPIO 11. No. Name
SCK0_IN/ Input/ Main port I2S serial clock input/ 1 D14
132 LVTTL
GPIO10 Output programmable GPIO 10. 2 D15
SD0_IN/ Analog/ Main port I2S serial data input/S/PDIF 3 D16
133 Input
SPDIF0_IN LVTTL input. 4 D17
RX-V573/HTR-5065
SCK1_IN/ Input/ Sub port I2S serial clock1 input/I2S 5 D18

134 LVTTL
SCK1_OUT Output serial bit clock output. 6 D19
WS1_IN/ Input/ Sub port I2S word select input/I2S 161 D0
135 LVTTL
WS1_OUT Output word select output. 162 D1 Video data inputs.
163 D2
SD1_IN/
SD1_OUT/ Sub port I2S serial data input/I2S serial 164 D3
Input/ LVTTL Input The video data inputs can be configured
136 SPDIF1_IN/ LVTTL data1 output/ SPDIF input//SPDIF 165 D4 to support a wide variety of input formats,
Output
SPDIF1_ output. 166 D5 including multiple RGB and YCbCr bus
OUT formats, using register settings.
167 D6
168 D7
169 D8
170 D9
171 D10
174 D11
Crystal Pins 175 D12
Pin Function 176 D13
Type I/O Detail of Function
No. Name 7 DE LVTTL Input Data enable input.
LVTTL 9 HSYNC LVTTL Input Horizontal sync input.
113 XTALOUT 5V Output Crystal clock output. 8 VSYNC LVTTL Input Vertical sync input.
tolerant 172 IDCK LVTTL Input Input data clock.
LVTTL
114 XTALIN 5V Input Crystal clock input.
tolerant
56
RX-V573/HTR-5065
System Switching Pins
Pin
Function Name Type I/O Detail of Function
No.
76 DSDA0
80 DSDA1 DDC I2C data for respective HDMI receiver port.
84 DSDA2 LVTTL Schmitt Open
Input/Output
88 DSDA3 drain 5 V tolerant These signals are true open drain, and do not pull to ground when power is not
92 DSDA4 applied to the device. These pins require an external pull-up resistor.
97 DSDA5
DDC I2C data for VGA port.
LVTTL Schmitt Open
73 DSDA6(VGA) Input/Output
drain 5 V tolerant This signal is true open drain, and does not pull to ground when power is not
applied to the device. This pin requires an external pull-up resistor.
77 DSCL0
81 DSCL1 DDC I2C clock for respective HDMI receiver port.
85 DSCL2 LVTTL Schmitt Open
Input
89 DSCL3 drain 5 V tolerant These signals are true open drain, and do not pull to ground when power is not
93 DSCL4 applied to the device. These pins require an external pull-up resistor.
98 DSCL5
DDC I2C clock for VGA port.
LVTTL Schmitt Open
74 DSCL6(VGA) Input
DDC master I2C data for HDMI transmitter Port 0.
LVTTL Schmitt Open
106 TXDSDA0 Input/Output
DDC master I2C data for HDMI transmitter Port 1.
LVTTL Schmitt Open
109 TXDSDA1 Input/Output
RX-V573/HTR-5065
DDC master I2C clock for HDMI transmitter Port 0.
LVTTL Schmitt Open
107 TXDSCL0 Input/Output
DDC master I2C clock for HDMI transmitter Port 1.
LVTTL Schmitt Open
110 TXDSCL1 Input/Output
79 R0PWR5V
83 R1PWR5V 5 V port detection input for respective HDMI receiver port.
87 R2PWR5V Connect to 5 V signal from HDMI input connector. These pins require a 10 ohms
Power Input
91 R3PWR5V series resistor, a 5.1 k-ohms pull down resistor, and at least a 1 μF capacitor to
95 R4PWR5V ground.
100 R5PWR5V
78 CBUS_HPD0
82 CBUS_HPD1
86 CBUS_HPD2 LVTTL 1.5 mA 5 V Hot plug detect output for the respective HDMI receiver port.
Input/Output
90 CBUS_HPD3 tolerant Analog In MHL mode, these pins serve as the respective CTRL bus.
94 CBUS_HPD4
99 CBUS_HPD5
105 TX_HPD0 LVTTL 5 V tolerant Input Hot plug detect input for HDMI transmitter Port 0.
108 TX_HPD1 LVTTL 5 V tolerant Input Hot plug detect input for HDMI transmitter Port 1.
103 MHL_CD0/GPIO0 LVTTL Input/Output MHL cable detect 0/programmable GPIO 0.
104 MHL_CD1/GPIO1 LVTTL Input/Output MHL cable detect 1/programmable GPIO 1.
57
RX-V573/HTR-5065
Control Pins
Pin
No.
Local configuration/status I2C clock.
Schmitt Open drain 5
66 CSCL Input
V tolerant Chip configuration/status is accessed via this I2C port. This pin is true open
drain, so it does not pull to ground if power is not applied.
Local configuration/status I2C data.
LVTTL Schmitt Open
67 CSDA Input/Output
drain 5 V tolerant Chip configuration/status is accessed via this I2C port. This pin is true open
drain, so it does not pull to ground if power is not applied.
External reset.
Active LOW. Must be pulled up to VCC33OUT. When main power is not provided
69 RESET# Schmitt Input to the system, the microprocessor must present a high impedance of at least
100 k-ohms to RESET#. If this condition is not met, a circuit to block the leakage
from VCC33OUT to the microprocessor GPIO may be required.
Configuration Pins
Pin
No.
I2C slave address input / Transmit power sense output.
During power-on-reset (POR), this pin is used as an input to latch the I2C
subaddress. The level on this pin is latched when the POR transitions from the
70 TPWR_CI2CA LVTTL Input/Output asserted state to the de-asserted state.
After completion of POR, this pin is used as the TPWR output. A register setting
can change this pin to show if the active port is receiving a TMDS clock.
Schmitt Open drain Interrupt output.
68 INT Output
8 mA 3.3 V tolerant This is an open-drain output and requires an external pull-up resistor.
RX-V573/HTR-5065
CEC Pins
Pin
No.
Primary CEC I/O used for interfacing to CEC devices This signal is electrically
compliant with the CEC specification.
As an input, this pin acts as an LVTTL schmitt triggered input and is 5 V tolerant.
As an output, the pin acts as an NMOS driver with resistive pull-up.
This pin has an internal pull-up resistor.
CEC Compliant 5V This signal should be connected to the CEC signal of all HDMI input and output
72 CEC_A0 tolerant, Schmitt Input/Output ports if the system supports just one CEC line.
triggered, LVTTL OR
In a system designed to have separate CEC connectivity for the HDMI input and
output ports, this signal should be connected to the CEC signal of all the input
ports supported in the system.
This signal and CEC_A0 each connect to a separate CEC controller within the
port processor and are independent of each other.
Secondary CEC I/O used for interfacing to CEC devices.
This signal is electrically compliant with the CEC specification. As an input, this
pin acts as an LVTTL schmitt triggered input and is 5 V tolerant. As an output,
the pin acts as an NMOS driver with resistive pull-up. This pin has an internal
pull-up resistor.
CEC Compliant 5V
This is an optional CEC signal provided for system designers who want to
71 CEC_A1 tolerant, Schmitt Input/Output
implement a system with two independent CEC lines, such as a system that
triggered, LVTTL
supports a separate CEC line for the HDMI input ports and the HDMI output
ports. In the example of a DTV that provides a second HDMI output using the
SiI957n port processor; this signal can be connected to the CEC signal of the
output port while the CEC_A1 signal is connected to the CEC signal of the input
ports.
This signal and CEC_A1 each connect to a separate CEC controller within the
port processor and are independent of each other.
58
RX-V573/HTR-5065
Power and Ground Pins
Pin
No.
19
38 AVDD33 Power 3.3 V TMDS core VDD.
56
123
IOVCC33 Power 3.3 V I/O VCC.
173
Local power from system.
101 SBVCC5 Power 5.0 V
This pin requires a 10 ohms series resistor.
18
36 AVDD13 Power 1.3 V TMDS receiver core VDD.
55
37
65
116 CVCC13 Power 1.3 V Digital core VCC.
139
160
111 APLL13 Power 1.3 V PLL analog VCC.
102 VCC33OUT Power 3.3 V Internal regulator 3.3 V output.
140
TPVDD13 Power 1.3 V Analog power for TMDS Tx core.
150
141
TDVDD13 Power 1.3 V Digital power for TMDS Tx core.
151
112 XTALVCC33 Power 3.3 V PLL crystal oscillator power.
115 XTALGND Ground GND PLL crystal oscillator ground.
The ePad must be soldered to ground, as this is the only ground connection for
ePad GND Ground GND
the device.
RX-V573/HTR-5065
Reserved Pin
Pin
Function Name Type Detail of Function
No.
75
RSVDL Reserved Reserved, must be tied to ground.
96
59
RX-V573/HTR-5065
IC41: D70YE101BRFP266 (DIGITAL P.C.B.)

Decoder/Post processor
Program/Data JTAG EMU

256 RAM
D1 256K Bytes
Data 64 McASP0
32 16 Serializes
R/W Program/Data
C67x+ Microprocessor 256 ROM Page1
256K Bytes 32
D2 Memory
Data 64 Controller Program/Data 32
McASP DMA Bus

R/W ROM Page2 McASP1
256 6 Serializes
256K Bytes 32
Program
I/O INT Fetch Program/Data
ROM Page3 32 McASP2
256
256K Bytes 2 Serializes
256
32 DIT Only
Peripheral Configuration Bus

Program CSP 32 32
32 SPI1
Cache 256
32K Bytes PMP DMP
32 SPI0
32 32
32 I2C0
High-performance
Crossbar Switch 32
32 I2C1
32 32 32 32 32 RTI
32 PLL
I/O Interrupts MAX0 CONTROL MAX1 Events
Out In
EMIF
dMAX
Peripheral Interrupt and DMA Events
RX-V573/HTR-5065
SPI0_ENA/I2C1_SDA
SPI0_CLK/I2C0_SCL
SPI0_SCS/I2C1_SCL
EM_BA[0]
EM_BA[1]
EM_CS[2]
EM_CS[0]
EM_A[10]
EM_A[11]
EM_RAS
EM_A[0]
EM_A[1]
EM_A[2]
EM_A[3]
EM_A[4]
EM_A[5]
EM_A[6]
EM_A[7]
EM_A[8]
EM_A[9]
EM_RW
EM_OE
CVDD
CVDD
CVDD
CVDD
DVDD
DVDD
DVDD
DVDD
VSS
VSS
VSS
VSS
VSS
VSS
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
VSS 109 72 VSS

SPI0_SIMO 110 71 EM_CKE
SPI0/SOMI/I2C0_SDA 111 70 EM_CLK
DVDD 112 69 VSS
AXR0[0] 113 68 DVDD
VSS 114 67 EM_WE_DQM[1]
AXR0[1] 115 66 EM_D[8]
AXR0[2] 116 65 CVDD
AXR0[3] 117 64 EM_D[9]
VSS 118 63 EM_D[10]
AXR0[4] 119 62 VSS
AXR0[5]/SPI1_SCS 120 61 EM_D[11]
AXR0[6]/SPI1_ENA 121 60 DVDD
AXR0[7]/SPI1_CLK 122 59 EM_D[12]
CVDD 123 58 EM_D[13]
VSS 124 57 CVDD
DVDD 125 56 EM_D[14]
AXR0[8]AXR1[5]/SPI1_SOMI 126 55 EM_D[15]
AXR0[9]AXR1[4]/SPI1_SIMO 127 54 VSS
CVDD 128 53 CVDD
VSS 129 52 EM_D[0]
AXR0[10]/AXR1[3] 130 51 EM_D[1]
AXR0[11]/AXR1[2] 131 50 DVDD
CVDD 132 49 EM_D[2]
VSS 133 48 EM_D[3]
AXR0[12]/AXR1[1] 134 47 VSS
AXR0[13]/AXR1[0] 135 46 EM_D[4]
DVDD 136 45 EM_D[5]
AXR0[14]/AXR2[1] 137 44 CVDD
AXR0[15]/AXR2[0] 138 43 EM_D[6]
ACLKR0 139 42 DVDD
VSS 140 41 EM_D[7]
AFSR0 141 40 VSS
ACLKX0 142 39 EM_WE_DQM[0]
AHCLKR0/AHCLKR1 143 38 EM_WE
AFSX0 144 37 EM_CAS
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
11
1
2
3
4
5
6
7
8
9
VSS
AHCLKX0/AHCLKX2
AMUTE0
AMUTE1
AHCLKX1
VSS
ACLKX1
CVDD
ACLKR1
DVDD
AFSX1
AFSR1
VSS
RESET
VSS
CVDD
CLKIN
VSS
TMS
CVDD
TRST
OSCVSS
OSCIN
OSCOUT
OSCVDD
VSS
PLLHV
TDI
TDO
VSS
DVDD
EMU[0]
CVDD
EMU[1]
TCK
VSS
60
RX-V573/HTR-5065
Function Name
No. I/O Detail of Function
(P.C.B.)
1 VSS
2 AHCLKX0/AHCLKX2 IO McASP0 and McASP2 transmit master clock
3 AMUTE0 IO McASP0 mute output
4 AMUTE1 IO McASP1 mute output
5 AHCLKX1 IO McASP1 transmit master clock
6 VSS
7 ACLKX1 IO McASP1 transmit bit clock
8 CVDD
9 ACLKR1 IO McASP1 receive bit clock
10 DVDD
11 AFSX1 IO McASP1 transmit frame Sync (L/R clock)
12 AFSR1 IO McASP1 receive frame Sync (L/R clock)
13 VSS
14 RESET IO Device reset pin
15 VSS
16 CVDD
17 CLKIN IO Alternate clock input (3.3-V LVCMOS input)
18 VSS
19 TMS IO Test mode select
20 CVDD
21 TRST IO Test reset
22 OSCVSS PWR Oscillator Vss tap point (for filter only)
23 OSCIN IO 1.2-V oscillator input
RX-V573/HTR-5065
24 NC O
25 OSCVDD PWR Oscillator 1.2-V Vpp tap point (for filter only)
26 VSS
27 PLLHV PWR PLL 3.3-V supply input (requires external filter)
28 TDI IO Test data in
29 TDO OZ Test data out
30 VSS
31 DVDD
32 EMU[0] IO Emulation pin 0
33 CVDD
34 EMU[1] IO Emulation pin 1
35 TCK IO Test clock
36 Ground(Vss)
37 EM_CAS O SDRAM column address strobe
38 EM_WE O SDRAM write enable
39 EM_WE_DQM[0] O Write enable or byte enable for EM_D [7:0]
40 VSS
41 EM_D[7] IO EMIF data bus [lower 16-bits]
42 DVDD
44 CVDD
47 VSS
50 DVDD
61
RX-V573/HTR-5065
Function Name
(P.C.B.)
53 CVDD
54 VSS
56 EM_D[14] IO EMIF data bus [lower 16-Bits]
57 CVDD
60 DVDD
62 VSS
65 CVDD
67 EM_WE_DQM[1] O Write enable or byte enable for EM_D [15:8]
68 DVDD
69 VSS
70 EM_CLK O SDRAM clock
71 EM_CKE O SDRAM clock enable
72 VSS
73 DVDD
RX-V573/HTR-5065
74 EM_A[11] O EMIF address bus

77 CVDD
78 VSS
81 DVDD
82 VSS
85 CVDD
87 VSS
90 CVDD
92 DVDD
94 EM_BA[1] O SDRAM bank address and asynchronous memory Low-Order address
95 VSS
96 EM_BA[0] O SDRAM bank address and asynchronous memory Low-Order address
97 EM_CS[0] O SDRAM chip select
98 EM_RAS O SDRAM row address strobe
99 VSS
100 EM_CS[2] O Asynchronous memory chip select
62
RX-V573/HTR-5065
Function Name
(P.C.B.)
101 CVDD
102 NC O Asynchronous memory read/not write
103 DVDD
104 EM_OE O SDRAM output enable
105 SPI0_ENA/I2C1_SDA IO SPI0 enable (ready) or I2c1 serial data
106 VSS
107 SPI0_ENA/I2C1_SCL IO SPI0 enable (ready) or I2c1 serial clock
108 SPI0_CLK/I2C0_SCL IO SPI0 serial clock or I2c0 serial clock
109 VSS
110 SPIO_SIMO IO SPI0 data pin slave in master out
111 SPIO_SOMI/I2C0_SDA IO SPI0 data pin slave out master in or I2C0 serial data
112 DVDD
113 AXR0[0] IO McASP0 serial data 0
114 VSS
118 VSS
120 SPI1_SCS IO McASP0 serial data 5 or SPI1 slave chip select
121 SPI1_ENA IO McASP0 serial data 6 or SPI1 enable (ready)
122 SPI1_CLK IO McASP0 serial data 7 or SPI1 serial clock
123 CVDD
RX-V573/HTR-5065
124 VSS
125 DVDD
McASP0 serial data 8 or McASP1 serial data 5 or SPI1 data pin slave out master
126 /SPI1_SOMI IO
in
McASP0 serial data 9 or McASP1 serial data 4 or SPI1 data pin slave in master
127 /SPI1_SIMO IO
out
128 CVDD
129 VSS
130 AXR0[10] IO McASP0 serial data 10 or McASP1 serial data 3
132 CVDD
133 VSS
136 DVDD
139 ACLKR0 IO McASP0 receive bit clock
140 VSS
141 AFSR0 IO McASP0 receive frame Sync (L/R clock)
142 ACLKX0 IO McASP0 transmit bit clock
143 AHCLKR0/AHCLKR1 IO McASP0 and McASP1 receive master clock
144 AFSX0 IO McASP0 transmit frame Sync (L/R clock)
63
RX-V573/HTR-5065
IC951: DM860A (DIGITAL P.C.B.)

Network microprocessor
General Purpose
Security Engine Timing Engine
RESET, BOOT_SEL on-chip RAM CLOCKS
Reset, Boot, OTP 2 PLLs, 3 DCOs
64 kBytes
master DMA
AV0 Port slave
4xAudio, 1xVideo 2 Forwarding Units
I2S, I8S, DSD, video 64 Contexts
AV2 Port S ARM 926EJ-S

4xAudio
I2S, I8S, DSD 240 MHz
Y
I-cache 16 kByte
slave master
AV3 Port S D-cache 16 kByte
2xAudio I2S, I8S, DSD,
SPDIF
T
slave Interrupt Controller GPIO
AV4 Port Watchdog, 2 Timer
2xAudio I2S, I8S, DSD, E
SPDIF, ADAT
M RTSP Processor
160 MHz
stereo master
Audio PWM-DAC slave I-cache 16 kByte
TCM 48 kByte
Memory Bus, SD/SRAM and System slave

System Extension Extension Controller Audio Engine
B 160 MHz
master
slave slave I-cache 4 kByte
LCD LCD Controller U
TCM 10 kByte
USB 2.0 slave master Ethernet MAC

USB USB (R/SSS)MII
OTG
10/100 Mbps
PHY 8 kByte RAM
slave slave
UART 2 x UART-1 NAND FLASH NAND
slave slave
SPI SPI SSM Controller SSM
RX-V573/HTR-5065
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
VDD33 VSS33
A USBDN n.c. n.c. VDD33 RFCLKP RFRXQP RFRXIP HIGHZ SSMD0 SSMD4 SSMCMD RXD1 TDO TDI A0 A1 A
USBC USBC
VDD33 VSS33
B USBDP n.c. n.c. VSS RFCLKN RFRXQN RFRXIN TEST1 SSMD1 SSMD5 TXD1 RXD0 TMS SPICLK SPINCS1 A2 B
USBT USBT
VSS12 NRES12
C USBREXT USBXO USBXI VSS RREF n.c. n.c. SSMCLK SSMD2 SSMD6 TXD0 TCK SPINCS0 A3 A4 A5 C
USB OUT
VDD12 NRES33 NRES33 NRES12

D USBVBUS USBATST VDD33 VDD12 SSMWP SSMCP SSMD3 SSMD7 NRESET SPIDI SPIDO A6 A7 A8 D
USB OUT REF REF
VSS33 USBVB VDD12 VDD12 VDD12 VDD12

E USBID NC VDD33IO VDD33IO VDD33IO VDD33IO A9 A10 A11 A12 E
RTC USDRV CORE CORE CORE CORE
VDD33 VDD33 VDD12

F RTCXIN NC VDD33IO VSS VSS VSS VSS VSS VSS VSS VSS A13_RAS A14_CAS A15_BA0 A16_BA1 F
RTC PLL CORE
VDD12 VSS33 VDD12 A17_DQ A18_DQ

G RTCXOUT NC VDD33IO VSS VSS VSS VSS VSS VSS VSS VSS A19 A20 G
DCO PLL CORE M0 M1
VSS12 VSS12 VDD12 VDD12

H NC VSS VSS VSS VSS VSS VSS VSS VSS VDD33IO A21 A22 A23 NCS3 H
DCO PLL PLL CORE
VDD12
J PDOUT1 VCO1 XTALO NC VSS VSS VSS VSS VSS VSS VSS VSS VDD33IO NCS0 NCS1 NCS2 MEMCKE J
CORE
VDD12
K PDOUT0 VCO0 XTALI AOUTLP VDD33IO VSS VSS VSS VSS VSS VSS VSS VSS MEMCLK NWE NOE NWAIT K
CORE
VDD12
L AV0CLK AOUTLN AOUTRN AOUTRP VDD33IO VSS VSS VSS VSS VSS VSS VSS VSS D3 D2 D1 D0 L
CORE
AV0 AV0 AV0 AV0 VDD12

M VSS VSS VSS VSS VSS VSS VSS VSS VDD33IO D7 D6 D5 D4 M
CTRL0 CTRL1 CTRL2 DATA3 CORE
AV0 AV0 AV0 AV1 VDD12

N VSS VSS VSS VSS VSS VSS VSS VSS VDD33IO D11 D10 D9 D8 N
DATA2 DATA1 DATA0 DATA3 CORE
AV1 AV1 AV1 AV2 VDD12 VDD12 VDD12 VDD12

P VDD33IO VDD33IO VDD33IO VDD33IO FD0 FD1 D13 D12 P
DATA2 DATA1 DATA0 DATA3 CORE CORE CORE CORE
AV2 AV2 AV3 LCD

R AV2CLK AV3CLK LCDD11 LCDD7 LCDD3 VPP MIITXEN MIITXCLK MIIRXER MIICRS FD2 FD3 FD4 D14 R
CTRL1 DATA2 DATA1 CTRL0
AV2 AV2 AV3 AV3 LCD MII

T LCDD14 LCDD10 LCDD6 LCDD2 LCDCLK MIIITXER MIIRXCLK MIICOL FD5 FD6 FD7 D15 T
CTRL0 DATA1 CTRL1 DATA0 CTRL1 RXDV
AV2 AV3 AV4 LCD

U LCDD16 LCDD13 LCDD9 LCDD5 LCDD1 MIITXD0 MIITXD2 MIIRXD0 MIIRXD2 MIIMDIO NFCE0 FCLE NFWE NFRB U
DATA0 CTRL0 DATA1 CTRL2
AV4 LCD MIIPHY

V NC LCDD17 LCDD15 LCDD12 LCDD8 LCDD4 LCDD0 MIITXD1 MIITXD3 MIIRXD1 MIIRXD3 MIIMDC NFWP NFRE FALE V
DATA0 CTRL3 CLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
64
RX-V573/HTR-5065
AV-Port 0
Pin No. Function Name I/O Detail of Function
M4
N1 Audio/video data.
AV0DATA[3:0] I/O
N2 Several formats are supported.
N3
N4 Video data, together with AV0DATA[3:0]:
P1 AV0DATA[3:0] = video[3:0]
AV1DATA[3:0] I/O
P2 AV1DATA[3:0] = video[7:4]
P3
Data clock. Depending on the AV-Port 0 configuration, this clock is a bit- or byte-clock which is used to
L1 AV0CLK I/O
transmit or receive the AV0DATA[*] synchronously.
Configurable sync signal:
M1 AV0CTRL0 I/O • Serial audio formats: LRCK input or output.
• Video formats: PSYNC input or output.
M2 AV0CTRL1 I/O • Serial audio formats: Master clock output.
• Video formats: DVALID input or output.
M3 AV0CTRL2 I/O
• Video formats: FSYNC input or output.
AV-Port 2
P4
R3 Audio data.
AV2DATA[3:0] I/O
T2 Several formats are supported.
U1
Data clock. Depending on the AV-Port 2 configuration this clock is a bit-clock which is used to transmit or
R1 AV2CLK I/O
receive the AV2DATA[*] synchronously.
RX-V573/HTR-5065
T1 AV2CTRL0 I/O
Serial audio formats: LRCK input or output.
R2 AV2CTRL1 I/O
Serial audio formats: Master clock output.
AV-Port 3
R5 Audio data.
AV3DATA[1:0] I/O
T4 Several formats are supported.
Data clock. Depending on the AV-Port 3 configuration this clock is a bit-clock which is used to transmit or
R4 AV3CLK I/O
receive the AV3DATA[*] synchronously.
U2 AV3CTRL0 I/O
Serial audio formats: LRCK input or output.
T3 AV3CTRL1 I/O
Serial audio formats: Master clock output.
AV-Port 4
U3 Audio data.
AV4DATA[1:0] I/O
V2 Several formats are supported.
PWM-DAC
K4 AOUTLP O Left channel PWM output (positive).
L2 AOUTLN O Left channel PWM output (negative).
L4 AOUTRP O Right channel PWM output (positive).
L3 AOUTRN O Right channel PWM output (negative).
UART Interface
B14 RXD0 I UART-0 receive signal.
C13 TXD0 O UART-0 transmit signal.
A14 RXD1 I UART-1 receive signal.
B13 TXD1 O UART-1 transmit signal.
65
RX-V573/HTR-5065
Serial Peripheral Interface (SPI)

D14 SPIDIN I SPI data receive.
D15 SPIDOUT O SPI data transmit.
B16 SPICLK I/O SPI clock.
Multi-master mode: Chip-select input (used to detect bus conflict).
C15 SPINCS0 I/O Master only mode: Chip-select 1 output.
Slave mode: Chip-select input.
Multi-master mode: Chip-select 2 output.
B17 SPINCS1 I/O Master only mode: Chip-select 2 output.
Slave mode: Not used.
External Memory Interface

T18
R18
P17
P18
N15
N16
N17
N18
D[15:0] I/O Data bus for external memory and peripheral access.
M15
M16
M17
M18
L15
L16
L17
RX-V573/HTR-5065
L18
E18
E17
E16
E15
D18
D17
D16 A[12:0] O Address bus for external memory and peripheral access.
C18
C17
C16
B18
A18
A17
SRAM: Address output
F15 A13_RAS O
SDRAM: Row access strobe
F16 A14_CAS O
SDRAM: Column access strobe
F17 A15_BA0 O
SDRAM: Bank select
F18 A16_BA1 O
SDRAM: Bank select
G15 A17_DQM0 O
SDRAM: Data mask
G16 A18_DQM1 O
SDRAM: Data mask
H17
H16
H15 A[23:19] O Address bus for external memory and peripheral access.
G18
G17
66
RX-V573/HTR-5065

H18 Chip select signals. The active memory range for NCS[n] (active low) can be configured.
J17 • NCS[0] supports SRAM, can be used for booting.
J16 NCS[3:0] O • NCS[1] supports SDRAM or SRAM.
J15 • NCS[2] supports SRAM.
• NCS[3] supports SRAM.
K17 NOE O Output enable, asserted (low) for read operations.
K16 NWE O Write enable, asserted (low) for write operations.
K18 NWAIT I External wait line. If NWAIT is asserted, memory access will be stalled. Can be configured as either low-
active (default) or high-active.
K15 MEMCLK O SDRAM system clock.
J18 MEMCKE O SDRAM clock enable.
NAND-Flash Interface
T17
T16
T15
R17
FD[7:0] I/O Bi-directional data bus.
R16
R15
P16
P15
V18 FALE O Address latch enable; pull-up/down defines boot mode.
U16 FCLE O Command latch enable; pull-up/down defines boot mode.
U15 NFCE0 O Chip-enable, low-active.
U18 NFRB I Ready/busy. NAND flash is busy when NFRB is low.
RX-V573/HTR-5065
V17 NFRE O Read enable, low-active.
U17 NFWE O Write enable, low-active.
V16 NFWP O Write protect, low-active.
Ethernet MAC-Phy Interface (MII)

Pin No. Function Name I/O MII RMII SMII
U14 MIIDIO I/O Management data Management data
V14 MIIMDC O Management clock Management clock
V13 MIIRXD[3] I RxD 3 RxD 1
U13 MIIRXD[2] I RxD 2 RxD 0
V12 MIIRXD[1] I RxD 1 Rx-Sync
U12 MIIRXD[0] I RxD 0 RxD
T12 MIIRXCLK I Receive clock Receive clock
R13 MIIRXER I Receive error Receive error
T14 MIIRXDV I Receive data valid Carrier sense/data valid
V11 MIITXD[3] O TxD 3 TxD 1
U11 MIITXD[2] O TxD 2 TxD 0
V10 MIITXD[1] O TxD 1 Tx-Sync
U10 MIITXD[0] O TxD 0 TxD
R12 MIITXCLK I Transmit clock Transmit clock
T11 MIITXER O Transmit error
R11 MIITXEN O Transmit data enable Transmit data enable
T13 MIICOL I MII ethernet collision
R14 MIICRS I MII carrier sense
V15 MIIPHYCLK O 25.000 MHz clock 50.000 MHz clock 125.000 MHz clock
67
RX-V573/HTR-5065
USB 2.0 OTG

B1 USBD+ I/O Positive data line that is connected to the serial USB cable.
A1 USBD– I/O Negative data line that is connected to the serial USB cable.
E2 USBID I USB ID pin of mini-AB receptacle.
C2 USBREXT I External bias resistor (2K7, 1%); connect resistor to VSSUSB.
D2 USBVBUS I VBUS voltage sense.
E3 USBVBUSDRV O Control signal to control VBUS 5V voltage source.
C4 USBXTALI I Oscillator circuit input for a 24.000 MHz crystal (optional).
Without external crystal, pull this pin to GND.
C3 USBXTALO O Oscillator circuit output for a 24.000 MHz crystal (optional).
Without external crystal, leave this pin open.
D3 USBATST – Do not connect.
Power-on Reset Pins

D6 NRES12REF I Voltage reference input. NRES12OUT is release when this input voltage exceeds VTH12.
C5 NRES12OUT O Open-drain reset (active low) for 1.2V core power supply.
D5 NRES33REF I Voltage reference input. NRES33OUT is release when this input voltage exceeds VTH33.
D4 NRES33OUT O Open-drain reset (active low) for 3.3V core power supply
Real-Time Clock (RTC) Pins (RTC is Not Supported)

F2 RTCXIN I No connection. Leave this pin open circuit.
G2 RTCXOUT O No connection. Leave this pin open circuit.
F1 VDD33RTC Power No connection. Leave this pin open circuit.
RX-V573/HTR-5065
E1 VSS33RTC Power Ground (0 V) for RTC
LCD Interface
LCD STN monochr. LCD STN color

Pin No. Function Name I/O TFT Mode LCD STN monochr. LCD STN color
(double) (bias)
V3 LCDD[17] O RED5
U4 LCDD[16] O RED4
V4 LCDD[15] O RED3
T5 LCDD[14] O RED2
U5 LCDD[13] O RED1
V5 LCDD[12] O (RED0)
R6 LCDD[11] O GREEN5
T6 LCDD[10] O GREEN4
U6 LCDD[9] O GREEN3
V6 LCDD[8] O GREEN2
R7 LCDD[7] O GREEN1 DATAHIGH3 DATA7 DATA7
T7 LCDD[6] O GREEN0 DATAHIGH2 DATA6 DATA6
U7 LCDD[5] O BLUE5 DATAHIGH1 DATA5 DATA5
V7 LCDD[4] O BLUE4 DATAHIGH0 DATA4 DATA4
R8 LCDD[3] O BLUE3 DATA3 DATALOW3 DATA3 DATA3
T8 LCDD[2] O BLUE2 DATA2 DATALOW2 DATA2 DATA2
U8 LCDD[1] O BLUE1 DATA1 DATALOW1 DATA1 DATA1
V8 LCDD[0] O (BLUE0) DATA0 DATALOW0 DATA0 DATA0
T10 LCDCLK O Byte clock CL2 CL2 CL2 CL2
V9 LCDCTRL[3] O Display off Display off Display off Display off Display off
U9 LCDCTRL[2] O Vsync FLM FLM FLM FLM
T9 LCDCTRL[1] O HSync CL1 CL1 CL1 CL1
R9 LCDCTRL[0] O DVALID M/Bias
68
RX-V573/HTR-5065
SSM Interface
D12
C12
B12
A12
SSMD[7:0] I/O Data lines.
D11
C11
B11
A11
C10 SSMCLK O Clock output.
A13 SSMCMD O Command output.
D10 SSMCP I Card power input (high = off).
D9 SSMWP I Write protect input (low = protect).
External PLL Pins

J2 External oscillator inputs, typically coming from an external VCO. Together with the external loop-filter and
VCO[1:0] I
K2 the internal clock dividers, each PDOUT/VCO pair can form a complete PLL.
J1 Phase discriminator outputs. These signals are charge-pump type outputs.
PDOUT[1:0] O
K1 Each of them can be used to feed the loop-filter of a PLL structure.
Global Pins
Reset (active low). When asserted, the chip is placed in the reset state and the peripheral pins are
configured as inputs. After deassertion of NRESET, the chip is clocked by XTALI and starts booting from the
D13 NRESET I port configured by the FCLE, FALE pins.
The NRESET signal must be asserted after power-up.
K3 XTALI I Oscillator circuit input. Internal system clock will be derived from XTALI (internal clock multiplier).
RX-V573/HTR-5065
J3 XTALO O Oscillator circuit output.
C7 RREF I Reference current. Connect a 3.0 k-ohms ±1% resistor to GND.
B10 TEST1 I Reserved. Connect to VDD for normal operation.
A10 HIGHZ I Reserved. Connect to VDD for normal operation.
E4
F4
G4
H4
J4
V1
n.c. – Pins must be left unconnected (18x).
A4
A5
B4
B5
C8
C9
JTAG Interface
B15 TMS I JTAG mode select.
C14 TCK I JTAG clock.
A16 TDI I JTAG serial data input.
A15 TDO O JTAG serial data output.
69
RX-V573/HTR-5065
Power Supply Pins

Pin No. Function Name Detail of Function Pin No. Function Name Detail of Function
A6 K13
E8 L6
E9 L7
E12 L8
E13 L9
F5 L10
G5 L11
H14 L12
J14 L13
VDD33 I/O power supply (+3.3 V).
K5 M6
L5 M7
M14 M8
N14 M9
P6 M10 VSS Ground (0 V).
P7 M11
P10 M12
P11 M13
D7 N6
F6 N7
F7 N8
F8 N9
F9 N10
F10 N11
F11 N12
F12 N13
F13 B6
G6 C6
RX-V573/HTR-5065
G7 R10 VPP
G8 A2
VDD33USB
G9 B2 Power supply (+3.3 V) for USB interface.
G10 A3 Ground (0 V).
VSS33USB
G11 B3
G12 F3 VDD33PLL Power supply (+3.3V) for PLL.
G13 G3 VSS33PLL Ground (0 V).
H6 E6
H7 E7
H8 E10
H9 VSS Ground (0 V). E11
H10 F14
H11 G14
H12 H5
H13 J5
J6 K14 VDD12 Power supply (+1.2V).
J7 L14
J8 M5
J9 N5
J10 P8
J11 P9
J12 P12
J13 P13
K6 D8
K7 D1 VDD12USB Power supply (+1.2V) for USB interface.
K8 C1 VSS12USB Ground (0 V).
K9 H3 VDD12PLL Power supply (+1.2V) for PLL.
K10 H2 VSS12PLL Ground (0 V).
K11 G1 VDD12DCO Power supply (+1.2V) for DCO.
K12 H1 VSS12DCO Ground (0 V).
70
RX-V573/HTR-5065
IC21: R5F3651TNFC (DIGITAL P.C.B.)

Microprocessor
8 8 8 8 8 8 8 8
Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P12 Port P13
VCC2 ports
Internal peripheral functions

UART or System clock generator
clock synchronous serial I/O XIN-XOUT
Timer (16-bit)
(6 channels) XCIN-XCOUT
Outputs (timer A): 5 PLL frequency synthesizer
Clock synchronous serial I/O On-chip oscillator (125 kHz)
Inputs (timer B): 6 High-speewd on-chip oscillator
(8 bit x 2 channels)
Three-phase motor control circuit DMAC (4 channels)
Multi-master I2C-bus interface
(1 channel) CRC arithmetic circuit
Real-time clock (CRC-CCITT or CRC-16)
PWM function (8-bit x 2) CEC function Voltage detecter

Power-on reset
Remote control signal
On-chip debugger
receiver (2 circuits)
M16C/60 series Memory
Watchdog timer Microprocessor core
(15-bit) ROM
R0H R0L SB
A/D converter R1H R1L USP RAM
(10-bit resolution X 26 channels) R2
R3 ISP
D/A converter INTB

A0
(8-bit resolution X 2 circuits) PC
A1
FB FLG Multiplier
VCC1 ports
Port P14 Port P11 Port P10 Port P9 Port P8 Port P7 Port P6
RX-V573/HTR-5065
2 8 8 8 8 8 8
98 N_INT3
91 N_INT6
90 N_INT7
84 P12_0
83 P12_1
82 P12_2
81 P12_3
80 P12_4
101 RXD6
85 VCC2
66 RXD7
100 TXD6
65 TXD7
67 CLK7
102 P1_1
99 P1_4
97 P1_6
96 P1_7
95 P2_0
94 P2_1
93 P2_2
92 P2_3
89 P2_6
88 P2_7
86 P3_0
79 P3_1
78 P3_2
77 P3_3
76 P3_4
75 P3_5
74 P3_6
73 P3_7
72 P4_0
71 P4_1
70 P4_2
69 P4_3
68 P4_4
87 VSS
P1_0 103 64 P12_5

P0_7 104 63 P12_6
P0_6 105 62 P12_7

AN0_5 106 61 P5_0
AN0_4 107 60 P5_1
AN0_3 108 59 P5_2
AN0_2 109 58 P5_3
AN0_1 110 57 P13_0
AN0_0 111 56 P13_1
P11_7 112 55 P13_2
P11_6 113 54 P13_3
P11_5 114 MICROPROCESSOR 53 P5_4

P11_4 115 52 P5_5
P11_3 116 51 P5_6
P11_2 117 50 P5_7
P11_1 118 49 P13_4
P11_0 119 48 P13-5
AN7 120 47 P13-6
AN6 121 46 P13_7
AN5 122 45 P6_0
AN4 123 44 CLK0
AN3 124 43 SCL0
AN2 125 ROM: 768KByte 42 SDA0
AN1 126 RAM: 47KByte 41 P6_4
AVSS 127 40 CLK1
AN0 128 39 VSS
CLK3 10
P14_1 11
P14_0 12
BYTE 13
CNVSS 14
P8_7 15
P8_6 16
/RESET 17
XOUT 18
VSS 19
XIN 20
VCC1 21
CEC 22
N_INT2 23
N_INT1 24
N_INT0 25
TA4IN 26
P8_0 27
P7_7 28
P7_6 29
TA2IN 30
P7_4 31
TA1IN 32
P7_2 33
SCL2 34
SDA2 35
TXD1 36
VCC1 37
RXD1 38
VREF 1
AVCC 2
SIN4 3
SOUT4 4
CLK4 5
P9_4 6
DA0 7
SOUT3 8
SIN3 9
71
RX-V573/HTR-5065
I/O
POWER ON
Pin Function Name
STANDBY
Port Name Detail of Function
No. (P.C.B.)
1 VREF VREF MCU MCU AD standard voltage

2 AVCC AVCC MCU MCU Microprocessor power supply
3 P9_7/N_ADTRG/SIN4 EEP_MISO SI O EEPROM / Expansion Flash synchronization data input
4 P9_6/ANEX1/SOUT4 EX_MOSI SO O FL driver / EEPROM / Expansion Flash synchronization data input
5 P9_5/ANEX0/CLK4 EX_SCK SO O FL driver / EEPROM / Expansion Flash synchronous clock output
6 P9_4/DA1/TB4IN/PWM1 (no_use) O O
7 P9_3/DA0/TB3IN/PWM0 AMP_LMT DA O Limiter control output
8 P9_2/TB2IN/PMC0/SOUT3 DSP_MOSI SO O DSP, DIR, DAC synchronization data output
9 P9_1/TB1IN/PMC1/SIN3 DSP_MISO SI I- DSP, DIR, DAC synchronization data input
10 P9_0/TB0IN/CLK3 DSP_SCK SO O DSP, DIR, DAC synchronous clock output
11 P14_1 HDMI_N_RST O O HDMI RxTx reset
12 P14_0 TUN_N_RST O O Tuner reset
13 BYTE BYTE MCU MCU Data bus width reshuffling input / Single chip mode: L (16bit)
14 CNVSS E8A_CNVSS MCU MCU Processor mode select / Low: Single chip mode
15 P8_7/XCIN VDEC_N_RST O O Video decoder reset
16 P8_6/XCOUT DIAG_FCT O O Diag OK: Output High / Diag NG: Output Low (default)
17 /RESET CPU_N_RST MCU MCU Reset input
18 XOUT XOUT MCU MCU Oscillation circuit output
19 VSS DGND MCU MCU Microprocessor ground
20 XIN XIN MCU MCU Oscillation circuit input
21 VCC1 +3.3M MCU MCU Microprocessor power supply
22 P8_5/N_NMI/N_SD/CEC HDMI_CEC IO I+ Microprocessor CEC control
23 P8_4/N_INT2/ZP DSP_N_INT IRQ IRQ Interrupt input from DSP
RX-V573/HTR-5065
24 P8_3/N_INT1 HDMI_MUTE IRQ I- HDMI MUTE input / H: Mute

25 P8_2/N_INT0 HDMI_N_INT IRQ I- Interrupt input from HDMI RxTx
26 P8_1/TA4IN/N_U/N_CTS5/N_RTS5 DIR_N_INT TMR O DIR interrupt input
27 P8_0/TA4OUT/U/RXD5/SCL5 (no_use) O O
28 P7_7/TA3IN/CLK5 DIR_N_RST O O DIR reset
29 P7_6/TA3OUT/TXD5/SDA5 DIR_N_CS O O DIR chip select
30 P7_5/TA2IN/N_W TUN_N_INT TMR O Tuner GPIO2 input
31 P7_4/TA2OUT/W NCPU_SPI_REQ I I NET SPI request
32 P7_3/N_CTS2/N_RTS2/TA1IN/N_V ACPWER_DET TMR I+ AC power detection / L: Power down
33 P7_2/CLK2/TA1OUT/V NCPU_SPI_RDY I I NET SPI ready
34 P7_1/RXD2/SCL2/SCLMM/TA0IN/TB5IN HDMI_SCL SO O HDMI Rx/Tx I2C SCL output
Video decoder, A-video switch I2C SCL output
35 P7_0/TXD2/SDA2/SDAMM/TA0OUT HDMI_SDA SI O HDMI Rx/Tx I2C SDA input and output
Video decoder, A-video switch I2C SDA input and output
36 P6_7/TXD1/SDA1 E8A_TXD SO I+
37 VCC1 +3.3M MCU MCU Microprocessor power supply
38 P6_6/RXD1/SCL1 E8A_RXD SI I+
39 VSS DGND MCU MCU Microprocessor ground
40 P6_5/CLK1 E8A_SCLK O I+
41 P6_4/N_CTS1/N_RTS1/N_CTS0/CLKS1 E8A_BUSY I- I-
42 P6_3/TXD0/SDA0 TUN_SDA SI O Tuner I2C synchronization data input and output
43 P6_2/RXD0/SCL0 TUN_SCL SO O Tuner I2C synchronous clock output
44 P6_1/CLK0 (no_use) O O
45 P_6_0/RTCOUT/N_CTS0/N_RTS0 (no_use) O O
46 P13_7 VOL_MOSI O O Electronic volume flip-flop synchronization data output
47 P13_6 VOL_SCK O O Electronic volume flip-flop synchronous clock output
48 P13_5 I_PRT I- I- Overcurrent protection detection
49 P13_4 TRANS_RY O O
50 P5_7/N_RDY/CLKOUT DCDC_PON O O
51 P5_6/ALE MT_N_SW O O Mute control (Subwoofer)
72
RX-V573/HTR-5065
I/O I/O
POWER ON
POWER ON
Pin Function Name Pin Function Name
STANDBY
STANDBY
Port Name Detail of Function Port Name Detail of Function
No. (P.C.B.) No. (P.C.B.)
52 P5_5/N_HOLD E8A_N_EPM I- I- 104 P0_7/AN0_7/D7 DAC_N_CS O O DAC chip select

53 P5_4/N_HLDA HP_N_DET I+ O Headphone detection / L: Headphone detected 105 P0_6/AN0_6/D6 NCPU_AMUTE I O NET audio mute demand
54 P13_3 HPRY O O Headphone relay control 106 P0_5/AN0_5/D5 PS3_PRT AD PS protection detection 3
55 P13_2 SPRY_SB_BA O O Speaker relay control (Surround back and Bi-Amp) / H: Relay ON 107 P0_4/AN0_4/D4 PS2_PRT AD PS protection detection 2
56 P13_1 (no_use) 108 P0_3/AN0_3/D3 L3_DET AD I D terminal L3 detection
57 P13_0 SPRY_5CH O O Speaker relay control (Front / Center / Surround) / H: Relay ON 109 P0_2/AN0_2/D2 USB_VBUS_PRT AD I USB iPad power supply feedback
58 P5_3/BCLK MT_N_SB O O Mute control (Surround back) 110 P0_1/AN0_1/D1 THM3 AD I Temperature detection 3
59 P5_2/N_RD (no_use) 111 P0_0/AN0_0/D0 DEST AD I Model distinction
60 P5_1/N_WRH/N_BHE MT_N_5CH O O Mute control (Front / Center / Surround) 112 P11_7 NCPU_N_RST O O
61 P5_0/N_WRL/N_WR E8A_N_CE I+ I+ 113 P11_6 DIR_SDO I O DIR_SDO input for CDDA writing
62 P12_7 OSDFS_N_CS O O Chip select control of OSD Flash from microprocessor 114 P11_5 DIR_WCK I O DIR_WCK input for CDDA writing
63 P12_6 USB_VBUS_PON O O 115 P11_4 (reserved) O O
64 P12_5 PRY O O Power relay control / H: ON 116 P11_3 VIDI2C_ON O O Vdec and A-video selector I2C line control
65 P4_7/PWM1/TXD7/SDA7/N_CS3 FPGA_MOSI SO O FPGA, OSD Flash synchronization data output 117 P11_2 FPGA_N_CFG O O FPGA configuration control
66 P4_6/PWM0/RXD7/SCL7/N_CS2 FPGA_MISO SI O FPGA, OSD Flash synchronization data input 118 P11_1 FPGA_N_STA I O FPGA configuration status
67 P4_5/CLK7/N_CS1 FPGA_SCK SO O FPGA, OSD Flash synchronous clock output 119 P11_0 FPGA_CDONE I O FPGA configuration completion signal
68 P4_4/N_CTS7/N_RTS7/N_CS0 FPGA_N_CS O O FPGA chip select 120 P10_7/AN7/N_K13 DC_PRT AD I Power amp DC detection
69 P4_3/A19 (reserved) O O 121 P10_6/AN6/N_K12 AMP_OLV AD I Power amp output level detection
70 P4_2/A18 FLSH_N_CS O O Expansion FlashROM chip select / FPGA FlashROM chip select 122 P10_5/AN5/N_K11 THM1 AD I Temperature detection 1
71 P4_1/A17 N_FCT I I FCT detection / H: Product mode, L: FCT mode 123 P10_4/AN4/N_K10 THM2 AD I Temperature detection 2
72 P4_0/A16 NDAC_N_MT O O Mute control 124 P10_3/AN3 KEY2 AD I KEY AD value uptake 2
73 P3_7/A15 OSDFS_BUS_SEL O O L: ROHM Apple / FPGA SPI / H: Spalta OSD SPI 125 P10_2/AN2 KEY1 AD I KEY AD value uptake 1
74 P3_6/A14 VOL_RB I+ I+ Volume rotary encoder B 126 P10_1/AN1 PS1_PRT AD I PS protection detection 1
75 P3_5/A13 VOL_RA I+ I+ Volume rotary encoder A 127 AVSS AVSS MCU MCU Microprocessor ground
76 P3_4/A12 FLD_N_CS O O FL driver chip select 128 P10_0/AN0 (no_use) O O AD spare
77 P3_3/A11 FLD_N_RST O O FL driver reset
78 P3_2/A10 MIC_N_DET I- I- MIC detection / L: MIC detected
79 P3_1/A9 STBY_LED O O Standby through LED / H: LED lighting Key detection for A/D port
80 P12_4 NCPU_PON O O H: Power supply ON Key input (A/D) pull-up resistance: 10 k-ohms
81 P12_3 DSP_PON O H: Power supply ON 0Ω + 1.0 kΩ + 1.0 kΩ + 1.5 kΩ + 1.5 kΩ + 2.2 kΩ +3.3 kΩ + 4.7 kΩ + 13.2 kΩ + 22 kΩ + 33 kΩ
Detected voltage value 0– 0.15 – 0.425 – 0.703 – 0.978 – 1.241 – 1.536 – 1.84 – 2.102 – 2.336 – 2.55 –
82 P12_2 +3.3S_PON O H: Power supply ON at 125 pin 0.15 V 0.425 V 0.703 V 0.978 V 1.241 V 1.536 V 1.84 V 2.102 V 2.299 V 2.55 V 2.971 V
83 P12_1 HDMI_PON O H: Power supply ON A/D value
0 – 11 12 – 32 33 – 54 55 – 75 76 – 95 96 – 118 119 – 142 143 – 162 163 – 177 181 – 197 198 – 229
(3.3 V=255)
84 P12_0 VID_PON O H: Power supply ON
RADIO NET TV BD/DVD INPUT INPUT TONE
85 VCC2 VCC2 MCU MCU Microprocessor power supply KEY1 — — —
(SCENE4) (SCENE3) (SCENE2) (SCENE1) > < (power) CONTROL
86 P3_0/A8 EEP_N_CS O O EEPROM chip select 0Ω + 1.0 kΩ + 1.0 kΩ + 1.5 kΩ + 1.8 kΩ + 2.2 kΩ +3.3 kΩ + 4.7 kΩ + 6.8 kΩ + 10 kΩ + 22 kΩ + 68 kΩ
87 VSS VSS MCU MCU Microprocessor ground Detected voltage value 0– 0.15 – 0.425 – 0.703 – 0.999 – 1.279 – 1.564 – 1.86 – 2.142 – 2.399 – 2.653 – 2.916 –
at 124 pin 0.15 V 0.425 V 0.703 V 0.999 V 1.279 V 1.564 V 1.86 V 2.142 V 2.399 V 2.653 V 2.919 V 3.175 V
88 P2_7/AN2_7/A7 USB_IPLERR I+ I+ USB IPL error status detection / Port input pull-down A/D value
0 – 11 12 – 32 33 – 54 55 – 77 78 – 98 99 – 120 121 – 143 144 – 165 166 – 185 186 – 205 206 – 225 226 – 245
89 P2_6/AN2_6/A6 USB_BUSY I+ I Condition output from USB device (3.3 V=255)
TUNING TUNING PRESET PRESET PROGRAM PROGRAM
90 P2_5/N_INT7/AN2_5/A5 REM_IN IRQ IRQ Remote control pulse input KEY2 DIRECT AM FM MEMORY INFO STRAIGHT
>> << > < > <
91 P2_4/N_INT6/AN2_4/A4 PSW_N_DET IRQ IRQ Power system switch (Power, Scene) detection
L: STANDBY key ON Destination detection for A/D port
92 P2_3/AN2_3/A3 DSP_N_RST O O DSP reset Pull-up resistance: 10 k-ohms
93 P2_2/AN2_2/A2 DSP_N_RDY I+ O DSP ready input R5418
0Ω 1.2 kΩ 2.7 kΩ 4.7 kΩ 6.8 kΩ 10 kΩ 15 kΩ 47 kΩ 100 kΩ
on OPERATION P.C.B.
94 P2_1/AN2_1/A1 DSP_N_CS O O DSP chip select
Detected voltage value 0– 0.162 – 0.517 – 0.872 – 1.193 – 1.492 – 1.816 – 2.572 – 2.869 –
95 P2_0/AN2_0/A0 DSP_FMT O O DSP full mute output / H: Mute at 111 pin 0.162 V 0.517 V 0.872 V 1.193 V 1.492 V 1.816 V 2.2 V 2.869 V 3.163 V
96 P1_7/N_INT5/IDU/D15 USB_SEARCH I- I- Condition output from USB device A/D value 000 111 222 333 444 555 666 777 888
97 P1_6/N_INT4/IDW/D14 NCPU_VBUSDRV I- I- USB power supply output demand from NET microprocessor Destination J U C R, S T K A B, G, F L, H
98 P1_5/N_INT3/IDV/D13 USB_MCHNG IRQ USB file reproduction end flag input
99 P1_4/D12 USB_N_RST O O USB device • reset
100 P1_3/TXD6/SDA6/D11 NCPU_SPI_MOSI SO O NET SPI data output
101 P1_2/RXD6/SCL6/D10 NCPU_SPI_MISO SI O NET SPI data input
102 P1_1/CLK6/D9 NCPU_SPI_SCK O O NET SPI clock output
103 P1_0/N_CTS6/N_RTS6/D8 NCPU_SPI_N_CS O O NET SPI chip select
73
A B C D E F G H I J
RX-V573/HTR-5065
1 ■ BLOCK DIAGRAMS
HDMI/AUDIO Section Block Diagram
20-27 IN1 HDMI_CEC

HDMI IN 1 IC1
HDMI IC2 2,6
28-35 IN2 OSD_MOSI/OSD_MISO/OSD_CLK
HDMI IN 2 Receiver/Transmitter FLASH ROM 1
OSD_N_CS
2 HDMI IN 3
39-44 IN3
SII9573CTUC W25Q16CVSSIG
16Mb
47-54 IN4
HDMI IN 4 HDMI OUT
IC953 IC952 66,67
FLASH ROM SDRAM 69
HDMI_SCL/HDMI_SDA
HDMI_N_RST
MX29LG256FLT M12L2561616A-6T 68
HDMI_N_INT
256Mb 256Mb 129
HDMI_MUTE
K3 113 114
XL951
IC955 IC956 XL1
24.0MHz IC951
NETWORK Ethernet PHY ceiver J3 Apple authentication IC 27.0MHz
LAN8700C Network MFI341S2162
microprocessor
DM860A D14,D15 NCPU_SPI_MOSI/NCPU_SPI_MISO
Front USB /NCPU_SPI_SCK
B16
NCPU_SPDIF NCPU_SPI_N_CS
J1
NCPU_SPI_REQ
3 (J model) D4 VIDEO L3_DET
NCPU_I2S D13
NCPU_N_RST
(Component)
AV1 HDMI_SPDIF
HDMI_ARC
(Optical)
IC502 MONITOR OUT

(Composite)
Video Selector
(Component) (COMPONENT VIDEO)
AV2 NJW1329FH2 (Component)
(Composite)
(Coaxial)
MONITOR OUT
3,4
(VIDEO)
VID_SCL/VID_SDA
(Composite)
AV3
(Coaxial) HDMI_I2S
AUP_I2S
4 AV4
(Composite)
AV OUT
(Optical)
IC43 IC42
FLASH ROM SDRAM
(Composite)
XL61 MX29LV160DBTI-7 M12L64164A-5TG2
AV5 (Analog) 24.576MHz 16Mb 64Mb HP_N_DET
39 40
Speaker Relay
(Composite)
IC61 PHONES
DIR/ADC SD0
HPRY
IC41 IC62 IC251–254 IC201
AV6 PCM9211PTR 27 DA_FL DAFL 63 7 VOFL FL FL FRONT L
(Analog) DSP SD1 AUDIO DAC A-Filter Selector and MUTE
DIR_I2S D70YE101BRFP266 PCM1681PWPR 26 DA_FR DAFR 62 E-Vol. 8 VOFR RY203
SD2 BD3473KS2 FR FR
34 MUTE FRONT R
AUDIO (Analog) 2
DIR_N_RST 20 DA_SL DASL 65 5 VOSL
DIR_N_INT SD3
19 DA_SR DASR 64 6 VOSR
SL SL SURROUND L
(Composite) 22 DA_C DAC 67 3 VOC MUTE
VAUX RY205
5 (Analog) 16 DA_SBL DASBL 69 1 VOSBL SR SR
PORTABLE MUTE SURROUND R
IC201 15 DA_SBR 68 2 VOSBR SPEAKERS
DASBR
(Analog) Selector and E-Vol. 14
DSP_N_RST
120 RY204
BD3473KS2 DSP_N_CS 21 DA_SW DASW 66 4 VOSW
MUTE
C C
CENTER
AM/FM TUNER TUN_SCL/SDA
10
VOL_SCK
107
DSP_N_INT
11 121 10 SPRY_5CH
TUN_N_RST VOL_MOSI DSP_N_RDY VOL_SCK
105 2 11 MUTE_5CH
TUN_N_INT DSP_FMT DAC_N_CS VOL_MOSI
MUTE
SBL SBL SURROUND BACK
YPAO MIC
(Analog) 122,126,127 3,4 /Bi AMP L
MIC_N_DET RY202
IC22 DSP_MOSI/DSP_MISO/DSP_SCK
MUTE
SBR SBR SURROUND BACK
FLD_N_RST
EEPROM 64kb IC202 SPRY_SB
/Bi AMP R
FL Display FLD_N_CS
1
FLD_MOSI/FLD_SCK BR25S640FVT-WE2 EEP_N_CS BA4560F MUTE_SB
SW PREOUT
5,6
MUTE SUBWOOFER OUT
Remote Control Sensor REM_IN
EX_SCK/EX_MOSI
MUTE_SW
VOL_RA
SPI4
<Interrupt> IC21 <Serial> TRANS_RY Amp block
Volume VOL_RB NMI Microprocessor UART1 E8A AMP_LMT Heatsink
25 Main Power Supply
HDMI_N_INT /INT0 M16C/65 SPI3 DSP/DAC/DIR I_PRT
6 KEY1
HDMI_MUTE
24
23
/INT1
R5F3651TNFC SPI4 EEPROM/FL DC_PRT
Main Power
RY541
DSP_N_INT /INT2 SPI6 NetCPU THM1_PRT
Front Panel Keys KEY2 91
PSW_N_DET /INT6 I2C0 TUNER THM2_PRT Supply
PSW_DET REM_IN
90
/INT7 ROM: 768kB I2C2 HDMI
MAIN r 4FFQBHF–100 → THM3_PRT (Main Trans)
AMP_OLV PRY
Standby LED STBY_LED RAM: 47kB SCHEMATIC DIAGRAM
<Timer> <AD Port>
32 126
ACPWR_DET TA1IN AN1 PS1_PRT AC-DC
30 125
TUN_N_INT TA2IN AN2 KEY1 CPU_N_RST
DIR_N_INT
26 TA4IN
AN3
124
KEY2 ACPWR_DET
Power Supply AC IN
123
OPERATION AN4
AN5 122
THM2
THM1
(RCC)
121
r 4FFQBHF → AN6
AN7
120
AMP_OLV
DC_PRT
111
SCHEMATIC DIAGRAM AN0_0
AN0_1
110
DEST
THM3
18
AN0_2
109
108
USB_VBUS_PRT OPERATION
AN0_3 L3_DET
XL21 AN0_4
107
PS2_PRT r 4FFQBHF →
8.0MHz AN0_5
106
PS3_PRT
20
r 4FFQBHF–95 → SCHEMATIC DIAGRAM
7 DIGITAL
SCHEMATIC DIAGRAM
74
A B C D E F G H I J
RX-V573/HTR-5065
Power Supply Section Block Diagram
Speaker Impedance relay

Power IC25
+5.5V +3.3M +3.3M Microprocessor (IC21)/Standby LED/Remote/key input
Transformer +B Power Amplifier
RY206 IC24
D2046 C2084 +3.3S +3.3S Control circuits around Microprocessor
2 +3.3S_PON
IC67 Q12
+3.3D +3.3H +3.3H HDMI (IC1)
RY206 C2085
-B Power Amplifier
DCDC_PON DSP_PON
Q401
+3.3DSP +3.3DSP DSP (IC41), SDRAM (IC42), FLASH ROM (IC43)
DIR (IC61), DAC (IC62)
Q2090 -VP FL Driver DSP_PON
Q606
+3.3N +3.3N Network Microprocessor (IC951), SDRAM (IC952), FLASH ROM (IC953)
MAIN r 4FFQBHF–100 → Apple authentication IC (IC956), LAN PHY (IC955)
SCHEMATIC DIAGRAM NCPU_PON
IC271
+5A +5A DAC/ADC
MAIN
IC7
3 BD9329EFJ +1.3H HDMI (IC1)
Q5201 +5T AM/FM Tuner HDMI_PON

OPERATION r 4FFQBHF →
IC68 IC45
SCHEMATIC DIAGRAM +1.8D +1.2DSP +1.2DSP DSP (IC41)
DCDC_PON DSP_PON
IC65
+7A Electronic Volume +1.2N +1.2N Network Microprocessor (IC951)
NCPU_PON
IC522 IC6
+12A Ope-amp/Relay +5HT +5HT HDMI out connector (+5VPower)
+12V
C5215 OPE
HDMI_PON
D5206
IC5
+5H +5H HDMI (IC1)
4
C5216 HDMI_PON
OPE IC44
-12V -12A Ope-amp/Relay +5D +5D P.C.B. MAIN Optical In (25mA x 2) Coax In, Buffer
IC523
DSP_PON
-7A Electronic Volume Q605
+5USB +5USB iPod/iPad/USB power supply
USB_VBUS_PON
F1 FL filament
F2 FL filament
IC521
+3.3V +3.3V Analog VIDEO
C5213
5 D5204
DIGITAL r 4FFQBHF–95 →
SCHEMATIC DIAGRAM
C5214
-3.3V Analog VIDEO

Q5204
RY541 F5402
AC IN
F5401
AC/DC Converter
RY541
PRY
Q3002
MAIN r 4FFQBHF–100 →
SCHEMATIC DIAGRAM
7
75
A B C D E F G H I J
RX-V573/HTR-5065
1 ■ PRINTED CIRCUIT BOARDS
• Semiconductor Location
Ref no. Location Ref no. Location
D24 H3 D205 B4
D201 E5 IC2 G4
D202 F5 IC3 G4
DIGITAL (Side A) D203 F5 IC5 F4
D204 F5 IC6 H3
2 No replacement part available. IC7 F4
サービス部品供給なし IC8 H3
HDMI 1 No replacement part available. IC21 F5
NETWORK HDMI 4 HDMI 3 HDMI 2 HDMI OUT サービス部品供給なし
(BD/DVD) IC22 G4
CB1 CB2 CB3 CB4 IC24 G5
CB6 IC25 E5
MAIN (3)
(CB271) IC26 H5
5 4
CB951 IC6 IC27 E5
1 3
+5DSP IC41 H4
8 5 AV1_D
IC8 IC43 H5
AV2_D
OPERATION (3) 28
27 19 DGND IC44 G5
18 1 4
3 (CB504) IC955
AV3_D IC45 H5
44 1 AV4_D
45 176 IC61 I4
CB62
36 DGND
1 9 10
AVID_SCL 36 1 AE IC62 I5
AVID_SDA 37 144 +5A
CB91
L3_DET IC64 C5
VE TUL
AD_CVBS TUE IC65 E3
4 3 IC1
TUR
IC65
IC956 1 5
1
NETR IC66 B5
65 20
E IC67 E4
CB29
IC41
(for factory) 10 15 16 NETL
11
1 8 88 133
IC68 E5
1 54 89 132 IC951 D4
IC7
109
72
4 5
73 108
IC952 C4
4 IC953 C4
IC5
+3.3M 56 29
4 3
IC952
DGND
1 2
IC955 D3
ACPWR_DET 16 9
CB24
4
IC956 D4
IC22
5
IC951
1 8
CPU_N_RST IC3 4 1 24 13
IC67
1 25 12
Q12 G5
IC953
8 1
PRY 8 25 48
IC61
DEST 4 5
IC2
ADR Q13 G5
8
5 ADL
27 28
38 1
36
37 48
1
DA-FR Q201 G4
MAIN (4) 39 128 IC43 E Q207 G5
(CB302) DA-FL
1 28 1 8 DA-SR Q208 F5
CB63
IC68
24 1 E Q209 F5
+5.5V
4 5 IC21 DA-SL
+5.5V
5 4 DA-SW Q210 F5
IC24
CB64
DGND 64
4 3 1 28 E Q401 G5
103
5 1 65 102 1 2 IC45 DA-C
DGND 8
Q402 G5
IC44
DA-SBR
IC66
IC62
1 3
DGND 2 1 DA-SBL Q601 C5
5 1
2
4 3 4 14
3
IC64
4 4 3 15 Q602 C5
MAIN (4) IC27
1 MAIN (2)
(W3001) 5
8
IC26
5 Q604 D3
(CB251)
3 2
1 4 Q605 C5
4 1
CB23
Q606 D3
CB61 CB22 CB27 IC25 CB26 CB21
CB25 Q607 B5
CB952
THM2_PRT Q902 B3
THM1_PRT
DGND
+3.3S
R_200_DET
PS2_PRT
PS1_PRT
VID_PON
AGND
+5T
GPIO2
GND
+5T
SDA
+5USB
+5USB
GND
GND
DGND
FLD_N_CS
FLD_MOSI
PSW_N_DET
KEY2
+3.3DSP
DGND
+3.3M
VBUS
D-
D+
GND
FG
MUTE_SW
MUTE_5ch
VOL_SCK
DC_PRT
AMP_OLV
TRANS_RY
HPRY
SPRY_5CH
(for factory)
RST
SCL
-
Rch
Lch
6 OPERATION (1)
(W4007)
THM3_PRT
MUTE_SB
VOL_MOSI
DG
I_PRT
AMP_LMT
HP_N_DET
SPRY_SB
PS1_PRT
OPERATION (1)
DGND
FLD_N_RST
MIC_N_DET
KEY1
REM_IN
VOL_RB
STBY_LED
VOL_RA
FLD_SCK
(W4006)
OPERATION (8) AM/FM TUNER
(CB531) OPERATION (4)
(CB521)
MAIN (1) OPERATION (1)
(CB211)
(CB402)
76
A B C D E F G H I J
RX-V573/HTR-5065
DIGITAL (Side B)
2
3 3 1
IC46
4 5
11
10
Ref no. Location
IC9
4 20 1 D2 D4
IC9 C4
IC42 C5
27 1 IC46 B3
Q1 F3
Q2 F3
IC42
Q3 D4
28
54 Q4 E3
Q5 E3
Q6 E3
Q7 D3
5
Q8 D3
Q9 D3
Q202 D5
Q203 D4
Q204 D4
Q205 D5
Q206 D5
77
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (1) (Side A)
DIGITAL (CB21)
DGND Remote control sensor

DGND
FLD_N_RST
FLD_N_CS
FLD_SCK
3 FLD_MOSI
MIC_N_DET
CB402
PSW_N_DET
KEY1
KEY2
REM_IN
+3.3DSP OPERATION (4)
VOL_RB
DGND (CB525)
VOL_RA
+3.3M
STBY_LED
F2
CB403
-VP
VAUX F1
VAUXE
+12V
CB405
E
-12V
AUXR
AUXL
AUXE
MIC TUNING AM FM PRESET MEMORY INFO
4 MAIN (6)
(CB371)
+3.3DSP
VOL_RA
CB404
VOL_RB
KEY2 +12V
DGND MIC
FG E
FG -12V
SCENE
CB401
MIC_N_DET
PSW_N_DET
OPERATION (6) W4007
STBY_LED
(CB471) +3.3M
DGND
NET TV BD FG
W4006 RADIO DVD
5
JK401 OPERATION (5)
(CB451)
GND
GND
+5USB
+5USB
CB407
DIGITAL
(CB61)
FG
DGND
+DATA
-DATA
Vreturn
USB VIDEO AUX STRAIGHT PROGRAM TONE CONTROL INPUT

VIDEO PORTABLE
DIGITAL
6 (CB952)
78
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (1) (Side B)
49 48
3
64 IC401 33
1 32
16 17
Ref no. Location
D4003 D4
4 D4004 D4
D4005 H4
D4006 I4
D4007 C6
D4008 C6
D4013 F5
D4014 E5
D4015 E5
D4016 E5
IC401 E3
Q4001 E3
5
Q4002 E3
Q4003 E3
Q4004 E3
Q4005 F3
Q4006 G3
Q4007 E3
Q4008 F3
79
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (2) (Side A) OPERATION (3) (Side A)
MAIN (4) MAIN (6)

2 (CB373)
VAUXEI
(CB301)
AC_PWR
VAUXI
PRY_IN
DGND
DEST
GND
GND
GND
GND
5.5V
5.5V
5.5V
5.5V
CB545
OPERATION (4)
(CB523)
+3.3V
-3.3V
VE
CB505
IC543
3
IC542
DIGITAL
(CB91)
W5002
AD_CVBS
CB504
VE
L3_DET
VID_SCL VID_SDA
IC544
4 5
CB502
4
IC541
1 8
5 k-ohms
10 W
PR/PB/Y PR/PB/Y PR/PB/Y
MONITOR OUT AV MONITOR AV 6 AV 5 AV 4 AV3 AV2 AV1 D4
OUT OUT VIDEO
5
CB541
J model
VIDEO COMPONENT VIDEO
CB544
POWER TRANSFORMER
Safety measures
6 • Some internal parts in this product contain high voltages and are dangerous. Be sure to take safety measures during servicing, such
as wearing insulating gloves.
• Note that the capacitors indicated below are dangerous even after the power is turned off because an electric charge remains and a
AC IN
high voltage continues to exist there. Before starting any repair work, connect a discharging resistor (5 k-ohms/10 W) to the terminals
• Semiconductor Location of each capacitor indicated below to discharge electricity. The time required for discharging is about 30 seconds per each.
C5407 on OPERATION (2) P.C.B.
Ref no. Location
D5401 C5 安全対策
D5404 D4 ・この製品の内部には高電圧部分があり危険です。修理の際は、絶縁性の手袋を使用するなどの安全対策を行ってください。
IC541 B4 ・下記のコンデンサには電源を OFF にした後も電荷が残り、高電圧が維持されており危険です。修理作業前に放電用抵抗
（5 k Ω /10 W）を下記の各コンデンサの端子間に接続して放電してください。放電所用時間は各々約 30 秒間です。
IC542 C3 OPERATION（2）P.C.B. の C5407
IC543 C3
7 IC544 D4
80
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (2) (Side B) OPERATION (3) (Side B)
3 27 26
39 IC502 14
40 13
7 1
IC501
52 1
8 14
J model
5 • Semiconductor Location
Ref no. Location
D5402 B4
D5403 B4
D5405 D4
D5406 D4
D5407 D4
D5408 D4
D5409 A5
IC501 H3
IC502 G3
6
Q5001 I4
81
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (4) (Side A)
DIGITAL
(CB25)
R_200_DET
MAIN (1) POWER TRANSFORMER
PS1_PRT
PS2_PRT
VID_PON
2 OPERATION (3)
AC_12
AC_12
(CB207)
AGND
AGND
AC_V
AC_V
E_12
(CB505)
+12A
+3.3V
-12A
-3.3V
+5T
-VP
VE
F1
F2
VE
CB522
CB523 CB524
CB521
F1
-VP
F2
3 CB525
OPERATION (1)
(CB403)
Ref no. Location
D4504 C6
D5204 G3
D5206 F3
IC521 D4
IN COM OUT IN COM OUT
1 4 IC522 C4
IC523 IC522 IC521 IC523 B4
Q5201 C3
R model
4 Q5204 E3
OPERATION (5) (Side A) OPERATION (6) (Side A)

OPERATION (1)
(CB404)
+3.3DSP
VOL_RA
VOL_RB
DGND
KEY2
FG
FG
5
CB471
DIRECT
POWER
indicator VOLUME
6
JK451
YPAO MIC
CB451
FG
DGND
+3.3M
STBY_LED
PSW_N_DET
MIC_N_DET
-12V
E
MIC
+12V
(Power)
OPERATION (1)
7 (CB401)
82
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (4) (Side B)
Ref no. Location
D4501 B6
D4502 B6
3
D4503 D5
D5201 D4
D5202 B3
D5205 E3
D5207 H3
D5208 H3
IC471 B6
Q4501 C6
Q5202 E3
R model Q5203 E3
4 Q5205 D3
OPERATION (5) (Side B) OPERATION (6) (Side B)
1 8
IC471
4 5
83
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (7) (Side A) OPERATION (8) (Side A) OPERATION (9) (Side A)
2
PHONES
SILENT CINEMA
JK476
3 to chassis W4761
+3.3S
CB531
DGND
THM1_PRT
THM2_PRT
DIGITAL
(CB23)
4 HPR
CB477
HPE VCC VCC
IC531
IC532
HPL
OUT OUT
HP_N_DET
GND GND
MAIN (1)
(W2005)
U, C models
5
Ref no. Location
IC531 E4
IC532 F4
84
A B C D E F G H I J
RX-V573/HTR-5065
OPERATION (7) (Side B) OPERATION (8) (Side B) OPERATION (9) (Side B)
R, T, K, A, B, G, F, L, J models
5
Ref no. Location
D4761 C3
D4762 B3
85
A B C D E F G H I J
RX-V573/HTR-5065
Safety measures
• Some internal parts in this product contain high voltages and are dangerous. Be sure to take safety measures during servicing, such • Semiconductor Location
1 as wearing insulating gloves.
• Note that the capacitors indicated below are dangerous even after the power is turned off because an electric charge remains and a Ref no. Location Ref no. Location Ref no. Location Ref no. Location
high voltage continues to exist there. Before starting any repair work, connect a discharging resistor (5 k-ohms/10 W) to the terminals D2032 D5 D2038 D5 D2046 H5 Q2022 C7
of each capacitor indicated below to discharge electricity. The time required for discharging is about 30 seconds per each.
D2033 F5 D2039 F5 D2049 H4 Q2023 B7
C2084, C2085 on MAIN (1) P.C.B.
D2035 D5 D2040 F5 D2052 D3 Q2024 G7
安全対策 D2036 F5 D2044 I4 D2053 D4 Q2025 H7
・この製品の内部には高電圧部分があり危険です。修理の際は、絶縁性の手袋を使用するなどの安全対策を行ってください。
・下記のコンデンサには電源を OFF にした後も電荷が残り、高電圧が維持されており危険です。修理作業前に放電用抵抗 Q2015 C5 Q2026 E7
（5 k Ω /10 W）を下記の各コンデンサの端子間に接続して放電してください。放電所用時間は各々約 30 秒間です。 Q2016 C5 Q2027 F7
MAIN (1) (Side A) MAIN（1）P.C.B. の C2084、C2085 Q2017 C5 Q2028 D7
SPEAKERS
SURROUND Q2018 E5 Q2029 C5
R FRONT L CENTER R SURROUND L R BACK L
Q2019 E5 Q2030 E5
2 +/- +/- +/- +/- +/- +/-
AV1 AV2 AV3 AV4 AV5 AV6 AV AUDIO SUB- Q2020 D5 Q2031 D6
MAIN (6) OUT WOOFER OPERATION (7)
(CB372) OPTICAL COAXIAL COAXIAL OPTICAL (CB477) Q2021 D5 Q2032 G6
AUXR
AUXE
AUXL
+12A
-12A
MIC
(TV)
E
L/R L/R L/R L/R SBR
HP_N_DET
SBL
SL
SR
HPR
HPE
HPL
W2007B
MAIN (3) C
(CB272)
FL
W2005
+5DSP
DGND FR
SPRY_5CH PS1_PRT
SPRY_SB
HP_N_DET
TRANS_RY AMP_LMT
I_PRT
DG
VOL_SCK VOL_MOSI
MUTE_SB
MUTE_SW THM3_PRT
W2006
3 AV1_D
AV2_D
DGND
AV3_D
AV4_D
AE
CB209
CB205
HPRY
AMP_OLV
DC_PRT
MUTE_5ch
+12A
AE
CB204
TUL
TUE
TUR
NETR
AE DIGITAL
NETL (CB22)
GND
-VP
+12A
-12A
AC_BH
OPERATION (4)
4 ADR CB211
AC_BH
(CB522)
ADE E
CB208
ADL W2007A
AE E
DAFR
AE CB207 AC_BL
DAFL
AE AC_BL
DASR
CB210
DASL
AE W2001D
DASW RE POWER
DAC
AE TRANSFORMER
W2001B
DASBR
DASBL BL
-12V
+12V
5 MAIN (2)
(CB252) 5 k-ohms
CB201 CB202 10 W
Ref no. Location Ref no. Location
Q2033 H6 Q2053 C6
Q2034 E6 Q2054 C6
Q2035 F6 Q2055 B6
Q2036 D6 Q2056 G6
Q2037 D6 Q2057 G6
BL
RE W2001A
Q2038 D6 Q2058 H6
5 k-ohms Q2039 C6 Q2059 H6
W2001C
6 10 W Q2040 C6 Q2060 E6
Q2041 B6 Q2061 E6
Q2042 G6 Q2062 F6
Q2043 G6 Q2063 F6
Q2044 H6 Q2072 F5
Q2045 H6 Q2073 F5
Q2046 E6 Q2074 G5
Q2047 E6 Q2075 F5
Q2048 F6 Q2076 G5
Q2049 F6 Q2077 F4
Q2050 D6 Q2078 F4
SBR
SBL
SL
SR
7 Q2051 D6 Q2090 I3
C
FL
FR
Q2052 D6
86
A B C D E F G H I J
RX-V573/HTR-5065
MAIN (1) (Side B)
7 1
IC203 • Semiconductor Location
8 14 Ref no. Location Ref no. Location
3 D2003 B5 Q2003 B5
4 1 D2004 B5 Q2004 D4
41 40 D2005 D5 Q2005 E4
5 8 D2006 D5 Q2006 C4
60 IC201 31
D2007 C6 Q2007 D4
1 30
D2008 C6 Q2008 C4
D2009 G6 Q2009 B5
20 21 D2010 G6 Q2010 B5
D2011 H6 Q2011 D4
D2012 H6 Q2012 E5
D2013 E6 Q2013 C4
4
D2014 E6 Q2014 D4
D2015 F6 Q2064 C6
D2016 F6 Q2065 B6
D2017 D6 Q2066 B5
D2018 C6 Q2067 F6
D2019 B6 Q2068 G6
D2020 F6 Q2069 D6
D2021 G6 Q2070 E6
D2022 E6 Q2071 F6
D2023 F6 Q2079 E4
5 D2024 C5 Q2080 E4
D2025 B5 Q2081 H4
D2026 A5 Q2082 H4
D2027 F5 Q2083 F3
D2028 G5 Q2084 F4
D2029 D5 Q2085 G4
D2030 E5 Q2086 G4
D2031 F5 Q2087 G4
D2034 E5 Q2088 H4
D2037 F5 Q2089 G4
D2041 E4 Q2091 H4
6
D2042 H4 Q2092 C4
D2043 F4 Q2093 C4
D2045 G4 Q2094 B4
D2047 G4 Q2095 E4
D2048 I3 Q2096 D4
IC201 C3 Q2097 D4
IC202 E3 Q2098 C4
IC203 B3 Q2099 E3
Q2001 C4 Q2100 E3
Q2002 B5
7
87
A B C D E F G H I J
RX-V573/HTR-5065
MAIN (2) (Side A) MAIN (3) (Side A)
ADR
ADL ADR NETL
2 DA-FR E NETE
E ADL NETR NETL
DA-FL E TUR NETE
DA-SR DAFR IN COM OUT
CB251
TUE NETR
E E TUL TUR
DA-SL DAFL IC271
AE TUE
DA-SW E
CB272
+12V TUL
E DASR
CB252
AE +5A
CB271
DA-C DASL AV4_D AE
DA-SBR E DGND
AV3_D
DA-SBL DASW AV4_D
DGND
DAC AV2_D AV3_D
E AV1_D DGND
DIGITAL DASBR
(CB63) DGND AV2_D
DASBL +5DSP AV1_D
-12V
3 +12V
+5DSP
MAIN (1)
MAIN (1) (CB209) DIGITAL
(CB210) (CB62)
Ref no. Location
IC271 H2
MAIN (4) (Side A) MAIN (5) (Side A) MAIN (6) (Side A)

R model
VI
MAIN (1)
YE (W2006)
POWER
CB351
5 TRANSFORMER
MIC MIC
DEST AUXE AUXE
RE AUXL
CB371
CB372
PRY AUXR AUXL
-12V AUXR
CPU_N_RST E
CB302
ACPWR_DET +12V -12V

VAUXE E
PRY_IN DGND OR VAUX
GND +3.3M +12V
GND
W3001
GND OPERATION (1)

GND DIGITAL (CB405)
CB301
CB373
5.5V (CB24) VAUX
5.5V NC
5.5V VAUXE
5.5V
CB353
DGND GND
6 GND OPERATION (3)
AC_PWR
DEST GND (W5002)
5.5V
OPERATION (2) 5.5V
(CB545)
CB352
DIGITAL
(CB64)
VOLTAGE
7 SELECTOR
110–120V 220–240V
88
A B C D E F G H I J
RX-V573/HTR-5065
MAIN (2) (Side B) MAIN (3) (Side B)
2 4 1
IC251
5 8
4 1
IC252
5 8
Ref no. Location
D2701 H2
4 1 D3001 C5
3 4 1 IC253 D3002 C5
5 8
D3003 C5
IC254
5 8 D3004 C5
D3005 C5
IC251 C2
IC252 C2
IC253 C3
IC254 B3
Q3001 C5
Q3002 B5
4 Q3003 C5
MAIN (4) (Side B) MAIN (5) (Side B) MAIN (6) (Side B)

R model
89
RX-V573/HTR-5065
■ PIN CONNECTION DIAGRAMS

• ICs • ICs
BA4560F-E2 BD7542F-E2 D70YE101BRFP266 DM860A-AQE TC7WH32FK (TE85L, F) TC7WHU04FU TL431ACLPR W25Q16CVSSIG W9825G6JH-6
54 28
108 73
8 4
8 4 109 72
1 V 18
1 1: CATHODE
8 4 8 8 4
4 2: ANODE
BD9328EFJ A 1
1 1 1 3: REF 1
23
1 27
BD3473KS2 18 1
A
8 4
60 41
1
61 40 • Diodes
BR25S640FVT-WE2
1N4003S 1SS355VMTE-17 DBL155G HZU5.6B3 TRF-E KBP103G 1.0A 200V MTZJ6.8C RB215T-90
144 37
1SS133
80 21 8
4 1 36 1SS176
V Anode
1 20
1
1SS270A + Anode
Anode Anode –
KIA7812API KIA7912PI LM19CIZ/LF LAN8700C-AEZG-TR M12L64164A-5TG
AC –
27 19 AC
28 27 Cathode AC Cathode
54 28 Cathode AC 1
28 Cathode + 2
18 3
36 19
1 18 RB500V-40 RF101L2STE25 RS203M-B-C-J80 SARS05 TS6P03G 6.0A 200V UDZS39B TE-17 39V
RB501V-40 UDZV4.3B
IN GND 9 10 36 10 RB521S-30
+VS UDZV5.1B
OUT OUT VOUT Anode
COM IN UDZV12B
GND 1 9 1 27
Anode UDZV13B
Anode Anode
M66003-0131FP-R MFI341S2162 MX29GL256FLT2I-90Q MX29LV160DBTI-70G NJM2388F33
–
– Cathode AC
48 33 1 56 AC AC
Cathode Cathode + AC
+ Cathode
11 25 24
49 32 15
16 10
20 6 • Transistors
64 17 1. VIN 1
1 5 2. VOUT
48 1 4
1 16 28 3. GND 2N5401C-AT/P 2N5551C-AT 2SA1162-Y (TE85R, F) 2SA1312-GR,BL 2SA1576UBTLR 2SA1708 2SA1941
29
4. ON/OFF CONTROL
2SC2712-Y (TE85R, F) 2SC3324-GR,BL 2SC4488 2SC5198
NJM41033V (TE2) NJW1329FH3 PCM1681PWPR PCM9211PTR R5F3651TNFC
C C C
39 27
36 25 E E E
7 40 26 102 65
14 24 103 64 B B B B
37 C
1 E
E B B C
C C
14 E E
B
NJM4565M (TE1) 28
128 39
2SA949 2SC4081UBTLR 2SD2704 K 2SD2705S TP DTA044EUBTL HN4B01JE KRA104S-RTK
52 14
48 13 2SC2229 DTC014EUBTL KRC102S-RTK
1 13 1 1 38
8 4 1 12 4 KRC104S-RTK
1 5
3 OUT
R1163N501B-TR-FE SII9573CTUC SN74LVC1G17DCKR TC74LCX245FT TC7MBL3257CFK C 3 1
C
COMMON
4 E 1. BASE 1 (B1)
E 2 1: IN
5 2: GND 2. EMITTER (E) IN
3 132 89 B B 1 3. BASE 2 (B2)
4 3: OUT
133 88 E E 4. COLLECTOR 2 (C2)
1 5 C C 5. COLLECTOR 1 (G2)
3 10 B B
R1172H121D-T1-F 1 20
16 8
1 KTA1046-Y-U/PFY KTA1504S KTC3198 Y AT KTC3875S RAL035P01 μPA672T-T1-A
1 1 KTA1659A-U/PF
3
5
STR2A153 TC74VHCU04FT TC7SH08FU
4
RP130Q331D-TR-F
C 4 1. DRAIN 1. Source 1 (S1)
RP130Q501D-TR-F 176 45
C
2. DRAIN 4 2. Gate 1 (G1)
4 6
E 3. GATE 6 3. Drain 2 (D2)
3 7 5 E
1 44 4 3 4. SOURCE 3 4. Source 2 (S2)
14 3 B
4 8 B 1 5. DRAIN 5. Gate 2 (G2)
2 1 6. DRAIN 1 6. Drain 1 (D1)
1 1 B
BC CE
1 E
90
A B C D E F G H I J K L M N
RX-V573/HTR-5065
SCHEMATIC DIAGRAMS
DIGITAL 1/5
1
HDMI 4 HDMI 3 HDMI 2 HDMI 1 HDMI OUT
(BD/DVD)
HDMI IN-4 HDMI IN-3 HDMI IN-2 HDMI IN-1 HDMI OUT
CB1 DC1R019JAXR190 (JAE) CB2 DC1R019JAXR190 (JAE) CB3 DC1R019JAXR190 (JAE) CB4 DC1R019JAXR190 (JAE) CB6 DC1R019JAXR190 (JAE)
FG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FG FG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FG 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 FG
FG FG
DGND DGND DGND DGND
SCL
SDA
GND
HPD
SCL
SDA
GND
HPD
SCL
SDA
GND
HPD
SCL
SDA
GND
HPD
CEC
CEC
CEC
CEC
SCL
SDA
GND
HPD
Data2+
Data2-
Data1+
Data1-
Data0+
Data0-
DataC+
DataC-
Data2+
Data2-
Data1+
Data1-
Data0+
Data0-
DataC+
DataC-
Data2+
Data2-
Data1+
Data1-
Data0+
Data0-
DataC+
DataC-
Data2+
Data2-
Data1+
Data1-
Data0+
Data0-
DataC+
DataC-
Sheild2
Sheild1
Sheild0
SheildC
Sheild2
Sheild1
Sheild0
SheildC
Sheild2
Sheild1
Sheild0
SheildC
Sheild2
Sheild1
Sheild0
SheildC
Reserved
+5VPower
Reserved
+5VPower
Reserved
+5VPower
Reserved
+5VPower
CEC
Data2+
Data2-
Data1+
Data1-
Data0+
Data0-
DataC+
DataC-
Sheild2
Sheild1
Sheild0
SheildC
Reserved
+5VPower
DGND
5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1 5 4 3 2 1
no_use no_use no_use no_use no_use no_use no_use no_use no_use no_use no_use no_use no_use
6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9
2 D1 D3 D4 D8 D9 D10 D13 D14 D15 D18 D19 D20 D31 DGND

CEC
R10
no_use D7
R24
R42
R56
47K
47K
47K
47K
AVRL161A1R1NTB
IC1: SII9573CTUC
DGND
HDMI port processors
4
3
4
3
3
R1 R4 R12 R15 R29 R33 R45 R50
L17
L18
L19
L20
D32
no_use
100K 1K 100K 1K 100K 1K 100K 1K
R87
Always-On
22
DGND
DGND
DGND
TP29
DGND
TP38
CEC A0
1
2
1
2
2
Section
2
3
CEC A1
EXC24CH900U
EXC24CH900U
EXC24CH900U
EXC24CH900U
73
no_use
no_use
no_use
no_use
CEC Interface CEC Interface
C4081UBTLR
C4081UBTLR
C4081UBTLR
C4081UBTLR
CBUS/ Mobile HD
1
1
Q1
J2
Q4
J4
Q6
J5
Q8
J6
Controller 0 Controller 1 72
R13
R30
R46
HPD Control
R2
1K
1K
1K
1K
no_use
78,82,86,90,94,99 CBUS0
22 D33
R5 R16 R34 R51 Serial Ports CBUS1
R86
10K 10K 10K 10K
DGND
DGND
DGND
DGND
DDC0 RnPWR5V,
2
3
DDC1 SBVCC5V
no_use
no_use
R36
R53
no_use
no_use
DDC
R17
R6
DDC2 Booting
NVRAM Power
C4081UBTLR
C4081UBTLR
C4081UBTLR
C4081UBTLR
Sequencer
10K 1
10K 1
10K 1
10K 1
Q2
Q5
Q7
Q9
DDC3 EDID SRAM 101
R14
R31
R47
R3
DDC4
DGND DGND DGND DGND DDC5 INT
DDC6
69
3 I2C
Local
HDCP
Registers OTP
Configuration, Status,
and Interrupt-Control
Registers
I 2C
DDC TX
22
22
22
22
22
22
R32
R35
R37
R11
R8
R48
R52
R54
R9
22
22
R21
R26
22
R23
22
22
22
TPI HW
E I2S/SPDIF/
5VPWR_4
5VPWR_3
5VPWR_2
5VPWR_1
DSCL_4
DSDA_4
DSCL_3
DSDA_3
DSCL_2
DSDA_2
DSCL_1
DSDA_1
DSD
HPD_2
Power-Down
HPD_4
HPD_3
HPD_1
105 ohm 105 ohm 105 ohm 105 ohm 100 ohm R0X
Section
M
Audio Output
Main
76,80,84,88,92,97
U
TMDS Rx Multi-Channel I2S/SPDIF
10-17
(Port 0)
A X
Audio Input
HDMI/
R1X TMDS Rx
M
U
MHL
Stream
C OSD
SPI
(Port 1) Receiver
X Mixer
20-27 InstaPort
M
U Main
TMDS Tx T0X
R2X TMDS Rx X
(Port 0) HDCP
(Port 2) 151-158
28-35 Encryption
SRC
HDCP
InstaPrevue
Decryption
R3X TMDS Rx
39-46
(Port 3)
B D
R4X Video/
4 47-54
TMDS Rx
(Port 4)
M
U
X
HDMI/
MHL
Receiver
Audio
Splitter M
U
TMDS Tx
(Port 1)
Sub
T1X
InstaPort
R5X
TMDS Rx
X
M G HDCP Encryption 141-148
57-64 U
(Port 5)
X
F
D[19..0] Parallel M
Audio Output ENB I2S/SPDIF
Video U Sub
1-6,161-171,174-176 2 Channel
Input X
BKP1005HS680-T Audio Input
L5
+1.3H
Video
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
1000P(B)
1000P(B)
10/6.3
1000P(B)
220/16
no_use
C35
C101
C107
Pattern
C34
C37
C39
C41
C44
C47
C50
Generator
AVDD33
CVCC12
AVDD12
AVDD33
AVDD12
R3X1+
R3X1-
R3X0+
R3X0-
R3XC+
R3XC-
R0XC+
R0XC-
HSYNC
VSYNC
R2X2+
R2X2-
R2X1+
R2X1-
R2X0+
R2X0-
R2XC+
R2XC-
R1X2+
R1X2-
R1X1+
R1X1-
R1X0+
R1X0-
R1XC+
R1XC-
R0X2+
R0X2-
R0X1+
T0X1-
R0X0+
R0X0-
D19
D18
D17
D16
D15
D14
DE
DGND
ARC0/1 Rx
9
8
7
6
5
4
3
2
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
A R3X2- D13 136,137 ARC
45 176 Input
1000P 0.1 R3X2+ D12 ARC0/1 Tx
46 175
and
R4XC- D11 Output
47 174
R4XC+ IOVCC33
48 173
R4X0- IDCK
49 172
R4X0+
R4X1-
50
HDMI 171
D10
D9
5 R4X1+
51 170
D8
R4X2-
R4X2+
52
53 RECEIVER/TRANSMITTER 169
168
D7
D6
IC2: W25Q16CVSSIG
AVDD12
54 167
D5
3 V 16 M-bit serial flash memory with dual and quad SPI
BKP1005HS680-T 55 166
AVDD33 D4
+3.3H 56 165
L6
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
R5XC- D3
1000P(B)
1000P(B)
1000P(B)
HDMI RxTx SFDP Register Security Register 1 - 3

10/6.3
57 164
no_use
C33
C108
C36
C38
C40
C42
C43
C46
C49
R5XC+ D2 +5.5V
58 163
R5X0- D1 000000h 0000FFh 003000h 0030FFh
DGND 59 162 +5HT 002000h 0020FFh
R5X0+ D0
5.5
001000h 0010FFh
60 161
+5V Power Signal

A
C84
C86
1/25
1/25
R5X1- CVCC12
ECO/ECO
61 160
1000P 0.1
R5X1+ TOX2+ D24 L12 ARC circuit Block Segmentation
+5.0V +- 4%
VOUT
62 159 1FFF00h 1FFFFFh
ARC
G
R1163N501B-TR-F
R5X2- TOX2- xxFF00h xxFFFFh
DGND . .
no_use
RB501V-40 . . Block 31 (64KB)
C71
63 158 Sector 15 (4KB)
BKP1005HS680-T
R5X2+ TOX1+ 5 4
10/10
xxF000h xxF0FFh 1F0000h 1F00FFh
R69
R71
C73
1.8K
1.8K
IC6
10/10
C45
C75
DGND 64 157
R72
CVCC12 TOX1- R90 xxEF00h xxEFFFh
47
1 2 3
1.8 A +3.3H 100P(CH) 65 156 . Sector 14 (4KB) .
DGND 4.7K To 004.sht
CE
VDD
GND
HDMI_SCL R27 22 CSCL SII9573CTUC TOX0+
66 155 xxE000h xxE0FFh
R81 R84 0.1/10(BJ) R89 R92
HDMI_SDA R28 22 CSDA TOX0- 6 2 1 7 xxDF00h xxDFFFh
D2 67 154 HDMI_ARC
R7 HDMI_N_INT INT TOXC+ 51 51 C89 680 100 . Sector 13 (4KB) .
no_use
68 153 TC7WHU04FU TC7WHU04FU

to DIGITAL 4/5 xxD000h xxD0FFh
R19
22P(CH)
56K R25 DGND
R82
+3.3M HDMI_N_RST RESET# TOXC- IC8 IC8
4.7
C87
RB500V-40 IC1 R91 .
69 152
100
HDM_TX_DSCL
HDM_TX_DSDA
R18
DGND
TPWR_CI2CA TDVDD12 .
HDM_TX_HPD
18K +3.3H
R73
70 151 .
47K
4.7K CEC_A1 TPVDD12 .
IC8 .
71 150 3 5
J3 CEC_A0/WAKEUP T1X2+ DGND DGND
6 TC7WHU04FU .
Write Protect Logic and Row Decode

72 149 IC8 8
0.1/10(BJ)
no_use DSDA6(VGA) T1X2- TC7WHU04FU V+
C91
73 148 DGND 1K
X4063A0
DSCL6(VGA) T1X1+ DGND
No replacement part available. R78

J1
xx2F00h xx2FFFh
0
74 147 +5.5V
4 IC8
. .
DGND
RSVDL T1X1- V- Sector 2 (4KB)

Q3 DSDA0
75
サービス部品供給なし
146
T1X0+
5.5
No replacement part available. TC7WHU04FU
xx2000h xx20FFh
BKP1005HS680-T
76 145 10FF00h 10FFFFh
UPA672T-T1-A DGND xx1F00h xx1FFFh
DSCL0 T1X0-
+5H . . . Block 16 (64KB) .
W25Q16CV
Sector 1 (4KB)
77 144
サービス部品供給なし
L11
D 6 D 3 CBUS_HPD0 T1XC+ +5H xx1000h xx10FFh 100000h 1000FFh
2 5 78 143
R0PWR5V T1XC- YC289A0 xx0F00h xx0FFFh 0FFF00h 0FFFFFh
G G 79 142 RP130Q501D-TR-F +5.5V . Sector 0 (4KB) .
DSDA_1 DSDA1 TDVDD12 . Block 15 (64KB) .
S 1 S 4 xx0000h xx00FFh
DGND
80 141 5.0 5.5
0F0000h 0F00FFh
2
DSCL_1 DSCL1 TPVDD12 HDMI_N_INT
to DIGITAL 2/5 VOUT GND HDMI_N_INT
81 140 .
IC5
HPD_1 CBUS_HPD1 CVCC12 HDMI_MUTE
To 002.sht 82 139
J8 HDMI_MUTE
.
1
(CPU) +1.3H
BLM21PG600SN1D
5VPWR_1 R1PWR5V ARC1 HDMI_N_RST
Write Control
10/10
.
C67
VDD CE/CE 0 HDMI_N_RST /WP(IO2) 3
10/10
C68
HDMI_CEC 83 138
DGND DSDA_2 DSDA2 ARC0 Logic
+1.3H
L16
84 137 1.29 HDMI_SCL 08FF00h 08FFFFh
R67 HDMI_SCL
+3.3M
DSCL_2 DSCL2
85 136
SD1_IN/SD1_OUT/SPDIF1_IN/SPDIF1_OUT
no_use HDMI_SDA
to DIGITAL 2/5 . Block 8 (64KB) .
0.1/10(BJ)
HPD_2 CBUS_HPD2 WS1_IN/WS1_OUT HDMI_SDA
220/16
to 002.sht 080000h 0800FFh
L13
L14
C102
C72
BLM21PG600SN1D
86 135 DGND
5VPWR_2 R2PWR5V SCK1_IN/SCK1_OUT OSDFS_N_CS Status
87 134 +3.3H +3.3D L15 TP74 C81 OSDFS_N_CS (CPU) Register
07FF00h 07FFFFh
10/10
C83
DSDA_3 DSDA3 133 SD0_IN/SPDIFO_IN C77 0.1/10(BJ) FPGA_SCK . Block 7 (64KB) .
121
122
123
124
125
126
127
128
129
130
131
132
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
88 FPGA_SCK
+3.3H 3900P(B)
89
90
91
92
93
94
95
96
97
98
99
DGND DGND 10UH 070000h 0700FFh

3.3 FPGA_MOSI
FPGA_MOSI
no_use
3.3
1000P(B)
MCLK
0.1/10(BJ)
DSCL3
DSDA4
DSCL4
RSVDL
DSDA5
DSCL5
APLL12
CVCC12
C76
R3PWR5V
R4PWR5V
R5PWR5V
SBVCC5V
TX_HPD0
TXDSDA0
TXDSCL0
TX_HPD1
TXDSDA1
TXDSCL1
XTALIN
XTALGND
IOVCC33
BLM21PG600SN1D
C78
10/10
10/10
10/10
VCC33OUT
XTALOUT
SS/GPIO2
CBUS_HPD3
CBUS_HPD4
CBUS_HPD5
XTALVCC33
SD0/GPIO4
SDI/GPIO5
SCK0/DDCK
SD0_0/DL0
FPGA_MISO
SCLK/GPIO3
WS0_OUT/DR0
C51
C52
C53
C80
MHL_CD0/GPIO0
MHL_CD1/GPIO1
MUTEOUT/GPIO9
WS0_IN/GPIO11
L10
SPDIF0_OUT/DL2
SCK0_IN/GPIO10
FPGA_MISO
SD0_1/DR1/GPIO6
SD0_2/DL1/GPIO7
SD0_3/DR2/GPIO8
C66
0.1/10(BJ)
Q12
1000P(B) DGND .
OSDFS_BUS_SEL
RAL035P01 High Voltage .
C70
2.45A OSDFS_BUS_SEL
22/6.3
C54
C74
no_use
Generators
VIN
R77
GND
BST
10/10
SW
C63
7 1000P(B) DGND 6 5 4 HDMI_PON 00FF00h 00FFFFh

R38
4.7K
C55 1000P(B)
C62 4 3 2 1 . .
R75
C57 Block 0 (64KB)
12K
DGND 10/10 0.1/10(BJ) DGND BD9328FJ /HOLD(IO3) 7
DTA044EUBTL
G IC7
000000h 0000FFh
R68
C61
100K
0.1/10(BJ) 5 6 7 8 2A
C56 1000P(B)
no_use
Page Address
Q13
SS
FB
R65
COMP
EN
A
DGND
C60 1 2 3 TP71 CLK 6
DGND 0.1/10(BJ) +3.3D SPI Latch / Counter Beginning Ending
1000P 0.1
Command Page Address Page Address
BKP1005HS680-T R79
0.022/16(B)
/CS 1
0.01/16(B)
and
R76
27K
C82
+3.3H 1.2K
1/6.3
C69
L1 3.3 Control Logic
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
1000P(B)
1000P(B)
Column Decode
10/6.3
no_use
C79
R85
R88
C103
2.2K
2.2K
C13
C20
C22
C1
C5
C9
A Side And 256-Byte Page Buffer
R70
TP85 Data
4.7K
HDMI_SDA
DGND DGND DGND HDM_SCL DI(IO0) 5
DGND TP86
A HDMI_SCL
HDM_SDA
BKP1005HS680-T
L8
L9
R49
DGND
DO(IO1) 2
100X4
R39
R99
22X4
R103
1000P 0.1
no_use
no_use
Byte Address
100
C88
C90
10
BLM21PG600SN1D DGND
+1.3H TP91
Latch / Counter
L2
R102
100X4
R98
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
5VPWR_3
5VPWR_4
0.1/10(BJ)
R101
DGND
1000P(B)
1000P(B)
1000P(B)
1000P(B)
1000P(B)
0
DSCL_3
DSDA_4
DSCL_4
10/6.3
no_use
C104
HPD_3
HPD_4
C10
C14
C18
C19
C21
C26
C29
C30
C31
C32
DGND
C6
BKP1005HS680-T
C2
+1.3H
+3.3H
DGND
HRX_SPDIF0/DL2
L7
HRX_SCK0/DDCK
DGND
to DIGITAL 4/5
4.7K
4.7K
HRX_WS0_DR0
HRX_SD0/DL0
HRX_SD1/DR1
HRX_SD2/DL1
HRX_SD3/DR2
130K
AUP_SD0
HRX_MCLK
BKP1005HS680-T R43
AUP_BCK to 004.sht
+1.3H
R44
R41
(DIR)
0
L3
R40
0.1/10(BJ)
0.1/10(BJ)
AUP_WCK
0.1/10(BJ)
A XL1
1000P(B)
1000P(B)
+3.3D
10/6.3
no_use
IC3: TC7MBL3257CFK
C105
4 3
C11
C15
C23
C27
C7
1000P 0.1 DGND

C3
+5H
3.3
1 2 1000P(B) 4-bit 1-of-2 multiplexer/demultiplexer
DGND
HDM_TX_DSCL
BKP1005HS680-T
DGND
8P(CH)
HDM_TX_HPD
27MHZ
8P(CH)
C64
C59
C92
8
HDM_TX_DSDA
L21
BKP1005HS680-T DSP_N_PON
OSD_N_SS
OSD_MISO
OSD_MOSI
+1.3H
OSD_CLK
L4 C93
to DIGITAL 3/5
HDMI_MUTE
DGND
HDMI_SD3/DR2
0.1/10(BJ)
0.1/10(BJ)
OE DIR I/O
0.1/10(BJ)
1000P(B)
1000P(B)
DGND
10/6.3
no_use
L L B A
C106
4 2
C12
C16
C24
C28
0.1/10(BJ) HDMI_SD2/DL1
to 003.sht
C8
C4
L H A B
H X HiZ HDMI_SD1/DR1
1A 1B1
A DIR VCC (DSP)
11 12 13 14 15 16 17 18 19 20
10 9 8 7 6 5 4 3 2 1
DGND
1000P 0.1 HRX_MCLK A1 OE R93 0
3
TC74LCX245FT(EL
HRX_WS0_DR0 A2 B1 1B2
Flash HRX_SCK0/DDCK A3 B2 R97 100
(16Mbits) IC/CB/XL:1-20
FLASH ROM IC2
W25Q16CVSSIG
+3.3H
IC3 TC7MBL3257CFK
OSDFS_BUS_SEL Array R :101-200
Poler C:101-200
HRX_SD0/DL0
HRX_SD1/DR1
A4
A5
B3
B4
R96
R95
100
100
HDMI_BCK/DDCK
HDMI_SD0/DL0
to DIGITAL 4/5
2A
7 5
2B1
YE243A0 Written by YEM
/CS VCC 4 2 FPGA_SCK
OHTER :1-200 HRX_SD2/DL1 A6 B5 R94 100
to 004.sht
1
+3.3H
R20
YD974A0 W25Q16CVSSIG DO(IO1) /HOLD(IO3) 3 OSD_CLK HRX_SD3/DR2 A7 B6
(DIR)
2
X8718C0 MX25L1606EM2I-12G 22 S VDD HDMI_MCK

DIGITAL1:HDMI 6
15 16
1
/WP(IO2) CLK HRX_SPDIF0/DL2 A8 B7 100X4

2B2
3
YE190A0 EN25Q16A-104HIP
0.1/10(BJ)
IC3 TC7MBL3257CFK HDMI_WCK/DR0
IC9
OE
GND DI(IO0) 7 5 FPGA_MOSI GND B8 R104
TC7MBL3257CFK
4
HDMI_SPF/DL2
C58
6 OSD_MOSI
DGND C48
IC3
DGND
0.1/10(BJ) IC3 TC7MBL3257CFK 9 11
9 11 FPGA_MISO 3A 3B1
10 OSD_MISO
VSS
8
IC3 TC7MBL3257CFK IC9: TC74LCX245FT 10

12 14 OSDFS_N_CS 3B2
IC7: BD9328EFJ Low voltage octal bus transceiver
NOTICE (model) 13 OSD_N_SS
9 1ch step-down DC/DC converter with 5-V tolerant inputs and outputs
DGND
J JAPAN 12 14
U U.S.A 4A 4B1
C CANADA VCC
R GENERAL DIR Vcc 13
CAPACITOR
IC6: R1163N501B-TR-FE OPEN EN 5V 1 20 4B2
T CHINA REMARKS PARTS NAME IC5: RP130Q501D-TR-F SHUTDOWN 7 VREF OSC VREG
K KOREA RESISTOR CMOS-based manual mode switching LDO regulator BST
IC8: TC7WHU04FU
NO MARK ELECTROLYTIC CAPACITOR Voltage regulator 1 A1 2 19 OE
A AUSTRALIA REMARKS PARTS NAME TANTALUM CAPACITOR ECO Triple inverter
B BRITISH OCP 12V
NO MARK CARBON (P=5) FILM RESISTOR NO MARK CERAMIC CAPACITOR 4 1
G EUROPE VIN A2 3 18 B1 S
CARBON (P=10) FILM RESISTOR CERAMIC TUBULAR CAPACITOR
VDD 4 3 UVLO 2 VCC 1Y 3A 2Y
L SINGAPORE METAL OXIDE FILM RESISTOR POLYESTER FILM CAPACITOR VDD 1 5 VOUT IBIAS 15
E SOUTH EUROPE TSD 8 7 6 5 A3 4 17 B2
METAL FILM RESISTOR POLYSTYRENE FILM CAPACITOR OE
V TAIWAN METAL PLATE RESISTOR MICA CAPACITOR S LVS
FB
F RUSSIAN FIRE PROOF CARBON FILM RESISTOR P POLYPROPYLENE FILM CAPACITOR 5
ERR
DRV SW OUTPUT A4 5 16 B3
P LATIN AMERICA CEMENT MOLDED RESISTOR SEMICONDUCTIVE CERAMIC CAPACITOR Vref 3
Vref LOGIC
S BRAZIL SEMI VARIABLE RESISTOR POLYPHENYLENE SULFIDE FILM COMP
S Current Limit Current Limit SLOPE A5 6 15 B4
H THAI PWM R LVS
CHIP RESISTOR CAPACITOR CE 1 2 GND CE 3 2 GND
Reverse Detector 6
10 SS
8 Soft Start
1 2 3 4 A6 7 14 B5
Pin No. Symbol Description 1A 3Y 2A GND
Pin No. Symbol Description
A7 8 13 B6
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter. ● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。 1
2
CE
GND
Chip Enable ("H" Active)
Ground Pin
1 VDD Input Pin
2 GND Ground Pin
★ Components having special characteristics are marked and must be replaced ● 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、 3 VOUT Output Pin 3 CE Chip Enable Pin ("H" Active)
4
A8 9 12 B7
with parts having specifications equal to those originally installed. GND
パーツリストに記載されている部品を使用してください。 4 VDD Input Pin 4 ECO MODE Alternative Pin
★ Schematic diagram is subject to change without notice. 5 VOUT Output Pin

● 本回路図は標準回路図です。改良のため予告なく変更することがあります。 GND 10 11 B8
91
RX-V573/HTR-5065
DIGITAL 2/5
1
Page 96 H10 Page 99 E10 Page 97 K6 Page 100 M7 Page 97 G7 Page 97 F5
to OPERATION (1)_CB402 to MAIN (1)_CB211 to OPERATION (8)_CB531 (for factory) to MAIN (4)_CB302 to OPERATION (4)_CB521 to AM/FM TUNER to OPERATION (3)_CB504
for
52044
52151
52151
52151
CB21
CB22
CB23
CB24
CB25
CB26
to OPE(1) to MAIN(1) to OPE(8) FA TEST to MAIN(4) to OPE(4) to TUNER PACK to OPE(3)
CB91
9
8
7
5
4
3
2
1
CB29
52044 PHI VQ04440 52044
PN21
52044
0 Lch
5.2 +5T
0 Rch
0 GND
3.5 SCL
3.5 SDA
0 RST
DGND
KEY2
KEY1
0 DGND
0 DGND
DG
0 VE
+3.3M
0 GPIO2
PRY
PRY
+5T
0 VOL_RA
0 VOL_RB
3.2 REM_IN
HPRY
DGND
0.3 DEST
0 DGND
AGND
3.3 +3.3DSP
FLD_SCK
I_PRT
+5.5V
3.3 +3.3M
0.2 STBY_LED
FLD_MOSI
FLD_N_CS
3.3 AVID_SCL
3.3 AVID_SDA
DC_PRT
0 L3_DET
PSW_N_DET
MIC_N_DET
FLD_N_RST
DGND
PS1_PRT
SPRY_SB
AMP_LMT
AMP_OLV
0.3 VOL_SCK
MUTE_SB
MUTE_SW
3.3 VID_PON
0.6 PS1_PRT
0.9 PS2_PRT
0.4 AD_CVBS
+3.3S
SPRY_5CH
HP_N_DET
TRANS_RY
0.3 VOL_MOSI
2.6 MUTE_5ch
2.9 THM3_PRT
3.3 CPU_N_RST
ACPWR_DET
3.3 R_200_DET
1.5 THM1_PRT
1.5 THM2_PRT
3.2
5.2
0.1
3.3
3.3
3.3
3.3
0
0
3.2
2.9
DGND
3.3
+5.5V
J203
3.3
3.2
3.3
3.3
3.3
3.3
C261 100P(CH)
0.6
3.2
3.3
0.3
3.3
0.3
3.1
3.3
0.8
DGND
C212 no_use DGND no_use C262 100P(CH)
DGND (2125)
C213 no_use
C257 C263 100P(CH)
AGND C264 100P(CH)
+3.3S
DGND
DGND
C235 no_use
+3.3M
no_use
DGND
DGND
+3.3M
DGND DGND
+3.3DSP
C236 no_use
2 C237 no_use
1SS355VM
C302
D205
C238 no_use
C239 no_use C249 no_use
BKP1005HS680-T
33/10
C202 no_use C240 no_use C250 no_use
+3.3D
DGND R919
A1576UBTLR
L101
no_use
C204 no_use C242 no_use C252 no_use R918
no_use
Q207
R267
330
DGND
C207 no_use
C208 no_use
C209 no_use
DGND
100
100
C210 no_use C222 no_use R235
22
22
+3.3S
UPA672T-T1-A
C211 no_use C223 no_use 1M 1 S 4 S
Q902
G G
+3.3S
100
100
R277
R278
R279
R280
0
R219 100
100
100
AGND TUE 2 5
100X4
100X4
100X4
100X4
100X4
TUL
TUR
6 D 3 D
R239
R244
R246
R251
R220
R221
+3.3M RESISTOR
1K
R354
R355
REMARKS PARTS NAME
R353
(1608 0.5%)
R351
R352
IC/CB/XL:91-99 NO MARK CARBON FILM RESISTOR (P=5)
R927
10K
CARBON FILM RESISTOR (P=10)
+5T
Array R :941-999
SPRY_SB_BA
PSW_N_DET
MIC_N_DET
FLD_N_RST
CPU_N_RST
ACPWR_DET
TUN_N_INT
TUN_N_RST
METAL OXIDE FILM RESISTOR
STBY_LED
FLD_MOSI
FLD_N_CS
SPRY_5CH
HP_N_DET
TRANS_RY
VOL_MOSI
THM3_PRT
THM1_PRT
THM2_PRT
OHTER :901-999
FLD_SCK
PS1_PRT
AMP_LMT
AMP_OLV
VOL_SCK
VID_PON
PS1_PRT
PS2_PRT
TUN_SCL
TUN_SDA
3
VOL_RA
VOL_RB
REM_IN
DC_PRT
MT_5CH
L3_DET
METAL FILM RESISTOR
I_PRT
MT_SB
MT_SW
I_PRT
KEY2
KEY1
HPRY
DEST
DGND
METAL PLATE RESISTOR
FIRE PROOF CARBON FILM RESISTOR
CEMENT MOLDED RESISTOR
CPU_N_RST
SEMI VARIABLE RESISTOR
CHIP RESISTOR
REM_IN
VOL_RA
VOL_RB
VID_PON
STBY_LED
FLD_N_CS
FLD_N_CS +3.3DSP
PSW_N_DET
MIC_N_DET
FLD_N_RST
DGND
IC26
5
3
EX_MOSI 6
0.1/10(BJ)
V+
DGND
DGND
C219
IC26
TC7WH32FK 8
IC26 4 CAPACITOR
10K
10K
1
7 V-
10K
+3.3S
EX_SCK 2 REMARKS PARTS NAME
VIDI2C_ON
HDMI_SCL
HDMI_SDA
R240
R249
R250
R252
NO MARK ELECTROLYTIC CAPACITOR
10K
TC7WH32FK DGND
TANTALUM CAPACITOR
NO MARK CERAMIC CAPACITOR
R204
CERAMIC TUBULAR CAPACITOR
N_FCT
10K
DSP_FMT
VID_PON
DSP_PON
DSP_N_CS
EEP_N_CS
HDMI_PON
NCPU_PON
FPGA_SCK
DSP_N_RDY
DSP_N_RST
+3.3S_PON
NDAC_N_MT
FPGA_MISO
FPGA_MOSI
+3.3S_PON
NCPU_SPI_SCK
NCPU_VBUSDRV
NCPU_SPI_MISO
NCPU_SPI_MOSI
OSDFS_BUS_SEL
POLYESTER FILM CAPACITOR
PS1_PRT
POLYSTYRENE FILM CAPACITOR
4
R205
no_use
+5A MICA CAPACITOR

P POLYPROPYLENE FILM CAPACITOR
DGND +3.3M +3.3S +3.3M
+3.3S +3.3M SEMICONDUCTIVE CERAMIC CAPACITOR
+5.5V +5.5V
R210
POLYPHENYLENE SULFIDE FILM

12K
3.3
R242
R247
DGND 3.3 S
R236
R255
R260
PS Protection
L102
BLM21PG600SN1D
L103
22
47
47
22
22
CAPACITOR
BLM21PG600SN1D
PS2_PRT
YC288A0 YC288A0
0.1/10(BJ)
RP130Q331D-TR-F RP130Q331D-TR-F
R211
USB_SEARCH
USB_IPLERR
no_use
USB_N_RST
USB_MCHNG
FLSH_N_CS
FPGA_N_CS
+5.5V +3.3S TP1088 TP1100
USB_BUSY
USB_N_CS
VOUT
VOUT
5.5 5.5
VDD
VDD
+3.3S
no_use
C270
no_use
4 3 4 3
C265
R206
+3.3M IC24 IC25

18K
C247
DGND
1 2 1 2
NOTICE (model)
4.7/6.3
4.7/6.3
no_use
C267
C269
J JAPAN
1/25
1/25
C303
N_INT3
N_INT6
N_INT7
C266
C268
PS3_PRT
GND
GND
P12_0
P12_1
P12_2
P12_3
P12_4
CE/CE
CE/CE
A1576UBTLR
P1_1
RXD6
TXD6
P1_4
P1_6
P1_7
P2_0
P2_1
P2_2
P2_3
P2_6
P2_7
P3_0
VCC2
P3_1
P3_2
P3_3
P3_4
P3_5
P3_6
P3_7
P4_0
P4_1
P4_2
P4_3
P4_4
CLK7
RXD7
TXD7
U U.S.A
VSS
DGND
R207
1/25
R271
C258
10K
10K
R282
C CANADA
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
102
101
100
NCPU_SPI_N_CS P1_0 P12_5 PRY 4.7K
103 64 R GENERAL
DAC_N_CS R222 P0_7 P12_6 USB_VBUS_PON MUTE R274 MT_5CH
100K
104 63 R263 Q208 DGND DGND T CHINA
DGND L/C/R/SL/SR
R268
DGND R216 NCPU_AMUTE 47 P0_6 P12_7 OSDFS_N_CS 10K 470 K KOREA
105 62 +3.3S
10K R223 A AUSTRALIA
MICROPROCESSOR
PS3_PRT LMT_PS3 AN0_5 P5_0 E8A_N_CE
106 61
PS2_PRT 1K R229 LMT_PS2 AN0_4 P5_1 MT_N_5CH B BRITISH
5 +3.3M
L3_DET R224 1K AN0_3
107 60
P5_2 A1576UBTLR
G EUROPE
108 59 L SINGAPORE
1/25
100 R230
No replacement part available. R272
C259
USB_VBUS_PRT AN0_2 P5_3 MT_N_SB
R212
109 58
10K
E SOUTH EUROPE
THM3_PRT R225 100 AN0_1 P13_0 SPRY_5CH 4.7K
Destination
DEST 100 AN0_0

110
サービス部品供給なし 57
P13_1
MUTE
R275 MT_SB
V TAIWAN
100K
SBL\SBR Q209 F RUSSIAN
111 56
R269
NCPU_N_RST P11_7 P13_2 SPRY_SB_BA 470
C201
IC21 P LATIN AMERICA

no_use
no_use
R213
112 55
DIR_SDO P11_6 P13_3 HPRY S BRAZIL
113 54
DIR_WCK P11_5
P11_4
114 CPU 53
P5_4 HP_N_DET R264
47K
+3.3S
H THAI
P5_5 E8A_N_EPM A1576UBTLR
115 52
DGND
1/25
R273 +3.3M
C260
VIDI2C_ON P11_3 YE241A0 P5_6 MT_N_SW
116 51
P11_2 P5_7 DCDC_PON 4.7K
FPGA_N_CFG
117 50
P11_1 P13_4 TRANS_RY MUTE R276 MT_SW
100K
FPGA_N_STA R5F3651TNFC SubWoofer Q210
118 49
R270
P11_0 P13-5 R262 I_PRT R265 470
FPGA_CDONE DGND
119 48
R208 33K DC_PRT R226 LMT_DC AN7 P13-6 1K VOL_SCK 47K
120 47
100K
100K
100K
10K
R209 4.7K AMP_OLV 1K R231 LMT_0LV AN6 P13_7 VOL_MOSI
+3.3S 121 46
THM1_PRT R227 100 AN5
122
M16C/65 45
P6_0
R286
R288
R281
R284
THM2_PRT 100 R232 AN4 CLK0 DGND
6 C301
33/10
KEY2 100 AN3
123 44
SCL0 TUN_SCL
KEY1
124 R5F3651TNFC 43 E8A_N_CE /CE
AN2 SDA0 TUN_SDA
125 ROM:768KByte 42 E8A_N_EPM /EPM
PS1_PRT R228 LMT_PS1 AN1 P6_4 E8A_BUSY
RAM:47KByte E8A_RXD R289 RXD 9
126 41
1K AVSS CLK1 E8A_SCLK
E8A_BUSY 47 R292 BUSY 8
127 40
AN0 VSS R290 47
128 39 E8A_TXD TXD 7
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
0.01/16(B)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
1
2
3
4
5
6
7
8
9
CNVSS 47 R293 CNVss 6

DA0
VSS
XIN
CEC
VREF
AVCC
SIN4
CLK4
P9_4
SIN3
CLK3
BYTE
P8_7
P8_6
XOUT
VCC1
P8_0
P7_7
P7_6
P7_4
P7_2
SCL2
SDA2
TXD1
VCC1
RXD1
SOUT4
SOUT3
P14_1
P14_0
CNVSS
TA4IN
TA2IN
TA1IN
/RESET
N_INT2
N_INT1
N_INT0
47 NC 5
+3.3M 1/10
DGND E8A_RXD DGND 4
C245 DGND
R266 R291 /RES 3
C215
C216
C217
C218
C220
C224
C225
C226
C227
C228
C229
C230
C231
C232
C233
0.1/10(BJ) DGND
R238
R241
R243
CNVSS 100 E8A_SCLK 47 R294 SCLK 2
100P(CH)
R214
22
22
22
10K
C256
C246 47
E8A_TXD +5D 1
100K
100K
DGND +3.3M
10K
+3.3M
N_FCT LMT_I
FCT
DGND
CB27
R285
52045
R283
R287
DGND R259 CB28
no_use
R215
HDMI_SDA
no_use
0.1/10(BJ)
22 R261 HDMI_SCL
R248
VDEC_N_RST
10K
22 (for factory)
C248
R253
7 DGND 56K
R256
+3.3M Force RESET
DGND
+3.3DSP +3.3M +3.3M
+3.3M +3.3M 10K D201
R254
DGND RB521S-30TE61
RB521S-30TE61
10K
R257
+3.3H D204 C272
10K
R234
D202
DGND C255
100K
+3.3S DGND 10/6.3
PL0.3
1SS355VM
+3.3S
0.1/10(BJ)
2 0.01/16(B) IC27 V+
C271
R258 R233 2 4
+3.3M IC27 3 5
10K 1M
3 1 SN74LVC1G17DCKR V-
D203
R201
Q204
NCPU_SPI_REQ
NCPU_SPI_RDY
LMT_0LV
1K
C4081UBTLR RB521S-30TE61
HDMI_N_RST
HDMI_N_INT
8MHZ
DSP_N_INT
HDMI_MUTE
DIR_N_INT
DIR_N_RST
DSP_MOSI
DSP_MISO
HDMI_CEC
DIR_N_CS
XL21
PL3.0
DSP_SCK
Q205 LMT_I
DGND DGND
R202
9.1K
A1576UBTLR
IC21: R5F3651TNFC
PL0.3
PL3.0
DSP_FMT
DIR_WCK
DIR_SDO
DSP_PON
DSP_SCK
HDMI_SDA
EEP_N_CS
HDMI_SCL
HDMI_CEC
HDMI_PON
FPGA_SCK
DSP_N_CS
DSP_MOSI
DSP_MISO
DIR_N_CS
DAC_N_CS
DCDC_PON
NCPU_PON
DGND
HDMI_MUTE
DSP_N_INT
DSP_N_RDY
DSP_N_RST
DIR_N_INT
FPGA_MOSI
FPGA_MISO
DIR_N_RST
NDAC_N_MT
HDMI_N_INT
HDMI_N_RST
OSDFS_N_CS
NCPU_N_RST
NCPU_AMUTE
USB_VBUS_PON
USB_VBUS_PRT
NCPU_SPI_SCK
NCPU_SPI_REQ
NCPU_SPI_RDY
NCPU_VBUSDRV
OSDFS_BUS_SEL
NCPU_SPI_N_CS
NCPU_SPI_MOSI
NCPU_SPI_MISO
Single chip 16-bit microprocessor
R245
10K
R203
1K
Q201 A
HN4B01JE(TE85L,
TP1050 8 8 8 8 8 8 8 8
PL0.3
+3.3S
B1 C1
8
DGND
DGND
E LMT_PS1 TP1051
DIAG_FCT Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P12 Port P13
ACPWR_DET
TUN_N_RST
TUN_N_INT
PSW_N_DET
B
EEP_MISO
DGND
B2 C2
PL3.0
EX_MOSI
AMP_LMT
VCC2 ports
EX_SCK
Q202
HN4B01JE(TE85L,
Internal peripheral functions
PL0.3
+3.3S
B1 C1
System clock generator
EX_SCK
EX_MOSI
EEP_MISO
UART or
R237
10K
clock synchronous serial I/O XIN-XOUT

E LMT_PS2 Timer (16-bit)
(6 channels) XCIN-XCOUT
Outputs (timer A): 5 PLL frequency synthesizer
EEPROM IC/CB/XL:21-40
DSP_FMT
DSP_PON
DSP_SCK
DIR_WCK
DIR_SDO
HDMI_SDA
DSP_MOSI
HDMI_SCL
HDMI_CEC
HDMI_PON
FPGA_SCK
DSP_N_CS
DSP_MISO
DIR_N_CS
DAC_N_CS
DCDC_PON
NCPU_PON
NDAC_N_MT
HDMI_MUTE
FPGA_MOSI
FPGA_MISO
DSP_N_INT
DSP_N_RDY
DSP_N_RST
DIR_N_INT
DIR_N_RST
NCPU_N_RST
HDMI_N_INT
HDMI_N_RST
OSDFS_N_CS
NCPU_AMUTE
DGND
USB_VBUS_PON
NCPU_SPI_REQ
NCPU_SPI_RDY
USB_VBUS_PRT
NCPU_SPI_SCK
NCPU_VBUSDRV
OSDFS_BUS_SEL
NCPU_SPI_N_CS
NCPU_SPI_MOSI
NCPU_SPI_MISO
DGND
B2 C2 On-chip oscillator (125 kHz)

PL3.0
Clock synchronous serial I/O

Array R :351-400 Inputs (timer B): 6 High-speewd on-chip oscillator
+3.3M Chemi.C :301-400 (8 bit x 2 channels)
Q206 LMT_PS3 EEPROM
A1576UBTLR (64kbits) OHTER :201-400 Three-phase motor control circuit DMAC (4 channels)
R218 Multi-master I2C-bus interface
YE090A0 BR25S640FVT-WE2
10K
DIGITAL2:CPU (1 channel)
PL3.0
CRC arithmetic circuit

DGND
IC22
Real-time clock (CRC-CCITT or CRC-16)
9 BR25S640FVT-WE2
CSB VCC to 001.sht to 001.sht to 003.sht to 003.sht to 004.sht to 005.sht
1
Q203 (HDMI) (HDMI) (DSP) to 004.sht (DIR&PS) (NET) CEC function Voltage detecter
HN4B01JE(TE85L, R217 SO HOLDB
(DSP&DAC)
PWM function (8-bit x 2)
2
7
PL0.3
+3.3S
B1 C1 22 WPB SCK to DIGITAL 3/5 to DIGITAL 4/5 to DIGITAL 1/5 Power-on reset
to DIGITAL 3/5, 4/5
3
to DIGITAL 1/5
GND SI Remote control signal
4
E LMT_DC On-chip debugger

receiver (2 circuits)
C214
M16C/60 series Memory
IC22: BR25S640FVT-WE2 Watchdog timer
DGND
B2 C2
PL3.0
0.1/10(BJ) Microprocessor core

SPI BUS 64 k-bits (8,192 x 8-bit) EEPROM IC24, 25: RP130Q331D-TR-F (15-bit) ROM
DGND
Voltage regulator SB
IC26: TC7WH32FK (TE85L, F) IC27: SN74LVC1G17DCKR A/D converter
R0H R0L
R1H R1L USP RAM
Dual 2-input OR gate Single schmitt-trigger buffer (10-bit resolution X 26 channels) R2
R3 ISP
CSB 1 VOLTAGE 8 Vcc VDD 4 3 VOUT
D/A converter INTB
INSTRUCTION DECODE DETECTION A0
CONTROL CLOCK NC 1 5 V CC (8-bit resolution X 2 circuits) PC
GENERATION 1A 1 8 Vcc A 2
A1
FB FLG Multiplier
WRITE HIGH VOLTAGE GND 3 4 Y
SO 2 INHIBITION GENERATOR 7 HOLDB 1B 2 7 1Y
Vref
10 INSTRUCTION Current Limit 2Y 3 6 2B INPUT OUTPUT
VCC1 ports
REGISTER CE 1 2 GND
STATUS REGISTER A Y
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter. ● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。 WPB 3 ADDRESS 13bit ADDRESS 13bit
6 SCK GND 4 5 2A H H
Port P14 Port P11 Port P10 Port P9 Port P8 Port P7 Port P6
REGISTER DECODER L L
★ Components having special characteristics are marked and must be replaced ● 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、 65,536bit
EEPROM
with parts having specifications equal to those originally installed. パーツリストに記載されている部品を使用してください。 DATA READ/WRITE
Pin No. Symbol Description 2 8 8 8 8 8 8
1 CE Chip Enable ("H" Active)
★ Schematic diagram is subject to change without notice.
8bit 8bit
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。 GND 4
REGISTER AMP
5 SI 2 GND Ground Pin
3 VOUT Output Pin
4 VDD Input Pin
92
RX-V573/HTR-5065
DIGITAL 3/5
1
+3.3DSP
+3.3DSP +3.3D
DSP_MOSI
DSP_SCK
DSP_FMT
DSP_MISO
DSP_N_CS
DSP_N_RDY
DSP_N_INT
3.3
BLM21PG600SN1D
3.3
no_use
0.1/10(BJ)
L404
C449
Q401
C455
RAL035P01
TI_WCK
TI_BCK
TI_SDS
TI_SDC
TI_SDF
DGND
AUP_WCK
AUP_BCK
DIR_WCK
DIR_BCK
DIR_SDO
AUP_SD0
TI_SDSB
DIR_MCK1
6 5 4
HDMI_WCK/DR0
HDMI_SPF/DL2
HDMI_SD3/DR2
HDMI_SD2/DL1
HDMI_SD1/DR1
DTA044EUBTL
AUP_SD0
AUP_SD0 TI_BCK DGND
TI_BCK
to 004.sht
0.01/16(B)
Q402
AUP_BCK
no_use
R421
R426
AUP_BCK TI_WCK
From 001.sht
C453
100K
TI_WCK 1 2 3
AUP_WCK From 002.sht
(HDMI RxTx)
R410
AUP_WCK TI_SDF
47
47
TI_SDF to DIGITAL 4/5
47
TI_SDC
(CPU)
TI_SDC
R411
R412
R413
(DAC)
HDMI_WCK/DR0 R508
to DIGITAL 1/5 HDMI_WCK/DR0 TI_SDS to DIGITAL 2/5
47
DSP_PON
2 HDMI_SD1/DR1
HDMI_SD1/DR1
47X4
TI_SDSB
TI_SDS
R503
TI_SDSB DGND DGND DGND
100X4
R429
HDMI_SD2/DL1
4.7K
HDMI_SD2/DL1
(DSD CLK)
(DSD DR2)
(DSD DL1)
(DSD DR1)
(DSD DRL0)
(DSD DR0)
(DSD DL2)
HDMI_SD3/DR2
HDMI_SD3/DR2
RDY
SOMI
HDMI_SPF/DL2 To 001.sht
HDMI_SPF/DL2
DGND (HDMI)
DSP_N_PON to DIGITAL 1/5
R415
4.7K
+1.2DSP
From 004.sht
DIR_MCK1 +1.2DSP +1.8D

DIR_MCK1
DIR_BCK
DIR_BCK R416
to DIGITAL 4/5 DIR_WCK
DIR_WCK 4.7K IC44: RP130Q501D-TR-F
DIR_SDO
R417 Voltage regulator
(DIR)
DIR_SDO
IC45
4.7K R1172H121D-T1-F
DIR_24M
0.1/10(BJ)
C413 0.1/10(BJ)
C416 0.1/10(BJ)
C417 0.1/10(BJ)
DIR_24M
VOUT
R418 1.2 1.8
VDD
3 VDD 4 3
C411
AXR0[9]/AXR1[4]/SPI1_SIMO
AXR0[8]/AXR1[5]/SPI1_SOMI
4.7K
5 4
DIGITAL IN
0.1/10(BJ)
Boot mode: X9292A0
Parallel Flash
C420
1 2 3
10/6.3
SPIO_SOMI/I2C0_SDA
10/6.3
C451
C454
NC
GND
AXR0[15]/AXR2[0]
AXR0[14]/AXR2[1]
AXR0[13]/AXR1[0]
AXR0[12]/AXR1[1]
AXR0[11]/AXR1[2]
AXR0[10]/AXR1[3]
AXR0[7]/SPI1_CLK
AXR0[6]/SPI1_ENA
AXR0[5]/SPI1_SCS
CEorCE
AHCLKR0/AHCLKR1
Vref
47
47
Current Limit
CE 1 2 GND
SPIO_SIMO
R419
R420
AXR0[4]
AXR0[3]
AXR0[2]
AXR0[1]
AXR0[0]
ACLKX0
ACLKR0
AFSX0
AFSR0
DVDD
DVDD
CVDD
CVDD
DVDD
CVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R404 DGND
EMA15
Pin No. Symbol Description
144
143
142
141
122
121
120
119
118
117
116
115
114
113
112
111
110
109
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
100 VSS SPIO_CLK/I2C0_SCL 1 CE Chip Enable ("H" Active)
1 108
2 GND Ground Pin
R501 AHCLKX0/AHCLKX2 SPIO_SCS/I2C1_SCL
100X4 2 107 +5D(main pcb OPT) 3 VOUT Output Pin
EMA14 AMUTE0 SBL/SBR FL/FR VSS 4 VDD Input Pin
3 106 +5D
+5.5V
EMA13 AMUTE1 SL/SR SPIO_ENA/I2C1_SDA
4 C/SW 105
EMA12 AHCLKX1 EM_OE N_EMOE
5 104 TP2020
4
BLM21PG600SN1D
EMA16 VSS DVDD C428
L405
6 103
EMA17 R405 C404 ACLKX1 EM_RW
0.1/10(BJ)
IC44 IC45: R1172H121D-T1-F
7 102 CMOS-based positive-voltage regulator IC
100 0.1/10(BJ) RP130Q501D-TR-F
CVDD CVDD
8 101
VOUT
5.5
VDD
R409 ACLKR1 EM_CS[2] N_EMCS2 5.0
DGND
10K DVDD
9 DSP 100
VSS C422
R509 Vceh=1~6.5V 4 3
VDD 4 5 VOUT
10 99
0.1/10(BJ) 33X4 Vcel=0-0.4V YC289A0
AFSX1 EM_RAS N_EMRAS
11 98 1 2
1/25
1/25
R406
C450
C452
EMA18 AFSR1 EM_CS[0] N_EMCS0
GND
CE/CE
12 97
100 C405 VSS EM_BA[0] EMBA0
13 96 Vref
R401 0.1/10(BJ)
DSP_N_RST RESET VSS EMBA1 Current Limit
14 95
100 C423 CE 1 2 GND
C401
100P(CH) C406
VSS
CVDD
15 DSP 94
EM_BA[1]
EM_A[10]
0.1/10(BJ)
16 93
DGND
0.1/10(BJ)
DIR_24M DGND CLKIN DVDD R510 Pin No. Symbol Description
17 92
+3.3DSP1
33X4 1 CE Chip Enable Pin
VSS EM_A[0] EMA10
GND
18 91
TC7SH08FU C407 IC41 2 GND Ground Pin
145
5 IC46
TMS
0.1/10(BJ)
TMS
CVDD
19 90
CVDD
EM_A[1]
EMA0
EMA1
3 NC No Connection
DSP_N_RST 20 89 4 VDD Input Pin
DSP_N_RST no_use TRST DGND EM_A[2] EMA2 C442
21 88 5 VOUT Output Pin of Voltage Regulator
DSP_N_INT R402 R403 0.1/10(BJ)
DSP_N_INT OSCVSS VSS C440
22 87
4.7K
4.7K
4.7K
4.7K
4.7K
From 002.sht
DSP_N_RDY 4.7K no_use

DSP_N_RDY OSCIN EM_A[3] R511
DSP_FMT 23 D70YE101BRFP266 86
33X4
DSP_FMT DGND N_TRST OSCOUT CVDD EMA3 VCC VSS
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
24 85
R424
R425
R427
R428
R430
to DIGITAL 2/5 DSP_N_CS
OSCVDD
25 84
EM_A[4] EMA4 R513 C435 DQ0 DQ15 C447 R515
DSP_N_CS 33X4 0.1/10(BJ) VSSQ0.1/10(BJ)
33X4 IC46: TC7SH08FU
C402
C403
VSS EM_A[5] 0.1/10(BJ) EMA5 EMD0 VCCQ EMD15

(CPU)
DSP_SCK 26 83
DSP_SCK L401 PLLHV VSS C424 EMA6 EMD1 DQ1 DQ14 EMD14 EMA14 A15 A16 EMA15
2-input AND gate
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
DSP_MOSI +3.3DSP
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
27 82
DSP_MOSI BKP1005HS680-T 10/6.3 0.1/10(BJ) C425
TDI TDI DVDD EMD2 DQ2 DQ13 EMD13 EMA13 A14 BYTE
DSP_MISO 28 81
DSP_MISO 0.1/10(BJ) C456 IN B 1 5 VCC
TDO TDO EM_A[6] EMD3 VSSQ VCCQ EMD12 EMA12 A13 VSS
29 80
VSS
30
No replacement part available. 79
EM_A[7]
C438
no_use DQ3 DQ12
C445
no_use EMA11 A12 DQ15
0.1/10(BJ)
EMD15 IN A 2
C408 サービス部品供給なし
IC42
DVDD VSS R512 R514 DQ4 DQ11 R516 EMA10 A11 DQ7 EMD7
31 78 GND 3 4 OUT Y
0.1/10(BJ)
0.1/10(BJ) C426 33X4 33X4 C448 33X4
0.1/10(BJ)
N_EMU0 EMU[0] CVDD EMA7 EMD4 C436 VCCQ VSSQ EMD11 EMA9 A10 DQ14 EMD14
6 32 77
0.1/10(BJ)
IC43
CVDD EM_A[8] EMA8 EMD5 DQ5 DQ10 EMD10 EMA8 A9 DQ6 EMD6
33 76
C439
N_EMU1 EMU[1] EM_A[9] EMA9 EMD6 DQ6 DQ9 EMD9 EMA7 A8 DQ13 EMD13
C446
CAPACITOR 34 75
TCK TCK EM_A[11] EMA11 EMD7 VSSQ VCCQ EMD8 EMA18 A19 DQ5 EMD5
REMARKS PARTS NAME 35 74
C409 no_use DQ7 no_use
RESISTOR NO MARK ELECTROLYTIC CAPACITOR VSS DVDD DQ8 N.C. DQ12 EMD12
&
36 73
0.1/10(BJ) C444
37
70
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
62
63
56
57
58
64
65
66
67
68
69
71
72
59
60
61
REMARKS PARTS NAME TANTALUM CAPACITOR C437 VCC VSS no_use N_EMWE WE DQ4 EMD4
R407
R408
0.1/10(BJ)
4.7K
4.7K
NO MARK CARBON FILM RESISTOR (P=5) NO MARK CERAMIC CAPACITOR C427

VSS
VSS
VSS
VSS
VSS
VSS
DVDD
CVDD
DVDD
CVDD
CVDD
DVDD
CVDD
DVDD
EM_WE
EM_CAS
EM_CLK
EM_CKE
EMDQM0 DQML NC RESET VCC
EM_D[7]
EM_D[6]
EM_D[5]
EM_D[4]
EM_D[3]
EM_D[2]
EM_D[1]
EM_D[0]
EM_D[9]
EM_D[8]
EM_D[15]
EM_D[10]
EM_D[14]
EM_D[13]
EM_D[12]
EM_D[11]
0.1/10(BJ)
EM_WE_DQM[1]
EM_WE_DQM[0]
CARBON FILM RESISTOR (P=10) CERAMIC TUBULAR CAPACITOR
&
N_EMWE WE DQMU EMDQM1 R422 N.C. DQ11 EMD11
METAL OXIDE FILM RESISTOR POLYESTER FILM CAPACITOR +3.3DSP
METAL FILM RESISTOR POLYSTYRENE FILM CAPACITOR N_EMCAS CAS CLK EMCLK 4.7K N.C. DQ3 EMD3
+1.2DSP +3.3DSP1
M12L64164A-5TG2
METAL PLATE RESISTOR MICA CAPACITOR N_EMRAS RAS CKE EMCKE R423 RY/BY DQ10 EMD10
DGND
C432
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
0.1/10(BJ)
FIRE PROOF CARBON FILM RESISTOR P POLYPROPYLENE FILM CAPACITOR 4.7K
N_EMCS0 CS NC EMA17 A18 DQ2 EMD2
C410
C412
C414
C415
C418
C419
C421
CEMENT MOLDED RESISTOR SEMICONDUCTIVE CERAMIC CAPACITOR
MX29LV160DBTI-7
1000P(B) EMBA0 A13/BA0 A11 EMA11 EMA16 A17 DQ9 EMD9
SEMI VARIABLE RESISTOR POLYPHENYLENE SULFIDE FILM
S
EMBA1 A12/BA1 A9 EMA9 EMA6 A7 DQ1 EMD1
CHIP RESISTOR CAPACITOR
C430
BKP1005HS680-T
BKP1005HS680-T
EMA10 A10/AP A8 EMA8 EMA5 A6 DQ8 EMD8
7 1000P(B) EMA0 A0 A7 EMA7 EMA4 A5 DQ0 EMD0
L402
L403
NOTICE (model) EMA1 A1 A6 EMA6 EMA3 A4 OE N_EMOE
J JAPAN CB41 no_use C457
EMA2 A2 A5 EMA5 EMA2 A3 VSS
U U.S.A 0.1/10(BJ)
EMA3 A3 A4 EMA4 EMA1 A2 CE N_EMCS2
C CANADA
0.1/10(BJ)
R GENERAL VCC VSS EMA0 A1 A0 EMBA1
10/6.3
10/6.3
10/6.3
R414
C429
1 2 3 4 5 6 7 8 9 10 11 12 13 14
C431
C433
C434
33
T CHINA
K KOREA C441 DGND
TMS
TDI
KEY
TDO
TCK
C443
DGND
DGND
DGND
DGND
/TRST
TCK_RET
/EMU(0)
/EMU(1)
Flash Memory
PD(+3.3V)
A AUSTRALIA no_use
R502 R504 R505 R506 R507 0.1/10(BJ)
B BRITISH
33X4 33X4 33X4 33X4 33X4
DGND DGND 16Mbit
G
L
EUROPE
SINGAPORE
SDRAM FLASH ROM
E SOUTH EUROPE
SDRAM
N_EMCAS
YE244A0 Written by YEM

EMDQM0
N_EMWE
EMDQM1
V TAIWAN
EMD15
EMD14
EMD13
EMD12
EMD11
EMD10
EMCLK
EMCKE
EMD9
EMD7
EMD6
EMD5
EMD4
EMD3
EMD2
EMD1
EMD0
EMD8
F RUSSIAN +3.3D
64Mbit X3042E0 MX29LV160DBTI-7
DGND X8950C0 EN29LV160CB-70TIP
P LATIN AMERICA X9625B0 M12L64164A-5TG2M
XZ414F0 W9864G6JH-6
8 S
H
BRAZIL
THAI ZENTEL:YD487A0 IC/CB/XL:41-60
N_TRST
N_EMU0
N_EMU1
Array R :501-600
TMS
TDI
TDO
TCK
OHTER :401-600
DIGITAL3:DSP
IC41: D70YE101BRFP266
Floating-point digital signal processors
IC43: MX29LV160DBTI-70G
Program/Data JTAG EMU 16 M-bit 3 V supply flash memory
256 RAM
D1 256K Bytes
Data 64 McASP0 IC42: M12L64164A-5TG
32 16 Serializes 1 54 A15 1 48 A16
R/W Program/Data VDD VSS
1M x 16-bit x 4 banks synchronous DRAM DQ0 2 53 DQ15
A14 2 47 BYTE#
C67x+ Microprocessor 256 ROM Page1 A13 3
9 D2
256K Bytes 32
VDDQ 3 52 VSSQ
WRITE
A12 4
46
45
GND
Q15/A-1
Memory 4 51 CE# A11 5 44 Q7
64 DQ1 DQ14 CONTROL
Data Controller Program/Data 32 OE# PROGRAM/ERASE STATE A10 6 43 Q14
McASP DMA Bus
R/W McASP1 CLK DQ2 5 50 DQ13 WE# INPUT A9 7 42 Q6

256 ROM Page2 Clock LOGIC
HIGH VOLTAGE MACHINE A8 8 41 Q13
256K Bytes 6 Serializes VSSQ 6 49 VDDQ RESET#
32 Generator Bank D BYTE# (WSM) A19 9 40 Q5
Program CKE Bank C DQ3 7 48 DQ12 WP#/ACC NC 10 39 Q12
WE# 11 38 Q4
I/O INT Fetch Program/Data Bank B DQ4 8 47 DQ11
ROM Page3 32 McASP2 RESET# 12 37 VCC
256 Row VDDQ 9 46 VSSQ NC 13 36 Q11
256K Bytes 2 Serializes Address
256
14 35 Q3
Row Decoder
10 45 WP#/ACC
DIT Only Address DQ5 DQ10
X-DECODER
32 STATE RY/BY# 15 34 Q10
Peripheral Configuration Bus
Buffer DQ6 11 44 DQ9 ADDRESS FLASH REGISTER A18 16 33 Q2
Program CSP 32 32 Mode and Bank A VSSQ 12 43 VDDQ LATCH ARRAY

A17 17 32 Q9
32 SPI1 Register
A7 18 31 Q1
Cache 256 Refresh DQ7 13 42 DQ8 A0-AM ARRAY A6 19 30 Q8
AND
Y-DECODER
A5 20 29 Q0
32K Bytes PMP DMP Counter VDD 14 41 VSS SOURCE
HV A4 21 28 OE#
32 SPI0 15 40
BUFFER
Y-PASS GATE
LDQM NC COMMAND A3 22 27 GND
32 32 A2 23 26 CE#
16 39
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
WE UDQM DATA
32 I2C0 Sense Amplifier DECODER
A1 24 25 A0
L(U)DQM CAS 17 38 CLK
★ Components having special characteristics are marked and must be replaced
Command Decoder
High-performance CS Column RAS 18 37 CKE

Crossbar Switch 32 Column Decoder with parts having specifications equal to those originally installed.
Control Logic
32 I2C1 Address CS 19 36 NC SENSE PGM
10 Buffer AMPLIFIER DATA

★ Schematic diagram is subject to change without notice.
Input and Output
RAS A13 20 35 A11 HV

Latch Circuit
32 32 32 32 and 34
COMMAND
32 RTI A12 21 A9
Refresh DATA LATCH
Buffer
CAS A10/AP 22 33 A8
Counter PROGRAM
32 PLL Data Control Circuit DQ A0 23 32 A7 DATA LATCH ● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
I/O Interrupts MAX0 CONTROL MAX1 Events WE A1 24 31 A6 ● 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
Out In 25 30
EMIF A2 A5 パーツリストに記載されている部品を使用してください。
A3 26 29 A4 Q0-Q15/A-1 I/O BUFFER
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
dMAX VDD 27 28 VSS
Peripheral Interrupt and DMA Events AM: MSB address
93
RX-V573/HTR-5065
DIGITAL 4/5
1
IC/CB/XL:61-80
Array R :701-800
From 002.sht
NET DAC Chemi.C :701-800
OHTER :601-800
(CPU)
DIR_BCK
DIR_WCK
DIR_SDO
DIR_24M
NCPU_SDO
NCPU_WCK
NCPU_WCK
NCPU_SDO
NCPU_BCK
NCPU_MCK
DGND
DIR_N_RST
DIR_N_RST
DIR_N_INT
DIGITAL4:DIR&DAC&PWR
no_use
10/6.3
DIR_N_INT
C607
R628
C612
47
DIR_N_CS
DIR_N_CS R629
to DIGITAL 2/5 47
33
33
33
33
DSP_SCK L603
DSP_SCK +3.3DSP
R612 BKP1005HS680-T
no_use
1/10
R619
R621
R623
R625
DSP_MOSI
C617
DSP_MOSI
DSP_MISO DSP_MISO 10K R613 +3.3DSP
DSP_MISO
33
0.01/16(B)
DSP_MOSI
DVDD C618
R639
MDO/ADR0
DGND DGND
MDI/SDA
MPIO_B3
MPIO_B2
no_use
From 001.sht
no_use
J601
100P(CH)
2
DGND
SCKO
LRCK
DOUT
MPO1
MPO0
C604
C606
BCK
R640 C676
(HDMI Rx) 0.1/10(BJ) DIGITAL IN
24
23
22
21
20
19
18
17
16
15
14
13
MC/SCL MPIO_B1 no_use DGND
HDMI_ARC DSP_SCK NCPU_BCK
36 35 34 33 32 31 30 29 28 27 26 25
1 2 3 4 5 6 7 8 9 10 11 12
HDMI_ARC CB62
R608 MS/ADR1 MPIO_B0 5.0 +5DSP
HDMI_MCK DIR_N_CS NCPU_MCK +5D
0.1/10(BJ)
HDMI_MCK
0.1/10(BJ)
AV1_D 0.4 AV1_D
0 MODE MPIO_C3
R642
R645
HDMI_BCK/DDCK HDMI_SD0/DL0
4.7K
4.7K
R701
C642
HDMI_BCK/DDCK DGND
DIR/ADC
C635
no_use
R603
10KX4 RXIN7/ADIN0 MPIO_C2 AV2_D 0.4 AV2_D
to DIGITAL 1/5 HDMI_WCK/DR0
RXIN6/ALRCKI0 MPIO_C1 0 DGND
HDMI_WCK/DR0 HDMI_BCK/DDCK DGND
HDMI_WCK/DR0
AV3_D 0.4 AV3_D
PCM9211PTR
HDMI_SD0/DL0 RXIN5/ABCKI0 MPIO_C0 HDMI_MCK
DVDD
DGND
LDOO
XSMT
LRCK
HDMI_SD0/DL0 DGND
FMT
DIN
BCK
SCK
FLT
IC61
RXIN4/ASCKI0 MPIO_A3 AV4_D 0 AV4_D
B to B 12P
to MAIN(3)
HDMI_SPF/DL2 HDMI_SPF/DL2
HDMI_SPF/DL2
RXIN3 MPIO_A2 20 19 18 17 16 15 14 13 12 11 0 DGND
AV4_D HDMI_ARC
IC63 PCM5101PWR
From 001.sht AV3_D RXIN2 MPIO_A1 1 2 3 4 5 6 7 8 9 10 AGND
0 AE Page 100 J2
5.0 +5A
To 003.sht R611 RST MPIO_A0 +3.3DSP
CAPP
CAPM
VNEG
OUTL
OUTR
AVDD
AGND
DEMP
CPVDD
CPGND
DGND DIR_N_RST NCPU_SPDIF
+3.3DSP
+5A to MAIN (3)_CB271
(HDMI Rx&DSP) AV2_D 100 RXIN1 NPCM/INT1 33 R630 DIR_N_INT to DIGITAL 2/5 TUL
TUL 0 TUL
R647
L602 VDDRX ERROR/INT0 R631 From 002.sht TUE
0 TUE
2.2/10
R635
R644
no_use
C646
+3.3DSP
470
(CPU)
10K
L610 TUR 0 TUR
0.01/16(B)
37
38
39
40
41
42
43
44
45
46
47
48
33
2.2/10
C640
BKP1005HS680-T TUR
BKP1005HS680-T
0.1/10(BJ)
C608
1/10
C611
0 NETR
3
XTI
XTO
VCC
AGND
FILT
VCOM
VINL
VINR
RXIN0
GNDRX
VCCAD
AGNDAD
C637
R643
R646
0
470
4.7K
E RESISTOR
DGND
To 003.sht
0 NETL REMARKS PARTS NAME
(DSP) AV1_D
+3.3DSP NO MARK CARBON FILM RESISTOR (P=5)
C647 52418
DIR_MCK1 BKP1005HS680-T C649 CARBON FILM RESISTOR (P=10)
2200P(B)
DIR_BCK METAL OXIDE FILM RESISTOR
0.1/10(BJ)
DIR_BCK +5A
10/10
C627
C628
L605 2200P(B) METAL FILM RESISTOR
680
R616
to DIGITAL 3/5 DIR_WCK
DIR_WCK AGND
C673 METAL PLATE RESISTOR
DIR_SDO DGND DGND
DIR_SDO XL61 1000P(B) FIRE PROOF CARBON FILM RESISTOR
0.01/16(B)
DGND
DIR_24M
DIR_24M
DIR 24.576MHZ
4 3 C624 10/10
CEMENT MOLDED RESISTOR
0.01/16(B)
C620
AGND SEMI VARIABLE RESISTOR
C625 C674
C629
To 002.sht CHIP RESISTOR
DIGITAL IN 1 2 0.1/10(BJ) TUE
1000P(B)
L604
(CPU)
C619
12P(CH)
15P(CH)
C613
C614
1/10 BKP1005HS680-T +3.3DSP
DGND
DIR_WCK
to DIGITAL 2/5 CAPACITOR
DIR_SDO
REMARKS PARTS NAME
DGND NO MARK ELECTROLYTIC CAPACITOR
R622
4 TANTALUM CAPACITOR
680
From 005.sht NO MARK CERAMIC CAPACITOR
(Network) CERAMIC TUBULAR CAPACITOR
4700P/25(B)
ANALOG IN
0.068/25
NCPU_SDO POLYESTER FILM CAPACITOR
C621
C622
NCPU_SDO
+5A POLYSTYRENE FILM CAPACITOR
NCPU_WCK
NCPU_WCK MICA CAPACITOR
NCPU_BCK P POLYPROPYLENE FILM CAPACITOR
to DIGITAL 5/5 NCPU_BCK
R624
L611 SEMICONDUCTIVE CERAMIC CAPACITOR
NCPU_MCK
0
NCPU_MCK BKP1005HS680-T POLYPHENYLENE SULFIDE FILM
ST61 S
NCPU_SPDIF
FRONT L CAPACITOR
NCPU_SPDIF C703 R652
10/16 1.2K
AUDIO DAC C662
100P(CH)
DGND
From 002.sht
NOTICE (model)
To 005.sht
to DIGITAL 2/5 DAC C663
100P(CH)
J
U
JAPAN
U.S.A
(Network) NDAC_N_MT ZR1/ZR1/FMT0 ZR2
G 15 16 17 18 19 20 21 22 23 24 25 26 27 28
R656
ANALOG IN
14 13 12 11 10 9 8 7 6 5 4 3 2 1
NDAC_N_MT C CANADA
3.3 DAC_N_CS MS/ADR/FMT1 VOUT1 FLO 1.2K R GENERAL
(CPU)
DAC_N_CS
+3.3N CB63
DSP_SCK MC/SCL/DEMP VOUT2 FRO R653 2.5 ADR T CHINA
to DIGITAL 5/5
5 DSP_SCK
1.2K 2.5 K KOREA
IC62
1.2 DSP_MOSI MD/SDA/MUTE VCOM C702 C664 ADL
DSP_MOSI
+1.2N SCK AGND2
10/16 100P(CH) CENTER 2.4 DA-FR
A AUSTRALIA
B BRITISH
TI_SDF DATA1 VCC2 C651 C665 0 E
+3.3D TI_SDF G EUROPE
0.1/10(BJ) 100P(CH)
TI_BCK BCK VOUT3 CO 2.5 DA-FL L SINGAPORE
B to B 13P
to MAIN(2)
R657
+3.3N +1.2N TI_BCK
From 003.sht
TI_WCK LRCK VOUT4 SWO 1.2K 2.4 DA-SR E SOUTH EUROPE
3.3 +1.8D TI_WCK
V TAIWAN
10/10 1/10 VDD VOUT5 SLO SURROUND L 0 E Page 100 D2
0.1/10(BJ)
Q606 +3.3DSP F RUSSIAN

1.8
C601
C632 C636 R654 2.5 DA-SL

RAL035P01 to DIGITAL 3/5 FL/FR C/SW DGND VOUT6 SRO
PCM1681PWPR
C652 1.2K
to MAIN (2)_CB251 P LATIN AMERICA
(DSP)
TI_SDC DATA2 AGND1 C666 DA-SW S BRAZIL
IC65 TI_SDC
4 5 6 100P(CH)
R1172H121D-T1-F TI_SDS DATA3 VCC1 0 E H THAI
DGND TI_SDS

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AV RECEIVER

RX-V573/HTR-5065 SERVICE MANUAL

注意： 下記の部品を交換した場合、正常動作のためにモデル名をバックアップ IC（EEPROM：DIGITAL P.C.B. の IC22）へ

Copyright © 2012 All rights reserved.

■ TO SERVICE PERSONNEL AC LEAKAGE

WARNING: CHEMICAL CONTENT NOTICE!

About lead free solder / 無鉛ハンダについて

■ REMOTE CONTROL PANEL

Remote control sheet

Headphone Jack Rated Output/Output Impedance /

Tuning Range / 受信周波数範囲 Finish / 仕上げ

Antenna Input / アンテナ入力

Tuning Range / 受信周波数範囲 U .......................U.S.A. model B ......................British model

..................................................................................... Loop antenna

Weight / 質量 MPEG Layer 3 音声圧縮技術は Fraunhofer IIS および Thomson によってライセン

DLNA™ and DLNA CERTIFIED™ are trademarks or registered trademarks

“HDMI,” the “HDMI” logo and “High-Definition Multimedia Interface” are

“x.v.Color” is a trademark of Sony Corporation.

AAC ロゴマーク はドルビーラボラトリーズの商標です。

Unit Sound Program CINEMA DSP 3D Music Enhancer

MUSIC Hall in Munich ○ ○

The Roxy Theatre ○ ○

The Bottom Line ○ ○

SUR. DECODE (*1) ○

• SET MENU TABLE

■ SERVICE PRECAUTIONS / サービス時の注意事項

■ DISASSEMBLY PROCEDURES / 分解手順

1. Removal of Top Cover 1. トップカバーの外し方

2. Removal of Front Panel Unit 2. フロントパネルユニットの外し方

Remove CB525 Top cover

OPERATION (7) P.C.B.

3. Removal of DIGITAL P.C.B. 3. DIGITAL P.C.B. の外し方

4. Removal of AMP Unit 4. アンプユニットの外し方

MAIN (3) P.C.B.

When checking the P.C.B.s: P.C.B. をチェックする場合には：

MAIN (1) P.C.B.

■ UPDATING FIRMWARE / ファームウェアのアップデート

● Confirmation of firmware version and checksum ● ファームウェアのバージョンとチェックサムの

Using the sub-menu, have the firmware version and サブメニューでファームウェアのバージョンと

● Initializing the back-up IC ● バックアップ IC の初期化

After updating the firmware, the back-up IC MUST ファームウェアのアップデート後、設定情報（音

● Required Tools ● 必要なツール

Note) When the latest firmware is copied to a sub- 注意）最新のファームウェアをサブフォルダにコピー

● Operation Procedures ● 操作手順

" " (Power) key

USB storage device

Writing is started. / 書き込み開始 Writing being executed. / 書き込み中

USB Update VERIFYING... Sx-x:xx%

4. When writing of the firmware is completed, 4. フ ァ ー ム ウ ェ ア の 書 き 込 み 完 了 後、 UPDATE

Writing is completed. / 書き込み完了

UPDATE SUCCESS PLEASE... POWER OFF!

5. Press the “ ” (Power) key to turn off the power. 5. （電源）キーを押して電源を切ります。（Fig. 1）

■ SELF-DIAGNOSTIC FUNCTION / ダイアグ（自己診断機能）

No. Main menu No. Sub-menu

No. Main menu No. Sub-menu

● Starting Self-Diagnostic Function ● ダイアグの起動

Keys of this unit / 本機キー

● Starting Self-Diagnostic Function in ● プロテクション解除モードでの起動

● Canceling Self-Diagnostic Function ● ダイアグの解除

● Display provided when Self-Diagnostic ● ダイアグ起動時の表示

1. When the power is turned off by usual operation: 1. 通常の操作で電源を切った場合：

Opening message / オープニング表示 Main menu display / メインメニュー表示

2. When the protection function worked to turn 2. プロテクションが働いて電源が切れた場合：

注意：下記の部品を交換した場合、正常動作のためにモデル名をバックアップ IC（EEPROM：DIGITAL P.C.B. の IC22）へ

AAC ロゴマークはドルビーラボラトリーズの商標です。

4. When writing of the firmware is completed, 4. ファームウェアの書き込み完了後、 UPDATE

Cause: An excessive current flowed through the power 原因：パワーアンプに過電流が流れた。

Cause: DC output of the power amplifier is abnormal. 原因：パワーアンプの DC 出力が異常。

Cause: The voltage in the power supply section is 原因：電源部の電圧が異常。

Cause: The temperature of the heatsink is excessive. 原因：ヒートシンクの温度が異常。

Note) Be sure to return the shorted pins 注意）検査後、ショートしたピンを必ず元の