®

INA
103
INA103
INA
103

Low Noise, Low Distortion

INSTRUMENTATION AMPLIFIER

FEATURES APPLICATIONS
● LOW NOISE: 1nV/√Hz ● HIGH QUALITY MICROPHONE PREAMPS
● LOW THD+N: 0.0009% at 1kHz, G = 100 (REPLACES TRANSFORMERS)
● HIGH GBW: 100MHz at G = 1000 ● MOVING-COIL PREAMPLIFIERS
● WIDE SUPPLY RANGE: ±9V to ±25V ● DIFFERENTIAL RECEIVERS
● HIGH CMRR: >100dB ● AMPLIFICATION OF SIGNALS FROM:
Strain Gages (Weigh Scale Applications)
● BUILT-IN GAIN SETTING RESISTORS:
Thermocouples
G = 1, 100
Bridge Transducers
● UPGRADES AD625

DESCRIPTION The INA103 is available in 16-pin plastic DIP and

SOL-16 surface-mount packages. Commercial and In-
The INA103 is a very low noise, low distortion mono-
dustrial temperature range models are available.
lithic instrumentation amplifier. Its current-feedback
circuitry achieves very wide bandwidth and excellent
dynamic response. It is ideal for low-level audio
signals such as balanced low-impedance microphones. Offset Offset
The INA103 provides near-theoretical limit noise per- –Gain Drive Null Null

formance for 200Ω source impedances. Many indus- 12 3 4

trial applications also benefit from its low noise and 6kΩ 6kΩ
–Input 16 +
wide bandwidth. A1 11 Sense
–Gain Sense 15 –
Unique distortion cancellation circuitry reduces dis- 3kΩ
–RG 13
tortion to extremely low levels, even in high gain. Its
–
balanced input, low noise and low distortion provide 60.6Ω
A3 10 Output
superior performance compared to transformer-coupled G = 100 14 +
3kΩ
microphone amplifiers used in professional audio +RG 6
equipment. +Gain Sense 2 – 6kΩ 6kΩ
A2 7 Ref
The INA103’s wide supply voltage (±9 to ±25V) and +Input 1 +

high output current drive allow its use in high-level

audio stages as well. A copper lead frame in the plastic 5 9 8

DIP assures excellent thermal performance. +Gain Drive V+ V–

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

©
1990 Burr-Brown Corporation 1
PDS-1016H INA103
Printed in U.S.A. March, 1998
SPECIFICATIONS
All specifications at TA = +25°C, VS = ±15V and RL = 2kΩ, unless otherwise noted.

INA103KP, KU
PARAMETER CONDITIONS MIN TYP MAX UNITS
GAIN
Range of Gain 1 1000 V/V
Gain Equation (1) G = 1 + 6kΩ/RG V/V
Gain Error, DC G = 1 ±10V Output 0.005 0.05 %
G = 100 0.07 0.25 %
Equation 0.05 %
Gain Temp. Co. G = 1 ±10V Output 10 ppm/°C
G = 100 25 ppm/°C
Equation 25 ppm/°C
Nonlinearity, DC G = 1 ±10V Output 0.0003 0.01 % of FS(2)
G = 100 0.0006 0.01 % of FS
OUTPUT
Voltage, RL = 600Ω TA = TMIN to TMAX ±11.5 ±12 V
RL = 600Ω VS = ±25, TA = 25°C ±20 ±21 V
Current TA = TMIN to TMAX ±40 mA
Short Circuit Current ±70 mA
Capacitive Load Stability 10 nF
INPUT OFFSET VOLTAGE
Initial Offset RTI (3) (30 + 1200/G) µV
(KU Grade) (250+ 5000/G) µV
vs Temp G = 1 to 1000 TA = TMIN to TMAX 1 + 20/G µV/°C
G = 1000 TA = TMIN to T MAX µV/°C
vs Supply ±9V to ±25V 0.2 + 8/G 4 + 60/G µV/V
INPUT BIAS CURRENT
Initial Bias Current 2.5 12 µA
vs Temp TA = TMIN to TMAX 15 nA/°C
Initial Offset Current 0.04 1 µA
vs Temp TA = TMIN to TMAX 0.5 nA/°C
INPUT IMPEDANCE
Differential Mode 60 || 2 MΩ || pF
Common-Mode 60 || 5 MΩ || pF
INPUT VOLTAGE RANGE
Common-Mode Range (4) ±11 ±12 V
CMR
G=1 DC to 60Hz 72 86 dB
G = 100 DC to 60Hz 100 125 dB
INPUT NOISE
Voltage (5) RS = 0Ω
10Hz 2 nV/√Hz
100Hz 1.2 nV/√Hz
1kHz 1 nV/√Hz
Current, 1kHz 2 pA/√Hz
OUTPUT NOISE
Voltage 1kHz 65 nV/√Hz
A Weighted, 20Hz-20kHz 20Hz-20kHz –100 dBu
DYNAMIC RESPONSE
–3dB Bandwidth: G = 1 Small Signal 6 MHz
G = 100 Small Signal 800 kHz
Full Power Bandwidth G=1
VOUT = ±10V, RL = 600Ω 240 kHz
Slew Rate G = 1 to 500 15 V/µs
THD + Noise G = 100, f = 1kHz 0.0009 %
Settling Time 0.1%
G=1 VO = 20V Step 1.7 µs
G = 100 1.5 µs
Settling Time 0.01%
G=1 VO = 20V Step 2 µs
G = 100 3.5 µs
Overload Recovery (6) 50% Overdrive 1 µs

NOTES: (1) Gains other than 1 and 100 can be set by adding an external resistor, RG between pins 2 and 15. Gain accuracy is a function of RG. (2) FS = Full Scale.
(3) Adjustable to zero. (4) VO = 0V, see Typical Curves for VCM vs VO. (5) VNOISE RTI = √V2N INPUT + (VN OUTPUT/Gain)2 + 4KTRG. See Typical Curves. (6) Time required
for output to return from saturation to linear operation following the removal of an input overdrive voltage.

INA103 2
SPECIFICATIONS (CONT)
All specifications at TA = +25°C, VS = ±15V and RL = 2kΩ, unless otherwise noted.

INA103KP, KU
PARAMETER CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Rated Voltage ±15 V
Voltage Range ±9 ±25 V
Quiescent Current 9 12.5 mA
TEMPERATURE RANGE
Specification 0 +70 °C
Operation –40 +85 °C
Storage –40 +100 °C
Thermal Resistance, θJA 100 °C/W

PIN CONFIGURATION ELECTROSTATIC

Top View
(1)
DIP or SOIC
DISCHARGE SENSITIVITY
+ Input 1 16 – Input
Any integrated circuit can be damaged by ESD. Burr-Brown
+ Gain Sense 2 15 – Gain Sense recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
+ Offset Null 3 14 G = 100
and installation procedures can cause damage.
– Offset Null 4 13 –RG ESD damage can range from subtle performance degrada-
– Gain Drive
tion to complete device failure. Precision integrated circuits
+ Gain Drive 5 12
may be more susceptible to damage because very small
+RG 6 11 Sense parametric changes could cause the device not to meet
published specifications.
Ref 7 10 Output

V– 8 9 V+
ABSOLUTE MAXIMUM RATINGS(1)
NOTE: (1) Pin 1 Marking—SOL-16 Package Power Supply Voltage ....................................................................... ±25V
Input Voltage Range, Continuous ....................................................... ±VS
Operating Temperature Range: ........................................ –40°C to +85°C
PACKAGE/ORDERING INFORMATION Storage Temperature Range: ........................................... –40°C to +85°C
Junction Temperature:
PACKAGE P, U Package .............................................................................. +125°C
DRAWING TEMPERATURE Lead Temperature (soldering, 10s) ............................................... +300°C
PRODUCT PACKAGE NUMBER(1) RANGE Output Short Circuit to Common ............................................. Continuous

INA103KP Plastic DIP 180 0°C to +70°C NOTE: (1) Stresses above these ratings may cause permanent damage.
INA103KU SOL-16 211 0°C to +70°C

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

3 INA103
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.

INPUT VOLTAGE RANGE vs SUPPLY OUTPUT SWING vs SUPPLY

±25 ±25
Input Voltage Range (V)

±20 ±20

Output Voltage (V)

±15 ±15

±10 ±10

±5 ±5
±5 ±10 ±15 ±20 ±25 ±5 ±10 ±15 ±20 ±25
Power Supply Voltage (V) Power Supply Voltage (V)

MAX COMMON-MODE VOLTAGE

vs OUTPUT VOLTAGE OUTPUT SWING vs LOAD RESISTANCE
22
±16
Common-Mode Voltage (V)

16.5 ±12
V S = ±25V
Output Voltage (V)

11 ±8
V S = ±15V

5.5 ±4

±0
0 5.5 11 16.5 22 0 200 400 600 800 1k
Output Voltage (V) Load Resistance (Ω )

OFFSET VOLTAGE vs TIME FROM POWER UP

(G = 100) INPUT BIAS CURRENT vs SUPPLY
20 2.60

2.55
Input Bias Current (µA)
Change In VOSI (µV)

10
2.50

2.45
0
2.40

2.35
–10
2.30

–20 2.25
0 1 2 3 4 5 9 10 15 20 25
Time (min) Power Supply Voltage (±V)

INA103 4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.

SMALL SIGNAL TRANSIENT RESPONSE

INPUT BIAS CURRENT vs TEMPERATURE (G = 1)
6

5
Input Bias Current (µA)

Output Voltage (V)

4

1
–55 0 50 100 125 Time (µs)
Temperature (°C)

SMALL SIGNAL TRANSIENT RESPONSE LARGE SIGNAL TRANSIENT RESPONSE

(G = 100) (G = 1)
Output Voltage (V)

Output Voltage (V)

Time (µs) Time (µs)

LARGE SIGNAL TRANSIENT RESPONSE SETTLING TIME vs GAIN

(G = 100) (0.1%, 20V STEP)
10

8
Settling Time (µs)
Output Voltage (V)

0
Time (µs) 1 10 100 1000
Gain

5 INA103
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.

SETTLING TIME vs GAIN

(0.01%, 20V STEP) SMALL-SIGNAL FREQUENCY RESPONSE
10 70
60
G = 1000
50
8
40
G = 100
Settling Time (µs)

30

Gain (dB)
6 20
G = 10
10
4 0
G=1
–10
–20
2
–30
–40
0 –50
1 10 100 1000 10 100 1k 10k 100k 1M 10M
Gain Frequency (Hz)

NOISE VOLTAGE (RTI) vs FREQUENCY CMR vs FREQUENCY

1k 140
Common-Mode Rejection (dB)

120 G=
100
0
Noise (RTI) (nV/ √ Hz)

100 G=
100 G=1 500
80 G=
100
60 G=
10
10 G = 10
40 G=
1
G = 100 G = 500 G = 1000 20

1 0
10 100 1k 10k 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)

V+ POWER SUPPLY REJECTION

THD + N vs FREQUENCY vs FREQUENCY
1 140
VOUT = +18dBu G = 100 G = 1000
120 G = 10
Power Supply Rejection (dB)

0.1 G=1
100
THD + N (%)

80
G = 1000
0.010
60
G=1
0.001 40
G = 100
G = 10 20

0.0001 0
10 100 1k 10k 20k 1 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)

INA103 6
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.

V– POWER SUPPLY REJECTION

vs FREQUENCY THD + N vs LEVEL
140 1
G = 100, 1000
f = 1kHz
120
Power Supply Rejection (dB)

G = 10
100 0.1
G=1

THD + N (%)
80

60
0.010
40 G=1

20
0.001
0 0.0005
1 10 100 1k 10k 100k 1M –60 –45 –30 –15 0 15
Frequency (Hz) Output Amplitude (dBu)

THD + N vs LOAD CCIF IMD vs AMPLITUDE

0.1 5
G=1
V OUT = 20Vp-p 1
f = 1kHz
0.01 G = 1000
THD + N (%)

CCIF IMD (%)

0.1

G = 100
0.010
0.001 G=1

0.001 G = 10

0.0001 0.0001
200 400 600 800 1k –60 –50 –40 –30 –20 –10 0 10 20
RLOAD (Ω ) Output Amplitude (dBu)

CCIF IMD vs FREQUENCY SMPTE IMD vs AMPLITUDE

5 5

1 1
SMPTE IMD (%)

G = 1000
CCIF IMD (%)

0.1
0.1
G = 100
G = 1000
0.010
G=1
0.010
G = 100
0.001
G = 10
G=1 0.001 G = 10
0.0001 0.0005
2k 10k 20k –60 –50 –40 –30 –20 –10 0 10 20
Frequency (Hz) Output Amplitude (dBu)

7 INA103
 TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V unless, otherwise noted.

SMPTE IMD vs FREQUENCY CURRENT NOISE SPECTRAL DENSITY

5 100

Current Noise Density (pA/ Hz)

1
SMPTE IMD (%)

0.1
G = 1000
10

0.010 G = 100

G=1

0.001 G = 10
0.0005 1
2k 10k 20k 1 10 100 1k 10k
Frequency (Hz) Frequency (Hz)

APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for operation.
Power supplies should be bypassed with 1µF tantalum
capacitors near the device pins. The output Sense (pin 11)
and output Reference (pin 7) should be low impedance
connections. Resistance of a few ohms in series with these
connections will degrade the common-mode rejection of the
amplifier.
To avoid oscillations, make short, direct connection to the
gain set resistor and gain sense connections. Avoid running
output signals near these sensitive input nodes.
INPUT CONSIDERATIONS
Certain source impedances can cause the INA103 to oscil-
late. This depends on circuit layout and source or cable
characteristics connected to the input. An input network
consisting of a small inductor and resistor (Figure 2) can
greatly reduce the tendancy to oscillate. This is especially
useful if various input sources are connected to the INA103.
Although not shown in other figures, this network can be
used, if needed, with all applications shown.
GAIN SELECTION
Gains of 1 or 100V/V can be set without external resistors.
For G = 1V/V (unity gain) leave pin 14 open (no connec-
tion)—see Figure 4. For G = 100V/V, connect pin 14 to pin
6—see Figure 5.
Gain can also be accurately set with a single external resistor
as shown in Figure 1. The two internal feedback resistors are
laser-trimmed to 3kΩ within approximately ±0.1%. The
temperature coefficient of these resistors is approximately
50ppm/˚C. Gain using an external RG resistor is—
6kΩ
G=1+
RG

INA103 8
 V+
1µF Tantalum
+ 50Ω

9
16 16
1.2µH
15

13
– 11 VO = G • VIN
10 11
V IN RG 14 INA103 INA103
+ 7 VOUT
6 7
RL
2
1.2µH
1
8 1
+

GAIN GAIN (dB) RG (Ω) 50Ω

1 0 Note 1
V– 3.16 10 2774
10 20 667
NOTES: (1) No RG required for G = 1. 31.6 30 196 FIGURE 2. Input Stabilization Network.
See gain-set connections in Figure 4. 100 40 60.6(2)
(2) RG for G = 100 is internal. See 316 50 19
gain-set connection in Figure 5. 1000 60 6
Offset voltage can be trimmed with the optional circuit
shown in Figure 3. This offset trim circuit primarily adjusts
FIGURE 1. Basic Circuit Configuration.
the output stage offset, but also has a small effect on input
stage offset. For a 1mV adjustment of the output voltage, the
Accuracy and TCR of the external RG will also contribute to input stage offset is adjusted approximately 1µV. Use this
gain error and temperature drift. These effects can be di- adjustment to null the INA103’s offset voltage with zero
rectly inferred from the gain equation. differential input voltage. Do not use this adjustment to null
Connections available on A1 and A2 allow external resistors offset produced by a sensor, or offset produced by subse-
to be substituted for the internal 3kΩ feedback resistors. A quent stages, since this will increase temperature drift.
precision resistor network can be used for very accurate and To offset the output voltage without affecting drift, use the
stable gains. To preserve the low noise of the INA103, the circuit shown in Figure 4. The voltage applied to pin 7 is
value of external feedback resistors should be kept low. summed at the output. The op amp connected as a buffer
Increasing the feedback resistors to 20kΩ would increase provides a low impedance at pin 7 to assure good common-
noise of the INA103 to approximately 1.5nV/√Hz. Due to mode rejection.
the current-feedback input circuitry, bandwidth would also
Figure 5 shows a method to trim offset voltage in AC-
be reduced.
coupled applications. A nearly constant and equal input bias
current of approximately 2.5µA flows into both input termi-
NOISE PERFORMANCE nals. A variable input trim voltage is created by adjusting the
The INA103 provides very low noise with low source balance of the two input bias return resistances through
impedance. Its 1nV/√Hz voltage noise delivers near theo- which the input bias currents must flow.
retical noise performance with a source impedance of 200Ω.
Relatively high input stage current is used to achieve this
low noise. This results in relatively high input bias current V–
and input current noise. As a result, the INA103 may not
provide best noise performance with source impedances
10kΩ
greater than 10kΩ. For source impedance greater than 10kΩ, 3
6kΩ
G = 1 + —–
16 RG
consider the INA114 (excellent for precise DC applica-
tions), or the INA111 FET-input IA for high speed applica- 15
4
tions. 13
11 10
∆V IN RG 14 INA103 VOUT
OFFSET ADJUSTMENT 7
6
Offset voltage of the INA103 has two components: input 2
stage offset voltage is produced by A1 and A2; and, output
stage offset is produced by A3. Both input and output stage 1 Offset Adjust
Range = ±250mV. RTI
offset are laser trimmed and may not need adjustment in
many applications.
FIGURE 3. Offset Adjustment Circuit.
®

9 INA103
Figure 6 shows an active control loop that adjusts the output OUTPUT SENSE
offset voltage to zero. A2, R, and C form an integrator that An output sense terminal allows greater gain accuracy in
produces an offsetting voltage applied to one input of the driving the load. By connecting the sense connection at the
INA103. This produces a –6dB/octave low frequency roll- load, I•R voltage loss to the load is included inside the
off like the capacitor input coupling in Figure 5. feedback loop. Current drive can be increased by connect-
ing a current booster inside the feedback loop as shown in
COMMON-MODE INPUT RANGE Figure 11.
For proper operation, the combined differential input signal
and common-mode input voltage must not cause the input
amplifiers to exceed their output swing limits. The linear
input range is shown in the typical performance curve
“Maximum Common-Mode Voltage vs Output Voltage.”
For a given total gain, the input common-mode range can be
increased by reducing the input stage gain and increasing the
output stage gain with the circuit shown in Figure 7.

IB– ≈ IB+ ≈ 2.5µA

Gain = 100V/V
16 (40dB)
Gain = 1V/V 16
15 (0dB)
–In IB– 15
13
VOUT 11
11 13
INA103 10
∆ VIN 14 V+
INA103 10
7 14
6 100µA(1) VOUT
6
2 7
OPA27 2
– IB+
1 150Ω
+ 1
10kΩ
150Ω +In
Offset Adjustment (1) (1)
Range = ±15mV
50kΩ 50kΩ NOTE: (1) 50k Ω R, 100kΩ pot is
max recommended value. Use
(1) smaller values in this ratio if possible.
100µA(1) 100kΩ

NOTE: (1) 1/2 REF200 V–

FIGURE 4. Output Offsetting. FIGURE 5. Input Offset Adjustment for AC-Coupled Inputs.

Gain = 100V/V
(40dB)
16
–In 15
f–3dB = Gain
13 11
12π RC
INA103 10
14 VOUT

6
7 R
2 100kΩ
C
+In 1 1µF

(1)
100kΩ 100kΩ (1)
10kΩ –
A2
+
2kΩ 1/2 OPA1013

NOTE: (1) 100kΩ is max recommended

value. Use smaller value if possible.

FIGURE 6. Automatic DC Restoration.

®

INA103 10
 RF

16
R1
15
16
13 R2
11 15
INA103 10 12
∆ VIN 14 VOUT
13
7
6 11 10
∆V IN RG 14 INA103
2 R3 7 VOUT
6
1 5
2
2RF
1 G = 1+
RG
OUTPUT STAGE R1 and R3 R2
Output Stage Gain =
GAIN (kΩ) (Ω) RF
(R2 || 12k) + R1 + R3 2 1k 2.4k
(R2 || 12k) 5 1.2k 632Ω RF > 10kΩ can increase noise and reduce bandwidth—see text.
10 1.2k 273Ω NOTE: AD625 equivalent pinout.

FIGURE 7. Gain Adjustment of Output Stage. FIGURE 8. Use of External Resistors for Gain Set.

(a) AD625 G = 1, VIN = ±15V, RL = 600Ω (b) INA103 G = 1, VIN = ±15V, RL = 600Ω

A common problem with many IC op amps and instrumentation amplifiers is shown in (a). Here, the amplifier’s input is driven beyond its linear common-mode
range, forcing the output of the amplifier into the supply rails. The output then “folds back”, i.e., a more positive input voltage now causes the output of the amplifier
to go negative. The INA103 has protection circuitry to prevent fold-back, and as shown in (b), limits cleanly.

FIGURE 9. INA103 Overload Condition Performance.

Gain = 1V/V
16 (0dB) V+

10Ω
15 16

13 15 MJ15011
11
INA103 10 13 11
∆ VIN 14 100Ω
7 INA103 10
∆V IN RG 14 VOUT
6
(To headphone
6 7
2 20Ω or speaker)
CMR
2 MJ15012
1 Trim
1 Buffer inside feedback loop
Introduces
approximately V–
+0.2% Gain Error.

FIGURE 10. Optional Circuit for Externally Trimming CMR. FIGURE 11. Increasing Output Circuit Drive.
®

11 INA103
 47µF/63V
16
+
+48V 15
6.8kΩ 2.2kΩ
20dB 10Ω
1 13
Phantom Pad
cm 3 11 10
Power 14 INA103 V OUT
2 240Ω Gain 1kΩ
Adjust 7
6.8kΩ 47kΩ 6
100kΩ
2 1µF
47µF/63V
1
+
–
2.2kΩ
20dB +
Pad OPA627

240Ω
Output offset voltage
control loop.

FIGURE 12. Microphone Preamplifier with Provision for Phantom Power Microphones.

16

15
12 10kΩ
10kΩ
13
11
INA103 10
∆V IN 14 VOUT
7
6
10kΩ
10kΩ 5
2

100Ω –
+

OPA602 Shield driver minimizes degradation of CMR due

to distributed capacitance on the input lines.

FIGURE 13. Instrumentation Amplifier with Shield Driver.

–
16
+
OPA627 15

13
11
14 INA103 10 V OUT = 100 ∆V IN

6 7
∆V IN
2

– Gain = 100V/V
(40dB)
+
OPA627

FIGURE 14. Gain-of-100 INA103 with FET Buffers.

INA103 12
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