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3 CSE - EC8395 CE Unit 3 PDF
3 CSE - EC8395 CE Unit 3 PDF
2
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3
EC8395 - COMMUNICATION ENGINEERING
Date: 29.08.2020
4
1. CONTENTS
Page
S.No INDEX
No.
1 Contents 5
2 Course Objectives 6
3 Pre-Requisites 7
4 Syllabus 8
5 Course outcomes 9
6 CO- PO/PSO Mapping 10
7 Lecture Plan 11
8 Activity based learning 12
9 Lecture Notes 13-52
10 Assignments 53
12 Part B Qs 64-65
16 Assessment Schedule 72
5
2.COURSE OBJECTIVES
COURSE OBJECTIVES
6
3. PRE-REQUISITES
EC8395
COMMUNICATION ENGINEERING
SEMESTER III
BE8255
MA8251 BASIC
ENGINEERING ELECTRICAL,ELECTRONICS
SEMESTER II
MATHEMATICS -II AND MEASUREMENT
ENGINEERING
MA8151
ENGINEERING MATHEMATICS
SEMESTER I
7
4. SYLLABUS
Amplitude Modulation – AM, DSBSC, SSBSC, VSB – PSD, modulators and demodulators – Angle
modulation – PM and FM – PSD, modulators and demodulators – Super heterodyne receivers
Low pass sampling theorem – Quantization – PAM – Line coding – PCM, DPCM, DM, and ADPCM
And ADM, Channel Vocoder - Time Division Multiplexing, Frequency Division Multiplexing
Phase shift keying – BPSK, DPSK, QPSK – Principles of M-ary signaling M-ary PSK & QAM –
Comparison, ISI – Pulse shaping – Duo binary encoding – Cosine filters – Eye pattern, equalizers
TOTAL: 45 PERIODS
8
5.COURSE OUTCOME
9
6.COs & POs/PSO Mapping
C205.1 K2 2 - - - - - - - - - - - - 1 2
EC8395
C205.2 K2 2 - - - - - - - - 3 - - - 1 2
Commun C205.3 K3 3 - - - - - - - - - - - - 1 3
ication
Engineer
ing
C205.4 K3 3 - - - - - - - - - - - - 1 3
C205.5 K2 2 - - - - - - - - - - - - 1 2
C205.6 K2 2 - - - - 3 - - - 3 - 3 - 1 2
10
7.LECTURE PLAN
Phase shift
1 K3 PPT
keying
BPSK, DPSK,
2 K3 PPT
QPSK
Principles of
M-ary,
3 K3 PPT
signaling,
M-ary PSK
QAM
4 K3 PPT
Comparison
ISI CO3
5 K3 PPT
Pulse
shaping Duo
6 K3 PPT
binary
encoding
Cosine
7 K3 PPT
filters
Equalizers
9 K3 PPT
11
8. ACTIVITY BASED LEARNING
UNIT – 3
1. Entry & Exit Tickets Model
Entry & Exit tickets are short prompts it’s provide us with a quick student
diagnostic. These exercises can be collected on 3”x5” cards, small pieces of
paper, or online through a survey or course management system.
Entry tickets focus student attention on the day’s topic or ask students to recall
background knowledge relevant to the day’s lesson: e.g., “Based on the
readings for class today, what is your understanding of digital modulation?”
Exit tickets collect feedback on students’ understanding at the end of a class and
provide the students with an opportunity to reflect on what they have learned.
They can be helpful in prompting the student to begin to synthesize and
integrate the information gained during a class period. For example, a muddiest
point prompt: “What was the muddiest point in today’s class?” or “What
questions do you still have about today’s lecture?”.
2. Debate
12
9.LECTURE NOTES
DPSK
QPSK
Comparison
Eye pattern
Equalizers
3. INTRODUCTION TO DIGITAL COMMUNICATION
1.Digital modulation : Digital Modulation is defined as changing the amplitude of the carrier signal
with respect to the binary information or digital signal.
SOURCE CHANNEL
SOURCE MODULATOR
CODER CODER
CHANNEL
SOURCE CHANNEL
DESTINATION DEMODULATOR
DECODER DECODER
SOURCE:
Source gives the original information to the modulator circuit. It is a digital signal in digital modulation
process.
SOURCE CODER:
Source Coder compresses the data into minimum number of bits.the process helps in effective
utilization of bandwidth, it also minimizes the number of redundant bits.
CHANNEL CODER:
The channel Coder, does the coding for error correction. During the transmission of the signal, due to
the noise in the channel, the signal may get altered and hence to avoid this, the channel encoder adds
some redundant bits to the transmitted data. These are the error correcting bits.
MODULATOR:
The signal to be transmitted is modulated here by a carrier. The signal is also converted to analog from
the digital sequence, in order to make it travel through the channel or medium.
CHANNEL:
The channel or a medium, allows the analog signal to transmit from the transmitter end to the receiver
end.
DEMODULATOR:
This is the first step at the receiver end. The received signal is demodulated as well as
converted again from analog to digital. The signal gets reconstructed here.
CHANNEL DECODER:
The channel decoder, after detecting the sequence, does some error corrections. The distortions
which might occur during the transmission, are corrected by adding some redundant bits. This
addition of bits helps in the complete recovery of the original signal.
SOURCE DECODER:
The resultant signal is once again digitized by sampling and quantizing so that the pure digital
output is obtained without the loss of information. The source decoder recreates the source
output.
DESTINATION:
This is the output which is produced after the whole process. Example − The sound signal
received.
Important Terms in Digital Modulation :
BIT RATE (fb) :
Bit rate is the number of bits transmitted during one second between the transmitter and
receiver.
BAUD RATE:
Baud rate is the rate of change of signal on transmission medium after encoding and
modulation have occurred.
Bandwidth efficiency : Bandwidth efficiency is the ratio of the transmission bit rate to the
minimum bandwidth required for a particular modulation
• If the binary input is a logic 0 (negative voltage), diodes D1 and D2 are reverse biased and off,
while diodes D3 and D4 are forward biased and on (Figure 3 c).
• As a result, the carrier voltage is developed across transformer T2 180° out of phase with the
carrier voltage across T1.
• Consequently, the output signal is 180° out of phase with the reference oscillator.
• Following the working od BPSK modulator, the output BPSK can be illustrated as follows,
• Truth table, phasor diagram, and constellation diagram for a BPSK modulator.
• A constellation diagram, which is sometimes called a signal state-space diagram, is similar to a
phasor diagram except that the entire phasor is not drawn.
• In a constellation diagram, only the relative positions of the peaks of the phasors are shown.
Truth table, phasor diagram, and constellation diagram for a BPSK
modulator.
0 180°
1 0°
ts
• Figure 4. shows the output phase-versus-time relationship for a BPSK waveform. As the figure shows, a
logic 1 input produces an analog output signal with a 0° phase angle, and a logic 0 input produces an
analog output signal with a 180° phase angle.
• As the binary input shifts between a logic 1 and a logic 0 condition and vice versa, the phase of the BPSK
waveform shifts between 0° and 180°, respectively.
• For simplicity, only one cycle of the analog carrier is shown in each signaling element.
• It can also be seen that the time of one BPSK signaling element (ts) is equal to the time of one
information bit (tb), which indicates that the bit rate equals the baud.
Bandwidth considerations of BPSK
• A balanced modulator is a product modulator; the output signal is the product of the two input signals.
In a BPSK modulator, the carrier input signal is multiplied by the binary data.
• If 1 V is assigned to a logic 1 and -1 V is assigned to a logic 0, the input carrier (sinωct) is multiplied by
either a or 1.
• Consequently, the output signal is either +1 sinωct or - 1 sinωct; the first represents a signal that is in
phase with the reference oscillator, the latter a signal that is 180° out of phase with the reference
oscillator. Each time the input logic condition changes, the output phase changes.
• Consequently, for BPSK, the output rate of change (baud) is equal to the input rate of change (bps),
and the widest output bandwidth occurs when the input binary data are an alternating 1/0 sequence.
• The fundamental frequency ( fa) of an alternative 1/0 bit sequence is equal to one-half of the bit rate
( fb/2).
Mathematically, the output of a BPSK modulator is proportionalto
O/P of BPSK modulator = (sin2πfct) . (sin2πfat)
Since binary i/p’s are not fed to directly to BM ,they are level converted as electrical /voltage
signals and denoted as sine wave with frequency fa /cycle.
Upon , expansion
O/P of BPSK modulator/ BPSK output = ½ {cos2π(fc- fa) t - cos2π(fc + fa) t }
Figure 6.
An incoming information bit is XNOR ed with the preceding bit prior to entering the BPSK modulator
(balanced modulator). For the first data bit, there is no preceding bit with which to compare it.
Therefore, an initial reference bit is assumed.
Figure 7.shows the relationship between the input data, the XNOR output data, and the phase at the
output of the balancedmodulator.
Figure 7.
If the initial reference bit is assumed a logic 1, the output from the XNOR circuit is simply the
complement of that shown.
In Figure , the first data bit is XNOR ed with the reference bit. If they are the same, the XNOR output
is a logic 1; if they are different, the XNOR output is a logic0.
The balanced modulator operates the same as a conventional BPSK modulator , a logic 1 produces
sinωct at the output and a logic 0 produces - sinωct at the output.
DBPSK receiver
Figure 8. shows the block diagram and timing sequence for a DBPSK receiver.
Figure 8.
• The received signal is delayed by one bit time, then compared with the next signaling element in the
balanced modulator. If they are the same, a logic 1 ( voltage) is generated.
• If they are different, a logic 0 ( voltage)is generated.
• If the reference phase is incorrectly assumed, only the first demodulated bit is in error.
Figure 8.
Timing sequence of DBPSK
3.4 Quaternary Phase-Shift Keying
• Quaternary phase shift keying (QPSK), or quadrature PSK as it is sometimes called, is another form of
angle-modulated, constant-amplitude digital modulation.
• QPSK is an M-ary encoding scheme where N 2 and M 4 (hence, the name “quaternary” meaning “4”).
• Therefore, with QPSK, the binary input data are combined into groups of two bits, called dibits. In the
modulator, each dibit code generates one of the four possible output phases(45°, 135°,4 5 ° , &
135°).
QPSK transmitter:
• A block diagram of a QPSK modulator is shown in Figure 9.
• Two bits (a dibit) are clocked into the bit splitter. After both bits have been serially inputted, they are
simultaneously parallel outputted.
• One bit is directed to the I channel and the other to the Q channel.
• TheIbitmodulatesacarrierthatisinphasewiththereference oscillator (hence the name “I” for “in phase”
channel), and the Q bit modulates a carrier that is 90° out of phase or in quadrature with the reference
carrier (hence the name “Q” for “quadrature”channel).
• It can be seen that once a dibit has been split into the I and Q channels, the operation is the same as in
a BPSK modulator.
• Essentially, a QPSK modulator is two BPSK modulators combinedin parallel.
• Again, for a logic 1 “+1 V” and a logic 0 “-1 V” , two phases
arepossibleattheoutputoftheIbalancedmodulator(sinωct and - sinωct),andtwo phases are possible at the
output of the Q balanced modulator (cosωct and - cosωct).
• When the linear summer combines the two quadrature (90° out of phase) signals, there are four
possible resultant phasors given by these expressions:
( - sin ωct - cos ωct ), ( - sinωct +cos ωct ), (+sin ωct -cos ωct) , and (+ sin ωct +cos ωct).
Let us analyse the QPSK modulator circuit for Dibit input Q=0 & I=0
O/P of Linear Summer (QPSK output for “00”) = 1.414 { Sin(2 π fct - 135ₒ ) }, so the o/p
for binary inputs “10” ∑ o/p (i.e.) QPSK O/P (- Sin2πfct + Cos2πfct )
for binary inputs “11” ∑ o/p (i.e.) QPSK O/P (+ Sin2 π fct + Cos2πfct )
Thus I/p and and corresponding O/P phasors can be represented pictorially using Truth table,
Phasor Diagram and Constellation Diagram.
TRUTH TABLE-QPSK
Phasor Diagram and Constellation Diagram - QPSK
PHASOR DIAGRAM
CONSTELLATION DIAGRAM
• From Phasor and Constellation diagram, it can be seen that with QPSK each of the four possible output
phasors has exactly thesame amplitude.
• Therefore, the binary information must be encoded entirely in the phase of the output signal.
• This constant amplitude characteristic is the most important characteristic of PSK that distinguishes it
• from QAM,
• Also, from Phasor diagram, it can be seen that the angular separation between any two adjacent
phasors in QPSK is90°.
• Therefore, a QPSK signal can undergo almost a 45° or 45° shift in phase during transmission and still
retain the correct encoded information when demodulated at the receiver.
Output phase-versus-time relationship - QPSK modulator.
• With QPSK, because the input data are divided into two channels, the bit rate in either the I or the Q
channel is equal to one-half of the input data rate (fb/2).(Essentially, the bit splitter stretches the I and Q
bits to twice their input bit length.)
• Consequently, the highest fundamental frequency present at the data input to the I or the Q balanced
modulator is equal to one-fourth of the input data rate (one-half of fb/2 = fb/4). As a result, the output of
the I and Q balanced modulators requires a minimum double-sided Nyquist bandwidth equal to one-half of
the incoming bit rate (fN = twice fb/4= fb/2).
• From above figure 10. it is observed that one cycle of the fastest binary transition (a 1/0 sequence)
in the I or Q channel takes the same time as four input data bits.
• Consequently, the highest
fundamentalfrequencyattheinputandfastestrateofchangeattheoutputofthebalancedmodulators is
equal to one-fourth of the binary input bitrate.
• The output of the balanced modulators can be expressed mathematicallyas
O/P of I-Channel QPSK modulator = (sin2πfct) . (sin2πfat)
Upon expansion ,O/P of QPSK modulator/QPSK output = ½ {cos2π(fc- fa) t - cos2π(fc + fa) t }
fH= upper cutoff frequency of modulated signal ; fL = Lower cutoff frequency of modulated signal
WKT, Bandwidth = f H - fL , so BW of QPSK O/P= (fc + fa) - (fc- fa) = 2 fa , where fa = 1 fb 2
Here in QPSK the frequency of the signal in I-Channel is half of fb
since message is dibit (QI) in nature,so one bit period has got two bits in it, bit frequency(fb) is
halved.)
∴ fa[QPSK] = (½ ).Half of fb= (𝟏 fb = fb
𝟐
) 𝟐 𝟒
and Bandwidth
(BW QPSK) = 2 f = 2 fb = fb Hertz.
a
𝟒 𝟐
QPSK receiver
The block diagram of a QPSK receiver is shown in Figure 11.
• To illustrate the demodulation process, let the incoming QPSK signal be (-sinωct + cosωct) .
Mathematically, the demodulation process is as follows,
I-Channel Receiver
I/P to QPSK Detector = - Sin2πfct + Cos2πfct
In-Phase Carrier = Cos2πfct
O/P of I-Channel Mixer = (- Sin2πfct + Cos2πfct ) .(Cos2πfct)
= [+Cos22πfct] - [Cos2πfct . Sin2πfct ]
= (+½) + (+½) Cos4πfct ] - ( ½) sin2 π(fc +fc)t - ( ½) sin2π(fc - fc)t
sin0
filtered out by filtered out by LPF
LPF
sin0
Offset QPSK
Offset QPSK (OQPSK) is a modified form of QPSK where the bit waveforms on the I and Q channels
are offset or shifted in phase from each other by one- half of a bit time.
Below figure 12. shows a simplified block diagram,
Because changes in the I channel occur at the midpoints of the Q channel bits and vice versa, there
is never more than a single bit change in the dibit code and, therefore, there is never more than a
90° shift in the output phase.
In conventional QPSK, a change in the input dibit from 00 to 11 or 01 to 10 causes a
corresponding 180° shift in the output phase.
Therefore, an advantage of OQPSK is the limited phase shift that must be imparted during
modulation.
A disadvantage of OQPSK is that changes in the output phase occur at twice the data rate in either
the I or Q channels.
Consequently, with OQPSK the baud and minimum bandwidth are twice that of conventional QPSK for
a given transmission bit rate.
OQPSK is sometimes called OKQPSK (offset-keyed QPSK).
3.5 8-PSK
• With 8-PSK, three bits are encoded, forming tribitsand producing eight different output phases.
• With8-PSK,n =3,M=8,andthereareeightpossibleoutputphases.
• Toencodeeight different phases, the incoming bits are encoded in groups of three, called
tribits(23 = 8).
8-PSK transmitter
A block diagram of an 8-PSK modulator is shown in Figure . 13.
• The incoming serial bit stream enters the bit splitter, where it is converted to a parallel,
three-channel output (the I or in-phase channel, the Q or in-quadrature channel, and the C
or control channel). Consequently, the bit rate in each of the three channels is fb /3.
• The bits in the I and C channels enter the I channel 2-to-4-level converter, and the bits in
the Q and C channels enter the Q channel 2-to-4-level converter.
• Essentially, the 2-to-4-level converters are parallel-input digital-to-analog converters
(DACs). With two input bits, four output voltages are possible.
• The algorithm for the DACs is quite simple. The I or Q bit determines the polarity of the
output analog signal (logic 1 V and logic 0 V), whereas the C or ∼ 𝐶 bit determines
themagnitude (logic 1= 1.307 V and logic 0 = 0.541 V).
• Consequently, with two magnitudes and two polarities, four different output conditions
arepossible.
• Figure 13. shows the truth table and corresponding output conditions for the 2-to-4-level
converters.
• From Figure 14., it can be seen that the angular separation between any two adjacent phasors is
45°, half what it is with QPSK.
• Therefore, an 8-PSK signal can undergo almost a 22.5° phase shift during transmission and still retain its
integrity.
• Also, each phasor is of equal magnitude; the tribit condition (actual information) is again contained only in
the phase of the signal.
• It should also be noted that in the Constellation Diagram tribit code between any two adjacent
phases changes by only one bit. This type of code is called the Gray code or, sometimes, the maximum
distance code.
Bandwidth considerations of 8-PSK
• With 8-PSK, because the data are divided into three channels, the bit rate in the I, Q, or C
channel is equal to one-third of the binary input data rate (fb/3).
• (The bit splitter stretches the I, Q, and C bits to three times their input bit length.)
• Because the I, Q, and C bits are outputted simultaneously and in parallel, the 2-to-4-level
converters also see a change in their inputs (and consequently their outputs) at a rate equal to
fb/3.
O/P of I-Channel 8- PSK modulator = (sin2πfct) . (sin2πfat) ;
Since binary i/p’s are not fed to directly to BM ,they are level converted as electrical /voltage
signals and denoted as sine wave with frequency fa /cycle.
Upon , expansion
O/P of 8-PSK modulator/ 8-PSK output = [ ½ {cos 2π(fc- fa) t - cos 2π(fc + fa) t } ]
8-PSK Receiver:
• Figure 15. shows a block diagram of an 8-PSK receiver. The power splitter directs the input 8-
PSK signal to the I and Q product detectors and the carrier recoverycircuit.
• The carrier recovery circuit reproduces the original reference oscillator signal.
• The incoming 8-PSK signal is mixed with the recovered carrier in the I product detector and
with a quadrature carrier in the Q product detector.
• The outputs of the product detectors are 4-level PAM signals that are fed to the 4-to-2-level
analog-to-digital converters (ADCs).
8-PSK receiver-Block connection
The outputs from the I channel 4-to-2-level converter are the I and C bits, whereas the outputs from
the Q channel 4-to-2-level converter are the Q and C bits.
•The parallel-to-serial logic circuit converts the I/C and Q/C bit pairs to serial I, Q, and C output data
streams.
3.6 QUADRATURE AMPLITUDE MODULATION (QAM)
Quadrature-amplitude modulation (QAM) is a form of digital modulation similar to PSK except the digital
information is contained in both the amplitude and the phase of the transmitted carrier. With QAM,
amplitude and phase-shift keying are combined in such a way that the positions of the signaling elements
on the constellation diagrams are optimized to achieve the greatest distance between elements, thus
reducing the likelihood of one element being misinterpreted as another element. Obviously, this reduces
the likelihood of errors occurring.
8-QAM
8-QAM is an M-ary encoding technique where M 8. Unlike 8-PSK, the output signal from an 8-QAM
modulator is not a constant-amplitude signal.
8-QAM transmitter.
Below Figure 16. shows the block diagram of an 8-QAM transmitter. As you can see, the only difference
between the 8-QAM transmitter and the 8- PSK transmitter is the omission of the inverter between the C
channel and the Q product modulator. As with 8-PSK, the incoming data are divided into groups of three
bits (tribits): the I, Q, and C bit streams, each with a bit rate equal to one-third of the incoming data rate.
Again, the I and Q bits determine the polarity of the PAM signal at the output of the 2-to-4-level
converters, and the C channel determines the magnitude. Because the C bit is fed uninverted to both the
I and the Q channel 2-to-4-level converters, the magnitudes of the I and Q PAM signals are always equal.
Their polarities depend on the logic condition of the I and Q bits and, therefore, may be different.
∴ Output of summer {8-QAM O/P for tribit message 000} = 0.765 [ sin ωct - 135°]
For the remaining tribit codes (001, 010, 011, 100, 101, 110, and 111), the procedure is the
same . The 8 phasors for all tribit codes are represented in the following Truth table, Figure 17
(a)
The Phasor digram and constellation diagram of 8-QAM transmitter is given in the figure 17 .(b)
and (c) respectively.
8-QAM modulator:; (b) phasor diagram; (c) constellation diagram
• An 8-QAM receiver is almost identical to the 8-PSK receiver ,Refer Figure 15.
• The differences are the PAM levels at the output of the product detectors and the binary
signals at the output of the analog-to-digital converters.
• Because there are two transmit amplitudes possible with 8-QAM that are different from those
achievable with 8-PSK, the four demodulated PAM levels in 8-QAM are different from those in
8-PSK.
• Therefore, the conversion factor for the analog-to-digital converters must also be different.
• Also, with 8-QAM the binary output signals from the I channel analog- to-digital converter are
the I and C bits, and the binary output signals from the Q channel analog-to-digital converter
are the Q and C bits.
BANDWIDTH OF 8-QAM
Baud fb 𝑓𝑏 fb 𝑓𝑏
2 𝑁
• The duo binary encoder converts the 2 level binary sequence a k into 3 level output namely , -2, 0 ,+2
• This transformation is achieved by the equation
ck = a k+ a k-1, which can be implemented using the duo-binary encoder circuit, shown previously
in Figure. 19
+
ck ∑ 𝑎ෝ
k
-
delay (tb)
In order to recover the bits in its original order the operation done at the modulator is reversed using the
following detector rule as follows.
𝒂ෝ k= ck - 𝒂 ෝ
Example of duo-binary coding and decoding k-1
Consider the binary sequence bk = 001011
finding the coded sequence ck and decoded sequence 𝑎ෝ k assuming the first bit as reference bit
,
Reference bit
bk 0 0 1 0 1 1 0
ak -1 -1 1 -1 1 1 -1
Ck 0
-2 0 0 0 2
𝑎ෝ + 𝑎ෝ +
ෝ 𝒂k k- -1 k-
-1 +1 +1 -1
=-
11 =-1
11
𝒃k 0 1 0 1 1 0
Duo-binary encoder with precoding
Drawbacks of duo-binaryencoding:
• Error Propagation occurs (i.e.) if one bit in the received information is errored ,error propagates to the
other bits also known as error propagation, resulting in multi-bit errors.
• Error propagation can be solved by using pre-coding .
Figure 21. Duo-binary encoder with precoding
• In precoding the binary sequence {bk} is converted into another binary sequence {dk} according to
dk = bk⊕ dk-1
the coded sequence ck produced with precoding consist of three levels as given by
c k= a k+ a k-1
ck = 0 if data symbol is 1
±2 if data symbol is 0
Detection - duo binary precoder Figure 22.
• Decoder circuit is a simple rectifier followed by decision device (Comparator) as shown in Figure. 22
• the decision device finds detects the signal based on the following detection rule
if ck < 1 ; symbol bk = 1
ck > 1 ; symbol bk =0
Binary Sequence { bk } 0 0 1 0 1 1 0
Precoded sequence {dk} 1 1 1 0 0 1 0 0
Two- level sequence {ak} +1 +1 +1 -1 -1 +1 -1 -1
Duo-binary coder o/p {ck} +2 +2 0 -2 0 0 -2
Binary sequence obtained
By applying decision rule 0 0 1 0 1 1 0
LPF
The received pulse stream is fed to the vertical input of the oscilloscope, and the symbol clock is fed to the
external trigger input, while the sweep rate is set approximately equal to the symbol rate.
Figure 20. shows an eye pattern generated by a symmetrical waveform for ternary signals in which the
individual pulses at the input to the regenerator have a cosine-squared shape.
JITTER :
• From Eye Diagram itcanalsobeseenthattheoverlappingsignalpatterndoesnotcrossthehorizontal zero line at
exact integer multiples of the symbol clock. This is an impairment known as data transition jitter.
• This jitter has an effect on the symbol timing (clock) recovery circuit
and,ifexcessive,maysignificantlydegradetheperformanceofcascadedregenerativesections.
EQUALIZERS
• Equalization is commonly used strategy for resisting Inter Symbol Interference.
• An Equalizer within a receiver compensates for the average range of expected channel
amplitude and delay characteristics.
• equalizers must be adaptive as the channel is generally unknown and time varying.
• ‰ISI has been recognized as the major obstacle to high speed data transmission over mobile
radio channels.
• Equalizers are used to overcome the negative effects of the channel. In general, equalization
is partitioned into two broad categories;
1. Maximum likelihood sequence estimation (MLSE) which entails making
measurement of channel impulse response and then providing a means for adjusting the
receiver to the transmission environment. (Example: Viterbi equalization)
Preset equalizers assume that the channel is time invariant and try to find H(f) and design
equalizer depending on H(f).
The examples of these Adaptive equalizers are
zero forcing equalizer,
minimum mean square error equalizer, and
desicion feedback equalizer.
Adaptive equalizers assume channel is time varying channel and try to design equalizer filter
whose filter coefficients are varying in time according to the change of channel, and try to
eliminate ISI and additive noise at each time.
The implicit assumption of adaptive equalizers is that the channel is varying slowly.
Figure 26. Block Diagram of
Adaptive Equalizer
Training mode :
Initially, a known, fixed length training sequence is sent by the transmitter so that the receiver’s
equalizer may average to a proper setting. The training sequence is a pseudo random signal or a
fixed, prescribed bit pattern. Immediately following the training sequence, the user data is sent.
Tracking mode :
When the data of the users are received, the adaptive algorithm of the equalizer tracks the changing
channel. As a result of this, the adaptive equalizer continuously changes the filter characteristics over
time. Equalizers are widely used in TDMA Systems.
Quiz link:
https://quizizz.com/admin/quiz/5b40c73c42acae0019aa2a56/comm002-midterm
Video link:
Video link illustrating the basics of digital modulation techniques
https://youtu.be/C8eebS5MhuU
https://youtu.be/tZiKRfH2yZ4
https://www.slideshare.net/RemyaRoseS/unit-3-ppt-238320499
Equalization Techniques
https://www.slideshare.net/OladapoKayode1/adaptive-equalization-109433468?from_action=save
E-book link:
1.“Principles of Communication Systems” H Taub, D L Schilling, G Saha, 3/e, TMH 2007. For Unit 3
https://archive.org/details/PrinciplesOfCommunicationSystemsByTaubAndSchilling/page/n9/mode/2up
10. ASSIGNMENTS
UNIT 3
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11. UNIT- III PART A
S. PART- A K CO
NO Level Level
1 State the necessity of equalizers and types of K1 C205.3
equalizer.
ISI
Intersymbol interference (ISI) is a form of distortion of a
signal in which one symbol interferes with subsequent
symbols.
This is an unwanted phenomenon as the previous symbols
have similar effect as noise, thus making the communication
less reliable.
ISI is usually caused by multipath propagation or the
inherent linear or non-linear frequency response of a
communication channel causing successive symbols to "blur"
together.
Eye pattern
P (t) = ቊ 𝟏 𝒕= 𝟎
𝟎 𝒕 = ±𝑻𝒃, ±𝟐𝑻𝒃 … ..
TRUTH TABLE
0 180°
CO N 1 DIAGRAM
STELLATION 0°
17 Define bit rate and baud rate. Specify their units K1 C205.3
S.NO QUESTIONS K CO
Level Level
1 Explain PSK system with the help of transmitter and receiver, and K2 C205.3
state its advantages and disadvantages over other system.
2 Derive the expression for spectrum of PSK system and hence K3 C205.3
calculate its bandwidth
9 Draw the block diagram of an adaptive equalizer and explain its K3 C205.3
two different modes of operation.
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12. PART- B (UNIT- 3)
S.NO QUESTIONS K CO
level Level
12 Discuss the principle of operation BPSK transmitter and BPSK K3 C205.3
receiver detail
13 Explain in detail the working of 8-PSK. Draw the phasor diagram, K2 C205.3
constellation diagram and truth table for the same
14 Explain ISI in detail and explain with any two methods to control K2 C205.3
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13.Supportive online Certification courses (NPTEL, Swayam,
Coursera, Udemy, etc.,)
UNIT 3
NPTEL
Modern Digital Communication techniques
https://nptel.ac.in/courses/117/105/117105144/
UDEMY
Digital Communication
https://www.udemy.com/course/digital_communications/
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14.Real time application in day to day life and to industry
https://www.youtube.com/watch?v=1JZG9x_VOwA
https://www.youtube.com/watch?v=OpkatIqkLO8
15.Contents beyond the Syllabus
( COE related Value added courses) – UNIT 3
5G Network:
All 5G wireless devices in a cell are connected to the Internet and telephone
network by radio waves through a local antenna in the cell.
The main advantage of the new networks is that they will have greater bandwidth,
giving higher download speeds, eventually up to 10 gigabits per second (Gbit/s).
Due to the increased bandwidth, it is expected that the new networks will not just
serve cellphones like existing cellular networks, but also be used as general
internet service providers for laptops and desktop computers, competing with
existing ISPs such as cable internet, and also will make possible new applications in
internet of things (IoT) and machine to machine areas.
Current 4G cellphones will not be able to use the new networks, which will require
new 5G enabled wireless devices.
The increased speed is achieved partly by using higher-frequency radio waves than
current cellular networks. However, higher-frequency radio waves have a shorter
range than the frequencies used by previous cell phone towers, requiring smaller
cells. So to ensure wide service, 5G networks operate on up to three frequency
bands, low, medium, and high.
A 5G network will be composed of networks of up to 3 different types of cells, each requiring
different antennas, each type giving a different tradeoff of download speed vs. distance and
service area.
5G cellphones and wireless devices will connect to the network through the highest speed
antenna within range at their location
Low-band 5G uses a similar frequency range to current 4G cellphones, 600-700 MHz, giving
download speeds a little higher than 4G: 30-250 megabits per second (Mbit/s). Low- band
cell towers will have a similar range and coverage area to current 4G towers.
Mid-band 5G uses microwaves of 2.5-3.7 GHz, currently allowing speeds of 100-900 Mbit/s,
with each cell tower providing service up to several miles in radius. This level of service is
the most widely deployed, and should be available in most metropolitan areas in 2020. Some
countries are not implementing low-band, making this the minimum service level.
High-band 5G currently uses frequencies of 25-39 GHz, near the bottom of the millimeter
wave band, altfuture. It often achieves download speeds of a gigabit per second (Gbit/s),
comparable to cable internet. However, millimeter waves (mmWave or mmW) have a more
limited range, requiring many small cells. They have trouble passing through some types of
walls and windows.
Due to their higher costs, current plans are to deploy these cells only in dense urban
environments and areas where crowds of people congregate such as sports stadiums and
convention centers. The above speeds are those achieved in actual tests in 2020, and speeds
are expected to increase during rollout.
Massive MIMO (multiple input and multiple output) anennas increases sector throughput
and capacity density using large numbers of antennas and Multi-user (MU-MIMO). Each
antenna is individually-controlled and may embed radio transceiver components. Nokia
claimed a five-fold increase in the capacity increase for a 64-Tx/64-Rx antenna system. The
term "massive MIMO" was coined by Nokia Bell Labs researcher Dr. Thomas L. Marzetta in
2010, and has been launched in 4G networks, such as Softbank in Japan.
Edge computing is delivered by computing servers closer to the ultimate user. It reduces
latency and data traffic congestion.
Small cells are low-powered cellular radio access nodes that operate in licensed and
unlicensed spectrum that have a range of 10 meters to a few kilometers. Small cells are
critical to 5G networks, as 5G's radio waves can't travel long distances, because of 5G's
higher frequencies
Application areas
The ITU-R has defined three main application areas for the enhanced capabilities of 5G.
They are Enhanced Mobile Broadband (eMBB), Ultra Reliable Low Latency Communications
(URLLC), and Massive Machine Type Communications (mMTC).Only eMBB is deployed in
2020; URLLC and mMTC are several years away in most locations.
Drones, transmitting via 4G or 5G, will aid in disaster recovery efforts, providing real-time
data for emergency responders.Most cars will have a 4G or 5G cellular connection for many
services.
Autonomous cars do not require 5G, as they have to be able to operate where they do not
have a network connection.While remote surgeries have been performed over 5G, most
remote surgery will be performed in facilities with a fiber connection, usually faster and more
reliable than any wireless connection.
16.Assessment Schedule
( Proposed Date & Actual Date)
55
17. PRESCRIBED TEXT BOOKS & REFERENCE BOOKS
TEXT BOOKS
REFERENCE BOOKS
56
18. MINI PROJECT SUGGESTIONS
UNIT 3
57
Thank you
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