MAPCS Hardware Configuration

MAPCS
Hardware Configuration
User Manual
MAPCS Control System Table of Contents
Table of Contents
1 Introduction................................................................................................................ 8
1.1 MAPCS Control System Overview ..................................................................... 8
1.2 MAPCS Control Platform .................................................................................... 8
1.3 FOUNDATION Fieldbus as the basis of MAPCS ............................................... 9
1.4 Hardware Components ..................................................................................... 10
1.4.1 MPU........................................................................................................... 11
1.4.2 I/O Modules ............................................................................................... 11
1.4.3 Linking Device ........................................................................................... 12
1.4.4 Modbus Ethernet Programmable Gateway ............................................... 12
1.5 Fieldbus connectivity ........................................................................................ 12
1.5.1 FOUNDATION Fieldbus HSE connectivity ................................................ 12
1.5.2 MAPCS FOUNDATION Fieldbus H1 Subsystem ...................................... 12
1.5.3 MAPCS HART Connectivity ...................................................................... 13
1.5.4 Modbus Connectivity ................................................................................. 13
1.6 MAPCS Main Features ..................................................................................... 14
1.6.1 Standards Compliance .............................................................................. 14
1.6.2 Redundancy .............................................................................................. 14
1.6.3 Failsafe and automatic cold start ............................................................... 14
1.6.4 I/O module configuration ........................................................................... 14
1.6.5 Firmware updates ...................................................................................... 14
1.7 MAPCS Function Block List .............................................................................. 15
1.7.1 SFC Block.................................................................................................. 17
2 Overview of a Programmable Controller System .................................................... 19
3 MAPCS Modules ..................................................................................................... 22

3.1.1 MPU431 Main Processing Unit .................................................................. 25
3.2 Digital I/O Modules ........................................................................................... 27
3.2.1 DI530 Digital Input Module ........................................................................ 27
3.2.3 DO580 Digital Output Module.................................................................... 31
3.2.4 DO571 Digital Output Module.................................................................... 35
3.3 Analog I/O Modules .......................................................................................... 39
3.3.1 AI622 Analog Input Module (Isolated) ....................................................... 39
3.3.2 AI623 Analog Input Module (HART) .......................................................... 44
Page 2 of 81
MAPCS Control System Table of Contents
3.3.3 AI621 Analog Input Module (TI, RTD/TC) ................................................. 49

3.3.4 AO672 Analog Output Module................................................................... 53
3.3.5 AO673 Analog Output Module (HART) ..................................................... 57
3.3.6 LD 101 FF H1 Linking Device .................................................................... 61
3.3.7 GW 201 Modbus Gateway ........................................................................ 61
4 Installation of MAPCS hardware ............................................................................. 63

4.1 Backplane Overview ......................................................................................... 63
4.1.1 Main Backplane ......................................................................................... 63
4.1.2 Lower Backplane ....................................................................................... 63
4.2 Backplane Accessories..................................................................................... 64
4.3 Backplane Cables ............................................................................................. 66
4.4 Fixing the Backplanes and the Modules ........................................................... 66
4.5 To Install a Backplane in a Cabinet .................................................................. 67
4.6 Adding Backplanes (Local I/O Expansion) ....................................................... 68
4.7 How to Install a Module .................................................................................... 68
4.8 Rack Connection .............................................................................................. 68
4.9 Cables............................................................................................................... 69
5 Display Elements..................................................................................................... 72

5.1 MPU display elements ...................................................................................... 72
5.1.1 Device Status Indication ............................................................................ 72
5.1.2 Status Definition ........................................................................................ 73
5.2 I/O Display elements......................................................................................... 75
5.2.1 Device Status Indication ............................................................................ 76
5.2.2 Status Definition ........................................................................................ 76
6 Terminal Assignment............................................................................................... 79
Page 3 of 81
MAPCS Control System List of Tables
List of Tables
Table 3-1: MAPCS Hardware List ................................................................................... 22

Table 3-2: Common Specifications of MAPCS Modules ................................................. 24
Table 3-3: AO672 Specifications..................................................................................... 56
Table 3-4: AO673 Specifications..................................................................................... 60
Table 4-1: Main Backplane Part ...................................................................................... 63
Table 5-1: MPU LED List ................................................................................................ 72
Table 5-2: MPU Indication Of Display Elements ............................................................. 72
Table 5-3: MPU Status Indication LEDs.......................................................................... 73
Table 5-4: HSE Link Status Indication Leds .................................................................... 75
Table 5-6: I/O Indication Of Display Elements ................................................................ 75
Table 5-7: I/O Card Status Indication LEDs .................................................................... 76
Table 5-8: I/O Channel Status Indication LEDs .............................................................. 77
Table 10-1: Terminal Assignment DB25 ......................................................................... 79
Table 10-2: Terminal Connection between Two DB25 ................................................... 80
Table 10-3: Terminal Blocks & I/O Modules .................................................................... 81
Hardware Configuration Page 4 of 81

MAPCS Control System Table of Figures
Table of Figures
Figure 1-1: MAPCS Typical Architecture .......................................................................... 9
Figure 1-2: PPC Controllers ............................................................................................ 11
Figure 1-3: Linking Device Connectivity .......................................................................... 13
Figure 2-1: Basic Functional Structure Of A Programmable Controller System ............. 19
Figure 2-2: Programmable Controller Hardware Model (From IEC61131- Part5) ........... 20
Figure 3-1: Terminals And Screws .................................................................................. 24
Figure 3-2: MPU431 Front View...................................................................................... 25
Figure 3-3: DI530 Front View .......................................................................................... 27
Figure 3-4: Schematic of DI530 Module.......................................................................... 28
Figure 3-5: DI530 Wiring for BPL 921D Terminal ........................................................... 29
Figure 3-6: DI530 Wiring for BPL 922S Terminal ............................................................ 29
Figure 3-7: DO580 Front View ........................................................................................ 31
Figure 3-8: Schematic of DO580 Module ........................................................................ 32
Figure 3-9: DO580 Wiring for BPL 921D Terminal .......................................................... 33
Figure 3-10: DO580 Wiring for BPL 922S Terminal ........................................................ 33
Figure 3-11: DO571 Front View ...................................................................................... 35
Figure 3-12: Schematic of DO571 Module ...................................................................... 36
Figure 3-13: DO571 wiring for BPL 921D Terminal ........................................................ 37
Figure 3-16: AI622 Front View ........................................................................................ 39
Figure 3-17: Schematic of AI622 Module ........................................................................ 40
Figure 3-18: AI622 Wiring for BPL 921D Terminal .......................................................... 41
Figure 3-19: AI622 Wiring for BPL 922S Terminal .......................................................... 41
Figure 3-20: AI622 Sensor Connection Types ................................................................ 42
Figure 3-23: AI623 Wiring for BPL 921D ......................................................................... 46
Figure 3-24: AI623 Wiring for BPL 922S ......................................................................... 46
Page 5 of 81
MAPCS Control System Table of Figures

Figure 3-28: AI621 Wiring for BPL 921D ......................................................................... 51
Figure 3-29: AI621 Wiring for BPL 922S ......................................................................... 51
Figure 3-31: AO672 Front View ...................................................................................... 53
Figure 3-32: Schematic of AO672 Module ...................................................................... 54
Figure 3-33: AO672 Wiring for BPL 921D Terminal ........................................................ 55
Figure 3-34: AO672 Wiring for BPL 922S Terminal ........................................................ 55
Figure 3-36: AO673 Front View ...................................................................................... 57
Figure 3-37: Schematic of AO673 Module ...................................................................... 58
Figure 3-38: AO673 Wiring for BPL 921D Terminal ........................................................ 59
Figure 4-1: Main Backplanes .......................................................................................... 63
Figure 4-2: Lowe Backplanes.......................................................................................... 64
Figure 4-3: Blank Cover .................................................................................................. 65
Figure 4-4: Terminator Schematic................................................................................... 65
Figure 4-5: Typical Modules ............................................................................................ 66
Figure 4-6: Back Plane And Modules Terminal ............................................................... 67
Figure 4-7: Example of Rack Connection ....................................................................... 69
Figure 6-1: Terminal Blocks ............................................................................................ 81
Page 6 of 81
MAPCS Control System Introduction
Chapter 1
Introduction
Page 7 of 81
1 Introduction
The new generation of Process Automation Systems (PAS) is certainly best defined by
the FOUNDATION Fieldbus technology. MAPNA has responded to this new technology
with the introduction of an advanced automation system released as the first generation
of MAPNA Automation and process control system or MAPCS.
1.1 MAPCS Control System Overview

As a scalable control system, the MAPCS uses a well-organized set of networked
controllers, gateways, information servers and different types of operation and
engineering clients in order to effectively control and automate a wide variety of
processes with sizes varying from a few dozen to tens of thousands of control points.
The rich architecture of MAPCS permits data and information to be transferred efficiently
among various elements and at different layers of the system. Methods like
publisher/subscriber, synchronous and asynchronous client/server, report distribution,
report by exception and others defined by the underlying standards such as
FOUNDATION fieldbus and OPC guarantee the optimum flow of hard and soft real-time
data based on the nature of the information being transferred.
1.2 MAPCS Control Platform

The MAPCS Control System is a perfect modern process automation system which is
developed on basis of a 100% standard architecture based on FieldBus technology and
is able to control all kinds of industrial processes (such as processes of refining,
petrochemical, chemical and food industry) with any degree of complexity.
MAPCS is a complete platform for the automation of manufacturing processes. MAPCS
consists of two main parts, MAPCS Supervisory Control Platform and the MAPCS
Process Control Platform. MAPCS Supervisory Control Platform provides a complete set
of tools for hardware connectivity, visualization, analysis and optimization of industrial
data and information. MAPCS Process Control Platform which is designed and built from
the ground up according to the FOUNDATION Fieldbus Technology, provides the
required components and tools to build a powerful control system for process industries
with control in the field (CIF) capabilities.
Page 8 of 81
Figure 1-1: MAPCS Typical Architecture
1.3 FOUNDATION Fieldbus as the basis of MAPCS

For too long, the discussion of fieldbus has centered around the network aspects.
FOUNDATION™ Fieldbus technology was built from the ground up to be more than just
a digital replacement for 4-20 mA technology. FOUNDATION technology is a unified
infrastructure that manages data, communication, plant assets, and plant events while
providing highly distributed control functionality and interoperability between devices and
subsystems. This infrastructure is supplier neutral, standards-based, and provides end
users with a common framework to implement and manage strategies for operational
excellence and continuous improvement in process manufacturing.
Page 9 of 81
The real differentiator between FOUNDATION Fieldbus and its counterparts in process
automation, such as Profibus PA and HART, is the incorporation of a function block
structure and supporting functions that really make FOUNDATION technology a
complete infrastructure for process automation.
FOUNDATION technology includes not only control function blocks, but also has
mechanisms for time management, global data access, an open and standards-based
control network backbone in the form of HSE, and many other aspects that make it a
true automation infrastructure. At the same time, FOUNDATION technology is open and
based on international standards, allowing any automation supplier to incorporate the
technology into their framework for automation while still allowing room for competitive
advantage. FOUNDATION technology is essentially a standards-based template for high
availability process automation that can serve as a common infrastructure for any
process automation system from basic regulatory control to safety applications.
1.4 Hardware Components

Hardware equipments of MAPCS can be divided into two categories based on their
installation. Rack-mount devices which includes conventional controllers and I/O cards
and stand-alone cards such as gateway and LAN switches.
The Programmable Process Controller (PPC) is the main controller component of
MAPCS and is responsible for executing the control strategies, communicating with
higher layer as well as peer networks (e.g. HSE, Modbus/TCP), communicating with
fieldbus devices (e.g. FF H1), and required I/O functions. The PPC supports full
redundancy in processing, I/O and communications (both internal and external).
The MAPCS PPC is designed to fulfill the requirements of the most demanding process
control applications. Being able to serve thousands of I/O points and the corresponding
control tasks and programs, per single controller, the system can scale-up to tens of
thousands of I/O points through a series of networked controllers using the powerful
communication mechanisms built into system hardware and software (based on FF
HSE).
Page 10 of 81
Figure 1-2: PPC Controllers
1.4.1 MPU
At the heart of the PPC lies the MPU (Main Processing Unit) which is responsible for the
receiving and storing PPC configuration information, control strategy execution, all the
communications in controller level and the management of I/O modules. All of these
tasks are managed under the control of a modern and powerful kernel RTOS. The MPU
is formed around a powerful 333 MHz, 32 bit RISC CPU. Our proposed MPU in company
with its full features is available in the document appendix.
1.4.2 I/O Modules
Although the fieldbus use is on rise, no control system vendor can ignore classic analog
and digital I/Os. There is still no candidate to substitute these inexpensive I/O units in
many types of applications. As such MAPCS PCs are able to handle both "analog and
digital classic I/Os" and "fieldbus I/Os."
I/O modules are the main interface between PCs and sensors and actuators. These
modules are fully compatible with IEC61131-2 recommendations. They are fully isolated
and have self-diagnostic and status report functionality.
The input modules get the signal from the field, filter, convert signal from analog to digital
in case of analog input modules, process input data and transfer data plus status to
MPU. The output modules receive outputs and commands from the program running on
the MPU, and after some processing and conditioning, output the signal to the field in
order to drive various types of actuators and final control elements.
Our proposed I/O modules in company with their full features are available in the
document appendix.
Page 11 of 81
1.4.3 Linking Device

LD is a highly compact gateway between four Foundation Fieldbus (FF) H1 links and FF
HSE suited for redundant use. Linking Device provides all necessary accessibility to the
field devices connected to the H1 networks from supervisory and control systems as well
as management consoles on the High Speed Ethernet.
Our proposed LD in company with its full features is available in the document appendix.
1.4.4 Modbus Ethernet Programmable Gateway
The Modbus Ethernet Programmable Gateway can act as a master for up to 4 links
comprising of Modbus RTU protocol slaves and send data. It consists of one redundant
pair or 2 separate Ethernet links, and 4 general purpose RS232 / 422 / 485 serial links
and can be used to convert any serial protocol to HSE protocol.
Our proposed Gateway in company with its full features is available in the document
appendix.
1.5 Fieldbus connectivity

FOUNDATION Fieldbus HSE is the control level bus of the MAPCS. MAPCS
components (PPCs and various types of LDs) are all connected together in the control
layer using this protocol. The system connectivity to the HART devices is through HART
I/O cards of the PPCs. The H1 subsystem of the MAPCS consists of the required
number of H1-HSE Linking Devices. The Modbus connectivity is either possible through
Serial Links of the PPC MPU or stand-alone Modbus RTU-HSE Linking Devices.
1.5.1 FOUNDATION Fieldbus HSE connectivity
FOUNDATION Fieldbus HSE is the control level bus for a FOUNDATION Fieldbus
system. It enables the construction of control cascades between instruments on different
H1 segments, as well as the more conventional view of being the communications
pathway to all of the field instruments. In the MAPCS architecture, HSE acts as the
universal protocol between various control elements providing fast and reliable
communication between PPCs and between PPCs and field instruments through the so
called Linking Devices.
1.5.2 MAPCS FOUNDATION Fieldbus H1 Subsystem
The MAPCS FOUNDATION Fieldbus H1 subsystem is used to handle the FF H1
devices and enables true distributed control via FF advanced Control in the Field (CIF)
features. Toward this end, a complete implementation of FF technology in the form of H1
and HSE stacks along with FBAP and all standard FBs is incorporated in the design of
MAPCS. The unique interface to the FF H1 field devices in MAPCS is the MECO Linking
Device (FF LD class 42c) which acts as the Link Master of up to four H1 segments and
can transfer the required information on the H1 links to the HSE network with
Client/Server, Source/Sink and Publisher/Subscriber methods.
Page 12 of 81
Figure 1-3: Linking Device Connectivity
1.5.3 MAPCS HART Connectivity

Along with the state of the art FOUNDATION Fieldbus connectivity, MECO has
developed solutions that provide the connections between the MAPCS control system,
HART field instruments, and the asset management software. The HART enabled I/O of
PPC system support HART-6 universal, common practice, and device-specific
commands. The analog modules use the number of shared channel per HART interface,
each channel support the point-to-point configuration where the traditional 4-20 mA is
used to communicate one process variable, while additional process variables,
configuration parameters, and other device data are transferred digitally using the HART
protocol. The Hart I/O supports burst mode and the I/O modules operate either in
Manual-command mode and auto-polling mode. Auto-polling features will automatically
search for a device and collect data (cmd0, cmd3, cmd13, cmd14 and cmd15) from each
HART instrument on the channel and store the data in the module database. The user
can disable auto-polling mode and the module will only execute the commands enabled
in the user command list.
1.5.4 Modbus Connectivity
The PPC Controller can operate in either Modbus Master or Modbus Slave mode to
communicate with remote MODBUS devices. Each controller can be configured as a
Modbus Master to control and obtain information from Modbus Slaves (such as PLCs
used in control standalone packages). The serial ports can also be configured as a
Modbus Slave, accepting commands from Modbus Master devices and providing
information on its data registers.
In projects requiring more extensive Modbus connectivity, standalone Modbus-HSE
Gateways can be used.
Page 13 of 81
1.6 MAPCS Main Features

1.6.1 Standards Compliance
MAPCS PPC is designed for use in harsh environments and is compliant with IEC
61131-2 standard. It operates over a temperature range of –40°C to +80°C and is
resistant to shock, vibration and corrosive environments. Additionally the controller is
compliant with the 61000 series of EMC standards. MAPCS is also compliant with FF
HSE, H1 and FBAP standards and tested for H1 Compliance, HSE Compliance
(including LD functionality-42c, H1 Interoperability, HIST). In addition the MAPVIEW is a
compliant OPC DA and A&E client. MAPCS supports standard Modbus RTU protocol
(master and slave) and can act as HART version 6.0 master through the HART I/O
cards.
1.6.2 Redundancy
Redundant controllers and networks are used for critical control applications. The main
and backup controllers operate in parallel, checking each other’s status by sending and
receiving various synchronization and livelihood messages in each control cycle
assuring a minimum delay, bump less transfer to backup controller in case of main
controller failure.
In addition to controller redundancy, the MAPCS PPC has two high-speed Ethernet ports
to provide alternate paths of communication. Each port can be connected to an
independent LAN.
The redundancy issue is also meaningful for linking devices. In the redundant mode, a
set of two physical Linking Devices forms one logical Linking Device. Both devices are
connected to the same HSE subnet and to the same H1 Links. If the Main Device fails,
the Redundant Device assumes its role in such a way that the overall performance
would not be violated.
1.6.3 Failsafe and automatic cold start
In the event of complete loss of communication the controller will adopt a user-defined
failsafe mode and similarly instruct the I/O to take up user-defined failsafe values. In the
event of power loss the MAPCS Process Controller will perform a cold restart which
restores the program(s) and assumes a predefined status.
1.6.4 I/O module configuration
The PPC receives full details of all the I/O modules under its control and stores the
information in nonvolatile memory. At start-up the controller downloads the related
configuration details to the modules, which also include the failsafe states they should
adopt in the event of communication failure.
1.6.5 Firmware updates
In keeping with its ability to maintain operations on a continuous basis, a redundant PPC
is also capable of receiving a firmware upgrade. In a manner similar to that used for
strategy updates, a controller can receive an update to its firmware while in the field.
When the upgrade has been confirmed as successful, the controller can be returned to
full operation as a master or as a standby.
Page 14 of 81
1.7 MAPCS Function Block List

Various function blocks are provided for MAPCS to perform different operations for plant
control. A function block is a minimum unit used to perform a control, communication,
monitoring and calculation task. Various plant controls can be performed when function
blocks process signals that are input from a field device to the FCS, and the processing
results are output to other function blocks or any field devices. The function blocks can
be configured for any customized operation using the MAPCS engineering tool
(MAPIDE).
This section presents an overview of all the function blocks of MAPCS used for
executing the process logic. Note that MAPIDE blocks are of two types: Available and
Flexible function Blocks. The Available blocks are predesigned and ready to use without
extra compilation and based on foundation Fieldbus standard and can be used as
conventional or Fieldbus format due to application and device type.
Flexible Function blocks are used for customized logic programming and making any
function block for process logic new requirements or any customized block design. The
IEC1131-3 standard functions and function blocks are supported in design environment
of flexible function blocks.
No Block Name Block Type Category Block Library

1 Analog Alarm Available Blocks
Alarm Block
2 DISCRETE ALARM BLOCK Available Blocks
3 ANGCNTFILTER Available Blocks
4 ANGCNTRAMP Available Blocks
5 BIAS GAIN Analog Calculation Block Available Blocks
6 DEADTIME Available Blocks
7 LEAD LAG Available Blocks
8 ARITHMETIC Available Blocks
9 INTEGRATOR Available Blocks
10 MATHABSOLUTEVALUE Available Blocks
11 MATHADD Available Blocks
Arithmetic Calculation Block
12 MATHCOMPARATOR Available Blocks
13 MATHDIVIDE Available Blocks
14 MATHMULTIPLY Available Blocks
15 MATHSUBTRACT Available Blocks
Page 15 of 81

16 PD Available Blocks
Controller Block
17 PID Available Blocks
18 Analog Input Available Blocks
19 DISCRETE INPUT Available Blocks
20 MAI Input Indicator Block Available Blocks
21 MDI Available Blocks
22 MDO Available Blocks
23 LOGICALAND Available Blocks
24 LOGICALBIDICTIOALEDGETRIGGER Available Blocks
25 LOGICALMULTIPLEXER Available Blocks
26 LOGICALNEGATIVEEDGETRIGGER Available Blocks
27 LOGICALNOT Available Blocks
Logic Operation Block
28 LOGICALOR Available Blocks
29 LOGICALPOSITIVEEDGETRIGGER Available Blocks
30 LOGICALRESETSETFLIPFLOP Available Blocks
31 LOGICALSETRESETFLIPFLOP Available Blocks
32 LOGICAL TRANSFER Available Blocks
33 TIMER Available Blocks
34 TIMERCOUNTER Available Blocks
35 TIMERDATETIMEEVENT Available Blocks
36 TIMEROFFDELAYTIMER Timer Block Available Blocks
37 TIMERONDELAYTIMER Available Blocks
38 TIMERRETENTIVETIMERFUCNTION Available Blocks
39 TIMERTIMEDPULSEFUNCTION Available Blocks
40 DEVICE CONTROL Available Blocks
Manual Loader Block
41 MANUAL LOADER Available Blocks
42 Analog Output Available Blocks
43 DISCRETE OUTPUT Output Driver Block Available Blocks
44 MAO Available Blocks
45 ANGCNTSCALER Available Blocks
Signal Distributor Block
46 OUTPUT SPLITTER Available Blocks
47 ANGCNTRATELIMIT Available Blocks
Signal Limiter Block
48 ANGCNTLIMIT Available Blocks
49 ANGCNTSIGNALSELECTOR Available Blocks
50 CONTROL SELECTOR Signal Selector Block Available Blocks
51 INPUT SELECTOR Available Blocks
52 ANGCNTSIGNALGENERATOR Available Blocks
53 RATIO Signal Setter Block Available Blocks
54 SETPONIT RAMP GENERATOR Available Blocks
Page 16 of 81

55 SIGNAL CHARACTERIZER Available Blocks
IEC1131 Standard blocks for
56 IEC 1131‐3 func ons and func on blocks Flexible Function Blocks
PLC
1.7.1 SFC Block

The SFC block is a type of the sequence control block, which is also a function block that
is used to describe the SFC.
Page 17 of 81
MAPCS Control System Overview of a Programmable Controller System
Chapter 2
Overview of a Programmable
Controller System

2 Overview of a Programmable Controller System

The general structure with main functional components in a programmable controller
system is illustrated below. These functions communicate with each other and with the
signals of the machine/process to be controlled.
Other Systems
Operator
Man-Machine
Interface
Functions
Communication
Functions Programming, Application
Programmer
Debugging, and
Testing
Functions
Signal
Processing Operating
Functions
System
Functions
Main
text
Supply
Power
Supply Application Application
Function
Program text Program Storage
Execution Functions
Data Storage
Functions
Interface Functions to Sensors and Actuators
Machine/Process
Figure 2-1: Basic Functional Structure Of A Programmable Controller System
The CPU function consists of the application program storage, the data storage, the
operating system, and the execution of the application program functions.
Page 19 of 81
The CPU processes signals obtained from the sensors as well as internal data storage in
accordance with the application program.
The interface function to sensors and actuators converts:
 The input signals and/or data obtained from the machine/process to appropriate
signal levels for processing.
 The output signals and/or data from the signal processing function to appropriate
signal levels to drive actuators and/or displays.
The input/output signals to the interface functions may be coming from special modules
which pre-process external sensor signals according to defined functions contained in
the special modules include: PID module, fuzzy control module, high speed counter
module, motion modules and others.
The communication function provides the data exchange with other systems (third party
devices) such as other programmable controller systems, robot controllers, computers,
etc.
The MAPCS HMI Viewer(MAPVIEW) function provides interaction between the operator,
the signal processing function and the machine/process.
Programming, debugging, testing and documentation functions provide for application
program generation and loading, monitoring, testing and debugging as well as for
application program documentation and archiving.
The power supply functions provide for conversion and isolation programmable controller
system power from the main power.
Figure 2-2: Programmable Controller Hardware Model (From IEC61131- Part5)
Page 20 of 81
MAPCS Control System MAPCS Modules
Chapter 3
MAPCS Modules

3 MAPCS Modules
The MAPCS I/O modules in company with their brief specifications are listed in the
following table:
Table 3-1: MAPCS Hardware List
Item Description Part Name Order Code
Digital Modules MAPCS-G---0D-----

1 DI 32ch, 24 VDC DI 530 MAPCS-GNMD-0DI-A01
2 DO 32ch, 24 VDC,0.5A DO 580 MAPCS-GEMD-0DO-B01
3 DO 16ch, 24 VDC, 0.5A, Full Diagnostics DO 571 MAPCS-GNMD-0DO-A01
Analog Modules MAPCS-G----0A-----
1 AI 8ch, 4-20mA AI 622 MAPCS-GNMD-0AI-C01
2 AI 8ch, 4-20mA, HART AI 623 MAPCS-GEMD-0AI-C01
3 TI 8ch, RTD(2, 3, 4 Wires)/TC AI 621 MAPCS-GEMD-0AI-A01
4 AO 8ch, 4-20mA AO 672 MAPCS-GEMD-0AO-A01
5 AO 8ch, 4-20mA, HART AO 673 MAPCS-GEMD-0AO-B01
Processor Modules MAPCS-G----MPU----
1 32 bit RISC processor MPU 431 MAPCS-GEMD-MPU-B01
Backplane Main Part MAPCS-S----0BP----
1 Backplane Main, 4 slots BPM 910 MAPCS-SGLB-0BP-A02
2 Backplane Main, 4 slots BPM 911 MAPCS-SEUB-0BP-D01
Backplane Main, 4 slots, Left Expandable
3 BPM 911L MAPCS-SGLB-0BP-C02
with F connector
Backplane Main, 4 slots, Right Expandable
4 BPM 911M MAPCS-SGLB-0BP-D02
with M connector
Backplane Lower Part MAPCS-SEMD-BPL-A01
Backplane Lower Part for Single Module,
1 BPL 921D MAPCS-GEMD-BPL-A01
DB25 Connectors, 40 Pin
Backplane Lower Part for Single Module,
2 BPL 921S MAPCS-GEMD-BPL-B01
Screw Terminals, 24 Pin
Backplane Lower Part for Redundant
3 BPL 922D MAPCS-GEMD-BPL-C01
Module, DB25 Connectors, 40 Pin
Backplane Lower Part for Redundant
4 BPL 922S MAPCS-GEMD-BPL-D01
Module, Screw Terminals, 40 Pin

Other Backplane Accessories MAPCS-S----BPL----

1 MPU Lower Cover BPA 929L MAPCS-SMAC-BPL-B01
2 Backplane Blank Cover BPA 929M MAPCS-SMAC-BPL-A01
3 Backplane terminator BPA 929T MAPCS-SMAC-BPL-C01
FF Linking Device MAPCS-G----0LD----
1 FF-H1 Linking Device LD 101 MAPCS-GEMD-0LD-A01
Gateway MAPCS-G----0GW----
1 Modbus-RTU to HSE Gateway GW 201 MAPCS-GEMD-0GW-A01
Backplane Cables MAPCS-SEAC--------
1 MCS_CANBUSCable 2xDB25+1mCble ----- MAPCS-SEAC-CBL-CØ1
2 MCS_CANBUSCable2xDB25+0.5mCble ----- MAPCS-SEAC-CBL-BØ1
3 MCS_CAN+PwerCble2xDB25_1mC\2mP ----- MAPCS-SEAC-CBL-AØ1
4 MCS_CANBUSTermintor+2mPwerCble ----- MAPCS-SEAC-CBL-DØ1
I/O Signal Cables MAPCS-SEAC--------

1 MCS_Signal_ power cableDB25_2m ----- MAPCS-SEAC-CBL-EØ1
2 MCS_Sig_pwercbleDB62+2xDB25_1m ----- MAPCS-SEAC-CBL-FØ1
Page 23 of 81
Table 3-2: Common Specifications of MAPCS Modules
Common Specifications
Reference standard IEC 61131-2 : 2007
Working zone Zone 2
Operating temperature -20 to 65C
Storage temperature -40 to 85C
Relative humidity 10 to 90%
Backplane power 12 VDC ± 20%
Redundancy support Full-redundant in all aspects
Backplane module positions 4 (CPU or I/O)
Backplane dimension (L x H x D) 220mm x 183mm x 39mm
Modules dimension (H x W x D) 140mm x 116.5mm x 45mm
The terminals pin numbers and screws used in the rest of the document is as the
following figure.
Figure 3-1: Terminals And Screws
Page 24 of 81
3.1.1 MPU431 Main Processing Unit
3.1.1.1 Features
 Capacity of Max direct 31x2 redundant (62 non-
redundant) I/O module
 64MB Flash Memory
 128 MB SD-RAM DDR
 Watch Dog Timer
 Real Time Clock
 Communication interfaces:
o 2 X 1Mbit/s backplane
o 2 X 10/100 uplink (Ethernet)
 Redundancy support:
o Module redundancy
o LAN redundancy
o Backplane communication redundancy
o Input power redundancy
3.1.1.2 Indicator LEDs

a. Power
b. Run
c. Standby
d. Fault
e. Status 1
f. Status 2
Figure 3-2: MPU431 Front View

3.1.1.3 General Description
At the heart of the FCS, lies the MPU, which is responsible for receiving and storing
MAPCS configuration information, execution of control strategies and communications in
controller level, and managing I/O modules.
Page 25 of 81
Table 3-3: MPU431 specifications
Label MPU431
Processor 32 bit RISC processor
Program memory Flash, 64MB
Application memory SDRAM, DDR, 128 MB
Backup memory for parameters
SRAM, 2MB
(optional)
Rechargeable, able to retain content for 300 hours in worst
Backup battery for RTC and SRAM temperature condition. At least 1000 hours at 25°C or
below.
Other features Watch Dog Timer, Real Time Clock, Alarm Signal
2 X 1Mbit/s backplane
Communication interfaces
2 X 10/100 uplink (Ethernet)
Indicator LEDs Power, Run, Standby, Fault, Status 1, Status 2
Module redundancy
LAN redundancy
Redundancy support Backplane communication redundancy
Input power redundancy
Power consumption (from backplane Maximum : 6W

bus) Typical : 3.3W
Operating temperature 0 to 65C
Storage temperature -40 to 85C
Relative humidity 10 to 90%
Reference standard IEC 61131-2
Dimensions (H x W x D) 140mm x 116.5mm x 45mm
Page 26 of 81
3.2 Digital I/O Modules

3.2.1 DI530 Digital Input Module
The DI530 is a 24 V 32 Ch. DC digital input module.
3.2.1.1 Features
• 32 channels for 24 V DC inputs
• Isolated in groups of 8
• Input status indicators
• EMC protection
3.2.1.2 Diagnostics
a. Internal Bus Warning
b. Missing Field Power
c. Board Over Temperature Warning
d. Board Over Temperature Alarm (Fatal)
e. Internal Hardware Error (Fatal)
3.2.1.3 LED List

a. Power (Green)
b. Run (Green)
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus 1 activity
f. Status2 (Blink On Activity)BACKPLANE Bus2 activity
g. Channel indicator: One LED (Green) per each input state
(On = 1 and Off = 0).
Figure 3-3: DI530 Front View

3.2.1.4 Description
The module senses the DC input voltage and converts it into a
True (ON) or False (OFF) logic signal. It has 4 optically isolated groups of 8 inputs.
Every input channel consists of current limiting components, EMC protection
components, input state indication LED and optical isolation barrier.
Page 27 of 81
Figure 3-4: Schematic of DI530 Module
Page 28 of 81
Figure 3-5: DI530 Wiring for BPL 921D Terminal
Figure 3-6: DI530 Wiring for BPL 922S Terminal
Page 29 of 81
Table 3-4: DI530 Specification
Label DI530
Number of channels 32
Input type Sink
Input Impedance > 2KΩ
Rated supply voltage 24V DC
Permitted supply voltage range 18V DC to 30V DC
Rated Input voltage value 24V DC
Maximum permissible input voltage ±40V DC
Input high level (1) 13V DC to 30V DC

Input low level (0) -30V DC to +5V DC
Maximum Input frequency 300Hz
Typical Input current (at 1 signal) 4mA @ 24V DC
Maximum Input Current 12mA @ 40V DC
Maximum permissible quiescent current 1mA
Isolation type (to backplane bus) Optocoupler
Isolated in groups of 8
Isolation between bus and analog section 2500V DC
Maximum : 2W
Power consumption (from backplane bus)
Typical : 0.6W
Operating temperature -20˚C to +85˚C
Storage temperature -40˚C to +85˚C
Relative humidity 5% to 95%
Reference Standard IEC 61131-2
Terminal BPL 922S , BPL 921D
Page 30 of 81
3.2.3 DO580 Digital Output Module

Digital Output 580 (4 groups of 8 channels 24 VDC outputs – High side switch)
3.2.3.1 Features
 32 channels for 24 V DC
 Isolated in groups of 8
 Over-current, Over-voltage and over-temperature protection
 EMC protection
3.2.3.2 Diagnostics
b. Short Circuit Alarm per Group
c. Missing Field Power
d. Board Over Temperature Warning
e. Board Over Temperature Alarm (Fatal)
f. Internal Hardware Error (Fatal)
3.2.3.3 LED List

a. Power (Green).
b. Run (Green),
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE 1 Bus1 activity
g. Channel indicator: One LED (Green) per each output state
(On = 1 and Off = 0).
3.2.3.4 Description Figure 3-7: DO580 Front View

This module is designed using high-side-switches which
are able to drive all types of resistive, capacitive, and inductive loads up to 0.4A per
output.
It has 4 optically isolated groups of 8 outputs and has a diagnostic per group.
Page 31 of 81
Figure 3-8: Schematic of DO580 Module
Page 32 of 81
Figure 3-9: DO580 Wiring for BPL 921D Terminal
Figure 3-2: DO580 Wiring for BPL 922S Terminal

Table 3-5: DO580 Specifications
Label DO580
Output type High side switch
Diagnostics Group Short-Circuit, Missing Field Power,
Board Temperature, Internal Hardware Error

Minimum Output voltage (at 1 signal) > Vs - 0.8V

Maximum Output current (at 1 signal) 0.5A
Maximum leakage current 0.5mA @ 30V DC
Maximum Output frequency (Resistive 100Hz
loads)
Maximum Output frequency (Inductive 1 Hz
loads)
Maximum Output frequency (Lamp loads) 100Hz
Short circuit protection Yes (Electronic)

Short circuit peak current 1.5A
Voltage induced on current interruption Vs ± 48V
limited to
Isolation type (to backplane bus) Optocoupler
Isolated in groups of 8
2500V DC
Power consumption (from backplane bus) Maximum : 2W
Typical : 0.6W
Terminal BPL 922S , BPL 921D
Page 34 of 81
3.2.4 DO571 Digital Output Module

Digital Output 571 (2 groups of 8 channels 24 VDC outputs - High side switch - Full
Diagnostics)
3.2.4.1 Features
 16 channels for 24 V DC
 Isolated in groups of 8
 Over-current, Over-voltage and over-temperature protection
 EMC protection
3.2.4.2 Diagnostics
b. Short Circuit Alarm per Channel
c. Wire Break Alarm per Channel
d. Missing Field Power
e. Board Over Temperature Warning
f. Board Over Temperature Alarm (Fatal)
g. Internal Hardware Error (Fatal)
3.2.4.3 LED List

a. Power (Green).
b. Run (Green),
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus1 activity
g. Channel indicator: One LED (Green) per each output state (On
= 1 and Off = 0).
Figure 3-3: DO571 Front View
3.2.4.4 Description
This module is designed using high-side-switches which are able to drive all types of
resistive, capacitive, and inductive loads up to 0.4A per output.
It has 2 optically isolated groups of 8 outputs, with full diagnostics.
Page 35 of 81
Figure 3-4: Schematic of DO571 Module
Page 36 of 81
Figure 3-5: DO571 wiring for BPL 921D Terminal
Page 37 of 81
Table 3-6: DO571 Specifications
Label DO571
Output type High side switch
Short-Circuit, Wire Break, Missing Field Power,
Diagnostics
Internal Hardware Error, Board Temperature
Minimum Output voltage > Vs - 0.8V
Maximum Output current 0.4A
Maximum leakage current 0.5mA @ 30V DC
Maximum Output frequency (Resistive
100Hz
loads)
Maximum Output frequency (Inductive
1 Hz
loads)
Maximum Output frequency (Lamp
100Hz
loads)
Short circuit protection Yes (Electronic)
Short circuit peak current 1.4A
Voltage induced on current interruption
Vs ± 48V
limited to
Isolation type (to backplane bus) Opto-coupler
8
Isolated in groups of
2500V DC
Power consumption (from backplane Maximum : 2W
bus)
Typical : 1.3W
Page 38 of 81
3.3 Analog I/O Modules

3.3.1 AI622 Analog Input Module (Isolated)
Analog Input 622 (1 group of 8 0/4-20 mA inputs).
3.3.1.1 Features
• 8 channels for 0...20 mA, 4...20 mA
• 1 group of 8 channels
• EMC protection
3.3.1.2 Diagnostics
a. Wire Break
b. Internal Bus Warning
c. Over Range Alarm
d. Under Range Alarm
e. Missing Field Power
f. Board Over Temperature Warning
g. Board Over Temperature Alarm (Fatal)
h. Internal Hardware Error (Fatal)
i. Analog Power Error (Fatal)
j. ADC Error (Fatal)
3.3.1.3 LED List

a. Power (Green)
b. Run (Green)
c. Standby (Green)
d. Fault (Red) Figure 3-8: AI622 Front View
e. Status1 (Blink On Activity) BACKPLANE 1 Bus
1activity
g. Channel indicator: One LED (Green) per each input Value Range
3.3.1.4 Description
This module reads 8 current analog signals. The inputs are isolated from the backplane
bus.
Page 39 of 81
Figure 3-97: Schematic of AI622 Module
Page 40 of 81
Figure 3-10: AI622 Wiring for BPL 921D Terminal
Figure 3-19: AI622 Wiring for BPL 922S Terminal
Page 41 of 81
Figure 3-11: AI622 Sensor Connection Types
Page 42 of 81
Table 3-7: AI622 Specifications
Label AI622
Current Input Range 0/4-20mA
Wire Break, Output Power Short

Circuit, Overflow, Underflow, Missing
Diagnostics Field Power, Missing Analog Power,
Internal Hardware Error, Board
Temperature
Resolution
16 bits
Accuracy ±0.1%
Accuracy over temperature range 0.15% max
Nonlinearity 0.002%
Calibration Internal
Sample Rate 20sps (per channel)
Noise suppression for noise frequency 50/60 Hz

Isolation between bus and analog section At least 1000V DC
Max: 2W
Typical : 1.4W
Connection types 2-wire (loop powered), 4-wire
Page 43 of 81
3.3.2 AI623 Analog Input Module (HART)

Analog Input HART 623 (1 group of 8 0/4-20 mA inputs, each receiving HART frames).
3.3.2.1 Features
• 8 channels for 0...20 mA, 4...20 mA
• EMC protection
• HART compatible
3.3.2.2 Diagnostics
a. Wire Break
b. Internal Bus Warning
c. Over Range Alarm
d. Under Range Alarm
e. Missing Field Power
f. Board Over Temperature Warning
g. Board Over Temperature Alarm (Fatal)
j. ADC Error (Fatal)
3.3.2.3 LED List

a. Power (Green)
b. Run (Green)
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus1 activity
g. Channel indicator: One LED (Green) per each input
value Figure 3-12: AI623 Front View
3.3.2.4 Description
This module reads 8 current analog signals, on which a digital 1 mA peak-peak HART
signal is carried. Inputs are isolated from the backplane bus. A group of 8 digital outputs
to supply 4-20 mA loop powered transmitter is available.
Page 44 of 81
Page 45 of 81
Figure 3-14: AI623 Wiring for BPL 921D
Figure 3-15: AI623 Wiring for BPL 922S
Page 46 of 81
Page 47 of 81
Label AI623
Current Input Range 0/4-20mA
Wire Break, Output Power Short

Circuit, Overflow, Underflow, Missing
Diagnostics Field Power, Missing Analog Power,
Internal Hardware Error, Board
Temperature
Resolution
16 bits
Accuracy ±0.1%
Nonlinearity 0.002%
Sample Rate 20sps (per channel)

Max: 2W
Typical : 1.4W
Connection types 2-wire (loop powered), 4-wire
Page 48 of 81
3.3.3 AI621 Analog Input Module (TI, RTD/TC)

Temperature Input 621 (1 group of 8 Thermocouple/RTD inputs with selective cold-
junction compensation)
3.3.3.1 Features
• 8 Channels Thermocouple
• 8 Channels 2/3/4 wire RTD
• EMC protection
3.3.3.2 Diagnostics
b. Out of Range Alarm
c. Missing Field Power
g. Analog Power Error (Fatal)
h. ADC Error (Fatal)
3.3.3.3 LED List

a. Power (Green)
b. Run (Green)
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus 1 activity Figure 3-17: AI621 Front View
g. Channel indicator: One LED (Green) per each input value
3.3.3.4 Description
This module read 8 Thermocouple / 8 2wire RTD / 8 3wire RTD / 8 4wire RTD. Inputs
are isolated from the backplane bus.
Thermocouple Types: B, E, J, K, N, R, S, T
RTD Types: PT100, PT500, PT1000
Cold Junction: for Thermocouple input sensors cold junction compensation could be
done with one of these items which is set as one of the module settings.(Ambient Type):
- Internal module temperature sensor
- External sensor on CH 1
- Fixed 25 deg. Centigrade
- Fixed 0 deg. Centigrade
Page 49 of 81
Page 50 of 81
Figure 3-19: AI621 Wiring for BPL 921D
Figure 3-29: AI621 Wiring for BPL 922S
Page 51 of 81
Label AI621
Thermocouple B, E, J, K, N, R, S, T
Input Range
RTD PT100, PT200, PT500, PT1000
Input impedance > 20MΩ
Resolution
16 bits
Accuracy ± 1°C
Nonlinearity 0.00%
Sample Rate About 10sps (per channel)

Max : 2W
Typical : 1.4W
Thermocouple Cold Junction Compensation Internal/External
RTD connection types 2-wire, 3-wire, 4-wire
Page 52 of 81
3.3.4 AO672 Analog Output Module

Analog Output 672 (1 groups of 8 current Analog outputs)
3.3.4.1 Features
• 8 channels for 0..20mA, 4...20 mA
• EMC protection
• 14 Bit resolution
• Field power distribution
• EMC protection
3.3.4.2 Diagnostics
j. DAC Error (Fatal)
3.3.4.3 LED List

a. Power (Green).
b. Run (Green),
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus 1 activity Figure 3-21: AO672 Front View
f. Status2 (Blink On Activity)BACKPLANE Bus 2 activity
g. Channel indicator: One LED (Green) per each output value
3.3.4.4 Description
This module provides 8 loop power current outputs. Each output can be individually
configured on range 4-20mA.
Page 53 of 81
Figure 3-222: Schematic of AO672 Module
Page 54 of 81
Figure 3-23: AO672 Wiring for BPL 921D Terminal
Figure 3-24: AO672 Wiring for BPL 922S Terminal
Page 55 of 81
Table 3-3: AO672 Specifications
Label AO672
Output
Current 0/4-20mA
Range
Minimum load impedance for voltage outputs 500Ω

Maximum load impedance for current outputs 600Ω
Maximum load impedance for capacitive loads 1µF
Maximum load impedance for inductive loads 10mH
Missing Analog Power, Missing Field

Diagnostics Power, Wire Break, Internal Hardware
Error, Board Temperature
Resolution 14 bits
Accuracy ±0.1%
Accuracy over temperature range 0.25% maximum
Nonlinearity -1/+2 LSB max
Settling time 5ms
Maximum Output current 21.8 mA
Current output Maximum open circuit voltage ±14V
Maximum : 2W
Typical : 1.4W
Page 56 of 81
3.3.5 AO673 Analog Output Module (HART)

Analog Output HART 673 (1 group of 8 0/4-20mA outputs, each transmitting HART
frames).
3.3.5.1 Features
• 8 channels for 0..20mA, 4...20 mA
• EMC protection
• HART compatible
• 14 Bit resolution
• Field power distribution
• EMC protection
3.3.5.2 Diagnostics
g. Analog Power Error (Fatal)
h. DAC Error (Fatal)
3.3.5.3 LED List

a. Power (Green)
b. Run (Green)
c. Standby (Green)
d. Fault (Red)
e. Status1 (Blink On Activity) BACKPLANE Bus 1 activity Figure 3-26: AO673 Front View
f. Status2 (Blink On Activity)BACKPLANE Bus 2 activity
g. Channel indicator: One LED (Green) per each output value
3.3.5.4 Description
This module provides 8 loop power current outputs. Each output can be individually
configured on range 4-20mA. A digital 1mA peak-peak HART signal is transmitted on
each output.
Page 57 of 81
Figure 3-27: Schematic of AO673 Module
Page 58 of 81
Figure 3-28: AO673 Wiring for BPL 921D Terminal
Page 59 of 81
Table 3-4: AO673 Specifications
Label AO673
Output
Current 0/4-20mA
Range
Minimum load impedance for voltage outputs 500Ω

Maximum load impedance for current outputs 600Ω
Maximum load impedance for capacitive loads 1µF
Maximum load impedance for inductive loads 10mH
Missing Analog Power, Missing Field

Diagnostics Power, Wire Break, Internal Hardware
Error, Board Temperature
Resolution 14 bits
Accuracy ±0.1%
Accuracy over temperature range 0.25% maximum
Nonlinearity -1/+2 LSB max
Settling time 5ms
Maximum Output current 21.8 mA
Current output Maximum open circuit voltage ±14V
Maximum : 2W
Typical : 1.4W
Page 60 of 81
3.3.6 LD 101 FF H1 Linking Device

Information available in LD 101 Linking Device Datasheet.
3.3.7 GW 201 Modbus Gateway

Information available in GW 201 Modbus RTU to HSE Gateway Datasheet.
Page 61 of 81
MAPCS Control System Installation of MAPCS Hardware

Chapter 4
Installation of MAPCS Hardware
Page 62 of 81
4 Installation of MAPCS hardware

4.1 Backplane Overview
Different backplanes are used for connectivity and distribution of signals in MAPCS
which are divided into two main groups of Main and Lower Backplanes.
4.1.1 Main Backplane
Main backplane is used for connectivity between modules in digital section (Figure 4-1).
There are three types of main backplanes available: BPM911and BPM911M (Figure 4-
2).
Connection between I/O cards and MPU module (which is responsible for controlling the
system) is provided by Main Backplane in this system. Main backplanes are connected
together by D-SUB 25 connectors which include BACKPLANE BUS signals. Their power
is connected through distinct careers to 12V power.
Figure 4-1: Main Backplanes
Backplane Main Part

Backplane Main , 4 slots BPM 911 MAPCS-GEMD-٠BP-G٠1
Backplane Main , 4 slots ,Left Expandable with F Connector BPM 911 L MAPCS-GEMD-٠BP-F٠1
Backplane Main , 4 slots ,Right Expandable with M Connector BPM 911 M MAPCS-GEMD-٠BP-D٠1
Table 4-1: Main Backplane Part
4.1.2 Lower Backplane

Lower backplane is used for connectivity between modules and input/output signals
(Figure 4-3). Lower backplane is in modular form in this system and is substitutable with
new lower backplane with the least switching time and is divided to two types of single
and redundant and is available in four types of BPL921S, BPL921D, BPL922S and
BPL922D (Figure 4-4) .
Page 63 of 81
Figure 4-2: Lowe Backplanes
Backplane Lower Part

1 Backplane Lower Part for Single Module, DB25 Connectors, 40 Pin BPL 921D MAPCS-GEMD-BPL-A01
2 Backplane Lower Part for Single Module, Screw Terminals, 24 Pin BPL 921S MAPCS-GEMD-BPL-B01
3 Backplane Lower Part for Redundant Module, DB25 Connectors, 40 Pin BPL 922D MAPCS-GEMD-BPL-C01
4 Backplane Lower Part for Redundant Module, Screw Terminals, 40 Pin BPL 922S MAPCS-GEMD-BPL-D01
Table 4-2: Lower Backplane Part
4.2 Backplane Accessories

BPA 929M: This cover is used for covering the blank slot when there is no card on that
particular slot (Figure 4-5).
Page 64 of 81
Figure 4-3: Blank Cover
BPA 929L: MPU lower cover is used for placing MPU on Backplane in order to fill the
blank between Backplane and MPU. For this matter the BPA929M should be broken
right from cutting area and the lower section is used for MPUs
BPA 929T: It is a terminator for BACKPLANE BUS section (Figure 4-6) .
Figure 4-4: Terminator Schematic
Backplane Accessories
1 MPU Lower Cover BPA 929L MAPCS-SMAC-BPL-B01
2 Backplane Blank Cover BPA 929M MAPCS-SMAC-BPL-A01
3 Backplane terminator BPA 929T MAPCS-SMAC-BPL-C01
Table 4-3: Backplane
Page 65 of 81
4.3 Backplane Cables

Different cables are used for connecting power to the racks and racks to each other
which are:
 Cable which is connected by a female D-SUB 25 connector to the rack and
BACKPLANE BUS Terminator and power connection is placed on it.
 Cable which its two sides are Male D-SUB 25 and provide 3 pairs of
BACKPLANE connections.
 Cable which its two sides are female D-SUB 25 and includes power connections
and provides 3 pairs of BACKPLANE connections.
BACKPLANE BUS cable specification: 120Ω impedance and 5 ns/m specific line
delay, 70 [mΩ/m] Length-related resistance
For more information about cables, you can refer to MAPCS cables products datasheet
(MAPCS/CP-IEP-PR/PR-01/01)
4.4 Fixing the Backplanes and the Modules

It is considered for each module a screw for fixation of it to backplane. In the following
figure a typical module is shown, there are some LEDs on the front of each module for
monitoring the state of operation or I/Os.
LED’s
Screw for Fixation of the Module to Backplane
Figure 4-5: Typical Modules
Page 66 of 81
d. Rack address switch

f. Redundant connection,
male connectors (DB1)
Slot 1 a. Module connectors
Slot 2
Slot 3
Slot 4
c. Redundant
connection, female
connectors (DB2)
e. Terminals
Figure 4-6: Back Plane and Modules Terminal
 Module Connectors:
Redundant Connection, Female Connectors – when more than one Backplane exist
in the same rack, they must be connected via a connection cable connected to cable
connectors (c) and (f);
 Rack Address Switch;
 Terminals – Modules’ I/O terminals;
Redundant Connection, Male Connectors – when more than one Backplane exist in
the same rack, they must be connected via a connection cable connected to cable
connectors (c) and (f);
4.5 To Install a Backplane in a Cabinet

The backplane can be easily tied on a plate of a cabinet using screw-driver. Four screws
are placed on the backplane for this purpose.
Page 67 of 81
4.6 Adding Backplanes (Local I/O Expansion)

Local I/O expansion is the process of adding more Backplanes connecting them through
the Backplanes. A connection cable is used for this purpose. Different sizes are available
to reach different situations.
Connect the new Backplane with the previous one by using a selected connection cable.
 Don’t forget to place a terminator tin the first and the last Backplanes.
 Set the address for the new Backplane using the Rack switch address.
4.7 How to Install a Module

Locate the tab on the top of a free Slot in the Rack;
Mount the Module by inserting the tab in the “Square hole” on the back top of the Module
box.
Use it as a rotating latch.
Latch the Module on the connector (slot) of the Backplane by pressing it.
Use a screw-driver to tie the Module in the Backplane with locking screw located at the
bottom of the Module box.
4.8 Rack Connection

A simple MAPCS rack connection can be performed as shown in Figure 4-10.
Page 68 of 81
Figure 4-7: Example of Rack Connection
Max 16 rack are permitted

Max 64=16*4 Module are permitted
Max 2 MPU are permitted
Max 62=64-2 Io Module are permitted
4.9 Cables
All cables that should be connected to the system are mentioned in Table1, yet there are
some key points about the cables:
 To reduce EMI effect on system all data cables like Ethernet, BACKPLANE BUS
and Modebus must be shielded twisted pair.
 For other cables like power, analog or digital signals it is not necessary to use
shielded cables, but it is recommended to reduce EMI effect these cables should
Page 69 of 81
be configured as shielded and twisted pair (wherever possible like dual ended
analog signals) .
 For reducing noise effect on analog signal cables in long distance shielded
twisted pair cable should be used.
For more information about cables, you can refer to MAPCS cables products datasheet
(MAPCS/CP-IEP-PR/PR-01/01)
Page 70 of 81
MAPCS Control System Display Elements
Chapter 5
Display Elements
Page 71 of 81
5 Display Elements
In order to display different states occurring in I/O and MPU modules and monitoring
their states, some LEDs are used. In this document different device states are being
described and presented.
5.1 MPU display elements

The built-in LED indicators display the status of the device. The list of LEDs is given
here:
Table 5-1: MPU LED List
Status Indication LEDs:

Power, Run, Standby, Fault, Status 1, Status 2
The following table shows the symbols used in this document for the various indications
of the display elements (LED block).
Table 5-2: MPU Indication Of Display Elements
Symbol Indication of display elements

Off
Permanent on (green or yellow or red)
Blinking green/red
BLINK: The frequency is 1 Hz, but for the Status 1 / 2 LEDs this issue depends on the
scan time.
5.1.1 Device Status Indication

Based on LEDs on and off state, different device status are defined as shown in the
following table.
Page 72 of 81
Table 5-3: MPU Status Indication LEDs
LEDs / Status Status

Power Run Standby Fault
MPU States 1 2
Initialization
No Tag (Main)
No Tag (Backup)
No Schedule (Main)
No Schedule (Backup)
Running on Schedule (Main)
Running on Schedule
(Backup)
Synchronization
Out of Service
Error on LAN (Main)
Error on LAN (Backup)
5.1.2 Status Definition

Initialization: is the State in which the MPU enters after power on. During this state the
power on self-test routine is executed for checking the MPU parameters before run.
When this phase is over, the Run or Standby LEDs will blink or become steady
depending on the MPU’s last status and the device will be ready for normal operation.
No Tag (MAIN): is the state in which the MPU enters after initialization while no tag is
assigned to the MPU and it is physically plugged in the position of the main MPU.
No Tag (BACKUP): is the state in which the MPU enters after initialization while no tag
is assigned to the MPU and it is physically plugged in the position of the backup MPU in
a redundant set.
Running on Schedule (MAIN): is the state in which the MPU enters after its tag is set
but have no schedule yet and it is physically plugged in the position of the main MPU.
Running on Schedule (BACKUP): is the state in which the MPU enters after its tag is
set but have no schedule yet and it is physically plugged in the position of the backup
MPU in a redundant set.
Page 73 of 81
Run (Main): is the state in which the MPU enters after initialization while it is running the
current schedule and is physically plugged in the position of the main MPU.
Run (Backup): is the state in which the MPU enters after initialization while it is running
the current schedule and is physically plugged in the position of the backup MPU in a
redundant set.
Synchronization: is the state in which the backup MPU is running the synchronization
phase and is synching its schedule with the main MPU.
Out of service: is the state in which the MPU enters in case of any fatal error.
Error on LAN: is the state in which the CPU detects an error on its LAN connection.
Note: In each of the states of Initialization, Run and Sync of main or backup MPU, if the
Fault LED turns on, it indicates that the BACKPLANE BUS does not work properly.
Note: Two states of “Synchronization” and “No Tag (Backup)” shall be distinguished by
considering the main MPU state. When main MPU is in run mode, then the backup is in
synchronization mode, but if the main MPU has no tag, then the backup MPU has no tag
as well.
Page 74 of 81
Table 5-4: HSE Link Status Indication Leds
Display element Description

DA (HSE) HSE- DATA (GREEN LED)
No data traffic / No link
Data traffic available, Link ok
No data traffic / Link ok
LS (HSE) HSE- Link Status (YELLOW LED)
10 Mbps data connection
100 Mbps data connection
5.2 I/O Display elements

The built-in LED indicators display the status of the device. The list of LEDs is given in
the following table.
Status Indication LEDs:

Power, Run, Standby, Fault, Status 1, Status 2
The following table shows the symbols used in this document for the various indications
of the display elements (LED block).
Table 5-5: I/O Indication Of Display Elements
Symbol Indication of display elements

Off
Permanent on (green or red)
Blinking green/red
BLINK: The frequency is 1 Hz.
Page 75 of 81
5.2.1 Device Status Indication

Based on LEDs on and off state, different device status are defined as shown in the
following table.
Table 5-6: I/O Card Status Indication LEDs
LEDs /
Power Run Standby Fault Status 1 Status 2
I/O Card States
Initialization
Idle
Main
Bacplane Bus 1 Active
Main
Bacplane Bus 2 Active
Backup
Fail Safe Main
Fail Safe Backup
Out of Service
5.2.2 Status Definition

Initialization: The state in which the I/O card enters after power on. During this state the
power on self-test routine is executed for checking the card hardware components and
other software related parameters before run. When this phase is over, the Run LEDs
will blink and the device will be ready for normal operation.
Idle: The state in which the I/O card enters after initialization. In this state, all the input
and output signals are disabled because no configuration is received by the MPU.
Main: After receiving the configuration settings from the MPU the I/O Card enters this
state while all the functionality of the I/O Card is run and he data from / to the field is
being provided. In other words all the input / output signals are enabled in this state.
Backup: After receiving the configuration settings from the MPU the I/O Card enters this
state while all the functionality of the I/O Card is run except data providing and field
related alert generation. None of the Input Backup I/O Cards provide data to the MPU.
The Digital Input Cards can read the data simultaneously while the Analog Input Card
could not sense the field value as its signals are all disabled. MPU provides data for both
Main and Backup output IO Cards. But the Digital output Cards both put data on the
field, while only the Main Analog Output card applies data to its output.
Page 76 of 81
Fail Safe Main: The state in which the main card enters in case of failure in establishing
connection with the MPU. In this state the I/O Card applies the safe value on the output
signal.
Fail Safe Backup: The state in which the backup card enters in case of failure in
establishing connection with the MPU.
Out of service: is the state in which the I/O Card enters in case of any fatal error.
Table 5-7: I/O Channel Status Indication LEDs
Display element Description

Power 12 V System Voltage supply
No supply voltage
Supply voltage is OK
I/O Channels (Analog Input) Analog Value
WireBreak ( <1mA) / Field Power Failure
Analog Value Out of Range ( > 21mA ) ( <= 3mA & >= 1mA )
Analog Value in Range ( 3mA - 21mA )
I/O Channels (Temperature Input) Temperature Value
Input Sensor Open / Short Circuit / Field Power Failure
Temperature Value Out of Range
Temperature Value in Range
I/O Channels (Analog Output) Analog Value
Analog Value out of range / Field Power Failure
Channel Wire Break
Channel loop Closed and Value in range ( 1mA - 22mA )
I/O Channels (Digital) Logic Value
Logic Low
Logic High
Page 77 of 81
Chapter 6
Terminal Assignment
MAPCS Control System Terminal Assignment
6 Terminal Assignment
The following figure shows the pin number and names to be assigned for terminal
connection.
Table 6-1: Terminal Assignment DB25
Pin No Pin Name

2 Power 1
14 Power 1
15 Power 1
3 GND 1
4 GND 1
16 GND 1
17 BPBUS1-H
5 BPBUS1-L
18 BPBUS2-H
6 BPBUS2-L
19 BPBUS3-H
7 BPBUS3-L
12 Power 2
13 Power 2
25 Power 2
11 GND 2
23 GND 2
24 GND 2
8 NC
9 NC
10 NC
20 NC
21 NC
22 NC
1 Earth

Table 6-2: Terminal Connection between Two DB25
DB1 (Male) DB2 (Female)

Wire No. Pin
Pin No. Pin Name Pin Name
No.
1 2 Power 1 2 Power 1
4 3 GND 1 3 GND 1
5 4 GND 1 4 GND 1
6 16 GND 1 16 GND 1
BPBUS1-
17 17 BPBUS1-H
7 H
8 5 BPBUS1-L 5 BPBUS1-L
BPBUS2-
18 18 BPBUS2-H
9 H
BPBUS3-
19 19 BPBUS3-H
11 H
16 11 GND 2 11 GND 2
17 23 GND 2 23 GND 2
18 24 GND 2 24 GND 2
19 1 Earth 1 Earth

Figure 6-1: Terminal Blocks
BPL 921D BPL 921S BPL 922S BPL 922D
DB connector Screw terminal 24 Screw terminal 40 Pin DB connector 2*DB25

2*DB25 pin
Table 6-3: Terminal Blocks & I/O Modules
Module Terminal Block

Type Description
Name Single Mode Redundant Mode
DI DI530 DI 32ch, 24 VDC, 0.5A BPL 921D BPL 922S, BPL 922D
DO 32ch, 24 VDC,
DO580 BPL 921D BPL 922S, BPL 922D
0.5A,Half Diagnostics
DO
DO 16, 24 VDC, 0.5A,Full
DO571 BPL 921D,BPL 921S BPL 922S, BPL 922D
Diagnostics
AI622 AI 8ch,4-20mA BPL 921D BPL 922S, BPL 922D
AI AI623 AI 8ch, 4-20mA, HART BPL 921D BPL 922S, BPL 922D
AI621 TI 8ch, RTD/TC BPL 921D BPL 922S, BPL 922D
AO672 AO 8ch, 4-20mA BPL 921D,BPL 921S BPL 922S, BPL 922D
AO
AO673 AO 8ch, 4-20mA, HART BPL 921D,BPL 921S BPL 922S, BPL 922D

MAPCS Hardware Configuration

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

MAPCS Hardware Configuration

Uploaded by

Copyright:

Available Formats

MAPCS

2 Overview of a Programmable Controller System .................................................... 19

3 MAPCS Modules ..................................................................................................... 22

3.3.3 AI621 Analog Input Module (TI, RTD/TC) ................................................. 49

4 Installation of MAPCS hardware ............................................................................. 63

5 Display Elements..................................................................................................... 72

6 Terminal Assignment............................................................................................... 79

Table 3-1: MAPCS Hardware List ................................................................................... 22

Hardware Configuration Page 4 of 81

Figure 3-26: AI621 Front View ........................................................................................ 49

1.1 MAPCS Control System Overview

1.2 MAPCS Control Platform

Figure 1-1: MAPCS Typical Architecture

1.3 FOUNDATION Fieldbus as the basis of MAPCS

1.4 Hardware Components

Figure 1-2: PPC Controllers

1.4.3 Linking Device

1.5 Fieldbus connectivity

Figure 1-3: Linking Device Connectivity

1.5.3 MAPCS HART Connectivity

1.6 MAPCS Main Features

1.7 MAPCS Function Block List

No Block Name Block Type Category Block Library

No Block Name Block Type Category Block Library

No Block Name Block Type Category Block Library

1.7.1 SFC Block

Hardware Configuration Page 18 of 81

2 Overview of a Programmable Controller System

Interface Functions to Sensors and Actuators

Figure 2-1: Basic Functional Structure Of A Programmable Controller System

Figure 2-2: Programmable Controller Hardware Model (From IEC61131- Part5)

Hardware Configuration Page 21 of 81

Item Description Part Name Order Code

Digital Modules MAPCS-G---0D-----

Hardware Configuration Page 22 of 81

Other Backplane Accessories MAPCS-S----BPL----

3 MCS_CAN+PwerCble2xDB25_1mC\2mP ----- MAPCS-SEAC-CBL-AØ1

4 MCS_CANBUSTermintor+2mPwerCble ----- MAPCS-SEAC-CBL-DØ1

I/O Signal Cables MAPCS-SEAC--------

Table 3-2: Common Specifications of MAPCS Modules

Figure 3-1: Terminals And Screws

3.1.1 MPU431 Main Processing Unit

3.1.1.2 Indicator LEDs

Figure 3-2: MPU431 Front View

Table 3-3: MPU431 specifications

Power consumption (from backplane Maximum : 6W

3.2 Digital I/O Modules

3.2.1.3 LED List

Figure 3-3: DI530 Front View

Figure 3-4: Schematic of DI530 Module

Figure 3-5: DI530 Wiring for BPL 921D Terminal

Figure 3-6: DI530 Wiring for BPL 922S Terminal

Table 3-4: DI530 Specification

Maximum permissible input voltage ±40V DC

Input high level (1) 13V DC to 30V DC

Typical Input current (at 1 signal) 4mA @ 24V DC

Maximum Input Current 12mA @ 40V DC

Maximum permissible quiescent current 1mA

Isolation type (to backplane bus) Optocoupler

Isolation between bus and analog section 2500V DC

3.2.3 DO580 Digital Output Module

3.2.3.3 LED List

3.2.3.4 Description Figure 3-7: DO580 Front View

Figure 3-8: Schematic of DO580 Module