‘Load: Vas = 7—0.25 = 6.75, Vos = 5-0.25 = 4.75 Vr uae *1+0.4(Y0.25+0.6 - V0.6) = 106 V; 1 k, 2) _ 2" AEpt(2(7— Vo, ~1L06)(5~Vor)~(S~ Vor)") = imi 10(2(5—1)Vox ~ Vox?) Solve for Vo, since V,, is small, no iteration of V,, is needed in this case. Voy, = 0.39V 7.6 A store has one express register and three regular ones. It is the store policy that the express register is open only when two or more of the other registers are busy. Assume that the boolean variables A, B, and C reflect the status of each of the regular registers (1 busy, 0 idle). Design the logic circuit, with A, B, and C as inputs and F as output, to automatically notify the manager (by setting F=1) to open the express register. Present two solutions, the first using only NAND gates, the second using only NOR gates. SOLUTION: For NAND gate implementation, F=AB+AC+BC For NOR gate implementation, F=(A+BYA+C\B+C)= C) (A+ B)+(AtC)+(BFC) 7.7 Calculate Vy Vor Vay Var NM, and NM, for a two-input NOR gate fabricated in a Compare your answers with SPICE. SOLUTION: First find the equivalent inverter for the NOR gate. (W/L)... =2(W/L), therefore 56Calculate V,, Vous = 0. 75Vjy ~ 1.425 ¥, & (Var ~Yran “8 Va = (Vir ~ Vy =2.76 V NM, =1.65-0=165 V NM, =5-2.76=2.24 V SPICE input list: ml 3.1.0 0.mm wetu Intu 2.3.10 0 mm welu Inlu m3.3.1 4/5 mp wedu letu md 415 5 mp wedu Inte 50 a 5.0 1040 model mn mos (vto=0.7 kp=é0u ganman0.) ‘model mp pmos (vtow-0.7 kp=20u gamma=0.) sde vin 0 5 0.05 sprint de v(3) send 4 SPICE results: 7