BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI

WORK-INTEGRATED LEARNING PROGRAMMES DIVISION

BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
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1. Assuming all the numbers are in 2’s complement representation, which of the following
is divisible by 11110110? [ B ]
(A) 11101010 (B) 11100010 (C) 11111010 (D) 11100111

2. If (84)x (in base-x number system) is equal to (64)y (inbase-y number system), then
possible values of x and y are [ C ]
(A) 12, 9 (B) 6, 8 (C) 9, 12 (D) 12, 18

3. Let A = 1111 1011 and B = 0000 1011 be two 8-bit signed 2’s complement numbers.
Their product in 2’scomplement representation is [ A ]
(A) 11001001 (B) 10011100 (C) 11010101 (D) 10101101

4. Let r denotes number system’s radix. The only value(s) of r that satisfy the equation
√3 ( 1331 )r= (11)r is/are [ D ]
(A) 10 (B) 11 (C) 10 and 11 (D) any r > 3

5. X is 16-bit signed number. The 2’s complement representation of X is (F76A)16. The 2’s
complement representation of 8 * X is [ D ]
(A) (1,460)16 (B) (D643)16 (C) (4,460)16 (D) (BB50)16

6. The HEX number (CD. EF)16 in octal number system is [ A ]

(A) (315.736)8 (B) (513.637)8 (C) (135.673)8 (D) (531.367)8

7. 8-bit 2’s complement representation a decimal number is 10000000. The number in

decimal is [ C ]
(A) +256 (B) 0 (C) -128 (D) -256

8. The range of signed decimal numbers that can be represented by 7-bit 1’s complement
representation is [ B ]
(A) -64 to +63 (B) -63 to +63 (C) -127 to +128 (D) -128 to +127

9. Decimal 54 in hexadecimal and BCD number system is, respectively, [ B ]

(A) 63, 10000111 (B) 36,01010100 (C) 66, 01010100 (D) 36, 00110110
 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________

10. A new binary-coded hexadecimal (BCH) number system is proposed in which every digit
of a base-6 number system is represented by its corresponding 3-bit binary code. For
example, the base-6 number 35 willbe represented by its BCH code 011101
In this numbering system, the BCH code 001001101011 corresponds to the following
number in base-6 system. [ C ]
(A) 4,651 (B) 4,562 (C) 1,153 (D) 1,353
11. The signed 2’s complement representation of (-589)10 in hexadecimal number system is
[B]
(A) (F24D)16 (B) (FDB3)16 (C) (F42D)16 (D) (F3BD)16

66
12. The base of the number system for which the following operation is to be correct =13.
5
[ D ]
(A) 6(B) 7(C) 8(D) 9

13. The solution to the quadratic equation x2 - 11x + 13 = 0 (in number system with radix r)
are x = 2 and x = 4.Then, the base of the number system is (r =) [ C ]
(A) 7(B) 6(C) 5(D) 4

14. The 16’s complement of BADA is [ B ]

(A) 4,525 (B) 4,526 (C) ADAB (D) 2,141

15. In expression (11A1B)8 = (12CD)16,A and B represent positive digits in octal number
system, and C and D positive digits in octal number system, and C and D values of A and
B? [ D ]
(A) 2, 5 (B) 2, 3 (C) 3, 2 (D) 3, 5

16. The output of the following circuit is [ B ]

(A) 0 (B) 1 (C) A (D) A1

17. The circuit that will work as OR gate in positive level will work as ______ gate in
negative level logic [ D ]
(A) NOR gate (B) NAND gate (C) Both NAND and NOR gate (D) AND gate

18. Four logical expressions are given:

 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________

(a) Á . B́ . Ć . D́. É . F́ . Ǵ . H́
´ CD
(b) AB. ´ . EF ´ . GH ´
(c) Á+ B́+ Ć+ D́+ É+ F́+ Ǵ+ H́
(d) ( Á+ B́ ) ( Ć+ D́ ) ( É+ F́ ) ( Ǵ+ H́ )
Two of these expression are equal. They are [ B ]
(A) c and d (B) b and d (C) a and b (D) a and c

19. For the logic circuit shown in figure, the simplified Boolean expression for the output y is
[ C ]

(A) A + B + C (B) A (C) AB Ć (D) B Ć

20. The above mentioned circuit is used to implement the function Z=f ( A , B )= Á+ B .What
values are to be selected for I and J? [ B ]

(A) I = 0, J = B (B) I = 1, J =B (C) I = B, J = 1 (D) I = B, J = 0

21. The binary number 110011 is to be converted to Gray code. The number of gates and
type required are [ D ]
(A) 6,AND (B) 6,XNOR (C)6,XOR (D)5,XOR
 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________

22. The number of 4-line to 16-line decoder required to make an 8-line to 256-line decoder is
[ B ]
(A) 16 (B) 17 (C) 32 (D) 64

23. f(x2, x1, x0) = ? [ B ]

(A) ∏(1, 2, 4, 5, 7) (B) Σ (1, 2, 4, 5, 7) (C) Σ (0, 3, 6) (D) ∏(0, 2, 3, 6)

24. The MUX shown in the figure is 4 × 1 multiplexer, the output Zis [ D ]

(A) ABC (B) A ⨁ B ⨁C (C) A ⊙ B ⊙ C (D)A+B+C

25. The function implemented by decoder. [ D ]

 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________

(A) X = Á B Ć + B́ Ć ,Y =A + B
(B) X = Á Ć+ B́ Ć , Y =1
(C) X = Á , Y =0
(D) X = Á , Y =1

26. The given circuit act as [ C ]

(A) full adder (B) half adder (C) full subtractor (D) half subtractor

27. The Boolean function realized by logic circuit is [ D ]

 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________

(A) F=∑ m ( 0,13,5,9,10,14 )

(B) F=∑ m ( 2,3,5,7,8,12,13 )
(C) F=∑ m ( 1,2,4,5,1114,15 )
(D) F=∑ m ( 2,3,5,7,8,9,12 )

28. How many flip-flops are needed for MOD – 16 ring counter and MOD – 16 Johnson
counter [ B ]
(A) 16, 16 (B) 16, 8 (C) 4, 3 (D) 4, 4

29. 12 MHz clock frequency is applied to a cascaded counter of MOD – 3 counter, MOD – 4
counter and MOD– 5 connecter. The lowest output frequency is? [ A ]
(A) 200 kHz (B) 1 MHz (C) 3 MHz (D) 4 MHz

30. If we need to design a synchronous counter that goes through the states 00 → 01 → 11 →
10 → 00 using D flip-flop, what should be the input to the flip-flops? [ B ]

(A) D 0=Q 0 , D 1=Q́ 1

(B) D0=Q́ 1 , D1=Q0
(C) D 0=Q́ 1 . Q 0 , D 1=Q́ 1 Q́ 0
(D) D0=Q́ 0 , D1=Q1
 BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK-INTEGRATED LEARNING PROGRAMMES DIVISION
BITS BITS-WIPRO Collaborative Programme: M. Tech in Software Systems (WASE)
& M Tech in Computing Systems & Infrastructure(WIMS)
Second Semester 2019-2020
DEMP Quiz 1
_____________________________________________________________________________________