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Burgos, Ric Charles R.

CSAL01E
Quiz 1

1. Explain the differences among the three types of cache memory.


There are three types of cache memory the L1, L2, and L3 cache. In order, they have an
increasing size and decreasing speed. L1 cache size varies from 64KB to 512KB, L2 varies from 4
MB to 8MB, and lastly, L3 varies from 10 MB to 64 MB.
L1 cache is divided into two sections: L1 Data Cache and L1 Instruction Cache. L1 cache
not only works as the instruction cache, but it also holds pre-decode (existing before the
implementation of a code) data and branching information.
L2 cache is much larger than L1 but at the same time slower as well. L3 cache is the
largest and also the slowest L2 and L1 are smaller and faster than L3 and are separate for each
core.

2. Explain the diagram below.

The Diagram shows that when the CPU needs data, it first searches the L1 cache. If it’s
not found, the L2 and L3 caches are searched next. If the necessary data is found, it’s called a
cache hit. However, if the data isn’t present in the cache, the CPU has to request it to be loaded
on to the cache from the main memory or storage. This takes time and badly affects
performance. This is called a cache miss.
Usually, the size of the data affects how fast the CPU searches the data. The larger the
data, the longer it may take for the CPU to request it. The analogy of the process can be related
when transporting something heavy as opposed to transferring something light-weight. It will
take time to transfer the heavy one.

3. Give 5 significant information about cache direct mapping.


The simplest technique, known as direct mapping, maps each block of main memory into
only one possible cache line. Which means that every location maps onto a unique block.
The line number of cache to which a particular block can map is given by:
Cache line number = (Main Memory Block Address) % (Number of lines in Cache)
If a line is previously taken up by a memory block when a new block needs to be loaded,
the old block is removed.
The direct-mapped cache uses the physical address, not the linear address. Even if an
address is adjacent to the linear/virtual address, the physical addresses that the OS gives to the
application memory are not required to be.

References:
https://www.makeuseof.com/tag/what-is-cpu-cache/
https://www.hardwaretimes.com/difference-between-l1-l2-and-l3-cache-types-and-
importance-of-cpu-cache/
https://www.geeksforgeeks.org/cache-memory-in-computer-organization/#:~:text=In
%20Direct%20mapping%2C%20assigne%20each%20memory%20block%20to,the%20rest%20is
%20stored%20in%20the%20main%20memory.
https://www.sciencedirect.com/topics/computer-science/direct-mapped-cache
https://www.gatevidyalay.com/direct-mapping-cache-mapping/

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