G5 Imac A1058 051-6482

PAGE PDF CIRCUIT BLOCK PAGE PDF CIRCUIT BLOCK
1 1 TABLE OF CONTENTS 48 38 U3LITE AGP

2 2 SYSTEM BLOCK DIAGRAM 49 39 GPU AGP
3 3 POWER BLOCK DIAGRAM 50 40 GPU VREG
4 4 REVISION HISTORY 51 41 EXTERNAL TMDS TRANSMITTER
6 5 FUNC TEST 52 42 GPU FRAME BUFFER
7 6 POWER CONNECTOR / POWER ALIAS 53 43 FRAME BUFFER TERMINATION GRAPHICS
8 7 SIGNAL ALIAS 54 44 GRAPHICS DDR SDRAM A
9 8 2.5V VREG 55 45 GRAPHICS DDR SDRAM B
10 9 1.2V VREG 56 46 GPU STRAPS
11 10 3.3V/5V PWRON SWITCHING TOP 57 47 GPU DAC & CLOCKS
13* 11 SMU 58 48 GPU DVI & STRAPS
14 12 CPU LOGIC ANALYZER CONNECTOR 59 49 EXT VGA & TMDS
16 13 CPU FAN 2 AND SYSTEM FAN CONTROL 60* 50 U3LITE HYPERTRANSPORT
17 14 CPU FAN 1 CONTROL 62* 51 SHASTA HYPERTRANSPORT
HT
18 15 I2C CONNECTIONS 64 52 HYPERTRANSPORT LA CONNECTORS
21* 16 INDICATOR LED 74* 53 SHASTA PCI
22 17 U3LITE CORE 75* 54 BOOT ROM
23 18 SHASTA CORE 76 55 AIRPORT EXTREME PCI
24 19 U3LITE MISC 77* 56 USB2 PCI
25* 20 SHASTA SERIAL 80* 57 SHASTA DISK
26 21 PULSAR POWER 83 58 DISK CONNECTORS
DISK
27 22 PULSAR CLOCKS 84* 59 SHASTA ETHERNET
28* 23 U3LITE APPLE PI 87 60 ETHERNET PHY & CONNECTORS
ETHERNET
29 24 NEO APPLE PI 88* 61 SHASTA FIREWIRE
30 25 CPU STRAPS 90 62 FIREWIRE A PHY & CONNECTORS
FIREWIRE
31 26 NEO POWER & BYPASS PROCESSOR 91* 63 USB HOST INTERFACE
32 27 CPU BYPASS 92 64 USB DEVICE INTERFACE USB
33 28 CPU VREG 94 65 MODEM CONNECTOR MODEM
34 29 CPU VREG 95* 66 AUDIO CODEC, LINE IN, MIC IN
35 30 CPU VREG OUTPUT CAPS 96* 67 HEADPHONE / LINE OUT
36 31 CPU DIODE CONDITIONER 97* 68 SPEAKER AMP AUDIO
37* 32 U3LITE MEMORY 98* 69 AUDIO CONNECTORS
38 33 SERIES TERMINATION 99* 70 AUDIO POWER SUPPLIES
40 34 DIMMS
44 35 PARALLEL TERMINATION
MEMORY
45 36 PARALLEL TERMINATION
46 37 VTT VREG
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
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8 7 6 5 4 3 2 1
U2900
CPU
NEO 10S U1300
U1301
PAGE 29
J5900, J5901
J5902, J5903
SMU RTC
17",20" INVERTER PAGE 13
PAGE 13
TMDS 32-BIT
D EXT VGA
PAGE 59
APPLE PI
ELASTIC INTERFACE
D
1.2V/900MHZ
J4000
J4001
APPLE PI
MAIN MEMORY
PAGE 28
U4900
U5400, U5401
U3 SERIES
DIMMS PARALLEL
PAGE 37
FRAME 64-BIT GPU 32-BIT
AGP
64/128-BIT
MAIN MEMORY TERM TERM
BUFFER A
FRAME BUFFER
2.6V/540MHZ
8X AGP
PAGE
U3LITE 2.6V/400MHZ
PAGE 38 PAGES 44&45
NV18B/NV34 0.8V/533MHZ
48 CORE
333MHZ SUPPORTED
PAGE 54 4X = 1.5V
I/O = 1.5V
PAGE 22
PAGE 49 PAGE 40 J9210/J9220/J9230
MISC HYPERTRANSPORT
PAGE 24 PAGE 60
USB
64-BIT
FRAME BUFFER
CONNECTORS
PAGE 92
2.6V/540MHZ 8-BIT
HYPERTRANSPORT J9400
1.2V/400MHZ To Shasta
MICRODASH MODEM
CONTROL = 2.5V SCCA
U5500, U5501
CONNECTOR
U2600
PAGE 94
FRAME
PULSAR BUFFER B I2C J6400 J9240
C POWER CLOCKS PAGE 55

PAGE 18
J6401
J6402
1 2 3 4 5
BLUETOOTH C
PAGE 26 PAGE 27
HT CONNECTOR
DEBUG USB PAGE 92
PAGE 91
PAGE 64 U7700
U7500 J7600
AIRPORT USB 2.0

BOOTROM EXTREME uPD720101
CONNECTOR PCI
PAGE 75 PAGE 76 PAGE 77
JXXXX
SATA HYPERTRANSPORT
SATA1
EDUCATION: NOT USED
PAGE 74
SATA/150
GOOD,BETTER,BEST: HARD DRIVE CONNECTOR
PCI
PAGE 62
1.2V/1.5GHZ
PAGE 80
SATA
PAGE 83 32-bit PCI (5V-3.3V/33MHz)

U2300
J8302
SATA DEV
SATA2
GPIO/PCI64
FOR DEVELOPMENT ONLY
CONNECTOR SATA/150
SHASTA
PAGE 25
1.2V/1.5GHZ
PAGE 83
PAGE 80
UATA
J8301
B EDUCATION: HARD DRIVE UATA UATA/133 CORE NCs

J9401
B
GOOD,BETTER,BEST: OPTICAL
CTL-LESS /
CONNECTOR 3.3V/133MHZ PAGE 23 PAGE 91
SOFT MODEM
PAGE 83 ETHERNET FIREWIRE
I2S CONNECTOR
PAGE 25
PAGE 94
PAGE 84 PAGE 88 SCCA SCCB
I2S0 I2S1 I2S2
1394 OHCI (3.3V/98MHz)
8-bit TX & 8-bit RX
GMII (3.3V/125MHz)
8-bit TX/RX
U9500
S/PDIF OPTICAL OUT
J9803
AUDIO CODEC COMBO OUT
CONNECTOR
PCM3052 LINE OUT
PAGE 98
U8700 U9000
AMP LINE OUT
PAGE 95 PAGE 97
10/100 ETHERNET FIREWIRE A
J9801
BCM5221 802A SPEAKER
PAGE 90
AMP
SPEAKER
A PAGE 87 0 1 LINE IN
AMP
PAGE 97
CONNECTOR A
PAGE 98
PAGE 97
4 Diff pairs 2 Diff pairs
J8700 J9000, J9001

J9800 J9802
ETHERNET FIREWIRE A LINE IN MIC
CONNECTOR CONNECTORS CONNECTOR CONNECTOR
PAGE 87 PAGE 90
PAGE 98 PAGE 98
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SYS_POWERUP_L
SMU
POWER SEQUENCE PIN

J700 SYS_POWERUP_L
PAGE 7
POWER CONNECTOR 10
10
TURN_ON_SHASTA_CORE_L
TURN_ON_PP1V2_L
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_1
13
13
D PP24V_RUN PP12V_RUN PP5V_RUN PP5V_ALL PP3V3_RUN SMU_PWRSEQ_P9_5 13 (PWR_GOOD_SB_CORE) D

FW CONN 20" PANEL POWER HDD & OPTICAL PCI BUS SMU_PWRSEQ_P9_6 13 (PWR_GOOD_PP2V5)
20" LCD INVERTER 20" LCD INVERTER AUDIO CODEC
SMU_PWRSEQ_P1_2 13 (TURN_ON_VTT)
5V
PP3V3_ALL
PP3V3_ALL
LINEAR
1
PAGE 11 R331
10K
FW PHY 5%
3.3V SMU
1/16W
MF
2 402
PWR_GOOD_SB_CORE
PP5V_RUN_CPU 6 7 30 31 36
PP5V_RUN_AUDIO CPU CORE PP2V5_RUN_CPU_AVDD PP5V_PWRON PP3V3_PWRON PP1V2_SHASTA_CORE

C LINEAR SWITCHER
ALIAS
CPU_AVDD_EN 31
LINEAR FET SWITCH FET SWITCH
GPU CORE
SWITCHER IN C
PAGE 31 PAGE 11 PAGE 11 PAGE 10 IRU3037ACS
PAGE 99 SC2643VX*1
PAGE 33 SC1211*4
2.5V CPU AVDD
5V USB CONN
3.3V ENET PHY SWITCHER 1.2V SHASTA CORE
5V HP/LINEOUT AMP
0.8~1.2V GPUL
UDASH MODEM USB2 HOST
PAGE 50 IRU3037CS
MODEM & BT
1.6/1.4V NV18B/NV34 3
11 RAIL_CTL_NEG 8 LM339A
V+ SOI
23 10 6 PP1V2_PWRON_SB_VCORE 14
PP2V5_PWRON U3LITE CORE R330 U1100
PP4V5_RUN_AUDIO 1
100K 2 COMPARE_SB_CORE 9 GND
LINEAR SWITCHER SWITCHER IN

5% 12
PAGE 9 IRU3037CS PAGE 22 IRU3037CS
1/16W
MF
1 C330
PAGE 99 402 0.01UF
SHASTA HT 20%
16V
4.5V AUDIO CODEC
2.62V DDR DIMM
1.5V U3LITE CORE
PP1V2_PWRON PP1V2_RUN 2 CERM
402
PP2V5_PWRON FET SWITCH IN FET SWITCH IN
PAGE 10 PAGE 10
IN
PWRON_SD HT BUS
PWRON_DISK_SB API BUS
PP2V5_RUN PP1V5_PWRON
FET SWITCH LINEAR PP5V_ALL
PAGE 9 PAGE 50 PP3V3_ALL
RAM TERM
1.5V PULSAR CORE 1
R342
B GRAPHIC FB
5%
150K 1
R341
B
1/16W
MF 10K
2 402 3
5%
1/16W
6 LM339A MF
PS_2V_REF 2 402
SOI
PP1V25_RAM_VTT PP1V5_RUN V+
1 PWR_GOOD_PP2V5
R340 U1100
LINEAR IN
POWER SW 1
100K 2
COMPARE_PP2V5 7 GND
PAGE 50 5% 12
PAGE 46 1/16W
MF 1 C340 1
1.25V RAM VTT
AGP BUS 402
0.01UF R343
20%
16V 100K
2 CERM 5%
402 1/16W
MF
2 402
46 TURN_ON_VTT
A A
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DATE DESCRIPTION
10/08/03 PROTO RELEASE (REV 09) 11/19/03 STUFFING CHANGES FOR ETHERNET RESET
CHANGED XW3302 TO LAYER 6 SHORT
10/13/03 CHANGED ALL 4 NB AVDDS TO PP1V5_PWRON_NB_AVDD RAIL POWER BUTTON CONNECTOR SYMBOL UPDATED
TERMINATION FOR VSP CLOCK NOW TRACKS PP1V2_HT RAIL UPDATED CRITICAL LIST
TERMINATION FOR NB CLOCK NOW TRACKS PP1V2_EI_NB RAIL CHANGE Y5700 TO 4 PIN CRYSTAL
TERMINATION FOR CPU CLOCK NOW TRACKS PP1V2_EI_CPU RAIL CHECKIN 12005
NO STUFFED R1303 BECAUSE WHITE LED IS ACTIVE HIGH
11/20/03 CHANGED R2700 TO 22OHM AND NOSTUFFED
D ADDED 5 PULLDOWNS FOR CPU VID SIGNALS
UNCONNECTED THERMAL PAD FOR U9600 HEADPHONE AMP
CPU VID SET TO 1.475V D
J1400 CHANGED TO NOSTUFF
CHECKIN 09001
CHANGED HALF OF DIMM AND VTT DECOUPLING TO 1UF
EVT1 RELEASE (REV 13)
10/14/03 ADDED 4 SMT NUTS
U3600 PIN 6 TO PP5V_RUN
CHECKIN 09002
10/15/03 SWAPPED EI_CPU_TO_NB_AD17 WITH EI_CPU_TO_NB_AD24 ON J1400

BOM CHANGES FOR R2910, R5727, R9139, R9810
MAIN PROTO RELEASE (REV 10)
11/03/03 REPINNED J9240 BLUETOOTH CONNECTOR

MANY MIN_NECK_WIDTH UPDATES
DC-DC UPDATES ON PAGES 9,10,22,33,34,50
NEW CONNECTORS FOR MODEM AND PATA
ADDED GAP FILLER
CHANGED PART NUMBER OF NV18B
MOVED SERIES TERM FOR PULSAR CLOCKS TO LOGIC ANALYZER PAGE
ADDED NET_SPACING_TYPE=PROC_DIFF TO TDIODE_POS, TDIODE_NEG, KPVDD2, AND KPGND2
CHANGED PULSAR 2.2UF CAPS TO 10%
MASTER PAGE SYNC
CHECKIN 10001
11/04/03 NEW AIRPORT CONNECTOR

ADDED LEDS FOR 5V ALL RAIL AND PANEL POWER
CHANGED DS870X TO LED870X TO FOLLOW CONVENTION
REPLACED POWER CONNECTOR
C MASTER PAGE SYNC

RELEASE REV 11
C
11/10/03 J8301 PATA CONNECTOR ROTATED 180 DEGREES
MIN_LINE_WIDTH AND MIN_NECK_WIDTH UPDATES THROUGHOUT
ADDED EMI-SPRING AND TIED TO GND_CHASSIS_MODEM
UPDATED CRYSTAL CONSTRAINTS
FIREWIRE NET NAME CHANGES TO MATCH NAMING CONVENTION
CHANGED Q1001 TO NTD60N02R
CHANGED PULSAR SERIES TERM R2707, R2719, R2701, R2761, R2779 TO 0 OHM
CHANGED ZH700 AND ZH701 TO HOL-315R138
CHANGED 20" INVERTER TO 518-0141
CHANGED U3LITE P/N TO V1.1
MASTER PAGE SYNC
CHECKIN 11001
11/11/03 PLL-LOCK LED CHANGED TO GREEN

SMU PART# UPDATED
DC/DC NET NAME FIXES ON PAGES 9,10,22
ADDED SERIAL SIGNALS TO AIRPORT CARD FOR NEW MARTY CARD
PULSAR SERIES TERM - CHANGED R2705,R2711,R2702 TO 0 OHM. R2770 -> 20 OHM
CHANGED SHASTA P/N TO V1.1
UPDATED POWER SEQUENCING TO MATCH SMU PINOUT 1.4
NO_TEST UPDATES
ADDED 6 OUTPUT CAPS (124-0322) TO CPU VCORE VREG
MASTER PAGE SYNC
CHECKIN 11002 - EVT DESIGN REVIEW
B 11/13/03 CHANGED CRYSTAL Y5700 TO 197S0026

LED3002, LED3600, AND LED800 CHANGED TO D3002, D3610, AND D810 P/N 378S0042
B
CPU POWER SUPPLY FETS - VISHAY USED ON SAMSUNG BOMS AND ON SEMI ON HYNIX BOMS
CHANGED INPUT CAPS TO 124-0323
INPUT AND OUTPUT CERM CAPS MARKED AS CRITICAL
NEW LARGER CAP FOR VTT VREG. C4609 CHANGED TO 128S0022. C4608 NOSTUFFED
BOMOPTIONS AND SCHEMATIC CLEANUP TO AGP (BUSY, STOP, TYPEDET, GCDET)
CHANGED 20" INVERTER DECOUPLING TO TWO 1UF 1210 CAPS
ADDED MORE POWER AND GROUND SHORTS FOR AUDIO
ADDED NET_SPACING_TYPE=PROC_DIFF TO DIFF PAIRS THAT DIDN’T HAVE IT
MASTER PAGE SYNC
RELEASE REV 12
11/14/03 CHANGED PCI_CLK33M_SB_EXT NET NAME ON PAGE 27 FOR REUSE. ALIAS ADDED ON PAGE 8
ADDED ECSET FOR PLS_EXTCLK NET. DROPPED PROP DELAY FROM OTHER CRYSTALS
ALIASED PP5V_AUDIO TO PP5V_RUN RAIL
ADDED CIRCUIT SO 5V RAIL TO 17" INVERTER COMES UP AFTER 12V
R2742 CHANGED TO 806 OHM
MASTER PAGE SYNC
CHECKIN 12001
11/15/03 CHANGED J8303 TO 5 PIN CONNECTOR

CHANGED MICRODASH MODEM HEIGHT AND CHANGED TO DEVELOPMENT BOM OPTION
11/17/03 PIN SWAPPED L5908 FOR ROUTING
STUFFED TMDS INDUCTORS AND NOSTUFFED 0 OHM RESISTORS
CHANGED MODEM STANDOFFS TO 862-0035 AND ADDED ELECTRICAL CONNECTIONS
ADDED TWO MORE SMT NUTS FOR CPU HEATSINK
A CHANGED LED700,701,702,5900,8301,8700,8701,8702 AND D3001 TO 378S0045
MASTER PAGE SYNC
A
CHECKIN 12002
11/17/03 NO_TEST, FUNC_TEST UPDATES

CHECKIN 12003
11/18/03 CHASSIS MODEM NO LONGER TIES TO REST OF CHASSIS

ADDED CAPS TO GROUND FOR CPU HEATSINK SMT NUTS
CHANGED CRYSTAL FILTERING FOR PULSAR
MOVED RAM_CKE SIGNALS TO 62 OHM VTT PARALLEL TERM WITH 4.7K PULL-DOWN
ADDED POWER SEQUENCING FOR VTT VREG
MASTER PAGE SYNC
CHECKIN 12004
8
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PP12V_RUN PP5V_RUN PP24V_RUN
NO_TEST=TRUE TP_BUF_RST 57 I434 NO_TEST=TRUE TP_RAM_CKE_R<3> 37 90 IN FW_VP_PORT1 FUNC_TEST=TRUE 10 TEST POINTS PP5V_ALL PP3V3_RUN
NO_TEST=YES TP_DFPCLK 58 NO_TEST=TRUE TP_RAM_CKE_R<6> 37 90 FW_TPO1P FUNC_TEST=TRUE IN PP12V_RUN FUNC_TEST=TRUE
I433 IN
5 TEST POINTS
I3 NO_TEST=YES TP_DFPCLK_L 58 I436 NO_TEST=TRUE TP_RAM_CKE_R<7> 37 90 IN FW_TPO1N FUNC_TEST=TRUE 11 7 IN PP5V_ALL FUNC_TEST=TRUE
I4 NO_TEST=TRUE TP_DFPD0 58 I435 NO_TEST=TRUE TP_RAM_CS_L_R<10> 37 90 IN FW_TPI1P FUNC_TEST=TRUE 11 PP5V_RUN 5 TEST POINTS
FUNC_TEST=TRUE
IN
I5 NO_TEST=TRUE TP_DFPD1 58 I437 NO_TEST=TRUE TP_RAM_CS_L_R<11> 37 90 IN FW_TPI1N FUNC_TEST=TRUE
5 TEST POINTS
I6 NO_TEST=TRUE TP_DFPD2 58 I439 NO_TEST=TRUE TP_RAM_CS_L_R<2> 37 90 IN FW_VP_PORT2 FUNC_TEST=TRUE 11 IN PP3V3_RUN FUNC_TEST=TRUE
I7 NO_TEST=YES TP_DFPD3 58 I438 NO_TEST=TRUE TP_RAM_CS_L_R<3> 37 90 IN FW_TPO2P FUNC_TEST=TRUE PP24V_RUN 5 TEST POINTS
FUNC_TEST=TRUE
IN
I8 NO_TEST=TRUE TP_DFPD5 58 I440 NO_TEST=TRUE TP_RAM_MUXEN0 37 90 IN FW_TPO2N FUNC_TEST=TRUE
I9 NO_TEST=YES TP_DFPD6 58 I441 NO_TEST=TRUE TP_RAM_MUXEN4 37 90 IN FW_TPI2P FUNC_TEST=TRUE 83 7 PP5V_DISK 5 TEST POINTS
FUNC_TEST=TRUE
IN
I10 NO_TEST=YES TP_EXT_TMDS_CKM 58 I442 NO_TEST=TRUE TP_NB_PM_SLEEP0 24 90 IN FW_TPI2N FUNC_TEST=TRUE
5 TEST POINTS
NO_TEST=TRUE TP_EXT_TMDS_CKP 58 NO_TEST=TRUE TP_J4000_SJRESET_L 40 90 FW_VGND FUNC_TEST=TRUE 83 7 PP12V_DISK FUNC_TEST=TRUE
D
I295
I296 NO_TEST=YES TP_EXT_TMDS_D0M 58
I444
I443 NO_TEST=TRUE TP_J4001_SJRESET_L 40
IN IN
12 TEST POINTS
D
I297 NO_TEST=YES TP_EXT_TMDS_D0P 58 I445 NO_TEST=TRUE TP_CMP_SPARE 36 77 76 75 74 IN PCI_AD<31..0> FUNC_TEST=TRUE IN GND FUNC_TEST=TRUE
I298 NO_TEST=YES TP_EXT_TMDS_D1M 58 I446 NO_TEST=TRUE TP_ENET_TXD<6> 87 77 76 74 IN PCI_CBE_L<3..0> FUNC_TEST=TRUE
I300 NO_TEST=YES TP_EXT_TMDS_D1P 58 I781 NO_TEST=TRUE U2100_UNUSED 21 8 IN PCI_CLK33M_AIRPORT FUNC_TEST=TRUE
I299 NO_TEST=YES TP_EXT_TMDS_D2M 58 76 74 IN PCI_SLOTA_REQ_L FUNC_TEST=TRUE
I302 NO_TEST=YES TP_EXT_TMDS_D2P 58 76 74 IN PCI_SLOTA_GNT_L FUNC_TEST=TRUE
76 25 IN PCI_SLOTA_INT_L FUNC_TEST=TRUE PP2V5_RUN PP5V_PWRON PP1V2_PWRON
I307 NO_TEST=TRUE TP_FBBCS1_L 52 77 76 75 74 51 49 IN PCI_RESET_L FUNC_TEST=TRUE
I311 NO_TEST=TRUE TP_GPU_INTB_L 49 77 76 74 IN PCI_FRAME_L FUNC_TEST=TRUE PP1V5_RUN PP3V3_PWRON
I314 NO_TEST=TRUE TP_GPU_THERMA 58 77 76 74 IN PCI_TRDY_L FUNC_TEST=TRUE IN PP2V5_RUN FUNC_TEST=TRUE
I315 NO_TEST=TRUE TP_GPU_THERMC 58 77 76 74 IN PCI_IRDY_L FUNC_TEST=TRUE IN PP1V5_RUN FUNC_TEST=TRUE
I316 NO_TEST=TRUE TP_IFP1VREF 58 77 76 74 IN PCI_STOP_L FUNC_TEST=TRUE 18 11 IN PP5V_PWRON FUNC_TEST=TRUE
I317 NO_TEST=TRUE TP_NVAGP_TDO 49 77 76 74 IN PCI_DEVSEL_L FUNC_TEST=TRUE 27 18 11 IN PP3V3_PWRON FUNC_TEST=TRUE
77 76 74 IN PCI_PAR FUNC_TEST=TRUE IN PP1V2_PWRON FUNC_TEST=TRUE
I320 NO_TEST=YES TP_TMDS_TXD3M 58 76 IN PCI_SLOTA_IDSEL FUNC_TEST=TRUE 23 10 3 IN PP1V2_PWRON_SB_VCORE FUNC_TEST=TRUE
I319 NO_TEST=YES TP_TMDS_TXD3P 58 76 75 74 IN ROM_CS_L FUNC_TEST=TRUE IN PP3V3_ALL_SMU FUNC_TEST=TRUE
I322 NO_TEST=TRUE TP_TMDS_TXD7M 58 76 75 74 IN ROM_OE_L FUNC_TEST=TRUE 36 31 30 7 3 IN PP5V_RUN_CPU FUNC_TEST=TRUE
I323 NO_TEST=YES TP_TMDS_TXD7P 58 76 75 74 IN ROM_WE_L FUNC_TEST=TRUE 22 7 IN PPVCORE_NB FUNC_TEST=TRUE
I321 NO_TEST=TRUE TP_VIPHCLK 57 76 75 IN ROM_ONBOARD_CS_L FUNC_TEST=TRUE 36 35 34 33 32 31 29 7 IN PPVCORE_CPU FUNC_TEST=TRUE
I336 NO_TEST=YES TP_FRWRLPS 58 76 IN AIRPORT_CLKRUN_L_PD FUNC_TEST=TRUE 34 33 IN PP12V_CPU FUNC_TEST=TRUE
I337 NO_TEST=TRUE TP_AGP_MB_AGP8X_DET_L 48 33 IN VCORE_SENSE_GND FUNC_TEST=TRUE
I338 NO_TEST=TRUE TP_ATTENTION 29 92 IN USB_BT_N FUNC_TEST=TRUE 33 IN VCORE_SENSE_VOUT FUNC_TEST=TRUE
I340 NO_TEST=TRUE TP_ENET_CLK125M_GTX 87 92 IN USB_BT_P FUNC_TEST=TRUE 13 8 7 IN SMU_MANUAL_RESET_L 2 TEST POINTS FUNC_TEST=TRUE
I339 NO_TEST=TRUE TP_ENET_TXD<7> 87 13 7 IN SYS_POWER_BUTTON_L 2 TEST POINTS FUNC_TEST=TRUE
I342 NO_TEST=TRUE TP_ENET_TXD<4> 87 92 IN USB2_PORT1_N_F FUNC_TEST=TRUE 7 IN POWER_BUTTON_L FUNC_TEST=TRUE
I343 NO_TEST=TRUE TP_ENET_TXD<5> 87 92 IN USB2_PORT1_P_F FUNC_TEST=TRUE 7 IN RESET_BUTTON_L FUNC_TEST=TRUE
FUNC_TEST=TRUE FUNC_TEST=TRUE
C I341
I344
NO_TEST=TRUE
NO_TEST=TRUE
TP_FW_CLK98M_LCLK
TP_AFN
90
29
92
92
IN
IN
USB2_PORT2_N_F
USB2_PORT2_P_F FUNC_TEST=TRUE
13 8
33 13 11 10 7
IN
IN
SMU_RESET_L
SYS_POWERUP_L FUNC_TEST=TRUE C
I345 NO_TEST=TRUE TP_PSRO1 29 92 IN USB2_PORT3_N_F FUNC_TEST=TRUE 50 46 27 11 10 9 8 IN SYS_SLEEP FUNC_TEST=TRUE
I346 NO_TEST=TRUE TP_PSRO2 29 92 IN USB2_PORT3_P_F FUNC_TEST=TRUE 13 8 IN SYS_POWERFAIL_L FUNC_TEST=TRUE
I347 NO_TEST=TRUE TP_PSYNCOUT 29 92 IN PP5V_USB2_PORT1_F FUNC_TEST=TRUE 13 IN EXT_POWER_BUTTON_L FUNC_TEST=TRUE
I348 NO_TEST=TRUE TP_USB2_PWREN<2> 92 92 IN PP5V_USB2_PORT2_F FUNC_TEST=TRUE 9 IN U900_FEEDBACK FUNC_TEST=TRUE
I350 NO_TEST=TRUE TP_USB2_PWREN<3> 92 92 IN PP5V_USB2_PORT3_F FUNC_TEST=TRUE 22 IN U2200_FEEDBACK FUNC_TEST=TRUE
I349 NO_TEST=TRUE TP_USB2_PWREN<4> 92 59 57 IN ANALOG_RED FUNC_TEST=TRUE
I352 NO_TEST=TRUE TP_PROC_TRIGGER_OUT 14 29 94 76 25 IN I2S1_DEV_TO_SB_DTI 2 TEST POINTS FUNC_TEST=TRUE 59 57 IN ANALOG_GRN FUNC_TEST=TRUE
I354 NO_TEST=TRUE TP_NEC_AMC 77 94 25 IN I2S1_SYNC 2 TEST POINTS FUNC_TEST=TRUE 59 57 IN ANALOG_BLU FUNC_TEST=TRUE
I355 NO_TEST=TRUE TP_NEC_NANDTEST 77 94 25 IN I2S1_BITCLK 2 TEST POINTS FUNC_TEST=TRUE IN AUDIO_LI_DETECT_L FUNC_TEST=TRUE
I356 NO_TEST=TRUE TP_NEC_NTEST1 77 94 25 IN I2S1_MCLK 2 TEST POINTS FUNC_TEST=TRUE 98 25 IN AUDIO_LO_DET_L FUNC_TEST=TRUE
I357 NO_TEST=TRUE TP_NEC_SMC 77 94 76 25 IN I2S1_SB_TO_DEV_DTO 2 TEST POINTS FUNC_TEST=TRUE 75 IN ROM_WP_L FUNC_TEST=TRUE
I358 NO_TEST=TRUE TP_NEC_SMI_L 77 94 25 IN I2S1_RESET_L 2 TEST POINTS FUNC_TEST=TRUE
I360 NO_TEST=TRUE TP_NEC_SRCLK 77 94 25 IN MODEM_RING2SYS_L 2 TEST POINTS FUNC_TEST=TRUE 83 80 IN UATA_DD<15..0> FUNC_TEST=TRUE
I359 NO_TEST=TRUE TP_NEC_SRDATA 77 94 18 IN I2C_UDASH_SDA FUNC_TEST=TRUE 83 80 IN UATA_DA<2..0> FUNC_TEST=TRUE
I362 NO_TEST=TRUE TP_NEC_SRMOD 77 94 18 IN I2C_UDASH_SCL FUNC_TEST=TRUE 83 80 IN UATA_CS0_L FUNC_TEST=TRUE
I363 NO_TEST=TRUE TP_NEC_TEB 77 94 IN USB_UDASH_N FUNC_TEST=TRUE 83 80 IN UATA_CS1_L FUNC_TEST=TRUE
I361 NO_TEST=TRUE TP_NEC_TEST 77 94 IN USB_UDASH_P FUNC_TEST=TRUE 83 80 IN UATA_RESET_L FUNC_TEST=TRUE
I364 NO_TEST=TRUE TP_PLS_CLK_66M_0 27 94 25 IN UDASH_SDOWN FUNC_TEST=TRUE 83 IN UATA_DSTROBE_R FUNC_TEST=TRUE
I365 NO_TEST=TRUE TP_PLS_CLK_66M_1 27 94 25 IN UDASH_RESET_L FUNC_TEST=TRUE 83 80 IN UATA_HSTROBE FUNC_TEST=TRUE
I372 NO_TEST=TRUE TP_PLS_REF_CML 27 94 IN UDASH_I2C_A1_PU FUNC_TEST=TRUE 83 806 6
83 80
IN UATA_STOP FUNC_TEST=TRUE
I373 NO_TEST=TRUE TP_PLS_TEST1 27 83 IN UATA_DMARQ_R FUNC_TEST=TRUE
I371 NO_TEST=TRUE TP_PLS_TEST2 27 59 IN PPVCC_TMDS FUNC_TEST=TRUE 83 80 IN UATA_DMACK_L FUNC_TEST=TRUE
I374 NO_TEST=TRUE TP_PLS_TEST3 27 59 IN PP3V3_DDC FUNC_TEST=TRUE 83 IN UATA_INTRQ_R FUNC_TEST=TRUE
I375 NO_TEST=TRUE TP_SB_FSTEST 25 59 IN TD0M FUNC_TEST=TRUE 83 IN UATA_IOCS16_PU FUNC_TEST=TRUE
NO_TEST=TRUE TP_SB_PLLTEST 25 59 TD0P FUNC_TEST=TRUE 83 UATA_CSEL_PD FUNC_TEST=TRUE
B I376
I377 NO_TEST=TRUE TP_VREF_CG 48 59
IN
IN TD1M FUNC_TEST=TRUE
IN
B
I378 NO_TEST=TRUE TP_SB_NC_P7 91 59 IN TD1P FUNC_TEST=TRUE 36 31 IN TDIODE_NEG FUNC_TEST=TRUE
I380 NO_TEST=TRUE TP_SB_NC_P8 91 59 IN TD2M FUNC_TEST=TRUE 76 IN TP_AIRPORT_PME_L FUNC_TEST=TRUE
I379 NO_TEST=TRUE TP_SB_NC_R3 91 59 IN TD2P FUNC_TEST=TRUE 76 IN TP_AIRPORT_RF_DISABLE FUNC_TEST=TRUE
I382 NO_TEST=TRUE TP_SB_NC_R4 91 59 IN TCKM FUNC_TEST=TRUE
I383 NO_TEST=TRUE TP_SB_NC_R5 91 59 IN TCKP FUNC_TEST=TRUE
I381 NO_TEST=TRUE TP_SB_NC_R6 91 59 IN TMDS_DDC_DAT FUNC_TEST=TRUE
I384 NO_TEST=TRUE TP_SB_NC_R7 91 59 IN TMDS_DDC_CLK FUNC_TEST=TRUE
I385 NO_TEST=TRUE TP_SB_NC_R8 91 59 7 IN GND_CHASSIS_TMDS FUNC_TEST=TRUE
I386 NO_TEST=TRUE TP_SB_NC_T1 91
I388 NO_TEST=TRUE TP_SB_NC_T2 91 59 IN FILT_ANALOG_RED FUNC_TEST=TRUE

I387 NO_TEST=TRUE TP_SB_NC_T3 91 59 IN FILT_ANALOG_GRN FUNC_TEST=TRUE
I390 NO_TEST=TRUE TP_SB_NC_T4 91 59 IN FILT_ANALOG_BLU FUNC_TEST=TRUE
I389 NO_TEST=TRUE TP_SB_NC_T5 91 59 57 56 IN ANALOG_HSYNC_L FUNC_TEST=TRUE
I391 NO_TEST=TRUE TP_SB_NC_T6 91 59 57 56 IN ANALOG_VSYNC_L FUNC_TEST=TRUE
I393 NO_TEST=TRUE TP_SB_NC_T7 91 59 IN VGA_IIC_CLK FUNC_TEST=TRUE
I392 NO_TEST=TRUE TP_SB_NC_T8 91 59 IN VGA_IIC_DAT FUNC_TEST=TRUE
I395 NO_TEST=TRUE TP_SB_NC_U1 91 59 58 IN MON_DETECT FUNC_TEST=TRUE
I394 NO_TEST=TRUE TP_SB_NC_U2 91 59 IN DDC_VCC_5 FUNC_TEST=TRUE
I396 NO_TEST=TRUE TP_SB_NC_U3 91
I398 NO_TEST=TRUE TP_SB_NC_U4 91 59 IN PP24V_INV FUNC_TEST=TRUE

I397 NO_TEST=TRUE TP_SB_NC_U5 91 59 IN GND_20_INV FUNC_TEST=TRUE
I399 NO_TEST=TRUE TP_SB_NC_U6 91 59 IN INV_20_LCD_PWM_ FUNC_TEST=TRUE
I401 NO_TEST=TRUE TP_SB_NC_V1 91 59 IN INV_20_CUR_HI_F FUNC_TEST=TRUE
I400 NO_TEST=TRUE TP_SB_NC_V2 91 59 IN PP12V_INV FUNC_TEST=TRUE
NO_TEST=TRUE TP_SB_NC_V3 GND_17_INV FUNC_TEST=TRUE
A I403
I402 NO_TEST=TRUE TP_SB_NC_V4
91
91
59
59
IN
IN PP5V_AGP_RL FUNC_TEST=TRUE A
I404 NO_TEST=TRUE TP_SB_NC_W1 91 59 IN INV_17_LCD_PWM_F FUNC_TEST=TRUE
I405 NO_TEST=TRUE TP_SB_NC_W3 91 59 IN LAMP_STS_F FUNC_TEST=TRUE
I406 NO_TEST=TRUE TP_SB_NC_Y1 91 59 IN INV_17_CUR_HI_F FUNC_TEST=TRUE
I408 NO_TEST=TRUE TP_SB_NC_Y3 91
I407 NO_TEST=TRUE TP_SATA_CLK25M 27 33 8 IN CPU_VID_R<5..0> FUNC_TEST=TRUE

I426 NO_TEST=TRUE TP_ENET_TCK 87 36 IN KPVDD2_FMAX FUNC_TEST=TRUE
I429 NO_TEST=TRUE TP_USB2_PWREN<0> 92 36 IN KPGND2_FMAX FUNC_TEST=TRUE
I428 NO_TEST=TRUE TP_USB2_PWREN<1> 92 36 IN TDIODE_POS_FMAX FUNC_TEST=TRUE
I431 NO_TEST=TRUE TP_DUMMY_A 24 36 IN TDIODE_NEG_FMAX FUNC_TEST=TRUE
I430 NO_TEST=TRUE TP_DUMMY_B 24 36 33 IN CORE_ISNS_M FUNC_TEST=TRUE
I432 NO_TEST=TRUE TP_RAM_CKE_R<2> 37 36 33 IN CORE_ISNS_P FUNC_TEST=TRUE
8
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PP12V_RUN PP5V_RUN PP24V_RUN
PP5V_ALL PP3V3_RUN PP12V_RUN PP5V_RUN
PP24V_RUN RUN RAILS
CRITICAL
ONLY ON IN RUN PWRON RAILS ALL RAILS
J700 VOLTAGE=24V ALIAS PP24V_FW 90 ON IN RUN AND SLEEP ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
43215-0012 MIN_LINE_WIDTH=25MIL
F-RT-TH MIN_NECK_WIDTH=10MIL
PP24V_GRAPHICS 59 PP1V5_PWRON
1 12 ALIAS
PP3V3_RUN
2 13 VOLTAGE=1.5V
3 14 MIN_LINE_WIDTH=25MIL 11 7 PP3V3_ALL ALIAS PP3V3_FW 90
MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
4 15 MAKE_BASE=TRUE VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL
5 16 ALIAS PP1V5_PWRON_NB_AVDD 28 37 48 60 MIN_NECK_WIDTH=10MIL
D 6
7
17
18
VOLTAGE=3.3V
PP3V3_PATA 83 ALIAS PPVCORE_PWRON_PULSAR 26
ALIAS _PP3V3_ALL_SMU 8 13 D
8 19 MIN_NECK_WIDTH=8MIL PP5V_ALL
8 POWER_GOOD
PP3V3_PWRON
9 20 PP5V_RUN VOLTAGE=3.3V
10 21 MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE VOLTAGE=5V
11 22 _PP3V3_PWRON_SB 23 25 11 6 PP5V_ALL IN
VOLTAGE=0V PP2V5_PWRON
MIN_LINE_WIDTH=10MIL MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL VOLTAGE=5V ALIAS PP5V_PATA 83 VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL
P/N 518-0137 MIN_NECK_WIDTH=10MIL
PP5V_DISK
ALIAS 6 83 MAKE_BASE=TRUE
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX . _PP2V5_PWRON_SB 23 25 74 88
_PPPCI64_PWRON_SB 23
GND RAILS
PP2V5_RUN
PP3V3_ALL
11 7
MAKE_BASE=TRUE _PPPCI32_PWRON_SB 23
XW702
SM
VOLTAGE=2.5V ALIAS
PP2V5_GPU 52 54 55
MIN_LINE_WIDTH=25MIL PP1V2_PWRON GND_AUDIO 1 2
1 C700 MIN_NECK_WIDTH=10MIL
99
CRITICAL 0.1UF ALIAS PP2V5_RUN_RAM 44 45 46 XW706

20%
U700 10V
2 CERM
PP2V5_RUN_CPU
_PP2V5_PWRON_HT 62
1
SM
2
74LCX125 402 PP12V_RUN ALIAS 31 MAKE_BASE=TRUE
14 _PP1V2_PWRON_HT 62
2 3 MIN_LINE_WIDTH=25MIL
33 13 11 10 6 SYS_POWERUP_L SYS_POWERUP_L_BUF ALIAS PP2V5_RAM 26 37 MIN_NECK_WIDTH=10MIL
VOLTAGE=1.2V
7
125
1 TSSOP VOLTAGE=12V
XW703
SM
ALIAS PP12V_AGP 50 59
MIN_LINE_WIDTH=25MIL 99 97 GND_AUDIO_SPKRAMP 1 2
MAKE_BASE=TRUE PP12V_RUN_CPU 33
ALIAS
_PP1V2_PWRON_DISK_SB 80
XW707
SM
ALIAS PP12V_DISK 6 83
_PP1V2_PWRON_SB 25 1 2
PP12V_RUN
PP5V_ALL PP3V3_PWRON PP3V3_RUN
XW700
SM
C R710 R700
DEVELOPMENT
VOLTAGE=12V
1 2 PP12V_AUDIO_CODEC 99 ALIAS _PP3V3_PWRON_MODEM 94 C
330 330 R701 MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE XW704
PP5V_PWRON _PP3V3_PWRON_USB 91
CHASSIS GND
1 2 ITS_PLUGGED_IN 1 2 ITS_ALIVE
1
330 2 ITS_RUNNING
SM PP3V3_PWRON_ENET 87
5%
1/16W
5%
1/16W 5%
1 2 VOLTAGE=5V _PP3V3_PWRON_BT 92 ZH700
MF 1 MF 1 1/16W DEVELOPMENT
MIN_NECK_WIDTH=10MIL _PP3V3_PWRON_UDASH 94 315R138
603 LED702 603 LED700 MF
603 LED701
1 XW701
SM
MAKE_BASE=TRUE
_PP5V_PWRON_USB 92
98 GND_CHASSIS_AUDIO_EXTERNAL
1
GREEN GREEN
MAKE_BASE=TRUE
2.0X1.25 2.0X1.25 GREEN 1 2 PP12V_AUDIO_SPKRAMP 97 VOLTAGE=0
2 2
2.0X1.25 _PP5V_PWRON_UDASH 94 MIN_LINE_WIDTH=25MIL
SILKSCREEN:1 SILKSCREEN:2 SILKSCREEN:RUN

2
PP5V_RUN XW705
SM
1 2
ALIAS
PP5V_PWRON_CPU 36 59 GND_CHASSIS_VGA
VOLTAGE=5V 92 GND_CHASSIS_USB ALIAS
PP5V_AGP PP3V3_PWRON_CPU
L700 MIN_LINE_WIDTH=25MIL
ALIAS 49 50 59 ALIAS 36
90 GND_CHASSIS_FIREWIRE
1
EMI700
FERR-EMI-100-OHM MAKE_BASE=TRUE PP5V_RUN_CPU EMI-SPRING
SYS_POWER_BUTTON_L 1 2 SYS_PWR_BTN_FILT
ALIAS 3 6 30 31 36
ZH701 SC57
13 7 6
PP3V3_RUN PP5V_AUDIO 315R138
SM SW703 ALIAS 98
59 6 GND_CHASSIS_TMDS 1
PWR-BUTT MIN_NECK_WIDTH=15MIL
ST-SM MIN_LINE_WIDTH=25MIL
PP2V5_PWRON
VOLTAGE=0
VOLTAGE=3.3V
PP3V3_AGP
1 C703 1 SILKSCREEN:POWER MIN_LINE_WIDTH=25MIL ALIAS 48 49 50 51 52 56 57 58 59
ZH702
0.1UF 3 MIN_NECK_WIDTH=8MIL
MAKE_BASE=TRUE PP3V3_AUDIO 95 97 98 99
VOLTAGE=2.5V
160R138
20% ALIAS GND_CHASSIS_RJ45 1
10V 2 MIN_NECK_WIDTH=10MIL 87
2 CERM ALIAS PP3V3_RUN_CPU 33 MAKE_BASE=TRUE MIN_NECK_WIDTH=15MIL
PP2V5_PWRON_RAM 40 MIN_LINE_WIDTH=25MIL
402
PP3V3_RUN
ALIAS
VOLTAGE=0 SH700
L701 GND_CHASSIS_AUDIO_INTERNAL
FERR-EMI-100-OHM PP2V5_HT 60 64
98
MAKE_BASE=TRUE
ALIAS 1 4
ALIAS
1 2 SHLD-IO-CONN
GND_SYS_PWR_BTN_FILT _PP3V3_SB_PCI 74 21 GND_CHASSIS_LED Q45-TH
2 3
SM
_PP3V3_PCI 25 74 75 76 77
B ZH703 B
_PPVIO_PCI_USB2 77
6.00MM-PTH
MAKE_BASE=TRUE 59 GND_CHASSIS_17_INCH_INVERTER 1
PP3V3_ALL MIN_NECK_WIDTH=20MIL
PP3V3_DISK MIN_LINE_WIDTH=20MIL
PP1V5_RUN ALIAS 83
VOLTAGE=0 ZH704
225R125
1
R714 59 GND_CHASSIS_20_INCH_INVERTER
1
10K ALIAS PP1V5_AGP 48 49 MIN_LINE_WIDTH=20MIL
5% VOLTAGE=1.5V VOLTAGE=0
1/16W MAKE_BASE=TRUE
MF MIN_LINE_WIDTH=25MIL
R713 2 402 MIN_NECK_WIDTH=10MIL
SYS_POWER_BUTTON_L 1
1K 2 ALIAS PPVCORE_PULSAR 26
13 7 6
5% POWER_BUTTON_L 6
R712 1/16W
MF RESET_BUTTON_L
NOSTUFF
R707
PP1V5_PWRON
13 SYS_RESET_BUTTON_L 1
1K 2
402
6
0
RTC BATTERY
DEVELOPMENT DEVELOPMENT 22 6 PPVCORE_NB 1 2
5% ALWAYS ON (TRICKLE)
1/16W
MF
SW701 SW702 5%
1W
402 SPST SPST FF PP1V2_RUN CRITICAL
SM SM 2512
1 2 1 2
1 C705 1 C704 DS700 R702 J702
0.1UF 0.1UF VOLTAGE=1.2V SM BB10209-A5
20% 20% MAKE_BASE=TRUE 2 1PP3V3_ALL_BATT_SAFETY 1
1K 2 PP3V3_ALL_BATT 1 2
10V 10V MIN_LINE_WIDTH=25MIL 13 _PP3V3_ALL_RTC
2 CERM 2 CERM MIN_NECK_WIDTH=10MIL VOLTAGE=3.3V VOLTAGE=3.3V VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL 5% MIN_LINE_WIDTH=25MIL
402 402 MIN_NECK_WIDTH=10MILMBR0530 MIN_NECK_WIDTH=10MIL 1/16W MIN_NECK_WIDTH=10MIL TH
3 4 3 4 MF
ALIAS PP1V2_HT 24 60 402
36 35 34 33 32 31 29 6 PPVCORE_CPU
PP1V2_PULSAR
RESET POWER ALIAS 26
NOSTUFF NOSTUFF
R7051 1
R706 R7081 1
R709
0 0 0 0
A 13 8 6 SMU_MANUAL_RESET_L
5%
1/10W
FF
805 2
5%
1/10W
FF
5%
1/10W
FF
5%
1/10W
FF A
SW700 2 805 805 2 2 805
SPST
SM
1 2 R703
1
0 2
35 31 30 29 18 PP1V2_EI_CPU 5% PP1V2_EI_NB 18 28
VOLTAGE=1.2V 1/10W VOLTAGE=1.2V
MIN_LINE_WIDTH=25MIL FF MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL 805 MIN_NECK_WIDTH=10MIL
3 4
R704
1
0 2
SMU RESET 5%
1/10W
FF
805
8
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MISC PARTS
PCI CLOCKS PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
TP_NB_THMI NB_THMI PCI_CLK33M_USB2 PCI_CLK_GP0

TABLE_11_HEAD
ALIAS 24 27
PART # QTY DEVICE PACKAGE DESCRIPTION VALUE VOLT. WATT. TOL. REFERENCE DESIGNATOR(S) BOM OPTION 062-2082 1 SPEC,VENDOR PACKAGING PROCEDURE VPP1
MAKE_BASE=TRUE MAKE_BASE=TRUE
TP_THMO ALIAS NB_THMO 24 _PCI_CLK33M_USB2 77 TABLE_11_HEAD
TABLE_5_ITEM
MAKE_BASE=TRUE 337S2784 1 PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV2,1.8GHZ,70C 1.8GHZ 1.15V 45W ? U2900 NEO_REV2_1_8GHZ 820-1540 1 PCB,FAB,MLB MLB1
TP_PCI_CLK_GP1 ALIAS
PCI_CLK_GP1 27
MAKE_BASE=TRUE TABLE_11_HEAD
TABLE_5_ITEM
337S2785 1 PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV2,2.0GHZ,70C 2.0GHZ 1.15V 65W ? U2900 NEO_REV2_2_0GHZ 825-2029 1 LBL,SER #,INP DEV LBL1
6 PCI_CLK33M_AIRPORT PCI_CLK_P3 27
MAKE_BASE=TRUE TABLE_5_ITEM
_PCI_CLK33M_AIRPORT
TABLE_11_HEAD
76
337S2786 1 PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV3,1.8GHZ,70C 1.8GHZ 1.15V 45W ? U2900 NEO_REV3_1_8GHZ 051-6482 1 PCB,SCHEM,MLB SCH1
TABLE_5_ITEM
TABLE_11_HEAD
TP_PCI_CLK_P4 ALIAS PCI_CLK_P4 27 341T1366 1 IC,FLASH,1MX8,3.3V,90NS U7500

MAKE_BASE=TRUE 337S2787 1 PROCESSOR CBGA-576-1MM IC,MPU,NEO,10S,REV3,2.0GHZ,70C 2.0GHZ 1.15V 65W ? U2900 NEO_REV3_2_0GHZ
TABLE_5_ITEM
PP2V5_PWRON CRITICAL 742-0048 1 BAT,COIN,3V,220MAH,CR2032 BT700
D 74 27 PCI_CLK33M_SB_EXT
MAKE_BASE=TRUE
ALIAS PCI_CLK_P1 27
875-1614 1 GAP FILLER GAP2900
TABLE_5_ITEM
TABLE_5_ITEM
D
1 341T1395 1 PURCH ASSY, SMU BIG U1300
R870
SMU
TABLE_5_ITEM
4.7K CRITICAL 875-1752 1 GPU GAP PAD PAD4900

5%
1/16W
U700
TABLE_5_ITEM
TP_SMU_CHARGE_BATT ALIAS SMU_CHARGE_BATT 13 MF CRITICAL 452-0678 6 CPU HEATSINK SCREW SRW800,SRW801,SRW802,SRW803,SRW804,SRW805

MAKE_BASE=TRUE NO_TEST=TRUE 2 402 74LCX125
14 TABLE_5_ITEM
TP_ALS0_OUT ALIAS ALS0_OUT 13 CRITICAL 870-1177 6 CPU HEATSINK SPRING SPR800,SPR801,SPR802,SPR803,SPR804,SPR805

MAKE_BASE=TRUE 24 13 SMU_WARM_RESET_L 9 8 SYS_WARM_RESET_L 24 25 74 77 87
TABLE_5_ITEM
125 CRITICAL 730-0291 1 CPU HEATSINK HS2900

TP_ALS1_OUT ALIAS ALS1_OUT 13 7 10 TSSOP
MAKE_BASE=TRUE
TP_ALS_GAIN_BOOST ALS_GAIN_BOOST NEED TO ADD THERMAL GREASE TO MLB BOM
MAKE_BASE=TRUE ALIAS 13
U700
TP_SMU_ADAPTER_ID ALIAS SMU_ADAPTER_ID 13 14 74LCX125
MAKE_BASE=TRUE 5 6
13 SMU_SLEEP SYS_SLEEP 6 9 10 11 27 46 50
TP_ACCEL_LOWPWR_L
MAKE_BASE=TRUE ALIAS ACCEL_LOWPWR_L 13
7
125
4 TSSOP
ALTERNATE FOR SERIAL NUMBER LABEL
TABLE_ALT_HEAD
TP_SMU_PWRSEQ_P1_3 ALIAS SMU_PWRSEQ_P1_3 13 PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
MAKE_BASE=TRUE PART NUMBER
TP_SMU_PWRSEQ_P1_4 SMU_PWRSEQ_P1_4
U700
74LCX125
TABLE_ALT_ITEM
ALIAS 13
MAKE_BASE=TRUE 14 825-2808 825-2029 COMMON LBL1 BAR CODE LABEL
13 TP_SMU_SPARE_P10_0 SMU_SPARE_P10_0 12 11
ALIAS
MAKE_BASE=TRUE 125
TP_ACCEL_INT_L ALIAS ACCEL_INT_L 13 7 13 TSSOP
MAKE_BASE=TRUE
SMU ANALOG VREF POWER_FAIL_L

PP3V3_RUN
CONNECTION
CPU VID<0:5> 13 PP3V3_ALL_SMU_AVCC
PP3V3_ALL
VID SET TO 1.475V TO ACHIEVE 1.45V AT PROCESSOR
DOWNLOAD
C NOSTUFF CONNECTOR NOSTUFF
1
1
R812 C
1
R814 1
R816 1
R817 1
R808 1
R809 1
R804 PP3V3_ALL
R818 10K
200 5%
10K 10K 10K 10K 10K 10K DEVELOPMENT 1% 1/16W
5% 5% 5% 5% 5% 5% 1/16W MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF J802
ST-HDR-HI-TEMP
DEVELOPMENT MF
2 402
2 402
NOSTUFF
R819 2 402 2 402 2 402 2 402 2 402 2 402 TH R826 _PPVREF_SMU 13 SYS_POWERFAIL_L 6 13
1 2 100
1
0 2
J802_2 2 1 SMU_BOOT_BUSY 13 NOSTUFF
CPU_VID<0> CPU_VID_R<0>
R813
13
NOSTUFF
6 33
13 SMU_BOOT_SCLK 3 4 5% SMU_BOOT_RXD 13 C801 1
R802 47
5%
1/16W R820 13 SMU_BOOT_CE 5 6 J802_6
1/16W
MF (SMU_BOOT_EPM) 2.2UF
20%
0 7 POWER_GOOD 1 2
CPU_VID<1>
MF
402 1
0 2 CPU_VID_R<1> 7 8
402
SMU_MANUAL_RESET_L 10V
1 2 PPVREF_SMU_ADC_REF 36
5%
13 6 33 6 7 8 13 CERM 2 NOSTUFF
1
NOSTUFF 805 5% 1/16W
9 10
VR801
R821 5% 13 SMU_BOOT_CNVSS SMU_BOOT_TXD 13 1/16W MF
1/16W MF 402
SSOT-23
2.5V
0 MF 402
13 CPU_VID<2> 1 2 402 CPU_VID_R<2> 6 33 DEVELOPMENT NOSTUFF NOSTUFF
NOSTUFF 998-0269
5%
1/16W R822 R8061 1
R807 R805 1 1
R803 1 C802
MF 0 10K 10K 0 10K 0.47UF
CPU_VID<3> 1 2 CPU_VID_R<3> 20%
3
2
13 402 6 33 5% 5% 5% 5% 10V
NOSTUFF 1/16W 1/16W 1/16W 1/16W 2 CERM
R823 5%
1/16W
MF
402 2
MF
2 402
MF
402 2
MF
2 402
603
0 MF
13 CPU_VID<4> 1 2 402 CPU_VID_R<4> 6 33
NOSTUFF GND_SMU_AVSS 13 33 36
5%
1/16W R824
CPU_VID<5>
MF
1
0 2 CPU_VID_R<5>
13 402 6 33
R828
5%
1
0 2 GND_SMU_AVSS_DAGND
1/16W 36
MF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
402 5%
1 1 1 1 1 1
R832 R831 R830 R829 R827 R811 1/16W
BM12B-SRSS-TB
10K 10K 10K 10K 10K 20K

MF
402
CPU HEATSINK SMT NUTS
5% 5% 5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
NOSTUFF
14
10
11
12
13
J803
MF MF MF MF MF MF
F-ST-SM
1
2
3
4
5
6
7
8
9
2 402 2 402 2 402 2 402 2 402 2 402 SDF800 SDF801 SDF802

B HSK-NUT-6.5MM HSK-NUT-6.5MM HSK-NUT-6.5MM
TH TH TH
B
HS_SDF800 1 HS_SDF801 1 HS_SDF802 1
NOTE:PULL UP CPU_VID<5>TO
2.2V FOR CPU VRM10.
1 C880 1 C881 1 C882
0.01UF 0.01UF 0.01UF
20% 20% 20%
16V 16V 16V
2 CERM 2 CERM 2 CERM
402 402 402
SDF803 SDF804 SDF805

HSK-NUT-6.5MM HSK-NUT-6.5MM HSK-NUT-6.5MM
TH TH TH
HS_SDF803 1 HS_SDF804 1 HS_SDF805 1
CHEAPER SMU RESET PULSAR ERROR_L LED SHASTA JTAG 1 C883 1 C884 1 C885
PP3V3_RUN PULL DOWN 0.01UF
20% 20%
0.01UF 0.01UF
20%
16V 16V 16V
402 402 402
13 7 _PP3V3_ALL_SMU 25 JTAG_SB_TRST_L
DEVELOPMENT DEVELOPMENT
NOSTUFF NOSTUFF R8011 1
R800
1
R825
1
10K
R815 3 4.7K 330 5%
5% 5% 1/16W DEVELOPMENT
1K D800 1/16W 1/16W MF
5% 1N914 MF MF 2 402 J800
A NOSTUFF
1/16W
MF
2 402
1
SOT23 402 2 2 402
ERROR_LED U.FL-R_SMT A
R810 F-ST-SM
3
0 THESE PINS HAVE INTERNAL PULLUPS
13 8 7 6 SMU_MANUAL_RESET_L 1 2 SMU_RESET_L 6 13
1 DEVELOPMENT TP_JTAG_SB_TCK JTAG_SB_TCK 25
5%
1/16W NOSTUFF
D810 MAKE_BASE=TRUE
TP_JTAG_SB_TDI
ALIAS
JTAG_SB_TDI 25 NB_PMR_OBSV 1
MF RED MAKE_BASE=TRUE
ALIAS 24
402 1 C800 2
SM TP_JTAG_SB_TDO
MAKE_BASE=TRUE ALIAS
JTAG_SB_TDO 25
1UF TP_JTAG_SB_TMS ALIAS JTAG_SB_TMS 25 2
10% 27 CLOCK_ERROR_L MAKE_BASE=TRUE
2 6.3V
CERM
402 518S0104
8
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D D
2.5V VOLTAGE REGULATOR
PP5V_PWRON
PP5V_PWRON NOTE:
SET OUTPUT=2.62V FOR FRAMEBUFFER.
D900 IRU3037CS VREF=1.25VDC
2 1 VOUT=VREF*(R903+R905)/R905=2.62VDC
1 CRITICAL
MBR0520L D902 C901 PEAK CURRENT OF TOTAL RAILS
1
R900 SM
MBR0520L
1 1
C902 1
C903
4.7 SM 10UF 390UF 390UF 12.68A WITH DIMM TERMINATION
5% 2 20% 20% 20%
1/10W
FF
D901 2 6.3V
CERM 2 6.3V
ELEC
2 6.3V
ELEC
9.24A WITHOUT DIMM TERMINATION
U900_VC_R 2 1 U900_VC_D 1206 8X11.5-TH 8X11.5-TH
2 805
U900_VC
MBR0520L
SM
4
1 C904 1 C916
1UF D
C 20%
25V
2 CERM 2 6
1UF
20%
2 25V
R902
0
Q901 1 C917 PP2V5_PWRON PP2V5_RUN
C
805 VCC VC CERM
805
1 2 Q901_GATE 1 G NTD70N03R 1UF
20%
U900 5% S
CASE369
2 10V
IRU3037CS 1/10W
FF
CERM
603 CRITICAL Q903
SOI 805 3 L901 IRF7410
HD 5 U900_GATE_H SO-8
1.6UH VOLTAGE=2.5V
U900_SS 8 8
SS MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL Q902_DRAIN 1 2 MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL 3
LD 3 U900_GATE_L 7
NOSTUFF TH 2 S D 6
U900_COMP 7 COMP 1 1
FB 1 6 U900_FEEDBACK 4
R904 NOSTUFF 1
R903 5
1 1.1K 1 C907 11K G
R901 5%
1/8W 3300PF 1%
27.4K GND D FF 10%
50V 1/16W 4
1% 4 Q902 2 1206 2 CERM MF LOW TO ENABLE
1/16W 603 2 402 OMIT
MF 1 G NTD70N03R 1 1
1 C915 2 402 1 C913 1 C906 CASE369
R904_P2 C908 C909
0.1UF 56PF 220PF NOSTUFF S NOSTUFF 1800UF 1800UF
R901_P2 20% 20%
20%
2 16V
5%
2 50V
5%
2 25V
1 C905 3
1 C912 2 6.3V
ELEC
2 6.3V
ELEC
CERM 1 C914 CERM CERM 0.022UF 1UF 1
603
3900PF
402 402 10%
50V
20%
25V
R905 TH-KZJ TH-KZJ
5% 2 CERM 2 CERM 10K

50V 603 1206 1%
2 CERM 1/16W
603 MF
2 402 SYS_SLEEP 6 8 10 11 27 46 50
U900_FEEDBACK
B PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_HEAD
B
TABLE_5_ITEM
124-0324 1 CAP,AL ELEC,1500UF,6.3V C909 17_INCH_LCD

TABLE_5_ITEM
124-0322 1 CAP,AL ELEC,1800UF,6.3V C909 20_INCH_LCD
A A
8
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8 7 6 5 4 3 2 1
SHASTA CORE VOLTAGE REGULATOR

D D
PP5V_ALL
PP5V_ALL
D1000 NOTE:
2 1
SET OUTPUT=1.2V
1 IRU3037ACS VREF=0.8VDC
MBR0520L D1002 C1001 1 C1002 VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
1
R1002 SM
MBR0520L
1
10UF
1
C1003
4.7 SM 390UF 390UF
5%
1/10W D1001 2 20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
PEAK CURRENT OF TOTAL RAILS
FF
U1000_VC_R 2 1 U1000_VC_D
CERM
1206
ELEC
8X11.5-TH
ELEC
8X11.5-TH
5.96A
2 805
U1000_VC
MBR0520L
SM
1 C1004 1 C1000
1UF D 4
20% 1UF
25V
2 CERM 2 6 20%
25V
R1000 Q1001 1 C1017
805 VCC VC 2 CERM 0 NTD60N02R 1UF
805
1 2 Q1001_GATE 1
CASE369 20%
U1000 5%
G
S 3
10V
2 CERM
PP3V3_ALL IRU3037ACS 1/10W
FF 603
SOI
HD 5 U1000_GATE_H
805 L1001 23 10 6 3 PP1V2_PWRON_SB_VCORE
1.6UH VOLTAGE=1.2V
U1000_SS 8 SS MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=100
MIN_LINE_WIDTH=25MIL Q1002_DRAIN 1 2 MIN_NECK_WIDTH=15MIL
LD 3 U1000_GATE_L
NOSTUFF TH
U1000_COMP 7 COMP
R10071 1
R1004 NOSTUFF
1
C1007 R1003
FB 1 U1000_FEEDBACK 4
100K 1.1K 1
1 5.11K
5%
1/16W
R1001 5%
1/8W 3300PF 1%
MF 27.4K GND D FF 10% 1/16W
402 2 1% 4 2 1206 2 50V MF
3 1/16W Q1002 CERM
603 2 402
MF 1 G NTD70N03R 1 1
C D Q1000 1 C1015 2 402 1 C1013 1 C1006 CASE369
R1004_P2 C1008 C1009 C
R1010 0.1UF 68PF 220PF NOSTUFF S NOSTUFF 1800UF 1800UF
2N7002 R1001_P2 20% 20%
TURN_ON_SHASTA_CORE_L 1
0 2 Q1000_G 1 G S
SM 20%
16V
2 CERM
5%
50V
2 CERM
5%
25V
2 CERM
1 C1005 3
1 C1012 2 6.3V
ELEC
2 6.3V
ELEC
3
1 C1014 0.022UF 1UF 1
5% 603
3900PF
603 402 10%
50V
20%
25V
R1005 TH-KZJ TH-KZJ
1/16W 2 5% 2 CERM 2 CERM 10K
MF 1%
NOSTUFF 402 2 50V
CERM
603 1206 1/16W
603 MF
R1011 2 402
0
33 13 11 10 7 6 SYS_POWERUP_L 1 2
5%
1/16W
MF
402-1 U1000_FEEDBACK
PP1V2_PWRON FET SWITCH PP1V2_RUN FET SWITCH

PEAK CURRENT 0.6A PEAK CURRENT 4.43A
23 10 6 3 PP1V2_PWRON_SB_VCORE PP1V2_PWRON 23 10 6 3 PP1V2_PWRON_SB_VCORE Q1003 PP1V2_RUN

SI9426DY
SOI
B B
1
2
5
6
3
7
1 2
I70
Q1006
6
5
PP3V3_ALL PP5V_ALL SI3446DV PP5V_ALL
RDSON=0.06 OHM RDSON=0.016 OHM
TSOP @ VGS=2.5 V @ VGS=2.5 V
4
R1008
100K 1 Q1003_G
4
2
R1009 5%
100K 1 1/16W
2 Q1006_G MF
R10141 5%
402
3 6
100K 1/16W
3 Q1004 Q1004
5% MF
1/16W 402 2N7002DW D D 2N7002DW
MF
402 2 R1012
D Q1005 SOT-363 SOT-363
2N7002
0 SM 5 G S S G 2 SYS_SLEEP 6 8 9 11 27 46 50
3 TURN_ON_PP1V2_L 1 2 Q1005_G 1 G S
5% 4 1
1/16W 2
MF
NOSTUFF 402
R1013
0
33 13 11 10 7 6 SYS_POWERUP_L 1 2
5%
1/16W
MF
402-1
A A
8
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8 7 6 5 4 3 2 1
11 7 6 PP5V_ALL
D D
CRITICAL
Q1100
SI4467DY
SM-1 PP5V_PWRON 6 18
6 PP5V_RUN 8 VOLTAGE=5V
3 PP5V_PWRON MIN_LINE_WIDTH=25MIL
7 MIN_NECK_WIDTH=10MIL
D S 2
6
1
5
G
1
R1107 1R1101 6 PP3V3_RUN
R1100 FET ON IN RUN 1K 1K Q1102
11 7 PP3V3_ALL
1
100K 2 4 1% 1% SI4467DY
1/16W 1/16W
MF MF SM-1 PP3V3_PWRON 6 18 27
R1104 5%
1/16W
10
3 CRITICAL
LM339A
2 402 2 402 8
3
VOLTAGE=3.3V
SYS_POWERUP_L 1
100K 2 MF
402 7 MIN_NECK_WIDTH=10MIL
33 13 10 7 6 SOI
V+
13 6
D S 2
5%
1/16W R1103 U1100 RAIL_RUN_FET
MIN_LINE_WIDTH=20MIL 5
1
MF
1
100K 2 11 GND MIN_NECK_WIDTH=10MIL
SYS_SLEEP 402
50 46 27 10 9 8 6
RUN -> LOW G
5% 12 SLEEP -> FLOAT FET ON IN RUN
1/16W SHUTDOWN -> FLOAT
MF 4
402
RAIL_CTL_POS
3
4
Q1103
4 LM339A FET ON IN SLEEP
SI4467DY
SOI SM-1
V+
2 RAIL_SLEEP_FET G 5
3 RAIL_CTL_NEG U1100 MIN_LINE_WIDTH=20MIL 1
6
5 GND MIN_NECK_WIDTH=10MIL 2 S D
RUN -> FLOAT 7
12 SLEEP -> LOW 3
R11021 SHUTDOWN -> FLOAT
CRITICAL
8
47.0K
C 1%
1/16W
MF FET ON IN SLEEP
4
Q1101
SI4467DY
P-CHANNEL
Ron=11mOhm
C
603 2 SM-1
1
G 5
6
2 S D 7
11 7 6 PP5V_ALL 3
8
PP3V3_ALL 7 11
VOLTAGE=3.3V
P-CHANNEL MIN_LINE_WIDTH=25MIL
Ron=11mOhm MIN_NECK_WIDTH=10MIL
PROCESS SWING
CRITICAL 1 3.30V - 3.45V
SENSE
VR1100
CS5253
Vpwr >= Vout+0.35V 5 SM 3 Vout=Vref(1+R2/R1)+Iadj(R2)
VPWR VOUT 1 Vref=1.250V typ
Vctrl >= Vout+1.25V 4 VCTRL VOUT 6 R1105 Iadj=50uA typ
TAB 124 1
ADJ R1 1%
1/16W
C1100
MF 150UF
20%
2 2 603 2 10V
3_3V_ALL_ADJ ELEC
MIN_LINE_WIDTH=20MIL SM
1
C1102 1 C1101 R1106
100UF 0.1UF 210
N20P80% R2 1%
20% 1/16W
16V
2 6.3V 2 CERM MF
ELEC
SM 603 2 603
B B
A A
8
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ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE DIFFERENTIAL_PAIR
SMU_CLK10M_XTAL 15 MIL SPACING SMU_CLK10M_XIN 13

Real Time Clock
15 MIL SPACING SMU_CLK10M_XOUT 13
15 MIL SPACING SMU_CLK10M_XOUT_R 13 7 _PP3V3_ALL_RTC

13 8 7 _PP3V3_ALL_SMU
RTC_CLK32K_XTAL 15 MIL SPACING RTC_CLK32K_X1 13
15 MIL SPACING RTC_CLK32K_X2 13
System Management Unit C1308 1 8

0.1uF
Page Notes 13 8 7 _PP3V3_ALL_SMU R1315
1
4.7 2
PP3V3_ALL_SMU_AVCC 8
VOLTAGE=3.3V
MIN_LINE_WIDTH=15 mil
20%
10V
CERM 2
402
U1301
DS1338
VCC
1
RTC_CLK32K_X1 13
D Power aliases required by this page:

- _PP3V3_ALL_SMU
5%
1/16W
MIN_NECK_WIDTH=10 mil
18 I2C_RTC_SDA 5 SDA
MSOP
X1 1 Y1301 D
- _PP3V3_ALL_RTC
C1300 1 C1301 1 C1302 1 MF
402
1 C1303 I2C_RTC_SCL 6 SCL
X2 2 SM-1
32.768K
10uF
20%
0.1uF
20%
0.1uF
20%
1uF
10%
18 4
- _PP3V3_PWRON_SMU 3
6.3V 2
CERM
10V
CERM 2
10V
CERM 2
6.3V
2 CERM NC 7 SQW/ VBAT
- _PPVREF_SMU (SMU AVCC or 2.5V reference) 805 402 402 402 OUT GND RTC_CLK32K_X2 13
GND_SMU_AVSS 8 13 33 36 4
Signal aliases required by this page:
(NONE)
1 C1309
0.1uF
20%
2 10V
Consumer
Portable
Consumer
Portable
BOM options provided by this page: ALIAS SMU_BOOT_BUSY 8
CERM
Y = Primary function 13 78
Server
Server
(NONE) SMU_BOOT_SCLK 8 402
Tower
Tower
ALIAS
N = Alternate function VCC AVCC
(see aliases below) ALIAS SMU_BOOT_CE 8
NOTE: CPU current/voltage monitoring
S = Spare U1300
(CPU_SENSE_I/CPU_SENSE_V) requires M30280F8
QFP-80 RTS0*/
100K/10uF RC filter at SMU pins. 33 13 CPU_SENSE_I Y Y N S 67 P0[0] AN00 CTS0* P6[0] 43 Y Y N N CPU_VID<0> 8 13
Caps should connect to GND_SMU_AVSS. 33 CPU_SENSE_V Y Y S S 66 P0[1] AN01 OMIT CLK0 P6[1] 42 Y Y N N CPU_VID<1> 8 13
SMU_VREF should be same signal or 36 13 CPU_TEMP Y Y N N 65 P0[2] AN02 RXD0 P6[2] 41 Y Y N N CPU_VID<2> 8 13
reference used by monitoring 30 29 13 CPU_BYPASS_L Y Y N N 64 P0[3] AN03 TXD0 P6[3] 40 Y Y S S CPU_VID<3> 8

63 RTS1*
circuit, but be aware that this will 8 ALS0_OUT S Y S S P0[4] AN04 (BUSY) P6[4] 31 Y Y S S CPU_VID<4> 8
affect other analog inputs such as 8 ALS1_OUT S Y S S 62 P0[5] AN05 CLK1 P6[5] 30 Y Y S S CPU_VID<5> 8
AC adapter ID. 8 ALS_GAIN_BOOST S Y S S 61 P0[6] AN06 RXD1 P6[6] 29 Y Y Y Y SMU_BOOT_RXD 8
8 SMU_ADAPTER_ID S Y S S 60 P0[7] AN07 TXD1 P6[7] 28 Y Y Y Y SMU_BOOT_TXD 8

NOTE: All analog inputs to SMU should have
a 100pF capacitor to the SMU AVSS Y Y Y Y 59 Y Y Y Y
3 SMU_PWRSEQ_P1_0 P1[0] AN20 SDA P7[0] 27 I2C_SMU_B_SDA 18
signal (GND_SMU_AVSS). None of 58
3 SMU_PWRSEQ_P1_1 Y Y Y Y P1[1] AN21 SCL P7[1] 26 Y Y Y Y I2C_SMU_B_SCL 18
those capacitors are provided on Y Y Y Y 57 Y Y N N
3 SMU_PWRSEQ_P1_2 P1[2] AN22 TA1out P7[2] 25 I2C_SMU_CPU_SDA_IN 13 18
this page. Y Y Y Y 56 Y Y Y Y
P7[3] 24
NOTE: Some primary and alternate functions
8
8
SMU_PWRSEQ_P1_3
SMU_PWRSEQ_P1_4 Y Y Y Y 55
P1[3]
P1[4]
AN23 TA1in
TA2out P7[4] 23 Y Y N N
FAN_RPM0
I2C_SMU_CPU_SCL_IN
16
13 18
SMU Pull-ups / pull-down
Y N Y Y 54 P7[5] 22 Y Y Y Y
C reuire pull-ups that are not.
provided on this page. Please.
13 8 6
13
SYS_POWERFAIL_L
SYS_DRIVE_BAY_INT_L S N S Y 53
P1[5]
P1[6]
INT3*
INT4*
TA2in
TA3out P7[6] 21 S N Y Y
FAN_RPM1
EXT_LED_L
16
13
_PP3V3_ALL_SMU 7 8 13 C
S N Y Y 52 P7[7] 20 Y Y Y Y
review the latest SMU specification 13 SYS_DOOR_AJAR P1[7] INT5* TA3in FAN_RPM2 17
R1300
to ensure missing pull-ups are 1
10K 2 SYS_POWERUP_L 6 7 10 11 13 33
provided on another page. 18 I2C_SMU_E_SDA Y Y Y Y 51 P2[0] SDAmm TA4out P8[0] 19 Y Y Y Y SYS_LED 21
5%
Y Y Y Y 50 P8[1] 18 Y Y Y Y
NOTE: Pinout matches SMU pinout v1.4.
18 I2C_SMU_E_SCL P2[1] SCLmm TA4in SYS_COLD_RESET_L 13 24
R1302 1/16W
MF
16 FAN_TACH0 Y Y Y Y 49 P2[2] IOC2 INT0* P8[2] 17 Y Y Y Y SYS_PME_L 13 25 77 10K
1 2
402
SYS_POWER_BUTTON_L 6 7 13
16 FAN_TACH1 Y Y Y Y 48 P2[3] IOC3 INT1* P8[3] 16 S Y S S ACCEL_INT_L 8
Y Y 5%
17 FAN_TACH2 Y Y 47 P2[4] IOC4 INT2* P8[4] 15 Y Y Y Y SYS_SLEWING_L 13 25 27 33 1/16W
MF
13 FAN_TACH3 N S Y Y 46 P2[5] IOC5 NMI* P8[5] 14 Y Y S S I2C_SMU_CPU_SDA_OUT 18 402
13 FAN_TACH4 N S Y Y 45 P2[6] IOC6 CE* P8[6] 8 Y Y Y Y SYS_POWERUP_L 6 7 10 11 13 33
PP3V3_PWRON
Undervoltage Reset Circuit 13 FAN_TACH5 N S Y Y 44 P2[7] IOC7 P8[7] 7 Y Y Y Y MAKE_BASE=TRUE
SMU_SLEEP 8 13
R1304
2
10K 1 SYS_PME_L 13 25 77
18 I2C_SMU_A_SDA_IN Y Y Y Y 39 P3[0] CLK3 TB0in P9[0] 5 Y Y Y Y CLOCK_RESET_L 27
5%
18 14 I2C_SMU_A_SDA_OUT Y Y Y Y 38 P3[1] Sin3 TB1in P9[1] 4 Y Y S S CPU_HRESET_L 14 29 30 1/16W
NO_SMU_I2C_D MF
18 I2C_SMU_A_SCL_IN Y Y Y Y 37 P3[2] Sout3 TB2in P9[2] 3 Y Y Y Y SB_TO_SMU_INT_L 25 402
R1399 18 14 I2C_SMU_A_SCL_OUT Y Y Y Y 36 P3[3] AN24 P9[3] 2 Y Y Y Y SB_STOPXTALS_L 25 PP3V3_RUN
0 Y Y Y Y 35 Y Y Y Y R1312
25 SMU_TO_SB_INT_L 1 2 18 I2C_SMU_D_SDA P3[4] AN25 P9[5] 1 SMU_PWRSEQ_P9_5 3
13 8 7 _PP3V3_ALL_SMU
34 100K
5%
1/16W
18 I2C_SMU_D_SCL Y Y Y Y P3[5] AN26 P9[6] 80 Y Y Y Y SMU_PWRSEQ_P9_6 3 1 2 SYS_SLEWING_L 13 25 27 33
MF 8 SMU_CHARGE_BATT S Y S S 33 P3[6] AN27 P9[7] 79 S Y S S ACCEL_LOWPWR_L 8 5%

1
R1322 402
36 27 25 16 SYS_OVERTEMP_L S Y S S 32 P3[7]
1/16W
MF
1K 402
5% PP2V5_PWRON
1/16W S S S S
MF AN0 P10[0] 76 TP_SMU_SPARE_P10_0 8
R1311
402 2
PP3V3_ALL_SMU_RESET
_PPVREF_SMU
AN1 P10[1] 74 Y Y Y Y SMU_WARM_RESET_L 8 24
1
100K 2 SMU_SUSPENDREQ_L
VOLTAGE=3.3V 8
Y Y Y Y 13 24 25
MIN_LINE_WIDTH=10 mil AN2 P10[2] 73 NB_SUSPENDACK_L 24
MIN_NECK_WIDTH=10 mil Y Y Y Y 5%
6 AN3 P10[3] 72
8 SMU_BOOT_CNVSS PCNVSS SB_SUSPENDACK_L 25
R1313 1/16W
MF
C1310 1 8 6 SMU_RESET_L 9 RESET* KI0* P10[4] 71 Y Y Y Y SMU_SUSPENDREQ_L 13 24 25 100K 402
B 0.1uF
20%
10V
4
VCC 13 SMU_CLK10M_XOUT_R 10
12
XOUT KI1* P10[5] 70 Y
Y
Y
Y
Y
Y
Y
Y
SYS_POWER_BUTTON_L 6 7 13
1
5%
2 SYS_COLD_RESET_L 13 24
B
CERM 2 U1302 13 SMU_CLK10M_XIN XIN KI2* P10[6] 69 SYS_RESET_BUTTON_L 7 1/16W
402 MF
MAX6804 77 VREF KI3* P10[7] 68 Y Y N N I2C_SMU_CPU_SCL_OUT 13 18 402
SOT143 NO STUFF
3 2
8 7 6 SMU_MANUAL_RESET_L MR* RSET*
R1316 R13251 VSS AVSS
1
R1327 R1310
10M 10K 10K 1
100K2 SMU_SLEEP
GND 1 2 11 75 8 13
5% 5%
1 1/16W 1/16W 5%
5% 1/16W
1/16W
MF
402 2 XW1300 MF
2 402 MF
R13171 MF
402
SM 402
0 1 2
5%
1/16W CRITICAL GND_SMU_AVSS 8 13 33 36
MF VOLTAGE=0V
402 2 Y1300 MIN_LINE_WIDTH=15 mil
10.0000M
1 2 Keep crystal subcircuit close to SMU.
13 SMU_CLK10M_XOUT Y1300’s load capacitance is 12pF
8X4.5MM-SM
C1304 1 C1305 1
12pF
5%
12pF
5%
50V 50V
CERM 2 CERM 2
402 402
Alternate Functions
A Consumer
Port
Portable
Port
Tower & Server
Port
A
13 FAN_TACH3 2.5 ALIAS SYS_LED_RED 21 13 8 6 SYS_POWERFAIL_L 1.5 ALIAS SMU_ACIN 33 13 CPU_SENSE_I 0.0 ALIAS SYS_SLOT_PWR
13 FAN_TACH4 2.6 ALIAS SYS_LED_GREEN 21 13 SYS_DRIVE_BAY_INT_L 1.6 ALIAS SMU_BATT_DET_L 36 13 CPU_TEMP 0.2 ALIAS FAN_TACH6
13 FAN_TACH5 2.7 ALIAS SYS_LED_BLUE 21 13 SYS_DOOR_AJAR 1.7 ALIAS SYS_LID_OPEN 30 29 13 CPU_BYPASS_L 0.3 ALIAS FAN_TACH7
13 EXT_LED_L 7.6 ALIAS SYS_KBDLED 13 8 CPU_VID<0> 6.0 ALIAS FAN_RPM3
13 8 CPU_VID<1> 6.1 ALIAS FAN_RPM4
13 8 CPU_VID<2> 6.2 ALIAS FAN_RPM5
18 13 I2C_SMU_CPU_SDA_IN 7.2 ALIAS FAN_PWM6
18 13 I2C_SMU_CPU_SCL_IN 7.4 ALIAS FAN_PWM7
18 13 I2C_SMU_CPU_SCL_OUT 10.7 ALIAS EXT_POWER_BUTTON_L 6
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R1400
0
27 EI_CPU1_CLK_P_R 1 2 EI_CPU1_CLK_P 14 27
5% 1/16W
MF 402
R1401
0
27 EI_CPU1_CLK_N_R 1 2 EI_CPU1_CLK_N 14 27
5% 1/16W
MF 402
D 0 R1402
D
27 CPU1_HTBEN_R 1 2 CPU1_HTBEN 14
5% 402
0 R1403
27 EI_CPU1_SYNC_R 1 2 EI_CPU1_SYNC 14 27
5% 402
NOSTUFF
J1400
YFS-30-03-H-08-SB
F-ST-BGA
27 14 EI_CPU1_SYNC H1 H1 G1 G1 EI_CPU1_CLK_P 14 27 27 14 EI_CPU1_CLK_N F1 F1 E1 E1 30 29 25 CPU_INT_L D1 D1 C1 C1 B1 B1 A1 A1 CPU_HRESET_L 13 29 30
30 29 CHKSTOP_L H2 H2 G2 G2 F2 F2 E2 E2 NC D2 D2 C2 C2 NC B2 B2 A2 A2 CPU1_HTBEN 14
H3 H3 G3 G3 NC F3 F3 E3 E3 NC D3 D3 C3 C3 NC B3 B3 A3 A3 EI_CPU_TO_NB_AD<0> 28 29
H4 H4 G4 G4 EI_CPU_TO_NB_AD<3> 28 29 F4 F4 E4 E4 NC D4 D4 C4 C4 NC B4 B4 A4 A4 EI_CPU_TO_NB_AD<2> 28 29
H5 H5 G5 G5 EI_CPU_TO_NB_AD<4> 28 29 F5 F5 E5 E5 NC D5 D5 C5 C5 NC B5 B5 A5 A5
H6 H6 G6 G6 EI_CPU_TO_NB_AD<7> 28 29 F6 F6 E6 E6 EI_CPU_TO_NB_AD<8> 28 29 D6 D6 C6 C6 EI_CPU_TO_NB_AD<6> 28 29 B6 B6 A6 A6 EI_CPU_TO_NB_AD<1> 28 29

H8 H8 G8 G8 EI_CPU_TO_NB_CLK_N 28 29 F8 F8 E8 E8 NC D8 D8 C8 C8 EI_CPU_TO_NB_AD<20> 28 29 B8 B8 A8 A8 EI_CPU_TO_NB_AD<10> 28 29
H9 H9 G9 G9 EI_CPU_TO_NB_CLK_P 28 29 F9 F9 E9 E9 EI_CPU_TO_NB_AD<12> 28 29 D9 D9 C9 C9 EI_CPU_TO_NB_AD<25> 28 29 B9 B9 A9 A9 EI_CPU_TO_NB_AD<22> 28 29
H10 H10 G10 G10 EI_CPU_TO_NB_SR_N<1> 28 29 F10 F10 E10 E10 EI_CPU_TO_NB_AD<5> 28 29 D10 D10 C10 C10 EI_CPU_TO_NB_AD<26> 28 29 B10 B10 A10 A10 EI_CPU_TO_NB_AD<31> 28 29
H11 H11 G11 G11 EI_CPU_TO_NB_SR_P<1> 28 29 F11 F11 E11 E11 EI_CPU_TO_NB_AD<36> 28 29 D11 D11 C11 C11 EI_CPU_TO_NB_SR_P<0> 28 29 B11 B11 A11 A11 EI_CPU_TO_NB_AD<37> 28 29
C H12
H13
H12
H13
G12 G12 NC
G13 G13 EI_CPU_TO_NB_AD<17> 28 29
F12
F13
F12
F13
E12 E12
E13 E13
EI_CPU_TO_NB_AD<35> 28 29
D12
D13
D12
D13
C12 C12
C13 C13
EI_CPU_TO_NB_SR_N<0> 28 29
B12
B13
B12
B13
A12 A12
A13 A13
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<34>
28 29
28 29
C
29 28 EI_NB_TO_CPU_AD<13> H17 H17 G17 G17 EI_NB_TO_CPU_AD<14> 28 29 29 28 EI_NB_TO_CPU_AD<5> F17 F17 E17 E17 EI_CPU_TO_NB_AD<40> 28 29 29 28 EI_CPU_TO_NB_AD<15> D17 D17 C17 C17 EI_CPU_TO_NB_AD<19> 28 29 29 28 EI_NB_TO_CPU_AD<4> B17 B17 A17 A17 EI_CPU_TO_NB_AD<29> 28 29
29 28 EI_NB_TO_CPU_AD<15> H18 H18 G18 G18 EI_NB_TO_CPU_AD<12> 28 29 F18 F18 E18 E18 EI_NB_TO_CPU_AD<9> 28 29 D18 D18 C18 C18 29 28 EI_NB_TO_CPU_AD<3> B18 B18 A18 A18
29 28 EI_NB_TO_CPU_AD<21> H20 H20 G20 G20 EI_NB_TO_CPU_AD<19> 28 29 F20 F20 E20 E20 EI_NB_TO_CPU_AD<0> 28 29 D20 D20 C20 C20 NC B20 B20 A20 A20
29 28 EI_NB_TO_CPU_AD<25> H22 H22 G22 G22 EI_NB_TO_CPU_AD<26> 28 29 F22 F22 E22 E22 NC D22 D22 C22 C22 NC B22 B22 A22 A22
29 28 EI_NB_TO_CPU_AD<40> H25 H25 G25 G25 EI_NB_TO_CPU_AD<41> 28 29 F25 F25 E25 E25 EI_NB_TO_CPU_AD<43> 28 29 NCD25 D25 C25 C25 29 28 EI_NB_TO_CPU_AD<32> B25 B25 A25 A25
29 28 EI_NB_TO_CPU_AD<10> H26 H26 G26 G26 F26 F26 E26 E26 EI_NB_TO_CPU_AD<2> 28 29 29 28 EI_NB_TO_CPU_AD<8> D26 D26 C26 C26 29 28 EI_NB_TO_CPU_AD<23> B26 B26 A26 A26
29 28 EI_NB_TO_CPU_AD<39> H27 H27 G27 G27 F27 F27 E27 E27 EI_NB_TO_CPU_AD<38> 28 29 29 28 EI_NB_TO_CPU_AD<24> D27 D27 C27 C27 29 28 EI_NB_TO_CPU_CLK_N B27 B27 A27 A27
29 28 EI_NB_TO_CPU_AD<36> H28 H28 G28 G28 EI_NB_TO_CPU_SR_N<0> 28 29 29 28 EI_NB_TO_CPU_AD<37> F28 F28 E28 E28 SYNCENABLE 29 30 29 28 EI_NB_TO_CPU_AD<7> D28 D28 C28 C28 29 28 EI_NB_TO_CPU_CLK_P B28 B28 A28 A28
30 29 RI_L H29 H29 G29 G29 EI_NB_TO_CPU_SR_P<0> 28 29 29 28 EI_NB_TO_CPU_SR_N<1> F29 F29 E29 E29 TP_PROC_TRIGGER_OUT 6 29 29 28 EI_NB_TO_CPU_AD<6> D29 D29 C29 C29 EI_SE 28 29 30 29 MCP_L B29 B29 A29 A29
30 29 28 EI_QREQ_L H30 H30 G30 G30 I2C_SMU_A_SCL_OUT 13 18 29 28 EI_NB_TO_CPU_SR_P<1> F30 F30 E30 E30 29 28 EI_QACK_L D30 D30 C30 C30 18 13 I2C_SMU_A_SDA_OUT B30 B30 A30 A30
B B
A A
8
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FAN 0 - Q37 STYLE CPU FAN CONTROL CIRCUIT

CPU FAN 2 PP12V_RUN SYSTEM TEMP SENSOR
R1645
1
4.7 2
PP12V_FAN_0_ANALOG
VOLTAGE=12V PP3V3_PWRON
MIN_LINE_WIDTH=20MIL 5%
MIN_NECK_WIDTH=10MIL 1/16W
1
R1640 C1614 1 1 C1601 MF R1644 1
D 10K
1%
10UF
20%
0.47UF
20%
16V
402
4.7K
5% C1619 1 1
NOSTUFF
C1600 8
D
1/16W 16V 2 2 CERM 1/16W
MF ELEC MF 47UF 10UF
FAN_0_DRV_F SM 805 20% 10% VS+
2 402 402 2
2 16V
16V 2
ELEC CERM
1210
IIC ADDR:90(1001000) U1602
SOP
R1641 R1642 C1615 SM
7
LM75
100K 100K 100PF FAN_0_GATE
A0
FAN_0_DRV 1 2 1 2 FAN_0_OPM 1 2 6 A1
1%
1/16W
1%
1/16W 5%
5 A2 R1621
3 50V CRITICAL
MF MF CRITICAL CERM 3 1 3
0
402 402 I2C_TEMP_B_SDA SDA OS TEMP_SENSOR_OS
1 2 SYS_OVERTEMP_L
D
Q1600 1
R1639 2 8 U1600 402
D1604
18 13 25
27 36
R1605 2N7002 1 C1613 LM358-SOI 1N914 Q1601 I2C_TEMP_B_SCL 2 SCL

5%
1/16W
FAN_RPM0 1
0 2 FAN_0_CNTL 1 G S
SM 10K
1% 0.1UF 1 FAN_0_GT 3 1
18
MF
402
13
1/16W 20% 1 IRF5505 GND
5% MF 2 16V
CERM 3
G S SM 4
1/16W 2
MF 2 402 603 SOT23
402 4
D CRITICAL
NOSTUFF MAX FAN CURRENT=0.5A J1600
4 HF28040-B
R1600 R1643 M-ST-TH
1
0 2 FAN_0_OPP 1
10K 2
FAN_0_PWR 1
MIN_LINE_WIDTH=20MIL 2
5% NOSTUFF 1% MIN_NECK_WIDTH=10MIL
1/16W
MF 1
R1603 R16011
1/16W
MF C1616 2 CRITICAL 3
402
0 10K
402 4700PF C1617 1 1 C1618 D1605 4
5% 1% 1 2 10UF 10UF SM
1/16W 1/16W 10%
16V
10% MBR0530
MF MF 10% CERM 2 2 16V
CERM 1
PP3V3_PWRON 2 402 402 2 50V 1210 1210
CERM
603
1
C R1604 C
10K
1%
1/16W
R1606 MF
2 402
FAN_TACH0 1
0 2 FAN_0_TACH
13
5%
1/16W
MF
402
FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT

PP12V_RUN
SYSTEM FAN 1 L1602 L1603
R1611 4.7
FERR-EMI-100-OHM FERR-EMI-100-OHM
PP12V_FAN_1_ANALOG 1 2 1 2 PP12V_RUN_FAN_1_LC 1 2
VOLTAGE=12V SM SM
1
R1616 C1610 1 1 C1609 MF
402 R1610 1
NOSTUFF
1 C1602
0.47UF 0.01UF
B 10K
1%
1/16W
10UF
20%
16V 2
20%
2 16V
CERM
4.7K
5%
1/16W
C1604 1 1 C1603
10UF
20%
16V
2 CERM
B
MF ELEC
805 MF 47UF 10% 402
FAN_1_DRV_F SM 20%
2 402 402 2
16V 2 2 16V
ELEC CERM
1210
R1615 R1614 C1605 SM
100PF
1
100K 2 1
100K 2 1 2
FAN_1_GATE
FAN_1_DRV FAN_1_OPM
1% 1%
1/16W 1/16W 5%
3 MF MF CRITICAL 50V
402 402 CERM 3
D Q1602 1
R1620 2 8 U1601 402
D1602
R1635
0
2N7002
SM 10K
1 C1611 LM358-SOI 1N914 Q1603
13 FAN_RPM1 1 2 FAN_1_CNTL 1 G S 1% 0.1UF 1 FAN_1_GT 3 1
1/16W 20% 1
G S IRF5505
5% MF 2 16V
CERM 3 SM
1/16W 2 2 402 603 SOT23
MF CRITICAL
402 4
NOSTUFF
D J1601
MAX FAN CURRENT=0.5A 10-89-7062
R1619 4 L1600 M-ST-TH
1
0 2
R1613
10K
FERR-EMI-100-OHM 1 PP12V_RUN_FAN_1_LCL
FAN_1_OPP 1 2 FAN_1_PWR 1 2 FAN_1_PWR_FILT 4
5% MIN_LINE_WIDTH=20MIL
1/16W NOSTUFF 1% MIN_NECK_WIDTH=10MIL SM 6 5
MF
402 1
R1618 R16171
1/16W
MF C1608 2 CRITICAL
L1601
0 10K
402 4700PF C1607 1 1 C1606 D1601 FERR-EMI-100-OHM
5% 1% 1 2 10UF 10UF SM
1/16W 1/16W 10% 10% MBR0530 1 2 FAN_1_TACH_FILT
16V
CERM 1 SM
PP3V3_PWRON 2 402 402 2 50V 1210 1210
CERM
603 L1604
FERR-EMI-100-OHM
1 2 FAN_1_GND_FILT
A 1
R1623
10K
SM A
1%
1/16W
R1636 MF
2 402
FAN_TACH1 1
0 2 FAN_1_TACH
13
5%
1/16W
MF
402
8
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D D
FAN 2 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT

PP12V_RUN
R1745
4.7
PP12V_FAN_2_ANALOG 1 2
VOLTAGE=12V
1
R1740 C1714 1 1 C1701 MF
402 R17441 NOSTUFF
10K 10UF 0.47UF 4.7K
1%
1/16W
20%
16V 2
20%
16V
2 CERM
5%
1/16W
C1719 1 1 C1700
MF ELEC MF 47UF 10UF
FAN_2_DRV_F SM 805 20% 10%
2 402 402 2
16V 2 2 16V
ELEC CERM
1210
C R1741 R1742 C1715 SM
C
100PF
1
100K 2
100K
1 2 1 2
FAN_2_GATE
FAN_2_DRV FAN_2_OPM
1% 1%
1/16W 1/16W 5%
3 MF MF CRITICAL 50V
402 402 CERM 3
D Q1700 1
R1739 2 8 U1700 402
D1704
R1705 2N7002 1 C1713 LM358-SOI 1N914 Q1701
13 FAN_RPM2 1
0 2 FAN_2_CNTL 1 G S
SM 10K
1% 0.1UF 1 FAN_2_GT 3 1
1/16W 20%
16V
1
G S IRF5505
5% MF 2 CERM 3
1/16W 2 SM
MF 2 402 603 SOT23
CRITICAL
402 4
D J1700
NOSTUFF MAX FAN CURRENT=0.5A 10-89-7062
4 M-ST-TH
R1700 R1743 1
1
0 2 FAN_2_OPP 1
10K 2 FAN_2_PWR 4
5% NOSTUFF 1% MIN_NECK_WIDTH=10MIL 6 5
1/16W
MF 1
R1703 R17011
1/16W
MF C1716 2 CRITICAL
402
0 10K
402 4700PF C1717 1 1 C1718 D1705
5% 1% 1 2 10UF 10UF SM
1/16W 1/16W 10% 10% MBR0530
16V
CERM 1
PP3V3_PWRON 2 402 402 2 50V 1210 1210
CERM
603
1
R1704
10K
1%
1/16W
R1706 MF
2 402
0
B 13 FAN_TACH2 1
5%
2 FAN_2_TACH
B
1/16W
MF
402
A A
8
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11 6 PP5V_PWRON PP1V2_EI_NB 7 28
27 18 11 6 PP3V3_PWRON C1800 1 1
PP3V3_PWRON
I2C A BUS 0.1UF R1809 R18081 1
R1810
20%
10V 4.7K 200 200
CERM 2 5% 5% 5%
R18001 1
R1801
SMU 5%
1/16W
2K
5%
2K
1/16W
402
3
1/16W
MF
2 402
1/16W
MF
402 2
1/16W
MF
2 402 I2C B BUS
MASTER MF MF LM339A 8
U1300
402 2 2 402 SOI V+
R18031 1
R1802
I2C_SMU_A_SDA_IN 14 2K 2K
13
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C U1800 SMU 5%
1/16W
5%
1/16W
GND 6 U3LITE MF MF
D 14 13 I2C_SMU_A_SDA_OUT
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
12
9
D Q1800 U3
MASTER
U1300
402 2 2 402 D
13 I2C_SMU_A_SCL_IN NET_SPACING_TYPE=I2C 2N7002DW
MAKE_BASE=TRUE SOT-363
2 G S I2C_NB_A_SDA 24 NET_SPACING_TYPE=I2C
14 13 I2C_SMU_A_SCL_OUT NET_SPACING_TYPE=I2C 13 I2C_SMU_B_SDA
MAKE_BASE=TRUE I2C_NB_A_SCL 24 MAKE_BASE=TRUE
1 NET_SPACING_TYPE=I2C
PINS 36-39 13 I2C_SMU_B_SCL
MAKE_BASE=TRUE
3
LM339A 6 PINS 26, 27
PINS A20, B20
SOI V+
1
U1800 3
GND 7
12
D Q1800 PULSAR
27 18 11 6 PP3V3_PWRON 2N7002DW NOSTUFF NOSTUFF U2600
SOT-363
5 1 1
G S
R1820 R1821
0 0
R18191 1
R1818 4 5%
1/16W
5%
1/16W 27 I2C_CLOCK_SDA ALIAS
2K 2K MF MF
5% 5% 402 2 2 402 27 I2C_CLOCK_SCL ALIAS
1/16W 1/16W
MF MF 3
402 2 2 402 LM339A PP1V2_EI_CPU 7 29 30 31 35
10 PINS C1, B1
SOI V+
13
SMU U1800
MASTER
GND 11 R18161 1
R1817
1.2K 1.2K
U1300 RP1800 12 5%
1/16W
5%
1/16W
CPU SYSTEM TEMP SENSOR
13 I2C_SMU_CPU_SCL_IN I2C 0K MF MF U2900
MAKE_BASE=TRUE 5% 402 2 2 402 U1602
13 I2C_SMU_CPU_SCL_OUT I2C 1 8 SMU_CPU_JTAG_OR_I2C
MAKE_BASE=TRUE 2 7 I2C_CPU_A_SCL NET_SPACING_TYPE=I2C I2C_CPU_A_SCL 29 16 I2C_TEMP_B_SDA ALIAS
13 I2C_SMU_CPU_SDA_IN I2C 3 6
MAKE_BASE=TRUE I2C_CPU_A_SDA_TO_SMU NET_SPACING_TYPE=I2C I2C_CPU_A_SDA 29 16 I2C_TEMP_B_SCL ALIAS
4 5
C 13 I2C_SMU_CPU_SDA_OUT
MAKE_BASE=TRUE
PINS 14,25,23,68
I2C
1/16W LM339A
SOI
3
4
PINS AA20, Y21
PINS 1, 2 C
SM1 V+
2
U1800
GND 5
12
NOSTUFF
RP1801
0K CPU JTAG
I2C_0V546_REF I2C SB BUS PP3V3_RUN
5%
1 8 JTAG_CPU_TDO
1 C1801 1R1811
29 30
0.1UF 576
2 7 20%
JTAG_CPU_TDI 29 30 10V
2 CERM
1%
1/16W SHASTA R18151 1
R1814
3 6 JTAG_CPU_TMS 29 30 402 MF 1K 1K
4 5 2 402 MASTER 5% 5%
JTAG_CPU_TCK 29 30 1/16W 1/16W
1/16W
U2300 MF MF
402 2 2 402
SM1
25 I2C_SB_SDA
MAKE_BASE=TRUE
25 I2C_SB_SCL
MAKE_BASE=TRUE
PINS Y9, AB7
PP2V5_PWRON
I2C D & E BUS MICRODASH
B
I2C C BUS PP2V5_PWRON
J9400
B
PP3V3_ALL
94 6 I2C_UDASH_SDA ALIAS
1 1
R1805 R1804 U3LITE 94 6 I2C_UDASH_SCL ALIAS
2K 2K
5%
1/16W
5%
1/16W MASTER R18121 1
R1813 1 1
PINS 21, 24
MF
402 2
MF
2 402 U3 5%
2K 2K
5%
R1807 R1806
I2C_NB_C_SDA
1/16W 1/16W 2K 2K
24 MF MF 5% 5%
MAKE_BASE=TRUE
U3LITE ’B’ 402 2 2 402 1/16W
MF
1/16W
MF
RTC
I2C_NB_C_SCL 24 U3
402 2 2 402 U1301
AUDIO
MAKE_BASE=TRUE
U9500
PINS C21, E21
24 I2C_NB_B_SDA I2C I2C I2C_RTC_SDA 13
24 I2C_NB_B_SCL I2C I2C I2C_RTC_SCL 13 95 I2C_AUDIO_SDA ALIAS

95 I2C_AUDIO_SCL
DIMMS PINS 5, 6
ALIAS
J4000 = A0 PINS C20, B21 PINS 18, 19

J4001 = A2
ALIAS
I2C_DIMM_SDA 40 NOSTUFF NOSTUFF
ALIAS I2C_DIMM_SCL 40 R18221 1
R1823
PINS 91, 92 0 0
5% 5%
OF EACH DIMM 1/16W 1/16W
MF MF
402 2 2 402 NOSTUFF
R1824 R1826
2
0 1 2
0 1
SMU ’E’ 5% 5%
SMU ’D’
1/16W 1/16W
A MASTER
U1300
MF
402
MF
402
MASTER
U1300 A
NOSTUFF
13 I2C_SMU_E_SDA I2C R1825 R1827 I2C I2C_SMU_D_SDA 13
0 0
13 I2C_SMU_E_SCL I2C 2 1 2 1 I2C I2C_SMU_D_SCL 13
5% 5%
PINS 50, 51 1/16W 1/16W PINS 34, 35
MF MF
402 402
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
RGB_LED
C2105 RGB_LED PP5V_PWRON
220PF
1 2 GND_CHASSIS_LED 7 21
LED2100
LATBG66B PP5V_PWRON
AMB-GRN-BLUE RGB_LED RGB_LED RGB_LED
PLACE THESE PARTS CLOSE TO SMU IC 5% PLCC
PP5V_PWRON 25V
CERM
L2104 C2103 1 U2100
402 400-OHM-EMI 0.1UF 4
20% 10 + LP324
G_DRV_K 1 6 RGB_LED_A 1 2 10V 8
MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL CERM 2 9
RGB_LED MIN_NECK_WIDTH=10MIL AMB
MIN_NECK_WIDTH=10MIL SM-1 402 -
11TSSOP
D R21091
953K
1
3 2
D
RGB_LED 1% RGB_LED GRN 6 U2100_UNUSED
R2101 1/16W
MF L2100
2
0 1
402 2 RGB_LED 400-OHM-EMI
SYS_LED_GREEN G_PWM_IN_H RGB_LED
13
MAKE_BASE=TRUE
5%
U2100 SM-1 4 5
1 C2107
1/16W 4 BLUE
PWM INPUT FROM SMU RGB_LED 1 12 LP324 220PF
MF
402 R2104 + 14 G_BASE_DRV 2 5%
G_PWM_DC
953K 13 25V
- 2 CERM
1% G_DRV 402
1/16W 11TSSOP MIN_LINE_WIDTH=25MIL
MF MIN_NECK_WIDTH=10MIL
402 2 RGB_LED 3 RGB_LED
C2104 RGB_LED C2108 GND_CHASSIS_LED 7 21
220PF
0.022UF 1 Q2102 2 1
2 1 2N3904
SM
RGB_LED 2 5%
RGB_LED 1 20% 25V
C2106 1 R2105 16V
CERM RGB_LED G_DRV_FB
CERM
402
0.47UF 200K 402
20%
10V 1% R2112 MIN_LINE_WIDTH=25MIL
CERM 2 1/16W
2
1K 1
RGB_LED
603 MF G_IN_OFFSET C2109
402 2 1 RGB_LED
5MV INPUT OFFSET 1%
1/16W R2100 220PF
MF 25.5 2 1
402 1%
1/16W 5%
MF 25V
2 402 CERM
402
CHANGE R2100 VALUE
100% DUTY CYCLE OF 3V-PP PWM = 0.5V TO SET LED CURRENT
MAX LED CURRENT = 0.5 / R
C PLACE THESE PARTS CLOSE TO SMU IC SYS_DRV_A

C
PP5V_PWRON MIN_LINE_WIDTH=25MIL
R_DRV_K MIN_NECK_WIDTH=10MIL
LED2101
1
2 1
RGB_LED RGB_LED PP5V_PWRON
L2101
R21021 400-OHM-EMI
WHITE
SM6
WHITE_LED
953K SM-1
L2105
1%
1/16W
400-OHM-EMI
RGB_LED MF 1 2
402 2
R2115 RGB_LED
2 SM-1
SYS_DRV_K
0
13 SYS_LED_RED
MAKE_BASE=TRUE
2 1 R_PWM_IN_H U2100 R_DRV WHITE_LED
5% RGB_LED 4 MIN_LINE_WIDTH=25MIL
LP324
PWM INPUT FROM SMU 1/16W
MF R21101 5 + 7 R_BASE_DRV
MIN_NECK_WIDTH=10MIL 1 C2111
220PF
R_PWM_DC
402 953K 6 3
1% - RGB_LED WHITE_LED 5%
25V
1/16W 11TSSOP C2110 2 CERM
MF
402 2
RGB_LED 1 Q2108 220PF 402
2N3904
C2101 SM 2 1 GND_CHASSIS_LED 7 21
0.022UF 2
2 1 PLACE THESE PARTS CLOSE TO SMU IC 5%
RGB_LED 1 R_DRV_FB 25V
CERM
RGB_LED R2111 20% MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL 1 402
C2112 1 200K 16V
CERM RGB_LED
0.47UF
20%
1%
1/16W 402 R2114 NOSTUFF WHITE_LED
MF 1K RGB_LED Q2100
10V
CERM 2 402 2 R_IN_OFFSET 2 1
1 L2103
603 1% R2113 FDV302P 400-OHM-EMI
1/16W 25.5 PP3V3_PWRON SOT-23 WHITE_LED SM-1
MF
402
1%
1/16W R2106
MF 1K 2
D
2
3
SYS_LED_H 2 1 SYS_GATE
2 402
B R2119
NOSTUFF 5%
1/16W
SYS_LED_DRV_K
B
WHITE_LED MF MIN_NECK_WIDTH=10MIL
G
953K 1 1
402
2
R2129 1WHITE_LED
1% 4.7K R2103
1
1/16W 5%
MF
402
1/16W 100
PLACE THESE PARTS CLOSE TO SMU IC MF 1%
402 2 1/16W
MF
PP5V_PWRON NOSTUFF
B_DRV_K 2 402
MIN_LINE_WIDTH=25MIL R2132
1K 1
SYS_LED_DRV_C
13 SYS_LED SYS_LED_IN MIN_LINE_WIDTH=25MIL
PWM INPUT FROM SMU 5%
1/16W 3
RGB_LED RGB_LED MF WHITE_LED WHITE_LED
R21181 L2102 402
R2107 Q2101
953K 400-OHM-EMI 2
0 1
FDV301N
1% 1 SM
RGB_LED 1/16W SM-1
R2130 MF
402 2 RGB_LED
5%
1/16W
2
0 MF
13 SYS_LED_BLUE
MAKE_BASE=TRUE
2 1 B_PWM_IN_H U2100 2 402
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
PWM INPUT FROM SMU 5% RGB_LED 1 4
3 LP324 (AND NO STUFF R2132, R2119 & Q2100)
1/16W
MF R2116 + 1 B_BASE_DRV
B_DRV
B_PWM_DC
402 953K 2 MIN_NECK_WIDTH=10MIL

1% -
1/16W 11TSSOP 3
MF
402 2 RGB_LED
RGB_LED
C2102 1 Q2114
0.022UF 2N3904
SM
1 2 2
RGB_LED RGB_LED 1 20%
C2118 1 R2117 16V
CERM
B_DRV_FB
0.47UF 200K 402 MIN_NECK_WIDTH=10MIL
A 20%
10V
CERM 2
1%
1/16W
MF RGB_LED 1
RGB_LED A
603 402 2 R2127 R2126
1K 25.5
B_IN_OFFSET 2 1 1%
1/16W
1% MF
1/16W
MF 2 402
402
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_ITEM
343S0284 1 IC,U3LITE,V1.1,300MM,PBGA U3
TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

PART NUMBER
TABLE_ALT_ITEM
343S0282 343S0284 U3 U3L,V1.1,200MM,PBGA

NOTE:
SET OUTPUT=1.5VDC FOR U3LITE CORE
IRU3037CS VREF=1.25VDC
VOUT=VREF*(R2203+R2205)/R2205=1.5VDC
D 7.73A OF PEAK CURRENT DRAW ON PCORE_NB
D
PP5V_PWRON PP5V_PWRON
PPVCORE_NB 6 7 22
PP5V_PWRON VOLTAGE=1.2V
D2200
2 1
1
MBR0520L 1
R2200
W14
W17
V12
V15
U10
U13
U18
T11
T16
R14
R17
P12
P15
N13
N18
M11
M16
L14
L17
K12
K15
SM
4.7
D2202
5% MBR0520L VDD
1/10W SM AG7 R18
FF
D2201 2 1 C2201 1
C2202 1
C2203 AG13 P11
2 805 10UF 390UF 390UF OMIT
U2200_VC_R 2 1 U2200_VC_D 20% 20% 20% AG16 P16
6.3V
U2200_VC
2 CERM 2 6.3V
ELEC
2 6.3V
ELEC AG22 U3 P19
MBR0520L 1206 8X11.5-TH 8X11.5-TH U3LITE
SM AE4 N4
1 C2204 1 C2216 V1.0-300MM
AE10 PBGA N8
1UF 1UF D (SYM 6 OF 7)
20% 2 6 20% AE19 N9
2 25V
CERM VCC VC 2 25V
CERM
R2202 Q2201 1 C2217 AE25 N14
805 805 1
0 2 NTD60N02R 1UF
U2200 Q2201_GATE
G
CASE369 20% AC7 N17
25V
IRU3037CS 5%
1/10W S
2 CERM AC13 N23
SOI
HD 5 U2200_GATE_H
FF
805
805 L2201 AC16 N27
1.6UH
U2200_SS 8 SS AC22 M12
MIN_LINE_WIDTH=25MIL Q2202_DRAIN 1 2
LD 3 U2200_GATE_L MIN_NECK_WIDTH=10MIL AB2 M15
TH
U2200_COMP 7 COMP NOSTUFF AB6 M20
1 1 NOSTUFF 1 AB23 L10
FB 6 U2200_FEEDBACK R2204 R2203
1 C2207 C
C 1
R2201
27.4K GND
D 4
Q2202
1.1K
1%
1/16W
1UF
20%
2K
1%
1/16W
AB27
AA10
L13
L18
10V
1% 4 NTD60N02R MF 2 CERM MF AA19 K2
1/16W 1
2 402 603 2 402
MF G
CASE369 1
C2208 1
C2209 Y12 K6
1 C2214 2 402 1 C2213 1 C2206 S3 R2204_P2 1800UF 1800UF
NOSTUFF 20% 20% Y15 K11
0.1UF R2201_P2 68PF 220PF NOSTUFF 2 6.3V 2 6.3V
20%
16V
5%
50V
5%
25V
1 C2205 1 C2212
ELEC
TH-KZJ
ELEC
TH-KZJ
Y20 GND K16
2 CERM 1 C2215 2 CERM 2 CERM
0.022UF 1 W4 GND K21
603
3900PF
603 402 10%
50V
1UF
20%
R2205 W8 K25
2 CERM 10K
5%
50V 603 2 25V
CERM 1% W13 J9
2 CERM 1206 1/16W
603 MF W18 J14
2 402
W21 H10
W25 H19
V11 G4
V16 G23
U2200_FEEDBACK V19 G27
U9 F13
U14 F16
U17 F22
CHECK FETS T2 D2
T6 D7
T12 D10
T15 D19
T20 D25
T23 B4
T27 B13
R10 B16
B R13 B22
B
22 7 6 PPVCORE_NB
1 C2222 1 C2223 1 C2225 1 C2227 1 C2228 1 C2229 1 C2230 1 C2231 1 C2232 1 C2233 1 C2234 1 C2235 1 C2236 1 C2237 1 C2238 1 C2239 1 C2240 1 C2242 1 C2243 1 C2244 1 C2245 1 C2246 1 C2247
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
A A
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7 6 5 4 3 2 1
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VOLTAGE MIN_LINE_WIDTH MIN_NECK_WIDTH
3.3V 25MIL 10MIL _PPPCI64_PWRON_SB 7 23
3.3V 25MIL 10MIL _PPPCI32_PWRON_SB 7 23
3.3V 25MIL 10MIL _PP3V3_PWRON_SB 7 23 25
2.5V 25MIL 10MIL _PP2V5_PWRON_SB 7 23 25 74 88
1.2V 100 15MIL PP1V2_PWRON_SB_VCORE 3 6 10 23

TABLE_5_HEAD

TABLE_5_ITEM
343S0283 1 IC,ASIC,SHASTA,V1.1,PBGA U2300
Page Notes
D Power aliases required by this page: D
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PP3V3_PWRON_SB
- _PP2V5_PWRON_SB
NOTE: PCI pads use the VIO supply to meet
different drive timing
characteristics required by the PCI
spec for 5V vs. 3.3V operation. _PP2V5_PWRON_SB 7 23 25 74 88
Connect _PPPCI32_PWRON_SB to
appropriate PCI bus voltage and 23 10 6 3 PP1V2_PWRON_SB_VCORE
_PPPCI64_PWRON_SB to same if 64-bit 1 C2350 1 C2351
PCI, otherwise 3.3V. 0.1uF 0.1uF
20% 20%
H15
J12
J15
L15
M15
P15
R10
R12
T10
T15
C2300 C2301 C2302 C2303 C2304 10V 10V
H8
K8
L8
N8
R9
1 1 1 1 1 2 CERM 2 CERM
Signal aliases required by this page: 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 402 402
- (NONE) 20% 20% 20% 20% 20% VDDC
2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM AA1 D19
402 402 402 402 402 OMIT
Power Sequencing: AA2 VDDO25 G15
Must power Shasta VCore rail before any AA3 U2300
other Shasta supplies. AB10
SHASTA _PPPCI64_PWRON_SB 7 23
V1.0 H18
1 C2305 1 C2306 1 C2307 1 C2308 1 C2309 AB2 BGA
H17
neoBorg Implementation 0.1uF
20%
0.1uF
20%
0.1uF
20%
0.1uF
20%
0.1uF
20%
AB6 (1 OF 8) VIO1
K21 1 C2355 1 C2356 1 C2357
2 10V 2 10V 10V
2 CERM 2 10V 10V
2 CERM B1
Master power enable signal (from PMU) CERM
402
CERM
402 402
CERM
402 402
0.1uF 0.1uF 0.1uF
B2 20% 20% 20%
connects directly to SBVCORE supply B5
POWER L21
10V
2 CERM 2 10V
CERM 2 10V
CERM
VDDO33
402 402 402
(SBVCORE_RUN). Supply asserts PGOOD D1 W22
VIO2
(SBVCORE_PGOOD) when ready, which acts as F4 Y19 For PCI_AD<63..32>
the power enable signal for the rest of 1 C2310 1 C2311 1 C2312 1 C2313 1 C2314 C
C the neoBorg components. 0.1uF
20%
0.1uF
20%
0.1uF
20%
0.1uF
20%
0.1uF
20%
F8
H1
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM L7 VDDP_KL V8 _PPPCI32_PWRON_SB 7 23
402 402 402 402 402
M1
R2
U12
1 C2360 1 C2361 1 C2362
Shasta max (est 06/30/03) current: 0.1uF 0.1uF 0.1uF
U9 20% 20% 20%
10V 10V 10V
V7 2 CERM 2 CERM 2 CERM
25 23 7 _PP3V3_PWRON_SB DIGITAL - 1.2V - 950 mA (1175 mW) 402 402 402
W4 ANALOG12 - 1.2V - 600 mA ( 760 mW)
VDDPs - 2.5V - 100 mA ( 250 mW) For PCI_AD<31..0>
1 C2320 1 C2321 1 C2322 1 C2323 1 C2324 A1 I/O 2.5 - 2.5V - 20 mA ( 60 mW) W5
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF A2 I/O 3.3 - 3.3V - 220 mA ( 770 mW) W19
20% 20% 20% 20% 20% _PP2V5_PWRON_SB 7 23 25 74 88
2 10V 2 10V 10V
2 CERM 2 10V 2 10V A22 U22
CERM CERM CERM CERM
402 402 402 402 402 A5 Total: 3015 mW U13
AA10 U10
AA6 T12
1 C2365
0.1uF
AB1 R19 20%
1 C2325 1 C2326 1 C2327 1 C2328 1 C2329 AB22 P9
10V
2 CERM
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 402
20% 20% 20% 20% 20% C19 P4
2 10V 2 10V 10V
2 CERM 2 10V 10V
2 CERM D2 GND
CERM
402
CERM
402 402
CERM
402 402 GND P14
E22 P13
F3 P12
F7 P10
1 C2330 1 C2331 1 C2332 1 C2333 1 C2334 H2 N9
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF H9 N22
20% 20% 20% 20% 20%
2 10V 2 10V 10V
2 CERM 2 10V 2 10V J10 N13
CERM CERM CERM CERM
B 402 402 402 402 402 J11

J13
N12
N11
B
J14 N10
J16 M2
1 C2335 1 C2336 1 C2337 1 C2338 1 C2339 GND
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
J22
K10
K11
K12
K13
K7
K9
L10
L11
L12
L13
L14
L16
L9
M10
M11
M12
M13
M14
20% 20% 20% 20% 20%
10V 10V 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402
A A
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
LAST_MODIFIED=Fri Nov 21 11:24:04 2003
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
60 7 PP1V2_HT
PP2V5_PWRON 1
R2400
100
1%
U3LITE REQUIRES ALL JTAG SIGNALS 1/16W
NOSTUFF MF
HIGH FOR NORMAL OPERATION 2 402
1 C2401 NB_VSP_CLK_VREF
1000PF VOLTAGE=0.6V MIN_LINE_WIDTH=25MIL
5% MIN_NECK_WIDTH=10MIL
25V
2 CERM
1 1
R2424 R2426 R2429 R2431 R2433 R2436 1 1 1 1
603
1
R2403 1 C2400 1R2402 1R2401 PP3V3_PWRON PP2V5_PWRON
10K 10K 10K 10K 10K 10K 100 0.1UF 121 121
5% 5% 5% 5% 5% 5% 1% 20% 1% 1%
D 1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
1/16W
MF
2 402
2 10V
CERM
402
1/16W
MF
2 402
1/16W
MF
2 402
1
NOSTUFF
R2420 1
NOSTUFF
R2419
D
10K 100
U3 5%
1/16W
5%
1/16W
U3LITE MF MF
V1.0-300MM 2 402 2 402
PBGA PMU_SUSPEND_REQ NB_SUSPEND_REQ_L 24
(SYM 7 OF 7)
27 VSP_NB_CLK_P P4 VSP_CLKP HRESET* A21 NB_RST_L 24

6 NOSTUFF 3 NOSTUFF
OMIT
27 VSP_NB_CLK_N R4 VSP_CLKN PURESET* E20
D20
NB_PU_RST_L
NB_SUSPEND_ACK_L
24 D
Q2404
2N7002DW
D
Q2404
2N7002DW
R25 CE1_LT_TCK SUSPENDACK* 24
JTAG_NB_TCK JTAG_NB_TCK SOT-363 SOT-363
SUSPENDREQ* D21 NB_SUSPEND_REQ_L 24 25 13 SMU_SUSPENDREQ_L 2 G S 5 G S
JTAG_NB_TDI JTAG_NB_TDI V25 CE1_A_TDI
JTAG_NB_TDO JTAG_NB_TDO AA25 CE1_B_TDO API0_ISCL A20 I2C_NB_A_SCL 18 1 4
JTAG_NB_TMS JTAG_NB_TMS M26 CE1_DI1_TMS API_ISCA B20 I2C_NB_A_SDA 18
JTAG_NB_TRST_L JTAG_NB_TRST_L F20 CE1_DI2_TRST SYS_ISCL0 C20 I2C_NB_B_SCL 18
NB_RI_PU AC2 CE1_RI SYS_ISCA0 B21 I2C_NB_B_SDA 18

R2408
AH3 CEO_TEST SYS_ISCL1 C21 I2C_NB_C_SCL 18 0
NB_TEST_PD 1 2
AD5 CE0_MC SYS_ISCA1 E21 I2C_NB_C_SDA 18
NB_MC_PD 5%
1/16W
NB_RE_PD AD3 CE0_RE DUMMY_A AC28 TP_DUMMY_A 6 MF
402
D15 PM_SLEEP0 DUMMY_B AB28 TP_DUMMY_B 6
1 6 TP_NB_PM_SLEEP0
R2444 1R2443 1R2442 IRQ0 E9 NB_INT_L 25
10K 10K 10K
5% 5% 5%
1/16W 1/16W 1/16W PMR_OBSV Y9 NB_PMR_OBSV 8
MF MF MF
2 402 2 402 2 402 THMI J17 NB_THMI 8
THMO J18 NB_THMO 8
C C
PP3V3_PWRON
PP2V5_PWRON PP3V3_PWRON PP2V5_PWRON PP3V3_PWRON
NOSTUFF NOSTUFF NOSTUFF NOSTUFF

R2405 1R2438
1 1
R2435 1
R2423 1
R2422 1
R2421 1
R2418
4.7K 10K 4.7K 10K 4.7K 10K 100
5% 5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W 1/16W 5% 5%
MF MF MF MF MF 1/16W 1/16W
2 402 2 402 2 402 2 402 2 402 MF MF
NB_PU_RESET NB_PU_RST_L 24 NB_RESET NB_RST_L 24
2 402 2 402
NB_SUSPEND_ACK
NB_SUSPENDACK_L 13
6 NOSTUFF 3 NOSTUFF 6 NOSTUFF 3 NOSTUFF
3
D
Q2412 D
Q2412 D
Q2409 D
Q2409 3
2N7002DW 2N7002DW 2N7002DW 2N7002DW
SYS_COLD_RESET_L 2 G S
SOT-363 5 G S
SOT-363
SMU_WARM_RESET_L 2 G S
SOT-363 5 G S
SOT-363 D
Q2407
24 13 13 8
Q2408 2N7002
SM
1 4 1 4 24 NB_SUSPEND_ACK_L 1 SI2302DS 1 G S
SM
B 2 B
R2406 2
1
0 2 R2407 NOSTUFF
1
0 2 R2409
5%
1/16W
MF 5% 1
0 2
402 1/16W
MF 5%
402 1/16W
MF
402
I109 SMU_RESET 10 MIL SPACING SYS_COLD_RESET_L 13 24
I110 SMU_RESET 10 MIL SPACING SYS_WARM_RESET_L 8 25 74 77 87
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
I2S0_TO_SB I2S0_DEV_TO_SB_DTI 25 95 25 23 7 _PP3V3_PWRON_SB

I2S0_TO_DEV I2S0_SB_TO_DEV_DTO 25 95
I2S0_TO_DEV I2S0_MCLK 25 95
R2554
1K
I2S0_BIDIR I2S0_BITCLK 25 95 25 13 SB_TO_SMU_INT_L 1 2
NO STUFF
I2S0_BIDIR I2S0_SYNC 25 95 5%
1/16W
MF R2555
I2S1_TO_SB I2S1_DEV_TO_SB_DTI 6 25 76 94 402 10K
30 29 25 CPU_SRESET_L 1 2
I2S1_TO_DEV I2S1_SB_TO_DEV_DTO 6 25 76 94
5%
I2S1_TO_DEV I2S1_MCLK 6 25 94
R2560 1/16W
MF
I2S1_BIDIR I2S1_BITCLK 6 25 94 1K 402
SYS_OVERTEMP_L 1 2
I2S1_BIDIR I2S1_SYNC PP1V2_PWRON_SB_PLL45VDD L2520 36 27 25 16 13
D
D I2S2_TO_SB I2S2_DEV_TO_SB_DTI
6 25 94
25 99
VOLTAGE=1.2V
MIN_LINE_WIDTH=20 mil
FERR-EMI-600-OHM
1 2
_PP1V2_PWRON_SB 7
5%
1/16W
MF R2561
402 10K
I2S2_TO_DEV I2S2_SB_TO_DEV_DTO 25 99 94 25 6 UDASH_RESET_L 1 2
SM NO STUFF
I2S2_TO_DEV I2S2_MCLK 5%
I2S2_BIDIR I2S2_BITCLK
25 99
C2521 1 C2520 1
R2562 1/16W
MF
25 99
0.001uF 10uF 1K 402
I2S2_BIDIR I2S2_SYNC 25 99
10% 20% 33 27 25 13 SYS_SLEWING_L 1 2
50V 6.3V 2
CERM 2 CERM 5%
402 1206 REDUNDANT - NEED TO ADDRESS THIS
SB_CLK18M_XTAL 15 MIL SPACING SB_CLK18M_XTALI 25 1/16W
R2563
MF
15 MIL SPACING SB_CLK18M_XTALO 25
MODEM_RING2SYS_L
402
1
10K 2
15 MIL SPACING SB_CLK18M_XTALO_R 25 L2500 PP2V5_PWRON_SB_XTAL18VDD
VOLTAGE=2.5V
94 25 6
5%
SB_CLK25M_ATA 15 MIL SPACING SB_CLK25M_ATA 25 27 88 74 23 7 _PP2V5_PWRON_SB FERR-EMI-600-OHM MIN_LINE_WIDTH=20 mil 1/16W
MIN_NECK_WIDTH=15 mil MF
1 2 PP1V2_PWRON_SB_PLL49VDD
VOLTAGE=1.2V
L2530 402
SM MIN_LINE_WIDTH=20 mil
FERR-EMI-600-OHM
Page Notes 1 C2500

10uF
20%
1 C2501
0.001uF
10%
MIN_NECK_WIDTH=15 mil 1
SM
2
94 25 6 I2S1_RESET_L
R2564
1
10K 2
NO STUFF
Power aliases required by this page: 6.3V
2 CERM
50V
2 CERM C2531 1 C2530 1 5%
- _PP3V3_PCI 1206 402 0.001uF 10uF 1/16W
MF R2565
10%
50V
20%
6.3V
402 10K
- _PP3V3_PWRON_SB CERM 2 CERM 2 25 SB_SATABR_RESET_L 1 2
402 1206
- _PP2V5_PWRON_SB REDUNDANT - NEED TO ADDRESS THIS 5%
- _PP1V2_PWRON_SB R2566 1/16W
MF
10K 402
L2510 PP2V5_PWRON_SB_XTALVDD
VOLTAGE=2.5V
90 25 FW_LOWPWR 1 2
FERR-EMI-600-OHM MIN_LINE_WIDTH=20 mil 5%
(NONE) 1 2 MIN_NECK_WIDTH=15 mil
_PP3V3_PWRON_SB
1/16W
MF R2567
7 23 25
SM
402 10K
BOM options provided by this page: 87 25 ENETFW_RESET 1 2
1 C2510 1 C2511
AA13
- PCI_64BIT 5%
W14
Y13
Y12
W17
Configures Shasta for 64-bit PCI 10uF
20%
0.001uF
10%
1 C2540 R2568 1/16W
MF
6.3V 50V 0.1uF 10K 402
NOTE: XGC required for Shasta GPIOs 2 CERM 2 CERM XTAL XTAL_18 PLL_45 PLL_49 VIO 20% 87 25 ENET_ENERGYDET 1 2
C 1206 402
VDD VDD VDD VDD PME 10V
2 CERM
402
5%
1/16W
MF
C
U2300 OMIT 402
SHASTA
I2S0: Audio DAC

Re-pin within each RPAK as necessary
V1.0 GPIO 25 23 7 _PP3V3_PWRON_SB
DO NOT swap between RPAKs "Slot E" - AD21
BGA
95 25 I2S0_DEV_TO_SB_DTI (I2S0_DEV_TO_SB_DTI) W7 I2S0DTI_H
(2 OF 8) 6 PCI1REQ_3_L U17 PCI_SLOTE_REQ_L 25 RP2550
NorthBridge / SouthBridge MPIC Routing 95 25 I2S0_SB_TO_DEV_DTO 4
RP2510 6
5 I2S0_SB_TO_DEV_DTO_R Y5 I2S0DTO_H 7 PCI1GNT_3_L AA19 PCI_SLOTE_GNT_L 25
4
10K
5
I2S0
3 U8 I2S0MCLK_H "Slot F" - AD22 25 SB_GPIO12
95 25 I2S0_MCLK 33 I2S0_MCLK_R
PP3V3_RUN 95 25 I2S0_BITCLK 1 5%
1/16W 8 I2S0_BITCLK_R AA4 I2S0BITCLK_H 8 PCI1REQ_4_L AB21 PCI_SLOTF_REQ_L 25 5%
1/16W
RP2550
SM1 9 PCI1GNT_4_L AA20 PCI_SLOTF_GNT_L 25 SM1 10K
I2S0_SYNC 2 7 I2S0_SYNC_R Y6 I2S0SYNC_H PCI_SLOTB_INT_L 2 7
I2S1: Soft Modem

95 25 25
94 76 25 6 I2S1_DEV_TO_SB_DTI (I2S1_DEV_TO_SB_DTI) V10 I2S1DTI_H 10 PCI1REQ_5_L U16 SB_TO_SMU_INT_L 13 25 RP2550 5%

1/16W
1
R2576 2 7 AB5 I2S1DTO_H 11 PCI1GNT_5_L Y20 CPU_SRESET_L 25 29 30
1
10K 8 SM1
94 76 25 6 I2S1_SB_TO_DEV_DTO I2S1_SB_TO_DEV_DTO_R 25 PCI_SLOTC_INT_L
10K RP2520
(SCCA)
I2S1
5%
1/16W
94 25 6 I2S1_MCLK 1 33
5%
8 I2S1_MCLK_R V9 I2S1MCLK_H 12 PCI1AD_32_H D18 SB_GPIO12 25 5%
1/16W
RP2551
MF 94 25 6 I2S1_BITCLK 4 1/16W 5 I2S1_BITCLK_R AA8 I2S1BITCLK_H 13 PCI1AD_33_H A20 SYS_OVERTEMP_L 13 16 25 27 36 SM1 10K
PCI_SLOTF_INT_L 1 8
2 402 To SouthBridge -> 94 25 6 I2S1_SYNC 3 SM1 6 I2S1_SYNC_R AA7 I2S1SYNC_H 14 PCI1AD_34_H F18 UDASH_SDOWN 6 94
25
NB_TO_SB_INT 25 94 25 6 I2S1_RESET_L (I2S1_RESET_L) V5 GPIO_H_0 15 PCI1AD_35_H F17 UDASH_RESET_L 6 25 94

RP2551 5%
1/16W
10K SM1
MPIC_SB AA5 I2S2DTI_H 16 PCI1AD_36_H G16 AGP_INT_L 49 25 SB_GPIO23 3 6
I2S2_DEV_TO_SB_DTI
I2S2: S/P-DIF
99 25 (I2S2_DEV_TO_SB_DTI)
-> From NorthBridge R2575 3
MPIC_SB I2S2_SB_TO_DEV_DTO 4 5 I2S2_SB_TO_DEV_DTO_R Y8 I2S2DTO_H 17 PCI1AD_37_H F16 PCI_SLOTA_INT_L 6 25 76 5%
1/16W
RP2551
10K 99 25
RP2530 18 PCI1AD_38_H A21 PCI_SLOTB_INT_L SM1 10K
Q2576
I2S2
25
(SCCB)
24 NB_INT_L 1 2 NB_INT_L_R 1 99 25 I2S2_MCLK 3 33 6 I2S2_MCLK_R Y7 I2S2MCLK_H 25 SB_GPIO24 2 7
2N3904 5% 19 PCI1AD_39_H B21 PCI_SLOTC_INT_L 25
MPIC_NB 5%
1/16W SM
99 25 I2S2_BITCLK 2 1/16W
SM1
7 I2S2_BITCLK_R AB4 I2S2BITCLK_H
20 PCI1AD_40_H C20 PCI_SLOTD_INT_L 25
RP2550 5%
1/16W
R2579 1 MF 2 99 25 I2S2_SYNC 1 8 I2S2_SYNC_R W9 I2S2SYNC_H 10K SM1
402
Y2 GPIO_H_1 21 PCI1AD_41_H G17 PCI_SLOTE_INT_L 25 25 SB_GPIO25 3 6
0 99 I2S2_RESET_L (I2S2_RESET_L)
5%
1/16W MPIC_SB
AUDIO GPIO - see note on right 22 PCI1AD_42_H G18 PCI_SLOTF_INT_L 25 5%
1/16W
RP2551
MF SB_INT_L AB3 GPIO_H_2 23 PCI1AD_43_H E19 SB_GPIO23 SM1 10K
GPIO
25 25
SB_GPIO30 4 5
<- To CPU
402 2 R2578 From SouthBridge <- 94 25 6 MODEM_RING2SYS_L W8 GPIO_H_3 24 PCI1AD_44_H F19 SB_GPIO24 25
25
29 14 CPU_INT_L 1
0 2 SB_INT_L 25 25 23 7 _PP3V3_PWRON_SB SB_PCI_SEL32BIT W6 PCI_SEL32BIT_H 25 PCI1AD_45_H D20 SB_GPIO25 25
RP2552 5%
1/16W
30 10K SM1
B B
PCI
5% NO STUFF Y9 I2CCLK_H 26 PCI1AD_46_H E20 SB_SATABR_RESET_L 25 25 SB_GPIO45 1 8
I2C_SB_SCL
I2C
1/16W 18
MF
402 R25001 18 I2C_SB_SDA AB7 I2CDATA_H 27 PCI1AD_47_H C21 PCI_SLOTG_INT_L 25 77 5%
1/16W
RP2552
4.7K 28 PCI1AD_48_H F20 FW_LOWPWR 25 90 SM1 10K
5% 25 SB_GPIO46 2 7
1/16W 87 77 74 24 8 SYS_WARM_RESET_L E9 RESET_L 29 PCI1AD_49_H G19 ENETFW_RESET 25 87
MF RP2552 5%
PWR_MGT
402 2 SB_STOPXTALS_L W10 STOPXTALS_L 30 PCI1AD_50_H C22 SB_GPIO30 1/16W
13 25
10K SM1
NOTE: It is the responsibility of

the audio circuit to provide the
necessary pull-ups & pull-downs.
24 13 SMU_SUSPENDREQ_L U11 SUSPENDREQ_L 31 PCI1AD_51_H D21 ENET_ENERGYDET 25 87 25 SB_GPIO47 3 6
13 SB_SUSPENDACK_L V11 SUSPENDACK_L 32 PCI1AD_52_H G20 AUDIO_LO_DET_L 6 98 5% RP2552
AUDIO GPIOS
PCI_64BIT W18 1/16W
10K
PCI 32-bit select 77 13 SYS_PME_L PCI1PME_L 33 PCI1AD_53_H D22 AUDIO_LO_METAL_PLUG_L 98 SM1
_PP3V3_PCI 7 74 75 76 77 R25011 TP_SB_WATCHDOG V12 INTRWD_H 34 PCI1AD_54_H K18 AUDIO_LI_DET_L 98
25 SB_GPIO49 4 5
1 = 32-bit PCI & GPIOs 4.7K

PCI1AD_55_H H19 AUDIO_LI_METAL_PLUG_L RP2553 5%
R2550 0 = 64-bit PCI & XGC
5%
1/16W 8 JTAG_SB_TDI AA11 TDI 35 99
10K 1/16W
SM1
10K MF W11 TDO 36 PCI1AD_56_H J17 AUDIO_HP_DET_L 99 25 SB_GPIO50 4 5
1 2 PCI_SLOTE_REQ_L 25 (Internal pull-up) 402 2 8 JTAG_SB_TDO
5% 8 JTAG_SB_TCK AB11 TCK 37 PCI1AD_57_H F21 AUDIO_SPKR_DET_L 99 5%
1/16W
RP2553
PCI1AD_58_H G21 AUDIO_LO_MUTE_L 10K
R2551 1/16W 38 SM1
TEST
96
MF 8 JTAG_SB_TMS Y11 TMS 25 SB_GPIO51 2 7
10K 402 39 PCI1AD_59_H H20 AUDIO_HP_MUTE_L 99
1 2 PCI_SLOTE_GNT_L 25 8 JTAG_SB_TRST_L W12 TRST_L
40 PCI1AD_60_H J19 AUDIO_SPKR_MUTE_L 97
RP2553 5%
1/16W
5%
A3 TEST_MODE_H
10K SM1
1/16W
R2552 SB_TEST_MODE_PD 41 PCI1AD_61_H F22 AUDIO_EXT_MCLK_SEL 99 25 SB_GPIO52 3 6
MF
402
1
10K 2 PCI_SLOTF_REQ_L
6 TP_SB_PLLTEST U14 PLLTEST 42 PCI1AD_62_H G22 AUDIO_GPIO_11 99 5%
1/16W
RP2553
25
R2580 1 6 TP_SB_FSTEST V14 FSTEST 43 PCI1AD_63_H H21 AUDIO_GPIO_12 98 SM1 10K
5% 25 13 SMU_TO_SB_INT_L 1 8
R2553 1/16W 4.7K W13 XTAL_18_I J20
MF 5% 25 SB_CLK18M_XTALI 44 PCI1C_BE_4_L I2S0_RESET_L 95 5%
10K 402 1/16W V13 XTAL_18_O H22 1/16W
XTALS
1 2 PCI_SLOTF_GNT_L 25 MF 25 SB_CLK18M_XTALO_R 45 PCI1C_BE_5_L SB_GPIO45 25 SM1
402 2 K22
5% 46 PCI1C_BE_6_L SB_GPIO46 25
SB_CLK25M_ATA U15 XTALI
1/16W
MF R2556 27 25
47 PCI1C_BE_7_L K20 SB_GPIO47 25
402 10K 1 NC V15 XTALO
1 2 PCI_SLOTA_INT_L 6 25 76 R2590 48 PCI1REQ64_L K17 SYS_SLEWING_L 13 25 27 33
5% 200 L17
R2557 1/16W 1% 49 PCI1ACK64_L SB_GPIO49 25
MF 1/16W
10K 402 MF 50 PCI1PAR64_H E18 SB_GPIO50 25
1 2 PCI_SLOTD_INT_L
A 5%
25 CRITICAL
Y2590
2 402
51 XGI_CLK_H Y4 SB_GPIO51 25 A
1/16W
R2558 18.432M SB_CLK18M_XTALO 25
XGI_DTO0_H U7 SB_GPIO52
XGI
MF 52 25
402 10K 1 2
1 2 PCI_SLOTE_INT_L 25 53 XGI_DTO1_H T9 NB_TO_SB_INT 25
5% 8X4.5MM-SM 54 XGI_DTI_H W2 SMU_TO_SB_INT_L

R2559 1/16W
MF
C2590 1 1 C2591 XTAL_18 PLL_45 PLL_49
13 25
10K 402 22pF 22pF

1 2 PCI_SLOTG_INT_L 25 77
5% 5% GND GND GND
50V 50V
AB12
AB13
AA12
5% CERM 2 2 CERM
1/16W 402 402
MF
402
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
L2601 26 7 PPVCORE_PWRON_PULSAR SYM 2 OF 2

26 7 PPVCORE_PWRON_PULSAR FERR-250-OHM F1 C1_VDD OMIT
C1_VSS G1
1 2 L3 C2_VDD U2600 C2_VSS M4
SM E12 C3_VDD PULSAR C3_VSS E10
B9 C4_VDD
FSBGA
R2601 C4_VSS C9
4.7 D10 VDD_PLL1
1 2 PP1V5_PSL_PLL1 VSS_PLL1 D12
VOLTAGE=1.5V D2 VDD_PLL2
5% MIN_LINE_WIDTH=25MIL VSS_PLL2 D1
1/16W
MF
1 C2645 1 C2609 MIN_NECK_WIDTH=10MIL L8 VDD_PLL3 VSS_PLL3 K8
402 2.2UF 0.1UF
1 C2611 10% 20% M3 VDD_PLL4 VSS_PLL4 M2
D 0.1UF
20%
10V
6.3V
2 CERM1
603
10V
2 CERM
402
PP3V3_PWRON
VSS_CML A6
D
2 CERM B2 VDD_I2C
402 VSS_I2C C2
26 7 PP1V2_PULSAR G12 VDD_NBSYNC VSS_NBSYNC F11
PLACE NEAR PIN D10 D12 M12 VDD_PCLK VSS_PCLK L12
L2603 PP2V5_RAM
FERR-250-OHM 37 26 7
H3 VDD25 VSS25 L2
1 2 PP3V3_PWRON K1 VDD25 VSS25 H2
SM PP3V3_RUN
E1 VDD33 VSS33 E2
R2609
1
4.7 2 PP1V5_PSL_PLL2
L5 VDD33_BC VSS33_BC L7
VOLTAGE=1.5V M9 VDD33_BC1 VSS33_BC1 M5
5% MIN_LINE_WIDTH=25MIL PPVCORE_PULSAR
1/16W
MF
1 C2669 1 C2617 MIN_NECK_WIDTH=10MIL
26 7
A11 VDD_HCLK0 VSS_HCLK0 C10
402 2.2UF 0.1UF
1 C2613 10%
6.3V
20%
10V
2 CERM
A9 VDD_HCLK0 VSS_HCLK0 B11
0.1UF
20%
2 CERM1
603 402
A8 VDD_HCLK1 VSS_HCLK1 B7
2 10V
CERM
C5 VDD_HCLK2 VSS_HCLK2 A4
402 B4 VDD_HCLK2 VSS_HCLK2 A7
26 7 PP1V2_PULSAR K10 VDD_HSYNC
PLACE NEAR PIN D2 D1 VSS_HSYNC H10
L2605
FERR-250-OHM
H12 VDD_HSYNC VSS_HSYNC K12
26 7 PPVCORE_PULSAR
1 2 J11 VDD15_HSYNC
SM M11 VDD15_PCLK
R2603
4.7
A1 VDD_VCLK VSS_VCLK A3
1 2 PP1V5_PSL_PLL3 A12 VDD_XTAL VSS_XTAL C12
VOLTAGE=1.5V
1/16W
MF
402 2.2UF 0.1UF
C
1 C2615 10%
6.3V
20%
10V
2 CERM C
0.1UF
20%
2 CERM1
603 402
10V PINS G12, M12, H3, K1, L5, M9, A11, A9
2 CERM
402 A8, C5, B4, K10, H12 J11, M11, A1
CAN BE TURNED OFF IN SLEEP
L2607 PLACE NEAR PIN L8 K8
FERR-250-OHM
1 2 PP3V3_PWRON PP3V3_RUN
SM
R2605
4.7
1 2 PP1V5_PSL_PLL4
VOLTAGE=1.5V
1 C2665 1 C2667 1 C2651 1 C2671
5% MIN_LINE_WIDTH=25MIL 0.1UF 0.1UF 0.1UF 0.1UF
1/16W
MF
1 C2607 1 C2605 MIN_NECK_WIDTH=10MIL 20%
2 10V
20%
10V
2 CERM
20%
10V
2 CERM
20%
2 10V
402 2.2UF 0.1UF CERM CERM
1 C2619 10%
6.3V
20%
10V
2 CERM
402 402 402 402
0.1UF
20%
2 CERM1
603 402
10V 37 26 7 PP2V5_RAM
2 CERM
402
PP3V3_PWRON
L2609 PLACE NEAR PIN M3 M2 1 C2639 1 C2640
FERR-250-OHM 0.1UF
20%
0.1UF
20%
1 2 2 10V
CERM 2 10V
CERM
402 402
SM
R2607
4.7
1 2 PP3V3_PSL_XTAL
VOLTAGE=3.3V 26 7 PPVCORE_PULSAR
1/16W
MF
402 2.2UF 0.1UF 1 C2631 1 C2632 1 C2633 1 C2634 1 C2635 1 C2636 1 C2637 1 C2638
1 C2620 10% 20%
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
B 0.1UF
20%
10V
6.3V
2 CERM1
603
10V
2 CERM
402
20%
2 10V
CERM
20%
2 10V
CERM
20%
10V
2 CERM
20%
2 10V
CERM
20%
2 10V
CERM
20%
10V
2 CERM
20%
10V
2 CERM
20%
2 10V
CERM
B
2 CERM 402 402 402 402 402 402 402 402
402
402 CAPS NOT NEEDED

26 7 PPVCORE_PWRON_PULSAR
IF 603 CAN BE PLACED CLOSE TO PULSAR
1 C2627 1 C2628 1 C2629 1 C2630
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM
402 402 402 402
26 7 PP1V2_PULSAR
1 C2623 1 C2624 1 C2625 1 C2626

0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM
402 402 402 402
TABLE_5_HEAD

TABLE_5_ITEM
359S0076 1 PULSAR, PBGA U2600
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
29 27 EI_CPU_CLK_P EI_CPU_CLK CLOCKS EI_CPU_CLK I86 R2701

29 27 EI_CPU_CLK_N EI_CPU_CLK CLOCKS EI_CPU_CLK I87 1
5% 0 2 PCI_CLK_GP0 8
14 EI_CPU1_CLK_P EI_CPU1_CLK CLOCKS EI_CPU1_CLK I116 3.3V 33MHZ
14 EI_CPU1_CLK_N EI_CPU1_CLK CLOCKS EI_CPU1_CLK I117
R2761
28 27 EI_NB_CLK_P EI_NB_CLK CLOCKS EI_NB_CLK I96 0
1 2 PCI_CLK_GP1 8
28 27 EI_NB_CLK_N EI_NB_CLK CLOCKS EI_NB_CLK I97 3.3V 33MHZ
5% 402
29 27 EI_CPU_SYNC EI_SYNC CLOCKS I98
28 27 EI_NB_SYNC CLOCKS I99
C2708
D 14 EI_CPU1_SYNC EI_CPU1_SYNC CLOCKS I118
0.001UF
50V 1 2 CERM
D
27 24 VSP_NB_CLK_P VSP_NB_CLK CLOCKS VSP_NB_CLK I94
27 24 VSP_NB_CLK_N VSP_NB_CLK CLOCKS VSP_NB_CLK 10% 402
I95
VSP_NB_CLK_P 24 27
C2710 VSP_NB_CLK_N 24 27
48 27 AGP_CLK66M_NB AGP_NB_CLK CLOCKS I100 0.001UF
49 27 AGP_CLK66M_GPU AGP_GPU_CLK CLOCKS 50V 1 2 CERM
I101
10% 402
60 27 HT_CLK66M_NB HT_NB_CLK CLOCKS I102

62 27 HT_CLK66M_SB HT_SB_CLK CLOCKS I103
C2713
0.001UF
50V 1 2 CERM
74 27 PCI_CLK66M_SB_INT CLOCKS_PCI CLOCKS I90 10% 402
74 8 PCI_CLK33M_SB_EXT CLOCKS_PCI CLOCKS I91
EI_CPU_CLK_P 27 29
C2715 EI_CPU_CLK_N 27 29
27 PLS_EXTCLK PLS_XTAL CLOCKS I119 0.001UF
50V 1 2 CERM
10% 402
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER

ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
NET
SPACING
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY TYPE
SYM 1 OF 2
GPCLK33_0 L4 PCI_CLK_GP0_R CLOCKS

GPCLK33_1 K4 PCI_CLK_GP1_R CLOCKS
OMIT
VCLKN A2 VSP_NB_CLK_N_C CLOCKS
U2600 VCLKP B3
C PULSAR HCLKN_0 B10
VSP_NB_CLK_P_C
EI_CPU_CLK_N_C
CLOCKS
CLOCKS
C2700
0.001UF C
50V 1 2 CERM
FSBGA HCLKN_1 C8 EI_CPU1_CLK_N_R CLOCKS 14
10% 402
18 I2C_CLOCK_SCL C1 SCLK HCLKN_2 C4 EI_NB_CLK_N_C CLOCKS EI_NB_CLK_P 27 28
B1 SDATA HCLKP_0 A10 EI_CPU_CLK_P_C CLOCKS C2702 EI_NB_CLK_N 27 28

18 I2C_CLOCK_SDA 0.001UF
R2704 HCLKP_1 B8 EI_CPU1_CLK_P_R CLOCKS 14
50V 1 2 CERM
0 D3
13 CLOCK_RESET_L 1 2 PLS_RESET_L RESET* HCLKP_2 B5 EI_NB_CLK_P_C CLOCKS 10% 402
5% 402 0 R2775
C11 XIN GPCLK25_0 J3 PLS_CLK_66M_0_R CLOCKS 1 2 2.5V 66MHZ TP_PLS_CLK_66M_0 6
PLS_X_IN 0 R2776
GPCLK25_1 J1 PLS_CLK_66M_1_R CLOCKS 5% 402 1 2 2.5V 66MHZ TP_PLS_CLK_66M_1 6
PLS_X_OUT B12 XOUT 5% 402 20 R2703

NOSTUFF PCLK25_0 K2 HT_CLK66M_NB_R CLOCKS 1 2 2.5V 66MHZ HT_CLK66M_NB 27 60
R2738 20 R2709
0=IIC ADDR D2/D3 1K E3 ADDRSEL PCLK25_1 L1 RAM_CLK66M_NB_R CLOCKS 1 2 5% 402 2.5V 66MHZ RAM_CLK66M_NB 37
1 2 PLS_X_ADDRSEL
5% 402 0 R2705
1=IIC ADDR D4/D5 5% 402 PCLK33_0 K5 PCI_CLK66M_SB_INT_R CLOCKS 1 2 3.3V 66MHZ PCI_CLK66M_SB_INT 27 74
K3 TEST1 0 R2711
6 TP_PLS_TEST1 PCLK33_1 L6 PCI_CLK_P1_R CLOCKS 5% 402 1 2 3.3V 33MHZ PCI_CLK_P1 8
E11 TEST2 0 R2707
6 TP_PLS_TEST2 PCLK33_2 M7 AGP_CLK66M_GPU_R CLOCKS 1 2 5% 402 3.3V 66MHZ AGP_CLK66M_GPU 27 49
D11 TEST3 0 R2702
6 TP_PLS_TEST3 PCLK33_3 L9 PCI_CLK_P3_R CLOCKS 5% 402 1 2 3.3V 33MHZ PCI_CLK_P3 8
0 R2779
PCLK33_4 M10 PCI_CLK_P4_R CLOCKS 5% 402 1 2 PCI_CLK_P4 8
R2706 249 1 2 402 1% PLS_SCAN_MODE M1 SCAN_MODE 0 R2715 5% 402
HTBEN_0 K11 CPU_HTBEN_R CLOCKS 1 2 1.2V 66MHZ CPU_HTBEN 29 30
18 11 6 PP3V3_PWRON R2744 681 1 2 402 1% PLS_REF15 G11 REF15 HTBEN_1 J12 CPU1_HTBEN_R CLOCKS 14 5% 402
R2740 1K 1 2 402 1% PLS_REF25 J2 REF25 0 R2768
1 M6 REF33 NBSYNC F12 EI_NB_SYNC_R CLOCKS 1 2 1.2V EI_NB_SYNC 27 28
R2722 R2746 1K 1 2 402 1% PLS_REF33
0 R2772 5% 402
1K A5 REF_CML HSYNC_0 J10 EI_CPU_SYNC_R CLOCKS 1 2 1.2V EI_CPU_SYNC 27 29
5% 6 TP_PLS_REF_CML
1/16W HSYNC_1 H11 EI_CPU1_SYNC_R CLOCKS 14 5% 402
MF B6 PRES_CML
NOSTUFF 2 402
R2742 806 1 2 402 1% PLS_PRES_CML 20 R2770
R2748 REFCLK_0 G2 SB_CLK25M_ATA_R CLOCKS NOSTUFF 1 2 2.5V 25MHZ SB_CLK25M_ATA 25
22 R2700
0 REFLCK_1 H1 SATA_CLK25M_R CLOCKS 1 2 5% 402 2.5V 25MHZ TP_SATA_CLK25M 6
B 36 25 16 13 SYS_OVERTEMP_L 1
5%
2 PLS_FORCE_P0_L_R F2
C3 PD
FORCESPO*
SLEWING* K9 SLEWING_L_R CLOCKS 1
0 R2720
2 SYS_SLEWING_L 13 25 33
5% 402 B
1/16W
MF ERROR* M8 CLOCK_ERROR_L 8 5% 402
402
0 R2717
PCLK12 L11 HT_CLK66M_SB_R CLOCKS 1 2 1.2V 66MHZ HT_CLK66M_SB 27 62
0 R2719
PCLK15 L10 AGP_CLK66M_NB_R CLOCKS 5% 402 1 2 1.5V 66MHZ AGP_CLK66M_NB 27 48
5% 402
50 46 11 10 9 8 6 SYS_SLEEP R2750 0 1 2 402 5% PLS_POWER_DOWN
(SLEEP)
NO STUFF
R2752 R2724 1K 1
NOSTUFF
2 402 5%
PLS_EXTCLK 1
0 2
NOSTUFF 27
NOSTUFF
J2700 1
R2762
5%
1/16W
MF
R2754
0
U.FL-R_SMT 24 402 1 2
F-ST-SM 5%
3 1/16W NO STUFF 5%
MF
2 402
R2758 1/16W
MF
1 PLS_INTERM 1
330K2 402
2 1
NOSTUFF 5%
1/16W R2756
0
R2764 MF
402 1 2
24 5%
5%
1/16W 1/16W
MF CRITICAL MF
402
2 402 Y2701
25.0000M
1 2
PLS_X_OUT_B
PLS_X_IN_B 8X4.5MM-SM
A C2707 1 1 C2705 A
33PF
5%
33PF
5%
50V 50V
CERM 2 2 CERM
402 402
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
29 28 14 EI_CPU_TO_NB_CLK_P EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK I212

29 28 14 EI_CPU_TO_NB_CLK_N EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK EI_CPU_TO_NB_CLK I213
29 28 14 EI_NB_TO_CPU_CLK_P EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK I214
29 28 14 EI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK I215
29 28 14 EI_CPU_TO_NB_AD<0..43> EI_CPU_TO_NB_CAD EI_CPU_TO_NB_AD I216

60 48 37 7 PP1V5_PWRON_NB_AVDD R2800 29 28 14 EI_NB_TO_CPU_AD<0..43> EI_NB_TO_CPU_CAD EI_NB_TO_CPU_AD I217
1
2.2 2 PP1V5_PWRON_EI_NB_AVDD MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V MIN_NECK_WIDTH=10MIL 29 28 14 EI_CPU_TO_NB_SR_P<0> EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR0 I218
5%
1/16W 29 28 14 EI_CPU_TO_NB_SR_N<0> EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR0
MF
603
1 C2818 1 C2819 PP1V2_EI_NB 7 18 28
EI_CPU_TO_NB_SR_P<1> EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR1
I219
1UF 0.1UF 29 28 14
D 10%
6.3V
2 CERM
20%
10V
2 CERM
29 28 14 EI_CPU_TO_NB_SR_N<1> EI_CPU_TO_NB_CAD EI_CPU_TO_NB_CLK EI_CPU_TO_NB_SR1
I220
I221
D
F21
J13
H13
H16
F10
D13
D16
B10
B19
402 402
K4
K8
G2
F7
D4
B7
29 28 14 EI_NB_TO_CPU_SR_P<0> EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR0 I222
API VDD_API 29 28 14 EI_NB_TO_CPU_SR_N<0> EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR0 I223

APCLK_AVDD 29 28 14 EI_NB_TO_CPU_SR_P<1> EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR1 I224
U3 29 28 14 EI_NB_TO_CPU_SR_N<1> EI_NB_TO_CPU_CAD EI_NB_TO_CPU_CLK EI_NB_TO_CPU_SR1 I225
U3LITE
F15 API0_BCLKIP
V1.0-300MM
29 28 14 EI_NB_TO_CPU_CLK_P PBGA API0_BCLKOP D6 EI_CPU_TO_NB_CLK_P 14 28 29
29 28 14 EI_NB_TO_CPU_CLK_N E15 API0_BCLKIN (SYM 1 OF 7)

API0_BCLKON E6 EI_CPU_TO_NB_CLK_N 14 28 29
OMIT OMIT OMIT OMIT OMIT OMIT OMIT
OMIT
29 28 14 EI_NB_TO_CPU_AD<0> F11 API0_ADI0 API0_ADO0 J2 EI_CPU_TO_NB_AD<0> 14 28 29 ZT2847 ZT2857 ZT2867 ZT2807 ZT2817 ZT2827 ZT2837
29 28 14 EI_NB_TO_CPU_AD<1> F12 API0_ADI1 API0_ADO1 H1 EI_CPU_TO_NB_AD<1> 14 28 29
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<2> G11 API0_ADI2 API0_ADO2 J1 EI_CPU_TO_NB_AD<2> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<3> H11 API0_ADI3 API0_ADO3 K1 EI_CPU_TO_NB_AD<3> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<4> G12 API0_ADI4
H12 API0_ADI5
API0_ADO4 E1 EI_CPU_TO_NB_AD<4> 14 28 29 ZT2848
HOLE-VIA-20R10
ZT2858
HOLE-VIA-20R10
ZT2868
HOLE-VIA-20R10
ZT2808
HOLE-VIA-20R10
ZT2818
HOLE-VIA-20R10
ZT2828
HOLE-VIA-20R10
ZT2838
HOLE-VIA-20R10
29 28 14 EI_NB_TO_CPU_AD<5> APPLE PI API0_ADO5 F2 EI_CPU_TO_NB_AD<5> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<6> H14 API0_ADI6 INTERFACE API0_ADO6 J4 EI_CPU_TO_NB_AD<6> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<7> G14 API0_ADI7 API0_ADO7 H4 EI_CPU_TO_NB_AD<7> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<8> D9 API0_ADI8 API0_ADO8 G1 EI_CPU_TO_NB_AD<8> 14 28 29 ZT2849 ZT2859 ZT2869 ZT2809 ZT2819 ZT2829 ZT2839
29 28 14 EI_NB_TO_CPU_AD<9> C9 API0_ADI9 API0_ADO9 H2 EI_CPU_TO_NB_AD<9> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<10> D11 API0_ADI10 API0_ADO10 F1 EI_CPU_TO_NB_AD<10> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<11> E11 API0_ADI11 API0_ADO11 H5 EI_CPU_TO_NB_AD<11> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<12> A10 API0_ADI12 API0_ADO12 H3 EI_CPU_TO_NB_AD<12> 14 28 29 ZT2850 ZT2860 ZT2800 ZT2810 ZT2820 ZT2830 ZT2840
29 28 14 EI_NB_TO_CPU_AD<13> A9 API0_ADI13 API0_ADO13 J3 EI_CPU_TO_NB_AD<13> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<14> A8 API0_ADI14 API0_ADO14 J5 EI_CPU_TO_NB_AD<14> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<15> B9 API0_ADI15 API0_ADO15 J6 EI_CPU_TO_NB_AD<15> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<16> C11 API0_ADI16 API0_ADO16 E3 EI_CPU_TO_NB_AD<16> 14 28 29 ZT2851 ZT2861 ZT2801 ZT2811 ZT2821 ZT2831 ZT2841
B11 API0_ADI17 API0_ADO17 F4 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
C 29 28 14
29 28 14
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<18> A11 API0_ADI18 API0_ADO18 E2
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<18>
14 28 29
14 28 29
1 1 1 1 1 1 1 C
29 28 14 EI_NB_TO_CPU_AD<19> A12 API0_ADI19 API0_ADO19 F5 EI_CPU_TO_NB_AD<19> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<20> B12 API0_ADI20 API0_ADO20 H6 EI_CPU_TO_NB_AD<20> 14 28 29 ZT2852 ZT2862 ZT2802 ZT2812 ZT2822 ZT2832 ZT2842
29 28 14 EI_NB_TO_CPU_AD<21> C12 API0_ADI21 API0_ADO21 J7 EI_CPU_TO_NB_AD<21> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<22> D12 API0_ADI22 API0_ADO22 F3 EI_CPU_TO_NB_AD<22> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<23> E12 API0_ADI23 API0_ADO23 J8 EI_CPU_TO_NB_AD<23> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<24> A13 API0_ADI24 API0_ADO24 F6 EI_CPU_TO_NB_AD<24> 14 28 29 ZT2853 ZT2863 ZT2803 ZT2813 ZT2823 ZT2833 ZT2843
29 28 14 EI_NB_TO_CPU_AD<25> A14 API0_ADI25 API0_ADO25 E5 EI_CPU_TO_NB_AD<25> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<26> B14 API0_ADI26 API0_ADO26 D5 EI_CPU_TO_NB_AD<26> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<27> C14 API0_ADI27 API0_ADO27 E4 EI_CPU_TO_NB_AD<27> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<28> A16 API0_ADI28 API0_ADO28 D8 EI_CPU_TO_NB_AD<28> 14 28 29 ZT2854 ZT2864 ZT2804 ZT2814 ZT2824 ZT2834 ZT2844
29 28 14 EI_NB_TO_CPU_AD<29> A15 API0_ADI29 API0_ADO29 A5 EI_CPU_TO_NB_AD<29> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<30> B15 API0_ADI30 API0_ADO30 C2 EI_CPU_TO_NB_AD<30> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<31> C15 API0_ADI31 API0_ADO31 C3 EI_CPU_TO_NB_AD<31> 14 28 29 OMIT OMIT OMIT OMIT OMIT OMIT OMIT
29 28 14 EI_NB_TO_CPU_AD<32> H15 API0_ADI32 API0_ADO32 C5 EI_CPU_TO_NB_AD<32> 14 28 29 ZT2855 ZT2865 ZT2805 ZT2815 ZT2825 ZT2835 ZT2845
29 28 14 EI_NB_TO_CPU_AD<33> G15 API0_ADI33 API0_ADO33 C6 EI_CPU_TO_NB_AD<33> 14 28 29
1 1 1 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<34> F17 API0_ADI34 API0_ADO34 B2 EI_CPU_TO_NB_AD<34> 14 28 29
29 28 14 EI_NB_TO_CPU_AD<35> G17 API0_ADI35 API0_ADO35 D1 EI_CPU_TO_NB_AD<35> 14 28 29 OMIT OMIT OMIT OMIT

29 28 14 EI_NB_TO_CPU_AD<36> G18 API0_ADI36 API0_ADO36 B1 EI_CPU_TO_NB_AD<36> 14 28 29
PP1V2_EI_NB ZT2806 ZT2816 ZT2826 ZT2836
29 28 14 EI_NB_TO_CPU_AD<37> H18 API0_ADI37 API0_ADO37 C1 EI_CPU_TO_NB_AD<37> 14 28 29
7 18 28
HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
NOSTUFF 1 1 1 1
29 28 14 EI_NB_TO_CPU_AD<38> F18 API0_ADI38 API0_ADO38 A6 EI_CPU_TO_NB_AD<38> 14 28 29
1
29 28 14 EI_NB_TO_CPU_AD<39> E18 API0_ADI39 API0_ADO39 C8 EI_CPU_TO_NB_AD<39> 14 28 29
R2802 OMIT OMIT OMIT
100
29 28 14 EI_NB_TO_CPU_AD<40> A17 API0_ADI40 API0_ADO40 A2 EI_CPU_TO_NB_AD<40> 14 28 29 1% ZT2846 ZT2856 ZT2866
29 28 14 EI_NB_TO_CPU_AD<41> A18 API0_ADI41 API0_ADO41 B3 EI_CPU_TO_NB_AD<41> 14 28 29 NOSTUFF
1/16W
MF HOLE-VIA-20R10 HOLE-VIA-20R10 HOLE-VIA-20R10
1 1 1
29 28 14 EI_NB_TO_CPU_AD<42> B17 API0_ADI42 API0_ADO42 A7 EI_CPU_TO_NB_AD<42> 14 28 29
1 C2821 2 402 MIN_LINE_WIDTH=25MIL
0.001UF EI_APCLK_VREF MIN_NECK_WIDTH=10MIL
29 28 14 EI_NB_TO_CPU_AD<43> C17 API0_ADI43 API0_ADO43 B8 EI_CPU_TO_NB_AD<43> 14 28 29 VOLTAGE=0.6V
B EI_NB_TO_CPU_SR_P<0> D17 API0_SRIP0 API0_SROP0 A3 EI_CPU_TO_NB_SR_P<0>
10%
50V
2 CERM
NOSTUFF
1
R2801
NOSTUFF 1
NOSTUFF
R2803 1R2804
NOSTUFF
B
29 28 14
EI_NB_TO_CPU_SR_N<0> A19 API0_SRIN0 API0_SRON0 A4 EI_CPU_TO_NB_SR_N<0>

14 28 29 402
100
1 C2820 121 121
29 28 14 14 28 29
1% 0.1UF 1% 1%
29 28 14 EI_NB_TO_CPU_SR_P<1> E17 API0_SRIP1 API0_SROP1 B5 EI_CPU_TO_NB_SR_P<1> 14 28 29 1/16W 20% 1/16W 1/16W
PLACE R2805 AND R2806 MF 10V
2 CERM MF MF
EI_NB_TO_CPU_SR_N<1> B18 API0_SRIN1 API0_SRON1 B6 EI_CPU_TO_NB_SR_N<1>
NEAR U3LITE
29 28 14 14 28 29
2 402 402 2 402 2 402
29 14 EI_QACK_L D14 API_QACK0 API_QREQ0 E14 EI_QREQ_L 14 29 30
R2805 E8 API0_APSYNC API_APCLKP D18

EI_NB_CLK_P
EI_NB_CLK_P 27
0 H17 API0_SE EI_NB_CLK_N
27 EI_NB_SYNC 1 2 NB_APSYNC API_APCLKN C18 EI_NB_CLK_N 27
402
API_CSTP F14 CPU_CHKSTOP_L 29
NOSTUFF
R2806 C2820, R2803, R2804 CHANGED TO 603 FOR FMAX
1
0 2 API_APCLK_AVSS
29 EI_SYNC_FROM_NB
G20
402
30 29 14 EI_SE
PP1V2_EI_NB 7 18 28
1 C2800 1 C2801 1 C2802 1 C2803 1 C2804 1 C2805 1 C2806 1 C2807 1 C2808 1 C2809 1 C2810 1 C2811 1 C2812 1 C2813 1 C2814 1 C2815 1 C2816 1 C2817
A 0.1UF
20%
10V
2 CERM
20%
2 10V
0.1UF 0.1UF
20%
10V
2 CERM
0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
20%
2 10V
0.1UF 0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
20%
2 10V
0.1UF 0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
0.1UF
20%
2 10V
A
CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PLACE NEAR PROCESSOR.
PLACE AT PROCESSOR PINS. 35 31 30 29 18 7 PP1V2_EI_CPU

NOSTUFF
NOSTUFF 1
R2903 R2909 PPVCORE_CPU
100
36 35 34 33 32 31 7 6
MORE PROCESSOR DECOUPLING ON PAGES 31 & 32
D 27 EI_CPU_CLK_P 1
46.4 2 1%
1/16W
MF
D
1%
1/16W 2 402
MF
402 SYSCLK_TERM
NOSTUFF
1 C2953 1 C2947 1 C2945 1 C2939 1 C2937 1 C2928 1 C2924 1 C2920 1 C2914 1 C2912
NOSTUFF NOSTUFF VOLTAGE=0.6V 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
1 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
R2901 1 C2901 R2907 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
1
46.4 2 0.22UF 100 402 402 402 402 402 402 402 402 402 402
27 EI_CPU_CLK_N 1%
20% 1/16W
1% 6.3V
2 X5R MF
1/16W
MF 402 2 402
402 1 C2954 1 C2948 1 C2946 1 C2940 1 C2938 1 C2929 1 C2925 1 C2921 1 C2915 1 C2913
1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF 1UF
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
T22
R22 402 402 402 402 402 402 402 402 402 402
SYSCLK* SYSCLK
28 14 EI_NB_TO_CPU_CLK_P E24 EI_CLKI EI_CLKO D3 EI_CPU_TO_NB_CLK_P

28 14 EI_NB_TO_CPU_CLK_N D24 EI_CLKI*
(SEE TABLE)
OMIT
EI_CLKO* E3 EI_CPU_TO_NB_CLK_N
14 28
14 28
1 C2955 1 C2951 1 C2949 1 C2943 1 C2941 1 C2930 1 C2926 1 C2922 1 C2918 1 C2916
28 14 EI_NB_TO_CPU_AD<0> H21
EI_ADI0 CRITICAL EI_ADO0 N3 EI_CPU_TO_NB_AD<0> 14 28
14 EI_NB_TO_CPU_AD<1> EI_CPU_TO_NB_AD<1> 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
28
28
28
14 EI_NB_TO_CPU_AD<2>
J21
H22
J22
C13
EI_ADI1
EI_ADI2
EI_ADI3
U2900 EI_ADO1
EI_ADO2
EI_ADO3
EI_ADO4
H2
K3
L1
M3
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
14
14
14
28
28
28
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
28
28
28
28
A13
K22
H23
EI_ADI4
EI_ADI5
EI_ADI6
EI_ADI7
GPUL(1 OF 3)
EI_ADO5
EI_ADO6
EI_ADO7
K4
K2
H3
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<7>
14
14
14
14
28
28
28
28
28 14 EI_NB_TO_CPU_AD<8> J24 EI_ADO8 H1 EI_CPU_TO_NB_AD<8> 14 28
28 14 EI_NB_TO_CPU_AD<9> G20
EI_ADI8
EI_ADI9 CBGA EI_ADO9 G4 EI_CPU_TO_NB_AD<9> 14 28
1 C2956 1 C2952 1 C2950 1 C2944 1 C2942 1 C2931 1 C2927 1 C2923 1 C2919 1 C2917
14 EI_NB_TO_CPU_AD<10> EI_CPU_TO_NB_AD<10>
28
28 14 EI_NB_TO_CPU_AD<11>
F23
G21
EI_ADI10
EI_ADI11
EI_ADO10
EI_ADO11
F2
F4 EI_CPU_TO_NB_AD<11>
14
14
28
28
28 14 EI_NB_TO_CPU_AD<12> D22
EI_ADI12 EI_ADO12 E2 EI_CPU_TO_NB_AD<12> 14 28
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
EI_ADI13 EI_ADO13 G3 EI_CPU_TO_NB_AD<13> 14 28 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
EI_ADI14 EI_ADO14 B8 EI_CPU_TO_NB_AD<14> 14 28 402 402 402 402 402 402 402 402 402 402
28 14 EI_NB_TO_CPU_AD<15> B15
EI_ADI15 EI_ADO15 D11 EI_CPU_TO_NB_AD<15> 14 28
28 14 EI_NB_TO_CPU_AD<16> A14
EI_ADI16 EI_ADO16 E12 EI_CPU_TO_NB_AD<16> 14 28
28 14 EI_NB_TO_CPU_AD<17> C15
EI_ADI17 EI_ADO17 A11 EI_CPU_TO_NB_AD<17> 14 28
28 14 EI_NB_TO_CPU_AD<18> D15
EI_ADI18 EI_ADO18 B10 EI_CPU_TO_NB_AD<18> 14 28
14 EI_NB_TO_CPU_AD<19> A16 EI_ADO19 C11 EI_CPU_TO_NB_AD<19>
28
C22
EI_ADI19
EI_ADI20 EI_ADO20 C1 EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<21>
14
14
28
28
1 C2900 1 C2960 1 C2959 1 C2958 1 C2957 1 C2936 1 C2935 1 C2934 1 C2933 1 C2932
28
E20
E21
EI_ADI21
EI_ADI22
EI_ADO21
EI_ADO22
C5
B2 EI_CPU_TO_NB_AD<22>
14
14
28
28
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C 28
28
28
28
B23
B24
F21
B17
EI_ADI23
EI_ADI24
EI_ADI25
EI_ADO23
EI_ADO24
EI_ADO25
EI_ADO26
D6
A5
A2
D2
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<26>
14
14
14
14
28
28
28
28
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
6.3V
2 CERM
402
C
EI_ADI26
28 14 EI_NB_TO_CPU_AD<27> B19
EI_ADI27 EI_ADO27 D8 EI_CPU_TO_NB_AD<27> 14 28
EI_ADI28 EI_ADO28 C12 EI_CPU_TO_NB_AD<28> 14 28
28 14 EI_NB_TO_CPU_AD<30> D18 EI_ADO30 B6 EI_CPU_TO_NB_AD<30> 14 28
B21
EI_ADI30
EI_ADI31 EI_ADO31 B4 EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<32>
14 28
1 C2911 1 C2910 1 C2909 1 C2908 1 C2907 1 C2906 1 C2905 1 C2904 1 C2903 1C2902
28
D20
A22
EI_ADI32
EI_ADI33
EI_ADO32
EI_ADO33
C4
C7 EI_CPU_TO_NB_AD<33>
14
14
28
28
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
EI_ADI35 EI_ADO35 C8 EI_CPU_TO_NB_AD<35> 14 28 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
EI_ADI36 EI_ADO36 C6 EI_CPU_TO_NB_AD<36> 14 28 402 402 402 402 402 402 402 402 402 402
14 EI_NB_TO_CPU_AD<42> EI_CPU_TO_NB_AD<42>
28
C16
A19
EI_ADI42
EI_ADI43
EI_ADO42
EI_ADO43
A8
A6 EI_CPU_TO_NB_AD<43>
14
14
28
28
R2910
0
28 14 EI_NB_TO_CPU_SR_P<0> L24
EI_SRI0 EI_SRO0 L3 EI_CPU_TO_NB_SR_P<0> 14 28 1 2 EI_CPU_SYNC 27
28 14 EI_NB_TO_CPU_SR_N<0> K24
EI_SRI0* EI_SRO0* L2 EI_CPU_TO_NB_SR_N<0> 14 28
28 14 EI_NB_TO_CPU_SR_P<1> L21
EI_SRI1 EI_SRO1 G1 EI_CPU_TO_NB_SR_P<1> 14 28 5%
28 14 EI_NB_TO_CPU_SR_N<1> L22
EI_SRI1* EI_SRO1* F1 EI_CPU_TO_NB_SR_N<1> 14 28 1/16W
MF
28 14 EI_QACK_L V21
QACK* QREQ* AB12 EI_QREQ_L 14 28 30 402
30 29 14 CHKSTOP_L R20
CHKSTOP* INT* AB19 CPU_INT_L 14 25 30 NOSTUFF
30 29 27 CPU_HTBEN AD17
TBEN
R2911
MATCH TO SYSCLK 0
6 TP_PSYNCOUT AD14
APSYNCOUT APSYNCIN AA10 CPU_APSYNC 1 2 EI_SYNC_FROM_NB 28
5%
30 14 13 CPU_HRESET_L V20
HRESET* IIC_SCL AA20 I2C_CPU_A_SCL 18 1/16W
IIC_SDA Y21 I2C_CPU_A_SDA 18 MF
30 25 CPU_SRESET_L AB4
SRESET* 402
I2CGO N22 I2CGO 30
30 PROC_THERM_INT_L V22
THERM_INT*
CKTERMDIS AA14 CKTERMDIS_L 30
30 PROCID0 L19
PROCID0
30 PROCID1 M19
PROCID1 EI_DISABLE P20 EI_DISABLE 30
30 PROCID2 M18
PROCID2
BUSCFG0 AA19 BUSCFG0 30
30 28 14 EI_SE N21
TRIGGER_IN BUSCFG1 AC19 BUSCFG1 30
14 6 TP_PROC_TRIGGER_OUT N19
TRIGGER_OUT BUSCFG2 AB16 BUSCFG2 30
6 TP_AFN AA12
AFN ATTENTION AD12 TP_ATTENTION 6
30 AVPRESET_L W23
AVPRESET* GPUL_DBG AA22 GPUL_DBG 30
30 BIMODE_L AC24
BIMODE* JTAGMODE W4 JTAGMODE_SPARE2 30
30 C1UNDGLOBAL AC16
B 30
30
C2UNDGLOBAL
DI2_L
AC15
U24
C1UNDGLOBAL
C2UNDGLOBAL
DI2*
TCK
TDI
TDO
AD21
AB21
AD13
JTAG_CPU_TCK
JTAG_CPU_TDI
JTAG_CPU_TDO
18
18
18
30
30
30
B
30 LSSDMODE AB5
LSSDMODE TMS AD22 JTAG_CPU_TMS 18 30
30 LSSDSCANENABLE U19
LSSDSCANENABLE TRST* W20 JTAG_CPU_TRST_L 30
30 LSSDSTOPC2ENABLE AD8
LSSDSTOPC2ENABLE
30 LSSDSTOPC2STARENABLE AD7
LSSDSTOPC2STARENABLE BYPASS* V24 CPU_BYPASS_L 13 30
30 LSSDSTOPENABLE AD11
LSSDSTOPENABLE PLLLOCK T20 PLLLOCK 30
29 14 MCP_L AD18
PLLMULT AA8 PLLMULT 30
PROCESSOR IIC ADDRESS:
MCP*
PLLRANGE0 AB7 PLLRANGE0 30
6 TP_PSRO1 V23 PLLRANGE1 AA9 PLLRANGE1 30
80,84
PSRO1
6 TP_PSRO2 V5
PSRO2 PLLTEST W22 PLLTEST 30
30 PULSESEL0 AC9
PULSESEL0 PLLTESTOUT T19 PLLTESTOUT 30
30 PULSESEL1 AB11
PULSESEL1
30 PULSESEL2 AC10
PULSESEL2 SPARE AA13 CPU_SPARE 30
30 RAMSTOPENABLE AB6
RAMSTOPENABLE
30 14 RI_L AA5
RI*
30 14 SYNCENABLE AB24
SYNCENABLE*
35 31 30 29 18 7 PP1V2_EI_CPU
NOSTUFF 1 1
R2906 R2908
1K 1K
R2905 5%
1/16W
5%
1
49.9 2 MF
1/16W
MF
30 29 27 CPU_HTBEN
R2902 2 402 2 402
1%
1/16W 0
1 2 CHKSTOP_L 14 29 30
MF
402
A PLACE BY PROCESSOR PIN. 28 CPU_CHKSTOP_L
5%
1/16W
MF
402
A
NOSTUFF
R2904
0
1 2 MCP_L 14 29
5%
1/16W
MF
402
PROCESSOR LOGIC I/O

8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.
TABLE_5_HEAD

TABLE_5_ITEM
114S1103 1 RES,1K OHM,1/16W,5%,0402 R3034 NOSTUFF SYSCLK * 12
*
TABLE_5_ITEM
114S1103 1 RES,1K OHM,1/16W,5%,0402 R3018 SYSCLK * 8
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.

R3039 TABLE_5_HEAD
1
0 2
35 31 30 29 18 7 PP1V2_EI_CPU PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
29 JTAGMODE_SPARE2
*
TABLE_5_ITEM
5% NOSTUFF 114S1103 3 RES,1K OHM,1/16W,5%,0402 R3024,R3026,R3028 PROC / 2

1/16W
MF
402
R3000 R3001 TABLE_5_ITEM
PROC / 3
1
0 2 1
0 2
114S1103 3 RES,1K OHM,1/16W,5%,0402 R3024,R3026,R3012 NOSTUFF
D PP1V2_EI_CPU 7 18 29 30 31 35
R3045
1K 5%
1/16W
5%
1/16W
114S1103 3 RES,1K OHM,1/16W,5%,0402 R3024,R3010,R3028 NOSTUFF
TABLE_5_ITEM
PROC / 4 D
LSSDMODE 1 2
JTAG_SEL
TABLE_5_ITEM
29 MF MF
402 402 114S1103 3 RES,1K OHM,1/16W,5%,0402 R3024,R3010,R3012 NOSTUFF PROC / 6
5%
1/16W TABLE_5_ITEM
MF 114S1103 3 RES,1K OHM,1/16W,5%,0402 R3008,R3026,R3028 NOSTUFF PROC / 8

402
R3095 TABLE_5_ITEM
R3041 29 18 JTAG_CPU_TCK 1
10K 2
114S1103 3 RES,1K OHM,1/16W,5%,0402 R3008,R3026,R3012 NOSTUFF PROC / 12
LSSDSCANENABLE 1
1K 2
TABLE_5_ITEM
29 5% 114S1103 3 RES,1K OHM,1/16W,5%,0402 R3008,R3010,R3028 NOSTUFF PROC / 16

5% 1/16W TABLE_5_ITEM
1/16W MF
402 114S1103 3 RES,1K OHM,1/16W,5%,0402 R3008,R3010,R3012 NOSTUFF
MF
402
R3097
R3047 29 18 JTAG_CPU_TDI 1
10K 2 SELECT ELASTIC MODE OR BYPASS.
1
1K 2
29 LSSDSTOPC2ENABLE 5%
TABLE_5_HEAD
29 C1UNDGLOBAL 1/16W PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

5% MF
NOSTUFF 1/16W
*
TABLE_5_ITEM
402
R3077 R3043 MF
402
114S1103 1 RES,1K OHM,1/16W,5%,0402 R3036
1K 1K R3099 TABLE_5_ITEM
1 2 1 2
R3049 29 18 JTAG_CPU_TMS 1
10K 2
114S1103 1 RES,1K OHM,1/16W,5%,0402 R3020 NOSTUFF BYPASS MODE
5% 5% 1K
1/16W
MF
1/16W
MF
R3009 29 LSSDSTOPC2STARENABLE 1 2 5% SELECT PLL FREQUENCY RANGE.
402 402 2
1K 1 5% 1/16W TABLE_5_HEAD
C2UNDGLOBAL 29 JTAG_CPU_TRST_L 1/16W MF

29 402 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
5% MF
NOSTUFF 1/16W 402 TABLE_5_ITEM
R3079 R3069 MF
402 R3051
114S1103 2 RES,1K OHM,1/16W,5%,0402 R3030,R3032 NOSTUFF 900 TO 1800 MHZ
1K 1K TABLE_5_ITEM
1 2 1 2
1
1K 2
NOSTUFF 114S1103 2 RES,1K OHM,1/16W,5%,0402 R3030,R3016 NOSTUFF 1.8 TO 3.6 GHZ
LSSDSTOPENABLE
5%
1/16W
5%
1/16W
R3093 29
5% R3071 *
TABLE_5_ITEM
1.2 TO 2.4 GHZ

MF MF 1
1K 2 1/16W 1K
114S1103 2 RES,1K OHM,1/16W,5%,0402 R3014,R3032
402 402 29 18 JTAG_CPU_TDO MF PLLTESTOUT 1 2 TABLE_5_ITEM
29
5% 402 114S1103 2 RES,1K OHM,1/16W,5%,0402 R3014,R3016 NOSTUFF RESERVED
1/16W 5%
NOSTUFF
MF
402
R3053 1/16W
MF
10K 402
C R3031
1K
29 28 14 EI_QREQ_L 1
5%
1/16W
2
TABLE_5_HEAD
TABLE_5_ITEM
C
29 BIMODE_L 1 2 MF 114S1103 1 RES,1K OHM,1/16W,5%,0402 R3022 AVPRESET OFF
402
5% TABLE_5_ITEM
1/16W
MF R3037 114S1103 1 RES,1K OHM,1/16W,5%,0402 R3038 NOSTUFF AVPRESET ON
402
1
1K 2
29 14 SYNCENABLE
R3033 5%
29 DI2_L 1
1K 2
1/16W
MF
* STUFF THESE ON Q45.
402
5%
1/16W
MF R3055 SYSTEM CONFIGURATION
402
1
1K 2
29 RAMSTOPENABLE
R3035 5%
CPU SPEED:1.8GHZ, SYSCLK 225MHZ
1
1K 2
1/16W PP1V2_EI_CPU 7 18 29 30 31 35 2.0GHZ, SYSCLK 250MHZ
29 14 RI_L MF
402
NOSTUFF 1 35 31 30 29 18 7 PP1V2_EI_CPU
5%
1/16W
R3067 R3068
MF 10K
402
CPU_SPARE 1
1K 2
5%
29 1/16W
R3091 5%
MF
2 402
1 OMIT
R3008
1 OMIT
R3010
1 OMIT
R3012
1 OMIT
R3014
1 OMIT
R3016
1 OMIT
R3018
1 OMIT
R3020
1 OMIT
R3022
1
1K 2
1/16W
29 25 14 CPU_INT_L MF 1K 1K 1K 1K 1K 1K 1K 1K
402 5% 5% 5% 5% 5% 5% 5% 5%
5% 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
1/16W
MF R3081 MF
2 402
MF
2 402
MF
2 402
MF
2 402
MF
2 402
MF
2 402
MF
2 402
MF
2 402
402 1K
29 28 14 EI_SE 1 2 29 BUSCFG0
R3065 5%
1/16W
29 BUSCFG1
1
1K 2 MF 29 BUSCFG2
29 PROC_THERM_INT_L 402
5% 29 PLLRANGE0
1/16W
MF R3003 29 PLLRANGE1
402
PULSESEL0 1
1K 2 29 PLLMULT
29
30 31 36
R3083 29 EI_DISABLE
B 29 14 13 CPU_HRESET_L 1
1K 2
5%
1/16W
MF
402
29 AVPRESET_L B
5%
7
1/16W
MF 1 OMIT 1 OMIT 1 OMIT 1 OMIT 1 OMIT 1 OMIT 1 OMIT 1 OMIT
6
402 R3005 R3024
1K
R3026
1K
R3028
1K
R3030
1K
R3032
1K
R3034
1K
R3036
1K
R3038
1K
3
1K PP5V_RUN_CPU 5% 5% 5% 5% 5% 5% 5% 5%
R3085 29 PULSESEL1 1 2
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
1K 5% MF MF MF MF MF MF MF MF
29 25 CPU_SRESET_L 1 2 1/16W 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402
CPU_BYPASS_L MF
29 13 5% 402
1/16W PP5V_RUN_CPU
NOSTUFF MF 36 31 30 7 6 3
R3059 R3057 402
1
1K 2 1
1K 2
R3007 DEVELOPMENT
R3087 29 PULSESEL2 1
1K 2
1
R3070
5% 5% 1K
1/16W 1/16W 29 I2CGO 1 2
5% 180 DEVELOPMENT DEVELOPMENT
1
MF
402
MF
402 5% 1/16W
MF
5%
1/16W Q3002 2
R3054
29 PLLTEST 1/16W 402 MF 2N3906 180
MF SM
NOSTUFF 402 2 402 5%
1/16W
R3063 R3061 Q3002_B 1 MF
1K 1K R3089 R3002 2 402
1 2 1 2
1
1K 2 1
1K 2 D3002_1
5% 5% 29 27 CPU_HTBEN 29 PROCID0 3
1/16W 1/16W 5% 5% Q3002_E 1 DEVELOPMENT
MF MF
402 402 1/16W
MF
1/16W
MF 1
DEVELOPMENT
DEVELOPMENT D3002
29 CKTERMDIS_L 402 402 R3046 1
R3048 DEVELOPMENT RED
NOSTUFF 1K 1
R3052 SM
R3075 R3073 5% 180 2
1K 1K
R3004 1/16W
MF
5%
1/16W 5%
180
Q3004_D
1 2 1 2 1K
29 PROCID1 1 2 2 402 MF 1/16W
5% 5% 2 402 MF 3
1/16W 1/16W 5%
Q3001_C 2 402 DEVELOPMENT
1/16W DEVELOPMENT
MF
402
MF
402 MF
402
D3001_1 D Q3004
29 GPUL_DBG
R3044 3
DEVELOPMENT 1
DEVELOPMENT 2N7002
A R3040
NOSTUFF
R3042 R3006 29 PLLLOCK 1
180 2 Q3001_B 1 Q3001 D3001
GREEN
Q3004_G 1 G S
SM
A
1K 1K 1
1K 2 5% 2N3904 2.0X1.25
2
1 2 1 2 29 PROCID2 1/16W SM DEVELOPMENT
2
3
5% 5% 5%
1/16W
MF
402
2 R3050 DEVELOPMENT
1/16W 1/16W 180
MF
402
MF
402
MF
402 29 14 CHKSTOP_L 1 2 1 Q3003
5% Q3003_B 2N3904
1/16W SM
MF 2
402
PROCESSOR PULL-UPS AND -DOWNS

8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
36 35 34 33 32 31 29 7 6 PPVCORE_CPU PP1V2_EI_CPU 7 18 29 30 35
PP2V5_RUN_CPU
7
NET_SPACING_TYPE=PROC_DIFF
NOSTUFF
L3101 DIFFERENTIAL_PAIR=P_TDD
1 C3117 1 C3116 1 C3115 1 C3114 1 C3111 1 C3106 1 C3105 1 C3103
MIN_LINE_WIDTH=10MIL 10UF 10UF 10UF 10UF 1UF 1UF 1UF 1UF
R3132 60-OHM-EMI TDIODE_POS 36 20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
10%
6.3V
10%
6.3V
10%
6.3V
10%
6.3V
1
2.2 2 1 2 MIN_NECK_WIDTH=8MIL 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
35 PP2V5_RUN_CPU_AVDD_R PP2V5_RUN_CPU_AVDD_R_L
VOLTAGE=2.5V VOLTAGE=2.5V 805 805 805 805 402 402 402 402
5% MIN_LINE_WIDTH=25MIL SM MIN_LINE_WIDTH=25MILP24
1/16W MIN_NECK_WIDTH=10MIL 0805 MIN_NECK_WIDTH=10MIL Y1 R2
D PP5V_RUN_CPU
CRITICAL
MF
603 AVDD KPVDD1 KPVDD2
1 C3112 1 C3109 1 C3107 1 C3104 D
VR3100 R3101 A1
A24
A3
B1 1UF 1UF 1UF 1UF
MM1572FN 2.2 B11 B12 10% 10% 10% 10%
SOT-25A PP2V5_RUN_CPU_AVDD
1 2
1 C3100
B13
B16
B14
B18
P1
P11 U2900 P18
P2 GND_Z_OUT 31
2 6.3V
CERM
402
2 6.3V
CERM
402
2 6.3V
CERM
402
2 6.3V
CERM
402
1 VIN VOUT 5 MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V
5%
1/16W
MF 1 C3102 0.22UF
B20
B3
B7
U2900 B22
B5
B9
P13
P15
P17 GPUL
P22
P4
P6
3 CPU_AVDD_EN 3 CONT NOISE 4 CPU_AVDD_NOISE

603
10UF
20%
6.3V
20%
2 6.3V
X5R
402
C2
C20
C24
GPUL
(2 OF 3)
C21
C23
C3
P19
P21
P23
(3 OF 3)
CBGA
P8
R1
R11
GND_Z_SENSE 31
1 C3113 1 C3110 1 C3108
2 CERM D13 D1 P3 R13
GND D17 CBGA D10 P5 R15 1UF 1UF 1UF
1 805 D19 D12 P7 R17 10% 10% 10%
C3149 2
1UF
1 C3148 1 C3150 D21
D23
D14
D16
P9
R10
R19
R21
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
20% 0.01UF 10UF D5 D4 R12 R23 402 402 402
10V 20% 20% D7 E11 R14 R3
2 16V 6.3V D9 E13 R16 R5
CERM 2 CERM 2 CERM
603 E1 E15 R18 R7
402 805 E10 E17 R4 R9
E14
E16
E19
E23
R6
R8
T10
T12
1 C3126 1 C3120 1 C3118
E18 E5 T1 T14 1UF 1UF 1UF
E22 E7 T11 T16 10% 10% 10%
E4 E9 T13 T18 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
E6 F10 T15 T24
E8 F12 T17 T4 402 402 402
F11 F14 T21 T6
F13 F16 T23 T8
F15 F18 T3 U1
F17 F20 T5 U11
F19
F3
F22
F24
T7
T9
U13
U15
1 C3127 1 C3121 1 C3119
F5 F6 U10 U17 1UF 1UF 1UF
F7 F8 U12 U21 10% 10% 10%
F9 G11 U14 U23 6.3V 6.3V 6.3V
G10 G13 U16 U3
G12 G15 U18 U5 402 402 402
G14 G17 U2 U7
G16 G2 U20 U9
G18 G23 U22 V10
G22 G5 U4 V12
G6
G8
G7
G9
U6
U8
V14
V16
1 C3128 1 C3124 1 C3122
H11 H10 V1 V18 1UF 1UF 1UF
H13 H12 V11 V2 10% 10% 10%
H15 H14 V13 V4 2 6.3V
CERM 2 6.3V
CERM
6.3V
2 CERM
H17 H16 V15 V6
H19 H18 V17 V8 402 402 402
C H24
H5
H7
H9 VCORE GND
H20
H4
H6
H8
V19
V3
V7
V9
VCORE
X100
GND
X99
W1
W11
W13
W15
C
J1
J10
X105 X105 J11
J13
W10
W12
W17
W19
1 C3129 1 C3125 1 C3123
J12 J15 W14 W21 1UF 1UF 1UF
J14 J17 W16 W3 10% 10% 10%
J16 J19 W18 W5 6.3V 6.3V 6.3V
J18 J23 W2 W7
J2 J3 W24 W9 402 402 402
J20 J5 W6 Y10
J4 J7 W8 Y12
J6 J9 Y11 Y14
J8 K1 Y13 Y16
K11
K13
K10
K12
Y15
Y17
Y18
Y2
1 C3136 1 C3131 1 C3130
K15 K14 Y19 Y20 1UF 1UF 1UF
K17 K16 Y22 Y24 10% 10% 10%
K19 K18 Y23 Y4 2 6.3V
CERM 2 6.3V
CERM
6.3V
2 CERM
K21 K20 Y3 Y6
K23 K6 Y5 Y8 402 402 402
K5 K8 Y7 AA11
K7 L11 Y9 AA15
K9 L13 AA16 AA17
L10 L15 AA18 AA21
L12
L14
L17
L23
AA2
AA24
AA23
AA3
1 C3137 1 C3134 1 C3132
L16 L5 AA4 AA7 1UF 1UF 1UF
L18 L7 AA6 AB10 10% 10% 10%
L20 L9 AB1 AB14 6.3V 6.3V 6.3V
L4 M10 AB13 AB18
L6 M12 AB15 AB2 402 402 402
L8 M14 AB17 AB20
M1 M16 AB23 AB22
M11 M2 AB3 AB8
M13 M20 AB9 AC1
M15
M17
M22
M24
AC12
AC14
AC11
AC13
1 C3138 1 C3135 1 C3133
M21 M4 AC18 AC17 1UF 1UF 1UF
M23 M6 AC2 AC21 10% 10% 10%
M5 M8 AC20 AC23 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
M7 N1 GND_SPARE_GND 31 AC22 AC3
402 402 402
M9 N11 AC4 AC5
N10 N13 AC6 AC7
N12 N15 AC8 AD10
N14 N17 AD1 AD16
N16 N23 AD15 AD2
N18
N2
N5
N7
AD19
AD23
AD20
AD24
1 C3145 1 C3141 1 C3139
N20 N9 AD3 AD4 1UF 1UF 1UF
N24 P10 AD5 AD6 10% 10% 10%
N4 P12 AD9 6.3V 6.3V 6.3V
B N6
N8
P14
P16 402 402 402 B
AGND KPGND1 KPGND2
R24 AA1 T2
1 C3146 1 C3142 1 C3140
1UF 1UF 1UF
10% 10% 10%
2 6.3V 2 6.3V 2 6.3V
R3127 CERM
402
CERM
402
CERM
402
TDIODE_NEG 6 36 1
0 2
31 GND_Z_OUT
DIFFERENTIAL_PAIR=P_TDD
MIN_NECK_WIDTH=8MIL
1/16W
MF R3129 1 C3147 1 C3144 1 C3143
402
1
0 2
1UF 1UF 1UF
31 GND_Z_SENSE 10% 10% 10%
6.3V 6.3V 6.3V
5% 2 CERM 2 CERM 2 CERM
R3131 1/16W
MF
402 402 402
0 402
31 GND_SPARE_GND1 2
5%
1/16W
MF
402
NOSTUFF
A PPVCORE_CPU
R3103
36 35 34 33 32 31 29 7 6
1
0 2 KPVDD2 33 36
A
NOSTUFF MIN_LINE_WIDTH=10MIL
1/16W
MF
1 C3101 DIFFERENTIAL_PAIR=P_KP2
402 0.22UF
NOSTUFF 20%
6.3V
R3105 2 X5R
402
1
0 2 KPGND2 33 36
1/16W DIFFERENTIAL_PAIR=P_KP2
MF NET_SPACING_TYPE=PROC_DIFF
402
PLACE ALL THESE PARTS VERY CLOSE TO U2900
PROCESSOR POWER PINS AND BYPASS CAPS

8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
36 35 34 33 31 29 7 6 PPVCORE_CPU
1 C3222 1 C3221 1 C3220 1 C3219 1 C3218 1 C3217 1 C3216 1 C3215 1 C3212 1 C3200
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
402 402 402 402 402 402 402 402 402 402
1 C3293 1 C3268 1 C3261 1 C3259 1 C3235 1 C3232 1 C3226 1 C3224 1 C3245 1 C3223
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
402 402 402 402 402 402 402 402 402 402
1 C3294 1 C3269 1 C3264 1 C3260 1 C3236 1 C3233 1 C3227 1 C3225 1 C3256 1 C3234
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
402 402 402 402 402 402 402 402 402 402
1 C3295 1 C3271 1 C3265 1 C3262 1 C3239 1 C3237 1 C3230 1 C3228 1 C3289 1 C3267
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
C CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402 C
1 C3296 1 C3270 1 C3266 1 C3263 1 C3240 1 C3238 1 C3231 1 C3229 1 C3201 1 C3278
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
402 402 402 402 402 402 402 402 402 402
1 C3297 1 C3282 1 C3276 1 C3272 1 C3252 1 C3250 1 C3243 1 C3241 1 C3206 1 C3204
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
402 402 402 402 402 402 402 402 402 402
1 C3298 1 C3281 1 C3277 1 C3273 1 C3253 1 C3251 1 C3244 1 C3242 1 C3207 1 C3205
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
402 402 402 402 402 402 402 402 402 402
1 C3299 1 C3284 1 C3279 1 C3274 1 C3257 1 C3254 1 C3248 1 C3246 1 C3210 1 C3208
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
402 402 402 402 402 402 402 402 402 402
1 C3202 1 C3283 1 C3280 1 C3275 1 C3258 1 C3255 1 C3249 1 C3247 1 C3211 1 C3209
B 10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
10%
6.3V
2 CERM
B
402 402 402 402 402 402 402 402 402 402
1 C3203 1 C3292 1 C3291 1 C3290 1 C3288 1 C3287 1 C3286 1 C3285 1 C3214 1 C3213
10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
402 402 402 402 402 402 402 402 402 402
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
33 7 PP12V_RUN_CPU
1
C3310 34 33 6 PP12V_CPU
R3329 1UF
10 U3310_BST_R 1 2
5% CRITICAL CRITICAL
1/16W 20% 1
MF 16V
1
C3311 C3312
2 402 SC2643_VCC 33
CERM 1000UF 10UF
1206 10%
R3330 U3310_DRN 2
20%
16V 2 CERM
16V
0 ELEC
1 2 SYS_SLEWING_L 13 25 27 TH-KZJ 1210
1 C3319 5%
1/16W
34 33 6 PP12V_CPU U3310
1UF
9
MF
6 VIN
SC1211
20%
16V 402 SOIC BG 8
2 CERM CRITICAL
D 33 SC2643_AGND 1206
U3300
VCC
33 OUT1 4 CO VREG 7
D SAMSUNG
Q3310
D
CPU_VID_R<0> 14 VID0 OUT1 19 OUT1 1 DRN TG 2 U3310_TG SUD50N03
8 6
CPU_VID_R<1> 13 VID1
TSSOP
OUT2 20 OUT2
33
1 C3329 R3307
2.2
G TO-252
8 6 33
1UF 1 2 U3310_BST 3 BST VPN 5 S CRITICAL
SC2643VX
CPU_VID_R<2> 12 VID2 OUT3 21 OUT3 20% 1
8 6
CPU_VID_R<3> 11 VID3 OUT4 22 OUT4

34
2 16V
CERM
5% THMPAD R3350 L3310
8 6 34
R3300 1206 1/16W
MF 9
10K
5%
0.6UH-24A
8 6 CPU_VID_R<4> 10 VID4
U3300_BGOUT
1.5K 2 VRM_EN
603 1/16W
PN1 1 2 PPVCORE_CPU
15 VID5 BGOUT 4 1 3
R3310 MF 33 6 7 29 31 32 33 34 35 36
CPU_VID_R<5> 2 402 MIN_NECK_WIDTH=10MIL
8 6
PGOOD 16 SC2643_PGOOD
5%
1/16W 3 Q3312 D3310
BAS16 1
1 2
MIN_LINE_WIDTH=25MIL TH1 CRITICAL
SC2643_OS1 3 OS1 MF 2N7002 SOT23 1
C3318 1
C3317 1
C3332
402 D SM 1 5%
SC2643_OS2 2 OS2 ERROUT 5 1/16W 1800UF 1800UF 1800UF
1 OS3
U3310_VREG MF 20% 20% 20%
SC2643_OS3 1
402 2 6.3V 2 6.3V 2 6.3V
24 OS4 DACSTEP 8 SC2643_DACSTEP S G SYS_POWERUP_L 6 7 10 11 13 VPN1 CRITICAL ELEC
TH-KZJ
ELEC
TH-KZJ
ELEC
TH-KZJ
D SAMSUNG
FB 7
1 C3301 1
23 OUTSEN 1UF 2 1
R3312 Q3311 R3311
GSENSE 6
1 C3300 10%
2 6.3V 100
U3310_BG
G
SUD70N03
TO-252 5%
1
SC2643_OSCREF 17 OSCREF 0.1UF CERM
5% 1/10W
20% 402 S
1/16W FF
2 10V MF 2 805
AGND
CERM
402 SC2643_AGND
1 C3313 2 402 NOSTUFF
33
1UF C3316_1
1
R3328 18 NOSTUFF 20%
16V
2 CERM AUX1
1 C3315
232K
33
0.0022UF 1 C3316
1% R3303 1206 10%
50V 0.0047UF
1/16W 2.7M 2 2 CERM
MF SC2643_ERROUT 1 SC2643_VCC 10%
2 402 5%
33
1 C3314 402 25V
2 CERM
1 0.001UF 402
R3301 1/16W
MF 20%
50V
30K 603 2 CERM
SC2643_AGND 33 5% 402
1/16W
MF NOSTUFF
2 402 1 33 PN1
AUX1 33 AUX2 33 AUX3 34
AUX4 34
R3302
C3302_1 0
C 1
R3313
20.5K
1
R3316
20.5K
1
R3317
20.5K
1
R3323
20.5K
1 C3302
330PF
5%
1/16W
MF PLACE NEXT TO SMU
C
10% 2 402
1%
1/16W
1%
1/16W
1%
1/16W
1%
1/16W
50V
2 CERM R3308
MF MF MF MF 402 36 35 34 33 32 31 29 7 6 PPVCORE_CPU
1
100K 2
2 402 2 402 2 402 2 402
CPU_SENSE_V 13
SC2643_OS4 5%
NOSTUFF NOSTUFF NOSTUFF NOSTUFF C3320 PP12V_CPU
1/16W
MF
1 C3303
1UF
34 33 6
402 10UF
1 C3304 1
R3314 1
1
C3305 R3315 1
1
C3306 R3318
1 C3307 1R3319 SC2643_AGND 33
U3320_BST_R 1 2
20%
6.3V
2 CERM
0.01UF 20.5K 20.5K 20.5K 0.01UF 20.5K
10%
1% 0.01UF 1% 0.01UF 1% 10% 1% 805
16V 10% 10% 16V 20% 1
2 CERM 1/16W
MF
16V 1/16W 16V 1/16W 2 CERM 1/16W 16V
1
C3321 C3322 GND_SMU_AVSS
402 2 CERM MF 2 CERM MF 402 MF CERM 10UF 8 13 33 36
1000UF
2 402 402 2 402 402 2 402 2 402 1206 20% 10%
U3320_DRN 2 16V 16V
2 CERM
VCORE_SENSE_GND 6 33 ELEC
1210
TH-KZJ
R3305 R3304 DIFFERENTIAL PAIR

PP12V_CPU U3320
SC2643_VCC
4.99K2
SC2643_OS_HUB
261 34 33 6
6 VIN
SC1211
33 1 1 2 FOR REMOTE SENSE SOIC BG 8
1% 1% D SAMSUNG
1/16W 1/16W 33 OUT2 4 CO VREG 7
MF
C3308 MF VCORE_SENSE_VOUT 6 33
Q3320
402 402
0.068UF R3306 1 DRN TG 2 U3320_TG SUD50N03
G TO-252
1 2 2.2
1 2 U3320_BST 3 BST VPN 5 1
S
10% 1 C3330 THMPAD R3351 L3320
10V
CERM
R3326 1UF
5%
1/16W 10K 0.6UH-24A
OMIT 402 1
301 2 20%
MF 9 5%
603
XW3300
SM 1%
NOSTUFF 16V
2 CERM 3
R3320
1/16W
MF
33 PN2 1 2 PPVCORE_CPU 6 7 29 31 32 33 34 35
36
1/16W 1206
D3320 1 2 402 MIN_NECK_WIDTH=10MIL TH1
33 SC2643_AGND 1 2 MF
402
1
R3324 BAS16
SOT23
1 2 1
C3328 1
C3327 1
C3333
330 1 5% 1800UF 1800UF 1800UF
NOSTUFF 5% 1/16W 20% 20% 20%
1/16W U3320_VREG MF 2 6.3V 2 6.3V 2 6.3V
ELEC ELEC ELEC
R3325 MF
2 402
VPN2
402
TH-KZJ TH-KZJ TH-KZJ
B 1
1K 2 R3325_2
1
D SAMSUNG
Q3321 1
R3321
B
5%
1/16W R3322 U3320_BG SUD70N03 1
MF 100 G TO-252 5%
402 5% 1/10W
PLACE R3325 CLOSE TO INDUCTOR OUTPUT LEAD. 1/16W S FF
NOSTUFF MF 2 805
1 C3323 2 402 NOSTUFF
C3309 1UF
20%
1 C3325 C3326_1
0.015UF 16V AUX2 0.0022UF
2 CERM 33
SC2643_OUTSEN 1 2
OMIT 1206
10%
50V
2 CERM
1 C3326
0.0047UF
R3327 10% 16V
X7R 402
XW3302
SM 1 C3324
402 10%
25V
2 CERM PEAK CURRENT ON PPVCORE_CPU
1.5K 2 0.001UF 402
1 SC2643_OUTSEN_R 1 2 PPVCORE_CPU 6 7 29 31 32 33 34 35 36
20% 20 54.17A
1% CONNECT BETWEEN THE INDUCTOR & BULK CAPS. 2 50V
CERM 17 37.50A
1/16W 402
MF
402
33 PN2
PLACE REGULATOR SENSE POINTS AT DESIGNATED LOCATIONS.
R3335 CRITICAL
0
33 32 31 29 7 6 PPVCORE_CPU MIN_LINE_WIDTH=10MIL 1 2 VCORE_SENSE_VOUT
MIN_LINE_WIDTH=10MIL 6 33 L3300
PP12V_RUN_CPU 1UH-20A-4.5MOHM
PP12V_CPU 6 33 34
36 35 34 MIN_NECK_WIDTH=8MIL
R3336 5% DIFFERENTIAL_PAIR=P_SENSE_CORE
33 7
R3343
UNDER PROCESSOR
1/16W MIN_NECK_WIDTH=8MIL 1 2 PP12V_CPU_R
0.0152 TABLE_5_HEAD
1
0 2
MF NET_SPACING_TYPE=PROC_DIFF 1 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
402
TH-VERT 2% TABLE_5_ITEM
5% NOSTUFF 1W KEEP SHORTS NEXT TO U3301 CRITICAL 376S0130 2 ON SEMI FETS Q3310,Q3320 CRITICAL HYNIX
1/16W
R3337 VCORE_SENSE_GND 6 33 MF
MF 2512 PLACE R3344 AND C3331 BY SMU TABLE_5_ITEM
402
1
0 2
DIFFERENTIAL_PAIR=P_SENSE_CORE
CRITICAL 376S0146 2 ON SEMI FETS Q3311,Q3321 CRITICAL HYNIX
NOSTUFF MIN_NECK_WIDTH=8MIL OMIT

5% NET_SPACING_TYPE=PROC_DIFF PP3V3_RUN_CPU
NEAR SIDE R3338 1/16W
MF
XW3304
SM
7
0 402 3 4
1 2 INA138_OUT 1 2 CORE_ISNS_P 6 36 3 NOSTUFF
VIN+ VIN-
5% NOSTUFF OMIT D3300
A 1/16W
R3339 U3301 XW3303 BAS16
MF
402
1
0 2
5
INA138
SOT23-5 1
SM R3344
100K 2
1
SOT23
A
V+ OUT 1 2 CPU_SENSE_I_R 1 CPU_SENSE_I 13
NOSTUFF 5%
FAR SIDE R3340 1/16W
MF
5%
1/16W
0 402 MF
1 2 1
R3345 402 1 C3331
5% NOSTUFF GND 121K 10UF
20%
1/16W
MF R3341 2 1%
1/16W 2 6.3V
CERM
402
1
0 2
MF 805
KPVDD2
36 31
2 402
NOSTUFF 5% OMIT
R3342 1/16W GND_SMU_AVSS
CPU SENSE SIDE
0
MF
402
XW3301
SM
8 13 33 36
36 31 KPGND2 1 2
1 2 CORE_ISNS_M 6 36
5%
1/16W
MF
402
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PP12V_CPU 6 33 34
C3410 1
C3411 1
C3412 1 C3468
1UF 1000UF 1000UF 10UF
U3410_BST_R 1 2 20% 20% 10%
16V 36 35 34 33 32 31 29 7 6 PPVCORE_CPU
2 16V 2 16V 2 CERM
ELEC ELEC
20% TH-KZJ TH-KZJ 1210
16V
CERM
1206
U3410_DRN 1 C3433 1 C3431 1 C3429 1 C3461 1 C3459
10UF 10UF 10UF 10UF 10UF
20% 20% 20% 20% 20%
U3410 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
SC1211
D 34 33 6 PP12V_CPU 6 VIN SOIC BG 8
SAMSUNG
1206 1206 1206 1206 1206
D
D
OUT3 4 CO VREG 7
33
Q3410 1 C3434 1 C3432 1 C3430 1 C3462 1 C3460
1 DRN TG 2 U3410_TG SUD50N03 10UF 10UF 10UF 10UF 10UF
R3423 G TO-252 20% 20% 20% 20% 20%
2.2 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
1 2 U3410_BST 3 BST VPN 5 1
S
1206 1206 1206 1206 1206
1 C3470 5%
1/16W
THMPAD R3450
10K
L3410
1UF MF 9 5%
0.6UH-24A
20% 603 1/16W
2 16V
CERM 3
R3410 MF 34 PN3
1 2 PPVCORE_CPU 6 7 29 31 32 33 34 35 36
1 C3443 1 C3437 1 C3435 1 C3465 1 C3463
1206 D3410 1 2 402 MIN_NECK_WIDTH=10MIL TH1 10UF 10UF 10UF 10UF 10UF
1 1 1 1 20% 20% 20% 20% 20%
BAS16
SOT23
1 2
C3417 C3418 C3472 C3473 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
1 5% 1800UF 1800UF 1800UF 1800UF 1206 1206 1206 1206 1206
1/16W 20% 20% 20% 20%
U3410_VREG MF 2 6.3V 2 6.3V 2 6.3V 2 6.3V
402 ELEC ELEC ELEC ELEC
VPN3 SAMSUNG TH-KZJ TH-KZJ TH-KZJ TH-KZJ
D
1
1 C3444 1 C3438 1 C3436 1 C3466 1 C3464
1
R3412 Q3411 R3411 10UF 10UF 10UF 10UF 10UF
U3410_BG SUD70N03 1 20% 20% 20% 20% 20%
100 G TO-252 5% 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
5% S 1/10W 1206 1206 1206 1206 1206
1/16W FF
MF NOSTUFF 2 805
1 C3413 2 402 1 C3415
1UF C3416_1
20% 0.0022UF 1 C3445 1 C3441 1 C3439 1 C3401 1 C3467
16V AUX3 10%
2 CERM 10UF 10UF 10UF 10UF 10UF
1206
33
2 50V
CERM
1 C3416 20% 20% 20% 20% 20%
402 0.0047UF 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
10%
1 C3414 2 25V
CERM
1206 1206 1206 1206 1206
0.001UF 402
20%
50V
2 CERM
402
1 C3446 1 C3442 1 C3440 1 C3402 1 C3400
34 PN3 20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
C CERM
1206
CERM
1206
CERM
1206
CERM
1206
CERM
1206 C
1 C3455 1 C3449 1 C3447 1 C3405 1 C3403
PP12V_CPU 6 33 34
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
1206 1206 1206 1206 1206
C3420 1
C3421 1
C3422 1
1UF 1000UF 1000UF
C3469 1 C3456 1 C3450 1 C3448 1 C3406 1 C3404
U3420_BST_R 1 2 20% 20% 10UF
2 16V 2 16V 10% 10UF 10UF 10UF 10UF 10UF
ELEC ELEC 16V 20% 20% 20% 20% 20%
2 CERM
20%
16V
TH-KZJ TH-KZJ
1210 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
CERM 1206 1206 1206 1206 1206
1206
U3420_DRN
U3420
1 C3457 1 C3453 1 C3451 1 C3409 1 C3407
SC1211 20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
34 33 6 PP12V_CPU 6 VIN SOIC BG 8 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
D SAMSUNG 1206 1206 1206 1206 1206
33 OUT4 4 CO VREG 7
Q3420
R3424 1 DRN TG 2 U3420_TG SUD50N03
2.2
G TO-252 1 C3458 1 C3454 1 C3452 1 C3419 1 C3408
1 2 U3420_BST 3 BST VPN 5 S 10UF 10UF 10UF 10UF 10UF
1 20% 20% 20% 20% 20%
1 C3471
5%
1/16W
THMPAD R3451
10K
L3420 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
MF 9 0.6UH-24A 1206 1206 1206 1206 1206
1UF 603
5%
1/16W
20% 3 MF 34 PN4 1 2 PPVCORE_CPU 6 7 29 31 32 33 34 35 36
16V
2 CERM
1206 D3420 R3420 2 402 MIN_LINE_WIDTH=25MIL TH1
1 1 1 1
BAS16 1
1 2
MIN_NECK_WIDTH=10MIL C3427 C3428 C3474 C3475
SOT23
B 1
U3420_VREG
5%
1/16W
1800UF
20%
2 6.3V
1800UF
20%
2 6.3V
1800UF
20%
2 6.3V
1800UF
20%
2 6.3V
B
MF ELEC ELEC ELEC ELEC
VPN4 402 TH-KZJ TH-KZJ TH-KZJ TH-KZJ
D SAMSUNG
1
1
R3422 Q3421 R3421
U3420_BG SUD70N03 1
100 G TO-252 5%
5% S 1/10W
1/16W FF
MF 2 805
1 C3423 2 402 NOSTUFF
1UF 1 C3425 C3426_1
20%
0.0022UF
TABLE_5_HEAD
16V AUX4
2 CERM PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
1206
33
10%
2 50V
1 C3426
0.0047UF
TABLE_5_ITEM
CERM
402 10% 376S0130 2 ON SEMI FETS Q3410,Q3420 CRITICAL HYNIX
1 C3424 2 25V
CERM
376S0146 2 ON SEMI FETS Q3411,Q3421 CRITICAL HYNIX
TABLE_5_ITEM
0.001UF 402
20%
50V
2 CERM
402
34 PN4
A A
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
36 35 34 33 32 31 29 7 6 PPVCORE_CPU
CRITICAL
1 C3500 1 C3512 1 C3523 1 C3534 1 C3545 1 C3501 1 C3589 1 C3578 1 C3567 1 C3556
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
PPVCORE_CPU 6 7 29 31 32 33 34 35 36
PP1V2_EI_CPU
31 30 29 18 7
1 C3513 1 C3511 1 C3510 1 C3509 1 C3508 1 C3507 1 C3506 1 C3505 1 C3504 1 C3503
PP2V5_RUN_CPU_AVDD_R 31
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
NOSTUFF 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
DS3500
SM
DS3502
SM
1 2 1 2
1 C3524 1 C3522 1 C3521 1 C3520 1 C3519 1 C3518 1 C3517 1 C3516 1 C3515 1 C3514
10BQ040 10BQ040
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
NOSTUFF 1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
DS3501
SM
2 1
1 C3535 1 C3533 1 C3532 1 C3531 1 C3530 1 C3529 1 C3528 1 C3527 1 C3526 1 C3525
10BQ040
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
C 1 C3546
10UF
1 C3544
10UF
1 C3543
10UF
1 C3542
10UF
1 C3541
10UF
1 C3540
10UF
1 C3539
10UF
1 C3538
10UF
1 C3537
10UF
1 C3536
10UF
C
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
1 C3557 1 C3555 1 C3554 1 C3553 1 C3552 1 C3551 1 C3550 1 C3549 1 C3548 1 C3547
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
1 C3568 1 C3566 1 C3565 1 C3564 1 C3563 1 C3562 1 C3561 1 C3560 1 C3559 1 C3558
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
1 C3579 1 C3577 1 C3576 1 C3575 1 C3574 1 C3573 1 C3572 1 C3571 1 C3570 1 C3569
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
1 C3590 1 C3588 1 C3587 1 C3586 1 C3585 1 C3584 1 C3583 1 C3582 1 C3581 1 C3580
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
B B
1 C3502 1 C3599 1 C3598 1 C3597 1 C3596 1 C3595 1 C3594 1 C3593 1 C3592 1 C3591
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
1206 1206 1206 1206 1206 1206 1206 1206 1206 1206
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
30 31 36
7
6
3
PP5V_RUN_CPU
7 PP5V_PWRON_CPU
R3602 D
D 1
2 2 MIN_LINE_WIDTH=15MIL DAVDD 36
1
DEVELOPMENT
5% MIN_NECK_WIDTH=10MIL R3600
C3603 1 C3604 C3605 C3600
30 31 36
1/16W 1 1 1
MF 100
603 2.2UF 2.2UF 2.2UF 2.2UF 5%
20% 20% 20% 20% 1/16W
XW3601
SM
10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
MF
2 402
7
805 805 805 805
1 2 DAGND 36
6
OMIT LED3600P1
3
PP5V_RUN_CPU
XW3600 MUST BE PLACED CLOSE TO SMU
1 DEVELOPMENT
D3610
DEVELOPMENT RED
SM
100UA CURRENT SOURCE DEVELOPMENT 8 1 C3609 2

2.2UF
V+ 20%
R3606 R3603 U3600 2 10V
CERM
10K 10K LM393 805
LED3600P2
36 DAGND 1 2 TD11 2 TD_CURRENT SOI DEVELOPMENT
2
0.1%
1/16W
10MIL 0.1%
8MIL 1/16W U3600P3 3
1 SYS_OVERTEMP_L 13 16 25 27
DEVELOPMENT Q3600 2
FF FF R3627 2N3906
THESE SIGNALS HAVE A MIN_LINE_WIDTH=10MIL 603 603 SM
36 ADC_REF
1
1K 2 Q3600_B 1
AND MIN_NECK_WIDTH=8MIL 36 DAVDD 6
1DEVELOPMENT 7 TP_CMP_SPARE
U3601
5 LMV2011 R3618 5 6 5%
1/16W
4
SOT23-5 BUFFER 1K MF
3
0.1% 402
1 1/16W GND
R3604 FF
2 603 4
20K
36 ADC_REF 1 2 TD23 36 DAVDD
1
0.1% 2 R3608 U3602 1DEVELOPMENT
1/16W
FF
DAGND 36
1%
12.7K 4 5 LMV2011
SOT23-5
R3617
10K
C 603
1/16W
MF
2 603
1 0.1%
1/16W
FF
C
3 2 603
36 DAGND
R3607 R3605 DAGND
2
36
20K 10K
36 DAGND 1 2 1
10MIL
2 TD_BUFFERED
POWER MONITOR
0.1%
1/16W
8MIL 0.1%
1/16W
MIN_NECK_WIDTH=8MIL C3607
FF FF 10UF
603 603 1 2
20%
6.3V
R3609 R3611 CERM
805
1
10K 2 1
158K 2
TD3
10MIL
0.1% 1%
1/16W 8MIL 1/16W CHANNEL SOURCE VOLT SCALE COUNT SCALE
FF MF
603 603 0 U21 TEMPERATURE - 0.25 C/CNT
1 PROC TEMPERATURE 50C/V 0.125 C/CNT
34 33 32 31 29 7 6 PPVCORE_CPU
R3612 2
3
12V CURRENT
PROC VOLTAGE
5A/V
1V/V
0.01221A/CNT
0.00244V/CNT
35
DAGND 1
36.5K2 36 DAVDD
36 31 TDIODE_POS 36
0.5%
U3603
5 LMV2011
1NOSTUFF 4
R3628
1 C3610 1 C3606 R3616 1/16W
FF
SOT23-5
100K 2
0.0022UF 0.0022UF 1K 603 1 CPU_TEMP_R 1 CPU_TEMP 13 36
10% 10% 1%
1/16W 5% MIN_LINE_WIDTH=10MIL
50V 50V
2 CERM 2 CERM MF
2 402
R3610 3 1/16W MIN_NECK_WIDTH=8MIL PP3V3_PWRON_CPU 7
TDIODE_NEG
402 402
1
10K 2 2
MF
402
1 C3613
36 31 6 DAGND 36 10UF NEED TO CONNECT TO P65 OF 80PIN SMU OR PIN 49 OF 64PIN SMU
0.1% 20%
1
R3615 1/16W 2 6.3V
CERM
FF 805
0 603 1
5% GND_SMU_AVSS 8 13 33
R3601
1/16W
R3613 R3614 200
B MF
2 402 36.5K2 158K 2
1%
1/16W
1 C3601 B
36 ADC_REF 1 TD4 1 ADC_REF 36 MF 2.2UF
20%
0.5% 10MIL 1% 2 603 2 10V
1/16W
FF
8MIL 1/16W
MF
C3608 36 ADC_REF
CERM
805
603 603 10UF MIN_LINE_WIDTH=10MIL
R3690
0
1
20%
6.3V PPVREF_SMU_ADC_REF 1 2
CERM
8
D3600
805 5%
1/16W 2.5V 1 C3602
MF
402
SSOT-23 0.47UF
20%
10V
2 CERM
R3691
2
3
603
PLACE CLOSE 0
8 GND_SMU_AVSS_DAGND 1 2 DAGND 36
TO U2900
5%
OMIT 1/16W NEEDED FOR FMAX
MF
XW3611
SM
402
NOSTUFF 6 KPVDD2_FMAX 1 2 KPVDD2 NOSTUFF

J3600 DIFFERENTIAL_PAIR=KP2_FMAX
MIN_LINE_WIDTH=10MIL OMIT
31 33
R3620
51
BM12B-SRSS-TB MIN_NECK_WIDTH=8MIL
NET_SPACING_TYPE=PROC_DIFF XW3612 36 13 CPU_TEMP 1 2 FMAXT_P NO_TEST
F-ST-SM
14 SM 5% DIFFERENTIAL_PAIR=P_FMAXT NOSTUFF
1
6 KPGND2_FMAX
DIFFERENTIAL_PAIR=KP2_FMAX
1 2 KPGND2 31 33
1/16W
MF NET_SPACING_TYPE=PROC_DIFF R3619
MIN_LINE_WIDTH=10MIL OMIT 402 0
1 MIN_NECK_WIDTH=8MIL 5%
2 NET_SPACING_TYPE=PROC_DIFF XW3613
SM
NOSTUFF
R3621
1/10W
FF
3 51 2 805
6 TDIODE_POS_FMAX 1 2 TDIODE_POS 31 36 1 2
DIFFERENTIAL_PAIR=TDIODE 36 DAGND FMAXT_M NO_TEST
4 MIN_LINE_WIDTH=10MIL OMIT DIFFERENTIAL_PAIR=P_FMAXT
5%
MIN_NECK_WIDTH=8MIL NET_SPACING_TYPE=PROC_DIFF
5 NET_SPACING_TYPE=PROC_DIFF XW3614
SM
1/16W
MF
6 402
A 7
6 TDIODE_NEG_FMAX
DIFFERENTIAL_PAIR=TDIODE
1 2 TDIODE_NEG 6 31 36
PLACE AT BOARD EDGE
A
9 NET_SPACING_TYPE=PROC_DIFF
10 CORE_ISNS_M 6 33
11 DIFFERENTIAL_PAIR=CORE_ISNS
13
CORE_ISNS_P 6 33
DIFFERENTIAL_PAIR=CORE_ISNS
MIN_NECK_WIDTH=8MIL
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U3LITE’S MAIN MEMORY INTERFACE CAN BE TURNED OFF IN SLEEP U3TWINS DO NOT HAVE MASKS
37 26 7 PP2V5_RAM
60 48 28 7 PP1V5_PWRON_NB_AVDD R3702
2.2
AG19
AG25
AE13
AE16
AE22
AE27
AC19
AB25
AA13
AA16
1 2 PP1V5_PWRON_RAM_NB_AVDD
Y16
Y19
W23
W27
V20
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
5% MIN_NECK_WIDTH=10MIL PP2V5_RAM 7 26 37
1/16W
VDD_DDR
MF
603
1 C3745 1 C3744
1UF 0.1UF
U3 10% 20%
2 6.3V 2 10V
AB21
U3LITE CERM CERM
T19
T21
T25
P20
N21
N25
M19
K19
K23
K27
G25
F19
D22
D27
B25
V1.0-300MM 402 402
D 38 RAM_DQ_R<0> AF20 DDR_DQ0

AH22 DDR_DQ1
PBGA
(SYM 2 OF 7) DDR_DQ64 AG27 RAM_DQ_R<64> 38 DDR VDD_DDR
D
38 RAM_DQ_R<1> DDR_DQ65 AF24 RAM_DQ_R<65> 38 CLK_AVDD
AH21 DDR_DQ2 OMIT U3
38 RAM_DQ_R<2> DDR_DQ66 AE24 RAM_DQ_R<66> 38
AG21 DDR_DQ3 U3LITE
38 RAM_DQ_R<3> DDR_DQ67 AG26 RAM_DQ_R<67> 38 27 RAM_CLK66M_NB AC20 DDR_CLKP
V1.0-300MM DDR_RAS AE21 RAM_RAS_L_R 38
38 RAM_DQ_R<4> AB20 DDR_DQ4 DDR_DQ68 AF26 RAM_DQ_R<68> 38 PBGA

38 RAM_CLK_A_P_R AA12 DDR_CK_A (SYM 3 OF 7) DDR_CAS AD20 RAM_CAS_L_R 38 RAS / CAS / WE / BA<1..0>
38 RAM_DQ_R<5> AC21 DDR_DQ5 DDR_DQ69 AD24 RAM_DQ_R<69> 38 CLK<A..C>
38 RAM_CLK_A_N_R AB12 DDR_CK_AN OMIT GO TO BOTH DIMMS
RAM_DQ_R<6> AD23 DDR_DQ6 DDR_DQ70 AD25 RAM_DQ_R<70> GO TO J4000 DDR_WE AC23 RAM_WE_L_R
38
MEMORY 38
38 RAM_CLK_B_P_R AB14 DDR_CK_B 38
RAM_DQ_R<7> AD21 DDR_DQ7 DDR_DQ71 AG28 RAM_DQ_R<71>

38
DATA 38
38 RAM_CLK_B_N_R AA14 DDR_CK_BN
RAM_DQ_R<8> AH26 DDR_DQ8 DDR_DQ72 AF28 RAM_DQ_R<72> DDR_BA0 AF21 RAM_BA_R<0>
38
INTERFACE 38
38 RAM_CLK_C_P_R AE15 DDR_CK_C 38
38 RAM_DQ_R<9> AH25 DDR_DQ9 DDR_DQ73 AE28 RAM_DQ_R<73> 38 DDR_BA1 AE20 RAM_BA_R<1> 38

38 RAM_CLK_C_N_R AE14 DDR_CK_CN
38 RAM_DQ_R<10> AH24 DDR_DQ10 DDR_DQ74 AD26 RAM_DQ_R<74> 38
38 RAM_CLK_D_P_R AC14 DDR_CK_D
38 RAM_DQ_R<11> AH23 DDR_DQ11 DDR_DQ75 AF27 RAM_DQ_R<75> 38 CLK<D..F> DDR_MUXEN0 AH16 TP_RAM_MUXEN0 6
38 RAM_CLK_D_N_R AD14 DDR_CK_DN
38 RAM_DQ_R<12> AH27 DDR_DQ12 DDR_DQ76 AC26 RAM_DQ_R<76> 38 GO TO J4001 DDR_MUXEN4 AH18 TP_RAM_MUXEN4 6
38 RAM_CLK_E_P_R AD15 DDR_CK_E
38 RAM_DQ_R<13> AG24 DDR_DQ13 DDR_DQ77 AC25 RAM_DQ_R<77> 38
38 RAM_CLK_E_N_R AC15 DDR_CK_EN
38 RAM_DQ_R<14> AF23 DDR_DQ14 DDR_DQ78 AC27 RAM_DQ_R<78> 38 MEMORY DDR_MAD0 AG12 RAM_A_R<0> 38
38 RAM_CLK_F_P_R AA15 DDR_CK_F
38 RAM_DQ_R<15> AH28 DDR_DQ15 DDR_DQ79 AD27 RAM_DQ_R<79> 38 CONTROL DDR_MAD1 AH13 RAM_A_R<1> 38
38 RAM_CLK_F_N_R AB15 DDR_CK_FN
38 RAM_DQ_R<16> U25 DDR_DQ16 DDR_DQ80 AA27 RAM_DQ_R<80> 38 INTERFACE DDR_MAD2 AH14 RAM_A_R<2> 38
38 RAM_DQ_R<17> AA23 DDR_DQ17 DDR_DQ81 AA26 RAM_DQ_R<81> 38 DDR_MAD3 AH15 RAM_A_R<3> 38

CKE<1..0> 38 RAM_CKE_R<0> AC17 DDR_CKE0
38 RAM_DQ_R<18> Y22 DDR_DQ18 DDR_DQ82 AA24 RAM_DQ_R<82> 38 DDR_MAD4 AF12 RAM_A_R<4> 38
GO TO J4000 38 RAM_CKE_R<1> AD17 DDR_CKE1 ADDRESS LINES
38 RAM_DQ_R<19> AA22 DDR_DQ19 DDR_DQ83 AA28 RAM_DQ_R<83> 38 DDR_MAD5 AE12 RAM_A_R<5> 38
6 TP_RAM_CKE_R<2> AE17 DDR_CKE2 GO TO BOTH DIMMS
38 RAM_DQ_R<20> U24 DDR_DQ20 DDR_DQ84 Y26 RAM_DQ_R<84> 38 DDR_MAD6 AD12 RAM_A_R<6> 38
6 TP_RAM_CKE_R<3> AF17 DDR_CKE3
38 RAM_DQ_R<21> V23 DDR_DQ21 DDR_DQ85 Y25 RAM_DQ_R<85> 38 DDR_MAD7 AC12 RAM_A_R<7> 38
CKE<5..4> 38 RAM_CKE_R<4> AB17 DDR_CKE4
38 RAM_DQ_R<22> V22 DDR_DQ22 DDR_DQ86 Y28 RAM_DQ_R<86> 38 DDR_MAD8 AG15 RAM_A_R<8> 38
GO TO J4001 38 RAM_CKE_R<5> AA17 DDR_CKE5
38 RAM_DQ_R<23> U22 DDR_DQ23 DDR_DQ87 Y24 RAM_DQ_R<87> 38 DDR_MAD9 AF15 RAM_A_R<9> 38
6 TP_RAM_CKE_R<6> AB18 DDR_CKE6
38 RAM_DQ_R<24> P25 DDR_DQ24 DDR_DQ88 V26 RAM_DQ_R<88> 38 DDR_MAD10 AF14 RAM_A_R<10> 38
6 TP_RAM_CKE_R<7> AA18 DDR_CKE7
38 RAM_DQ_R<25> R22 DDR_DQ25 DDR_DQ89 V27 RAM_DQ_R<89> 38 DDR_MAD11 AG14 RAM_A_R<11> 38
R21 DDR_DQ26 DDR_DQ90 V24 DDR_MAD12 AH17
C 38
38
RAM_DQ_R<26>
RAM_DQ_R<27> U23 DDR_DQ27 DDR_DQ91 W28
RAM_DQ_R<90>
RAM_DQ_R<91>
38
38
Y21 DDR_VREF0
U21 DDR_VREF1 DDR_MAD13 AG17
RAM_A_R<12>
RAM_A_R<13>
38
38
C
38 RAM_DQ_R<28> P26 DDR_DQ28 DDR_DQ92 U27 RAM_DQ_R<92> 38
PP2V5_RAM 7 26 37
L21 DDR_VREF2
38 RAM_DQ_R<29> R24 DDR_DQ29 DDR_DQ93 V28 RAM_DQ_R<93> 38 DDR_CS0 AF18 RAM_CS_L_R<0> 38 CS<1..0>
H20 DDR_VREF3
38 RAM_DQ_R<30> P24 DDR_DQ30 DDR_DQ94 T28 RAM_DQ_R<94> 38 DDR_CS1 AE18 RAM_CS_L_R<1> 38 GO TO J4000
AA21 DDR_VREF4
38 RAM_DQ_R<31> P23 DDR_DQ31 DDR_DQ95 U26 RAM_DQ_R<95> 38
R37001 M21 DDR_VREF5 DDR_CS2 AG20 TP_RAM_CS_L_R<2> 6
M25 DDR_DQ32 1K
38 RAM_DQ_R<32> DDR_DQ96 R27 RAM_DQ_R<96> 38 1% V21 DDR_VREF6 DDR_CS3 AH20 TP_RAM_CS_L_R<3> 6
M23 DDR_DQ33 1/16W
38 RAM_DQ_R<33> DDR_DQ97 R26 RAM_DQ_R<97> 38 MF J20 DDR_VREF7 DDR_CS8 AC18 RAM_CS_L_R<8> 38 CS<9..8>
P21 DDR_DQ34 402 2 MIN_LINE_WIDTH=25MIL
38 RAM_DQ_R<34> DDR_DQ98 R28 RAM_DQ_R<98> 38 MIN_NECK_WIDTH=10MIL DDR_CS9 AD18 RAM_CS_L_R<9> 38 GO TO J4001
P22 DDR_DQ35
PP1V25_RAM_VREF_NB
38 RAM_DQ_R<35> DDR_DQ99 P27 RAM_DQ_R<99> 38 VOLTAGE=1.25V DDR_CS10 AG18 TP_RAM_CS_L_R<10> 6
M24 DDR_DQ36 DDR_DQ100 M28 DDR_CS11 AH19
38 RAM_DQ_R<36>
L22 DDR_DQ37
RAM_DQ_R<100> 38 R37011 1 C3730 1 C3746 1 C3747 1 C3748 TP_RAM_CS_L_R<11> 6
38 RAM_DQ_R<37> DDR_DQ101 N28 RAM_DQ_R<101> 38 1K 0.1UF 0.1UF 0.1UF 0.1UF

L23 DDR_DQ38 1%
38 RAM_DQ_R<38> DDR_DQ102 L28 RAM_DQ_R<102> 38 1/16W 20%
10V
20% 20% 20% DDR_DQSP0 AC24 RAM_DQS_R<0> 38
J23 DDR_DQ39 MF 2 CERM 2 10V 10V
2 CERM 2 10V
38 RAM_DQ_R<39> DDR_DQ103 P28 RAM_DQ_R<103> 38 402 2 402
CERM
402 402
CERM
402 DDR_DQSP1 AG23 RAM_DQS_R<1> 38
38 RAM_DQ_R<40> D23 DDR_DQ40 DDR_DQ104 L25 RAM_DQ_R<104> 38 DDR_DQSP2 Y23 RAM_DQS_R<2> 38
38 RAM_DQ_R<41> D24 DDR_DQ41 DDR_DQ105 L26 RAM_DQ_R<105> 38 DDR_DQSP3 R23 RAM_DQS_R<3> 38 DQS<7..0>
38 RAM_DQ_R<42> C26 DDR_DQ42 DDR_DQ106 L27 RAM_DQ_R<106> 38 DDR_DQSP4 M22 RAM_DQS_R<4> 38
C27 DDR_DQ43 GO TO J4000
38 RAM_DQ_R<43> DDR_DQ107 K28 RAM_DQ_R<107> 38 DDR_DQSP5 B26 RAM_DQS_R<5> 38
38 RAM_DQ_R<44> A22 DDR_DQ44 DDR_DQ108 H27 RAM_DQ_R<108> 38 DDR_DQSP6 B27 RAM_DQS_R<6> 38
38 RAM_DQ_R<45> A25 DDR_DQ45 DDR_DQ109 H28 RAM_DQ_R<109> 38 DDR_DQSP7 F23 RAM_DQS_R<7> 38
38 RAM_DQ_R<46> C24 DDR_DQ46 DDR_DQ110 J27 RAM_DQ_R<110> 38 DDR_DQSP8 AE23 RAM_DQS_R<8> 38
38 RAM_DQ_R<47> C23 DDR_DQ47 DDR_DQ111 L24 RAM_DQ_R<111> 38 DDR_DQSP9 AD28 RAM_DQS_R<9> 38
38 RAM_DQ_R<48> B24 DDR_DQ48 DDR_DQ112 J25 RAM_DQ_R<112> 38 DDR_DQSP10 Y27 RAM_DQS_R<10> 38 DQS<15..8>
38 RAM_DQ_R<49> B23 DDR_DQ49 DDR_DQ113 J24 RAM_DQ_R<113> 38 DDR_DQSP11 U28 RAM_DQS_R<11> 38
A23 DDR_DQ50 GO TO J4001
38 RAM_DQ_R<50> DDR_DQ114 J26 RAM_DQ_R<114> 38 DDR_DQSP12 M27 RAM_DQS_R<12> 38
38 RAM_DQ_R<51> A24 DDR_DQ51 DDR_DQ115 G28 RAM_DQ_R<115> 38 DDR_DQSP13 J28 RAM_DQS_R<13> 38
38 RAM_DQ_R<52> A27 DDR_DQ52 DDR_DQ116 H25 RAM_DQ_R<116> 38 DDR_DQSP14 F28 RAM_DQS_R<14> 38
B 38 RAM_DQ_R<53> A28 DDR_DQ53

B28 DDR_DQ54
DDR_DQ117 H24 RAM_DQ_R<117> 38 DDR_DQSP15 F25 RAM_DQS_R<15> 38 B
38 RAM_DQ_R<54> DDR_DQ118 F27 RAM_DQ_R<118> 38
DDR_CLK_AVSS
RAM_DQ_R<55> A26 DDR_DQ55 DDR_DQ119 H26 RAM_DQ_R<119>
AA20
38 38
38 RAM_DQ_R<56> F24 DDR_DQ56 DDR_DQ120 E28 RAM_DQ_R<120> 38
38 RAM_DQ_R<57> J22 DDR_DQ57 DDR_DQ121 E27 RAM_DQ_R<121> 38
38 RAM_DQ_R<58> E23 DDR_DQ58 DDR_DQ122 F26 RAM_DQ_R<122> 38
38 RAM_DQ_R<59> H23 DDR_DQ59 DDR_DQ123 E26 RAM_DQ_R<123> 38
38 RAM_DQ_R<60> J21 DDR_DQ60 DDR_DQ124 D28 RAM_DQ_R<124> 38
38 RAM_DQ_R<61> H21 DDR_DQ61 DDR_DQ125 C28 RAM_DQ_R<125> 38
38 RAM_DQ_R<62> G21 DDR_DQ62 DDR_DQ126 E25 RAM_DQ_R<126> 38
38 RAM_DQ_R<63> H22 DDR_DQ63 DDR_DQ127 E24 RAM_DQ_R<127> 38
PP2V5_RAM 7 26 37
1 C3700 1 C3701 1 C3702 1 C3703 1 C3704 1 C3705 1 C3706 1 C3707 1 C3708 1 C3709 1 C3710 1 C3711 1 C3712 1 C3713 1 C3714 1 C3731 1 C3732 1 C3733 1 C3734 1 C3735 1 C3736 1 C3737
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
A A
PP2V5_RAM 7 26 37
1 C3715 1 C3716 1 C3717 1 C3718 1 C3719 1 C3720 1 C3721 1 C3722 1 C3724 1 C3725 1 C3726 1 C3727 1 C3728 1 C3729 1 C3743 1 C3742 1 C3740 1 C3739 1 C3738
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V
2 CERM 10V
2 CERM 2 10V 10V
2 CERM 2 10V 10V
2 CERM 2 10V 10V
2 CERM 10V
2 CERM 2 10V 10V
2 CERM 2 10V 10V
2 CERM 2 10V 10V
2 CERM 2 10V 2 10V 10V
2 CERM 2 10V
CERM CERM CERM CERM CERM CERM CERM CERM CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
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ALL R PACKS ARE 15 OHM 1/16W 5% ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR
RP3836 RP3818 38 37 RAM_CLK_A_P_R RAM_CLK RAM_CLK_A_R

38 37 RAM_DQ_R<7> 4 5 15 RAM_DQ<7> 38 40 44 38 37 RAM_DQ_R<68> 2 7 15 RAM_DQ<68> 38 40 45
I206
RP3836 RP3805 RAM_CLK_A_N_R RAM_CLK RAM_CLK_A_R

38 37 I207
RP3836 RP3818 38 37 RAM_CLK_B_P_R RAM_CLK RAM_CLK_B_R
I208
RP3836 RP3805 38 37 RAM_CLK_B_N_R RAM_CLK RAM_CLK_B_R
I209
RP3816 RP3818 RAM_CLK_C_P_R RAM_CLK RAM_CLK_C_R
38 37 I210
RP3816 RP3805 38 37 RAM_CLK_C_N_R RAM_CLK RAM_CLK_C_R
I211
RP3816 RP3805 RAM_CLK_D_P_R RAM_CLK RAM_CLK_D_R
38 37 I212
RP3816 RP3818 38 37 RAM_CLK_D_N_R RAM_CLK RAM_CLK_D_R
I213
RP3835 RP3817 38 37 RAM_CLK_E_P_R RAM_CLK RAM_CLK_E_R
I214
RP3801 RP3802 RAM_CLK_E_N_R RAM_CLK RAM_CLK_E_R

38 37 I215
D 38 37 RAM_DQ_R<11> RP3801
RP3801
3
4
6
5
15
15
RAM_DQ<11> 38 40 44 38 37 RAM_DQ_R<72> RP3817
RP3817
2
4
7
5
15
15
RAM_DQ<72> 38 40 45
38 37
38 37
RAM_CLK_F_P_R
RAM_CLK_F_N_R
RAM_CLK
RAM_CLK
RAM_CLK_F_R
RAM_CLK_F_R
I216
I217
D
38 37 RAM_DQ_R<14> RAM_DQ<14> 38 40 44 38 37 RAM_DQ_R<75> RAM_DQ<75> 38 40 45
RP3835 RP3802 RAM_CLK_A_P RAM_CLK0 RAM_CLK RAM_CLK_A
40 38 I218
RP3801 RP3817 40 38 RAM_CLK_A_N RAM_CLK0 RAM_CLK RAM_CLK_A
I219
RP3835 RP3802 40 38 RAM_CLK_B_P RAM_CLK0 RAM_CLK RAM_CLK_B
I220
RP3835 RP3802 RAM_CLK_B_N RAM_CLK0 RAM_CLK RAM_CLK_B
40 38 I221
RP3822 RP3806 40 38 RAM_CLK_C_P RAM_CLK0 RAM_CLK RAM_CLK_C
I222
RP3822 RP3821 RAM_CLK_C_N RAM_CLK0 RAM_CLK RAM_CLK_C

40 38 I223
RP3822 RP3821 40 38 RAM_CLK_D_P RAM_CLK1 RAM_CLK RAM_CLK_D
I224
RP3822 RP3821 40 38 RAM_CLK_D_N RAM_CLK1 RAM_CLK RAM_CLK_D
I225
RP3823 RP3806 RAM_CLK_E_P RAM_CLK1 RAM_CLK RAM_CLK_E

40 38 I226
RP3823 RP3806 40 38 RAM_CLK_E_N RAM_CLK1 RAM_CLK RAM_CLK_E
I227
RP3823 RP3821 40 38 RAM_CLK_F_P RAM_CLK1 RAM_CLK RAM_CLK_F
I228
RP3823 RP3806 RAM_CLK_F_N RAM_CLK1 RAM_CLK RAM_CLK_F
40 38 I229
RAM_DQ_R<30> RP3808 3 6 15 RAM_DQ<30> RAM_DQ_R<91> RP3819 3 6 15 RAM_DQ<91>

38 37 38 40 44 38 37 38 40 45
RP3824 RP3819 38 37 RAM_CKE_R<1..0> RAM_CAD
I230
RP3808 RP3803 RAM_CKE_R<5..4> RAM_CAD
38 37 I232
RP3824 RP3819 44 40 38 RAM_CKE<0> RAM_CKECS0 RAM_CAD
I234
RP3808 RP3803 RAM_CKE<1> RAM_CKECS0 RAM_CAD

44 40 38 I236
I235
I237
RP3824 RP3803 RAM_CS_L_R<1..0> RAM_CAD

38 37 I238
RP3826 RP3820 38 37 RAM_CS_L_R<9..8> RAM_CAD
I241
RP3807 RP3820 44 40 38 RAM_CS_L<0> RAM_CKECS0 RAM_CAD
I243
RP3826 RP3820 RAM_CS_L<1> RAM_CKECS0 RAM_CAD
44 40 38 I242
I245
3 6 15 2 7 15 I244
C 38 37
38 37
RAM_DQ_R<39>
RAM_DQ_R<33> RP3807 3 6 15
RAM_DQ<39>
RAM_DQ<33>
38 40 44
38 40 44
38 37
38 37
RAM_DQ_R<100>
RAM_DQ_R<99> RP3825 3 6 15
RAM_DQ<100>
RAM_DQ<99>
38 40 45
38 40 45 38 37 RAM_DQS_R<15..0> RAM_CAD I305

C
RAM_DQ_R<34> RP3807 1 8 15 RAM_DQ<34> RAM_DQ_R<102> RP3825 1 8 15 RAM_DQ<102> RAM_DQ_R<127..0>
38 37 38 40 44 38 37 38 40 45 38 37 RAM_CAD I294
38 37 RAM_DQ_R<36> RP3826 1 8 15 RAM_DQ<36> 38 40 44 38 37 RAM_DQ_R<101> RP3825 4 5 15 RAM_DQ<101> 38 40 45 45 44 40 38 RAM_DQ<127..0> RAM_CAD I293
RAM_DQ_R<47> RP3811 2 7 15 RAM_DQ<47> RAM_DQ_R<111> RP3809 1 8 15 RAM_DQ<111> RAM_DQS<0>
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS0 RAM_CAD I246
RAM_DQ_R<46> RP3811 1 8 15 RAM_DQ<46> RAM_DQ_R<106> RP3809 3 6 15 RAM_DQ<106> RAM_DQ<7..0>
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS0 RAM_CAD I248
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS1 RAM_CAD I251
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS1 RAM_CAD I252
38 37 RAM_DQ_R<45> RP3811 4 5 15 RAM_DQ<45> 38 40 44 38 37 RAM_DQ_R<107> RP3829 4 5 15 RAM_DQ<107> 38 40 45 RAM_DQS<2> RAM_DQS2 RAM_CAD
44 40 38 I253
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS2 RAM_CAD I254
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS3 RAM_CAD I255
RAM_DQ_R<44> RP3811 3 6 15 RAM_DQ<44> RAM_DQ_R<109> RP3829 1 8 15 RAM_DQ<109> RAM_DQ<31..24> RAM_DQS3
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_CAD I256
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS4 RAM_CAD I257
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS4 RAM_CAD I258
RAM_DQ_R<49> RP3830 1 8 15 RAM_DQ<49> RAM_DQ_R<117> RP3815 1 8 15 RAM_DQ<117> RAM_DQS<5> RAM_DQS5 RAM_CAD
38 37 38 40 44 38 37 38 40 45 44 40 38 I259
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS5 RAM_CAD I260
38 37 RAM_DQ_R<52> RP3812 2 7 15 RAM_DQ<52> 38 40 44 38 37 RAM_DQ_R<113> RP3815 3 6 15 RAM_DQ<113> 38 40 45 44 40 38 RAM_DQS<6> RAM_DQS6 RAM_CAD I261
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS6 RAM_CAD I262
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS7 RAM_CAD I263
38 37 38 40 44 38 37 38 40 45 44 40 38 RAM_DQS7 RAM_CAD I264
38 37 38 40 44 38 37 38 40 45 45 40 38 RAM_DQS8 RAM_CAD I267
38 37 38 40 44 38 37 38 40 45 45 40 38 RAM_DQS9 RAM_CAD I268
38 37 38 40 44 38 37 38 40 45 45 40 38 RAM_DQS10 RAM_CAD I270
RAM_DQ_R<60> RP3831 1 8 15 RAM_DQ<60> RAM_DQ_R<122> RP3810 4 5 15 RAM_DQ<122> RAM_DQ<87..80> RAM_DQS10 RAM_CAD
38 37 38 40 44 38 37 38 40 45 45 40 38 I269
38 37 38 40 44 38 37 38 40 45 45 40 38 RAM_DQS11 RAM_CAD
B 38 37 RAM_DQ_R<62> RP3813 4 5 15 RAM_DQ<62> 38 40 44 38 37 RAM_DQ_R<127> RP3810 3 6 15 RAM_DQ<127> 38 40 45 45 40 38 RAM_DQ<95..88> RAM_DQS11 RAM_CAD
I272
I271 B
45 40 38 RAM_DQS<12> RAM_DQS12 RAM_CAD I273
THE FOLLOWING IS A SWAPPABLE GROUP
RP3841 3 RAM_DQ<103..96> RAM_DQS12 RAM_CAD
38 37 RAM_CKE_R<4> 6 15 RAM_CKE<4> 38 40 45
45 40 38 I275
RP3841 4 THE FOLLOWING ARE 0402 5% RESISTORS 45 40 38 RAM_DQS<13> RAM_DQS13 RAM_CAD
38 37 RAM_CKE_R<5> 5 15 RAM_CKE<5> 38 40 45
I274
RP3841 45 40 38 RAM_DQ<111..104> RAM_DQS13 RAM_CAD
38 37 RAM_CKE_R<0> 2 7 15 RAM_CKE<0> 38 40 44
R3816
I277
RP3841 1 8 15 38 37 RAM_CLK_A_P_R 1 2 15 RAM_CLK_A_P 38 40 45 40 38 RAM_DQS<14> RAM_DQS14 RAM_CAD I276
38 37 RAM_CKE_R<1> RAM_CKE<1> 38 40 44
R3817
38 37 RAM_CLK_A_N_R 1 2 15 RAM_CLK_A_N 38 40 45 40 38 RAM_DQ<119..112> RAM_DQS14 RAM_CAD I278
RAM_CS_L_R<8> RP3842 1 8 15 RAM_CS_L<8> RAM_CLK_B_P_R R3818 1 2 15 RAM_CLK_B_P RAM_DQS<15>
38 37 38 40 45 38 37 38 40 45 40 38 RAM_DQS15 RAM_CAD I280
RAM_CS_L_R<9> RP3842 2 7 15 RAM_CS_L<9> RAM_CLK_B_N_R R3819 1 2 15 RAM_CLK_B_N RAM_DQ<127..120>
38 37 38 40 45 38 37 38 40 45 40 38 RAM_DQS15 RAM_CAD I279
RAM_CS_L_R<1> RP3842 3 6 15 RAM_CS_L<1> RAM_CLK_C_P_R R3820 1 2 15 RAM_CLK_C_P
38 37 38 40 44 38 37 38 40
RAM_CS_L_R<0> RP3842 4 5 15 RAM_CS_L<0> RAM_CLK_C_N_R R3821 1 2 15 RAM_CLK_C_N RAM_A_R<13..0>

38 37 38 40 44 38 37 38 40 38 37 RAM_CAD I295
38 37 RAM_CLK_D_P_R R3822 1 2 15 RAM_CLK_D_P 38 40 38 37 RAM_BA_R<1..0> RAM_CAD I296
THE FOLLOWING IS A SWAPPABLE GROUP 38 37 RAM_CLK_D_N_R R3823 1 2 15 RAM_CLK_D_N 38 40 38 37 RAM_RAS_L_R RAM_CAD I297
RAM_A_R<11> RP3832 3 6 15 RAM_A<11> RAM_CLK_E_P_R R3824 1 2 15 RAM_CLK_E_P RAM_CAS_L_R
38 37 38 40 44 38 37 38 40 38 37 RAM_CAD I298
38 37 RAM_A_R<1> RP3832 4 5 15 RAM_A<1> 38 40 44 38 37 RAM_CLK_E_N_R R3825 1 2 15 RAM_CLK_E_N 38 40 38 37 RAM_WE_L_R RAM_CAD I299
RAM_A_R<10> RP3832 2 7 15 RAM_A<10> RAM_CLK_F_P_R R3826 1 2 15 RAM_CLK_F_P RAM_A<13..0>
38 37 38 40 45 38 37 38 40 45 44 40 38 RAM_A_CTL RAM_CAD I300
RAM_WE_L_R RP3800 4 5 15 RAM_WE_L RAM_CLK_F_N_R R3827 1 2 15 RAM_CLK_F_N RAM_BA<1..0>
38 37 38 40 45 38 37 38 40 45 40 38 RAM_A_CTL RAM_CAD I304
38 37 RAM_A_R<4> RP3833 3 6 15 RAM_A<4> 38 40 44 45 40 38 RAM_RAS_L RAM_A_CTL RAM_CAD I303
RAM_A_R<6> RP3833 2 7 15 RAM_A<6> RAM_CAS_L
38 37 38 40 44 45 40 38 RAM_A_CTL RAM_CAD I302
RAM_A_R<7> RP3833 1 8 15 RAM_A<7> RAM_DQS_R<0> R3800 1 2 15 RAM_DQS<0> RAM_WE_L
38 37 38 40 44 38 37 38 40 44 45 40 38 RAM_A_CTL RAM_CAD I301
RP3834 1 8 15 38 37 RAM_DQS_R<1> R3801 1 2 15 RAM_DQS<1> 38 40 44
RAM_A_R<12> RP3800 3 6 15 RAM_A<12> RAM_DQS_R<2> R3802 1 2 15 RAM_DQS<2>

38 37 38 40 44 38 37 38 40 44

38 37 38 40 44 38 37 38 40 44
RAM_A_R<0> RP3833 4 5 15 RAM_A<0> RAM_DQS_R<4> R3804 1 2 15 RAM_DQS<4> RAM_CLK PRIMARY SPACING SET TO 5MIL
38 37 38 40 44 38 37 38 40 44

38 37 38 40 44 38 37 38 40 44 RAM_CLK LINE-LINE SPACING SET TO 15MIL
A 38 37
38 37 RAM_A_R<3> RP3800 1 8 15 RAM_A<3>

38 40 44
38 40 44
38 37
38 37 RAM_DQS_R<7> R3807 1 2 15 RAM_DQS<7>

38 40 44
38 40 44
TOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL

A
38 37 RAM_DQS_R<8> R3808 1 2 15 RAM_DQS<8> 38 40 45
RAM_CAS_L_R RP3804 1 8 15 RAM_CAS_L RAM_DQS_R<9> R3809 1 2 15 RAM_DQS<9>

38 37 38 40 45 38 37 38 40 45
RAM_BA_R<0> RP3804 4 5 15 RAM_BA<0> RAM_DQS_R<10> R3810 1 2 15 RAM_DQS<10>

38 37 38 40 45 38 37 38 40 45
38 37 RAM_DQS_R<11> R3811 1 2 15 RAM_DQS<11> 38 40 45
38 37 RAM_BA_R<1> RP3804 2 7 15 RAM_BA<1> RAM_DQS_R<12> R3812 1 2 15 RAM_DQS<12>

38 40 45 38 37 38 40 45
RAM_RAS_L_R RP3804 3 6 15 RAM_RAS_L RAM_DQS_R<13> R3813 1 2 15 RAM_DQS<13>

38 37 38 40 45 38 37 38 40 45
38 37 RAM_A_R<9> RP3834 3 6 15 RAM_A<9> RAM_DQS_R<14> R3814 1 2 15 RAM_DQS<14>

38 40 44 38 37 38 40 45
38 37 RAM_A_R<8> RP3834 4 5 15 RAM_A<8> 38 40 44 38 37 RAM_DQS_R<15> R3815 1 2 15 RAM_DQS<15> 38 40 45
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J4000 J4001
DDR-DIMM
PIN 82:
40 7 PP2V5_PWRON_RAM DDR-DIMM PP2V5_PWRON_RAM 7 40
40 7 PP2V5_PWRON_RAM PP2V5_PWRON_RAM 7 40 NC: VDD & VDDQ ARE THE SAME F-30DEG-TH PP2V5_PWRON_RAM 7 40
F-30DEG-TH 185
185 516-0032 GND: VDD & VDDQ ARE DIFFERENT
1
BOT SIDE SYM_VER1 TOP SIDE 40 PP1V25_RAM_VREF_DIMM 1 BOT SIDE SYM_VER1 TOP SIDE
93 R4008
40 PP1V25_RAM_VREF_DIMM 1 93 VREF SX64 DIMM VSS 150
VREF SX64 DIMM VSS 45 38 RAM_DQ<75> 2 94 RAM_DQ<74> 38 45 1%
44 38 RAM_DQ<14> 2 94 RAM_DQ<11> 38 44
DQ0 OMIT DQ4 1/16W
DQ0 OMIT DQ4 3 95 RAM_DQ<72> 38 45 MF
3 95 RAM_DQ<13> VSS DQ5
VSS DQ5 38 44
45 38 RAM_DQ<79> 4 96 2 402
44 38 RAM_DQ<10> 4 96 DQ1 VDDQ PP1V25_RAM_VREF_DIMM 40
DQ1 VDDQ 45 38 RAM_DQS<9> 5 97 MIN_LINE_WIDTH=25MIL
44 38 RAM_DQS<1> 5 97 DQS0 DM0/DQS9 MIN_NECK_WIDTH=10MIL
DQS0 DM0/DQS9 45 38 RAM_DQ<73> 6 98 RAM_DQ<76> 38 45
44 38 RAM_DQ<9> 6 98 RAM_DQ<8> 38 44
DQ2 DQ6 1 C4035 R40101
DQ2 DQ6 7 99 RAM_DQ<78>
7 99 RAM_DQ<12> 38 44
VDD DQ7 38 45
1UF 150
VDD DQ7 45 38 RAM_DQ<77> 8 100 10% 1%
44 38 RAM_DQ<15> 8 100 DQ3 VSS 6.3V
2 CERM 1/16W
D NC 9
10
DQ3
NC
VSS
NC
101 NC
102 NC 6 TP_J4001_SJRESET_L
NC 9
10
NC
NC
NC
NC
101 NC
102 NC
603 MF
2 402
D
6 TP_J4000_SJRESET_L NC NC 11 103
VSS A13 RAM_A<13> 38 40 44
11 103 RAM_A<13> 38 40 44
VSS A13 45 38 RAM_DQ<66> 12 104
44 38 RAM_DQ<2> 12 104 DQ8 VDDQ
DQ8 VDDQ 45 38 RAM_DQ<67> 13 105 RAM_DQ<65> 38 45
44 38 RAM_DQ<0> 13 105 RAM_DQ<3> 38 44
DQ9 DQ12
DQ9 DQ12 45 38 RAM_DQS<8> 14 106 RAM_DQ<64> 38 45
44 38 RAM_DQS<0> 14 106 RAM_DQ<7> 38 44
DQS1 DQ13
DQS1 DQ13 15 107
15 107 VDDQ DM1/DQS10
VDDQ DM1/DQS10 38 RAM_CLK_F_P 16 108
38 RAM_CLK_A_P 16 108 CK1 VDD
CK1 VDD 38 RAM_CLK_F_N 17 109 RAM_DQ<69> 38 45
38 RAM_CLK_A_N 17 109 RAM_DQ<1> 38 44
CK1* DQ14
CK1* DQ14 18 110 RAM_DQ<68> 38 45
18 110 RAM_DQ<4> 38 44
VSS DQ15
VSS DQ15 45 38 RAM_DQ<71> 19 111 RAM_CKE<5> 38 45
44 38 RAM_DQ<6> 19 111 RAM_CKE<1> 38 44
DQ10 CKE1
DQ10 CKE1 45 38 RAM_DQ<70> 20 112
44 38 RAM_DQ<5> 20 112 PP2V5_PWRON_RAM 7 40
DQ11 VDDQ PP2V5_PWRON_RAM 7 40
DQ11 VDDQ 45 38 RAM_CKE<4> 21 113 NC
44 38 RAM_CKE<0> 21 113 NC CKE0 BA2
CKE0 BA2 22 114 RAM_DQ<81> 38 45
22 114 RAM_DQ<17> VDDQ DQ20
RAM_DQ<19> 23
VDDQ DQ20
115 RAM_A<12>
38 44
1 C4036 45 38 RAM_DQ<83> 23
DQ16 A12
115 RAM_A<12> 38 40 44
1 C4008
44 38 DQ16 A12 38 40 44
10UF 45 38 RAM_DQ<80> 24 116 10UF
44 38 RAM_DQ<18> 24 116 20% DQ17 VSS 20%
DQ17 VSS 6.3V
2 CERM 45 38 RAM_DQS<10> 25 117 RAM_DQ<86> 38 45
6.3V
2 CERM
44 38 RAM_DQS<2> 25 117 RAM_DQ<22> 38 44
DQS2 DQ21
DQS2 DQ21 1206 26 118 RAM_A<11> 38 40 44
1206
26 118 RAM_A<11> 38 40 44
VSS A11
VSS A11 44 40 38 RAM_A<9> 27 119
44 40 38 RAM_A<9> 27 119 A9 DM2/DQS11
RAM_DQ<23> 28
A9 DM2/DQS11
120
1 C4039 1 C4037 1 C4023 45 38 RAM_DQ<82> 28
DQ18 VDD
120 1 C4011 1 C4010 1 C4009
44 38
DQ18 VDD 1UF 1UF 1UF 44 40 38 RAM_A<7> 29 121 RAM_DQ<85> 38 45
1UF 0.1UF 1UF
44 40 38 RAM_A<7> 29 121 RAM_DQ<21> 38 44
10% 10% 10% A7 DQ22 10% 20% 10%
30
A7 DQ22
122 2 6.3V
CERM 2 6.3V
CERM 2 6.3V
CERM
30
VDDQ A8
122 RAM_A<8> 38 40 44
6.3V
2 CERM
10V
2 CERM
6.3V
2 CERM
VDDQ A8 RAM_A<8> 38 40 44
402 402 402 31 123 402 402 402
45 38 RAM_DQ<87> DQ19 DQ23 RAM_DQ<84> 38 45
44 38 RAM_DQ<16> 31 123 RAM_DQ<20> 38 44
DQ19 DQ23 44 40 38 RAM_A<5> 32 124
44 40 38 RAM_A<5> 32 124 A5 VSS
A5 VSS 1 C4040 1 C4038 1 C4024 45 38 RAM_DQ<90> 33 125 RAM_A<6> 38 40 44
1 C4014 1 C4012 1 C4033
RAM_DQ<27> 33 125 RAM_A<6> DQ24 A6
44 38 DQ24 A6 38 40 44
0.1UF 0.1UF 0.1UF 34 126 RAM_DQ<91> 38 45
0.1UF 1UF 1UF
34 126 RAM_DQ<26> 38 44
20% 20% 20% VSS DQ28 20% 10% 10%
VSS DQ28 10V
2 CERM 2 10V 10V
2 CERM 45 38 RAM_DQ<89> 35 127 RAM_DQ<93> 38 45
10V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
35 127 CERM DQ25 DQ29
C 44 38
44 38
RAM_DQ<29>
RAM_DQS<3> 36
DQ25
DQS3 VDDQ
DQ29
128
RAM_DQ<25> 38 44 402 402 402 45 38
44 40 38
RAM_DQS<11>
RAM_A<4>
36
37
DQS3 VDDQ
128
129
402 402 402
C
44 40 38 RAM_A<4> 37 129 A4 DM3/DQS12
A4 DM3/DQS12 1 C4044 1 C4041 1 C4025 38 130 RAM_A<3> 38 40 44
1 C4000 1 C4013 1 C4042
38 130 RAM_A<3> VDD A3
VDD A3 38 40 44
0.1UF 0.1UF 1UF 45 38 RAM_DQ<88> 39 131 RAM_DQ<92> 38 45
0.1UF 0.1UF 0.1UF
44 38 RAM_DQ<31> 39 131 RAM_DQ<24> 38 44
20% 20% 10% DQ26 DQ30 20% 20% 20%
40
DQ26 DQ30
132 2 10V
CERM 2 10V
CERM 2 6.3V
CERM 45 38 RAM_DQ<94> 40
DQ27 VSS
132 2 10V
CERM
10V
2 CERM 10V
2 CERM
44 38 RAM_DQ<28> DQ27 VSS 402 402 402 41 402 402 402
44 40 38 RAM_A<2> 133 RAM_DQ<95> 38 45
44 40 38 RAM_A<2> 41 133 RAM_DQ<30> 38 44
A2 DQ31
A2 DQ31 42 134 NC
42 134 NC VSS NC
VSS NC 1 C4045 1 C4043 1 C4026 44 40 38 RAM_A<1> 43 135 NC 1 C4020 1 C4015 1 C4001
RAM_A<1> 43 135 NC A1 NC
44 40 38 A1 NC 1UF 1UF 0.1UF NC 44 136 0.1UF 0.1UF 0.1UF
NC 44 136 10% 10% 20% NC VDDQ 20% 20% 20%
NC VDDQ 2 6.3V
CERM 2 6.3V
CERM
10V
2 CERM NC 45 NC CK0
137 RAM_CLK_D_P 38 2 10V
CERM
10V
2 CERM 2 10V
CERM
NC 45 NC CK0
137 RAM_CLK_C_P 38 402 402 402 46 138 402 402 402
46 138 VDD CKO* RAM_CLK_D_N 38
VDD CKO* RAM_CLK_C_N 38
NC 47 139
NC 47 139 NC VSS
RAM_A<0> 48
NC VSS
140 NC
1 C4048 1 C4046 1 C4029 44 40 38 RAM_A<0> 48
A0 NC
140 NC 1 C4017 1 C4016 1 C4027
44 40 38 A0 NC 1UF 0.1UF 0.1UF NC 49 141 RAM_A<10> 38 40 45
0.1UF 0.1UF 1UF
NC 49 141 RAM_A<10> 38 40 45
10% 20% 20% NC A10 20% 20% 10%
50
NC A10
142 NC 2 6.3V
CERM
10V
2 CERM 10V
2 CERM 50
VSS NC
142 NC 2 10V
CERM
10V
2 CERM 2 6.3V
CERM
VSS NC 402 402 402 NC 51 143 402 402 402
NC 51 143 NC VDDQ
NC VDDQ 45 40 38 RAM_BA<1> 52 144 NC
45 40 38 RAM_BA<1> 52 144 NC BA1 NC
BA1 NC 1 C4031 1 C4047 1 C4030 RAM_DQ<98> 53 145
1 C4019 1 C4051 1 C4004
44 38 RAM_DQ<34> 53 145 0.1UF 0.1UF 1UF 45 38 DQ32 VSS 1UF 1UF 1UF
DQ32 VSS 20% 20% 10% 54 146 RAM_DQ<96> 38 45
10% 10% 10%
54 146 RAM_DQ<35> 38 44 2 CERM
10V 10V
2 CERM
6.3V
2 CERM
VDDQ DQ36 6.3V
2 CERM
6.3V
2 CERM
6.3V
2 CERM
VDDQ DQ36 45 38 RAM_DQ<103> 55 147 RAM_DQ<97> 38 45
44 38 RAM_DQ<37> 55 147 RAM_DQ<33> 38 44
402 402 402 DQ33 DQ37 402 402 402
DQ33 DQ37 45 38 RAM_DQS<12> 56 148
44 38 RAM_DQS<4> 56 148 DQS4 VDD
DQS4 VDD 45 38 RAM_DQ<101> 57 149
44 38 RAM_DQ<38> 57 149 1 C4050 1 C4049 1 C4032 DQ34 DM4/DQS13 1 C4021 1 C4018 1 C4005
DQ34 DM4/DQS13 58 150 RAM_DQ<99>
58 150 RAM_DQ<36> 38 44
1UF 1UF 0.1UF VSS DQ38 38 45
1UF 1UF 0.1UF
VSS DQ38 10% 10% 20% RAM_BA<0> 59 151 RAM_DQ<100> 10% 10% 20%
2 6.3V 6.3V 10V 45 40 38 BA0 DQ39 38 45 6.3V 6.3V 10V
45 40 38 RAM_BA<0> 59 151 RAM_DQ<39> 38 44 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
BA0 DQ39 CERM 45 38 RAM_DQ<102> 60 152
44 38 RAM_DQ<32> 60 152 402 402 402 DQ35 VSS 402 402 402
DQ35 VSS 45 38 RAM_DQ<106> 61 153 RAM_DQ<104> 38 45
B 44 38 RAM_DQ<61> 61
62
DQ40
VDDQ
DQ44
RAS*
153
154
RAM_DQ<60>
RAM_RAS_L
38 44
38 40 45
1 C4028 1 C4022
62
63
DQ40
VDDQ
DQ44
RAS*
154
155
RAM_RAS_L 38 40 45
1 C4052 1 C4002 1 C4003
B
63 155 1UF 0.1UF 45 40 38 RAM_WE_L WE* DQ45 RAM_DQ<105> 38 45
0.1UF 0.1UF 1UF
45 40 38 RAM_WE_L WE* DQ45 RAM_DQ<63> 38 44
10% 20% 64 156 20% 20% 10%
RAM_DQ<111>
2 6.3V 2 10V
45 38 DQ41 VDDQ 10V 10V 6.3V
44 38 RAM_DQ<57> 64 156 2 CERM 2 CERM 2 CERM
DQ41 VDDQ CERM CERM 45 40 38 RAM_CAS_L 65 157 RAM_CS_L<8> 38 45
45 40 38 RAM_CAS_L 65 157 RAM_CS_L<0> 38 44
402 402 CAS* S0* 402 402 402
CAS* S0* 66 158 RAM_CS_L<9> 38 45
66 158 RAM_CS_L<1> 38 44
VSS S1*
VSS S1* 45 38 RAM_DQS<13> 67 159
44 38 RAM_DQS<7> 67 159 DQS5 DM5/DQS14
DQS5 DM5/DQS14 45 38 RAM_DQ<107> 68 160
44 38 RAM_DQ<59> 68 160 DQ42 VSS
DQ42 VSS 45 38 RAM_DQ<110> 69 161 RAM_DQ<108> 38 45
44 38 RAM_DQ<56> 69 161 RAM_DQ<62> 38 44
DQ43 DQ46
DQ43 DQ46 70 162 RAM_DQ<109> 38 45
70 162 RAM_DQ<58> 38 44
VDD DQ47
VDD DQ47 NC 71 163 NC
NC 71 163 NC NC,S2* NC,S3*
NC,S2* NC,S3* 45 38 RAM_DQ<114> 72 164
44 38 RAM_DQ<43> 72 164 DQ48 VDDQ
DQ48 VDDQ 45 38 RAM_DQ<113> 73 165 RAM_DQ<112> 38 45
44 38 RAM_DQ<41> 73 165 RAM_DQ<40> 38 44
DQ49 DQ52
DQ49 DQ52 74 166 RAM_DQ<117> 38 45
74 166 RAM_DQ<42> 38 44
VSS DQ53
VSS DQ53 38 RAM_CLK_E_N 75 167 NC FETEN
38 RAM_CLK_B_N 75 167 NC FETEN CK2* NC,FETEN
CK2* NC,FETEN 38 RAM_CLK_E_P 76 168
38 RAM_CLK_B_P 76 168 CK2 VDD
CK2 VDD 77 169
77 169 VDDQ DM6/DQS15
VDDQ DM6/DQS15 45 38 RAM_DQS<14> 78 170 RAM_DQ<119> 38 45
44 38 RAM_DQS<5> 78 170 RAM_DQ<46> 38 44
DQS6 DQ54
DQS6 DQ54 45 38 RAM_DQ<115> 79 171 RAM_DQ<116> 38 45
44 38 RAM_DQ<47> 79 171 RAM_DQ<45> 38 44
DQ50 DQ55
DQ50 DQ55 45 38 RAM_DQ<118> 80 172
44 38 RAM_DQ<44> 80 172 DQ51 VDDQ
DQ51 VDDQ 81 173 NC
81 173 NC VSS NC
VSS NC NC 82 174 RAM_DQ<120> 38 45
NC 82 174 RAM_DQ<49> 38 44
VDDID DQ60
VDDID DQ60 45 38 RAM_DQ<124> 83 175 RAM_DQ<121> 38 45
44 38 RAM_DQ<50> 83 175 RAM_DQ<48> 38 44
DQ56 DQ61
DQ56 DQ61 45 38 RAM_DQ<125> 84 176
44 38 RAM_DQ<51> 84 176 DQ57 VSS
DQ57 VSS 85 177
85 177 VDD DM7/DQS16
VDD DM7/DQS16 45 38 RAM_DQS<15> 86 178 RAM_DQ<122> 38 45
44 38 RAM_DQS<6> 86 178 RAM_DQ<54> 38 44
DQS7 DQ62
DQS7 DQ62 RAM_DQ<127> 87 179 RAM_DQ<123>
A 44 38
44 38
RAM_DQ<53>
RAM_DQ<52>
87
88
DQ58 DQ63
179
180
RAM_DQ<55> 38 44
45 38
45 38 RAM_DQ<126> 88
DQ58
DQ59
DQ63
VDDQ
180
38 45
A
DQ59 VDDQ 89 181 SA0
89 181 SD_A_SA0 VSS SA0
VSS SA0 NC 90 182 SA1
NC 90 182 SA1 WP SA1
WP SA1 40 18 I2C_DIMM_SDA 91 183 SA2 SD_B_SA2
I2C_DIMM_SDA 91 183 SDA SA2
40 18
92
SDA SA2
184
SA2 R4014 40 18 I2C_DIMM_SCL 92
SCL VVDDSPD
184 R4006
40 18 I2C_DIMM_SCL SCL VVDDSPD 1
10K 2 1
10K 2
5% 186 5%
186 1/16W TABLE_5_HEAD
1/16W
MF PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION MF
ADDR=0(A0/A1) 402 402
TABLE_5_ITEM
ADDR=1(A2/A3)
516-0032 2 CONN,DDR DIMM 30 DEG J4000,J4001 17_INCH_LCD CRITICAL
V
TABLE_5_ITEM
V R’S ADJACENT TO V’S OR G’S

516-0067 2 CONN,DDR DIMM REVERSE 30 DEG J4000,J4001 20_INCH_LCD CRITICAL R V’S ADJACENT TO G’S FORBIDDEN
R
V
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
46 45 44 PP1V25_RAM_VTT
46 45 44 PP1V25_RAM_VTT 46 45 44 PP1V25_RAM_VTT
8 RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT
RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5 RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
RP4400 RP4400 RP4400 RP4400 RP4401 RP4401 RP4401 RP4401 1 C4400 1 C4412 RP4416 RP4416 RP4416 RP4416 RP4417 RP4417 RP4417 RP4417 1 C4407 1 C4414
1
R4400 1R4401 1R4402 1R4403 1R4404 1R4405 1R4406 1R4407 1 C4408 1 C4420
62 62 62 62 62 62 62 62 1UF 0.1UF
62 62 62 62 62 62 62 62 0.1UF 1UF 62 62 62 62 62 62 62 62 0.1UF 0.1UF 5% 5% 5% 5% 5% 5% 5% 5% 10% 20%
5% 5% 5% 5% 5% 5% 5% 5% 20%
10V
10%
6.3V
5% 5% 5% 5% 5% 5% 5% 5% 20%
10V
20%
10V 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V
CERM 2 10V
CERM
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 CERM 2 CERM 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 CERM 2 CERM MF MF MF MF MF MF MF MF
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 402 402
1 2 3 4 1 2 3 4 402 402 1 2 3 4 1 2 3 4 402 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402
40 38 RAM_DQS<0>
40 38 RAM_DQ<7> 40 38 RAM_DQ<33>
40 38 RAM_DQS<1>
40 38 RAM_DQ<0> 40 38 RAM_DQ<37>
40 38 RAM_DQS<2>
40 38 RAM_DQ<3> 40 38 RAM_DQ<35>
D 40 38 RAM_DQ<2> 40 38 RAM_DQ<34>
40 38
40 38
RAM_DQS<3>
RAM_DQS<4>
D
40 38 RAM_DQ<5> 40 38 RAM_DQ<32>
40 38 RAM_DQS<5>
40 38 RAM_DQ<4> 40 38 RAM_DQ<39>
40 38 RAM_DQS<6>
40 38 RAM_DQ<1> 40 38 RAM_DQ<36>
40 38 RAM_DQS<7>
40 38 RAM_DQ<6> 40 38 RAM_DQ<38>
PP1V25_RAM_VTT 46 45 44 7 PP2V5_RUN_RAM
46 45 44 PP1V25_RAM_VTT 46 45 44
8 7 6 5 8 7 6 5
8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6
RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
RP4404 RP4404 RP4404 RP4404 RP4405 RP4405 RP4405 RP4405 1 C4401 1 C4413 RP4420 RP4420 RP4420 RP4420 RP4421 RP4421 RP4421 RP4421 1 C4406 1 C4415 RP4437 RP4437 RP4437 RP4437 RP4436 RP4436 RP4436 RP4436 1 C4409 1 C4421
150 150 150 150 150 150 150 150 1UF 0.1UF
62 62 62 62 62 62 62 62 1UF 1UF 62 62 62 62 62 62 62 62 1UF 0.1UF 5% 5% 5% 5% 5% 5% 5% 5% 10% 20%
5% 5% 5% 5% 5% 5% 5% 5% 10% 10% 5% 5% 5% 5% 5% 5% 5% 5% 10% 20% 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V 2 10V
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V
CERM 2 6.3V
CERM
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V
CERM 2 10V
CERM
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 CERM
402
CERM
402
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 1 2 3 4 1 2 3 4
402 402 402 402
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
40 38 RAM_A<0>
40 38 RAM_DQ<10> 40 38 RAM_DQ<43>
40 38 RAM_A<1>
40 38 RAM_DQ<13> 40 38 RAM_DQ<42>
40 38 RAM_A<2>
40 38 RAM_DQ<11> 40 38 RAM_DQ<40>
40 38 RAM_A<3>
40 38 RAM_DQ<14> 40 38 RAM_DQ<41>
40 38 RAM_A<4>
C 40 38
40 38
RAM_DQ<15>
RAM_DQ<12>
40 38
40 38
RAM_DQ<44>
RAM_DQ<45>
40 38
40 38
RAM_A<6>
RAM_A<5>
C
40 38 RAM_DQ<8> 40 38 RAM_DQ<47>
40 38 RAM_A<7>
40 38 RAM_DQ<9> 40 38 RAM_DQ<46>
8 7 6 5 8 7 6 5
RP4438 RP4438 RP4438 RP4438 RP4439 RP4439 RP4439 RP4439

150 150 150 150 150 150 150 150
5% 5% 5% 5% 5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1
1 2 3 4 1 2 3 4
46 45 44 7 PP2V5_RUN_RAM
8 7 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5

RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
RAM_VTT RAM_VTT 8 7 6 5
RP4408 RP4408 RP4408 RP4408 RP4409 RP4409 RP4409 RP4409 1 C4402 1 C4416 RP4424 RP4424 RP4424 RP4424 RP4425 RP4425 RP4425 RP4425 1 C4405 1 C4419 RP4441 RP4441 RP4441 RP4441 R4416
1 1
R4417 1 C4410 1 C4422
62 62 62 62 62 62 62 62 0.1UF 0.1UF 62 62 62 62 62 62 62 62 1UF 1UF 150 150
5% 5% 5% 5% 5% 5% 5% 5% 20% 20% 5% 5% 5% 5% 5% 5% 5% 5% 10% 10% 150 150 150 150 5% 5%
0.1UF 1UF
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 10V
CERM 2 10V
CERM
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V
CERM 2 6.3V
CERM
5% 5% 5% 5% 1/16W 1/16W
20%
10V
10%
6.3V
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 1/16W 1/16W 1/16W 1/16W MF MF 2 CERM 2 CERM
402 402 402 402 SM1 SM1 SM1 SM1
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 2 402 2 402 402 402
1 2 3 4
40 38 RAM_DQ<22> 40 38 RAM_DQ<51>
RP4441_NC
40 38 RAM_DQ<18> 40 38 RAM_DQ<48>
40 38 RAM_A<8>
40 38 RAM_DQ<19> 40 38 RAM_DQ<50>
40 38 RAM_A<9>
40 38 RAM_DQ<17> 40 38 RAM_DQ<49>
40 38 RAM_A<11>
40 38 RAM_DQ<20> 40 38 RAM_DQ<52>
40 38 RAM_A<12>
40 38 RAM_DQ<16> 40 38 RAM_DQ<55>
B 40 38 RAM_DQ<21> 40 38 RAM_DQ<53>
40 38 RAM_A<13>
B
40 38 RAM_DQ<23> 40 38 RAM_DQ<54>
8 7 6 5 1 1
R4420 R4421
RP4442 RP4442 RP4442 RP4442 150 150
150 150 150 150 5% 5%
1/16W 1/16W
5% 5% 5% 5% MF MF
1/16W 1/16W 1/16W 1/16W
SM1 SM1 SM1 SM1 2 402 2 402
1 2 3 4
46 45 44 PP1V25_RAM_VTT 46 45 44 PP1V25_RAM_VTT 46 45 44 PP1V25_RAM_VTT

PP2V5_RUN_RAM 7 44 45 46
8RAM_VTT 7RAM_VTT 6RAM_VTT RAM_VTT

5RAM_VTT 8 7RAM_VTT 6
RAM_VTT 5 RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT 1 1 1 1
RP4412 RP4412 RP4412 RP4412 RP4413 RP4413 RP4413 RP4413 1 C4403 1 C4417 RP4428 RP4428 RP4428 RP4428 RP4429 RP4429 RP4429 RP4429 1 C4404 1 C4418 R4408 R4409 R4410 R4411 1 C4411
62 62 62 62 62 62 62 62 0.1UF 1UF 62 62 62 62 62 62 62 62 0.1UF 0.1UF 62 62 150 150 0.1UF
20% 10% 20% 5% 5% 5% 5%
5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 20% 1/16W 1/16W 1/16W 1/16W
20%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 10V 6.3V 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 10V 10V 10V
2 CERM 2 CERM 2 CERM 2 CERM MF MF MF MF 2 CERM
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1
1 2 3 4 1 2 3 4
402 402
1 2 3 4 1 2 3 4
402 402 2 402 2 402 2 402 2 402 402
40 38 RAM_DQ<30> 40 38 RAM_DQ<58> 40 38 RAM_CKE<0>

40 38 RAM_DQ<28> 40 38 RAM_DQ<62> 40 38 RAM_CKE<1>
40 38 RAM_DQ<31> 40 38 RAM_DQ<56> 40 38 RAM_CS_L<0>
40 38 RAM_DQ<24> 40 38 RAM_DQ<59> 40 38 RAM_CS_L<1>
40 38 RAM_DQ<29> 40 38 RAM_DQ<57>
RAM_DQ<25> RAM_DQ<63>
A 40 38
40 38 RAM_DQ<26>
40 38
40 38 RAM_DQ<60>
1
R4412
4.7K
1
R4413
4.7K
1
R4414
150
1
R4415
150
A
40 38 RAM_DQ<27> 40 38 RAM_DQ<61> 5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W
MF MF MF MF
2 402 2 402
2 402
2 402
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
46 45 44 PP1V25_RAM_VTT
8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT RAM_VTT
8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
1
R4500 1R4501 1R4502 1R4503 1R4504 1R4505 1R4506 1R4507 1 C4508 1 C4518
62 62 62 62 62 62 62 62 1UF 0.1UF 62 62 62 62 62 62 62 62 1UF 1UF
5% 5% 5% 5% 5% 5% 5% 5% 10% 20% 62 62 62 62 62 62 62 62 0.1UF 1UF 5% 5% 5% 5% 5% 5% 5% 5% 10% 10%
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 6.3V 10V 5% 5% 5% 5% 5% 5% 5% 5% 20% 10% 6.3V 6.3V
2 CERM 2 CERM 10V 6.3V 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 CERM 2 CERM
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 CERM 2 CERM MF MF MF MF MF MF MF MF
1 2 3 4 1 2 3 4 402 402 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 402 402
1 2 3 4 1 2 3 4 402 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402 2 402
40 38 RAM_DQ<64> 40 38 RAM_DQS<8>
40 38 RAM_DQ<97>
RAM_DQ<67> RAM_DQS<9>
40 38 RAM_DQ<103>
40 38 RAM_DQ<65> 40 38 RAM_DQS<10>
D 40 38 RAM_DQ<66>
40 38
40 38
RAM_DQ<96>
RAM_DQ<98>
40 38 RAM_DQS<11> D
40 38 RAM_DQ<70> 40 38 RAM_DQS<12>
40 38 RAM_DQ<102>
40 38 RAM_DQ<71> 40 38 RAM_DQS<13>
40 38 RAM_DQ<100>
40 38 RAM_DQ<68> 40 38 RAM_DQS<14>
40 38 RAM_DQ<99>
40 38 RAM_DQ<69> 40 38 RAM_DQS<15>
40 38 RAM_DQ<101>
40 38
40 38
46 45 44 PP1V25_RAM_VTT
46 45 44 PP1V25_RAM_VTT
8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
62 62 62 62 62 62 62 62 0.1UF 0.1UF
5% 5% 5% 5% 5% 5% 5% 5% 20% 20% 62 62 62 62 62 62 62 62 1UF 1UF
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 10V
CERM 2 10V
CERM
5% 5% 5% 5% 5% 5% 5% 5% 10%
6.3V
10%
6.3V
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 CERM 2 CERM
402 402 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1
1 2 3 4 1 2 3 4 402 402
1 2 3 4 1 2 3 4
40 38 RAM_DQ<79>
40 38 RAM_DQ<111>
40 38 RAM_DQ<72>
40 38 RAM_DQ<105>
40 38 RAM_DQ<74>
40 38 RAM_DQ<106>
40 38 RAM_DQ<75>
40 38 RAM_DQ<104>
C 40 38
40 38
RAM_DQ<77>
RAM_DQ<78>
40 38
40 38
RAM_DQ<109>
RAM_DQ<108>
C
40 38 RAM_DQ<76>
40 38 RAM_DQ<110>
40 38 RAM_DQ<73>
40 38 RAM_DQ<107>
1 C4509 1 C4519
0.1UF 1UF
20% 10%
10V 6.3V
2 CERM 2 CERM
402 402
46 45 44 PP1V25_RAM_VTT
46 45 44 PP1V25_RAM_VTT
46 45 44 PP1V25_RAM_VTT
46 44 7 PP2V5_RUN_RAM
8 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
RP4508 RP4508 RP4508 RP4508 RP4509 RP4509 RP4509 RP4509 1 C4502 1 C4514 RP4524 RP4524 RP4524 RP4524 RP4525 RP4525 RP4525 RP4525 1 C4505 1 C4516 RAM_VTT RAM_VTT
62 62 62 62 62 62 62 62 1UF 1UF 7 6 7 6 7 6 7 6
5% 5% 5% 5% 5% 5% 5% 5% 10% 10% 62 62 62 62 62 62 62 62 1UF 0.1UF 1
R4508 1
R4509
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 6.3V
CERM 2 6.3V
CERM
5% 5% 5% 5% 5% 5% 5% 5% 10%
6.3V
20%
10V RP4530 RP4530 RP4531 RP4531 RP4532 RP4532 RP4533 RP4533
402 402
1/16W
SM1
1/16W
SM1
1/16W
SM1
1/16W
SM1
1/16W
SM1
1/16W
SM1
1/16W
SM1
1/16W
SM1
2 CERM 2 CERM 150 150 150 150 150 150 150 150 62 62
1 2 3 4 1 2 3 4 402 402 5% 5%
1 2 3 4 1 2 3 4 5% 5% 5% 5% 5% 5% 5% 5% 1/16W 1/16W
40 38 RAM_DQ<84> 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W MF MF
RAM_DQ<117> SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1
40 38 RAM_DQ<87>
40 38
2 3 2 3 2 3 2 3 2 402 2 402
40 38 RAM_DQ<112>
40 38 RAM_DQ<85>
40 38 RAM_DQ<113> 40 38 RAM_RAS_L
40 38 RAM_DQ<82>
40 38 RAM_DQ<114> 40 38 RAM_BA<0>
40 38 RAM_DQ<86>
40 38 RAM_DQ<118> 40 38 RAM_CAS_L
40 38 RAM_DQ<80>
B 40 38 RAM_DQ<83>
40 38
40 38
RAM_DQ<116>
RAM_DQ<115>
40 38
40 38
RAM_WE_L
RAM_CS_L<9>
B
40 38 RAM_DQ<81>
40 38 RAM_DQ<119> 40 38 RAM_CS_L<8>
40 38 RAM_BA<1>
40 38 RAM_A<10>
40 38 RAM_CKE<4>
40 38 RAM_CKE<5>
1 4 1 4 1 4 1 4
1
RP4530
150
RP4530
150
RP4531
150
RP4531
150
RP4532
150
RP4532
150
RP4533
150
RP4533
150
R4510 1R4511
5% 5% 5% 5% 5% 5% 5% 5% 4.7K 4.7K
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 5% 5%
SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1 1/16W 1/16W
MF MF
8 5 8 5 8 5 8 5 2 402 2 402
46 45 44 PP1V25_RAM_VTT
46 45 44 PP1V25_RAM_VTT
8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT 8RAM_VTT 7RAM_VTT 6RAM_VTT 5RAM_VTT RAM_VTT RAM_VTT
62 62 62 62 62 62 62 62 0.1UF 1UF
5% 5% 5% 5% 5% 5% 5% 5% 20% 10% 62 62 62 62 62 62 62 62 0.1UF 1UF
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 10V 6.3V 5% 5% 5% 5% 5% 5% 5% 5% 20% 10%
2 CERM 2 CERM
402 402
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 2 10V
CERM 2 6.3V
CERM
1 2 3 4 1 2 3 4 SM1 SM1 SM1 SM1 SM1 SM1 SM1 SM1
402 402
1 2 3 4 1 2 3 4
40 38 RAM_DQ<95>
40 38 RAM_DQ<126>
40 38 RAM_DQ<94>
40 38 RAM_DQ<123>
40 38 RAM_DQ<92>
40 38 RAM_DQ<127>
40 38 RAM_DQ<88>
40 38 RAM_DQ<122>
40 38 RAM_DQ<93>
40 38 RAM_DQ<125>
RAM_DQ<89>
A 40 38
40 38 RAM_DQ<91>
40 38
40 38
RAM_DQ<124>
RAM_DQ<121>
A
40 38 RAM_DQ<90>
40 38 RAM_DQ<120>
8
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D D
45 44 7 PP2V5_RUN_RAM
NOSTUFF RAM_VTT RAM_VTT

1
R4603
1
C4610
1
C4601 10UF PP1V25_RAM_VTT
0.1UF 10K 20%
44 45
10%
5% 6.3V MIN_LINE_WIDTH=25MIL
1/16W 2 MIN_NECK_WIDTH=10MIL
2
16V CERM
2 X7R MF 805 VOLTAGE=1.25V
402
VDD 603 2
U4700_REFOUT 5 REFOUT VTT 1

RAM_VTT
1
C4606 SHTDWN 4 VR4700_SHTDWN RAM_VTT NOSTUFF
0.1UF
10%
1
C4609 1
C4608
2
16V 220UF 10UF
X7R
603
VSS VSS 20% 20%
6.3V
2 2V
3
U4700 TANT
2 CERM
7343 1206
NE57811
SPAK-5
RAM_VTT
C C
R4610
1
0 2
3 TURN_ON_VTT
5%
1/16W
MF
402
3 NOSTUFF
D
Q4600
2N7002
1 SM
50 27 11 10 9 8 6 SYS_SLEEP G S
NOTE: U4700 PIN 4 IS LOW ACTIVE.
B B
A A
8
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49 48 AGP_CBE<1..0> AGP_AD_0 AGP_DATA

60 37 28 7 PP1V5_PWRON_NB_AVDD R4800 AGP_CBE<3..2>
I46
49 48 AGP_AD_1 AGP_DATA
1
4.99 2 PP1V5_PWRON_AGP_NB_AVDD
PP1V5_AGP 7 48 49
I48
1% MIN_NECK_WIDTH=10MIL 49 48 AGP_SB_STBF AGP_SB_STBS AGP_STROBE AGP_SB_STB I49
1/16W
MF 1 C4811 C4816 1 AGP_SB_STBS AGP_SB_STBS AGP_STROBE AGP_SB_STB
AG10
AC10
49 48 I50
402 2.2UF 0.01UF
AE6
AG4
AE2
AE7
AB4
Y11
W10
AGP_AD_STBF<0> AGP_AD_STB_0 AGP_STROBE AGP_AD_STB0
W2
W6
V9
49 48 I51
20% 20%
10V
2 CERM 16V
2 CERM 49 48 AGP_AD_STBS<0> AGP_AD_STB_0 AGP_STROBE AGP_AD_STB0 I52
805 402 AGP VDD_AGP 49 48 AGP_AD_STBF<1> AGP_AD_STB_1 AGP_STROBE AGP_AD_STB1
REFCLK_AVDD I53
OMIT
49 48 AGP_AD_STBS<1> AGP_AD_STB_1 AGP_STROBE AGP_AD_STB1 I54
U3 D
D 49 48 AGP_CBE<0> AG8 AGP_CBE0
AF8 AGP_CBE1
U3LITE
V1.0-300MM
AGP_AD0 AB11
AGP_AD1 AA11
AGP_AD<0>
AGP_AD<1>
48 49
48 49
49 48 AGP_DBI_LO AGP_AD_0 AGP_DATA I55
49 48 AGP_CBE<1> PBGA 49 48 AGP_DBI_HI AGP_AD_STB_1 AGP_DATA
AGP_AD2 AG11 AGP_AD<2> I56
48 49
(SYM 4 OF 7)
49 48 AGP_DBI_LO AA6 AGP_DBI_LO AGP_AD3 AH12 AGP_AD<3> 48 49
49 48 AGP_AD<15..0> AGP_AD_0 AGP_DATA
AGP_AD4 AC11 AGP_AD<4> I57
48 49
49 48 AGP_AD_STBF<0> AE8 AGP_AD_STBF0 49 48 AGP_AD<31..16> AGP_AD_1 AGP_DATA
AGP_AD5 AD11 AGP_AD<5> 48 49
I58
49 48 AGP_AD_STBS<0> AD8 AGP_AD_STBS0
AGP_AD6 AE11 AGP_AD<6> 48 49
AF11 49 48 AGP_SBA_L<7..0> AGP_SBA AGP_DATA I59
AGP_AD7 AGP_AD<7> 48 49
AGP_AD8 AH8 AGP_AD<8> 48 49
AGP_AD9 AH9 AGP_AD<9> 48 49
DBIHI AND DBILO AGP AGP_AD10 AH10 AGP_AD<10> 48 49 DBI_HI IS NOT A STROBE BUT SHARES THE SAME TOPOLOGY AS A STROBE
GROUPS WITH STROBE1 INTERFACE AGP_AD11 AH11 AGP_AD<11> 48 49
FOR CONSTRAINTS AGP_AD12 AG9 AGP_AD<12> 48 49
AGP_AD13 AF9 AGP_AD<13> 48 49
AGP_AD14 AE9 AGP_AD<14> 48 49
AGP_AD15 AD9 AGP_AD<15> 48 49
Y8 AGP_CBE2 AGP_AD16 Y4 AGP_AD<16> 48 49

49 48 AGP_CBE<2>
AGP_AD17 Y3 AGP_AD<17>
49 48 AGP_CBE<3> AA5 AGP_CBE3
AGP_AD18 Y6 AGP_AD<18>
48 49
48 49
LEVEL SHIFTER FOR U3LITE & NVIDIA AGP BUS.
49 48 AGP_DBI_HI AA4 AGP_DBI_HI AGP_AD19 Y5 AGP_AD<19> 48 49 AGP BUSY AND STOP NOT USED IN THIS DESIGN
AGP_AD20 AA1 AGP_AD<20> 48 49
49 48 AGP_AD_STBF<1> AA3 AGP_AD_STBF1
AGP_AD21 Y2 AGP_AD<21> 48 49
49 48 AGP_AD_STBS<1> AA2 AGP_AD_STBS1
AGP_AD22 Y1 AGP_AD<22> 48 49 59 58 57 56 52 51 50 49 48 7 PP3V3_AGP
AGP_AD23 Y7 AGP_AD<23> 48 49 49 48 7 PP1V5_AGP
AGP_AD24 V5 AGP_AD<24> 48 49
AGP_AD25 V6 AGP_AD<25> 48 49
C AGP_AD26 V4
V3
AGP_AD<26> 48 49 AGP_BUSYSTOP
1 1
C
AGP_AD27
V8
AGP_AD<27> 48 49
R4811 R4807
AGP_AD28 AGP_AD<28> 48 49
1
10K 10K
AGP_AD29 V7 AGP_AD<29> 48 49
R4812 5%
1/16W
5%
1/16W
W1 10K MF MF
AGP_AD30 AGP_AD<30> 48 49 5% 2 402 2 402
AA7 1/16W
AGP_AD31 AGP_AD<31> 48 49 MF NB_AGP_BUSY_L 48
2 402
AGP_BUSY_L_F
AGP_SBA0 AG2 AGP_SBA_L<0> 48 49

6 3
49 48 AGP_SB_STBF AD1 AGP_SB_STBF AGP_BUSYSTOP AGP_BUSYSTOP
AF3 AGP_SBA_L<1>
49 48 AGP_SB_STBS AE1 AGP_SB_STBS AGP_SBA1
AH1
48 49 D Q4801 D Q4801
AGP_SBA2 AGP_SBA_L<2> 48 49 2N7002DW 2N7002DW
SOT-363 SOT-363
AGP_SBA3 AG3 AGP_SBA_L<3> 48 49 49 AGP_BUSY_L 2 G S 5 G S
AGP_SBA4 AD2 AGP_SBA_L<4> 48 49
AF2 1 4
AGP_SBA5 AGP_SBA_L<5> 48 49
AGP_SBA6 AG1 AGP_SBA_L<6> 48 49
AGP_SBA7 AF1 AGP_SBA_L<7> 48 49
49 AGP_PAR AH7 AGP_PAR

AC4 AGP_ST0 AGP_REFCLK AH2 AGP_CLK66M_NB 27
49 AGP_ST<0>
49 AGP_ST<1> AC1 AGP_ST1
49 AGP_ST<2> AB1 AGP_ST2 AGP_BUSY* AC8 NB_AGP_BUSY_L 48
AGP_STP_AGP* AD4 NB_STOP_AGP_L 48

49 AGP_RBF AC6 AGP_RBF
49 AGP_WBF AD6 AGP_WBF
49 AGP_TRDY AH5 AGP_TRDY
PVTREF RESISTOR
U3LITE AGP I/O REFERENCE 59 58 57 56 52 51 50 49 48 7 PP3V3_AGP
49 AGP_IRDY AG6 AGP_IRDY (PLACE CLOSE TO GPU AGP BALL) 59 58 57 56 52 51 50 49 48 7 PP3V3_AGP
49 AGP_GNT AC3 AGP_GNT R4801
AGP_FRAME AH6 1
182 2 49 48 7 PP1V5_AGP
49 AGP_FRAME
B 49 AGP_DEVSEL AF6 AGP_DEVSEL 1%
1/16W
49 48 7 PP1V5_AGP 1
AGP_BUSYSTOP
R4808
1
R4810
10K
B
AGP_PVTREF1 AG5 AGP_PVTREF1 MF 1 5%
402 R4809 10K 1/16W
AGP_PVTREF2 AF5 AGP_PVTREF2 1 5% MF
49 AGP_REQ AB9 AGP_REQ R4802 10K
5%
1/16W
MF 2 402
AH4 AGP_STOP 3.32K 1/16W 2 402
49 AGP_STOP AGP_VREFCG AC5 TP_VREF_CG 6 1% MF STOP_AGP_L 49
1/16W 2 402
STOP_AGP_L_F
AGP_VREFGC AA9 AGP_VREF_GC 48 MF 3 AGP_BUSYSTOP
2 402 AGP_BUSYSTOP
AC9 AGP_TYPEDET 3
49 AGP_TYPEDET_L
AB8 AGP_GC_AGP8X_DET AGP_MB_AGP8X_DET AA8 TP_AGP_MB_AGP8X_DET_L 6
R4813 AGP_BUSYSTOP
D Q4803
49 NB_AGP_GCDET_L AGP_VREF_GC 1K 2N7002
48
48 NB_STOP_AGP_L 1 2 STOP_AGP_L_R 1 Q4802 1 G S
SM
1 5% 2N3904
AGP_REFCLK_AVSS NOSTUFF R4803 1 C4818 1/16W SM
AE5
MF
1 C4817 1.02K
1% 0.01UF 402
2 2
0.01UF
20% 1/16W 20%
16V
16V MF 2 CERM
2 CERM 2 402 402
402
PP1V5_AGP 7 48 49
A 1 C4800 1 C4801 1 C4802 1 C4803 1 C4804 1 C4805 1 C4806 1 C4807 1 C4808 1 C4810 1 C4812 1 C4813 1 C4814 1 C4815 A
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
0.1UF
20%
2 10V
CERM
10V
2 CERM 2 10V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
10V
2 CERM 10V
2 CERM 2 10V
CERM
10V
2 CERM 10V
2 CERM 10V
2 CERM 10V
2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402
8
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TABLE_5_HEAD
NVIDIA RECOMMENDS A WIDER RANGE OF CAP VALUES, EMC LIKES ONE VALUE
PP1V5_AGP
338S0155 1 IC,NV18B,GRAPHIC CTRL U4900 NV18B
TABLE_5_ITEM
49 48 7
OUTPUT DRIVER BYPASS
TABLE_5_ITEM
338S0113 1 IC,NV34,GRAPHIC CTRL U4900 NV34

U4900 C4912 C4911 C4904 C4905 C4906 C4913 C4907 C4908 C4909 C4910
NV18B 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
BGA 10% 10% 20% 20% 20% 20% 20% 20% 20% 20%
(1 OF 5) AE14 2
16V
2
16V
2
10V
2
10V
2
10V
2
10V
2
10V
2
10V
2
10V
2
10V
48 AGP_AD<0> AJ28 PCIAD0 CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
OMIT AE11 402 402 402 402 402 402 402 402 402 402
48 AGP_AD<1> AK28 PCIAD1 AE17
48 AGP_AD<2> AH27 PCIAD2 AE20
D 48 AGP_AD<3> AK27
AJ27
PCIAD3
AGPVDDQ AE23
D
48 AGP_AD<4> PCIAD4 AD11
48 AGP_AD<5> AH26 PCIAD5 AD14 58 50 PPVCORE_GPU CORE BYPASS
AGP_AD<6> AJ26 PCIAD6
48
AD23
48 AGP_AD<7> AH25 PCIAD7 AD20
48 AGP_AD<8> AH23 PCIAD8 C4914 C4915 C4916 C4917 C4918 C4919 C4920 C4921 C4922 C4923 C4924
AD17 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
48 AGP_AD<9> AJ23 PCIAD9
48 AGP_AD<10> AH22 PCIAD10 10% 10% 20% 20% 20% 20% 20% 20% 20% 20% 20%
16V 16V 10V 10V 10V 10V 10V 10V 10V 10V 10V
48 AGP_AD<11> AJ22 PCIAD11 2 2 2 2 2 2 2 2 2 2 2
AA17 CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
48 AGP_AD<12> AJ21 PCIAD12 402 402 402 402 402 402 402 402 402 402 402
AA18
48 AGP_AD<13> AK21 PCIAD13 L20
48 AGP_AD<14> AH20 PCIAD14 Y20
48 AGP_AD<15> AJ20 PCIAD15 L13
48 AGP_AD<16> AG26 PCIAD16 Y13
AGP_AD<17> AE24 PCIAD17
48
N20
48 AGP_AD<18> AG25 PCIAD18 P20
48 AGP_AD<19> AG24 PCIAD19 C4925 C4926 C4927 C4928 C4929 C4930 C4931 C4932
U20 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
AGP_AD<20> AF24 PCIAD20
48
V20
48 AGP_AD<21> AG23 PCIAD21 10% 10% 20% 20% 20% 20% 20% 20%
AE22 VDD L11 16V 16V 10V 10V 10V 10V 10V 10V
48 AGP_AD<22> PCIAD22 N11 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
48 AGP_AD<23> AF22 PCIAD23 402 402 402 402 402 402 402 402
P11
48 AGP_AD<24> AE21 PCIAD24 U11
48 AGP_AD<25> AG20 PCIAD25 V11
48 AGP_AD<26> AG19 PCIAD26 Y11
48 AGP_AD<27> AF19 PCIAD27 PP3V3_AGP
L14 59 58 57 56 52 51 50 49 48 7
48
Y14
AF18
C 48
48
AGP_AD<29>
AGP_AD<30> AG18
PCIAD29
PCIAD30
L17
Y17 1 C4961 1 C4960
2
C4902
10UF
2
C4900
10UF
2
C4903
10UF
2
C4901
10UF
C4933
1 0.1UF
C4934
1 0.1UF
C4935
1 0.1UF
NV34
L4901
C
48
L18 10UF 10UF 20% 20% 20% 20% 20% 20% 20%
1000-OHM-EMI
20% 20% 10V 10V 10V
AGP 2X,4X : AGP 8X Y18 2
6.3V
CERM 2
6.3V 1 6.3V 1 6.3V 1 6.3V 1 6.3V
CERM CERM CERM CERM CERM 1 2
48 AGP_CBE<0> AJ24 PCIC0/BE0* : C0*/BE0 805 805
805 805 805 805 402 402 402
SM
48 AGP_CBE<1> AH19 PCIC1/BE1* : C1*/BE1
48 AGP_CBE<2> AF25 PCIC2/BE2* : C2*/BE2
48 AGP_CBE<3> AG22 PCIC3/BE3* : C3*/BE3 AGP_PLLVDD VOLTAGE=3.3V
R4912 27 AGP_CLK66M_GPU AG12 PCICLK : CLK
NV34 NV34
1 C4956
NV34
1 C4955
PCI_RESET_L
0
NV_PCIRST_L AF15 PCIRST* PP3V3_AGP
1
C4959
77 76 75 74 51 6 1 2 : RST* 7 48 49 50 51 52 56 57 58 59
4.7UF 0.1UF 0.001UF
5% H6 20% 20% 10%
1/16W
AGP_GNT AE15 PCIGNT* AC6 2
6.3V
CERM 2 10V
CERM 2 50V
CERM
MF
402
48 : GNT 805 402 402
48 AGP_REQ AF13 PCIREQ* : REQ U7
G14
48 AGP_FRAME AK16 PCIFRAME* : FRAME U6
AGP_IRDY AG16 PCIIRDY* : IRDY AD15
48
AJ17 I/O BYPASS
PP3V3_AGP 7 48 49 50 51 52 56 57 58 59 48 AGP_TRDY PCITRDY* : TRDY VDD33 H7
48 AGP_DEVSEL AJ16 PCIDEVSEL* : DEVSEL AD16
48 AGP_STOP AH17 PCISTOP* : STOP AD19
R4908 48 AGP_PAR AK18 PCIPAR : PAR AD22 C4936
1 0.01UF
C4942
1 0.01UF
C4938
1 0.1UF
C4939
1 0.1UF
C4941
1 0.1UF
C4937
1 0.1UF
4.99K
1 2 AGP_INT_L AC7
25 49
10% 10% 20% 20% 20% 20%
1% 49 25 AGP_INT_L AG15 PCIINTA* : INTA AD12 16V 16V 10V 10V 10V 10V
1/16W
MF TP_GPU_INTB_L AE10 P24 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402
6 NC_PCIINTB*: INTB 402 402 402 402 402 402
48 AGP_RBF AG14 AGPRBF* : RBF
48 AGP_WBF AG17 AGPWBF* : WBF
AJ18
B 48
48
AGP_DBI_HI
AGP_DBI_LO AJ19
AGPPIPE*
<RESRVD>
:
:
DBI_HI
DBI_LO PP5V_AGP 7 50 59
B
48 AGP_ST<0> AG13 AGPST0 : ST0
48 NB_AGP_GCDET_L 48 AGP_ST<1> AE16 AGPST1 : ST1 VD50CLAMP0 N4
48 AGP_ST<2> AE13 AGPST2 : ST2 VD50CLAMP1 AE9 C4943 C4944 C4945 C4946 C4947 C4949 C4950 C4951 C4952
48 AGP_TYPEDET_L 2 1 0.01UF 1 0.01UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF 1 0.1UF
C4953 C4954 10UF
AGP_AD_STBF<0> AK24 AGP_PLLVDD AE12 1 0.1UF 1 0.1UF 20% 10% 10% 20% 20% 20% 20% 20% 20%
1 48 AGPADSTBF0 : ADSTBF0
R4913 1R4909 48 AGP_AD_STBS<0> AJ25 AGPADSTBS0* : ADSTBS0 50 OHM
20% 20% 1 6.3V
2
16V
2
16V
2
10V
2
10V
2
10V
2
10V
2
10V
2
10V
0 10K AG21 TO VDDQ 10V 10V CERM CERM CERM CERM CERM CERM CERM CERM CERM
5% 5% 48 AGP_AD_STBF<1> AGPADSTBF1 : ADSTBF1 2 2 805 402 402 402 402 402 402 402 402
1/16W 1/16W
AGP_AD_STBS<1> AF21 AGPCALPD AA13 CERM CERM
MF MF 48 AGPADSTBS1* : ADSTBS1 402 402
2 402 2 402
48 AGP_SB_STBF AK13 AGPSBSTBF : SBSTBF 50 OHM
TO GND
GPU_50PULLUP
48 AGP_SB_STBS AJ13 AGPSBSTBS* : SBSTBS AGPCALPU AA14 GPU_50PULLDWN
48 AGP_SBA_L<0> AJ11 AGPSBA0 : SBA0*

48 AGP_SBA_L<1> AH11 AGPSBA1 : SBA1* 10K OHM
48 AGP_SBA_L<2> AJ12 AGPSBA2 : SBA2* TO GND PP1V5_AGP 7 48 49
AGP_SBA_L<3> AH12 AGPSBA3 TESTMODE AE5 GPU_TMODE

48 : SBA3* 1 R4902
AGP_SBA_L<4> AJ14 AGPSBA4 : SBA4* 1 R4901
48
1 R4900 49.9
DOES HOOP UP AGP_BUSY_L & 48 AGP_SBA_L<5> AH14 AGPSBA5 : SBA5* 10K
AGP_SBA_L<6> AJ15 AGPSBA6 49.9 1%
: SBA6* 5%
STOP_AGP_L TO 3.3V OR 1.5V? AGP_SBA_L<7> AH15 AGPSBA7 1/16W
1% 1/16W
2 MF
48 : SBA7* 2 MF 1/16W
2 MF 402 49 48 7 PP1V5_AGP
GPU_MBDET_L AF16 <RESRVD> : MBDET* 402
402
48 AGP_BUSY_L AF12 AGPBUSY* : BUSY*
48 STOP_AGP_L AG11 AGPSTOP* : STOP* 1
R4906
PP3V3_AGP 7
D2 TRST*
48 49 50 51 52 56 57 58
AK29 AGPVREF
59 3.32K
C2 TCLK
49 GPU_AGP_VREF : AGPVREF 1%
C1 TMS
D1 TDI
E2 TDO
A NC
1
NV34
R4910 1
NV34
R4911
1/16W
MF
2 402
GPU AGP I/O REFERENCE
(PLACE CLOSE TO U3LITE AGP BALLS)
A
A1
AK30
G6
R7
T7
1 10K 10K
R4903 R4905 5% 5% GPU_AGP_VREF
AGP VERSION SELECT 0 NVAGP_TRST_L 1 2 1/16W 1/16W VOLTAGE=0.35V
49
5% 2 MF 2 MF MIN_LINE_WIDTH=25MIL
(LOW = AGP V3.X) 1/16W 1K MIN_NECK_WIDTH=10MIL
MF 1
(HIGH = AGP V2.X) 2 402
402 402
R4907 1 C4957
TP_GPU<0>
TP_GPU<1>
TP_GPU<2>
TP_GPU<3>
TP_GPU<4>
TP_NVAGP_TDO 6
1.02K 0.01UF
TP_NVAGP_TDI 1% 20%
1/16W 16V
TP_NVAGP_TMS MF 2 CERM
2 402 402
R4904
NVAGP_TCLK 1 2
NO_TEST
NO_TEST
NO_TEST
NO_TEST
NO_TEST
1K
BOUNDRY SCAN AVAILABLE ONLY ON NV3X SERIES
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE_5_HEAD
PPVOCRE_GPU PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_ITEM
1.60VDC 114S2803 1 RES,2.8K OHM,1/16W,1%,0402 R5003 NV18B

TABLE_5_ITEM
1.40VDC 114S1213 1 RES,1.21K OHM,1/16W,1%,0402 R5003 NV34
D D
GPU VCORE VREG
59 7 PP12V_AGP PP3V3_AGP 7 48 49 51 52 56
57 58 59
NOTE:
SET OUTPUT=1.60V FOR NV18B
PP5V_AGP
SET OUTPUT=1.40V FOR NV34
59 49 7
1
R5000 1 C5016 IRU3037CS VREF=1.25VDC
4.7 1UF 1 C5001 1
C5002 1
C5003 VOUT=VREF*(R5004+R5005)/R5005=1.60(OR 1.40) VDC
5% 20%
1/10W
25V
2 CERM 10UF 390UF 390UF
C5004 1 FF 805
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V PEAK CURRENT OF TOTAL RAILS
1UF 2 805 4 CERM ELEC ELEC
1206
20%
25V U5000_VC
8X11.5-TH 8X11.5-TH 7.2A WITH NV34
CERM 2 D
805
R5002 Q5001
2 6 0 1 G NTD70N03R
1 2 Q5001_GATE
VCC VC S
CASE369
U5000 5%
1/10W
IRU3037CS FF
805 3 L5001
SOI
HD 5 U5000_GATE_H 1.6UH
U5000_SS 8 SS Q5002_DRAIN 1 2 PPVCORE_GPU 49 50 58
3 TH
VOLTAGE=1.65V
LD U5000_GATE_L OMIT MIN_LINE_WIDTH=25MIL
1 NOSTUFF 1 MIN_NECK_WIDTH=10MIL
U5000_COMP 7 COMP 4 R5004 1 C5007 R5003
FB 1 U5000_FEEDBACK 0.51 3300PF2.8K
1 5% 10% 1%
R5001 GND
D 1/4W
FF
50V
2 CERM
1/16W
MF
27.4K
Q5002 2 1206 603 2 402
C 1 C5014
1%
1/16W
MF 1 C5013
4
1 C5006
1 G NTD70N03R
CASE369
R5004_P2
1
C5008
1800UF
1
C5009
1800UF
C
2 402 S 20% 20%
0.1UF R5001_2 68PF 220PF NOSTUFF 2 6.3V 2 6.3V
20%
16V
2 CERM
5%
50V
2 CERM
5%
2 25V 1 C5005 3
1 C5012 1
R5005 ELEC
TH-KZJ
ELEC
TH-KZJ
CERM 0.1UF 10K
603 1 C5023 603 402 0.022UF 20% 1%
3900PF
10%
50V 2 50V
CERM 1/16W
5% 2 CERM 1206 MF
2 50V 603 2 402
CERM
603
U5000_FEEDBACK
AGP 1.5V VREG

B PP2V5_PWRON PP1V5_PWRON PP1V5_RUN
B
58 50 49 PPVCORE_GPU
NOTE:
NOSTUFF
SET OUTPUT=1.5V
D5001
SC4215 VREF=0.8VDC
VOUT=VREF*(R5015+R5017)/R5017=1.5 VDC
2
R5010 10BQ040
3 VIN VO 6 1
0
2 Q5006_D
SM PEAK CURRENT OF TOTAL RAILS
VR5001 0.95A
1
5%
2
SC4215 1/8W
SOIC ADJ 7
EN VR5001_ADJ 1
R5015 FF
1
2
5
6
1206
174
1 1%
C5000 1 NC 1/10W NOSTUFF
10UF 4 FF 1 1 1
Q5006
20% NC NC 2 805 C5020 C5022 R5007 SI3446DV
2 6.3V
THM 5 NC 10UF 330UF 0 RDSON=0.06 OHM
CERM 20% 20% 5% PP5V_PWRON TSOP @ VGS=2.5 V
1206 GND PAD 2
6.3V
2 6.3V 1/10W
CERM ELEC
8
FF
1 1206 SM-2
R5017 2 805
200
4
1%
1/10W R5021
FF
2 805
100K
2 1 Q5006G
5%
1/16W
MF
402 3
NOTE:CONNECT VR5001 PIN 9 TO GND PLANE. D

Q5007
2N7002
SM 1
S G SYS_SLEEP 6 8 9 10 11 27 46
A 2
A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TMDS_XMIT_SI TMDS_XMIT_SI
PP3V3_AGP PP3V3_AGP 7 48 49 50 51 52 56 57 58
L5102 L5101 59
FERR-EMI-100-OHM PP3V3_SI_VCC 51 FERR-EMI-100-OHM
VOLTAGE=3.3V VOLTAGE=3.3V
1 2 PP3V3_SI_AVCC 1 2
MIN_NECK_WIDTH=10MIL MIN_NECK_WIDTH=10MIL
SM SM
C5107 1
C5106 1
C5104 1
10UF
1
C5103 1
C5102 1
C5101
20% 100PF 100PF 100PF 100PF 10UF
6.3V 5% 5%
D CERM
805
2 50V
CERM
402
2
50V
CERM
402
2
2
5%
50V
CERM
402
2
5%
50V
CERM
402
2
20%
6.3V
CERM
805
D
TMDS_XMIT_SI TMDS_XMIT_SI TMDS_XMIT_SI
TMDS_XMIT_SI TMDS_XMIT_SI TMDS_XMIT_SI
L5100
FERR-EMI-100-OHM
VOLTAGE=3.3V
TMDS_XMIT_SI MIN_LINE_WIDTH=25MIL
1 2 3V_SI_PLLVCC MIN_NECK_WIDTH=10MIL
NOTE:
SM
C5109 1
C5108 1
C5105 1 330OHM HI SWING
C5100 1
10UF 100PF 100PF RESISTOR MAY NEED TO BE
10UF 20% 5% 5% HIGHER
20% 6.3V 50V 50V
6.3V CERM 2 CERM 2 CERM 2
CERM 2 805 402 402
805 TMDS_XMIT_SI TMDS_XMIT_SI TMDS_XMIT_SI
TMDS_XMIT_SI
TMDS_XMIT_SI
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK 1
R5127
330
5%
1/16W
TMDS_XMIT_SI NOSTUFF NOSTUFF NOSTUFF MF
1 1 1 1 402
R5100 R5128 R5113 R5129 2
4.7K 4.7K 4.7K 4.7K
28
PVCC1 46
PVCC2 40
AVCC 34
22
5% 5% 5%
3
5%
1/16W 1/16W 1/16W
AVCC
VCC
VCC
1/16W
MF MF MF MF
402 2 402 2 402 2 2
402
58 SI_SCL 27 SCL/DK1 MSEN 48 NC

SI_SDA
IPD
58 26 SDA/DK0
TMDS_XMIT_SI
NC 24 CTL3/A2 IPD
R5130 SI_I2C_OFF 25 ISEL/RST* IPD
PCI_RESET_L
0 2 SI_PCI_RESET_L SI_PCI_RESET_L
77 76 75 74 49 6 1 51 51 47 PD*
22 NOSTUFF R5112
SI_EDGE SI_TMDS_CKP TMDS_CKP
C 5%
1/16W
MF
402 57 51 DVOD0
44
18
EDGE/HTPLG
D0 U5100
TXC+ 33
TXC- 32 SI_TMDS_CKM 22 NOSTUFF
1 2 R5111
1 2
TMDS_CKM
58 59
58 59
C
22 NOSTUFF R5110
57 51 DVOD1 17 D1 SIL1162 TX0+ 36 SI_TMDS_D0P 1 2 TMDS_D0P 58 59
SI_TMDS_D0M NOSTUFF
57 56 DVOD2 16 D2 TSSOP TX0- 35 22 1 2 R5109 TMDS_D0M 58 59
57 56 DVOD3 15 D3 TMDS_XMIT_SI
SI_TMDS_D1P 22 NOSTUFF R5108
TX1+ 39 1 2 TMDS_D1P 58 59
57 51 DVOD4 14 D4 NOSTUFF
TX1- 38 SI_TMDS_D1M 22 1 2 R5107 TMDS_D1M 58 59
57 51 DVOD5 13 D5 CRITICAL
SI_TMDS_D2P 22 NOSTUFF R5106 TMDS_D2P
57 51 DVOD6 10 D6 TX2+ 42 1 2 58 59
SI_TMDS_D2M NOSTUFF
57 51 DVOD7 9 D7 TX2- 41 22 1 2 R5105 TMDS_D2M 58 59
57 56 DVOD8 8 D8 5%
1/16W
57 51 DVOD9 7 D9 MF
402
57 51 DVOD10 6 D10
57 51 DVOD11 5 D11
57 DVODE 19 DE PLACE TMDS RESISTORS ON OPPOSITE SIDE TO TMDS
57 56 DVOHSYNC 20 HSYNC RESISTORS ON PAGE 25
EXT_SWING 30 SI_EXT_SWING_SET
57 DVOVSYNC 21 VSYNC
57 DVOCLKOUT 12 IDCK+ VREF 2
11 IDCK- PP3V3_SI_VCC
THRML
51
PGND
PGND
AGND
AGND
AGND
PAD
GND
GND
GND
TMDS_XMIT_SI
1
R5116
29
45
31
43
37
23
49
0
5%
1/16W
MF
2 402
SI_VREF
B NOSTUFF
R5104 1
TMDS_XMIT_SI
R5103 1
NOSTUFF
R5102 1
TMDS_XMIT_SI
R5101 1
VOLTAGE=1.5V
NOSTUFF
B
1
4.7K 4.7K 4.7K 4.7K R5117
5% 5% 5% 5% 1K
1/16W 1/16W 1/16W 1/16W
MF MF MF MF 1%
PP3V3_AGP 1/16W
59 58 57 56 52 51 50 49 48 7 402 2 402 2 402 2 402 2 MF
402
2
SILICON IMAGE 1162 TMDS

1 1 1 1
R5120 R5124 R5121 R5126
10K 10K 10K 10K
5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W
1 MF 1 MF MF MF
R5119 2 402 R5118 2 402
1
R5123 2 402
1
2 402 1
R5125
10K 10K R5122
5% 5% 10K 10K
1/16W 1/16W 5% 10K 5%
MF MF 1/16W 5% 1/16W
2 402 2 402 MF
402
1/16W
MF
MF
2 402
2 2 402
57 51 DVOD11
57 51 DVOD10
57 51 DVOD9
57 51 DVOD7
57 51 DVOD6
57 51 DVOD5
57 51 DVOD4
DVOD1
A 57 51
57 51 DVOD0 A
UNDEFINED RESET CONFIGURATION STRAPS
8
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7 6 5 4 3 2 1 DRAWING
8 7 6 5 4 3 2 1
H H
55 54 52 7 PP2V5_GPU
NVIDIA RECOMMENDS WIDER RANGE OF CAP VALUES, EMC LIKE ONE VALUE EVENLY DISTRIBUTE 0.01UF & 0.1 UF CAPS AMONGST FBVDDQ PINS ON NV ASIC
1
C5215 C5216 C5217 C5218 C5221 C5219 C5220 C5213 C5212 C5211 C5210 C5222 C5224 C5225 C5226 C5227 C5228 C5229 C5200 C5223 C5214 C5209
C5208 2 2 2 2 2 2 2 2 2 2 2 1 C5201 2 2 2 2 2 2 2 2 2 2 2 1 C5202
0.01UF 0.01UF 0.1UF 0.1UF 0.1UF 0.01UF 0.1UF 0.01UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.1UF 0.1UF 0.01UF 0.1UF 0.01UF 0.1UF 0.1UF
10% 10% 20% 20% 20% 10% 20% 10% 20% 20% 20% 20% 10UF 20% 20% 20% 10% 20% 20% 10% 20% 10% 20% 20% 10UF
16V 20% 20%
2 CERM 1 16V 1 10V 1 10V 1 10V 1 16V 1 10V 1 16V 1 10V 1 10V 1 10V 1 10V 2
6.3V 1 10V 1 10V 1 10V 1 16V 1 10V 1 10V 1 16V 1 10V 1 16V 1 10V 1 10V 2
6.3V
402 CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM CERM
805 805
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
G U4900
F17
G11
PP2V5_GPU 7 52 54 55
U4900
NV18B
G
NV18B
53 FBD<0> N25 FBAD0 BGA
G8 53 FBD<64> F13 FBCD0 (4 BGA
OF 5)
N13
53 FBD<1> N27 FBAD1 (3 OF 5) F8 53 FBD<65> D13 FBCD1 P13
53 FBD<2> N26 FBAD2 L25 53 FBD<66> E13 FBCD2 OMIT U13
OMIT
53 FBD<3> M25 FBAD3 Y25 53 FBD<67> F12 FBCD3 V13
53 FBD<4> K26 FBAD4 F11 53 FBD<68> E10 FBCD4 M14
53 FBD<5> K27 FBAD5 F14 53 FBD<69> D10 FBCD5 N14
53 FBD<6> J27 FBAD6 F20 53 FBD<70> D9 FBCD6 P14
FBD<7> H27 FBAD7 F23 FBD<71> D8 FBCD7 R14
53
FBVDDQ 53
53 FBD<8> N29 FBAD8 Y24 53 FBD<72> B13 FBCD8 T14

53 FBD<9> M29 FBAD9 L24 53 FBD<73> B12 FBCD9 U14
53 FBD<10> M28 FBAD10 G20 53 FBD<74> C12 FBCD10 V14
53 FBD<11> L29 FBAD11 G23 53 FBD<75> B11 FBCD11 W14
53 FBD<12> J29 FBAD12 H24 53 FBD<76> B9 FBCD12 M15
53 FBD<13> J28 FBAD13 AC24 53 FBD<77> C9 FBCD13 N15
53 FBD<14> H29 FBAD14 H25 53 FBD<78> B8 FBCD14 P15
53 FBD<15> G30 FBAD15 P25 53 FBD<79> A7 FBCD15 R15
53 FBD<16> K25 FBAD16 U25 TP_VTT<0> NO_TEST 53 FBD<80> F10 FBCD16 T15
53 FBD<17> J26 FBAD17 AC25 TP_VTT<1> NO_TEST 53 FBD<81> E9 FBCD17 U15
53 FBD<18> J25 FBAD18 TP_VTT<2> NO_TEST 53 FBD<82> F9 FBCD18 V15
F 53
53
FBD<19>
FBD<20>
G26
F28
F26
FBAD19
FBAD20
G9
G12
G15
G16
TP_VTT<3>
TP_VTT<4>
NO_TEST
NO_TEST
53
53
FBD<83>
FBD<84>
F7
C6
E6
FBCD19
FBCD20
W15
M16
N16
F
53 FBD<21> FBAD21 G19
G22
TP_VTT<5> NO_TEST 53 FBD<85> FBCD21
53 FBD<22> E27 FBAD22 NC_VTT J24 53 FBD<86> D5 FBCD22 P16
D27
M24 TP_VTT<6> NO_TEST
C4 R16
53 FBD<23> FBAD23 R24
T24 TP_VTT<7> NO_TEST
53 FBD<87> FBCD23
53 FBD<24> H28 FBAD24 W24 53 FBD<88> C8 FBCD24 T16
AB24 TP_VTT<8> NO_TEST
53 FBD<25> G29 FBAD25 53 FBD<89> B7 FBCD25 U16
F29 TP_VTT<9> NO_TEST
B6 V16
53 FBD<26> FBAD26 A25
AK25
53 FBD<90> FBCD26 THERMAL GND
E29 TP_VTT<10> NO_TEST
B5 W16
53 FBD<27> FBAD27 AA5 53 FBD<91> FBCD27
AF20 TP_VTT<11> NO_TEST
53 FBD<28> C30 FBAD28 AH16 53 FBD<92> A3 FBCD28 M17
AK15
53 FBD<29> C29 FBAD29 AF11 53 FBD<93> B3 FBCD29 N17
AH21
53 FBD<30> B30 FBAD30 U26 53 FBD<94> A2 FBCD30 P17
AD28
53 FBD<31> A30 FBAD31 AH18 53 FBD<95> B2 FBCD31 R17
F25
53 FBD<32> AJ29 FBAD32 C18 53 FBD<96> B29 FBCD32 T17
E14
53 FBD<33> AJ30 FBAD33 AF8 53 FBD<97> A29 FBCD33 U17
Y8
53 FBD<34> AH29 FBAD34 K3 53 FBD<98> B28 FBCD34 V17
G3
53 FBD<35> AH30 FBAD35 F6 53 FBD<99> A28 FBCD35 W17
AF17
53 FBD<36> AF29 FBAD36 AF23 53 FBD<100> B26 FBCD36 M18
AH24
53 FBD<37> AE29 FBAD37 AH28 53 FBD<101> B25 FBCD37 N18
AG27
53 FBD<38> AD29 FBAD38 AF26 53 FBD<102> B24 FBCD38 P18
AF14
53 FBD<39> AC28 FBAD39 AH13 53 FBD<103> C23 FBCD39 R18
L8
53 FBD<40> AG28 FBAD40 P26 53 FBD<104> E26 FBCD40 T18
E 53
53
FBD<41>
FBD<42>
AF27
AE26
FBAD41
FBAD42
G28
K28
N28
V28
AA28
53
53
FBD<105>
FBD<106>
D26
E25
FBCD41
FBCD42
U18
V18
E
53 FBD<43> AE28 FBAD43 F30 53 FBD<107> C25 FBCD43 W18
J30
53 FBD<44> AD25 FBAD44 M30 53 FBD<108> E24 FBCD44 M19
W30
53 FBD<45> AB25 FBAD45 AB30 53 FBD<109> F22 FBCD45 N19
AE30
53 FBD<46> AB26 FBAD46 H26 53 FBD<110> E22 FBCD46 P19
L26
53 FBD<47> AA25 FBAD47 Y26 53 FBD<111> F21 FBCD47 R19
AC26
53 FBD<48> AD30 FBAD48 GND E17 53 FBD<112> A24 FBCD48 T19
D28
53 FBD<49> AC29 FBAD49 C7 53 FBD<113> B23 FBCD49 U19
E8
53 FBD<50> AB28 FBAD50 A9 53 FBD<114> C22 FBCD50 V19
C10
53 FBD<51> AB29 FBAD51 E11 53 FBD<115> B22 FBCD51 W19
C13
53 FBD<52> Y29 FBAD52 E20 53 FBD<116> B20 FBCD52 P12
C21
53 FBD<53> W28 FBAD53 E23 53 FBD<117> C19 FBCD53 N12
C24
53 FBD<54> W29 FBAD54 A6 53 FBD<118> B19 FBCD54 V12
A12
53 FBD<55> V29 FBAD55 AH10 53 FBD<119> B18 FBCD55 U12
AK12
53 FBD<56> AC27 FBAD56 C3 53 FBD<120> D23 FBCD56 M12
D4
53 FBD<57> AB27 FBAD57 E5 53 FBD<121> D22 FBCD57 R12
AG4
53 FBD<58> AA27 FBAD58 AH3 53 FBD<122> D21 FBCD58 T12
AK6
53 FBD<59> AA26 FBAD59 AH7 53 FBD<123> E21 FBCD59 W12
AF5
53 FBD<60> W25 FBAD60 AE6 53 FBD<124> F19 FBCD60 M13
AK9
FBD<61> V26 FBAD61 N3 FBD<125> E18 FBCD61 R13
D
53
53 FBD<62> V27 FBAD62

H11
AC11
H20
PP2V5_GPU 7 52 54 55
53
53 FBD<126> D18 FBCD62 T13 D

53 FBD<63> V25 FBAD63 AC20 53 FBD<127> F18 FBCD63 W13
L23
Y23
F1
J1
54 FBDQM<0> L27 FBADQM0 M1 1 NV34 55 FBDQM<8> D11 FBCDQM0 FBCDQS0 D12 FBDQS<8> 53
T1 R5202
54 FBDQM<1> K29 FBADQM1 W1 49.9 55 FBDQM<9> B10 FBCDQM1 FBCDQS1 A10 FBDQS<9> 53
AB1 1%
54 FBDQM<2> G25 FBADQM2 AE1 1/16W 55 FBDQM<10> D7 FBCDQM2 FBCDQS2 E7 FBDQS<10> 53
A19 MF
54 FBDQM<3> E28 FBADQM3 AK19 402 55 FBDQM<11> C5 FBCDQM3 FBCDQS3 A4 FBDQS<11> 53
A22 2
54 FBDQM<4> AF28 FBADQM4 AK22
K5
55 FBDQM<12> C26 FBCDQM4 FBCDQS4 A27 FBDQS<12> 53
54 FBDQM<5> AD27 FBADQM5 J7 55 FBDQM<13> F24 FBCDQM5 FBCDQS5 D24 FBDQS<13> 53

AE25
54 FBDQM<6> AA30 FBADQM6 55 FBDQM<14> B21 FBCDQM6 FBCDQS6 A21 FBDQS<14> 53
54 FBDQM<7> Y27 FBADQM7 55 FBDQM<15> D20 FBCDQM7 FBCDQS7 D19 FBDQS<15> 53

FBCAL_PD_VDDQ F5 FBCAL_PD_VDDQ
55 FBBA<0> A18 FBCA0 NC_FBCDQS0* E12 NC
FBCAL_PU_GND E4 FBCAL_PU_GND
54 FBA<0> V30 FBAA0 55 FBBA<1> C17 FBCA1 NC_FBCDQS1* C11 NC
FBA<1> U28 FBAA1 FBCAL_TERM_GND D3 FBCAL_TERM_GND FBBA<2> B17 FBCA2 NC_FBCDQS2* D6

54
1 NV34 55 NC
U29 R5203 C16 NC_FBCDQS3* B4
54 FBA<2> FBAA2 55 FBBA<3> FBCA3 NC
T28 FBCAL_CLK_GND E3 FBCAL_CLK_GND 49.9
B16 B27
54 FBA<3> FBAA3 1% 55 FBBA<4> FBCA4 NC_FBCDQS4* NC
1/16W
54 FBA<4> T29 FBAA4 FB_DLLVDD C27 52 FB_DLLVDD NOSTUFF NOSTUFF MF 55 FBBA<5> D16 FBCA5 NC_FBCDQS5* D25 NC
402
T27 1 1 2 A16 NC_FBCDQS6* C20
54 FBA<5> FBAA5 R5207 R5208 55 FBBA<6> FBCA6 NC
T30 FBACKE N30 54 FBACKE
E16 NC_FBCDQS7* E19
54 FBA<6> FBAA6 549
1%
0
5%
55 FBBA<7> FBCA7 NC
T26 1
54 FBA<7> FBAA7 FBACLK0 U21 FBACLK1 53 54 R5201 1/16W
MF
1/16W
MF
55 FBBA<8> F16 FBCA8 FBCRAS* C14 FBBRAS_L 55
C 54
54
FBA<8>
FBA<9>
T25
R27
R25
FBAA8
FBAA9
FBACLK0* V21
FBACLK1 N21
FBACLK1_L
FBACLK0
53 54
53 54
10K
1%
1/16W
MF
2
402
2
402 55
55
FBBA<9>
FBBA<10>
D15
F15
FBCA9
FBCA10
FBCCAS*
FBCWE*
B14
C15
FBBCAS_L
FBBWE_L
55
55
C
54 FBA<10> FBAA10 FBACLK1* P21 FBACLK0_L 53 54
2 402 55 FBBA<11> A15 FBCA11 D17
R30 G17 FBCCS0* FBBCS0_L 55
54 FBA<11> FBAA11 M27 FBDQS<0> 53
55 FBBA<12> FBCA12 FBCCS1* D14 TESTPOINT
TP_FBBCS1_L 6
54 FBA<12> U24 FBAA12 FBADQS0
K30 FBDQS<1> FBBBA<0> E15 FBCBA0 FBCCKE A13 55 FBBCKE
FBADQS1 53 55
54 FBABA<0> R26 FBABA0 G27 FBDQS<2> 53 55 FBBBA<1> B15 FBCBA1

FBADQS2 WEAK PULL-DOWN
1
FBABA<1> R29 FBABA1 D30 FBDQS<3>
54
FBADQS3 53
FBBCLK1 K18 FBBCLK0 R5200
48 49 50 51 56 57 58 59
RECOMMANDED NY NVIDIA. 55 53
AG30 FBDQS<4> 53 10K
FBADQS4 55 53 FBBCLK1_L K17 FBBCLK0* 1%
FBARAS_L P28 FBARAS* AD26 FBDQS<5>
54
FBADQS5 53
55 53 FBBCLK0 K13 FBBCLK1
1/16W
MF WEAK PULL-DOWN
54 FBACAS_L P29 FBACAS* AA29 FBDQS<6> 53
FBADQS6 55 53 FBBCLK0_L K14 FBBCLK1* 2 402
FBAWE_L R28 FBAWE* W27 FBDQS<7> RECOMMENDED BY NVIDIA
54
FBADQS7 53
FBBCLK 0 AND 1 SWAPPED FOR ROUTING REASONS
54 FBACS0_L U27 FBACS0* M26
TP_FBACS1_L TESTPOINT P27 FBACS1* NC_FBADQS0* NC
L28 NC
NC_FBADQS1*
F27
GPU_FB_VREF C28 FBVREF NC_FBADQS2* NC
7
D29 NC PP3V3_AGP
NC_FBADQS3*
ROMA14 TESTPOINT R2 ROMA14 AG29
56
NC_FBADQS4* NC
NV34
56 ROMA15 TESTPOINT R1 ROMA15 NC_FBADQS5*
AE27 NC
R5206
TP_ROMCS_L TESTPOINT AF2 ROMCS* Y28 FB_DLLVDD 10
NC_FBADQS6* NC 52
VOLTAGE=2.5V 1 2
W26 NC MIN_LINE_WIDTH=25MIL
NC_FBADQS7* MIN_NECK_WIDTH=10MIL 1%
1/10W ALTERNATE STUFFING FOR 10 OHM R
B 1
NV34
C5205
4.7UF
1
NV34
C5206
0.1UF
1
NV34
C5207
0.001UF
FF
805 IS FILTER APN 155S0052 PER NVIDIA SPEC B
N20P80% 20% 10%
10V 10V 50V
805 402 402
55 54 52 7 PP2V5_GPU
1
R5204 1 C5203
1K 0.1UF
1%
20%
1/16W 10V
MF 2 CERM
VOLTAGE=1.25V 2 402 402
1
R5205 1 C5204
1K
1%
0.1UF
20%
1/16W
10V
MF 2
A
2 402
CERM
402
A
8 7 6 5 4 3 2 1
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8 7 6 5 4 3 2 1
PLACE R’S CLOSE TO MEMORY
FBD<31> 15 1 8 RP5320 RFBD<31> FBD<32> 15 3 6 RP5328 RFBD<32>

52 54 52 54

52 54 52 54

52 54 52 54

52 54 52 54
15 1 8 RP5321 15 4 5 RP5316
52 FBD<27> RFBD<27> 54 52 FBD<36> RFBD<36> 54 PLACE R’S CLOSE TO GPU
52 54 52 54

52 54 52 54
RP5321 RP5316
D 52
52
FBD<24>
FBD<0>
15
15
4
1
5
8 RP5322
RFBD<24>
RFBD<0>
54
54
52
52
FBD<39>
FBD<40>
15
15
1
2
8
7 RP5329
RFBD<39>
RFBD<40>
54
54
54 52 FBACLK1
D
52 54 52 54
RP5322 RP5329 1
52 FBD<2> 15 3 6 RFBD<2> 54 52 FBD<42> 15 3 6 RFBD<42> 54
R5316
4 5 RP5322 4 5 RP5329 100
52 FBD<3> 15 RFBD<3> 54 52 FBD<43> 15 RFBD<43> 54 1% PLACE 100OHM TERM AT RAM
1/16W
52 54 52 54 MF
402
2
52 54 52 54

52 54 52 54
4 5 RP5323 3 6 RP5330 54 52 FBACLK1_L
52 FBD<19> 15 RFBD<19> 54 52 FBD<47> 15 RFBD<47> 54

52 54 52 54

52 54 52 54

52 54 52 54

52 54 52 54

52 54 52 54
FBD<11> 15 2 7 RP5325 RFBD<11> FBD<53> 15 3 6 RP5300 RFBD<53> FBACLK0

52 54 52 54 54 52

52 54 52 54

52 54 52 54
RP5326 RP5301 1
52 FBD<5> 15 1 8 RFBD<5> 54 52 FBD<56> 15 1 8 RFBD<56> 54
R5317
15 2 7 RP5326 15 2 7 RP5301 100
52 FBD<6> RFBD<6> 54 52 FBD<57> RFBD<57> 54 1% PLACE 100OHM TERM AT RAM
1/16W
52 54 52 54 MF

402
2
52 54 52 54

52 54 52 54
2 7 RP5327 3 6 RP5302 54 52 FBACLK0_L
52 FBD<21> 15 RFBD<21> 54 52 FBD<61> 15 RFBD<61> 54

52 54 52 54

52 54 52 54
C 52 FBD<64>
GPU128BIT
15 1 8 RP5310 RFBD<64> 55 52 FBD<96>
GPU128BIT
15 4 5 RP5315 RFBD<96> 55
55 52 FBBCLK1 C
FBD<65>
GPU128BIT
15 2 7 RP5310 RFBD<65> FBD<97>
GPU128BIT
15 3 6 RP5315 RFBD<97>
52 55 52 55
FBD<66>
GPU128BIT
15 3 6 RP5310 RFBD<66> FBD<98>
GPU128BIT
15 2 7 RP5315 RFBD<98>
GPU128BIT
1
52 55 52 55 R5318
FBD<67>
GPU128BIT
15 4 5 RP5310 RFBD<67> FBD<99>
GPU128BIT
15 1 8 RP5315 RFBD<99> 100
52 55 52 55
FBD<84>
GPU128BIT
15 1 8 RP5309 RFBD<84> FBD<100>
GPU128BIT
15 4 5 RP5314 RFBD<100>
1% PLACE 100OHM TERM AT RAM
52 55 52 55 1/16W
FBD<85>
GPU128BIT
15 2 7 RP5309 RFBD<85> FBD<101>
GPU128BIT
15 3 6 RP5314 RFBD<101>
MF
52 55 52 55 402
GPU128BIT RP5309 GPU128BIT RP5314 2
52 FBD<86> 15 3 6 RFBD<86> 55 52 FBD<102> 15 2 7 RFBD<102> 55
FBD<87>
GPU128BIT
15 4 5 RP5309 RFBD<87> FBD<103>
GPU128BIT
15 1 8 RP5314 RFBD<103> FBBCLK1_L
52 55 52 55 55 52
FBD<72>
GPU128BIT
15 4 5 RP5319 RFBD<72> FBD<104>
GPU128BIT
15 1 8 RP5312 RFBD<104>
52 55 52 55
FBD<73>
GPU128BIT
15 3 6 RP5319 RFBD<73> FBD<105>
GPU128BIT
15 2 7 RP5312 RFBD<105>
52 55 52 55
FBD<75>
GPU128BIT
15 2 7 RP5319 RFBD<75> FBD<106>
GPU128BIT
15 3 6 RP5312 RFBD<106>
52 55 52 55
FBD<74>
GPU128BIT
15 1 8 RP5319 RFBD<74> FBD<107>
GPU128BIT
15 4 5 RP5312 RFBD<107>
52 55 52 55
FBD<68>
GPU128BIT
15 1 8 RP5308 RFBD<68> FBD<108>
GPU128BIT
15 1 8 RP5313 RFBD<108>
52 55 52 55
FBD<70>
GPU128BIT
15 2 7 RP5308 RFBD<70> FBD<109>
GPU128BIT
15 2 7 RP5313 RFBD<109>
52 55 52 55
GPU128BIT
3 6 RP5308 GPU128BIT
3 6 RP5313 55 52 FBBCLK0
52 FBD<69> 15 RFBD<69> 55 52 FBD<110> 15 RFBD<110> 55
FBD<71>
GPU128BIT
15 4 5 RP5308 RFBD<71> FBD<111>
GPU128BIT
15 4 5 RP5313 RFBD<111>
52 55 52 55
FBD<80>
GPU128BIT
15 1 8 RP5307 RFBD<80> FBD<112>
GPU128BIT
15 4 5 RP5311 RFBD<112>
GPU128BIT
1
52 55 52 55 R5319
FBD<81>
GPU128BIT
15 2 7 RP5307 RFBD<81> FBD<113>
GPU128BIT
15 3 6 RP5311 RFBD<113> 100
52 55 52 55
FBD<82>
GPU128BIT
15 3 6 RP5307 RFBD<82> FBD<114>
GPU128BIT
15 2 7 RP5311 RFBD<114>
1% PLACE 100OHM TERM AT RAM
52 55 52 55 1/16W
FBD<83>
GPU128BIT
15 4 5 RP5307 RFBD<83> FBD<115>
GPU128BIT
15 1 8 RP5311 RFBD<115>
MF
52 55 52 55 402
GPU128BIT RP5317 GPU128BIT RP5306 2
52 FBD<76> 15 4 5 RFBD<76> 55 52 FBD<116> 15 4 5 RFBD<116> 55
FBD<77>
GPU128BIT
15 3 6 RP5317 RFBD<77> FBD<117>
GPU128BIT
15 3 6 RP5306 RFBD<117> FBBCLK0_L
52 55 52 55 55 52
FBD<78>
GPU128BIT
15 2 7 RP5317 RFBD<78> FBD<118>
GPU128BIT
15 2 7 RP5306 RFBD<118>
52 55 52 55
FBD<79>
GPU128BIT
15 1 8 RP5317 RFBD<79> FBD<119>
GPU128BIT
15 1 8 RP5306 RFBD<119>
52 55 52 55
FBD<91>
GPU128BIT
15 1 8 RP5318 RFBD<91> FBD<120>
GPU128BIT
15 1 8 RP5304 RFBD<120>
52 55 52 55
GPU128BIT RP5318 GPU128BIT RP5304
B 52
52
FBD<90>
FBD<89>
GPU128BIT
15
15
2
3
7
6 RP5318
RFBD<90>
RFBD<89>
55
55
52
52
FBD<121>
FBD<122>
GPU128BIT
15
15
2
4
7
5 RP5304
RFBD<121>
RFBD<122>
55
55
B
FBD<88>
GPU128BIT
15 4 5 RP5318 RFBD<88> FBD<123>
GPU128BIT
15 3 6 RP5304 RFBD<123>
52 55 52 55
FBD<95>
GPU128BIT
15 1 8 RP5303 RFBD<95> FBD<124>
GPU128BIT
15 1 8 RP5305 RFBD<124>
52 55 52 55
FBD<94>
GPU128BIT
15 2 7 RP5303 RFBD<94> FBD<125>
GPU128BIT
15 3 6 RP5305 RFBD<125>
52 55 52 55
FBD<93>
GPU128BIT
15 3 6 RP5303 RFBD<93> FBD<126>
GPU128BIT
15 2 7 RP5305 RFBD<126>
52 55 52 55
FBD<92>
GPU128BIT
15 4 5 RP5303 RFBD<92> FBD<127>
GPU128BIT
15 4 5 RP5305 RFBD<127>
52 55 52 55
PLACE THESE R CLOSE TO SGRAM PLACE THESE R CLOSE TO SGRAM

R5301 GPU128BIT
R5308
15 15
52 FBDQS<0> 1 2 RFBDQS<0> 54 52 FBDQS<8> 1 2 RFBDQS<8> 55
1% 1%
R5302 1/16W GPU128BIT
R5314 1/16W
15 MF 15 MF
52 FBDQS<1> 1 2 402 RFBDQS<1> 54 52 FBDQS<9> 1 2 402 RFBDQS<9> 55
1% 1%
1/16W 1/16W
MF R5300 GPU128BIT MF R5309
402 15 402 15
1% 1%
R5303 1/16W GPU128BIT
R5315 1/16W
15 MF 15 MF
1% 1%
1/16W 1/16W
402 15 402 15
1% 1%
R5305 R5313
A 52 FBDQS<5> 1
15
2
1/16W
MF
402 RFBDQS<5> 54 52 FBDQS<13>
GPU128BIT
1
15
2
1/16W
MF
402 RFBDQS<13> 55 A
1% 1%
1/16W 1/16W
402 15 402 15
1% 1%
R5304 1/16W GPU128BIT
R5312 1/16W
15 MF 15 MF
1% 1%
1/16W 1/16W
MF MF
402 402
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
55 54 52 7 PP2V5_GPU 55 54 52 7 PP2V5_GPU
55 54 52 7 PP2V5_GPU
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
NVIDIA RECOMMENDS WIDER RANGE OF CAP VALUES C5415 C5414 C5401 C5400
1 C5424 1 C5425 1 C5426 1 C5422 1 C5427 1 C5428 1 C5429 1 C5423 1 10UF 1 10UF 1 10UF 1 10UF
0.1UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.1UF 0.001UF 20% 20% 20% 20%
20% 20% 20% 10% 20% 20% 20% 10% 6.3V 6.3V 6.3V 6.3V
10V 10V 10V 50V 10V 10V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402
805 805 805 805
D D
55 54 52 7 PP2V5_GPU
55 54 52 7 PP2V5_GPU
OMIT
OMIT
U5401
U5400 SDRAM_DDR_4MX32
SDRAM_DDR_4MX32 BGA
BGA (2 OF 2)
(2 OF 2)
D7 E5
D7 E5
D8 E7
D8 E7 OMIT
E4 E8 OMIT
E4 E8 U5400
SDRAM_DDR_4MX32 E11 E10 U5401
E11 E10 SDRAM_DDR_4MX32
FBA<0> N5 A0 BGA
L4 VDD K6
L4 VDD K6 54 52 (1 OF 2)
VSS 54 52 FBA<0> N5 A0
BGA
(1 OF 2)
VSS 54 52 FBA<1> N6 A1 DQ0 B7 RFBD<7> 53
L7 K7
L7 K7 54 52 FBA<1> N6 A1 DQ0 B7 RFBD<48> 53
54 52 FBA<2> M6 A2 DQ1 C6 RFBD<5> 53 L8 K8
L8 K8 54 52 FBA<2> M6 A2 DQ1 C6 RFBD<49> 53
54 52 FBA<3> N7 A3 DQ2 B6 RFBD<6> 53 L11 K9
L11 K9 54 52 FBA<3> N7 A3 DQ2 B6 RFBD<50> 53
54 52 FBA<4> N8 A4 DQ3 B5 RFBD<4> 53
L5
L5 C3 54 52 FBA<4> N8 A4 DQ3 B5 RFBD<51> 53
C3 54 52 FBA<5> M9 A5 DQ4 C2 RFBD<2> 53 L10
L10 C5 54 52 FBA<5> M9 A5 DQ4 C2 RFBD<53> 53
C5 54 52 FBA<6> N9 A6 DQ5 D3 RFBD<3> 53
C7 F6 54 52 FBA<6> N9 A6 DQ5 D3 RFBD<52> 53
C7 F6 54 52 FBA<7> N10 A7 DQ6 D2 RFBD<1> 53
C8 F7 54 52 FBA<7> N10 A7 DQ6 D2 RFBD<54> 53
C8 F7 54 52 FBA<8> N11 A8 DQ7 E2 RFBD<0> 53
C10 F8 54 52 FBA<8> N11 A8 DQ7 E2 RFBD<55> 53
C10 F8 54 52 FBA<9> M8 A9 DQ8 K13 RFBD<31> 53
C12 F9 54 52 FBA<9> M8 A9 DQ8 K13 RFBD<32> 53
C12 F9 54 52 FBA<10> L6 A10 DQ9 K12 RFBD<30> 53
E3 G6 54 52 FBA<10> L6 A10 DQ9 K12 RFBD<33> 53
E3 G6 54 52 FBA<11> M7 A11 DQ10 J13 RFBD<29> 53
E12 G7 54 52 FBA<11> M7 A11 DQ10 J13 RFBD<35> 53
E12 G7 DQ11 J12 RFBD<28> 53 VDDQ
VDDQ 53 RFBDQS<0> B2 DQS0 F4 G8 DQ11 J12 RFBD<34> 53
F4 G8 DQ12 G13 RFBD<27> 53 53 RFBDQS<6> B2 DQS0
53 RFBDQS<3> H13 DQS1 F11 VSS_THERM G9 DQ12 G13 RFBD<37> 53
F11 VSS_THERM G9 DQ13 G12 RFBD<26> 53 53 RFBDQS<4> H13 DQS1
53 RFBDQS<1> H2 DQS2 G4 H6 DQ13 G12 RFBD<36> 53
G4 H6 DQ14 F13 RFBD<25> 53 53 RFBDQS<7> H2 DQS2
53 RFBDQS<2> B13 DQS3 G11 H7 DQ14 F13 RFBD<38> 53
G11 H7 DQ15 F12 B13
C J4 H8 52 FBDQM<0> B3 DM0 DQ16 F3
RFBD<24>
RFBD<15>
53
53
J4
J11
H8
H9
53
52
RFBDQS<5>
FBDQM<6> B3
DQS3
DM0
DQ15
DQ16
F12
F3
RFBD<39>
RFBD<57>
53
53
C
J11 H9 52 FBDQM<3> H12 DM1 DQ17 F2 RFBD<14> 53
K4 J6 52 FBDQM<4> H12 DM1 DQ17 F2 RFBD<56> 53
K4 J6 52 FBDQM<1> H3 DM2 DQ18 G3 RFBD<13> 53
K11 J7 52 FBDQM<2> B12 DM3 DQ19 G2 RFBD<12> 53
J8 52 FBDQM<5> B12 DM3 DQ19 G2 RFBD<59> 53
J8 DQ20 J3 RFBD<10> 53 54 SGRAVREF N13 VREF
54 SGRAVREF N13 VREF 54 52 FBABA<0> N4 BA0 J9 DQ20 J3 RFBD<62> 53
J9 DQ21 J2 RFBD<11> 53 54 52 FBABA<0> N4 BA0
54 52 FBABA<1> M5 BA1 DQ21 J2 RFBD<60> 53
DQ22 K2 RFBD<8> 53
B4 54 52 FBABA<1> M5 BA1
B4 1 C5435 DQ22 K2 RFBD<61> 53
1 C5434 FBACLK0 M11 DQ23 K3 RFBD<9> B11
B11 53 52 CK 53
0.1UF FBACLK1 M11 DQ23 K3 RFBD<63>
0.1UF FBACLK0_L M12 DQ24 E13 RFBD<23> 20% D4 53 52 CK 53
20% D4 53 52 CK 53
10V FBACLK1_L M12 DQ24 E13 RFBD<41>
10V FBACKE N12 DQ25 D13 RFBD<22>
2 CERM D5 53 52 CK 53
2 CERM D5 54 52 CKE 53 402 FBACKE N12 DQ25 D13 RFBD<40>
402 FBACS0_L N2 DQ26 D12 RFBD<21> D6 54 52 CKE 53
D6 54 52 CS 53
FBACS0_L N2 DQ26 D12 RFBD<42>
FBARAS_L M2 DQ27 C13 RFBD<20> D9 54 52 CS 53
D9 54 52 RAS 53
FBARAS_L M2 DQ27 C13 RFBD<43>
FBACAS_L L2 DQ28 B10 RFBD<19> D10 54 52 RAS 53
D10 54 52 CAS 53
FBACAS_L L2 DQ28 B10 RFBD<44>
FBAWE_L L3 DQ29 B9 RFBD<16> D11 54 52 CAS 53
D11 54 52 WE 53
FBAWE_L L3 DQ29 B9 RFBD<47>
DQ30 C9 RFBD<18> 53 E6 54 52 WE 53
E6 C4 DQ30 C9 RFBD<45>
DQ31 B8 RFBD<17> VSSQ E9 C4 53
VSSQ E9 C11 53
DQ31 B8 RFBD<46> 53
F5 C11
F5 H4 MCL M13
F10 H4 MCL M13
F10 H11
RFU1 L9 FBA<12> 52 54 G5 H11
G5 L12 RFU1 L9 FBA<12> 52 54
NC RFU2 M10 TP_U5400_RFU2 G10 L12
G10 L13
NO_TEST
NC RFU2 M10 TP_U5401_RFU2 NO_TEST
H5 L13
H5 M3
H10 M3
H10 M4
J5 M4
J5 N3
J10 N3
J10
K5
K5
K10
B K10
B
55 54 52 7 PP2V5_GPU
55 54 52 7 PP2V5_GPU
1 C5418 1 C5408 1 C5409 1 C5419 1 C5410 1 C5411 1 C5420 1 C5412 1 C5413 1 C5421 1 C5433 1 C5402 1 C5403 1 C5430 1 C5404 1 C5405 1 C5431 1 C5406 1 C5407 1 C5432
0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF
10% 20% 20% 10% 20% 20% 10% 20% 20% 10% 10% 20% 20% 10% 20% 20% 10% 20% 20% 10%
50V 10V 10V 50V 10V 10V 50V 10V 10V 50V 50V 10V 10V 50V 10V 10V 50V 10V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
EVENLY PLACE 0.1UF CAP & 0.01UF CAPS
DDR SDRAM A VREF
PP2V5_GPU
55 54 52 7
1
R5400 1 C5416
1K 0.1UF
A 1%
1/16W
MF
402
2
20%
10V
CERM
A
2 402
SGRAM0 & SGRAM1 MEMORY SUPPORT SGRAVREF 54
VOLTAGE=1.25V
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION 1 MIN_LINE_WIDTH=25MIL
R5401 1 C5417
1K 0.1UF
333S0251 2 SDRAM,4MX32,DDR,300MHZ U5400,U5401 CRITICAL SAMSUNG 1%
20%
1/16W 10V
MF 2 CERM
333S0252 2 SDRAM,4MX32,DDR,300MHZ U5400,U5401 CRITICAL HYNIX 2 402 402
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
55 54 52 7 PP2V5_GPU 55 54 52 7 PP2V5_GPU
55 54 52 7 PP2V5_GPU
PLACE NEAR VDD PINS PLACE NEAR VDD PINS
GPU128BIT GPU128BIT GPU128BIT GPU128BIT
GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT

C5515 C5514 C5501 C5500
1 C5518 1 C5519 1 C5520 1 C5521 1 C5522 1 C5523 1 C5524 1 C5525 1 10UF 1 10UF 1 10UF 1 10UF
0.1UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.1UF 0.001UF 20% 20% 20% 20%
20% 20% 20% 10% 20% 20% 20% 10% 6.3V 6.3V 6.3V 6.3V
10V 10V 10V 50V 10V 10V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402
805 805 805 805
D 55 54 52 7 PP2V5_GPU
D
55 54 52 7 PP2V5_GPU
U5501
U5500 SDRAM_DDR_4MX32
SDRAM_DDR_4MX32 BGA
BGA (2 OF 2)
(2 OF 2)
D7 E5
D7 E5
D8 OMIT E7
D8 OMIT E7
E4 E8
E4 E8 U5500
SDRAM_DDR_4MX32 E11 E10 U5501
E11 E10 SDRAM_DDR_4MX32
FBBA<0> N5 A0 BGA
L4 VDD K6
L4 VDD K6 55 52 (1 OF 2)
VSS 55 52 FBBA<0> N5 A0
BGA
(1 OF 2)
VSS 55 52 FBBA<1> N6 A1 DQ0 B7 RFBD<71> 53 L7 K7
L7 K7 OMIT 55 52 FBBA<1> N6 A1 OMIT DQ0 B7 RFBD<113> 53
55 52 FBBA<2> M6 A2 DQ1 C6 RFBD<69> 53 L8 K8
L8 K8 55 52 FBBA<2> M6 A2 DQ1 C6 RFBD<114> 53
55 52 FBBA<3> N7 A3 DQ2 B6 RFBD<70> 53 L11 K9
L11 K9 55 52 FBBA<3> N7 A3 DQ2 B6 RFBD<112> 53
55 52 FBBA<4> N8 A4 DQ3 B5 RFBD<68> 53 L5
L5 C3 55 52 FBBA<4> N8 A4 DQ3 B5 RFBD<115> 53
C3 55 52 FBBA<5> M9 A5 DQ4 C2 RFBD<65> 53 L10
L10 C5 55 52 FBBA<5> M9 A5 DQ4 C2 RFBD<117> 53
C5 55 52 FBBA<6> N9 A6 DQ5 D3 RFBD<67> 53
C7 F6 55 52 FBBA<6> N9 A6 DQ5 D3 RFBD<116> 53
C8 F7 55 52 FBBA<8> N11 A8 DQ7 E2 RFBD<64> 53
C10 F8 55 52 FBBA<8> N11 A8 DQ7 E2 RFBD<119> 53
C10 F8 55 52 FBBA<9> M8 A9 DQ8 K13 RFBD<95> 53
C12 F9 55 52 FBBA<9> M8 A9 DQ8 K13 RFBD<97> 53
C12 F9 55 52 FBBA<10> L6 A10 DQ9 K12 RFBD<94> 53
E3 G6 55 52 FBBA<10> L6 A10 DQ9 K12 RFBD<96> 53
E3 G6 55 52 FBBA<11> M7 A11 DQ10 J13 RFBD<93> 53
E12 G7 55 52 FBBA<11> M7 A11 DQ10 J13 RFBD<99> 53
E12 G7 DQ11 J12 RFBD<92> 53 VDDQ
VDDQ 53 RFBDQS<8> B2 DQS0 F4 G8 DQ11 J12 RFBD<98> 53
F4 G8 DQ12 G13 RFBD<91> 53 53 RFBDQS<14> B2 DQS0
53 RFBDQS<11> H13 DQS1 F11 VSS_THERM G9 DQ12 G13 RFBD<100> 53
F11 VSS_THERM G9 DQ13 G12 RFBD<90> 53 53 RFBDQS<12> H13 DQS1
53 RFBDQS<9> H2 DQS2 G4 H6 DQ13 G12 RFBD<101> 53
G4 H6 DQ14 F13 RFBD<89> 53 53 RFBDQS<15> H2 DQS2
53 RFBDQS<10> B13 DQS3 G11 H7 DQ14 F13 RFBD<102> 53
G11 H7 DQ15 F12 B13
C J4 H8 52 FBDQM<8> B3 DM0 DQ16 F3
RFBD<88>
RFBD<79>
53
53
J4
J11
H8
H9
53
52
RFBDQS<13>
FBDQM<14> B3
DQS3
DM0
DQ15
DQ16
F12
F3
RFBD<103>
RFBD<121>
53
53
C
J11 H9 52 FBDQM<11> H12 DM1 DQ17 F2 RFBD<78> 53
K4 J6 52 FBDQM<12> H12 DM1 DQ17 F2 RFBD<120> 53
K11 J7 52 FBDQM<15> H3 DM2 DQ18 G3 NO_TEST RFBD<122> 53
K11 J7 52 FBDQM<10> B12 DM3 DQ19 G2 RFBD<76> 53
J8 52 FBDQM<13> B12 DM3 DQ19 G2 RFBD<123> 53
J8 DQ20 J3 RFBD<74> 53 55 SGRBVREF N13 VREF
55 SGRBVREF N13 VREF 55 52 FBBBA<0> N4 BA0 J9 DQ20 J3 RFBD<126> 53
J9 DQ21 J2 RFBD<75> 53 55 52 FBBBA<0> N4 BA0
55 52 FBBBA<1> M5 BA1 DQ21 J2 RFBD<124> 53
DQ22 K2 RFBD<72> 53 GPU128BIT B4 55 52 FBBBA<1> M5 BA1
GPU128BIT B4 DQ22 K2 RFBD<125> 53
FBBCLK0 M11 DQ23 K3 RFBD<73> 1 C5535 B11
1 C5534 B11 53 52 CK 53
FBBCLK1 M11 DQ23 K3 RFBD<127>
FBBCLK0_L M12 DQ24 E13 RFBD<87> 0.1UF D4 53 52 CK 53
0.1UF D4 53 52 CK 53
20% FBBCLK1_L M12 DQ24 E13 RFBD<104>
20% FBBCKE N12 DQ25 D13 RFBD<86> 10V D5 53 52 CK 53
10V D5 55 52 CKE 53 2 CERM FBBCKE N12 DQ25 D13 RFBD<105>
2 CERM FBBCS0_L N2 DQ26 D12 RFBD<85> 402 D6 55 52 CKE 53
402 D6 55 52 CS 53
FBBCS0_L N2 DQ26 D12 RFBD<106>
FBBRAS_L M2 DQ27 C13 RFBD<84> D9 55 52 CS 53
D9 55 52 RAS 53
FBBRAS_L M2 DQ27 C13 RFBD<107>
FBBCAS_L L2 DQ28 B10 RFBD<83> D10 55 52 RAS 53
D10 55 52 CAS 53
FBBCAS_L L2 DQ28 B10 RFBD<108>
FBBWE_L L3 DQ29 B9 RFBD<81> D11 55 52 CAS 53
D11 55 52 WE 53
FBBWE_L L3 DQ29 B9 RFBD<110>
DQ30 C9 RFBD<82> E6 55 52 WE 53
53
E6 C4 DQ30 C9 RFBD<109>
DQ31 B8 RFBD<80> VSSQ E9 C4 53
VSSQ E9 C11 53
DQ31 B8 RFBD<111> 53
F5 C11
F5 H4 MCL M13
F10 H4 MCL M13
F10 H11
RFU1 L9 FBBA<12> 52 55 G5 H11
G5 L12 RFU1 L9 FBBA<12> 52
NC RFU2 M10 TP_U5500_RFU2 G10 L12 55
G10 L13
NO_TEST
NC RFU2 M10 TP_U5501_RFU2 NO_TEST
H5 L13
H5 M3
H10 M3
H10 M4
J5 M4
J5 N3
J10 N3
J10
K5
K5
K10
B K10
B
55 54 52 7 PP2V5_GPU
55 54 52 7 PP2V5_GPU
GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT GPU128BIT
1 C5526 1 C5508 1 C5509 1 C5527 1 C5510 1 C5511 1 C5528 1 C5512 1 C5513 1 C5529 1 C5530 1 C5502 1 C5503 1 C5531 1 C5504 1 C5505 1 C5532 1 C5506 1 C5507 1 C5533
0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF 0.1UF 0.1UF 0.001UF
10% 20% 20% 10% 20% 20% 10% 20% 20% 10% 10% 20% 20% 10% 20% 20% 10% 20% 20% 10%
50V 10V 10V 50V 10V 10V 50V 10V 10V 50V 50V 10V 10V 50V 10V 10V 50V 10V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
DDR SDRAM B VREF EVENLY PLACE 0.1UF CAP & 0.01 UF CAPS
55 54 52 7 PP2V5_GPU
1GPU128BIT GPU128BIT
R5500 1 C5516
1K 0.1UF
1%
20%
1/16W 10V
MF 2 CERM
2 402 402
A GPU128BIT
GPU128BIT
SGRBVREF
VOLTAGE=1.25V
55
A
1
R5501 1 C5517 MIN_NECK_WIDTH=10MIL
1K 0.1UF
1%
20%
1/16W 10V
MF 2 CERM
SGRAM0 & SGRAM1 MEMORY SUPPORT 2 402 402
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION

333S0251 2 SDRAM,4MX32,DDR,300MHZ U5500,U5501 CRITICAL GPU128BIT_SAMSUNG
333S0252 2 SDRAM,4MX32,DDR,300MHZ U5500,U5501 CRITICAL GPU128BIT_HYNIX
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
(8) FRAME BUFFER MEMORY SPEED

PP3V3_AGP
PP3V3_AGP [5..0] = [NV11_HSYNC,NV11_VSYNC,GPU_STRAP<3>,GPU_STRAP<2>,DVOD3,DVOD2]
PP3V3_AGP
PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
2 NOSTUFF 2
R5616 1 2 OMIT 2 2 OMIT 2 OMIT OMIT 2
R5638 R5625 R5626 R5624 R5623 R5644 R5643
10K
5% 10K 10K 10K 10K 10K 10K 10K
110111 = 270MHZ SAMSUNG (NV18B)
1/16W 1% 5% 5% 5% 5% 5% 5%
MF 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 116S1104 2 RES,10K-OHM,1/16W,5% R5625,R5623 270MHZ_SAM_18
402 MF MF MF MF MF MF MF
D
1
2 402
57 NV_HSYNC
1 402
1 402
1 402
1 402
1 402
1 402
116S1104 1 RES,10K-OHM,1/16W,5% R5644 270MHZ_SAM_18 D
57 VIPHCTL
57 VIPD7 57 NV_VSYNC 116S1103 1 RES,1K-OHM,1/16W,5% R5628 270MHZ_SAM_18
NOSTUFF 57 GPU_STRAP<3>
2 57 GPU_STRAP<2> 110011 = 270MHZ HYNIX (NV18B)
R5617 2
1K R5618 57 51 DVOD3
5% 1K 116S1104 2 RES,10K-OHM,1/16W,5% R5625,R5644 270MHZ_HYN_18
1/16W 5% 57 51 DVOD2
MF 1/16W
1 402 MF 116S1103 2 RES,1K-OHM,1/16W,5% R5628,R5627 270MHZ_HYN_18
402
1
2
2 OMIT 2 NOSTUFF 2 OMIT 2 OMIT OMIT 2 NOSTUFF
R5630 R5629 R5628 R5627 R5647 R5648 111101 = 270MHZ SAMSUNG (NV34)
1K 1K 1K 1K 1K 1K
5% 5% 5% 5% 5% 5% 116S1104 2 RES,10K-OHM,1/16W,5% R5625,R5624 270MHZ_SAM_34
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
(5) HOST MODE MF MF MF MF MF
1 402 MF
(6) AGP SIDEBAND 1 402
1 402
1 402
1 402
1 402 116S1104 1 RES,10K-OHM,1/16W,5% R5623 270MHZ_SAM_34
[0] = [VIPHCTL]
[0] = [VIPD7]
0 = PCI MODE 116S1103 1 RES,1K-OHM,1/16W,5% R5647 270MHZ_SAM_34
* 0 = ENABLE AGP SIDEBAND
* 1 = AGP MODE
1 = DISABLE AGP SIDEBAND
111100 = 270MHZ HYNIX (NV34)
116S1104 2 RES,10K-OHM,1/16W,5% R5624,R5623 270MHZ_HYN_34
116S1103 2 RES,1K-OHM,1/16W,5% R5630,R5647 270MHZ_HYN_34
C PP3V3_AGP C
PP3V3_AGP
PP3V3_AGP PP3V3_AGP
2 NOSTUFF NOSTUFF
R5663 2 2 2 2
10K R5664 R5653 R5631 R5633
1% 10K 10K 10K 10K
1/16W 1% 5% 1% 5%
MF 1/16W 1/16W 1/16W 1/16W
402 MF MF MF MF
1 402 402 402
1 1 1 1 402
52 ROMA15
57 GPU_STRAP<1> 57 GPU_STRAP<0>
52 ROMA14 57 51 DVOD8
NOSTUFF
2 2
NOSTUFF NOSTUFF R5632 R5634
2 1K 1K
2 2 R5658 5% 5%
R5665 R5666 1K 1/16W 1/16W
1K 1K 5% MF MF
5% 5% 1/16W
1/16W 1/16W MF
1 402 1 402
MF MF 402
402 402
1
1 1
FAST WRITE SUPPORT (9) SUB-VENDOR (10) PCI ADDRESS BUS

0=ENABLE [0] = [GPU_STRAP<1>] [0] = [GPU_STRAP<0>]
(1) ROM TYPE (OVERRIDDEN IF STRAP1 = 0) 1=DISABLE * 0 = SYSTEM BIOS (VENDOR & SUBSYSTEM ID=0X0000) 0 = REVERSED
[1..0] = [ROMA15,ROMA14] 1 = ADAPTER CARD VGA BIOS (VENDOR & SUBSYSTEM ID=0X54-0X57) * 1 = NORMAL
00 = PARALLEL
01 = SERIAL AT25F
10 = SERIAL SST45VF
B * 11 = SERIAL FUTURE B
PP3V3_AGP
PP3V3_AGP
PP3V3_AGP PP3V3_AGP
NOSTUFF NOSTUFF
2 2
NOSTUFF NOSTUFF NOSTUFF TMDS_XMIT_SI NOSTUFF R5619 R5620
NOSTUFF 2 2 2 2 2 1 NOSTUFF 2 10K 10K
R5636 5% 5%
2 1 R5612 R5613 R5608 R5609 R5602 1 R5605 1/16W 1/16W
R5667 R5635 10K 10K 10K 10K 10K 10K R5637 10K MF MF
10K 10K 1% 5% 5% 5% 5% 1% 10K 5%
1 402 1402
5% 1% 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1% 1/16W
1/16W 1/16W MF MF MF MF MF MF 1/16W MF
MF MF 402 402 402 402 402 402 MF 402
1 1 1 1 1 2 1
1 402 2 402 2 402
59 57 6 ANALOG_HSYNC_L
57 VIPHAD1
57 51 DVOHSYNC 59 57 6 ANALOG_VSYNC_L
57 VIPHAD0
57 VIPD6 57 VIPD3
57 VIPD1
57 VIPD2 57 VIPD5 NOSTUFF NOSTUFF
57 VIPD0 2 2
57 VIPD4
R5622 R5621
NOSTUFF 2 2 TMDS_XMIT_GPU 1K 1K
2 2 2 2 NOSTUFF 5% 5%
R5600 R5615 NOSTUFF 1/16W 1/16W
R5601 1K 1K R5614 R5611 R5610 2 2 2 MF MF
1K 5% 5% 1K 1K 1K 2 R5603 R5607 R5606
5% 1/16W 1/16W 5% 5% 5% R5604 1K 1K 1K 1 402 1 402
1/16W MF MF 1/16W 1/16W 1/16W 1K 5% 5% 5%
MF 402 402 MF MF MF 5% 1/16W 1/16W 1/16W
1 1
1 402 1 402 1 402 1 402 1/16W
MF
MF MF MF
1 402 1 402 1 402
1 402
(7) TV MODE
[1..0] = [ANALOG_HSYNC*,ANALOG_VSYNC*]
A (2) CRYSTAL FREQUENCY SELECT
[1..0] = [VIPD6,VIPD2]
(4) USER DEFINED STRAPS
[3..0] = [VIPHAD1,VIPHAD0,VIPD1,VIPD0]
(3) PCI DEVICE ID
00 = SECAM
01 = NTSC
A
00 = 13.5MHZ [3..0] = [DVOHSYNC,VIPD3,VIPD5,VIPD4]
10 = PAL
01 = 14.38MHZ 0010 = 0X112 GEFORCE2 GO
11 = DISABLED
* 10 = 27MHZ THESE BITS ARE UNDEFINED BUT THEY 0011 = 0X113 QUADRO2 GO
11 = {UNDEFINED} MUST BE KEPT LOW DURING RESET 0100 = 0X114 NV17M (THESE RESISTORS ARE ALL NOSTUFF)
0000 = 0X110 GEFORCE2GO MX (NV11B)
* 1001 = NV18B,NV31,NV34
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
U4900
NV18B
59 GRAPH_DDC_SCL AG6 I2CC_SCL VIPPCLK L4 VIPCLK
BGA
GRAPH_DDC_SDA AG7 I2CC_SDA
59 (2 OF 5) 1
R5735
OMIT 10K
59 MON_I2C_SCL AG5 I2CA_SCL TESTPOINT
VIPD0 J3 VIPD0 56 5%
D 59 58 57 56 52 51 50 49 48 7 PP3V3_AGP
L5702
1000-OHM-EMI 59 MON_I2C_SDA AF7 I2CA_SDA TESTPOINT
VIPD1 J2
K2
VIPD1 56
1/16W
MF
2 402
D
VIPD2 VIPD2 56
1 2
6 TP_VIPHCLK M5 VIPHCLK TESTPOINT
VIPD3 K1 VIPD3 56
SM
56 VIPHCTL M4 VIPHCTL TESTPOINT
VIPD4 L3 VIPD4 56 PP3V3_AGP 7 48 49 50 51 52 56 57 58 59
1
C5710 1 C5704 1 C5705 VIPD5 L2 VIPD5 56
4.7UF 0.1UF 0.001UF 56 VIPHAD0 P3 VIPHAD0 TESTPOINT
VIPD6 N2 VIPD6 56
20% 20% 10%
2
6.3V
2 10V
2 50V
56 VIPHAD1 P2 VIPHAD1 TESTPOINT
VIPD7 N1 VIPD7 56
1C5706
CERM CERM CERM
805 402 402 0.1UF
VIPVDDQ0 L6 20%
10V
L7 2
VIPVDDQ1 CERM
402
R5709 NOSTUFF
VIPVDDQ2 M7
10 PPP3V3_NV_PLL AK7 PLLVDD R5723
59 56 6 ANALOG_VSYNC_L 1 2 MIN_LINE_WIDTH=25MIL NO_TEST 49.9
MIN_NECK_WIDTH=10MIL VIPCAL_PD_VDDQ P6 VIPCAL_PD_VDDQ 1 2 1
C5716
MF 5% 402 VOLTAGE=3.3V
1/16W VIPCAL_PU_GND P7 VIPCAL_PU_GND 1 2 1% 0.1UF
1/16W 20%
NO_TEST
10V NV34
R5710 10 NOSTUFF 1% MF 2
59 56 6 ANALOG_HSYNC_L 1 2 1/16W 402 CERM
R5724 MF 402
MF 1/16W 5% 402 49.9 402
L5700 R5727 PP3V3_AGP 7 48 49 50 51 52 56 57 58
59
59 58 57 56 52 51 50 49 48 7 PP3V3_AGP 1000-OHM-EMI 0
1 2
1 2 NOSTUFF NOSTUFF NOSTUFF
VSYNC_L AE3 DACB_VSYNC TESTPOINT
DACA_VSYNC AJ8 NV_VSYNC 56 5%
SM 1
C5712 1 C5720 1 C5721 1/16W
1
C5711 1C5702 1 C5701 HSYNC_L AF3 DACB_HSYNC TESTPOINT
DACA_HSYNC AH9 NV_HSYNC 56 MF
4.7UF 0.1UF 0.001UF 402
4.7UF 0.1UF 0.001UF VOLTAGE=6.3V
20% 20% 10%
20% 20% 10% 6.3V 10V 50V
6.3V 10V 50V AB4 AG9 MIN_LINE_WIDTH=25MIL 2 CERM 2 CERM 2 CERM
2 CERM 2 CERM 2 CERM MIN_LINE_WIDTH=25MIL PP3V3_NV_DACB DACB_VDD DACA_VDD PP3V3_NV_DACA MIN_NECK_WIDTH=10MIL 805 402 402
ROUTE THE RGB LINES 805 402 402 MIN_NECK_WIDTH=10MIL
AC4 AG10
(GND) DACB_IDUMP DACA_IDUMP (GND)
AS 37.5 OHM TRACES.
59 6 ANALOG_BLU AD1 DACB_BLUE DACA_BLUE AJ9 DACA_BLUE

59 6 ANALOG_GRN AD2 DACB_GREEN DACA_GREEN AJ10 DACA_GREEN
59 6 ANALOG_RED AE2 DACB_RED DACA_RED AK10 DACA_RED
C AD3
C
NOSTUFF 1 NOSTUFF 1
DAC2RSET DACB_RSET DACA_RSET AG8 DACRSET1
C5707 1 R5702 R5704 AB5
75 C5709 1 75
NOSTUFF NOSTUFF NOSTUFF DAC2VREF DACB_VREF DACA_VREF AH8 DACVREF1
NOSTUFF NOSTUFF NOSTUFF
27PF 1% 1%
5% 27PF 1 1 1 1 1 1
50V
2
1/16W
MF
5%
1/16W
MF
R5730 R5729 R5728 NC_DACC_BLUE W7 NC
1 R5733 R5732 R5731
CERM 50V DVOVREF AF4 1 R5725
402 2 402 CERM 2 2 402 75
1%
75
1%
75
1%
1 C5703 DVOVREF NC_DACC_GREEN Y7 C5717
121
75
1%
75
1%
75
1%
NC
402
1/16W 1/16W 1/16W 51 DVODE AE4 DVODE TESTPOINT 0.1UF 1% 1/16W 1/16W 1/16W
NOSTUFF MF MF MF
0.01UF NC_DACC_RED AA6 NC
20%
1/16W MF MF MF
1 402 402 402
10% DVOCLKOUT AJ2 DVOCLKOUT TESTPOINT 2
10V
MF 402 402 402
C5708 1 R5703 2 2 2
2 50V 51 CERM
402
2 2 2
75 X7R TP_DVOCLKOUT_L AK2 DVOCLKOUT* TESTPOINT 402 2
27PF 1%
603
NC_DACC_RSET AC5 NC
5%
1/16W DVOCLKIN AG1 DVOCLKIN
50V
CERM 2 MF
AD5
402 56 51 DVOHSYNC DVOHSYNC
402 2
PLACE CLOSE TO GPU 51 DVOVSYNC AD6 DVOVSYNC TESTPOINT
1
PLACE CLOSE TO VGA CONNECTOR
R5711
10K
5% 51 DVOD0 AG2 DVOD0 STRAPS
NV34 1/16W
AH1
NV18B MF 51 DVOD1 DVOD1
1 1 NV34 402
R5740 R5708 NV18B1 2 56 51 DVOD2 AG3 DVOD2
130 95.3 1
1% 1%
R5700 R5741 56 51 DVOD3 AJ1 DVOD3
1/16W 1/16W 121 124 AH2
MF MF 1% 1% 51 DVOD4 DVOD4
2 402 2 402 1/16W 1/16W
DVOD5 AK1 XTALSSIN AJ7 GPU_XTALSSIN
MF MF 51 DVOD5
402
2 2 402 DVOD6 AJ3
CVBS_D 51 50 49 48 7 PP3V3_AGP
51 DVOD6
DVOD7 AK3 1
59 58 57 56 52 51 DVOD7 R5726
D 3 CRITICAL
56 51 DVOD8 AH4 DVOD8 10K
XTALIN AJ6 GPU_CLK27M_XIN 5%
Q5700 51 DVOD9 AK4 DVOD9 PROPAGATION_DELAY=L:S::6.35 MM 1/16W
56
58 CVBS_CNT 1 IRLML2502 48 7 PP3V3_AGP NOSTUFF MF
G 52 51 50 49 1 DVOD10 AJ4 DVOD10 402
SOT23 59 58 57 R5721 51
2
S 2 1 49.9 51 DVOD11 AH5 DVOD11 XTALOUT AH6 GPU_CLK27M_XOUT
1 R5707 1% PROPAGATION_DELAY=L:S::6.35 MM
R5720 10K 1/16W
B 1K
5%
1/16W
5%
1/16W
MF
2
MF
402
AE8
AD8
DVOVDD AJ5
B
MF 402
2 AD9 XTALOUTBUFF TP_GPU_XTALOUTBUFF
402
2
VOLTAGE=3.3V STRAP0 G1 GPU_STRAP<0> 56
MIN_LINE_WIDTH=25MIL DVOCAL_PD_VDDQ AB6 DVOCAL_PD_VDDQ
MIN_NECK_WIDTH=10MIL STRAP1 G2 GPU_STRAP<1> 56
DVOCAL_PU_GND AB7 DVOCAL_PU_GND
1
C5718 NC_STRAP2 F2 GPU_STRAP<2> 56
0.1UF 6 TP_BUF_RST B1 BUFRST* NC_STRAP3 F3 GPU_STRAP<3> 56
20% TESTPOINT
10V
2 CERM NOSTUFF
402
NOSTUFF R5706
1 5.1M
R5722 1 2
49.9
1% 5%
1/16W 1/16W
MF MF
402 603
1 1 R5734 2
NOTE: KEEP STUB SHORT ->
C5713 1 R5701 10K
10K
0.01UF
20%
5%
1/16W
5%
1/16W
MF
Y5700
SM-3
16V
CERM 2 MF 402
402 1 3
402 2 2
27.000M
CRITICAL
1 C5719 1 C5700
22PF 22PF
5% 5%
50V 50V
2 CERM 2 CERM
402 402
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
59 58 57 56 52 51 50 49 48 7 PP3V3_AGP
1 1 PP3V3_AGP
R5805 R5804 59 58 57 56 52 51 50 49 48 7
10K 10K
1% 1%
1/16W 1/16W
MF MF 1
402 402 R5818 1
2 2 2K R5819
5% 2K
1/16W 5%
D U4900
2
MF
402
1/16W
MF
2 402
NOSTUFF
R5831
D
0 MF 5%
NV18B I2CB_SDA AF6 GRAPH_IIC_SDA2 1 2 SI_SDA 51
0 MF 5%
59 LAMP_STS [IN] 47 1 2 R5802 NV_GPIOD0 G5 GPIOD0 BGA I2CB_SCL AE7 GRAPH_IIC_SCL2 1/16W 402 1 2 R5832 SI_SCL 51
402
[IN] 47 R5820 F4
(5 OF 5) 1/16W 402 NOSTUFF
59 6 MON_DETECT 1 2 MON_DETECT_R GPIOD1 TMDS_XMIT_GPU 0 MF 5%
402
OMIT IFPATXC W2 58 GPU_TMDS_CKP R5833 1 2 TMDS_XMIT_GPU TMDS_CKP 51 59
LCD_PWM [OUT] 47 1 2 R5803 NV_GPIOD2 G4
59 GPIOD2 IFPATXC* V1 58 GPU_TMDS_CKM 1/16W 402 R5834 1
0 MF 5%
2 TMDS_CKM
402 51 59
[OUT] H5
59 FPD_PWR_ON GPIOD3 TMDS_XMIT_GPU
R5835 0 MF 5% 402
IFPATXD0 U4 58 GPU_TMDS_D0P 1 2 TMDS_XMIT_GPU 1/16W TMDS_D0P 51 59
0 MF 5%
57 CVBS_CNT 0 1 2 R5809 NV_GPIOD4 H4 GPIOD4 IFPATXD0* T4 58 GPU_TMDS_D0M 1/16W 402 R5836 1 2 TMDS_D0M 51 59
402 TMDS_XMIT_GPU
[OUT] 0 MF 5% 402
59 INV_CUR_HI 47 1 2 R5830 NV_GPIOD5 J4 GPIOD5 IFPATXD1 Y2 58 GPU_TMDS_D1P R5837 1 2 TMDS_XMIT_GPU 1/16W TMDS_D1P 51 59
0 MF 5%
[IN]
402
IFPATXD1* AA1 58 GPU_TMDS_D1M 1/16W 402 R5840 1 2 TMDS_D1M 51 59
59 TMDS_EN 0 1 2 R5808 NV_GPIOD6 J5 GPIOD6 TMDS_XMIT_GPU 0 MF 5% 402
402
IFPATXD2 V3 58 GPU_TMDS_D2P R5838 1 2 TMDS_XMIT_GPU 1/16W TMDS_D2P 51 59
1 402 10K 1 2 R5817 NV_GPIOD7 J6 GPIOD7 0 MF 5%
R5806 IFPATXD2* W3 58 GPU_TMDS_D2M 1/16W 402 R5839 1 2 TMDS_D2M 51 59
10K 402 10K 1 R5816
1% 2 NV_GPIOD8 K4 GPIOD8 1/16W 402
1/16W IFPATXD3 U5 TP_TMDS_TXD3P 6
MF 402 10K 1 R5815 WHAT IS THE FREQUENCY OF THE Q27 PIXEL CLOCK?
2 NV_GPIOD9 K6 GPIOD9 IFPATXD3* V4 TP_TMDS_TXD3M BETH: 96.21MHZ
2 402 6
IFPBTXC AA2 TP_EXT_TMDS_CKP 6

6 TP_GPU_THERMC H3 THERMD- IFPBTXC* Y3 TP_EXT_TMDS_CKM 6 58 IFP0AVCC
6 TP_GPU_THERMA H2 THERMD+
IFPBTXD4 W4 TP_EXT_TMDS_D0P 6
NOSTUFF
TP_GPU_FPBCLKOUT M3 FPBCLKOUT IFPBTXD4* V5 TP_EXT_TMDS_D0M 6

R5847
59 58 57 56 52 51 50 49 48 7 PP3V3_AGP 49.9
TP_GPU_FPBCLKOUT_L M2 FPBCLKOUT* 58 GPU_TMDS_CKP 1 2
IFPBTXD5 AB3 TP_EXT_TMDS_D1P 6
NV34 1%
R5845 IFPBTXD5* AB2 TP_EXT_TMDS_D1M 6 1/16W
402 10K 1 2 GPU_SWAP_A AF9 SWAPRDY_A MF 402
402 10K 1 2 R5846 NV34 GPU_SWAP_B AD4 IFPBTXD6 Y6 TP_EXT_TMDS_D2P NOSTUFF
SWAPRDY_B 6
C TP_GPU_STEREO Y5 STEREO
IFPBTXD6* W6 TP_EXT_TMDS_D2M 6
58 GPU_TMDS_CKM 1
R5848
49.9
2
C
402 10K 1 2 R5812 GPU_TESTMECLK G24 TESTMEMCLK IFPBTXD7 AC3 TP_TMDS_TXD7P 6
50 49 PPVCORE_GPU 1%
IFPBTXD7* AC2 TP_TMDS_TXD7M 6 1/16W
MF 402
TP_FRWR_PME_L AF10 NC_FRWR_PME*
IFPCTXC P5 TP_DFPCLK 6
NOSTUFF
59 58 57 56 52 51 50 49 48 7 PP3V3_AGP N6 NC_FRWR_VAUXC IFPCTXC* P4 TP_DFPCLK_L 6
R5849
M6 NC_FRWR_VAUXP 49.9
58 GPU_TMDS_D0P 1 2
TP_FRWRLNKON L5 NC_FRWRLNKON IFPCTXD0 R3 TP_DFPD0 6
1%
6 TP_FRWRLPS N5 NC_FRWRLPS IFPCTXD0* T2 TP_DFPD1 6 1/16W
MF 402
1
C5810 U2 TP_DFPD2
0.1UF IFPCTXD1 6
NOSTUFF
20%
IFPCTXD1* T3 TP_DFPD3 6
R5850
10V
2 CERM
49.9
58 GPU_TMDS_D0M 1 2
402
IFPCTXD2 U3 TP_DFPD5 6
1%
IFPCTXD2* V2 TP_DFPD6 6 1/16W
MF 402
59 58 57 56 52 51 50 49 48 7 PP3V3_AGP MAKE TP AS SHORT AS POSSIBLE

NOSTUFF
IFP0VREF AA4 IFPABVPROVE IFPCVPROBE AA3 TP_IFP1VREF 6

R5851
49.9
58 GPU_TMDS_D1P 1 2
L5800 IFP0RSET V6 IFPABRSET IFPCRSET R4 IFP1RSET
1%
1000-OHM-EMI 1/16W
MF 402
1 2
VOLTAGE=3.3V IFP0PLLVDD U10 IFPABPLLVDD IFPCPLLVDD P10 GPU_IFB1IOVDD NOSTUFF
SM MIN_NECK_WIDTH=10MIL
V10 IFPABPLLGND IFPCPLLGND N10 R5852
49.9
58 GPU_TMDS_D1M 1 2
IFP0AVCC T5 IFPAIOVDD IFPCIOVDD R5 GPU_IFP1PLLVDD 1%
1/16W
MF 402
T6 IFPAIOGND IFPCIOGND R6
NOSTUFF
1 1 1
R5800 R5801 R5821 R5853
Y4 IFPBIOVDD 10K 10K 1K 49.9
B W5 IFPBIOGND
1%
1/16W
MF
1%
1/16W
MF
5%
1/16W
MF
58 GPU_TMDS_D2P 1
1%
2
B
402 402 402 1/16W
2 2 2 MF 402
NOSTUFF
OMIT
NOSTUFF 1 1 C5805 1 C5803 1 C5802 1 C5804 R5854
1 C5800 R5807 1
C5811 1 C5801 49.9
1K 0.001UF 4.7UF 0.1UF 0.1UF 58 GPU_TMDS_D2M 1 2
0.1UF 1%
4.7UF 0.1UF 10%
20% 20% 20%
20% 20% 20% 6.3V 10V 10V
10V 1/16W 6.3V 10V 2 50V 2 CERM CERM 2 CERM
1%
2 CERM MF 2 CERM 2 CERM
CERM
805 2 402 402
1/16W
402 402 MF
402 2 805 402 402
L5801
FERR-EMI-100-OHM
1 2 IFP0AVCC
A SM
VOLTAGE=3.3V
58
A
GPU TMDS SWING
TABLE_5_HEAD

TABLE_5_ITEM
114S1003 1 RES,1K OHM,1%,1/16W,0402 R5807 17_INCH_LCD

TABLE_5_ITEM
114S1503 1 RES,1.5K OHM,1%,1/16W,0402 R5807 20_INCH_LCD
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NOSTUFF
EXTERNAL VGA CONNECTOR D5900 PP5V_AGP 7 49 50 59 INTERNAL TMDS CONNECTOR R5926 0
BAV99DW 58 51 TMDS_D2M 1 2
SOT-363 5% MF
2
SDF5900 1/16W 402
STDOFF-118OD-181H-TH L5902 SYM_VER-1
1 90-OHM 1 4
57 56 6 ANALOG_HSYNC_L 6
NOSTUFF 1
R5904 TD2M 6 59
SM
1
200
1%
1 C5907 1/16W
SDF5901 MF
2 3 TD2P 6 59
22PF D5900 NOSTUFF
5% STDOFF-118OD-181H-TH 2 402
2 50V
CERM
BAV99DW R5927 0 5% MF
402
SOT-363 1 58 51 TMDS_D2P 1 2 1/16W 402
5
CRITICAL NOSTUFF
57 56 6 ANALOG_VSYNC_L 3
NOSTUFF (516S0096) R5928 0
D 1 C5908
4
J5902
53307-3091
58 51 TMDS_D1M
1
1 2
5% MF
1/16W 402
D
22PF GND_CHASSIS_VGA 7 59 F-ST-SM
R5903 L5908
5%
CRITICAL 1 2
SYM_VER-1
90-OHM
50V
200 4 1 SM
2 CERM (514-0096) 4
1% TD1M 6 59
3 1/16W
402
MF
5 6 59 6 PPVCC_TMDS VOLTAGE=3.3V
2 402
7 8 3 2 TD1P
FL1702 J5903 MIN_NECK_WIDTH=10MIL
NOSTUFF
6 59
LCFILTER MINI-VGA 59 6 TD0M 9 10

VOLTAGE=3.3V PP3V3_DDC 6 59
R5929 0 5%
SM-220MHZ F-ST-TH MIN_LINE_WIDTH=25MIL MF
59 6 TD0P 11 12
MIN_NECK_WIDTH=10MIL 58 51 TMDS_D1P 1 2 1/16W 402
15
NOSTUFF
57 6 ANALOG_RED 1 2 13 14 TCKM 6 59
R5930
16
16 1
0
2
59 6 TD2M 15 TCKP 6 59 58 51 TMDS_D0M
3 4 L5903 5% MF
CHECK RGB RETURN PINS FERR-220-OHM 59 6 TD2P 17 18 1/16W 402
1
2
1 2
19 20 TD1M 6 59 L5909 SYM_VER-1
3 PP5V_USB2 92 1 90-OHM 1 4
4 (RED_RTN) 21 22 TD1P 6 59 R5902 TD0M 6 59
FILT_ANALOG_RED 5 0805
SM
6 (GRN_RTN) 59 6 TMDS_DDC_DAT 23 24 TMDS_DDC_CLK 6 59 200
FILT_ANALOG_GRN 7
8 26
1%
FL1701 6 DDC_VCC_5 VOLTAGE=5V 25 1/16W 2 3
FILT_ANALOG_BLU 9
MIN_LINE_WIDTH=25MIL MF TD0P 6 59
LCFILTER 11
10 6 VGA_IIC_DAT MIN_NECK_WIDTH=10MIL 27 28
2 402 NOSTUFF
0 5%
SM-220MHZ 12 (BLU_RTN) 29 30 1 C5916 1 C5900 R5931 MF
13
10UF 58 51 TMDS_D0P 1 2 1/16W 402
57 6 ANALOG_GRN 1 2 14 1 C5902 0.01UF NOSTUFF
10% 10%
0.01UF 16V
2 CERM 2 16V R5932 0
3 4 1 C5905 1 C5904 10% CERM
58 51 TMDS_CKM 1 2
17 16V 1210 402 5% MF
0.01UF 0.01UF 1 C5903 2 CERM 1/16W 402
18 10% 10% 402 GND_CHASSIS_TMDS L5910
7 6
2 16V
2 16V 0.01UF 90-OHM
SYM_VER-1
CERM CERM 10% 1
402 402
2 16V R5901 SM 1 4 TCKM 6 59
CERM R5906 200
402
33 1%
GND_CHASSIS_VGA 7 59 57 GRAPH_DDC_SDA 1 2 TMDS_DDC_DAT 6 59 1/16W
FL1700 MF
LCFILTER 5% 2 3 TCKP
2 1/16W 2 402 NOSTUFF
6 59
SM-220MHZ
VGA_IIC_CLK GND_CHASSIS_VGA R5907 MF 0 5%
6 7 59
2K 402 R5933 MF
ANALOG_BLU 1 2
C 57 6
3 4
D5902
BAV99DW
SOT-363 PP3V3_AGP
5%
1/16W
MF
L5901
FERR-220-OHM PP3V3_DDC
58 51 TMDS_CKP 1 2 1/16W 402
C
58 57 56 52 51 50 49 48 7
1 402 6 59
PP5V_AGP 7 49 50 59
2 PP5V_AGP 7 49 50 59
1 2
0805
6
NOSTUFF 1
58 6 MON_DETECT R5905 1 C5901
1 1 2K 0.01UF
R5911 R5910 1
5%
10%
16V
2K 2K 1/16W 2 CERM
ROUTE THE ANALOG RGB TRACES AT 37.5 OHMS. 5% 5% MF
1/16W 1/16W 402
R5900 402
2
MF
402
MF
402
D5902 57 GRAPH_DDC_SCL 1
33
2 TMDS_DDC_CLK 6 59
2 2 R5908
33 BAV99DW 5%
57 MON_I2C_SDA 1 2 SOT-363 1/16W
MF
5% 5 402
1/16W
MF
402 3
NOSTUFF
INVERTER INTERFACE
R5909 20" LCD INVERTER NEED +24V.
4
17_INCH_LCD 17" LCD INVERTER NEED +12V.
33
MON_I2C_SCL 1 2 17_INCH_LCD
57
5%
GND_CHASSIS_VGA 7 59 Q5903 CRITICAL
1/16W
MF
C5909 1 1 C5906 SI3433DV
TSOP L5904 17_INCH_LCD
J5900
402 47PF 47PF 1
FERR-220-OHM
42375
5% 5% M-ST-TH
50V
2 2 50V 2 59 50 7 PP12V_AGP
PP3V3_RUN PP12V_RUN CERM CERM 1 2
VOLTAGE=12V 6 PP12V_INV 1
402 402 5 0805 MIN_LINE_WIDTH=100MIL
PP5V_AGP GND_17_INV 2
49 50 59
VOLTAGE=3V 59 50 49 7 MIN_NECK_WIDTH=10MIL VOLTAGE=0V 6

MIN_LINE_WIDTH=25MIL Q5903_GATE 3 6 L5905 17_INCH_LCD MIN_LINE_WIDTH=100MIL
PP5V_AGP_RL 3
49 50 59
6
MIN_NECK_WIDTH=10MIL FERR-220-OHM VOLTAGE=5V MIN_NECK_WIDTH=10MIL
17_INCH_LCD 20_INCH_LCD 4 MIN_LINE_WIDTH=100MIL
4
1 1 2
MIN_NECK_WIDTH=10MIL 6 INV_17_LCD_PWM_F
R5923 1 MIN_LINE_WIDTH=25MIL 17_INCH_LCD 5
LAMP_STS_F
R5920
7
NOSTUFF NOSTUFF NOSTUFF 6

PP5V_AGP 0 R5922 MIN_NECK_WIDTH=10MIL
0805
1 1 100K 2 INV_17_CUR_HI_F 6
7
PP5V_AGP R5917 1 C5923 5%

1/8W 5%
0
5 6 7 8 1 L5906 17_INCH_LCD
6
SENSE 102 FF 1/8W 17_INCH_LCD FERR-220-OHM

VR5900 1% 330UF 2 1206 FF
PP3V3_RUN PP12V_RUN
5%
1 518-0135
EZ1583
1/16W
MF
20%
2 6.3V 2 1206
1/16W
MF R5921 PP5V_AGP_P_SEQ 1 2
TO263-5 402 POLY Q5900 402 10K MIN_LINE_WIDTH=100MIL 0805
B 5
VPWR VOUT
3 2 SM-2
4
FDS4465
SO-8
59 50 7 PP12V_AGP
5%
1/16W
MF
L5907
FERR-220-OHM
17_INCH_LCD B
4
VCTRL VOUT 6 NOSTUFF NOSTUFF 17_INCH_LCD 2 402
ADJTAB
1 1 1
R5934 R5935 R5919 3 NOSTUFF Q5902_DRAIN 59 58 LCD_PWM 1
0805
2
2 1 2 3 0 0
L5900
200K D5901 3
L5911
5% 5% 5%
1/16W
1N914 D
17_INCH_LCD 17_INCH_LCD
FPD_PWR_SW_S
1/8W
FF
1/8W
FF
FERR-220-OHM
MF 1
SOT23 Q5902 FERR-220-OHM
FP_ADJ 2 1206
2 1206
1 2 2 402
2N7002
C5918 PPVCC_TMDS 6 59 SM 58 LAMP_STS 1 2
NOSTUFF NOSTUFF NOSTUFF NOSTUFF Q5902_GATE 1 G S 0805
C5919 0.0022UF 0805 17_INCH_LCD 17_INCH_LCD
1
C5924 1
C5925 1
C5926 1
R5918 0.01UF 402 PPVCC_FPD 1 17_INCH_LCD L5912
10UF 10UF 0.022UF 182 2 1 FPD_PWR_SW_G 2 1 R5916 1 C5920 2 FERR-220-OHM
10%
16V
10%
16V
10%
50V 1% 100K 0.1UF
2 CERM 2 CERM 2 CERM 1/16W
20% 1 OMIT 10%
5% 20% 59 58 INV_CUR_HI 1 2
MF OMIT 1/16W 0805
1210 1210 805
402
R5925 16V R5913 50V 1 C5917 MF
10V
2 CERM 17_INCH_LCD 17_INCH_LCD 17_INCH_LCD 17_INCH_LCD 17_INCH_LCD 17_INCH_LCD
1
2
1
100K
2
CERM
402
10K
5%
CERM
1
R5914
10UF R5912 2 402 402 17_INCH_LCD 17_INCH_LCD 1
C5910 1
C5913 1
C5911 1
C5912 1
C5914 1
C5915
1/16W
10%
16V 330 1
C5921 1
C5922 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
5% MF 10K 2 CERM 5%
1/16W 402 5% 1/16W 10UF 10UF 20% 20% 20% 20% 20% 20%
MF 2 1210 20% 20% 50V 50V 50V 50V 50V 50V
1/16W MF 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 FPD_PWR_ON_D MF
2 603 2 16V 2 16V
603 603 603 603 603 603
402 ELEC ELEC
2 SM SM
3
D TMDS_EN 1 GND_CHASSIS_17_INCH_INVERTER
Q5901 58
20_INCH_LCD LED5900
7
2N7002
SM
3 DZ5900 GREEN 20_INCH_LCD
CRITICAL
FPD_PWR_ON 1 G S 1N5227B 2.0X1.25
58
SOT23
2
L5913
J5901
1 2 1 SILKSCREEN: 3
20_INCH_LCD
53048
R5915 7 PP24V_GRAPHICS FERR-220-OHM RT-S-TH
100K 1 2 1
5% VOLTAGE=24V 6 PP24V_INV
0805
1/16W MIN_LINE_WIDTH=100MIL 2
MF MIN_NECK_WIDTH=10MIL
402
2
L5914 20_INCH_LCD
3
FERR-220-OHM VOLTAGE=0V 6 GND_20_INV
1 2
INV_20_LCD_PWM_ 5
A L5915
0805
20_INCH_LCD
6
6 INV_20_CUR_HI_F 6 A
FERR-220-OHM
1 2 518-0141
59 58 LCD_PWM
TABLE_5_HEAD
0805
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION NOTE:REMOVED 2 PINS:LAMP_STATUS &
TABLE_5_ITEM
L5916 20_INCH_LCD ON/OFF FOR 20" LCD INVETER.
FERR-220-OHM
116S1104 1 RES,10K OHM,1/16W,5%,0402 R5913 17_INCH_LCD
TABLE_5_ITEM
59 58 INV_CUR_HI 1 2
116S1105 1 RES,100K OHM,1/16W,5%,0402 R5913 20_INCH_LCD 0805
NOSTUFF 20_INCH_LCD 20_INCH_LCD 20_INCH_LCD 20_INCH_LCD 20_INCH_LCD
TABLE_5_ITEM
113S1332 1 RES,330 OHM,1/16W,5%,0603 R5912 17_INCH_LCD C5947 1 1 C5942 1 C5943 1 C5944 1 C5945 1 C5946
TABLE_5_ITEM 1UF 1UF 0.01UF 0.01UF 0.01UF 0.01UF
113S1123 1 RES,1.2K OHM,1/16W,5%,0603 R5912 20_INCH_LCD 20% 20% 20% 20% 20% 20%
50V 50V 50V 50V 50V 50V
CERM 2 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
1210 1210 603 603 603 603
GND_CHASSIS_20_INCH_INVERTER
7
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
R6000 64 62 60 HT_NB_TO_SB_CLK_P HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CLK I46

48 37 28 7 PP1V5_PWRON_NB_AVDD
2.2 PP2V5_HT 64 62 60 HT_NB_TO_SB_CLK_N HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CLK I47
1 2 PP1V5_PWRON_HT_NB_AVDD 7 60 64
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL 64 62 60 HT_NB_TO_SB_CTL_P HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CTL I83
1/16W HT_NB_TO_SB_CTL_N HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CTL
MF
603
1 C6013 1 C6012 PP1V2_HT 7 24 60
64 62 60
HT_NB_TO_SB_CAD_P<0> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD0

I82
1UF 0.1UF 64 62 60 I51

10% 20% 64 62 60 HT_NB_TO_SB_CAD_N<0> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD0 I50
2 6.3V
CERM
10V
2 CERM
J10
N10
402 402 64 62 60 HT_NB_TO_SB_CAD_P<1> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD1
F8
G6
T4
T8
R9
N2
N6
L9
I52
D HT_CLK
AVDD
VDD_HT
2_5
VDD_HT
1_2
64 62 60
64 62 60
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB
HT_NB_TO_SB
HT_1V2
HT_1V2
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD2
I53
I54
D
HT_NB_TO_SB_CAD_N<2> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD2
HT_CLK66M_NB H9 HT_CLK
U3 64 62 60
HT_NB_TO_SB_CAD_P<3>
I55
27 U3LITE 64 62 60 HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD3 I56
V1.0-300MM 64 62 60 HT_NB_TO_SB_CAD_N<3> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD3 I57
N1 HT_CLK_RXP0 PBGA
64 62 60 HT_SB_TO_NB_CLK_P (SYM 5 OF 7) HT_CLK_TXP0 R7 HT_NB_TO_SB_CLK_P 60 62 64 64 62 60 HT_NB_TO_SB_CAD_P<4> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD4 I58
HT_SB_TO_NB_CLK_N P1 HT_CLK_RXN0 HT_CLK_TXN0 R8 HT_NB_TO_SB_CLK_N HT_NB_TO_SB_CAD_N<4> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD4
64 62 60 HT 60 62 64 64 62 60 I59
INTERFACE 64 62 60 HT_NB_TO_SB_CAD_P<5> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD5 I60
64 62 60 HT_SB_TO_NB_CAD_P<0> L1 HT_CAD_RXP0 HT_CAD_TXP0 U8 HT_NB_TO_SB_CAD_P<0> 60 62 64 64 62 60 HT_NB_TO_SB_CAD_N<5> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD5 I61
L2 HT_CAD_RXN0 OMIT
64 62 60 HT_SB_TO_NB_CAD_N<0> HT_CAD_TXN0 U7 HT_NB_TO_SB_CAD_N<0> 60 62 64 64 62 60 HT_NB_TO_SB_CAD_P<6> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD6 I62
64 62 60 HT_SB_TO_NB_CAD_P<1> L3 HT_CAD_RXP1 HT_CAD_TXP1 U6 HT_NB_TO_SB_CAD_P<1> 60 62 64 64 62 60 HT_NB_TO_SB_CAD_N<6> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD6 I63
64 62 60 HT_SB_TO_NB_CAD_N<1> L4 HT_CAD_RXN1 HT_CAD_TXN1 U5 HT_NB_TO_SB_CAD_N<1> 60 62 64 64 62 60 HT_NB_TO_SB_CAD_P<7> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD7 I64
64 62 60 HT_SB_TO_NB_CAD_P<2> M4 HT_CAD_RXP2 HT_CAD_TXP2 U4 HT_NB_TO_SB_CAD_P<2> 60 62 64 64 62 60 HT_NB_TO_SB_CAD_N<7> HT_NB_TO_SB HT_1V2 HT_NB_TO_SB_CAD7 I65
64 62 60 HT_SB_TO_NB_CAD_N<2> M3 HT_CAD_RXN2 HT_CAD_TXN2 U3 HT_NB_TO_SB_CAD_N<2> 60 62 64
64 62 60 HT_SB_TO_NB_CAD_P<3> M2 HT_CAD_RXP3 HT_CAD_TXP3 R5 HT_NB_TO_SB_CAD_P<3> 60 62 64 64 62 60 HT_SB_TO_NB_CLK_P HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CLK I48

64 62 60 HT_SB_TO_NB_CAD_N<3> M1 HT_CAD_RXN3 HT_CAD_TXN3 R6 HT_NB_TO_SB_CAD_N<3> 60 62 64 64 62 60 HT_SB_TO_NB_CLK_N HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CLK I49
64 62 60 HT_SB_TO_NB_CAD_P<4> P2 HT_CAD_RXP4 HT_CAD_TXP4 P8 HT_NB_TO_SB_CAD_P<4> 60 62 64 64 62 60 HT_SB_TO_NB_CTL_P HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CTL I84
64 62 60 HT_SB_TO_NB_CAD_N<4> P3 HT_CAD_RXN4 HT_CAD_TXN4 P7 HT_NB_TO_SB_CAD_N<4> 60 62 64 64 62 60 HT_SB_TO_NB_CTL_N HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CTL I85
64 62 60 HT_SB_TO_NB_CAD_P<5> R3 HT_CAD_RXP5 HT_CAD_TXP5 P6 HT_NB_TO_SB_CAD_P<5> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_P<0> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD0 I66
64 62 60 HT_SB_TO_NB_CAD_N<5> R2 HT_CAD_RXN5 HT_CAD_TXN5 P5 HT_NB_TO_SB_CAD_N<5> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_N<0> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD0
PP2V5_HT I67
64 60 7
64 62 60 HT_SB_TO_NB_CAD_P<6> R1 HT_CAD_RXP6 HT_CAD_TXP6 M5 HT_NB_TO_SB_CAD_P<6> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_P<1> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD1 I68
64 62 60 HT_SB_TO_NB_CAD_N<6> T1 HT_CAD_RXN6 HT_CAD_TXN6 M6 HT_NB_TO_SB_CAD_N<6> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_N<1> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD1 I69
64 62 60 HT_SB_TO_NB_CAD_P<7> U1 HT_CAD_RXP7 HT_CAD_TXP7 M7 HT_NB_TO_SB_CAD_P<7> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_P<2> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD2
1 1 1 1 I70
R6005 R6004 R6003 R6002 64 62 60 HT_SB_TO_NB_CAD_N<7> U2 HT_CAD_RXN7 HT_CAD_TXN7 M8 HT_NB_TO_SB_CAD_N<7> 60 62 64 64 62 60 HT_SB_TO_NB_CAD_N<2> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD2 I71
1K 1K 1K 1K
5% 5% 5% 5% 64 62 60 HT_SB_TO_NB_CAD_P<3> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD3 I72
1/16W 1/16W 1/16W 1/16W V2 HT_CTL_RXP0
MF MF MF MF 64 62 60 HT_SB_TO_NB_CTL_P HT_CTL_TXP0 L6 HT_NB_TO_SB_CTL_P 60 62 64 64 62 60 HT_SB_TO_NB_CAD_N<3> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD3 I73
2 402 2 402 2 402 2 402 64 62 60 HT_SB_TO_NB_CTL_N V1 HT_CTL_RXN0 HT_CTL_TXN0 L5 HT_NB_TO_SB_CTL_N 60 62 64 64 62 60 HT_SB_TO_NB_CAD_P<4> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD4 I74
C 64 62 60 HT_PWROK F9 HT_PWROK
64 62 60
64 62 60
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB
HT_SB_TO_NB
HT_1V2
HT_1V2
HT_SB_TO_NB_CAD4
HT_SB_TO_NB_CAD5
I75 C
I76
64 62 60 HT_RESET_L G9 HT_RESET* 64 62 60 HT_SB_TO_NB_CAD_N<5> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD5 I77
64 62 60 HT_LDTSTOP_L H8 HT_LDTSTOP* HT_PVTREF0 L7 HT_NB_PVTREF0 64 62 60 HT_SB_TO_NB_CAD_P<6> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD6 I78
64 62 60 HT_LDTREQ_L H7 HT_LDTREQ* HT_PVTREF1 L8 HT_NB_PVTREF1 64 62 60 HT_SB_TO_NB_CAD_N<6> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD6 I79
1
HT_CLK_AVSS R6001 64 62 60 HT_SB_TO_NB_CAD_P<7> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD7 I80
200 64 62 60 HT_SB_TO_NB_CAD_N<7> HT_SB_TO_NB HT_1V2 HT_SB_TO_NB_CAD7
G8
I81
1%
1/16W
MF
2 402 64 62 60 HT_PWROK HT_PWROK HT_2V5 I86
64 62 60 HT_RESET_L HT_CTL HT_2V5 I87
64 62 60 HT_LDTSTOP_L HT_CTL HT_2V5 I88
64 62 60 HT_LDTREQ_L HT_CTL HT_2V5 I89
HT_1V2 HT_2V5
5 MIL SPACING FOR DIFF PAIR 4 MIL SPACING IN GROUP
10 MIL SPACING TO ANYTHING ELSE 8 MIL SPACING TO ANYTHING ELSE
64 60 7 PP2V5_HT 60 24 7 PP1V2_HT
1 C6010 1 C6011 1 C6000 1 C6001 1 C6002 1 C6004 1 C6005 1 C6006 1 C6007 1 C6008 LENGTH TOLERENCE DOES NOT NEED TO BE SPECIFIED
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF MATCHED GROUP CONSTRAINT IS TIGHT ENOUGH
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
B 2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
10V
2 CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402 B
A A
8
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15 MIL SPACING HT_CLK66M_SB_C 62
Page Notes
Power aliases required by this page:
- _PP2V5_PWRON_HT
- _PP1V2_PWRON_HT
D (NONE) D
BOM options provided by this page: _PP2V5_PWRON_HT 7
(NONE)
1 C6220
L6200 PP1V2_PWRON_HT_PLLDVDD
VOLTAGE=1.2V
0.1uF
20%
62 7 _PP1V2_PWRON_HT FERR-EMI-600-OHM MIN_LINE_WIDTH=20 mil 10V
2 CERM
1 2 MIN_NECK_WIDTH=15 mil 402
SM
1 C6200 1 C6201
10uF 0.001uF _PP1V2_PWRON_HT 7 62
20% 10%
6.3V 50V
2 CERM 2 CERM
1206 402
1 C6230 1 C6231 1 C6232
0.1uF 0.1uF 0.1uF
20% 20% 20%
2 10V
CERM
10V
2 CERM 2 10V
CERM
L6210 PP1V2_PWRON_HT_PLLAVDD
VOLTAGE=1.2V
402 402 402
FERR-EMI-600-OHM MIN_LINE_WIDTH=20 mil
1 2 MIN_NECK_WIDTH=15 mil
SM
1 C6210 1 C6211 _PP1V2_PWRON_HT 7 62
10uF 0.001uF
20% 10%
6.3V 50V
2 CERM 2 CERM
B15
B17
G13
B12
B19
G11
C6240 C6241 C6242
C7
B6
B9
1206 402 1 1 1
0.1uF 0.1uF 0.1uF
AVDD DVDD VDDP HT_RXVDD HT_TXVDD 20% 20% 20%
10V 10V 10V
HT_PLL HT OMIT 2 CERM 2 CERM 2 CERM
402 402 402
C U2300 C
SHASTA
V1.0
BGA
HT_NB_TO_SB_CLK_P D15 HT_CLKIN_P B10 HT_SB_TO_NB_CLK_P
64 60 (3 OF 8) HT_CLKOUT_P 60 64
HT_NB_TO_SB_CLK_N C15 HT_CLKIN_N HT_CLKOUT_N A10 HT_SB_TO_NB_CLK_N
HYPERTRANSPORT
64 60 60 64
64 60 HT_NB_TO_SB_CAD_P<0> D17 HT_CADIN_0_P HT_CADOUT_0_P D10 HT_SB_TO_NB_CAD_P<0> 60 64
64 60 HT_NB_TO_SB_CAD_N<0> C17 HT_CADIN_0_N HT_CADOUT_0_N C10 HT_SB_TO_NB_CAD_N<0> 60 64
64 60 HT_NB_TO_SB_CAD_P<1> B18 HT_CADIN_1_P HT_CADOUT_1_P B8 HT_SB_TO_NB_CAD_P<1> 60 64
64 60 HT_NB_TO_SB_CAD_N<1> A18 HT_CADIN_1_N HT_CADOUT_1_N A8 HT_SB_TO_NB_CAD_N<1> 60 64
64 60 HT_NB_TO_SB_CAD_P<2> F15 HT_CADIN_2_P HT_CADOUT_2_P E11 HT_SB_TO_NB_CAD_P<2> 60 64
64 60 HT_NB_TO_SB_CAD_N<2> E15 HT_CADIN_2_N HT_CADOUT_2_N F11 HT_SB_TO_NB_CAD_N<2> 60 64
64 60 HT_NB_TO_SB_CAD_P<3> D16 HT_CADIN_3_P HT_CADOUT_3_P D11 HT_SB_TO_NB_CAD_P<3> 60 64
64 60 HT_NB_TO_SB_CAD_N<3> C16 HT_CADIN_3_N HT_CADOUT_3_N C11 HT_SB_TO_NB_CAD_N<3> 60 64
64 60 HT_NB_TO_SB_CAD_P<4> B16 HT_CADIN_4_P HT_CADOUT_4_P A11 HT_SB_TO_NB_CAD_P<4> 60 64
64 60 HT_NB_TO_SB_CAD_N<4> A16 HT_CADIN_4_N HT_CADOUT_4_N B11 HT_SB_TO_NB_CAD_N<4> 60 64
64 60 HT_NB_TO_SB_CAD_P<5> D14 HT_CADIN_5_P HT_CADOUT_5_P C12 HT_SB_TO_NB_CAD_P<5> 60 64
64 60 HT_NB_TO_SB_CAD_N<5> C14 HT_CADIN_5_N HT_CADOUT_5_N D12 HT_SB_TO_NB_CAD_N<5> 60 64
64 60 HT_NB_TO_SB_CAD_P<6> E14 HT_CADIN_6_P HT_CADOUT_6_P E12 HT_SB_TO_NB_CAD_P<6> 60 64
64 60 HT_NB_TO_SB_CAD_N<6> F14 HT_CADIN_6_N HT_CADOUT_6_N F12 HT_SB_TO_NB_CAD_N<6> 60 64
64 60 HT_NB_TO_SB_CAD_P<7> B14 HT_CADIN_7_P HT_CADOUT_7_P A13 HT_SB_TO_NB_CAD_P<7> 60 64
64 60 HT_NB_TO_SB_CAD_N<7> A14 HT_CADIN_7_N HT_CADOUT_7_N B13 HT_SB_TO_NB_CAD_N<7> 60 64
64 60 HT_NB_TO_SB_CTL_P F13 HT_CTLIN_P HT_CTLOUT_P C13 HT_SB_TO_NB_CTL_P 60 64
64 60 HT_NB_TO_SB_CTL_N E13 HT_CTLIN_N HT_CTLOUT_N D13 HT_SB_TO_NB_CTL_N 60 64
64 60 HT_PWROK E16 HT_PWROK_H

64 60 HT_RESET_L C18 HT_RESET_L
B C6255
0.1uF
64 60 HT_LDTSTOP_L E17 HT_LDTSTOP_L HT_LDTREQ_L A19 HT_LDTREQ_L 60 64 B
27 HT_CLK66M_SB 1 2 62 HT_CLK66M_SB_C C8 HT_REFCLK HT_R100P E10 SB_HT_R100_P
SB_HT_S100M66M D8 HT_S100M66M HT_R100N F10 SB_HT_R100_N
20%
V6 SEL_HT00_H
R6250
R62551 10V
CERM
402
SB_SELHT100
1
82.5 2
332
1% AC coupled HT_PLL 1%
1/16W 1/16W
MF 1.0V pk-pk AGND DGND HT_RXGND HT_TXGND C6250 1 MF 1 C6251
C6
A6
A15
A17
G12
A12
A9
G10
402 2 402
47pF 47pF
5% 5%
50V 50V
CERM 2 2 CERM
402 402
62 7 _PP1V2_PWRON_HT
NO STUFF
R62521
4.7K
5%
1/16W
MF
402 2
NO STUFF
R62531 R62511
4.7K 1K
5% 5%
1/16W 1/16W
MF MF
402 2 402 2
A A
HT RefClk HT I/F Speed
1 = 100MHz 1 = 100MHz
0 = 66MHz 0 = 200MHz
(Internal Pull-Up)
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
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SAME CONNECTORS & PINOUT AS D

D
Q37 HYPERTRANSPORT BETWEEN GOLEM AND K2
NOSTUFF
NOSTUFF NOSTUFF
J6400 J6401 J6402
P6860
ST-SM-DF P6860 P6860
SYM_VER1 ST-SM-DF ST-SM-DF
SYM_VER1 SYM_VER1
NOSTUFF
R6400
62 60 HT_NB_TO_SB_CLK_N A15
A15 A15
0
A14 CLK- 62 60 HT_SB_TO_NB_CAD_P<0> 62 60 HT_SB_TO_NB_CLK_N 1 2
CLK- CLK-
GND
B12 HT_NB_TO_SB_CAD_N<7> 60 62
A14 A14 5%
62 60 HT_NB_TO_SB_CLK_P A13 D15 GND
B12 HT_SB_TO_NB_CAD_P<1> 60 62 GND
B12 TEK_HT_B12 1/10W
CLK+
B11 62 60 HT_SB_TO_NB_CAD_N<0> A13 D15 62 60 HT_SB_TO_NB_CLK_P A13 D15 MF
GND CLK+
B11 CLK+
B11 603
B10 HT_NB_TO_SB_CAD_P<7> 60 62 GND NOSTUFF GND
HT_NB_TO_SB_CAD_P<6> A12 B10 HT_SB_TO_NB_CAD_N<1> B10 TEK_HT_B10
62 60
A11 D13
D14
62 60 HT_SB_TO_NB_CAD_N<2> A12 D14
60 62
R6403 TEK_HT_A12 A12 D14
B9 HT_NB_TO_SB_CAD_N<5> A11 D13

1
0 2 A11 D13
GND 60 62
62 60 HT_NB_TO_SB_CAD_N<6> A10 D11 GND
B9 HT_SB_TO_NB_CAD_P<3> 60 62 GND
B9 HT_RESET_L 60 62
D12
B8 62 60 HT_SB_TO_NB_CAD_P<2> A10 D11 5% TEK_HT_A10 A10 D11
B8 B8
C 62 60 HT_NB_TO_SB_CAD_N<4> A9
D9
GND
D10
B7 HT_NB_TO_SB_CAD_P<5> 60 62
62 60 HT_SB_TO_NB_CAD_P<4> A9
D12
GND
D10
B7 HT_SB_TO_NB_CAD_N<3> 60 62
1/10W
603
TEK_HT_A9 A9
D12
GND
D10
B7 C
A8 D9 NOSTUFF D9
B6 HT_NB_TO_SB_CAD_P<3> A8 A8
62 60 HT_NB_TO_SB_CAD_P<4> A7 GND
D7
B5
60 62
A7 GND
B6 HT_SB_TO_NB_CAD_N<5> 60 62
R6404 A7 GND
B6 HT_LDTREQ_L 60 62
D8 62 60 HT_SB_TO_NB_CAD_N<4> D7
B5 1
0 2
TEK_HT_A7 D7
B5
GND D8 D8
B4 HT_NB_TO_SB_CAD_N<3> 60 62 GND GND
62 60 HT_NB_TO_SB_CAD_N<2> A6 D6
B4 HT_SB_TO_NB_CAD_P<5> 60 62 5% B4
D5 62 60 HT_SB_TO_NB_CAD_P<6> A6 D6 1/10W A6 D6
A5 D5 MF D5
GND
B3 HT_NB_TO_SB_CAD_P<1> 60 62
A5 603 A5
62 60 HT_NB_TO_SB_CAD_P<2> A4 D3 GND
B3 HT_SB_TO_NB_CAD_N<7> 60 62 GND
B3 HT_NB_TO_SB_CTL_N 60 62
D4
B2 62 60 HT_SB_TO_NB_CAD_N<6> A4 D3 62 60 HT_LDTSTOP_L A4 D3
GND D4
B2 D4
B2
B1 HT_NB_TO_SB_CAD_N<1> 60 62 GND GND
62 60 HT_NB_TO_SB_CAD_N<0> A3 D2
B1 HT_SB_TO_NB_CAD_P<7> 60 62
B1 HT_NB_TO_SB_CTL_P 60 62
D1 62 60 HT_SB_TO_NB_CTL_P A3 D2
A3 D2
A2 D1 D1
GND
A2 A2
62 60 HT_NB_TO_SB_CAD_P<0> A1 GND GND
D0 62 60 HT_SB_TO_NB_CTL_N A1 62 60 HT_PWROK A1
D0 D0
PP2V5_HT 7 60
DEVELOPMENT
R6401
1
10K
5%
1/16W
MF
2 402
HT_VREF_DEBUG
VOLTAGE=1.25V DEVELOPMENT
MIN_LINE_WIDTH=25MIL R6402
1
10K
5%
1/16W
MF
2 402
B B
A A
8
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8 7 6 5 4 3 2 1
PCI_AD PCI_AD<31..28> 6 74 75 76 77
PCI_AD27 PCI_AD<27> 6 74 75 76 77
PCI_AD PCI_AD<26..24> 6 74 75 76 77
PCI_AD23 PCI_AD<23> 6 74 76 77
PCI_AD22 PCI_AD<22> 6 74 76 77
PCI_AD21 PCI_AD<21> 6 74 76 77
PCI_AD20 PCI_AD<20> 6 74 75 76 77
PCI_AD PCI_AD<19..18> 6 74 75 76 77
PCI_AD17 PCI_AD<17> 6 74 75 76 77
PCI_AD PCI_AD<16..0> 6 74 75 76 77
D PCI PCI_CBE_L<3..0> 6 74 76 77
D
PCI PCI_PAR 6 74 76 77
PCI_CTL PCI_DEVSEL_L 6 74 76 77
PCI_CTL PCI_FRAME_L 6 74 76 77
PCI_CTL PCI_IRDY_L 6 74 76 77
PCI_CTL PCI_TRDY_L 6 74 76 77
PCI_CTL PCI_STOP_L 6 74 76 77
Page Notes
- _PP3V3_PCI
- _PP3V3_SB_PCI (can be _PP3V3_PCI)
- _PP2V5_PWRON_SB _PP3V3_SB_PCI
7

(NONE) NO STUFF
BOM options provided by this page:

1 C7410 1 C7400 1 C7401 1 C7402 1 C7403 1 C7404
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
(NONE) 20% 20% 20% 20% 20% 20%
2 6.3V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
805 402 402 402 402 402
PCI Devices implemented on this page: _PP2V5_PWRON_SB 7 23 25 88
AD11 - PCI0 (0x106B/0x0053)
AD11 - PCI1 (0x106B/0x0054)
NO STUFF
AD11 - PCI2 (0x106B/0x0055) 1 C7411 1 C7405 1 C7406 1 C7407 1 C7408 1 C7409 C7420 1 C7421 1 C7422 1 C7423 1
AD23 - KeyLargo (0x106B/0x004F, PCI1) 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
C AD28
AD29
-
-
SATA 150
UATA 133
(0x1166/0x0240,
(0x106B/0x0050,
PCI0 or 2)
PCI0 or 2)
6.3V
2 CERM
805
10V
2 CERM
402
10V
2 CERM
402
10V
2 CERM
402
10V
2 CERM
402
10V
2 CERM
402
10V
CERM 2
402
10V
CERM 2
402
10V
CERM 2
402
10V
CERM 2
402
C
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
AA22
B22
E21
H16
J21
M16
N21
R20
U21
V19
B20
J18
N20
U20
AD31 - Ethernet (0x106B/0x0051, PCI0)
VDDOPC PCIVDDP
U2300 OMIT
SHASTA
V1.0
BGA
27 PCI_CLK66M_SB_INT AB9 PCIBR_CLK_H PCI1AD_0_H L18 PCI_AD<0> 6 74 75 76 77
(4 OF 8)
PCI1AD_1_H K19 PCI_AD<1> 6 74 75 76 77
27 8 PCI_CLK33M_SB_EXT U19 PCI1CLK_H PCI1AD_2_H L22 PCI_AD<2> 6 74 75 76 77
PCI1AD_3_H M22 PCI_AD<3> 6 74 75 76 77

PCI PCI1AD_4_H M18 PCI_AD<4> 6 74 75 76 77
PCI1AD_5_H L20 PCI_AD<5> 6 74 75 76 77
PCI1AD_6_H M21 PCI_AD<6> 6 74 75 76 77
PCI1AD_7_H N16 PCI_AD<7> 6 74 75 76 77
PCI1AD_8_H M20 PCI_AD<8> 6 74 75 76 77
PCI1AD_9_H P22 PCI_AD<9> 6 74 75 76 77

"Slot A" - AD17
AB18 PCI1AD_10_H M17 PCI_AD<10> 6 74 75 76 77
_PP3V3_PCI 7 25 74 75 76 77 76 74 6 PCI_SLOTA_REQ_L PCI1REQ_0_L
AA18 PCI1AD_11_H N18 PCI_AD<11> 6 74 75 76 77
76 74 6 PCI_SLOTA_GNT_L PCI1GNT_0_L
RP7400 PCI1AD_12_H M19 PCI_AD<12> 6 74 75 76 77
4.7K PCI1AD_13_H N19 PCI_AD<13> 6 74 75 76 77
2 7 PCI_SLOTA_REQ_L 6 74 76 "Slot G" - AD27
AB20 PCI1AD_14_H P21 PCI_AD<14> 6 74 75 76 77
5% 77 74 PCI_SLOTG_REQ_L PCI1REQ_1_L
1/16W
SM1
RP7400 77 74 PCI_SLOTG_GNT_L AB19 PCI1GNT_1_L
PCI1AD_15_H R22 PCI_AD<15> 6 74 75 76 77
4.7K PCI1AD_16_H P20 PCI_AD<16> 6 74 75 76 77
B 1
5%
8 PCI_SLOTA_GNT_L 6 74 76
"Slot D" - AD20

PCI1AD_17_H V21 PCI_AD<17> 6 74 75 76 77
77 76 75 74 25 7 _PP3V3_PCI
B
RP7400 1/16W
SM1 74 PCI_SLOTD_REQ_L V17 PCI1REQ_2_L
PCI1AD_18_H P18 PCI_AD<18> 6 74 75 76 77
4
4.7K 5 V18 PCI1AD_19_H T20 PCI_AD<19> 6 74 75 76 77 RP7402
PCI_SLOTG_REQ_L 74 77 74 PCI_SLOTD_GNT_L PCI1GNT_2_L
PCI1AD_20_H R16 PCI_AD<20> 6 74 75 76 77
3
4.7K 6
5% 77 76 74 6 PCI_DEVSEL_L
1/16W
SM1
RP7400 PCI1AD_21_H R17 PCI_AD<21> 6 74 76 77
5%
4.7K PCI1AD_22_H W21 PCI_AD<22> 6 74 76 77 RP7402 1/16W
3 6 PCI_SLOTG_GNT_L 74 77 SM1
PCI1AD_23_H Y22 PCI_AD<23> 6 74 76 77
4
4.7K 5
5% 77 76 74 6 PCI_FRAME_L
RP7401 1/16W
SM1
PCI1AD_24_H R18 PCI_AD<24> 6 74 75 76 77
5%
4.7K PCI1AD_25_H T19 PCI_AD<25> 6 74 75 76 77 1/16W RP7402
3 6 PCI_SLOTD_REQ_L SM1
74
PCI1AD_26_H T18 PCI_AD<26> 6 74 75 76 77 4.7K
5% 77 76 74 6 PCI_IRDY_L 2 7
1/16W
SM1
RP7401 PCI1AD_27_H Y21 PCI_AD<27> 6 74 75 76 77
5%
4.7K PCI1AD_28_H W20 PCI_AD<28> 6 74 75 76 77 RP7402 1/16W
4 5 PCI_SLOTD_GNT_L SM1
74
PCI1AD_29_H T16 PCI_AD<29> 6 74 75 76 77 4.7K
5% 77 76 74 6 PCI_TRDY_L 1 8
1/16W PCI1AD_30_H AA21 PCI_AD<30> 6 74 75 76 77
SM1 5%
PCI1AD_31_H T17 PCI_AD<31> 6 74 75 76 77 1/16W
SM1
RP7401
4.7K
PCI1C_BE_0_L L19 PCI_CBE_L<0> 6 74 76 77 77 76 74 6 PCI_STOP_L 7 2
PCI1C_BE_1_L P16 PCI_CBE_L<1> 6 74 76 77 5%

V22 1/16W
PCI1C_BE_2_L PCI_CBE_L<2> 6 74 76 77 SM1
PCI1C_BE_3_L V20 PCI_CBE_L<3> 6 74 76 77
PCI1DEVSEL_L T22 PCI_DEVSEL_L 6 74 76 77
PCI1FRAME_L T21 PCI_FRAME_L 6 74 76 77
PCI1IRDY_L R21 PCI_IRDY_L 6 74 76 77
PCI1TRDY_L P19 PCI_TRDY_L 6 74 76 77
PCI1STOP_L P17 PCI_STOP_L 6 74 76 77

76 75 6 ROM_CS_L AB8 ROMCS_L N17 PCI_PAR
A PCI1PAR_H R7410
76 75 6
76 75 6
ROM_OE_L
ROM_WE_L
AA9
Y10
ROMOE_L
ROMRW_L PCI1RST_L U18 SB_PCI_RESET_L
6 74 76 77
3.32K2
1 PCI_RESET_L 6 49 51 75 76 77
A
Shasta drives PCI RESET, but its output 1%
1/16W
may not be valid during power-up, so MF
402
it is diode-ORed with output from SMU.
D7410
87 77 25 24 8 SYS_WARM_RESET_L 3 1
1N914
SOT23
DRAWING
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ABBREV=DRAWING
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Page Notes
- _PP3V3_PCI
(NONE)
(NONE)
NOTE: This page does not specify a BootROM
part number. Must use a TABLE_x_ITEM
D symbol to declare U7500 part number. D
77 76 75 74 25 7 _PP3V3_PCI
C7500 1 C7501 1 C7502 1

2.2uF 0.1uF 0.1uF
20% 20% 20%
10V 10V 10V
CERM 2 CERM 2 CERM 2
805 402 402
11 30 31
C VPP
U7500
VCC C
FEPR-1MX8
PCI_AD<0> 21
90.0ns 25 PCI_AD<24> 6
77 76 74 6 74 76 77
A0 TSOP DQ0
77 76 74 6 PCI_AD<1> 20 26 PCI_AD<25> 6 74 76 77
A1 OMIT DQ1
77 76 74 6 PCI_AD<2> 19 27 PCI_AD<26> 6 74 76 77
A2 DQ2
77 76 74 6 PCI_AD<3> 18 28 PCI_AD<27> 6 74 76 77
A3 DQ3
77 76 74 6 PCI_AD<4> 17 32 PCI_AD<28> 6 74 76 77
A4 DQ4
77 76 74 6 PCI_AD<5> 16 33 PCI_AD<29> 6 74 76 77
A5 DQ5
77 76 74 6 PCI_AD<6> 15 34 PCI_AD<30> 6 74 76 77
A6 DQ6
PCI_AD<7> 14 35 PCI_AD<31> 6
77 76 74 6
A7 DQ7 74 76 77
77 76 74 6 PCI_AD<8> 8
A8
77 76 74 6 PCI_AD<9> 7
A9
PCI_AD<10> 36
77 76 74 6
A10
77 76 74 6 PCI_AD<11> 6
A11
77 76 74 6 PCI_AD<12> 5
A12
77 76 74 6 PCI_AD<13> 4
A13
77 76 74 6 PCI_AD<14> 3
77 76 75 74 25 7 _PP3V3_PCI A14
77 76 74 6 PCI_AD<15> 2
A15
77 76 74 6 PCI_AD<16> 1
A16
77 76 74 6 PCI_AD<17> 40
R75001 1
R7501 A17
PCI_AD<18> 13
10K 10K 77 76 74 6
A18
5% 5% 77 76 74 6 PCI_AD<19> 37
1/16W 1/16W A19
MF MF 77 76 74 6 PCI_AD<20> 38
402 2 R7502 2 402
A20
ROM_CS_L 1
1K 2 76 6 ROM_ONBOARD_CS_L 22
76 74 6
CE
Allows ROM override module 5% 76 74 6 ROM_OE_L 24
OE
B to intercept ROM chip select
1/16W
MF
402
76 74 6 ROM_WE_L
12
9
WE B
6 ROM_WP_L
WP
77 76 74 51 49 6 PCI_RESET_L 10
PWD
GND
23 39
A A
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PCI_CLK_AIRPORT CLOCKS _PCI_CLK33M_AIRPORT 8 76
Page Notes
- _PP3V3_PCI
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)
D BOM options provided by this page: D

(NONE)
PCI Devices implemented on this page:
AD17 (Slot "A") - AirPort (0x????/0x????)
NOTE: This AirPort implementation does
not support PME#. _PP3V3_PCI
77 75 74 25 7
NO STUFF NO STUFF
1 C7600 1 C7601 1 C7602 1 C7603
10UF 10UF 0.1UF 0.1UF
20% 20% 20% 20%
2 6.3V
CERM 2 6.3V
CERM 2 10V
CERM 2 10V
CERM
1206 1206 402 402
CRITICAL
J7600
RCPT-CARD-EDGE
F-ST-TH1
SIDE-A SIDE-B
77 75 74 51 49 6 PCI_RESET_L 1 2
6 TP_AIRPORT_RF_DISABLE 3 4 _PCI_CLK33M_AIRPORT 8 76
74 6 PCI_SLOTA_REQ_L 5 6
7 8 PCI_SLOTA_GNT_L 6 74
77 75 74 6 PCI_AD<31> 9 10 TP_AIRPORT_PME_L 6
11 12 PCI_SLOTA_INT_L 6 25
77 75 74 6 PCI_AD<29> 13 14 PCI_AD<30> 6 74 75 77
C 77 75 74 6
77 75 74 6
PCI_AD<27>
PCI_AD<25>
15
17
16
18 PCI_AD<28> 6 74 75 77
C
19 20 PCI_AD<26> 6 74 75 77
77 74 6 PCI_CBE_L<3> 21 22 PCI_AD<24> 6 74 75 77
R7600
23 24
22
6 PCI_SLOTA_IDSEL 1 2 PCI_AD<17> 6 74 75 76 77
77 74 6 PCI_AD<23> 25 26 5%
1/16W
77 74 6 PCI_AD<21> 27 28 PCI_AD<22> 6 74 77 MF
402
77 75 74 6 PCI_AD<19> 29 30 PCI_AD<20> 6 74 75 77
31 32 PCI_PAR 6 74 77
77 76 75 74 6 PCI_AD<17> 33 34 PCI_AD<18> 6 74 75 77
35 36 PCI_AD<16> 6 74 75 77
77 74 6 PCI_CBE_L<2> 37 38
77 74 6 PCI_IRDY_L 39 40 PCI_FRAME_L 6 74 77
41 42 PCI_TRDY_L 6 74 77
6 AIRPORT_CLKRUN_L_PD 43 44 PCI_STOP_L 6 74 77
45 46 PCI_DEVSEL_L 6 74 77
77 74 6 PCI_CBE_L<1> 47 48
77 75 74 6 PCI_AD<14> 49 50 PCI_AD<15> 6 74 75 77
51 KEY 52 PCI_AD<13> 6 74 75 77
77 75 74 6 PCI_AD<12> 53 54 PCI_AD<11> 6 74 75 77
77 75 74 6 PCI_AD<10> 55 56
75 74 6 ROM_WE_L 57 58 PCI_AD<9> 6 74 75 77
77 75 74 6 PCI_AD<8> 59 60 PCI_CBE_L<0> 6 74 77
77 75 74 6 PCI_AD<7> 61 62 ROM_OE_L 6 74 75
63 64 PCI_AD<6> 6 74 75 77
77 75 74 6 PCI_AD<5> 65 66
B 75 6
77 75 74 6
ROM_ONBOARD_CS_L
PCI_AD<3>
67
69
68
70
PCI_AD<4>
PCI_AD<2>
6 74 75 77
6 74 75 77
B
71 72 PCI_AD<0> 6 74 75 77
77 75 74 6 PCI_AD<1> 73 74
75 74 6 ROM_CS_L 75 76 NC
77 78 NC
RESERVED FOR USB_DP AND USB_DN
NC
NC 79 80
DEVELOPMENT RESERVED FOR RADIO_IO 81 82 NC
NC
R7610 NC 83 84 NC
I2S1_DEV_TO_SB_DTI 1
0 2 I2S1_DEV_TO_SB_DTI_J 85 86 NC
94 25 6
SCC_RXDA 87 88 NC
5% NC
1/16W
MF I2S1_SB_TO_DEV_DTO_J 89 90 NC RESERVED FOR RADIO_IO
402
NC 91 92 NC
DEVELOPMENT 93 94 NC
NC
R7611 R76011 NC 95 96 NC
1
0 2 97 98 NC
94 25 6 I2S1_SB_TO_DEV_DTO 10K NC
SCC_TXDA 5% 99 100 NC
5% 1/16W NC
1/16W MF
MF 402 2
402
516-0069
PLACE R7610 AND R7611 CLOSE TO J9400
A A
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PCI_CLK_USB2 CLOCKS _PCI_CLK33M_USB2 8 77
Page Notes
- _PPVIO_PCI (to 3.3V or 5V)
- _PCI_CLK33M_USB2 (33MHz PCI clock)
D BOM options provided by this page: D

(NONE) _PPVIO_PCI_USB2
7
PCI Devices implemented on this page:

AD27 (Slot "G") - USB2 (0x1033/0x0035)
NOTE: This USB2 implementation supports
C7703 1
0.1uF
D3cold. 20%
10V
CERM 2
402
H3
M4
C8
PCI_AD<0> M5
76 75 74 6 AD0
VDD_PCI
PCI_AD<1> P5
76 75 74 6 AD1
PCI_AD<2> N5
76 75 74 6 AD2
PCI_AD<3> P4
76 75 74 6 AD3
PCI_AD<4> N4
76 75 74 6 AD4
PCI_AD<5> M3
76 75 74 6 AD5
PCI_AD<6> N3 CRITICAL
76 75 74 6 AD6
M1
76 75 74 6 PCI_AD<7>
PCI_AD<8> L2
AD7
AD8
U7700
76 75 74 6
76 75 74 6 PCI_AD<9> L1
AD9
NEC_uPD720101_USB2
FBGA
76 75 74 6 PCI_AD<10> K2 AD10
PCI_AD<11> L3
76 75 74 6 AD11
PCI_AD<12> K1
76 75 74 6 AD12
PCI_AD<13> K3
76 75 74 6 AD13
PCI_AD<14> J2
76 75 74 6 AD14
PCI_AD<15> J1
76 75 74 6 AD15
C 76 75 74 6 PCI_AD<16>
PCI_AD<17>
F2
E3
AD16 C
76 75 74 6 AD17
PCI_AD<18> E1
76 75 74 6 AD18
PCI_AD<19> D3
76 75 74 6 AD19
PCI_AD<20> D1
76 75 74 6 AD20
76 74 6 PCI_AD<21> D2 AD21
PCI_AD<22> C2
76 74 6 AD22
PCI_AD<23> C1
76 74 6 AD23
PCI_AD<24> B4
76 75 74 6 AD24
PCI_AD<25> A4
76 75 74 6 AD25
PCI_AD<26> B5
76 75 74 6 AD26
PCI_AD<27> (PCI_AD<27>) C4
76 75 74 6 AD27
6 PCI_AD<28>
A5
76 75 74 AD28
6 PCI_AD<29>
C5
76 75 74 AD29
6 PCI_AD<30>
B6
76 75 74 AD30
6 PCI_AD<31>
A6
76 75 74 AD31
PCI_CBE_L<0> M2
76 74 6 CBE0
R77141 76 74 6 PCI_CBE_L<1> J3
F1
CBE1
22 76 74 6 PCI_CBE_L<2> CBE2
5% C3
1/16W 76 74 6 PCI_CBE_L<3> CBE3
MF
402 2
PCI_PAR J4
76 74 6 PAR
PCI_FRAME_L F3
_PP3V3_PCI
76 74 6 FRAME
76 75 74 25 7
PCI_IRDY_L F4
76 74 6 IRDY
PCI_TRDY_L G1
76 74 6 TRDY
B R77161 R77131
76 74 6 PCI_STOP_L
PCI_SLOTG_IDSEL
G3
STOP
B3 IDSEL
B
10K 10K G2
5% 5% 76 74 6 PCI_DEVSEL_L DEVSEL
1/16W 1/16W C6
MF MF 74 PCI_SLOTG_REQ_L REQ
RP7703 402 2 402 2
PCI_SLOTG_GNT_L D6
GNT
47 74
PCI_SLOTG_INT_L 4 5 NEC_PERR_L_PU H2 IPD NTEST1 M8 TP_NEC_NTEST1

25 PERR 6
NEC_SERR_L_PU H1
5% SERR OD
1/16W
SM1
RP7703 NEC_INTA_L C7
INTA OD IPD SMC M7 TP_NEC_SMC
47 6
2 7 NEC_INTB_L B7
INTB OD
NEC_INTC_L A7
5% INTC OD
RP7703 1/16W
SM1 77 8 _PCI_CLK33M_USB2 A8
PCLK IPD TEB N7 TP_NEC_TEB 6
47
3 6 IPD AMC P7 TP_NEC_AMC 6
5% NEC_VBBRST_L B8 VBBRST (CHIP RESET)

1/16W
SM1
RP7702 NEC_CRUN_L_PD N6
CRUN IPD TEST L8 TP_NEC_TEST 6
47
SYS_WARM_RESET_L 3 6 NEC_PME_L D9
87 74 25 24 8 PME OD
NEC_VCCRST_L C9
5% VCCRST (PCI RESET)
RP7702 1/16W
SM1 6 TP_NEC_SMI_L L6
SMI OD NANDTEST M10 TP_NEC_NANDTEST 6
4
47 5
25 13 SYS_PME_L SRCLK M9 TP_NEC_SRCLK 6
5% SRDTA N9 TP_NEC_SRDATA 6
1/16W
SM1
RP7702 NEC_LEGC_PD L7
LEGC IPD SRMOD P9 TP_NEC_SRMOD 6
47
76 75 74 51 49 6 PCI_RESET_L 2 7
5% 8
1/16W
SM1
R77151 RP7703
4.7K 47
RP7702 & RP7703 required to 5%
1/16W 5%
facilitate NAND-tree testing MF 1/16W
402 2 SM1
1
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SATA_RXD1
SATA_RXD1
SATA
SATA
SATA_RXD1_C
SATA_RXD1_C
SATA_RXD_P1_C
SATA_RXD_N1_C
80 83
80 83
UATA Termination
SATA_TXD1 SATA SATA_TXD1 SATA_TXD_P1 80 83
SATA_TXD1 SATA SATA_TXD1 SATA_TXD_N1 80 83 RP8000

33
SATA_RXD2 SATA SATA_RXD2_C SATA_RXD_P2_C 80 83 80 UATA_DD_R<0> 4 5 UATA_DD<0> 6 80 83
SATA_RXD2 SATA SATA_RXD2_C SATA_RXD_N2_C 80 83 5%

RP8000 1/16W
SM1
SATA_TXD2 SATA SATA_TXD2 SATA_TXD_P2 80 83 33
80 UATA_DD_R<1> 3 6 UATA_DD<1> 6 80 83
SATA_TXD2 SATA SATA_TXD2 SATA_TXD_N2 80 83
5%
D UATA_DD UATA_DD<15..8> 6 80 83
1/16W
SM1
RP8000
2
33
7
D
UATA_DD7 UATA_DD<7> 6 80 83 80 UATA_DD_R<2> UATA_DD<2> 6 80 83
UATA_DD UATA_DD<6..0> 6 80 83 5%
UATA_HOST UATA_DA<2..0> RP8003 1/16W
SM1
6 80 83
33
UATA_HOST UATA_CS0_L 6 80 83 80 UATA_DD_R<3> 4 5 UATA_DD<3> 6 80 83
UATA_HOST UATA_CS1_L 6 80 83 5%
UATA_HOST UATA_HSTROBE
1/16W
SM1
RP8001
6 80 83
33
UATA_HOST UATA_STOP 6 80 83 80 UATA_DD_R<4> 1 8 UATA_DD<4> 6 80 83
UATA_HOST_R UATA_DMACK_L 6 80 83 5%
UATA_HOST_R UATA_RESET_L 6 80 83
RP8001 1/16W
SM1
33
UATA_DEV_R_C UATA_DSTROBE 80 83 80 UATA_DD_R<5> 2 7 UATA_DD<5> 6 80 83
UATA_DEV_R UATA_DMARQ 80 83 5%
UATA_DEV_R UATA_INTRQ 80 83
1/16W
SM1
RP8003
3
33 6
80 UATA_DD_R<6> UATA_DD<6> 6 80 83
5%
Page Notes 80 UATA_DD_R<7>

RP8002
1
33
8
1/16W
SM1
UATA_DD<7> 6 80 83
Power aliases required by this page: 5%

- _PP1V2_PWRON_DISK R80051
1/16W
SM1
RP8002
33
10K UATA_DD_R<8> 2 7 UATA_DD<8>
Signal aliases required by this page: 7 _PP1V2_PWRON_DISK_SB SATA_VDD x 5 5%
1/16W
80
5%
6 80 83
(NONE) MF
402 2
RP8003 1/16W
SM1
33
BOM options provided by this page: UATA_DD_R<9> 2 7 UATA_DD<9>
(NONE)
1 C8000 1 C8001 1 C8002 1 C8003 1 C8004 80
5%
6 80 83
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1/16W RP8000

20% 20% 20% 20% 20% SM1
2 10V
CERM
10V
2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
33
Net Spacing Type: SATA 402 402 402 402 402 80 UATA_DD_R<10> 1 8 UATA_DD<10> 6 80 83
C Line To Line: 15 mils RP8002 5%

1/16W C
AB14
AB17
33 SM1
T14
W15
Y18
Length Tolerance: 50 mils UATA_DD_R<11> 4 5 UATA_DD<11>
80 6 80 83
Primary Max Sep: 10 mils outer
5%
Primary Max Sep: 9 mils inner SATA_VDD 1/16W
SM1
RP8001
Secondary Max Sep: 100 mils U2300 OMIT 3
33 6
80 UATA_DD_R<12> UATA_DD<12> 6 80 83
Secondary Length: 500 mils SHASTA 5%
NOTE: Target differential impedance for V1.0 RP8002 1/16W
SM1
BGA 33
SATA data pairs is 100 ohms. 80 UATA_DD_R<13> 3 6 UATA_DD<13> 6 80 83
(5 OF 8)
UD_IDEDD_0_H J6 UATA_DD_R<0> 80 5%
UD_IDEDD_1_H H7 UATA_DD_R<1>
1/16W
SM1
RP8004
80
33
UD_IDEDD_2_H H6 UATA_DD_R<2> 80 80 UATA_DD_R<14> 1 8 UATA_DD<14> 6 80 83
UD_IDEDD_3_H E2 UATA_DD_R<3> 80 5%
UD_IDEDD_4_H C1 UATA_DD_R<4> RP8003 1/16W
SM1
80
33
UD_IDEDD_5_H C2 UATA_DD_R<5> 80 80 UATA_DD_R<15> 1 8 UATA_DD<15> 6 80 83
UD_IDEDD_6_H E3 UATA_DD_R<6> 80 5%
UD_IDEDD_7_H G6 UATA_DD_R<7> 80
1/16W
SM1
RP8004
33
UATA
UD_IDEDD_8_H G5 UATA_DD_R<8> 80 80 UATA_DA_R<0> 2 7 UATA_DA<0> 6 80 83
UD_IDEDD_9_H D4 UATA_DD_R<9> 80 5%
UD_IDEDD_10_H G7 UATA_DD_R<10> 80
RP8001 1/16W
SM1
33
UD_IDEDD_11_H F6 UATA_DD_R<11> 80 80 UATA_DA_R<1> 4 5 UATA_DA<1> 6 80 83
UD_IDEDD_12_H C3 UATA_DD_R<12> 80 5%
DSTROBE aka: UD_IDEDD_13_H F5 UATA_DD_R<13> 80
1/16W
SM1
RP8004
33
IORDY/HDMARDY* UD_IDEDD_14_H E5 UATA_DD_R<14> 80 80 UATA_DA_R<2> 4 5 UATA_DA<2> 6 80 83
UD_IDEDD_15_H D5 UATA_DD_R<15> 80 5%
HSTROBE aka: RP8004 1/16W
SM1
DIOR* UD_IDEDA0_H E6 UATA_DA_R<0> 80
3
33 6
80 UATA_RESET_L_R UATA_RESET_L 6 80 83
B STOP aka:
UD_IDEDA1_H C4
UD_IDEDA2_H D6
UATA_DA_R<1>
UATA_DA_R<2>
80
80
5%
1/16W R8000
B
DIOW* SM1
B3 UATA_CS0_L_R 1
33 2
UD_IDECS1FX_L 80 80 UATA_CS0_L_R UATA_CS0_L 6 80 83
83 80 UATA_DSTROBE F9 UD_IDECHRDY_H UD_IDECS3FX_L B4 UATA_CS1_L_R 80 5%
D7 UD_IDEDMARQ_H E8
R8001 1/16W
MF
83 80 UATA_DMARQ UD_IDEDMACK_L UATA_DMACK_L_R 80
1
33 2
402
E4 80 UATA_CS1_L_R UATA_CS1_L 6 80 83
C5 UD_IDEINTRQ_H UD_IDERD_L UATA_HSTROBE_R 80
83 80 UATA_INTRQ D3
5%
UD_IDEWR_L UATA_STOP_R 80 1/16W
R8002
MF
UD_IDERST_L E7 UATA_RESET_L_R 80 402 22
80 UATA_HSTROBE_R 1 2 UATA_HSTROBE 6 80 83
83 80 SATA_RXD_P1_C Y17 RXDP1 TXDP1 AA16 SATA_TXD_P1 80 83 5%

83 80 SATA_RXD_N1_C Y16 RXDN1 SATA 0 TXDN1 AB16 SATA_TXD_N1 80 83
R8003 1/16W
MF
1
22 2
402
AB15 RXDP2 80 UATA_STOP_R UATA_STOP 6 80 83
83 80 SATA_RXD_P2_C TXDP2 Y15 SATA_TXD_P2 80 83
AA15 RXDN2 SATA 1 5%
83 80 SATA_RXD_N2_C TXDN2 Y14 SATA_TXD_N2 80 83 1/16W
R8004
MF
AC coupling required for any SATA pair used. SATA_GND UATA_DMACK_L_R
402
1
22 2 UATA_DMACK_L
80 6 80 83
AA14
AA17
T13
W16
Recommend 0.1uF cap placed close to Shasta.
5%
(Caps provided by device page) 1/16W
MF
402
A A
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ABBREV=DRAWING
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
83 80 6 UATA_DD<15..8> UATA_DD
83 80 6 UATA_DD<7> UATA_DD7
83 80 6 UATA_DD<6..0> UATA_DD
83 80 6 UATA_DA<2..0> UATA_HOST
83 80 6 UATA_CS0_L UATA_HOST
83 80 6 UATA_CS1_L UATA_HOST
83 80 6 UATA_HSTROBE UATA_HOST
83 80 6 UATA_STOP UATA_HOST
83 80 6 UATA_DMACK_L UATA_HOST_R
83 80 6 UATA_RESET_L UATA_HOST_R
D 83 80 UATA_DSTROBE UATA_DEV_R_C D
83 80 UATA_DMARQ UATA_DEV_R
83 80 UATA_INTRQ UATA_DEV_R
SATA CONNECTORS
PATA CONNECTOR
C8304
0.1UF
SATA_TXD_P1_C 1 2 SATA_TXD_P1 80 83 7 PP5V_PATA
J8300 C8305
0.1UF
20%
10V PP3V3_PATA
CA-07SAHP-C-1 CERM
7
ATA-6 spec does not call out R8180 or R8182
M-ST-TH SATA_TXD_N1_C 1 2 402 SATA_TXD_N1 80
1 NO STUFF
C8307 NO STUFF
2
20%
10V
0.1UF R8313 1 R83111
3
CERM
1 2
10K
SATA_RXD_N1 402 SATA_RXD_N1_C 80 10K 5%
4 5% 1/16W
C8308 20%
1/16W CRITICAL MF
5 0.1UF 10V
CERM
MF
402 2 J8301 402 2
6 SATA_RXD_P1 1 2 402 SATA_RXD_P1_C 80 KX14 1

7 1
R8314 F-ST-SM R8312
20%
1K
10V
CERM
4.7K 52
5%
402
5% 1/16W
518-0070 1/16W MF
C MF
2 402 Per ATA Spec
NC 50
48
49
47
NC
NC
2 402
Obsolete
C
83 80 6 UATA_RESET_L 46 45 UATA_DD<8> 6 80 83
83 80 6 UATA_DD<7> 44 43 UATA_DD<9> 6 80 83
83 80 6 UATA_DD<6> 42 41 UATA_DD<10> 6 80 83
83 80 6 UATA_DD<5> 40 39 UATA_DD<11> 6 80 83
DEVELOPMENT
C8302 83 80 6 UATA_DD<4> 38 37 UATA_DD<12> 6 80 83
Sourced by drive
0.1UF 83 80 6 UATA_DD<3> 36 35 UATA_DD<13> 6 80 83
1 2 Terminate near connector
DEVELOPMENT SATA_TXD_P2_C SATA_TXD_P2 80 83 80 6 UATA_DD<2> 34 33 UATA_DD<14> 6 80 83
DEVELOPMENT
UATA_DD<1> UATA_DD<15>
J8302 C8303
0.1UF
20%
10V
83 80 6
UATA_DD<0>
32 31 6 80 83
CA-07SAHP-C-1 CERM
83 80 6 30 29
M-ST-TH SATA_TXD_N2_C 1 2 402 SATA_TXD_N2 80 UATA_HSTROBE 6 80 83
28 27
1 DEVELOPMENT
20% C8300 83 80 6 UATA_STOP 26 25
2 10V
0.1UF 6 UATA_DSTROBE_R UATA_DMACK_L 6 80 83
3 SATA_RXD_N2
CERM
402 1 2 SATA_RXD_N2_C 80
R8315 6 UATA_INTRQ_R
24 23
UATA_IOCS16_PU 6
4 DEVELOPMENT
UATA_DSTROBE 1
82 2 UATA_DA<1>
22 21
C8306 20%
83 80 83 80 6 20 19 NC
5 0.1UF 10V 5% 83 80 6 UATA_DA<0> UATA_DA<2> 6 80 83
CERM 1/16W 18 17
6 SATA_RXD_P2 1 2 402 SATA_RXD_P2_C 80 MF 83 80 6 UATA_CS0_L UATA_CS1_L 6 80 83
402 16 15
7 UATA_DASP_L
20%
10V R8316 14 13
518-0070 CERM
82 12 11
402
83 80 UATA_INTRQ 1 2 10 9
5%
1/16W 8 7
C8301 1 MF
402 6 5
10pF 6 UATA_CSEL_PD
5% 4 3
50V
CERM 2 NC 2 1 NC
402
B HD POWER R8320
82
51
B
83 80 UATA_DMARQ 1 2 6 UATA_DMARQ_R
5% 518S0077
1/16W
MF J8301 DOES NOT MATCH NORMAL ATA PINOUT
402
CONNECTOR IS ROTATED 180 DEGREES
ATA-6 spec does not call out C8177
CRITICAL
PP5V_PATA R83191 1
R8318 1R8317
J8303 83 7
5.6K 0 10K
6 7
S05B-XA 5% 5% 5%
PP5V_DISK
7
M-RT-TH 1/16W 1/16W 1/16W

PP3V3_DISK
6 7
1 MF MF MF
1 PP12V_DISK R8321 402 2 2 402 2 402
Per ATA Spec
2
499 Per ATA Spec
1%
3 1/16W Per ATA Spec
4
MF
402 2 LED8301
5 UATA_DASP_L_DS 1 2
GREEN
518-0144 2.0X1.25
"UATA ACTIVE"
A A
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ENET_RX_CLK 10 MIL ENET_CLK25M_TX 84 87
ENET_RX_CLK 10 MIL ENET_CLK125M_RX 84 87
ENET_GBE_REF 15 MIL SPACING ENET_CLK125M_GBE_REF 84 87
ENET_TX_CLK 15 MIL SPACING ENET_CLK125M_GTX 84 87
15 MIL SPACING ENET_CLK125M_GTX_R 84
ENET_RX ENET_RXD<7..0> 84 87
ENET_RX_CTL ENET_RX_DV 84 87
ENET_RX_CTL ENET_RX_ER 84 87
ENET_TX ENET_TXD<7..0> 84 87
D ENET_TX_CTL ENET_TX_EN 84 87 D
ENET_TX_CTL ENET_TX_ER 84 87
ENET_RX_CTL ENET_CRS 84 87
ENET_RX_CTL ENET_COL 84 87
ENET_MDC ENET_MDC 84 87
ENET_MDIO ENET_MDIO 84 87
Page Notes
(NONE)
(NONE)
(NONE)
RP8400
0K
2 7 ENET_TXD<0> 84 87
C OMIT RP8400 5%
1/16W
C
0K SM1
4 5
U2300 ENET_TXD<1> 84 87
SHASTA 5%
1/16W RP8400
V1.0 SM1 0K
BGA 1 8 ENET_TXD<2> 84 87
(6 OF 8)
5%
87 84 ENET_CLK25M_TX H5 ETH_TX_CLK_H
RP8400 1/16W
ETHERNET
J3 ETH_RX_CLK_H 0K SM1
87 84 ENET_CLK125M_RX 3 6 ENET_TXD<3> 84 87
87 84 ENET_RXD<0> K1 ETH_RXD_0_H ETH_TXD_0_H G4 ENET_TXD_R<0> 5%

87 84 ENET_RXD<1> L3 ETH_RXD_1_H ETH_TXD_1_H E1 ENET_TXD_R<1>
1/16W
SM1
RP8401
K2 ETH_RXD_2_H
0K
87 84 ENET_RXD<2> ETH_TXD_2_H H4 ENET_TXD_R<2> 2 7 ENET_TXD<4> 84 87
87 84 ENET_RXD<3> J1 ETH_RXD_3_H ETH_TXD_3_H J5 ENET_TXD_R<3> 5%

ENET_RXD<4> L4 ETH_RXD_4_H ETH_TXD_4_H G3 ENET_TXD_R<4> RP8401 1/16W
SM1
87 84
K3 ETH_RXD_5_H
0K
87 84 ENET_RXD<5> ETH_TXD_5_H F2 ENET_TXD_R<5> 4 5 ENET_TXD<5> 84 87
87 84 ENET_RXD<6> J2 ETH_RXD_6_H ETH_TXD_6_H J4 ENET_TXD_R<6> 5%

ENET_RXD<7> G1 ETH_RXD_7_H ETH_TXD_7_H K6 ENET_TXD_R<7>
1/16W
SM1
RP8401
87 84
0K
1 8 ENET_TXD<6> 84 87
87 84 ENET_RX_DV K4 ETH_RX_DV_H ETH_TX_EN_H H3 ENET_TX_EN_R
5%
87 84 ENET_RX_ER G2 ETH_RX_ER_H ETH_TX_ER_H F1 ENET_TX_ER_R RP8401 1/16W
SM1
0K
87 84 ENET_CLK125M_GBE_REF M5 ETH_REFCLK_H ETH_GTX_CLK_H K5 84 ENET_CLK125M_GTX_R 3 6 ENET_TXD<7> 84 87
L6 ETH_CRS_H 5%
87 84 ENET_CRS ETH_MDC_H M4 ENET_MDC 84 87 1/16W R8400
SM1
L5 ETH_COL_H 0
87 84 ENET_COL ETH_MDIO_H M6 ENET_MDIO 84 87 1 2 ENET_TX_EN 84 87
5%
R8401 1/16W
MF
0 402
B 1
5%
2 ENET_TX_ER 84 87
B
1/16W
MF R8402
402 0
1 2 ENET_CLK125M_GTX 84 87
5%
1/16W
MF
402
A A
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE DIFFERENTIAL_PAIR ETHERNET ROUTING PRIORITY:

1. DECOUPLING CAPS
ENET_MDI_TX ENET ENET_MDI_TD ENET_TDP 87
2. TX TERMINATION - LOCATE NEAR PHY
ENET_MDI_TX ENET ENET_MDI_TD ENET_TDN 87
3. RX TERMINATION - LOCATE NEAR PHY
ENET_MDI_RX ENET ENET_MDI_RD ENET_RDP 87
ENET_MDI_RX ENET ENET_MDI_RD ENET_RDN 87 ROUTE TD OVER 2.5V PLANE (BOTTOM LAYER) ONLY
ROUTE RD OVER GROUND PLANE (TOP LAYER) ONLY
ENET_XTAL 15 MIL SPACING ENET_CLK25M_XIN 87
15 MIL SPACING ENET_CLK25M_XOUT 87 ALL DIFFERENTIAL SIGNALS SHOULD BE CLOSE,

MIN_NECK_WIDTH=10MIL PP2V5_ENET PARALLEL, MATCHED LENGTHS, WITH MINIMUM
D VIA COUNT, AND SHORT IF POSSIBLE D

1
C8703 1
C8704 1
C8702 1
C8705 1
C8712 CLEAR OUT ALL PLANES BETWEEN MIDDLE
0.1UF 0.01UF 0.1UF 0.01UF 2.2UF
20% 20% 20% 20% 20%
OF TRANSFORMER AND CONNECTOR
10V 16V 10V 16V 10V
87 7 PP3V3_PWRON_ENET 402 402 402 402 805
ENET_DVDD VOLTAGE=2.5V
1
C8711 1
C8716 1
C8708 1
C8715 1
C8709
2.2UF 0.1UF 0.01UF 0.1UF 0.01UF
20% 20% 20% 20% 20%
10V 10V 16V 10V 16V NC
805 402 402 402 402
20
55
27
28
46
22
3
8
1
C8722 (514-0083)
REGDVDD
REGAVDD
DVDD1
DVDD2
AVDD1
AVDD2
OVDD1
OVDD2
REFCLK
BIASVDD
OVDD/NC
0.1UF
20%
10V CRITICAL
1
C8710 2 CERM
R8701 1
1
(PLACE R3126, R3127
R3117, R3118
0.01UF R8700 402
J8700
20% 49.9 49.9
CLOSE TO PHY) 16V
NOTE: PLACE R3128, R3100, RP 3101 CLOSE TO PHY 2 CERM 1% 1% RJ45
402 1/16W 1/16W
MF MF MJ-R0018
402 402
2 2 F-ST-TH
R8706 PRIMARY
84 ENET_CLK25M_TX
I237
MAKE_BASE=TRUE
CLK_ENET_LINK_TX
NET_SPACING_TYPE=10 MIL
1
33
2 CLKENET_PHY_TX
53
TXC U8700 TD+ 31 9
5%
TXD0 TD- 30 10
1/16W
MF
84 ENET_TXD<0> 57
FLAS-1
402 84 ENET_TXD<1> 58
TXD1 RD+ 26 SYM_VER-3 SECONDARY
84 ENET_TXD<2> 59
TXD2 TRANSC_BCM5221 RD- 25 ENET_TDP 1 1CT:1CT J1
TXD3 2 J2
87
84 ENET_TXD<3> 60
SD+
C CRITICAL 21
1 1 ENET_TDN 3 J3
C
7
SD- 19
NC PP3V3_PWRON_ENET R8703 R8702
84 ENET_CLK125M_RX
I238
CLK_ENET_LINK_RX
84 ENET_TX_EN 56
TXEN 49.9 49.9 ENET_RDP 4 J4
MAKE_BASE=TRUE NET_SPACING_TYPE=10 MIL 84 ENET_TX_ER 52
TXER 1 1
1%
1/16W
1%
1/16W
5 J5
R8712 R8713 MF MF
ENET_RDN 6 TX-SIDE J6
RP8700 R8707 10K 10K
402
2 2
402
33 7 1CT:1CT J7
33 1
MF
2
402
CLKENET_PHY_RX
50
RXC FDX 39 ENET_5221_FDX 87 1/16W
5% 5%
1/16W
8 J8
ENET_RXD<0> 1
5%
8
1/16W 5%
ENET_PHY_RXD<0> 48
F100/JTAG_TCK 37 TP_ENET_TCK 6
MF
402
2 2
MF
402
84
RXD0 ANEN/JTAG_TRST 38 ANEN
RJ45
CABLE SIDE
84 ENET_RXD<1> 2 7 ENET_PHY_RXD<1> 47
RXD1
ENET_RXD<2> 3 6 ENET_PHY_RXD<2> 44
TESTEN 15 ENET_5221_TESTEN 87 11
84
RXD2 MII_EN 18 MII_EN 12
RX-SIDE
84 ENET_RXD<3> 4 5 ENET_PHY_RXD<3> 43
RXD3
R8709 1/16W
LOW_PWR 16 ENET_5221_LOW_PWR 87 RJ45
ENET_PHY_RX_DV 49 75 75 75 75
84 ENET_RX_DV 1
33
2
SM1 RXDV GND_CHASSIS_RJ45
CHIP SIDE
OHM OHM OHM OHM
ENET_PHY_RX_ER 51
RXER 1
C8721
7
5%
1/16W
1
C8706 1
C8707 1
C8714 0.1UF
ENET_PHY_CRS 62 0.01UF 0.01UF 0.01UF 20%
MF
402 RP8701
ENET_PHY_COL 61
CRS ENERGY_DET 17 ENET_ENERGYDET 25 20%
16V
20%
16V
20%
16V 2
10V
CERM
84
ENET_RX_ER 8
33
1 COL 2 CERM 2 CERM 2 CERM 402 SHIELD 1000PF, 2000V
ENET_CRS RP8701 5 4 33 1/16W 5%

ETHPHYRESET_L 9
RDAC 23 402 402 402
84
1/16W 5%
RP8701 33
RESET*
84 ENET_COL 6 3
ENET_MDC 42
1/16W 5% 84
MDC
D8700 NET_SPACING_TYPE=10 MIL
41
MDIO
87
87
87
77 74 25 24 8 SYS_WARM_RESET_L 3 1
6
LNKLED/JTAG_TDI* 35 ENET_TDI 87
XTALI
7
7
1N914 5
SPDLED/JTAG_TMS* 36 ENET_TMS 87 PP3V3_PWRON_ENET PP3V3_PWRON_ENET PP3V3_PWRON_ENET
SOT23 XTALO XMTLED* 34 XMIT_LED 87
84 ENET_MDIO
SHASTA SIGNAL IS ACTIVE HIGH R8711 NC
10
PHYAD0 RCVLED/JTAG_TDO* 33 TP_ENET_TDO DEVELOPMENT DEVELOPMENT
DEVELOPMENT
11
0 NC
PHYAD1
87
ENETFW_RESET_L 1 2 1 1 1 1
90
12 1 1 R8717 R8716 R8715 R8714
NC
PHYAD2 R8704 R8718
7
5% 330 330 330 4.7K

3 PP3V3_PWRON_ENET 13
R8719 1/16W
R8708 NC
PHYAD3 10K 4.7K 5% 5% 5% 5%
ENET_RDAC_PD
Q8700 MF 5% 5% 1/16W 1/16W 1/16W 1/16W
B D
2N7002 1
1K
2
402
1
1.5K
2
NC
14
PHYAD4 1/16W
MF
1/16W
MF
2
MF
603
2
MF
603
2
MF
603
2
MF
603 B
JTAG_EN
BIASGND
SM PHY ADDRESS 00000 402 603
5% 1% 2 2
OGND3/
PLLGND
1 G S NOSTUFF 1/16W 1/16W DS3P1 DS1P1 DS2P1
OGND1
OGND2
DGND1
DGND2
AGND1
AGND2
MF MF
C8723 1 402 603 DEVELOPMENT DEVELOPMENT DEVELOPMENT
1 1 1
2 1UF
20%
LED8702 LED8701 LED8700
10V GREEN GREEN GREEN
CERM 2 R8704 PULLDOWN ENABLES 2.0X1.25 2.0X1.25 2.0X1.25
603
(PLACE Y8700 CRYSTAL AUTO-MDI/MDIX 2 10/100 2 XMIT 2 LINK
CLOSE TO PHY)
40
45
64
54
63
29
32
24
ENETFW_RESET 25
87 ENET_TMS
87 ENET_CLK25M_XIN
CRITICAL
ADD DUAL LAYOUT SUPPORT R8705 1 RP8702
Y8700 1.27K 10K 87 XMIT_LED
FOR ALTERNATE CRYSTAL 25.0000M 1% 5%
1 2 87 ENET_CLK25M_XOUT 1/16W
MF 87 ENET_5221_FDX 2 7
87 ENET_TDI
402
8X4.5MM-SM 2 ENET_5221_TESTEN 3 6
87
87 OGND3_JTAG_EN
C8701 1 1
C8700 87 ENET_5221_LOW_PWR 4 5
27PF 27PF OGND3_JTAG_EN 1 8

87
5% 5%
50V 50V 1/16W
CERM 2 2 CERM
603 603 SM1
NOTE: LINK SUPPORT FOR GIGABIT ETHERNET PULLED DOWN OR ALIASED TO TEST POINTS HERE.
I228 I232
84 ENET_RXD<4> ENET_RXD_PD 84 ENET_CLK125M_GBE_REF 84 ENET_TXD<4> TP_ENET_TXD<4> 6
87
MAKE_BASE=TRUE MAKE_BASE=TRUE
I229 I233
ENET_RXD<5> 84 ENET_TXD<5> TP_ENET_TXD<5>
7
84 6
PP3V3_PWRON_ENET MAKE_BASE=TRUE
I230 I234
ENET_RXD<6> R87981 84 ENET_TXD<6> TP_ENET_TXD<6>
A 84
84 ENET_RXD<7>
I231 10K
1% 84 ENET_TXD<7>
I235
MAKE_BASE=TRUE
TP_ENET_TXD<7>
6
6
A
1/16W MAKE_BASE=TRUE
1
C8720 1
C8719 1
C8718 1
C8717 1
C8713 MF I236
402 84 ENET_CLK125M_GTX TP_ENET_CLK125M_GTX 6
R87991
4.7UF 0.1UF 0.1UF 0.1UF 10UF 2 MAKE_BASE=TRUE
20% 20% 20% 20% 20%
10V 10V 10V 10V 6.3V
2 2 2 2 2 10K
CERM CERM CERM CERM CERM
1206 402 402 402 1206 1%
1/16W
MF
402
2
KEEP ALL CAPS CLOSE TO TRANSCEIVER ON THIS PAGE
8
www.vinafix.vn
7 6 5 4 3 2 1 DRAWING
8 7 6 5 4 3 2 1
FW FW_DATA<7..0> 88 90
FW FW_CTL<1..0> 88 90
FW_LPS FW_LPS 88 90
FW_LREQ FW_LREQ 88 90
FW_PINT FW_PINT 88 90
FW_LCLK 15 MIL SPACING FW_CLK98M_LCLK 88 90
FW_PCLK 15 MIL SPACING FW_CLK98M_PCLK 88 90
15 MIL SPACING FW_CLK98M_LCLK_R 88
D Page Notes D
- _PP2V5_PWRON_SB
(NONE)
(NONE)
74 25 23 7 _PP2V5_PWRON_SB
1 C8800 1 C8801 1 C8802

0.1uF 0.1uF 0.1uF
20% 20% 20%
2 10V
CERM 2 10V
CERM 2 10V
CERM
402 402 402
C C
N5
J7
A4
FWVDDP
OMIT
U2300
SHASTA
V1.0
BGA
(7 OF 8)
PHY_DATA_0_H N4 FW_DATA<0> 88 90
PHY_DATA_1_H P5 FW_DATA<1> 88 90
FIREWIRE
PHY_DATA_3_H M7 FW_DATA<3> 88 90
PHY_DATA_5_H L1 FW_DATA<5> 88 90
PHY_DATA_6_H M3 FW_DATA<6> 88 90
PHY_DATA_7_H L2 FW_DATA<7> 88 90
PHY_CTL_0_H N2 FW_CTL<0> 88 90
PHY_CTL_1_H N3 FW_CTL<1> 88 90
PHY_LPS_H P6 FW_LPS 88 90
PHY_LREQ_H P1 FW_LREQ 88 90
R8800
P2 PHY_SCLK_H 22
90 88 FW_CLK98M_PCLK PHY_LCLK_H R1 88 FW_CLK98M_LCLK_R 1 2 FW_CLK98M_LCLK 88 90
5%
90 88 FW_PINT P3 PHY_PINT_L PHY_LINKON_L N7 FW_LINKON 90 1/16W
MF
402
B B
A A
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VERTICAL
FW_VP CONNECTORS
FIREWIRE IS ON WHEN UNIT IS OFF
PP3V3_FW 7 90 VOLTAGE=24V
PP24V_FW
PORT 1
7
L9001 514-0097
CRITICAL
D9000 FERR-160-OHM
MURS320T3
FW_CPS FL9000 J9000
D9001 1 2 1 2 165-OHM 1394
BAV99DW MIN_LINE_WIDTH=35MIL SM F-ST-TH
SOT-363 MIN_NECK_WIDTH=10MIL 1206 SYM_VER-1
5
SM VOLTAGE=24V
1 4
90 6 FW_TPO1P 6
D9001 TPO
FW_TPA1P 3 BAV99DW
1
C9009 90 6 FW_TPO1N 5
90
SOT-363 0.1UF R9007 TPO#
20% 0 2 3
90 6 FW_TPI1P
D D9002
4 2
2
50V
CERM
805
1
5%
2 6 FW_VGND
90 6 FW_TPI1N
4
TPI D
90 FW_TPA1N 6 1/8W FL9001 3
BAV99DW FF 165-OHM TPI#
SOT-363 1206 SM 6 FW_VP_PORT1
1 SYM_VER-1 1
Q26 HAS A BOMOPTION FOR A PHY LEAKS 47 OHM PULL DOWN RESISTOR 1
5 VP
D9002
I DON’T THINK THESE LEAKY PHYS EXIST ANY LONGER
1 4
F9002 2
90 FW_TPB1P 3 0.5AMP VGND
BAV99DW SM
SOT-363 VOLTAGE=24V
4 2 3 7 8 9 10
2 MIN_LINE_WIDTH=35MIL
FW_TPB1N D9003 6
90
BAV99DW C9018 1
SOT-363
1 0.01UF GND_CHASSIS_FIREWIRE
5 10%
90 7
16V
CERM 2
90 FW_TPA2P 3 D9003 1
C9024 402
BAV99DW 0.01UF
SOT-363 10%
4
2 50V
2 CERM
805
FW_TPA2N D9004 6
90
BAV99DW C9010 PORT 2
SOT-363 FL9002 100PF
1 165-OHM GND_CHASSIS_FIREWIRE
5 1 2
SM
SYM_VER-1
514-0097
90 7
CRITICAL
FW_TPB2P 3 1 4 5%
90 D9004 1 50V
BAV99DW R9021 CERM
J9001
4 SOT-363 390K 402
5% 1394
2 2 3
1/16W F-ST-TH
VOLTAGE=3.3V MF
2
FW_TPB2N 6
MIN_LINE_WIDTH=25MIL 402 90 6 FW_TPO2P 6
PP3V3_FW 7 90 FL9003 TPO
165-OHM
1 SM
90 6 FW_TPO2N 5
SYM_VER-1 TPO#
1 4 90 6 FW_TPI2P 4
TPI
C NO STUFF
1
PP1V8_FW_BIAS1
VOLTAGE=1.8V
MIN_LINE_WIDTH=10MIL 90 6 FW_TPI2N 3
TPI#
C
R9098 U9000 MIN_NECK_WIDTH=8MIL
4.7K
R9022 1 FW803
PP1V8_FW_BIAS2
VOLTAGE=1.8V
2 3
F9000 6 FW_VP_PORT2 1
5% 10K
C9027 FLAS MIN_LINE_WIDTH=10MIL 1.5AMP-33V MIN_LINE_WIDTH=35MIL VP
30 OMIT 7
1/16W
MF
5%
1/16W 27PF
AVDD0 DVDD0 MIN_NECK_WIDTH=8MIL
1 2
402 MF 31
AVDD1 17 VGND
2 402
1 2 FW_CLK25M_XIN DVDD1
2 43 26
AVDD2 DVDD2 1
C9015 1
C9016
SM
7 8 9 10
5% 50 27
1
C9004 50V
1
CRITICAL AVDD3 DVDD3 0.47UF 0.47UF
8 WATTS MAX
1000pF
CERM
603
Y9000 51
AVDD4 DVDD4
62 20%
10V 1 1
20%
10V 1 1
2 R9015 R9014 2 R9010 R9009
5%
25V
24.576M
SM CPS 24 37
CERM
603
CERM
603 24 VOLTS GND_CHASSIS_FIREWIRE
2 CERM C9028 CPS TPBIAS0 56.2 56.2 56.2 56.2
1
C9000 1
C9005
90 7
603 2 1% 1% 1% 1%
59 42
27PF
XI TPBIAS1 1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
0.01UF 0.01UF
1 2 FW_CLK25M_XOUT 60 48 NC 402 402 402 402
10% 10%
XO TPBIAS2 2 2 2 2
2
50V
CERM 2
16V
CERM
25 FW_LOWPWR 19
5% PD 36 90 FW_TPA1P 805 402
NO STUFF 50V 28 TPA0+
CERM SE FW_TPA1N
R9099 603 29
SM
TPA0-
35 90
1
0 2 TPB0+
34 90 FW_TPB1P
87 ENETFW_RESET_L FW_PHY_RST_L 61
RESET 33 90 FW_TPB1N GND_CHASSIS_FIREWIRE
TPB0-
90 7
FW_PHY_ISO_L 23
90 88 FW_LPS ISO 41 90 FW_TPA2P
16 TPA1+
RP9000 LPS 40 90 FW_TPA2N
88 FW_LREQ 22 1 8 FW_LREQ_R 1 TPA1- C9011
LREQ 39 90 FW_TPB2P 100PF
NOTE: 49M, NOT 98M CLK FOR 1394-A 57 TPB1+
PLLVDD 38 90 FW_TPB2N 1 2
NAMING KEPT FROM NEOBORG 88 FW_CLK98M_PCLK 22 1 2 R9001 FW_CLK98M_PCLK_R 63 TPB1-
RP9000 SYSCLK 47 NC
88 FW_CTL<0> 22 2 7 FW_CTL_R<0> 3 TPA2+ 5%
RP9000 CTL0 46 NC
50V
88 FW_CTL<1> 22 3 6 FW_CTL_R<1> 4 TPA2- CERM
CTL1 45 402
TPB2+ NC
44 NC
TPB2-
FW_DATA<0> 22 4 5 RP9000 FW_DATA_R<0> 5 54 FW_R0
88
RP9001 D0 R0 ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE DIFFERENTIAL_PAIR
88 FW_DATA<1> 22 1 8 FW_DATA_R<1> 6 55 FW_R1
D1 R1
B 88 FW_DATA<2> 22
22
2 7 RP9001
RP9001
FW_DATA_R<2> 8
D2 PC2
22
1
R9019
2.49K
FW_TPA1 FW FW_TPA1 FW_TPA1P 90 B
88 FW_DATA<3> 3 6 FW_DATA_R<3> 9 21 1% FW_TPA1 FW FW_TPA1 FW_TPA1N 90
RP9001 D3 PC1 1/16W
1
R9018
1
R9016
1
R9013
1
R9011
88 FW_DATA<4> 22 4 5 FW_DATA_R<4> 10 20 MF FW_TPB1 FW FW_TPB1 FW_TPB1P 90
RP9002 D4 PC0 402 56.2 56.2 56.2 56.2
88 FW_DATA<5> 22 1 8 FW_DATA_R<5> 11 2
1% 1% 1% 1% FW_TPB1 FW FW_TPB1 FW_TPB1N 90
RP9002 D5 58 1/16W 1/16W 1/16W 1/16W
88 FW_DATA<6> 22 2 7 FW_DATA_R<6> 12 PLLVSS MF MF MF MF FW_TPA1 FW FW_TPO1 FW_TPO1P 6 90
RP9002 D6 402 402 402 402
FW_DATA<7> 22 3 6 FW_DATA_R<7> 13 18 FW_LINKON 88 2 2 2 2
FW_TPA1 FW FW_TPO1 FW_TPO1N
88
D7 C/LKON 6 90
FW_TPB1 FW FW_TPI1 FW_TPI1P 6 90

15 FW_TPB2 FW_TPB1
NC
CNA FW_TPB1 FW FW_TPI1 FW_TPI1N 6 90
1
2 32 R9020
FW_LPS 88 90 DGND0 AGND0 4.7K 1
R9017 FW_TPA2 FW FW_TPA2 FW_TPA2P 90
14 49 1 1 1
DGND1 AGND1 5% C9021 C9019 R9012
1/16W 4.99K FW_TPA2 FW FW_TPA2 FW_TPA2N 90
25 52 220PF 220PF
NOT USED WITH 1394-A PHY NOSTUFF DGND2 AGND2 MF 1% 4.99K
R9025 1 C9034 1
R9024 1 R9023 1 56 53 2
402
5%
25V 1/16W
5%
25V 1% FW_TPB2 FW FW_TPB2 FW_TPB2P 90
2 MF 2 1/16W
1
R9000 510K 0.1UF 1K 10K DGND3 AGND3 CERM
402 402
CERM
402 MF FW_TPB2 FW FW_TPB2 FW_TPB2N 90
88 FW_CLK98M_LCLK TP_FW_CLK98M_LCLK 6 5%
20%
5% 5% 64 2
402
2K MAKE_BASE=TRUE 1/16W
10V
CERM 2 1/16W 1/16W DGND4 2
FW_TPA2 FW FW_TPO2 FW_TPO2P 6 90
5% MF 402 MF MF
1/16W 402
2
402
2
402
2
FW_TPA2 FW FW_TPO2 FW_TPO2N 6 90
MF
402 FW_TPB2 FW FW_TPI2 FW_TPI2P 6 90
2
88 FW_PINT
FW_TPB2 FW FW_TPI2 FW_TPI2N 6 90
1 PW_LOWPWR SHOULD BE
R9026 LREQ PULL-DOWN
ENSURES SIGNAL
PULLED DOWN ON SB
FW_XTAL 15 MIL SPACING X_TAL_IN
10K LOW WHEN LUCENT
5% PHY POWERS UP 15 MIL SPACING X_TAL_OUT
1/16W
MF
2 402
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

TABLE_5_ITEM
338S0088 1 FIREWIRE PHY 802A U9000 CRITICAL
A PP3V3_FW 7 90
A
DVDD BYPASS
AVDD BYPASS
1
C9006 1
C9035 1
C9033 1
C9032 1
C9031 1
C9030 1
C9029 1
C9007 1
C9008 1
C9026 1
C9025 1
C9023 1
C9022 1
C9002 1
C9001
10UF 0.1UF 0.1UF 0.1UF 0.001UF 0.001UF 0.001UF 10UF 10UF 0.1UF 0.1UF 0.1UF 0.001UF 0.001UF 0.001UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
6.3V 10V 10V 10V 50V 50V 50V 6.3V 6.3V 10V 10V 10V 50V 50V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
1206 402 402 402 402 402 402 1206 1206 402 402 402 402 402 402
8
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7 6 5 4 3 2 1 DRAWING
8 7 6 5 4 3 2 1
USB2_0 USB2 USB2_0 USB2_P<0> 91 92
USB2_0 USB2 USB2_0 USB2_N<0> 91 92
USB2_1 USB2 USB2_1 USB2_P<1> 91 92
USB2_1 USB2 USB2_1 USB2_N<1> 91 92
USB2_2 USB2 USB2_2 USB2_P<2> 91 92
USB2_2 USB2 USB2_2 USB2_N<2> 91 92
USB2_3 USB2 USB2_3 USB2_P<3> 91 94
USB2_3 USB2 USB2_3 USB2_N<3> 91 94
D USB2_4 USB2 USB2_4 USB2_P<4> 91 92 D

USB2_4 USB2 USB2_4 USB2_N<4> 91 92
USB2_NEC_XTAL 15 MIL SPACING NEC_CLK30M_XT1

15 MIL SPACING NEC_CLK30M_XT2
91
L9135 PP3V3_PWRON_NEC_AVDD
VOLTAGE=3.3V
91
91 7 _PP3V3_PWRON_USB FERR-EMI-100-OHM MIN_LINE_WIDTH=20 mil
15 MIL SPACING NEC_CLK30M_XT2_R 91
1 2 MIN_NECK_WIDTH=10 mil
SM
C9135 C9136 C9137

Page Notes R9135
1
4.7 2
10uF
20%
6.3V
CERM
0.1uF
20%
10V
CERM 2
1
0.1uF
20%
10V
CERM 2
1
Power aliases required by this page: 5% 805 402 402

- _PP3V3_PWRON_USB 1/16W
MF
603
(NONE)
P12
A13
A12
L13
J13
H13
F13
D13
G12
N10
N12
C9120 1 C9121 1 C9122 1 C9123 1 C9124 1 C9125 1
P2
P3
A3
E2
N8
H4
D7
(NONE) 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VDD
R9100
20%
6.3V 2
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V 1
36 2
CERM 2 CERM 2 CERM 2 CERM 2 CERM 2
AVDD
CERM
805 402 402 402 402 402
Net Spacing Type: USB2 1%
1/16W
RSDM1 M14 USB_NEC_N<0> MF
Line To Line: 19.5 mils 402
DM1 M13 (USB2_N<0>) USB2_N<0> 91 92
Length Tolerance: 50 mils
DP1 L14 (USB2_P<0>) USB2_P<0>
Primary Max Sep: 7.5 mils C9126 1 C9127 1 C9128 1 C9129 1 C9130 1
RSDP1 K13 USB_NEC_P<0>
91 92
Secondary Max Sep: 100 mils 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
20%
10V
20%
10V
20%
10V
20%
10V
20%
10V CRITICAL R9101
Secondary Length: 500 mils CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 36
NOTE: Target differential impedance for
402 402 402 402 402 U7700 1
1%
2
USB2 data pairs is 90 ohms.

NEC_uPD720101_USB2 1/16W
MF
C FBGA 402
C
R9102
1
36 2
91 7 _PP3V3_PWRON_USB
1%
1/16W
RSDM2 K14 USB_NEC_N<1> MF
402
DM2 K12 (USB2_N<1>) USB2_N<1> 91 92
8 7 6 5 J14
DP2 (USB2_P<1>) USB2_P<1> 91 92
U2300 R91102 RP9110 RSDP2 J12 USB_NEC_P<1>
SHASTA 10K 10K R9103
5% 5%
V1.0 1/16W 1/16W 1
36 2
MF SM1
BGA 402 1
1%
(8 OF 8) 1 2 3 4 1/16W
OMIT NC0 P7 TP_SB_NC_P7 6 MF
402
NC1 P8 TP_SB_NC_P8 6 92 USB2_OC<0> (USB2_OC<0>) B12 OCI1
NC2 R3 TP_SB_NC_R3 6 92 USB2_OC<1> (USB2_OC<1>) B11 OCI2

R9104
NC3 R4 TP_SB_NC_R4 6 92 USB2_OC<2> (USB2_OC<2>) B10 OCI3 36
1 2
NC4 R5 TP_SB_NC_R5 6 94 USB2_OC<3> (USB2_OC<3>) A10 OCI4
1%
NC5 R6 TP_SB_NC_R6 6 92 USB2_OC<4> (USB2_OC<4>) B9 OCI5 1/16W
RSDM3 H11 USB_NEC_N<2> MF
NC6 R7 TP_SB_NC_R7 6 402
DM3 G11 (USB2_N<2>) USB2_N<2> 91 92
NC7 R8 TP_SB_NC_R8 6 92 USB2_PWREN<0> C12 PPON1
DP3 G13 (USB2_P<2>) USB2_P<2> 91 92
NC8 T1 TP_SB_NC_T1 6 92 USB2_PWREN<1> A11 PPON2
RSDP3 G14 USB_NEC_P<2>
NC9 T2 TP_SB_NC_T2 6 92 USB2_PWREN<2> C11 PPON3
R9105
NC10 T3 TP_SB_NC_T3 6 92 USB2_PWREN<3> C10 PPON4 36
1 2
NC11 T4 TP_SB_NC_T4 6 92 USB2_PWREN<4> A9 PPON5
1%
NC12 T5 TP_SB_NC_T5 6 1/16W
MF
NC13 T6 TP_SB_NC_T6 6 402
NC14 T7 TP_SB_NC_T7 6
B NC15 T8 TP_SB_NC_T8 6
R9106
36
B
NC16 U1 TP_SB_NC_U1 6 1 2
NC17 U2 TP_SB_NC_U2 6 1%
1/16W
NC18 U3 TP_SB_NC_U3 6 RSDM4 F12 USB_NEC_N<3> MF
402
NC19 U4 TP_SB_NC_U4 6 91 7 _PP3V3_PWRON_USB DM4 F14 (USB2_N<3>) USB2_N<3> 91 94
NC20 U5 TP_SB_NC_U5 6 DP4 E12 (USB2_P<3>) USB2_P<3> 91 94
NC21 U6 TP_SB_NC_U6 6 RSDP4 E14 USB_NEC_P<3>

NC22 V1 TP_SB_NC_V1 6 R91401 1
R9141 R9107
36
NC23 V2 TP_SB_NC_V2 6 1.5K 1.5K 1 2
5% 5%
NC24 V3 TP_SB_NC_V3 6 1/16W 1/16W 1%
MF MF 1/16W
NC25 V4 TP_SB_NC_V4 6 402 2 2 402
MF
402
NC26 W1 TP_SB_NC_W1 6
P6 NC1
NEC_NC1_PU
NC27 W3 TP_SB_NC_W3 6
M6 NC2 R9108
NEC_NC2_PU
NC28 Y1 TP_SB_NC_Y1 6 36
1 2
NC29 Y3 TP_SB_NC_Y3 6
1%
1/16W
RSDM5 E13 USB_NEC_N<4> MF
402
DM5 D14 (USB2_N<4>) USB2_N<4> 91 92
DP5 C13 (USB2_P<4>) USB2_P<4> 91 92
L9 XT1/SCLK RSDP5 C14 USB_NEC_P<4>

NEC_CLK30M_XT1
91
P8 XT2
R9109
91 NEC_CLK30M_XT2_R
1
36 2
1%
2
R9145 1/16W
MF
100 402
5%
1/16W
MF RREF P11 NEC_RREF_PD
A
AVSS(R)
CRITICAL 1 402
Y9145
30.0000M NEC_CLK30M_XT2 91 R91381
A
1 2 9.09K
VSS AVSS 1%
1/16W
P10
N14
H14
B14
N13
B13
M11
L12
H12
D12
J11
F11
P13
M12
N11
8X4.5MM-SM
B1
N1
A2
B2
N2
G4
D8
MF
C9145 1 1 C9146 R9139 402 2
27pF 27pF 0 Tie to GND at ball N11
5% 5% 2 1
50V 2 50V
CERM 2 CERM 5% GND_NEC_AVSS_R
402 402 1/16W VOLTAGE=0V
MF MIN_LINE_WIDTH=20 mil
603 MIN_NECK_WIDTH=10 mil
Y9145 LOAD CAPACITANCE IS 16pF

DRAWING
TITLE=FIZZY
ABBREV=DRAWING
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PROVIDED USB2 USB2_PORT1_F USB2_PORT1_P_F 6 92
BY USB2 USB2_PORT1_F USB2_PORT1_N_F 6 92
USB USB2 USB2_PORT2_F USB2_PORT2_P_F 6 92
CONTROLLER USB2 USB2_PORT2_F USB2_PORT2_N_F 6 92
I526 USB2 USB2_PORT3_F USB2_PORT3_P_F 6 92
I527 USB2 USB2_PORT3_F USB2_PORT3_N_F 6 92
External USB Ports

D D
Page Notes L9210
FERR-250-OHM
Power aliases required by this page: PP5V_USB2 1 2 6 PP5V_USB2_PORT1_F
59
- _PP5V_PWRON_USB VOLTAGE=5V SM VOLTAGE=5V
MIN_LINE_WIDTH=20MIL NOSTUFF MIN_LINE_WIDTH=20MIL
- _PP5V_PWRON_UDASH MIN_NECK_WIDTH=20MIL
- _PP3V3_PWRON_UDASH
1
C9210 1 C9211MIN_NECK_WIDTH=20MIL
150uF 10uF
- _PP3V3_PWRON_BT L9211 20%
2 6.3V
10%
2 16V
FERR-250-OHM POLY X5R
1210
Signal aliases required by this page: 1 2
SMD
(NONE) SM
NOTE: This page is expected to contain the
necessary aliases to map the
GND_USB2_PORT1
VOLTAGE=0V
C9212 1 C9213 1 CRITICAL
MIN_LINE_WIDTH=25MIL 0.01uF 0.01uF
USB pairs to their appropriate MIN_NECK_WIDTH=25MIL 20%
16V
20%
16V J9210
CERM 2 CERM 2 USB
destinations and/or to properly 402 402 F-ST-TH
terminate unused signals. L9212 5
PORT 1
165-OHM
SM 6
BOM options provided by this page: SYM_VER-1
(NONE) 91 USB2_N<0> USB2_PORT1_N 1 4

ALIAS 1
MAKE_BASE=TRUE VDD
NOTE: USB pairs are NOT constrained on 92 6 USB2_PORT1_N_F D- 2
this page. It is assumed that the 91 USB2_P<0> USB2_PORT1_P 2 3 92 6 USB2_PORT1_P_F D+ 3

ALIAS
MAKE_BASE=TRUE 4
USB Host Controller page will GND
1 1
provide the appropriate constraints R9210 R9211 NO STUFF NO STUFF
to apply to entire USB D+/D- XNets. 15K
5%
15K
5%
C9214 1 1 C9215 7
1/16W 1/16W 33pF 33pF

MF MF 5% 5%
50V 50V
402 2 2 402 CERM 2 2 CERM 514-0080
neoBorg Implementation C
C NOTE: This design does not provide power
402 402
GND_CHASSIS_USB
control on USB ports 2-4. Rename
USB controller outputs to indicate
single-pin connections. MIN_LINE_WIDTH=25MIL
L9220 VOLTAGE=0
91 USB2_PWREN<0> TP_USB2_PWREN<0> 6
FERR-250-OHM 7 92
ALIAS
MAKE_BASE=TRUE 1 2 6 PP5V_USB2_PORT2_F
91 USB2_PWREN<1> ALIAS TP_USB2_PWREN<1> 6 VOLTAGE=5V
MAKE_BASE=TRUE SM NOSTUFF MIN_LINE_WIDTH=20MIL
91 USB2_PWREN<2> ALIAS TP_USB2_PWREN<2>
MAKE_BASE=TRUE
6 1
C9220 1 C9221
150uF 10uF
91 USB2_PWREN<3> ALIAS TP_USB2_PWREN<3>
MAKE_BASE=TRUE
6 L9221 20%
2 6.3V
10%
16V
FERR-250-OHM POLY
2 X5R
USB2_PWREN<4> TP_USB2_PWREN<4> 6 SMD 1210
91 ALIAS
MAKE_BASE=TRUE 1 2
SM
GND_USB2_PORT2
VOLTAGE=0V
C9222 1 C9223 1 CRITICAL
MIN_LINE_WIDTH=25MIL 0.01uF 0.01uF
MIN_NECK_WIDTH=25MIL 20%
16V
20%
16V J9220
CERM 2 CERM 2 USB
402 402 F-ST-TH
L9222 5
PORT 2
165-OHM
SM 6
SYM_VER-1
91 USB2_N<1> USB2_PORT2_N 1 4
ALIAS 1
MAKE_BASE=TRUE
92 6 USB2_PORT2_N_F
VDD
D- 2 Q37 BlueTooth Connector
USB2_P<1> USB2_PORT2_P 2 3 92 6 USB2_PORT2_P_F D+ 3 SDF9200
91 ALIAS
MAKE_BASE=TRUE 4
STDOFF-197OD-283H-TH
GND
1
R92201 1
R9221 NO STUFF NO STUFF
7 _PP3V3_PWRON_BT
15K 15K C9224 1 1 C9225 7
B 5%
1/16W
MF
5%
1/16W
MF
33pF
5%
50V
5%
33pF
50V
91 USB2_OC<4> ALIAS
CRITICAL
J9240
B
402 2 2 402 CERM 2 2 CERM 514-0080
402 402 C9240 1 C9241 1 53353
M-ST-SM
10uF 0.1uF
20% 20% 1 2 NC
GND_CHASSIS_USB 6.3V 10V
7 92 CERM 2 CERM 2 3 4
805 402 NC
USB2_N<4> 6 USB_BT_N 5 6 NC
F9200 L9230 91
USB2_P<4>
ALIAS
MAKE_BASE=TRUE
USB_BT_P 7 8 NC
2AMP-6V FERR-250-OHM 91 ALIAS
6
MAKE_BASE=TRUE 9 10 NC
7 _PP5V_PWRON_USB 1 2 1 2 6 PP5V_USB2_PORT3_F 1 1
SM NOSTUFF
VOLTAGE=5V
MIN_LINE_WIDTH=20MIL R9240 R9241
SM-1 MIN_NECK_WIDTH=20MIL 15K 15K 516S0097
1
C9230 1 C9231 5%
1/16W
5%
1/16W
150uF 10uF MF MF
1
R9200 L9231 20%
2 6.3V
10%
16V 402 2 2 402 SDF9201
160 FERR-250-OHM POLY
2 X5R STDOFF-197OD-283H-TH
5% SMD 1210
1/16W 1 2 1
MF
SM
2 603
USB2_OC<0> USB_OC
GND_USB2_PORT3
VOLTAGE=0V
C9232 1 C9233 1
CRITICAL
91 ALIAS
MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL 0.01uF 0.01uF
USB2_OC<1>
16V
20%
16V J9230
91 ALIAS 1 CERM 2 CERM 2 USB
R9201 402 402 F-ST-TH
5
91 USB2_OC<2> ALIAS 300 L9232
PORT 3
5% 6
1/16W 165-OHM
MF SM
SYM_VER-1
2 603
91 USB2_P<2> USB2_PORT3_P 1 4 92 6 USB2_PORT3_P_F VDD 1
ALIAS
MAKE_BASE=TRUE 2
92 6 USB2_PORT3_N_F D-
D+ 3
91 USB2_N<2> USB2_PORT3_N 2 3
ALIAS 4
MAKE_BASE=TRUE GND
A R9230
15K
1 1
R9231
15K
NO STUFF
C9234 1 1
NO STUFF
C9235 7
A
5% 5% 33pF 33pF
1/16W 1/16W 5% 5%
MF MF 50V 50V
402 2 2 402 CERM 2 2 CERM 514-0080
402 402
GND_CHASSIS_USB 7 92
DRAWING
TITLE=FIZZY
ABBREV=DRAWING
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8 7 6 5 4 3 2 1
Page Notes
- _PP3V3_PWRON_MODEM
NEED TO PICK A MODEM TO STUFF FOR EVT
Spec Load: 0.5 A active, 3 mA auxiliary
Signal aliases required by this page: AND THE CORRESPONDING STANDOFF
(NONE)
(NONE)
D D
SOFT MODEM IS PLAN OF RECORD
MICRODASH MODEM CONNECTOR LEFT ON FOR DEVELOPMENT PURPOSES ONLY
Q52 Modem Connector MicroDash Modem Connector NOSTUFF

SDF9400 SDF9402
STDOFF-4MM-9MMH-TH STDOFF-5MM-5.5MMH-TH
1 1
CRITICAL
USB2_OC<3>
J9401 91 ALIAS
C104A-H9.0 7 _PP3V3_PWRON_UDASH
NC 35 F-ST-SM
DEVELOPMENT
NC 31 32 NC DEVELOPMENT DEVELOPMENT NOSTUFF DEVELOPMENT
_PP3V3_PWRON_MODEM
7
C9400 1 C9401 1 R94002 1
R9401 DEVELOPMENT
1
R9402
4.7uF 0.1uF 10K 10K 10K
NC 1 2 NC 20% 20% 5% 5% 5%
3 4 NC
10V
CERM 2
10V
CERM 2 1/16W
MF
1/16W
MF
J9400 1/16W
MF
1206 402
402 1 5047
NC 5 6 MODEM_RING2SYS_L 6 25 94
2 402 F-ST-SM 2 402
NC 7 8 (+3.3V) 1 2 (+3.3V)
NC 9 10 NC (GND) 3 4 (RST*) UDASH_RESET_L 6 25
NC 11 12 NC 25 6 UDASH_SDOWN (SDOWN) 5 6 (RTS*) I2S1_MCLK 6 25 94

Default to Modem On 8
NC 13 14 NC (GND) 7 (DTR*) I2S1_RESET_L 6 25 94
15 16 NC 94 76 25 6 I2S1_DEV_TO_SB_DTI (RXD) 9 10 (GND)
17 18 NC 94 25 6 I2S1_SYNC (GPIO*) 11 12 (TXD*) I2S1_SB_TO_DEV_DTO 6 25 76 94
C NC 21
19 20
22 I2S1_SYNC 6 25 94 94 25 6 MODEM_RING2SYS_L
(GND)
(RING*)
13
15
14
16
(TRXC)
(GND)
I2S1_BITCLK 6 25 94 C
23 24 MODEM_RING2SYS_L SHOULD BE PULLED UP ON SB 18
94 76 25 6 I2S1_SB_TO_DEV_DTO I2S1_DEV_TO_SB_DTI 6 25 76 94 (HOOK) NC 17 (D-) 6 USB_UDASH_N ALIAS USB2_N<3> 91
25 26 19 20 MAKE_BASE=TRUE
94 25 6 I2S1_RESET_L (GND) (D+) 6 USB_UDASH_P ALIAS USB2_P<3> 91
27 28 21 22 MAKE_BASE=TRUE
18 6 I2C_UDASH_SCL (SCL) (GND)
94 25 6 I2S1_MCLK 29 30 I2S1_BITCLK 6 25 94 (GND) 23 24 (SDA) I2C_UDASH_SDA 6 18 DEVELOPMENT DEVELOPMENT
26
(A0) 25
28
(A1) UDASH_I2C_A1_PU 6 R94041 1
R9403
(SNDIN) NC 27 (+5V) 15K 15K
NC 33 34 NC
30
_PP5V_PWRON_UDASH 7 5% 5%
(SNDOUT) NC 29 (+5V) 1/16W 1/16W
NC 36 MF MF
402 2 2 402
516S0116 516S0121
DEVELOPMENT DEVELOPMENT
1 C9402 1 C9403
0.1uF 10uF
20% 20%
SDF9401 10V
2 CERM 2 6.3V
CERM
STDOFF-4MM-9MMH-TH 402 1206
GND_CHASSIS_MODEM 1
NOSTUFF
EMI9400
1 EMI-SPRING
S8-10OG
B NOSTUFF
B
J9402
013-0001-333
RJ11-ST-TH
1
2
From Intel Mobile Audio/Modem

Daughter Card Specification
Rev 1.0, February 22, 1999
1 - MONO_OUT/PC_BEEP 2 - AUDIO_PWRON
3 - GND 4 - MONO_PHONE
5 - AUXA_RIGHT 6 - RESERVED
7 - AUXA_LEFT 8 - GND
9 - CD_GND 10 - 5Vmain
11 - CD_RIGHT 12 - RESERVED
13 - CD_LEFT 14 - RESERVED
15 - GND 16 - PRIMARY_DN
17 - 3.3Vaux 18 - 5Vd
19 - GND 20 - GND
21 - 3.3Vmain 22 - AC97_SYNC
23 - AC97_SDATA_OUT 24 - AC97_SDATA_INB
25 - AC97_RESET# 26 - AC97_SDATA_INA
A 27
29
-
-
GND
AC97_MSTRCLK
28
30
-
-
GND
AC97_BITCLK A
8
www.vinafix.vn
7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AUDIO CODEC
APPLE P/N 353S0655
L9500 MIN_NECK_WIDTH=8MIL
VOLTAGE=3.3V
1000-OHM-200MA
99 98 97 7 PP3V3_AUDIO 1 2 PPV_3V3_AUDIO_CODEC PP4V5_AUDIO_ANALOG 95 99
0603
C9500 1
1 C9501 1 C9502 1 C9503
1UF 1UF 1UF
10UF 10% 10% 10%
20% 10V 10V 10V
6.3V 2 CERM 2 CERM 2 CERM
CERM 2 U9500
D 805
805 805 805 GND_AUDIO_CODEC 95 96 99
D
16
23
31
7
VDD VCC
PCM3052
I2S0_BITCLK 11 VQFN 2 AUD_CODEC_IN_L
25 NET_SPACING_TYPE=AUDIO BCK VINL 95
25 I2S0_SYNC 10 LRCK VINR 6 AUD_CODEC_IN_R 95
AUDI2S0OUT 13 DOUT
VOUTL 25 AUD_CODEC_OUT_L 96 97
AUDSPDIFOUT 14 DOUTS
VOUTR 24 AUD_CODEC_OUT_R 96 97
25 I2S0_SB_TO_DEV_DTO NET_SPACING_TYPE=AUDIO 12 DIN
VCOM 26 AUD_PCM_VCOM 97
21 I2CEN VREF1 4 AUD_PCM_REF1

NC 20 ADR VREF2 5 AUD_PCM_REF2
18 I2C_AUDIO_SCL 19 SCL VREFS 3 AUD_CODEC_LI_SHDN_L 95
18 I2C_AUDIO_SDA 18 SDA REFO 32 AUD_PSEUDO_VREF 95
25 I2S0_RESET_L 9 PDWN* MBIAS 27 AUD_PCM_MBIAS 95
MINM 28 AUD_MICIN_N 95
25 I2S0_MCLK NET_SPACING_TYPE=AUDIO 17 SCKI
MINP 29 AUD_MICIN_P 95
1 ATEST
R9516 NC
33
25 I2S0_DEV_TO_SB_DTI NET_SPACING_TYPE=AUDIO 1 2
DGND AGND C9504 1 1
C9505 1
C9507 1
C9509 1
C9511 1
C9513
5% 10UF 10UF 10UF 10UF 10UF 10UF
15
8
22
30
1/16W 20% 20% 20% 20% 20% 20%
1 6.3V
R9518 MF
402 CERM 2
805
2 16V
ELEC
2 16V
ELEC
2 16V
ELEC
2 16V
ELEC
2 16V
ELEC
47K SM SM SM SM SM
5%
1/16W
MF
2 402 R9517 C9506 1 C9508 1 C9510 1 C9512 1
1
33 2 10UF 0.1UF 0.1UF 0.1UF
98 AUD_SPDIF_OUT NET_SPACING_TYPE=AUDIO 20% 10% 10% 10%
6.3V 2 16V 2 16V 2 16V 2
C 5%
1/16W
MF
402
CERM
805
X7R
603
X7R
603
X7R
603 C
99 96 95 GND_AUDIO_CODEC
LINE IN PSEUDO-DIFFERENTIAL AMP

AV= 0.49
99 95 PP4V5_AUDIO_ANALOG
C9514 R9500 R9501

10UF
98 AUD_LI_L 2 1 AUD_LI_L1
20.5K2
1 AUD_LI_L2 1
10K 2
MICROPHONE IMPEDANCE MATCHING CIRCUIT
1% 1%
20% 1/16W 1/16W
16V MF MF AUD_PCM_MBIAS 95
ELEC 402 402
SM NOSTUFF
AUD_CODEC_IN_L 95 NOSTUFF
D9500 10 1
R9522 1
R9512
1
R9502 C9515 1 BAV99T
SOT-523-3
2
V+
MAX4253
UMAX 1K 1K
100K 0.47UF 1% 1%
20% 1 1
1%
1/16W
MF
10V
CERM 2
U9501 1/16W
MF
1/16W
MF
603 3 3 5 2 402 2 402
2 402 V-
4 APPLE P/N 353S0642 DIFFERENTIAL_PAIR=AUDIO_MIC
NET_SPACING_TYPE=AUDIO R9509
DIFFERENTIAL_PAIR=AUDIO_MIC_1
NET_SPACING_TYPE=AUDIO C9520 DIFFERENTIAL_PAIR=AUDIO_MIC_2
B 2
98 AUD_MIC_IN_P 1
165 2 AUD_MIC_P1
0.1UF
1 2
NET_SPACING_TYPE=AUDIO
AUD_MICIN_P 95
B
99 96 95 GND_AUDIO_CODEC 1%
10%
1/16W
1 C9519 1
MF
402 R95101 16V
X7R
603
R9514 1000PF 100K
10% 1%
100 C9516 25V 1/16W
5%
1/10W 10UF R9503 R9504 DIFFERENTIAL_PAIR=AUDIO_MIC
NET_SPACING_TYPE=AUDIO X7R 2
402 R9511
MF
402 2 C9521 DIFFERENTIAL_PAIR=AUDIO_MIC_2
FF 2 1 20.5K2 10K 0.1UF NET_SPACING_TYPE=AUDIO
2 805
AUD_LI_GNDL1 1 AUD_LI_GNDL2 1 2 165 1 2
98 AUD_MIC_IN_N 1 2 AUD_MIC_M1 AUD_MICIN_N 95
1% 1%
98 AUD_LI_GND 20% 1/16W 1/16W 1%
10%
16V MF MF NOSTUFF 1/16W DIFFERENTIAL_PAIR=AUDIO_MIC_1
ELEC 402 402 AUD_PSEUDO_VREF 95 MF NET_SPACING_TYPE=AUDIO 16V
1 1 X7R
SM R9523 402 R9513 603
1K 1K
1% 1%
C9517 R9505 R9506
1/16W
MF
1/16W
MF
99 96 95 GND_AUDIO_CODEC 10UF 2 402 2 402
2 1
20.5K2 10K
AUD_LI_GNDR1 1 AUD_LI_GNDR2 1 2
NOSTUFF 99 98 GND_AUDIO_MIC
1% 1%
R95201 20%
16V
1/16W
MF
1/16W
MF
47K ELEC 402 402
5% SM
1/16W
MF
402 2
NOSTUFF
R9521
0
95 AUD_CODEC_LI_SHDN_L 1 2 AUDLISHDNL
5%
1/16W NOSTUFF
MF 4
402 D9501 7
V-
1
R9519 1
R9515 BAV99T 6
A 47K
5% 1%
100K SOT-523-3
1 U9501 9 A
1/16W 1/16W
MF MF
3
8 V+ MAX4253
UMAX
2 402 2 402 10 AUD_CODEC_IN_R 95
C9518 R9507
2
R9508
10UF
2 1 1
20.5K2 1
10K 2
98 AUD_LI_R AUD_LI_R1 AUD_LI_R2
1% 1%
20% 1/16W 1/16W
16V MF MF
ELEC 402 402
SM
99 95 PP4V5_AUDIO_ANALOG
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CODEC OUTPUT LOW-PASS FILTER

FC = 37 KHZ, HO = -1.4
R9601
1
14K 2
1%
1/16W
MF
402
D C9600 R9600 R9602 C9601 D

10UF 270PF
1 2
10K 3.92K2 1 2
97 95 AUD_CODEC_OUT_L AUDCODECOUTL 1 2 AUDCODECOUTL1 1 AUD_LOAMP_OUT_L 96
1% 1%
20% 1/16W 1/16W 5%
16V MF MF 50V
ELEC 402 402 CERM
SM-1 603
AUD_LOAMP_IN_L_M 96
1 C9602
1.5NF
5%
25V
2 CERM
0603
R9603
AUD_LO_GND_PRB 1
14K 2 AUD_LOAMP_IN_L_P
98 96
1%
1
1/16W
MF R9604
402 10K
1%
1/16W
MF
2 402
GROUND NOISE
CANCELLATION
1 HEADPHONES/LINE OUT
R9605
10K
1%
1/16W
MF
99 96 95 GND_AUDIO_CODEC R9606 2 402
1
14K 2 AUD_LOAMP_IN_R_P 96
1%
C 1 C9604
1.5NF
1/16W
MF
402
C
5% AUD_LOAMP_IN_R_M 96
25V
2 CERM
0603
C9603 R9607 R9608 C9605

10UF 270PF
1 2 1
10K 2
3.92K2
1 1 2
97 95 AUD_CODEC_OUT_R AUDCODECOUTR AUDCODECOUTR1 AUD_LOAMP_OUT_R 96
1% 1%
20% 1/16W 1/16W 5%
16V MF MF 50V
ELEC 402 402 CERM
SM-1 603
R9609
1
14K 2
1%
1/16W
MF
402
HEADPHONES/LINE OUT AMP

APPLE P/N 353S0697
R9610 MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
PP5V_AUDIO_ANALOG 1
4.7 2 PPV_5V_AUDIO_LOAMP
99
5%
1/10W
MF
603
1
C9606
10UF
B 20%
2 16V
ELEC
B
SM
C9607 1 GND_AUD_LOAMP_CHGPMP 96 99
10UF
N20P80%
16V AUD_LOAMP_OUT_L
CERM 2 96
1210 U9600 R9611
13
14
1
99 96 GND_AUD_LOAMP_CHGPMP 9
1 2 AUD_LO_L
PVDD
VDDR
VDDL
98
MIN_LINE_WIDTH=20MIL 1% MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL 1/16W MIN_NECK_WIDTH=10MIL
MF
603
96 AUD_LOAMP_IN_L_M 14 LIN- LOUT 12
96 AUD_LOAMP_IN_L_P LIN+ MIN_NECK_WIDTH=10MIL
MAX9722 MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL R9612
8 QFN 14
96 AUD_LOAMP_IN_R_M RIN- ROUT 10 1 2 AUD_LO_R 98
96 AUD_LOAMP_IN_R_P 7 RIN+ 1%
AUD_MAX9722_C1P 1/16W
C1P 2 MF
603
16 SHDN* C1N 4
TO SHASTA GPIO R9616 1 C9608 1 C9609 AUD_LOAMP_OUT_R 96
1K AUDIO_LO_MUTE_L_F
PGND
SGND
PVSS
AUDIO_LO_MUTE_L 1 2 NC 17 1UF 1UF

VSS
25
10% 10%
5% 10V 10V
2 CERM 2 CERM
1/16W
805 805
R96151 MF
3
11
47K C9612 1 402 C9613 1

AUD_MAX9722_C1N
NOSTUFF NOSTUFF
100PF 100PF 1 1
5%
1/16W 5%
50V
5%
50V
R9617 R9618 MIN_NECK_WIDTH=10MIL
MF CERM 2 CERM 2 1K 1K R9613
402 2 402 402 1% 1%
1/16W 1/16W
1
14 2 AUD_LO_GND 98
MF MF
2 402 2 402 1%
1/16W
MIN_LINE_WIDTH=12MIL MF
GND_AUDIO_CODEC 603
A 99 96 95 MIN_NECK_WIDTH=8MIL
AUD_MAX9722_PVSS A
C9610 1 2
C9611
1UF 10UF
10% 20%
10V 1 16V
CERM 2 ELEC
GND_AUD_LOAMP_CHGPMP 805 SM
99 96
R9614
GND_AUD_LOAMP 1
14 2
99
1%
1/16W
MF
603
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
SPEAKER AMP
F9700 MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
VOLTAGE=12V L9700 MIN_NECK_WIDTH=10MIL
VOLTAGE=12V APPLE P/N 353S0680
VOLTAGE=12V 1.5A-24V XW9700
SM OMIT
SM
FERR-250-OHM
PP12V_AUDIO_SPKRAMP_F PP12V_AUDIO_SPKRAMP_F2 PP12V_AUD_SPKRAMP_PLANE
D 7 PP12V_AUDIO_SPKRAMP 1 2 1 2 1
SM-1
2
D
XW9703
OMIT
SM C9717 1
C9700 1 C9701 1 C9718 1 1 C9702 1 C9719 1 C9703 1 C9723
1 2 220UF 10UF 0.1UF 1UF 0.1UF 10UF 10UF
20% 220UF 10% 20% 20% 20% 10% 10%
16V 2 20%
ELEC 16V 2 16V 16V 16V 16V 16V 16V
SM-2 ELEC CERM 2 CERM 2 2 CERM 2 CERM 2 CERM 2 CERM
SM-2 1210 603 1206 603 1210 1210
GND_AUDIO_SPKRAMP_PLANE
MIN_NECK_WIDTH=8MIL
99 97
GND_AUDIO_SPKRAMP_PLANE
AUD_MAX9714_CHOLD
97 99
L9705 C9704 PP3V3_AUDIO_SPKR 97

1000-OHM-200MA 0.47UF
96 95 AUD_CODEC_OUT_L 1 2 AUDSAMPINLN 1 2
1
0603
10%
R9714
16V 10K NET_SPACING_TYPE=AUDIO
1 C9715 X7R
805 1/16W NET_SPACING_TYPE=AUDIO
100PF MF 180-OHM-1.5A
21
22
3
4
5%
L9706 50V
2 CERM C9705 AUDSAMPOUTLP 1 2 AUD_SPKR_OUTL_P 98
1000-OHM-200MA 402
0.47UF VDD CHOLD 7 0603
AUD_SAMP_INL_N 9 LIN-
1 2 AUDSAMPINLP 1 2 NET_SPACING_TYPE=AUDIO
LOUT+ 31 MIN_LINE_WIDTH=20MIL
0603
10% AUD_SAMP_INL_P 10 LIN+ LOUT+ 32
16V MIN_NECK_WIDTH=10MIL 180-OHM-1.5A
X7R
95 AUD_PCM_VCOM 805 LOUT- 29 AUDSAMPOUTLN 1 2 AUD_SPKR_OUTL_N 98
AUD_SAMP_INR_P 15 RIN+
L9707 C9706 LOUT- 30 MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
0603
1000-OHM-200MA 0.47UF
1 2 AUDSAMPINRP 1 2
AUD_SAMP_INR_N 16 RIN- U9700 CP+ 6 AUDSAMPCPP
0603 AUD_SAMP_G1 17 G1 MAX9714 MIN_LINE_WIDTH=8MIL

1 C9708
10% 97
QFN MIN_NECK_WIDTH=6MIL 0.1UF
16V 97 AUD_SAMP_G2 18 G2 10%
50V
X7R CP- 5 AUDSAMPCPM 2 X7R
1 C9716 805
C
C 5%
100PF 97 AUD_SAMP_FS1
AUD_SAMP_FS2
19 FS1
20 FS2 ROUT+ 27 NET_SPACING_TYPE=AUDIO
603
L9703
50V
2 CERM
97
ROUT+ 28 MIN_NECK_WIDTH=10MIL
180-OHM-1.5A
L9708 402 C9707 11 AUDSAMPOURTP 1 2 AUD_SPKR_OUTR_P
1000-OHM-200MA 0.47UF
SHDN*
ROUT- 25
98
0603
96 95 AUD_CODEC_OUT_R 1 2 AUDSAMPINRN 1 2 NC 8 NC ROUT- 26
0603 NET_SPACING_TYPE=AUDIO
R9715 10%
16V
AUD_MAX9714_VREG 14 VREG
CSS 12
L9704 MIN_LINE_WIDTH=20MIL
10K X7R MIN_LINE_WIDTH=8MIL THM PGND MIN_NECK_WIDTH=10MIL 180-OHM-1.5A
97 PP3V3_AUDIO_SPKR 1 2 AUDIO_SPKR_MUTE_L_INV 805 MIN_NECK_WIDTH=6MIL AGND PAD
AUDSAMPOUTRN 1 2 AUD_SPKR_OUTR_N
13
33
23
24
98
1%
1/16W 0603
MF
TIE TO SHASTA GPIO R9713

D Q9700 D Q9700 AUDSAMPCSS
1 C9710 1 C9711 1 C9712 1 C9713
2N7002DW 2N7002DW 1000PF 1000PF 1000PF 1000PF
47K AUDIO_SPKR_MUTE_L_F 2
SOT-363
5
SOT-363
5% 5% 5% 5%
25 AUDIO_SPKR_MUTE_L 1 2 G S G S
2 25V
CERM 2 25V
CERM
25V
2 CERM 2 25V
CERM
5% 603 603 603 603
1/16W 1 4
MF
402 1 C9709
C9714 0.47UF
R97121 C9720 1 C9721 1
1
0.47UF
10%
16V
47K 100PF 100PF 10% 2 X7R
5%
1/16W 5%
50V
5%
50V 2 16V
X7R
805
MF CERM 2 CERM 2 805
402 2 402 402
XC9700
50R28
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
1
MIN_NECK_WIDTH=10MIL XW9701 MIN_NECK_WIDTH=10MIL

B 99 7 GND_AUDIO_SPKRAMP 1
OMITSM
2
B
XW9702OMIT
SM
1 2
GAIN SETTINGS: +16DB

MODULATION SETTING: LOW EMI
99 97 GND_AUDIO_SPKRAMP_PLANE
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
L9709 L9710
1000-OHM-EMI 1000-OHM-EMI
PP3V3_AUDIO_SPKR_EMI
99 98 95 7 PP3V3_AUDIO 1 2 1 2 PP3V3_AUDIO_SPKR 97
SM SM
8 7 6 5
C9722 1 RP9700
100PF
5%
50V
47K
5%
CERM 2 1/16W
402 SM1
1 2 3 4
A 97
97
AUD_SAMP_G1
AUD_SAMP_G2
A
97 AUD_SAMP_FS1
97 AUD_SAMP_FS2
NOSTUFF NOSTUFF NOSTUFF NOSTUFF
1 1 1 1
R9708 R9709 R9710 R9711
0 0 0 0
5% 5% 5% 5%
1/16W 1/16W 1/16W 1/16W
MF MF MF MF
2 402 2 402 2 402 2 402
99 97 GND_AUDIO_SPKRAMP_PLANE
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TABLE_5_HEAD

LINE IN JACK 155S0169 5 FLTR,EMI,FERR BD,180 OHM,1.5A R9822,R9823,R9824,R9825,R9837
TABLE_5_ITEM
SPEAKER CABLE CONNECTOR

APPLE P/N 514-0098 155S0093 31 FLTR,EMI,FERR BD,100 OHM.0603
TABLE_5_ITEM
R9814,R9815,R9816,R9817,R9818,R9819,R9820,R9821,R9826,R9827,R9828,R9829,R9830,R9831,R9843,R9844,R9832,R9833,R9834,R9835,R9836,R9845,R9846,R9838,R9839,R9840,R9841,R9842,R9810,R9848,R9849
APPLE P/N 518-0138
CRITICAL OMIT OMIT
J9800 MIN_LINE_WIDTH=8MIL R9814 MIN_LINE_WIDTH=8MIL R9818 MIN_LINE_WIDTH=8MIL NET_SPACING_TYPE=AUDIO
AUDIO_JACK MIN_NECK_WIDTH=6MIL MIN_NECK_WIDTH=6MIL MIN_NECK_WIDTH=6MIL OMIT MIN_LINE_WIDTH=20MIL NET_SPACING_TYPE=AUDIO OMIT
F-ST-TH 0 0 MIN_NECK_WIDTH=12MIL MIN_LINE_WIDTH=20MIL
5
AUD_LI_L_JACK 1 2 AUD_LI_L_EMI 1 2 AUD_LI_L 95
R9822 MIN_NECK_WIDTH=12MIL R9824
CRITICAL
5% MF 5% MF 0 0
6 1/16W
OMIT
603 1/16W
OMIT
603 97 AUD_SPKR_OUTR_P 1 2 AUD_SPKR_OUTR_P_CONN J9801 AUD_SPKR_OUTR_N_CONN 1 2 AUD_SPKR_OUTR_N 97
5% MF 10-89-7082 5% MF
M-ST-TH
MIN_NECK_WIDTH=6MIL R9815 MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL R9819 MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
1/16W 603 1/16W 603
3 1
0 2 1
0 2
2 1
AUD_LI_DET_JACK AUD_LI_DET_EMI AUD_LI_DET_H 98 OMIT NET_SPACING_TYPE=AUDIO NET_SPACING_TYPE=AUDIO OMIT
MIN_LINE_WIDTH=20MIL 4 3 MIN_LINE_WIDTH=20MIL
D
4
2
5%
1/16W
OMIT
MF
603
5%
1/16W
OMIT
MF
603 R9823
0
8
5
7
0
D
97 AUD_SPKR_OUTL_N 1 2 AUD_SPKR_OUTL_N_CONN AUD_SPKR_OUTL_P_CONN 1 2 AUD_SPKR_OUTL_P 97
7 MIN_LINE_WIDTH=8MIL R9816 MIN_LINE_WIDTH=8MIL R9820 MIN_LINE_WIDTH=8MIL
5% MF 5% MF
AUDIO_GPIO_12_CONN
MIN_NECK_WIDTH=6MIL MIN_NECK_WIDTH=6MIL MIN_NECK_WIDTH=6MIL
8 1
0 2 1
0 2
99 98 97 95 7 PP3V3_AUDIO 1/16W 603 1/16W 603
AUD_LI_R_JACK AUD_LI_R_EMI AUD_LI_R 95
1
5% MF 5% MF R9813
1/16W 603 1/16W 603 47K
OMIT OMIT 5%
1/16W
MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL R9817 R9821 MIN_LINE_WIDTH=8MIL
MIN_NECK_WIDTH=6MIL
MF
2 402
AUD_LI_GND_JACK 1
0 2 1
0 2 AUD_LI_GND 95
L9800
1000-OHM-200MA 1 C9826 1 C9827
5% MF 5% MF
98 7 1/16W 603 1/16W 603 25 AUDIO_GPIO_12 1 2 1000PF 1000PF
5% 5%
GND_CHASSIS_AUDIO_EXTERNAL 1 C9800 1 C9801 1 C9802 1 C9803 1 3 SPEAKER TYPE DETECT 0603 25V
2 CERM
25V
2 CERM
MIN_LINE_WIDTH=8MIL 100PF 100PF 100PF 100PF DZ9800 TO SHASTA GPIO 603 603
2 50V
5%
2 50V
5%
2 50V
5%
2 50V 14V-15A
1 C9819 1 C9825 NOSTUFF NOSTUFF NOSTUFF NOSTUFF
98 AUD_LI_GND_EMI CERM
402
CERM
402
CERM CERM
0405 1000PF 1000PF 1 C9804 1 C9805 1 C9806 1 C9807
402 402 5% 5%
2 4 2 25V 2 25V 1000PF 1000PF 1000PF 1000PF
CERM CERM 5% 5% 5% 5%
603 603 25V 25V 25V 25V
2 CERM 2 CERM 2 CERM 2 CERM
GND_CHASSIS_AUDIO_EXTERNAL 603 603 603 603
98 7
98 7 GND_CHASSIS_AUDIO_INTERNAL
LINE IN PLUG DETECT OMIT OMIT

AUDIO_IN_DET0_L = LOW: PLUG INSERTED
AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED R9826 R9829
1
0 2 1
0 2
99 95 GND_AUDIO_MIC GND_AUDIO_MIC_EMI
99 98 97 95 7 PP3V3_AUDIO CRITICAL
5% MF 5% MF
1
1/16W 603 1/16W 603 J9802
R9801 OMIT OMIT HF28
1
47K M-ST-TH
R9800 5% R9827 R9830 1
C 5%
100K
1/16W
1/16W
MF
2 402
TO SHASTA GPIO 95 AUD_MIC_IN_P 1
0 2 AUD_MIC_IN_P_EMI 1
0 2
GND_AUDIO_MIC_CONN
AUD_MIC_IN_P_CONN 2 C
MF AUDIO_LI_DET_L 25 5% MF 5% MF AUD_MIC_IN_N_CONN 3
1/16W 603 1/16W 603
2 402
3 OMIT OMIT
APPLE P/N 518-0034 LINE OUT PLUG DETECTS
R9802
D
Q9800 R9828 R9831
2N7002 0 0
98 AUD_LI_DET_H 1
47K 2 AUDLINDETH 1 G S
SM 95 AUD_MIC_IN_N 1 2 AUD_MIC_IN_N_EMI 1 2 MIC CABLE CONNECTOR AUDIO_LO_DET_L = LOW: PLUG INSERTED
5%
5%
1/16W
MF
603
5%
1/16W
MF
603
AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
1/16W 2
MF
402
1 C9808 1 C9820 1 C9821 1 C9822 AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED
0.1UF AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
20% 1000PF 1000PF 1000PF
10V 10% 10% 10%
2 CERM
402 2 25V
X7R 2 25V
X7R 2 25V
X7R
402 402 402 99 98 97 95 7 PP3V3_AUDIO
98 7 GND_CHASSIS_AUDIO_INTERNAL 1
R9804
OMIT OMIT 1 47K
R9843 R9845 R9803 5%
1/16W
100K MF TO SHASTA GPIO
1
0 2 1
0 2
5% 2 402
95 AUD_SPDIF_OUT AUD_SPDIF_OUT_EMI AUD_SPDIF_OUT_JACK 1/16W
MF AUDIO_LO_DET_L 6 25
5% MF 5% MF
2 402
1/16W 603 1/16W 603
3 Q9801
OMIT OMIT 2N7002DW
MIN_LINE_WIDTH=12MIL D SOT-363
R9844 MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL R9846 MIN_NECK_WIDTH=8MIL R9805
PP5V_AUDIO 1
0 2 PP5V_AUDIO_SPDIF_EMI 1
0 2
PP5V_AUDIO_SPDIF_JACK
AUD_LO_DET1 1
47K 2 AUD_LO_DET1_1 5 G
7 98 S
5%
1/16W
OMIT
MF
603
5%
1/16W
OMIT
MF
603 LINE OUT JACK 5%
1/16W
MF 1 C9809 4
402
1 C9817 1 C9818 APPLE P/N 514-0116 0.1UF
R9832 R9838 0.1UF 1UF
20%
0 0 20% 10% CRITICAL 2 10V
CERM
98 AUD_LO_DET1 1 2 AUD_LO_DET1_EMI 1 2
B 5%
1/16W
MF
603
5%
1/16W
MF
603
2 10V
CERM
402
2 10V
CERM
805
J9803 402
B
OMIT OMIT AUDIO-JCK-SPDIF
F-ST-TH
R9833 MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL R9839 9 99 98 97 95 7 PP3V3_AUDIO
1
0 2 1
0 2 10
96 AUD_LO_R AUD_LO_R_EMI
1
5%
1/16W
MF
603
5%
1/16W
MF
603 MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL AUD_LO_GND_JACK 1 R9807 TO SHASTA GPIO
OMIT OMIT 3 1
47K
R9834 MIN_LINE_WIDTH=12MIL R9840
AUD_LO_DET1_JACK
4
R9806 5%
1/16W NOTE: NET NAME WILL CHANGE TO
MIN_NECK_WIDTH=8MIL MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL AUD_LO_R_JACK 100K MF
1
0 2 1
0 2 2 5% 2 402 AUDIO_LO_OPTICAL_PLUG_L
96 AUD_LO_L AUD_LO_L_EMI MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL AUD_LO_L_JACK 1/16W
MF AUDIO_LO_METAL_PLUG_L 25
5% MF 5% MF
5 2 402
1/16W
OMIT
603 1/16W
OMIT
603 AUD_LO_DET2_JACK
6 Q9801
6
2N7002DW
R9835 R9841 7
VIN
R9808
D SOT-363
0 0
LED
VDD
98 AUD_LO_DET2 1 2 AUD_LO_DET2_EMI 1 2
8 1
47K 2 2 G
GND 98 AUD_LO_DET2 AUD_LO_DET2_1 S
5% MF 5% MF
1/16W 603 1/16W 603 5%
11 NOSTUFF 1/16W 1
OMIT OMIT 12 1
MF 1 C9810
R9836 MIN_LINE_WIDTH=12MIL R9842 NOT USED: R9811, R9848, R9849. R9809 402
0.1UF
MIN_NECK_WIDTH=8MIL 100K 20%
0 0 5% 2 10V
CERM
96 AUD_LO_GND 1 2 AUD_LO_GND_EMI 1 2 MIN_LINE_WIDTH=12MIL 1/16W 402
MIN_NECK_WIDTH=8MIL MF
5% MF 5% MF
1/16W 603 1/16W 603 AUD_SPDIF_GND 2 402
R98121
OMIT OMIT 0
5% PLACE NEAR PLACE NEAR
R9837 R9810 1/16W
MF J9801 J700
0 0 402 2
96 AUD_LO_GND_PRB 1 2 AUD_LO_GND_PRB_EMI 1 2
XC9800 XC9801
A 5%
1/16W
MF
603
5%
1/16W
MF
603
50R28 50R28
A
1 C9823
1 C9811 1 C9813 1 C9815
1
100PF 100PF 100PF AUD_LI_GND_EMI
100PF 5% 5% 5% 98
5% 50V 50V 50V
50V 2 CERM 2 CERM 2 CERM
2 CERM 402 402 402 98 7 GND_CHASSIS_AUDIO_INTERNAL
402 1 3
1 C9824 1 C9812 1 C9814
100PF 100PF
100PF
1 C9816 DZ9801
5%
50V
5%
50V 5% 0.01UF 14V-15A
2 CERM 2 CERM 50V 10% 0405
402 402 2 CERM 16V
402 2 CERM 2 4
402
98 7 GND_CHASSIS_AUDIO_EXTERNAL
8
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7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
5V POWER SUPPLY FOR THE HEADPHONES/LINE OUT AMP UNUSED GPIO TERMINATIONS
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
APPLE P/N 353S0539 MIN_LINE_WIDTH=12MIL
NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=40MIL MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL MIN_LINE_WIDTH=25MIL
VOLTAGE=12V
VOLTAGE=12V
VOLTAGE=12V
VR9900 MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
99 98 97 95 7 PP3V3_AUDIO
L9900
D FERR-250-OHM
1 2
R9900
10 3
LM1117
SOT223-4
NOTE: NET NAME WILL CHANGE TO D
7 PP12V_AUDIO_CODEC AUD_12V_CODEC 1 2 AUD_12V_CODEC2 IN VOUT 4 PP5V_AUDIO_ANALOG 96 99 AUDIO_LI_OPTICAL_PLUG_L R9906
SM-1 5%
1W
OUT 2 AUDIO_LI_METAL_PLUG_L 1
47K 2
FF ADJ/GND 25
2512 1 R99011 5%
1/16W
205 MF
402
1%
1/16W
1 C9900 1
C9901 1
C9909 MF
1UF 220UF 220UF 402 2 1
C9903 R9907
20%
16V 20% 20% AUD_V5_REF 100UF 47K
2 CERM 2 16V 2 16V FC=7HZ 20% 25 AUDIO_HP_DET_L 1 2
ELEC ELEC 2 16V
1206 SM-2 SM-2 ELEC 5%
SM 1/16W
C9902 1 R99021 MF
402
100UF 634
1%
20%
16V 2
1/16W
MF R9908
ELEC
SM
402 2
AUDIO_SPKR_DET_L 1
47K 2
25
99 96 95 GND_AUDIO_CODEC
5%
1/16W
MF
402
R9909
1
47K 2
25 I2S2_DEV_TO_SB_DTI
5%
1/16W
MF
402
R9910
AUDIO_GPIO_11 1
47K 2
25
5%
C 4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

1/16W
MF
402
C
APPLE P/N 353S0733
VR9901
MAX8510 MIN_NECK_WIDTH=10MIL
SC70-5
VOLTAGE=4.5V
99 96 PP5V_AUDIO_ANALOG 1 IN OUT 5 PP4V5_AUDIO_ANALOG 95
R9916
47K
R9903 1 3 SHDN* BP 4 1 C9910 25 I2S2_BITCLK 1 2
100K 0.01UF 5%
NOSTUFF 1% 10% 1/16W
16V
1/16W GND 2 CERM MF
R9911 MF
402 2 2
402
402
100K 2 AUD_4V5_FB
99 98 97 95 7 PP3V3_AUDIO 1
R9917
1% AUD_4V5_SHDN* 47K
1/16W
MF
1 C9907 1
C9908 25 I2S2_SYNC 1 2
402 1UF 10UF 5%
10% 20% 1/16W
1 C9904 1 C9905 2 10V
CERM 2 16V
ELEC
MF
402
10UF 0.1UF NOT USED: C9906 805 SM-1
20% 10%
6.3V 16V
2 CERM
805
2 X7R
603
R9912
1
47K 2
25 AUDIO_HP_MUTE_L
99 96 95 GND_AUDIO_CODEC 5%
1/16W
MF
402
NOT USED: R9904,R9905
R9913
47K
B 25 AUDIO_EXT_MCLK_SEL 1
5%
2
B
1/16W
MF
402
R9914
1
47K 2
25 I2S2_RESET_L
PLACE ACROSS GROUND SPLIT 5%
1/16W
AT RIGHT SIDE OF C9707 MF
402
AUDIO GROUND RETURNS NOSTUFF
R9918
0
DIFFERENTIAL_PAIR=AUD_CODEC_PWR 97 GND_AUDIO_SPKRAMP_PLANE 1 2 GND_AUDIO_CODEC 95 96 99
NET_SPACING_TYPE=AUDIO MAKE_BASE=TRUE I88
MIN_LINE_WIDTH=40MIL MIN_LINE_WIDTH=25MIL 5%
MIN_NECK_WIDTH=12MIL MIN_NECK_WIDTH=10MIL 1/10W TP_I2S2_SB_TO_DEV_DTO I2S2_SB_TO_DEV_DTO 25
XW9900OMIT
VOLTAGE=4.5V FF
805
SM
MAKE_BASE=TRUE I89
7 GND_AUDIO 1 2 GND_AUDIO_CODEC 95 96 99
PLACE NEAR ENTRY TO SPEAKER TP_I2S2_MCLK I2S2_MCLK 25
AMP GROUND PLANE

NOSTUFF
XW9901
SM OMIT
VOLTAGE=4.5V
97 7 GND_AUDIO_SPKRAMP 1
0 2
1 2 GND_AUDIO_MIC 95 98 5%
1/10W
FF
805
XW9902OMIT
VOLTAGE=4.5V
SM
1 2 GND_AUD_LOAMP 96
A A
MIN_NECK_WIDTH=10MIL PLACE ACROSS GROUND SPLIT
XC9901 XW9903
SM OMIT
VOLTAGE=4.5V
AT CODEC U9500
50R28
1 1 2 GND_AUD_LOAMP_CHGPMP 96
NOSTUFF
R9915
0
99 96 95 GND_AUDIO_CODEC 1 2
5%
1/10W
MF
603
8
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G5 Imac A1058 051-6482

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PAGE PDF CIRCUIT BLOCK PAGE PDF CIRCUIT BLOCK

1 1 TABLE OF CONTENTS 48 38 U3LITE AGP

* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC

C POWER CLOCKS PAGE 55

AIRPORT USB 2.0

EDUCATION: NOT USED

PAGE 83 32-bit PCI (5V-3.3V/33MHz)

B EDUCATION: HARD DRIVE UATA UATA/133 CORE NCs

J8700 J9000, J9001

POWER SEQUENCE PIN

D PP24V_RUN PP12V_RUN PP5V_RUN PP5V_ALL PP3V3_RUN SMU_PWRSEQ_P9_5 13 (PWR_GOOD_SB_CORE) D

PP5V_RUN_AUDIO CPU CORE PP2V5_RUN_CPU_AVDD PP5V_PWRON PP3V3_PWRON PP1V2_SHASTA_CORE

LINEAR SWITCHER SWITCHER IN

PP2V5_PWRON FET SWITCH IN FET SWITCH IN

10/15/03 SWAPPED EI_CPU_TO_NB_AD17 WITH EI_CPU_TO_NB_AD24 ON J1400

11/03/03 REPINNED J9240 BLUETOOTH CONNECTOR

11/04/03 NEW AIRPORT CONNECTOR

C MASTER PAGE SYNC

11/11/03 PLL-LOCK LED CHANGED TO GREEN

B 11/13/03 CHANGED CRYSTAL Y5700 TO 197S0026

11/15/03 CHANGED J8303 TO 5 PIN CONNECTOR

11/17/03 NO_TEST, FUNC_TEST UPDATES

11/18/03 CHASSIS MODEM NO LONGER TIES TO REST OF CHASSIS

I388 NO_TEST=TRUE TP_SB_NC_T2 91 59 IN FILT_ANALOG_RED FUNC_TEST=TRUE

I398 NO_TEST=TRUE TP_SB_NC_U4 91 59 IN PP24V_INV FUNC_TEST=TRUE

I407 NO_TEST=TRUE TP_SATA_CLK25M 27 33 8 IN CPU_VID_R<5..0> FUNC_TEST=TRUE

CRITICAL 0.1UF ALIAS PP2V5_RUN_RAM 44 45 46 XW706

SILKSCREEN:1 SILKSCREEN:2 SILKSCREEN:RUN

TP_NB_THMI NB_THMI PCI_CLK33M_USB2 PCI_CLK_GP0

TP_PCI_CLK_P4 ALIAS PCI_CLK_P4 27 341T1366 1 IC,FLASH,1MX8,3.3V,90NS U7500

PP2V5_PWRON CRITICAL 742-0048 1 BAT,COIN,3V,220MAH,CR2032 BT700

4.7K CRITICAL 875-1752 1 GPU GAP PAD PAD4900

TP_SMU_CHARGE_BATT ALIAS SMU_CHARGE_BATT 13 MF CRITICAL 452-0678 6 CPU HEATSINK SCREW SRW800,SRW801,SRW802,SRW803,SRW804,SRW805

TP_ALS0_OUT ALIAS ALS0_OUT 13 CRITICAL 870-1177 6 CPU HEATSINK SPRING SPR800,SPR801,SPR802,SPR803,SPR804,SPR805

125 CRITICAL 730-0291 1 CPU HEATSINK HS2900

SMU ANALOG VREF POWER_FAIL_L

10K 10K 10K 10K 10K 20K

2 402 2 402 2 402 2 402 2 402 2 402 SDF800 SDF801 SDF802

SDF803 SDF804 SDF805

2.5V VOLTAGE REGULATOR

5% 2 CERM 2 CERM 10K

B PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

124-0324 1 CAP,AL ELEC,1500UF,6.3V C909 17_INCH_LCD

124-0322 1 CAP,AL ELEC,1800UF,6.3V C909 20_INCH_LCD

SHASTA CORE VOLTAGE REGULATOR

PP1V2_PWRON FET SWITCH PP1V2_RUN FET SWITCH

23 10 6 3 PP1V2_PWRON_SB_VCORE PP1V2_PWRON 23 10 6 3 PP1V2_PWRON_SB_VCORE Q1003 PP1V2_RUN

SMU_CLK10M_XTAL 15 MIL SPACING SMU_CLK10M_XIN 13

15 MIL SPACING SMU_CLK10M_XOUT_R 13 7 _PP3V3_ALL_RTC

15 MIL SPACING RTC_CLK32K_X2 13

System Management Unit C1308 1 8

D Power aliases required by this page:

reference used by monitoring 30 29 13 CPU_BYPASS_L Y Y N N 64 P0[3] AN03 TXD0 P6[3] 40 Y Y S S CPU_VID<3> 8

AC adapter ID. 8 ALS_GAIN_BOOST S Y S S 61 P0[6] AN06 RXD1 P6[6] 29 Y Y Y Y SMU_BOOT_RXD 8

8 SMU_ADAPTER_ID S Y S S 60 P0[7] AN07 TXD1 P6[7] 28 Y Y Y Y SMU_BOOT_TXD 8

MF 8 SMU_CHARGE_BATT S Y S S 33 P3[6] AN27 P9[7] 79 S Y S S ACCEL_LOWPWR_L 8 5%

27 14 EI_CPU1_SYNC H1 H1 G1 G1 EI_CPU1_CLK_P 14 27 27 14 EI_CPU1_CLK_N F1 F1 E1 E1 30 29 25 CPU_INT_L D1 D1 C1 C1 B1 B1 A1 A1 CPU_HRESET_L 13 29 30

H7 H7 G7 G7 EI_CPU_TO_NB_AD<11> 28 29 F7 F7 E7 E7 EI_CPU_TO_NB_AD<13> 28 29 D7 D7 C7 C7 EI_CPU_TO_NB_AD<21> 28 29 B7 B7 A7 A7 EI_CPU_TO_NB_AD<9> 28 29

FAN 0 - Q37 STYLE CPU FAN CONTROL CIRCUIT

R1605 2N7002 1 C1613 LM358-SOI 1N914 Q1601 I2C_TEMP_B_SCL 2 SCL

FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT

FAN 2 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT

I2C D & E BUS MICRODASH