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Version 1.

2 , May 2000

Application Note
AN-SMPS-1683X – 1

CoolSET
TDA16831 ... 34 for OFF – Line Switch Mode Power Supplies

Authors: Harald Zöllinger


Rainer Kling

Published by Infineon Technologies AG


http://www.infineon.com

Power Conversion

N e v e r s t o p t h i n k i n g
TDA1683X for OFF – Line Switch Mode Power Supplies

Contents:

CIRCUIT DESCRIPTION............................................................................................ 2

OPERATING PRINCIPLES ........................................................................................ 2

SMPS CALCULATION SOFTWARE FLYCAL .......................................................... 2

CIRCUIT DIAGRAM: .................................................................................................. 4

DESIGN PROCEDURE
DEFINE INPUT PARAMETERS:....................................................................................... 5
INPUT DIODE BRIDGE (BR1):....................................................................................... 5
DETERMINE INPUT CAPACITOR (C3):............................................................................ 5
TRANSFORMER DESIGN (TR1): ................................................................................... 7
WINDING DESIGN: ...................................................................................................... 8
OUTPUT RECTIFIER (D1):.......................................................................................... 10
OUTPUT CAPACITORS (C5 & C9): ............................................................................. 10
OUTPUT FILTER (L3 & C9): ...................................................................................... 11
VCC – SUPPLY:....................................................................................................... 11
CALCULATION OF SNUBBER NETWORK: ...................................................................... 12
CALCULATION OF LOSSES: ........................................................................................ 13
VOLTAGE REGULATION LOOP: ................................................................................... 15
REGULATION LOOP:.................................................................................................. 16
TRANSFER CHARACTERISTICS OF REGULATION LOOP ELEMENTS: ................................ 16
TRANSFORMER CONSTRUCTION ................................................................................ 21

LAYOUT RECOMMENDATION: .............................................................................. 22

OUTPUT POWER TABLE........................................................................................ 23

SUMMARY OF USED NOMENCLATURE ............................................................... 24


PARAMETERS ........................................................................................................... 24
REFERENCES ......................................................................................................... 26

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Circuit Description
The TDA 16831 ... 34 is a current mode pulse width modulator with an integrated CoolMOS
Transistor. It meets the need for minimum external control circuitry for a flyback application.
Current mode control means that the current (IPRI) through the CoolMOS Transistor and flyback
transformer is compared with a feedback signal derived from the output voltage (VOUT) of the flyback
application. The result of that comparision determines the on time (tON) of the CoolMOS Transistor.
To minimize external circuitry the current sense circuitry is integrated within the CoolSET controller.
The oscillator resistor and capacitor which determine the switching frequency are also integrated,
reducing the external connections. Special efforts have been made to compensate temperature
dependancy of clock frequency and to minimize the number of the passive components.

Operating Principles
The TDA 16831 ... 34 is designed for a current mode flyback configuration in discontinous current
mode.
The control circuit has a fixed frequency and the duty cycle (D) of integrated CoolMOS Transistor is
controlled to maintain a constant output voltage (VOUT).
The diagram below (Fig. 1) shows the input voltage (VDC IN) and the primary (IPRI) and secondary (ISEC)
transformer current.
When the CoolMOS Transistor is turned on, the start of all windings on the transformer will go positive.
The rectifier diode (D1) on the secondary side will be reverse-biased and will not conduct. Therefore
no current will flow in the secondary while the CoolMOS Transistor is turned on. During this phase,
energy is being stored in the primary winding inductance and the transformer may be treated as a
simple series inductor. The diagram shows (Fig. 1) that there will be a linear increase of primary
current (IPRI) while the primary CoolMOS Transistor is on.
When the CoolMOS Transistor is turned off, the voltage will reverse on all windings (flyback action)
until clamped by the secondary side widing through the secondary rectifier diode. Now the secondary
rectifier diode (D1) will conduct, and the magnetizing energy in the core will now transfer to the
secondary side during the reset interval.
This current will decrease from it’s peak value to zero, as shown in the diagram (ISEC). In this period
the complete stored energy in the primary inductance will be transferred to the secondary side
(neglecting losses), before the next store cycle starts. The secondary voltage (VSEC) is “reflected” back
(VR) through the transformer turns ratio to the primary winding and added to the input voltage
(VDC IN + VR). Additional transient voltage may appear on the primary winding due to energy stored in
uncoupled “leakage” inductance in the primary winding which isn’t clamped by the secondary side
winding. If the flyback current does not reach zero before the next “on” – Cycle the converter is
operating in continous current mode. When this system reverts to the continous operation, the transfer
function is changed to a two pole system with low output impedance and additional design rules
become important.

SMPS Calculation Software FLYCAL


FLYCAL is an EXCEL spread sheet with all needed Equations for calculating your SMPS easier.
FLYCAL corresponds with the calculating example in this application note, starting at page 5. You only
have to put in the main parameters of your application in FLYCAL and to follow
(like the calculating example in this application note) step by step. FLYCAL contents all used
equations from the example with the same consecutive numbering.

Page 2 of 28 AN-SMPS-1683X – 1
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Voltage and Current waveforms in discontinous mode operation:

Duty Cycle: D = 0,5 Duty Cycle: D < 0,5

VDC IN = VDC IN min VDC IN > VDC IN min


VIN + VR

VDC IN min + VR
VDC IN

Voltage
VDC IN min

IPEAK IPRI IPEAK IPRI

Current
IPEAK IPEAK
ISEC ISEC

0 tON tOFF T 0 tON tOFF T

Light load Full load

t ON
Fig. 1 Duty Cycle: D=
T

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Circuit Diagram:

Fig. 2

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Design Procedure for fixed frequency Flyback Converter with


TDA16831 ... 34 operating in discontinuous current mode.

Procedure Example

Define input Parameters:

Minimal AC input voltage: VAC min 85V


Maximal AC input voltage: VAC max 270V
Line frequency: fAC 50Hz
Max. Output power: POUT max 40W
Min. Output power: POUT min 1W
Output voltage: VOUT 12V
Output ripple voltage: VOUT Ripple 0,05V
Reflection voltage: VR 100V
Estimated efficiency: η 0,8
DC ripple voltage: VDC IN Ripple 20V
Auxiliary Voltage: VAux 12V
1
Optocoupler Gain: GC
TDA16834 for 40W @ 25°C
Used CoolSET

There are no special requirements imposed on the


input rectifier and storage capacitor in the flyback
converter. The components will be selected to meet
the power rating and hold-up requirements.
Maximum input power:

POUT max 40W


PIN MAX = (Eq 1) PIN MAX = = 50W
η 0,8

Input Diode Bridge (BR1):

PIN MAX 50W


I PRMS = (Eq 2) I PRMS = = 0,98 A
V AC min ⋅ cos ϕ 85V ⋅ 0,6

VDC max PK = V AC max ⋅ 2 (Eq 3) VDC max PK = 270V ⋅ 2 = 382V

Determine Input Capacitor (C3):

Minimum peak input voltage at ”no load” condition

VDC min PK = V AC min ⋅ 2 (Eq 4) VDC min PK = 85V ⋅ 2 = 120V

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we choose a ripple voltage of 20V

V DC min = V DC min PK − V Ripple (Eq 5) VDC min = 120V − 20V = 100V

Calculating discharging time at each half line cycle:

æ V ö æ 100V ö
ç arcsin DC min ç arcsin
TD = 5ms ⋅ ç1 + T D = 5ms • ç1 +
V DC min PK 120V = 8,1ms
(Eq 6)
ç 90 ç 90
ç ç
è è

Required energy at discharging time of C3:

WIN = PIN MAX ⋅ TD (Eq 7) WIN = 50W ⋅ 8,1ms = 0,41Ws

Calculating input capacitor value CIN:

2 ⋅ WIN 2 ⋅ 0,41Ws
CIN = (Eq 8) CIN = = 185µF
V 2
DC min PK − V DC
2
min 14400V 2 − 10000V 2

Alternative a rule of thumb on choosing CIN:

Input voltage CIN


115V 2µF/W
230V 1µF/W µF
85V ...270V 2 ...3µF/W.................... 50W ⋅ 3 = 150 µF
W
Postcalculation of input Capacitore:

Select a capacitor out of Epcos Databook


of Aluminium Electrolytic Capacitors.

The following types are preferred:

For 85°C Applications:


Series B43303-........ 2000h lifetime
B43501-........ 10000h lifetime

For 105°C Applications:


Series B43504-........ 3000h lifetime µF 400V (based on Eq 8)
We choose 180µ
B43505-........ 5000h lifetime

2 ⋅ WIN 2 ⋅ 0,41Ws
VDC min = VDC
2
min PK − (Eq 9) VDC min = 14400V 2 − = 99,2V
C IN 180 µF

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Transformer Design (TR1):

Dmax = 0,5 (see datasheet TDA16834)


Calculation of peak current on primary inductance:

2 ⋅ PIN MAX 2 ⋅ 50W


I LPK = (Eq 10) I LPK = = 2,02 A
VDC min ⋅ Dmax 99,2V ⋅ 0,5

D max 0,5
I LRMS = I LPK ⋅ (Eq 11) I LRMS = 2,02 A ⋅ = 0,83 A
3 3

Calculating of primary inductance within limit of


maximum Duty-Cycle :

Dmax ⋅ V DC min 0,5 ⋅ 99,2V


LP = (Eq 12) LP = = 246µH
I LPK ⋅ f 2,02 A ⋅ 100 *10 3 Hz

Select core type and inductance factor (AL) from


Epcos ferrite Databook or CD-ROM
Passive Components.
Selected core: E 32/16/9
Material = N27
AL = 244 nH
Fix maximum flux density: s = 0,5 mm
2
Bmax ≈ 0,2T ...0,3T for ferrite cores depending on core Ae = 83 mm 2
material. AN = 108,5 mm
lN = 64,4 mm
We choose 0,2T for material N27 weight ≈ 30g
PV = 190mW/g (200mT, 100kHz, 100°C)

The primary turns can be calculated as:

LP 246µH
NP = (Eq 13) NP = = 31,75 turns
AL 244nH

we choose Np = 32 turns

Number of secondary turns can be calculated as:

N P ⋅ (VOUT + V FDIODE ) 32 ⋅ (12V + 0,7V )


Ns = (Eq 14) Ns = = 4,06
VR 100V
we choose NS = 4 turns

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Number of auxiliary turns can be calculated as:

N P ⋅ (V Aux + VFDIODE ) 32 ⋅ (12V + 0,7V )


N Aux = (Eq 15) N Aux = = 4,06
VR 100V
we choose NAux = 4 turns

Postcalculation of primary inductance, primary peak


current, max. flux density and gap:

L P = N P2 ⋅ Al (Eq 16) LP = 32 2 ⋅ 244nH = 250µH

VDC min ⋅ Dmax 99,2V ⋅ 0,5


I LPK = (Eq 17) I LPK = = 1,98 A
Lp ⋅ f 250 µH ⋅ 100 * 10 3 Hz

L P ⋅ I LPK 250 µH ⋅ 1,98 A


B max = (Eq 18) Bmax = = 186mT
N P ⋅ Ae 32 ⋅ 83mm 2

4 ⋅ π ⋅10 −7 ⋅ N P2 ⋅ Ae 4 ⋅ π ⋅ 10 −7 ⋅ 32 2 ⋅ 83mm 2
s= (Eq 19) s= = 0,43mm
LP 250µH

Winding Design:

(see also page 21


Transformer Construction)

The primary winding of 32 turns has to be split into


16+16 turns in order to get best coupling between
primary and secondary winding.

The effective bobbin width and winding cross section


can be calculated: From bobbin datasheet E32/16/9: BW = 20,1mm
Margin determined: M = 4mm

BWe = BW − 2 ⋅ M (Eq 20) BWe = 20,1mm − 2 ⋅ 4mm = 12,1mm

AN ⋅ BWe
ANe = (Eq 21)
BW

Calculate copper section for primary and secondary


winding:

The winding cross section AN has to be splitted into


the number of windings.
Primary winding 0,5
Secondary winding 0,45
Auxiliary winding 0,05

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Copper space factor fCu :0,2 ....0,4 We calculate the available area for each winding:
Used for calculation: fCu =0,3

0,5 ⋅ AN ⋅ f Cu ⋅ BWe 0,5 ⋅ 108,5mm 2 ⋅ 0,3 ⋅ 12,1


AP = (Eq 22) AP = = 0,31mm 2
N P ⋅ BW 32 ⋅ 20,1

AWG = 9,97 ⋅ (1,8277 − (2 ⋅ log(d ))) (Eq 23) diameter dp ≈ 0,64mm 22 AWG

0,45 ⋅ AN ⋅ f Cu ⋅ BWe 0,45 ⋅ 108,5mm 2 ⋅ 0,3 ⋅ 12,1


As = (Eq 24) As = = 2,20mm 2
N s ⋅ BW 4 ⋅ 20,1

diameter ds 2 x 0,8mm 2 x 20 AWG

0,05 ⋅ AN ⋅ f Cu ⋅ BW e 0,05 ⋅108,5mm 2 ⋅ 0,3 ⋅12,1


Aaux = (Eq 25) Aaux = = 0,24mm 2
N aux ⋅ BW 4 ⋅ 20,1

diameter da ≈ 0,64mm 22 AWG

With the effective bobbin width we check the number


of turns per layer: Primary:

BWe 12,1mm
NP = (Eq 26) NP = = 17 turns per layer
dP 0,64mm

2 layer needed

Secondary:

12,1mm
NS = = 4 turns per layer
2 ⋅ 0,8mm

Auxiliary:

Can be neglected !

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Output Rectifier (D1):

The output rectifier diodes in flyback converters are


subject to a large PEAK and RMS current stress. The
values depend on the load, leakage inductance,
operating mode and output capacitor ESR.

Calculation of the maximum reverse voltage:

æ N ö æ 4ö
VRDiode = VOUT + ççV DC max PK ⋅ S (Eq 27) VRDiode = 12V + ç 382V ⋅ = 59,8V
è NP è 32

Calculation of the maximum current on secondary


side:

NP 32
I SPK = I LPK ⋅ (Eq 28) I SPK = 1,98 A ⋅ = 15,8 A
NS 4

I SRMS = I SPK ⋅ 1 ⋅ D max


3
(Eq 29) I SRMS = 15,8 A ⋅ 1 ⋅ 0,5 = 6,5 A
3

Output Capacitors (C5 & C9): To calculate the output capacitor, it is necessary to fix
the maximum voltage overshoot in case of switching
off @ maximum load condition.
Output capacitors are highly stressed in flyback After switching off the load, the regulation loop needs
converters. Normally the capacitor will be selected for about 5...10 periods of internal clock to reduce the
3 major parameters: capacitance value, low ESR duty cycle.
and ripple current rating.

Max. voltage overshoot: ∆VOUT ∆VOUT = 0,5V

Number of clock periods: nCP nCP = 5

I OUT max ⋅ n CP 3,33 A ⋅ 5


C OUT = (Eq 30) C OUT = = 333µF
∆VOUT ⋅ f 0,5V ⋅ 100 *10 3 Hz

Select a capacitor out of Epcos Databook


of Aluminium Electrolytic Capacitors.

The following types are preferred: We select 470µF 25V (based on Eq 30):

For 85°C Applications: B41826-A5477-M


Series B41826-........ 2000h lifetime
ESR ≈ Zmax = 0,06Ω @ 100kHz
For 105°C Applications:
Series B41856-........ 2000h lifetime IacR = 2,2A

ISRMS = 6,6A (Eq 29) you need 3 capacitor

Page 10 of 28 AN-SMPS-1683X – 1
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Output Filter (L3 & C9):

The output filter consists of one capacitor (C9) and


one inductor (L3) in a L-C filter topology.

Zero frequency of output capacitor (C9) and


associated ESR:

1 1
f ZCOUT = (Eq 31) f ZCOUT = = 5,6kHz
2 ⋅ π ⋅ R ESR ⋅ COUT 2 ⋅ π ⋅ 0,06Ω ⋅ 470µF

Calculating the needed inductance (L3) for substitute


the zero of the 3 output capacitors:

RESR 0,06Ω
LOUT = (Eq 32) LOUT = = 0,57 µH
2 ⋅ π ⋅ f ZCOUT ⋅ n pCOUT 2 ⋅ π ⋅ 5,6kHz ⋅ 3

VCC – Supply:

Start-up Resistor (R6 & R7):

ICCLmax = max. Quiescent Current (Control IC) ICCLmax = 80µA

ILoadC = VCC-Capacitor Load-Current (C4) ILoadC = 40µA

CVCC = Value of VCC-Capacitor (C4) CVCC = 22µF

VDC min 99,2V


RStart = (Eq 33) RStart = = 827kΩ
I CCL max + I LoadC (80 + 40) µA

R6 = R7 =1/2 RStart = 413,5kΩ

Choose 2 with value: 410kΩ

Start up Time tStart:

CVCC ⋅ VCCH 22µF ⋅ 12V


t Start = (Eq 34) t Sstart = = 6,6s
I LoadC 40µA

Internal Zener Diode:


Depending on the transformer construction and load
condition the auxiliary supply voltage varies within an
operating range. If VCC exceeds VZ (16V), the Note:
internal zener diode conducts. In this case we have Before the IC can be plugged into the application
to observe the internal power dissipation limits or board, the VCC capacitor has always to be
use an external zener diode on VCC pin. discharged!

Page 11 of 28 AN-SMPS-1683X – 1
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Calculation of Snubber Network:

(R10/C12/D3)

VSnub = V( BR ) DSS − VDC max − VR (Eq 35) VSnub = 650V − 382V − 100V = 168V

For calculating the snubber network it is neccesary to


know the leakage inductance. Most common way is
to have the value of the leakage inductance (LLK) in
percent of the primary inductance (Lp). If it is known
that the transformer construction is very consistent,
measuring the primary leakage inductance by
shorting the secondary windings will give an exact
number, assuming the availability of a good LCR In our example we choose 5% of primary inductance
analyser. for leakage inductance.

L LK = Lp ⋅ x% LLK = 250µH ⋅ 5% = 12,5µH

I LPK ⋅ LLK (1,98 A) 2 ⋅ 12,5µH


2

C Snub = (Eq 36) C Ssnub = = 1,1nF ≈ 1,2nF


(V R + VSsnub ) ⋅ VSnub (100V + 168V ) ⋅ 168V

(VSsnub + VR )2 − VR2 (168V + 100V )2 − 100V 2


RSnub = (Eq 37) RSnub = = 25,3kΩ
0,5 ⋅ LLK ⋅ I LPK ⋅ f
2 0,5 ⋅ 12,5µH ⋅ (1,98 A) 2 ⋅ 100 * 10 3 Hz
≈25kΩ

Page 12 of 28 AN-SMPS-1683X – 1
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Calculation of Losses:

Input diode bridge (BR1):

PDIN = I PRMS ⋅ V F ⋅ 2 (Eq 38) PDIN = 0,98 A ⋅ 1V ⋅ 2 = 1,96W

Copper resistivity p100 @ 100°C = 0,0172Ωmm /m


2
Calculation of copper resistance RCu:

l N ⋅ N P ⋅ p100 0,0644m ⋅ 32 ⋅ 17,2mΩmm 2 / m


RPCu = (Eq 39) RPCu = = 114,3mΩ
AP 0,31mm 2
0,0644m ⋅ 4 ⋅ 17,2mΩmm 2 / m
RSCu = = 2,01mΩ
2,20mm 2
Calculating of copper loss (TR1):

PCu = I LPK
2
⋅ DMAX ⋅ 1 ⋅ RCu (Eq 40) PPCu = (1,98 A) 2 ⋅ 0,5 ⋅ 1 ⋅ 114,3mΩ = 74,7mW
3 3

PSCu = (15,8 A) 2 ⋅ 0,5 ⋅ 1 ⋅ 2,01mΩ = 84,1mW


3
Output rectifier diode (D1): PCu = 74,7mW + 84,1mW = 158,8mW

1 − Dmax 1 − 0,5
PDDIODE = I SPK ⋅ ⋅ V FDIODE (Eq 41) PDDIODE = 15,8 A ⋅ ⋅ 0,7V = 4,52W
3 3

COOLMOS TRANSISTOR:
TDA16834
Calculated @ VDCmin = 99V
CO ≈ 50pF (CO = COSS + CExtern)
RDSON = 1,6Ω (@ 150°C) (see also TDA 16831 ... 34 Data Sheet)

Switching losses:

PSON = 1 ⋅ C O ⋅ VDC
2
min ⋅ f (Eq 42) PSON = 1 ⋅ 50 pF ⋅ 99V 2 ⋅ 100 *10 3 Hz = 24,5mW
2 2

PSOFF = 1 ⋅ (VDC min + VR ) ⋅ I LPK ⋅ f ⋅ t r (Eq 43) PSOFF = 1 ⋅ (99V + 100V ) ⋅ 2,02 A ⋅100kHz ⋅ 30ns = 197mW
6 6

Conduction losses:

PD = 1 ⋅ R DSON ⋅ I LPK
3
2
⋅ Dmax (Eq 44) PD = 1 ⋅ 1,6Ω ⋅ (1,98 A) 2 ⋅ 0,5 = 1,05W
3

Page 13 of 28 AN-SMPS-1683X – 1
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Summary of Losses:

PLosses = PSON + PSOFF + PD (Eq 44a) PLosses = 25,4mW + 197mW + 1005mW = 1,27W

Thermal Calculation:
K
Table of typical thermal Resistance [ ]:
W
Heatsink DIP8 SO14
No 90 112
3 cm² 64 92
6 cm² 56 78
K
dT = PLosses * Rth (Eq 44b) dT = 1,27W * 56 = 71,2 K
W
Tj = dT + Ta (Eq 44c) Tj = 71,2 K + 50°C = 121°C

Page 14 of 28 AN-SMPS-1683X – 1
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Voltage Regulation Loop:


5,5V
3,7k
FB
Reference: TL431 (IC2)
VREF =2,5V
IKAmin=1mA VFB

Optocoupler: SFH617-3 (IC1)


Fig. 3
Gc = 1 ...2 ≡ CTR 100% ...200%
VFD = 1,2V
IFmax =10mA (maximum current limit)
Vout

Primary side: R3 R4 R1

Feedback voltage: R5
Values from TDA16831...34 datasheet
VRef int = 5.5V typ. C1
VFBmax = 4,8V C2
RFB = 3,7k typ.
TL431 R2

Fig. 4

VRe f int 5,5V


I FB max = (Eq 45) I FB max = = 1,5mA
RFB 3,7kΩ

VRe f int − VFB max 5,5V − 4,8V


I FB min = (Eq 46) I FB min = = 0,19mA
R FB 3,7kΩ
Secondary side:

æV ö æ 12V ö
R1 = R2 çç OUT − 1 (Eq 47) R1 = 4,7k ⋅ ç − 1 = 17,86k
è VREF è 2,5V
the value of R2 can be fixed at 4,7k

(VOUT − (V FD + V REF ) ) (12V − (1,2V + 2,5V ) ) = 0,83k ≈ 910R


R3 ≥ (Eq 48) R3 ≥
I F max 10mA

æ I ö æ 0,2mA ö
V FD + ç R3 ⋅ FB min 1,2V + 910 R ⋅ ç
è Gc è 1
R4 ≤ (Eq 49) R 4 ≤ = 1,4k ≈ 1,2k
I KA min 1mA

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Regulation Loop:

VIN FPWR(p) FLC(p) Vout

KFB KVD

Fr(p)

+
Fig. 5
Vref

Transfer Characteristics of Regulation Loop Elements:

GC ⋅ 3k 7
K FB = Feedback
R3

R2 V
K VD = = REF Voltage Divider
R1 + R 2 VOUT

æ ö
ç
1 L P ⋅ f ⋅ η ç R L (1 + p ⋅ R ESR ⋅ C 5 )
FPWR ( p ) = ⋅ ⋅ç Power stage
Z PWM 2 ⋅ RL ç æç1 + p ⋅ æç R L + R ö÷ ⋅ C ö÷
çç è 2
ESR 5÷
èè
ZPWM = Transimpedance ∆VFB/∆ID

1 + p ⋅ R ESR ⋅ C 9
FLC ( p) = Output filter
1 + p ⋅ R ESR ⋅ C 9 + p 2 ⋅ L ⋅ C 9

1 + p ⋅ R5 ⋅ (C1 + C 2 )
Fr ( p) = Regulator
R1 ⋅ R 2
p⋅ ⋅ C1 ⋅ (1 + p ⋅ R5 ⋅ C 2)
R1 + R 2

Page 16 of 28 AN-SMPS-1683X – 1
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Zero’s and Poles of the transfer characteristics:

Poles of powerstage @ min. and max. load:

2 2
VOUT 12V 2 VOUT 12V 2
RLH = = = 3,6Ω RLL = = = 144Ω
POUT max 40W POUT min 1W

1 1
f OH = f OH = = 62,7 Hz
π ⋅ R LH ⋅ C 5 π ⋅ 3,6Ω ⋅ 1410µF

1 1
f OL = f OL = = 1,57 Hz
π ⋅ RLL ⋅ C 5 π ⋅ 144Ω ⋅ 1410µF

The gain (Gc) of the optocoupler stage KFB and the voltage divider KVD we use as a constant.

GC ⋅ 3k 7
K FB = KFB = 6,6 GFB = 16,4db
R3

R2 V
K VD = = REF KVD = 0,208 GVD = -13,6db
R1 + R 2 VOUT

With adjustment of the transfer characteristics of the regulator we want to have equal gain within the
operating range and to compensate the pole fo of the powerstage FPWR(ω).

Because of the compensation of the output capacitors zero (see page 11 Eq31, Eq32) we neglect this zero
and the LC-Filter pole.
So the transfer characteristics of the power stage is reduced to a single pole response.

In order to calculate the gain of the open loop we have to select the crossover frequency.

We calculate the gain of the Power-Stage with max. output power at the selected crossover frequency
fg = 3kHz:

ZPWM of TDA16834 =1,3 V/A

− t ON − t ON
é ù é ù
Z PWM (t ON ) = Z PWM ⋅
1
⋅ êt ON − T 1 + T 1 ⋅ e T 1 ú + 0, 6 ⋅ ê 1 − e T2
(formula according data sheet p. 12)
t ON êë ú êë

Page 17 of 28 AN-SMPS-1683X – 1
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TDA1683X for OFF – Line Switch Mode Power Supplies

with this formula we calculate ZPWM @ max. duty cycle:

−4 , 7 µs −4 , 7 µ s
é ù é ù
Z PWM (t ON ) = 1,3 ⋅
V 1 V
⋅ ê4,7 µs − 850ns + 850ns ⋅ e 850 ns
ú + 0,6 ⋅ ê1 − e
200 ns
= 1,7
A 4,7 µs ë ë A

Gain @ crossover frequency:

æ ö
ç
1 RL ⋅ L p ⋅ f ⋅ η ç 1
FPWR ( fg ) = ⋅ ⋅ç
Z PWM 2 ç 2
ç 1 + æç fg ö÷
ç ç fo ÷
è è

æ ö
ç
1 3,6 R ⋅ 250µH ⋅ 100kHz ⋅ 0,8 ç 1
FPWR (3kHz ) = ⋅ ⋅ç = 0,073
1,7 2 ç æ 3000 ö
2

çç 1 + ç ÷
è è 62,7

GPWR(3kHz) = -22,7db

Transfer characteristics:

50
50
Gr(ω)
G PWR ( ω )
Gain GFB
[db]
Gr( ω )

G FB 0
GVD
G MOD

0
GPWR(ω)

50 50
3 4 5
1 10 100 1 10 1 10 1 10
1 ω( i) 5
Fig. 6 1. 10
2. π

Page 18 of 28 AN-SMPS-1683X – 1
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TDA1683X for OFF – Line Switch Mode Power Supplies

At the crossover frequency (fg) we calculate for the open loop gain:

Gol(ω) = Gs (ω) + Gr (ω) = 0.

With the equations of the transfer characteristics we calculate the gain of the regulation loop @ fg.

The gain of the regulation loop we calculate:

Gs = GFB + GPWR + GVD = 16,4db – 22,7db – 13,6db

Gs = -19,9db

We calculate the separate components of the regulator:

Gs (ω) + Gr ( ω) = 0 Gr = 0 – (-19,9db) = 19,9db

1 + p ⋅ R5 ⋅ (C1 + C 2) )
Fr ( p) =
R1 ⋅ R 2
p⋅ ⋅ C1 ⋅ (1 + p ⋅ R5 ⋅ C 2)
R1 + R 2

R5 ⋅ (R1 + R 2 ) R1 ⋅ R 2
Gr

Gr = 20 ⋅ log R5 = 10 20

R1 ⋅ R 2 R1 + R 2
20, 9

R5 = 10 20
⋅ 3,72k = 41,7k ≈ 43k

1 1
fp = C2 = fp = 2*fg
2 ⋅ π ⋅ R5 ⋅ C 2 2 ⋅ π ⋅ R5 ⋅ 2 ⋅ fg

1
C2 = = 617 pF ≈ 680pF
2 ⋅ π ⋅ 43k ⋅ 6kHz
In order to have enough phase margin @ low load condition we select the zero frequency of compensation
network at the middle between min. and max. load pole of power stage.

f ol 1, 57
0 , 5⋅log 0 , 5⋅log
f om = f oh ⋅ 10 f oh
f om = 62,7 Hz ⋅ 10 62, 7
= 9,92 Hz

1 1
fz = C1 = − C2
2 ⋅ π ⋅ R5 ⋅ (C1 + C 2) 2 ⋅ π ⋅ R5 ⋅ fom

1
C1 = − 680 pF = 384nF ≈ 390nF
2 ⋅ π ⋅ 43k ⋅ 9,92 Hz

Page 19 of 28 AN-SMPS-1683X – 1
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TDA1683X for OFF – Line Switch Mode Power Supplies

Open Loop Gain

70

50

Gr( ω )

Gs( ω )

G( ω ) 0

50
60
3 4 5
1 10 100 1 10 1 10 1 10
1 ω( i) 5
1. 10
2. π

Fig. 7

Open Loop Phase

10 10

28

φr( ω )
66
φs( ω )

φ( ω )
104
0

142

180 180
3 4 5
1 10 100 1 10 1 10 1 10
1 ω( i) 5
1. 10
2. π
Fig. 8

Page 20 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

Transformer Construction

The winding topology has a considerable influence on the performance and relaibility of the
transformer.
To reduce leakage inductance and proximity to acceptable limits, the use of a sandwich construction is
recommended.
In order to meet international safety requirements a transformer for Off - Line power supply must have
adequate insulation between primary and secondary winding.
This can be achived by using a margin wound construction or using triple insulated wire for the
secondary winding.
The creepage distance for universal input voltage range is typically 8mm. This sets a minimum margin
width as a half of the creepage distance to 4mm. Additional the neccesary insulation between primary
and secondary winding is provided using three layers of basic insulation tape.

Example of winding topology for margin wound transformers:

BW*

BWe

Primary
Creepage second half
distance
Secondary
Triple insulation
Auxiliary

Primary
first half

margin margin
Fig. 9

Example of winding topology with triple insulated wire for secondary winding:

BW*

Primary
second half
Triple Insulated
Wire Secondary

Auxiliary

Primary
first half

Fig. 10

BW* : value from bobbin datasheet

Page 21 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

Layout Recommendation:

Fig. 11

In order to avoid crosstalk between Power- and Signal-Path on the board we have to use care
regarding the track layout when designing the PCB.
The Power-Path (see Fig. 11) has to be as short as possible and separated from the VCC-Path and
the Feedback-Path. All GND-Paths have to be connected together at pin 8 (star ground) (1 and 14 at
G-type) of TDA16831...34.

Page 22 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

Output Power Table


Output Power @ Output Power @
VIN = 190 – 270V VIN = 85 – 270V
Device Package Heatsink Heatsink Heatsink Heatsink Heatsink Heatsink
TDA No 3 cm² 6 cm² No 3 cm² 6 cm²
16831 DIP8 *17W *17W *17W *12W *12W *12W
16832 DIP8 24W 30W 32W 15W 18W 20W
16833 DIP8 **36W 49W 55W 26W 31W 34W
16834 DIP8 **34W 52W 60W 34W 42W 45W
16831G SO14 *17W *17W *17W *12W *12W *12W
16832G SO14 **21W 24W 26W 13W 15W 16W
16833G SO14 **23W 25W 28W 23W 25W 28W

Output Power Table Notes:


This output power table was created with the equations of this application note (see „Calculation of
Losses“ on page 13 / 14), it shows the maximum practical continuous power @ Ta = 50 °C and
Tj = 125 °C with the recommended heatsink.

The conduction losses are calculated with the typical RDSON @ Tj = 125°C (see Data Sheet TDA 1683x
page 13). The OFF switching losses are calculated with a typical fall time of tf = 50 ns (see Data Sheet
TDA 1683x page 13), the ON switching losses with the effective capacitance (+ estimated external
capacitances) of the used device (see also Data Sheet TDA 1683x page 13).

*The current limitation regulates the output power (see Data Sheet TDA 1683x page 13)

** The power losses are spitted in switching losses (CoolMOS) and conduction losses. It´s depending
on VDCin witch part on losses having more impact of the power losses (Chart: Select your device).

Chart: Select your Device (Tj @ 125°C, Ta @ 50°C, Vreflection @ 100V )

Power Losses of all Devices @ typical Pout

1,60

1,40

1,20
Small – Range

1,00
Power Losses [W]

0,80

0,60

0,40

0,20

0,00
90 115 140 165 190 215 240 265 290 315 340 365
Input Voltage - Vdcin [V]

TDA16834@35W TDA16833_G@35W TDA16831_32_G@15W TDA16822@15W

Page 23 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

Summary of used Nomenclature


Parameters
Bmax Magnetic Inductance
BW Bobbin Width
BWe Effective Bobbin Width
CIN Capacitance of Bulk Capacitor
CO Output Capacitance
COSS Output Capacitance of CoolMOS
CExtern Output Capacitance of external Components
CSnub Capacitance of Snubber – Capacitor
CVCC Capacitance of VCC – Capacitor
D Duty Cycle
Dmax Maximum Duty Cycle
f Operating Frequency of CoolSET (f = 100kHz)
fAC Line Frequency (Germany FAC = 50Hz)
fg Crossover Frequency
fCu Copper Space Factor (0,2 ... 0,4)
fOH Frequency Open Loop (High)
fOm Frequency Open Loop (middle)
fOL Frequency Open Loop (Low)
fZCOUT Zero Frequency of output Capacitor
GC Optocoupler Gain
ICCLmax Maximum quiescent Current of CoolSET (Control IC)
IFBmax Maximum Feedback Current
IFBmin Minimum Feedback Current
IFmax Maximum Current (Optocoupler)
IKAmin Minimum Current (TL431)
ILoadC VCC – Capacitor Load – Current
ILPK Peak Current through the primary Inductance
ILRMS Root Mean Square Current through the primary Inductance
IPRMS Root Mean Square Current through the Bridge Rectifier
IPRI Primary Current @ time t
ISEC Secondary Current @ time t
ISPK Peak Current through the secondary Inductance
ISRMS Root Mean Square Current through the secondary Inductance
LOUT Inductance output Filter
LP Primary Inductance
LLK Leakage Inductance
M Margin (of Transformer)
nCP Number of Clock Periods
npCOUT Number of parallel output Capacitors
NP Number of primary Turns
NS Number of secondary Turns
NAux Number of auxiliary Turns
PCu Power losses of Copper Resistor
PD Conduction losses
PDIN Power losses input Diode
PDDIODE Power losses rectifier Diode (secondary side)
PIN MAX Maximum Input Power
POUT max Maximum Output Power
POUT min Minimum Output Power
PPCu Power losses of Copper Resistor (primary Inductance)
PSCu Power losses of Copper Resistor (secondary Inductance)
PSOFF Switching losses of CoolMOS Transistor (Off – Operation)
PSON Switching losses of CoolMOS Transistor (On – Operation)

Page 24 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

RCu Copper Resistor (Transformer)


RDSON Resistance of switching CoolMOS Transistor (On – Operation)
RL Load - Resistance
RLH Maximum Load
RLL Minimum Load (defined by Designer)
RFB Internal Feedback Resistor (CoolSET )
RPCu Copper Resistor of primary Inductance
RSCu Copper Resistor of secondary Inductance
RSnub Snubber Resistor
RStart Start up Resistor
1 1
T Time of one Period T= = = 10µs
f 100 *103 sec
TD Discharging Time of Input Capacitor C3
tON On Time (CoolMOS )
tOFF Off Time (CoolMOS )
tr Rising Time (Voltage)
tStart Start up Time
VAC min Minimal AC Input Voltage
VAC max Maximal AC Input Voltage
VAux Auxiliary Voltage
V(BR)DSS Drain Source Breakdown Voltage
VCCH Turn On Threshold for CoolSET @ Vcc - Pin
VDC IN DC Input Voltage
VDC IN max Maximum DC Input Voltage
VDC IN min Minimum DC Input Voltage
VDC max PK Maximum DC Input Voltage Peak
VDC min PK Minimum DC Input Voltage Peak
VDC min Minimum DC Input Voltage @ maximum load
VDDIODE Reverse Voltage rectifier Diode (secondary side)
VFBmax Maximum Feedback Voltage (CoolSET )
VFDIODE Output Diode Forward Voltage
VFD Forward Diode Voltage (Optocoupler)
VOUT Output Voltage (secondary Side)
VOUT Ripple Output Ripple Voltage (secondary Side)
VR Reflected Voltage (from secondary side to primary side)
VRDiode Reverse Voltage Diode
VRefint Internal Reference Voltage (CoolSET )
VREF Reference Voltage TL431
VRipple DC Ripple Voltage (on primary Side)
VSEC Voltage on Sekondary Inductor
VSnub Maximum Voltage overshoot @ snubber
W IN Discharging Energie Input Capacitor
ZPWM Transimpedanz

Page 25 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

References

[1] Keith Billings,


Switch Mode Power Supply Handbook

[2] Ralph E. Tarter,


Solid-State Power Conversion Handbook

[3] R. D. Middlebrook and Slobodan Cuk,


Advances in Switched-Mode Power Conversion

[4] Herfurth Michael,


Ansteuerschaltungen für getaktete Stromversorgungen mit Erstellung eines
linearisierten Signalflußplans zur Dimensionierung der Regelung

[5] Herfurth Michael,


Topologie, Übertragungsverhalten und Dimensionierung häufig eingesetzter
Regelverstärker

[6] Infineon Technologies,


Datasheet TDA16831 ... 34 Off – Line SMPS Controller with 600V CoolMOS
Transistor on Board,

Revision History
Application Note AN-SMPS-1683X-1
Actual Release: V1.2 Date:11.05.2000 Previous Release: V1.1
Page of Page of Subjects changed since last release
actual prev. Rel.
Rel.
28 21 Formatting

Page 26 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see the address list on the last page or our webpage at

http://www.infineon.com

CoolMOS and CoolSET are trademarks of Infineon Technologies AG.

Edition 2000--05--11
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 2000.
All Rights Reserved.

Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts
stated herein.
Infineon Technologies is an approved CECC manufacturer.

Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in
Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your
nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the
safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be
endangered.

Page 27 of 28 AN-SMPS-1683X – 1
V1.2
TDA1683X for OFF – Line Switch Mode Power Supplies

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