Professional Documents
Culture Documents
CSE 332 L5 - 11 Aug 2020 PDF
CSE 332 L5 - 11 Aug 2020 PDF
1
LESSON 5
Instruction Set Architecture (ISA) & It’s general classifications.
Source:
https://sites.google.com/site/neuro11school/lect
Instruction Set
To command a computer’s hardware, you must speak its language. The words
of a computer’s language are called instructions, and its vocabulary is called an
instruction set.
3
Instruction Set Architecture (ISA)
(Slide 5
Slide 14)
: 2 source, 1 destination
: y-r1, x-r2, b-r5
integer
(slide 6)
16 bits for 8086μP
(slide 12
32 bits for MIPS CPU
slide 13)
• addressing (slide 23)
4
Operands
6
How many Operands?
7
Location & how to specify?
8
Stack
11
Accessing the operands
12
Instruction Set
Register
Conventional Name Usage
Number
$0 $zero Hard-wired to 0
$1 $at Reserved for pseudo-instructions
$2 - $3 $v0, $v1 Return values from functions
Arguments to functions - not preserved by
$4 - $7 $a0 - $a3
subprograms
$8 - $15 $t0 - $t7 Temporary data, not preserved by subprograms
$16 - $23 $s0 - $s7 Saved registers, preserved by subprograms
More temporary registers, not preserved by
$24 - $25 $t8 - $t9
subprograms
$26 - $27 $k0 - $k1 Reserved for kernel. Do not use.
$28 $gp Global Area Pointer (base of global data segment)
$29 $sp Stack Pointer
$30 $fp Frame Pointer
$31 $ra Return Address
13
Instruction Length
14
MIPS Instruction Formats (32 bits long)
xxxxxx xxxxx xxxxx xxxxx xxxxx xxxxxx
Where x is 0 or 1.
Register format =0 s1 t1 t0
Immediate format
Base format
15
Which instructions
16
MIPS Instructions
17
MIPS Instruction Set
18
A Basic MIPS Instruction
C code: a=b+c;
C code a = b + c + d + e;
translates into the following assembly code:
MIPS code: MIPS code:
add a, b, c add a, b, c add $s0 , $t0 , $t1
add $s0 , $t0 , $t1
add $s0 ,$s0 , $t2 add a, a, d or add f, d, e add $s1 , $t2 , $t3
add $s0, $s0 , $t3 add $s0 , $s0, $s1
add a, a, e add a, a, f
C code f = (g + h) – (i + j);
translates into the following assembly code:
21
RISC vs. CISC
23
RISC vs. CISC
MULT 2:3, 5:2
CISC
vs.
RISC
LOAD A, 2:3
LOAD B, 5:2
PROD A, B
STORE 2:3, A
24
MIPS Addressing Modes
25
Addressing Modes
26
Addressing Modes
27
Addressing Modes
28
Addressing Modes
29
Addressing Modes
30
Addressing Modes
31
Addressing Modes
32
Registers
33
Memory Organization
34
Memory Organization
35
Instruction Set
36
Instruction Set
37
END OF LESSON 5
Introduction
38