DLA-X3-xx - XC380-xx - X7-xx - XC780-xx - X9-xx - XC980-xx (SCH)

DLA-X3-BE, DLA-X3-BU, DLA-X3-WE, DLA-XC380-BC, DLA-X7-BE,
DLA-X7-BU, DLA-XC780-BC, DLA-X9-BE, DLA-X9-BU, DLA-XC980-BC

STANDARD CIRCUIT DIAGRAM
NOTE ON USING CIRCUIT DIAGRAMS
1.SAFETY Type
The components identified by the symbol and shading are No indication : Ceramic capacitor
critical for safety. For continued safety replace safety ciritical MM : Metalized mylar capacitor
components only with manufactures recommended parts. PP : Polypropylene capacitor
MPP : Metalized polypropylene capacitor
MF : Metalized film capacitor
2.SPECIFIED VOLTAGE AND WAVEFORM VALUES
TF : Thin film capacitor
The voltage and waveform values have been measured under the BP : Bipolar electrolytic capacitor
following conditions. TAN : Tantalum capacitor
(1)Input signal : Colour bar signal (3)Coils
(2)Setting positions of No unit : [µH]
each knob/button and Others : As specified
variable resistor : Original setting position
(4)Power Supply
when shipped
(3)Internal resistance of tester : DC 20kΩ/V : B1 : B2 (12V)
(4)Oscilloscope sweeping time :H 20µs / div
: 9V : 5V
:V 5ms / div
Respective voltage values are indicated
: Othters Sweeping time is
specified (5)Test point
(5)Voltage values : All DC voltage values : Test point : Only test point display
Since the voltage values of signal circuit vary to some extent
according to adjustments, use them as reference values. (6)Connecting method
: Connector : Wrapping or soldering

3.INDICATION OF PARTS SYMBOL [EXAMPLE]
In the PW board : R1209 R209 : Receptacle
(7)Ground symbol
4.INDICATIONS ON THE CIRCUIT DIAGRAM
(1)Resistors : LIVE side ground
Resistance value : ISOLATED(NEUTRAL) side ground
No unit : [Ω] : EARTH ground
K : [kΩ] : DIGITAL ground
M : [MΩ]
5.NOTE FOR REPAIRING SERVICE
Rated allowable power
This model's power circuit is partly different in the GND. The
No indication : 1/16 [W]
difference of the GND is shown by the LIVE : ( ) side GND and the
Others : As specified ISOLATED(NEUTRAL) : ( ) side GND. Therefore, care must be
Type taken for the following points.
No indication : Carbon resistor (1)Do not touch the LIVE side GND or the LIVE side GND and the
OMR : Oxide metal film resistor ISOLATED(NEUTRAL) side GND simultaneously. if the above
MFR : Metal film resistor caution is not respected, an electric shock may be caused.
Therefore, make sure that the power cord is surely removed from
MPR : Metal plate resistor the receptacle when, for example, the chassis is pulled out.
UNFR : Uninflammable resistor
(2)Do not short between the LIVE side GND and ISOLATED(NEUTRAL)
FR : Fusible resistor side GND or never measure with a measuring apparatus measure
Composition resistor 1/2 [W] is specified as 1/2S or Comp. with a measuring apparatus ( oscilloscope, etc.) the LIVE side GND
(2)Capacitors and ISOLATED(NEUTRAL) side GND at the same time.
If the above precaution is not respected, a fuse or any parts will be broken.
Capacitance value
1 or higher : [pF] Since the circuit diagram is a standard one, the circuit and
circuit constants may be subject to change for improvement
less than 1 : [µF] without any notice.
Withstand voltage
No indication : DC50[V] NOTE
Due improvement in performance, some part numbers show
Others : DC withstand voltage [V]
in the circuit diagram may not agree with those indicated in
AC indicated : AC withstand voltage [V] the part list.
Electrolytic Capacitors When ordering parts, please use the numbers that appear
47/50[Example]: Capacitance value [µF]/withstand voltage[V] in the Parts List. (No.PA040<Rev.001>)2-1
CONTENTS
SEMICONDUCTOR SHAPES ......................................................................2-2
WIRING DIAGRAM .......................................................................................2-3
BLOCK DIAGRAM........................................................................................2-5
CIRCUIT DIAGRAMS ...................................................................................2-7
PATTERN DIAGRAMS .............................................................................. 2-63
SEMICONDUCTOR SHAPES
TRANSISTOR
BOTTOM VIEW FRONT VIEW TOP VIEW
CHIP TR
C
E
C
B B C E
E C B E C B B E
(G) (D) (S) E C B
IC
BOTTOM VIEW FRONT VIEW TOP VIEW
1 N
OUT
E
IN 1 N
IN E OUT 1 N
CHIP IC
TOP VIEW
1
N
N
1
2-2(No.PA040<Rev.001>)
WIRING DIAGRAM
[DLA-X7/XC780/X9/XC980]
SIDE B
SIDE A
[DLA-X7/XC780/X9/XC980]
SIDE A SIDE B
EXHAUST DUCT FAN [DLA-X3/XC380]

DD COOLING FAN
PCS COOLING FAN
INTAKE FAN
LAMP COOLING FAN
DEVICE COOLING FAN
EXHAUST FAN
[DLA-X7/XC780/X9/XC980]
[DLA-X7/XC780/X9/XC980]
SIDE A
SIDE B
[DLA-X7/XC780/X9/XC980]
[DLA-X3/XC380]
(No.PA040<Rev.001>)2-3 2-4(No.PA040<Rev.001>)
BLOCK DIAGRAM
IR&LED PWB KEYPAD PWB SPI

ROM
DDR2 * 4 ASI900
CN
CN CN From to JIG
OPE
LED
Rch
IR
CN
MD PWB D-ILA
Rch DD
CN CN (ASI6101)
JIG USB (ReonVX)
LVDS LVDS
OSD Timing RX TX SPI DDR2 * 4 ASI900
DDR * 2 (H,V,CLK) ROM
CN
OSD_LVDS I/F
CN
LVDS
CN
CN
LVDS I/F 3
EDID Gch
RX
CN
HDMI1 36bit TTL OSDout
LVDS D-ILA
HDMI Rx FPGA
JCC5078 Gch DD
(SiI9233) (EP3C16F484) DDR2 * 4 FPGA
HDMI1 CMS PWB (ASI6101)
CEC LVDSout
CTL[7:0] SPI
LV LV LVDS DDR2 * 4 ASI900
FPGA ROM
CN
CN
LVDS DS DS LVDS
CN
CN
CN
CN
I2C CEC_D I/O Expand (XC3SD I/F 4
TERMINAL-1 (PCA9555)
I/F 1
RX 3400A) TX
I/F 2
PWB SW Bch
CN
30bit 30bit D-ILA
TTL TTL CPU SPI Bch DD
From to (PIC24FJ
CN
RCA x 3 JIG 64GA004) Memory (ASI6101)
CN
I2C PortA OUT

(AD9984A-170)
DDR2 * 4
Component YPbPr +5V
CN DD PWB CN CN CN
ADC
CN
RGBHV PortB
30bit
DD_CTL1
DD_CTL2
TTL
D-SUB 9Pin
+12V
+9V
-8V
5V
TEMP
RS232C 232C
EEP
_I2C
CN
CN
Driver ROM
IR(Rear)
IR_R
UartA
CN CN CN
DD SUB
S
W
UartB
PWB
TEMP
CN
CN
CN
IC
DD_CPU I/F
Scaler
Sub CPU DD CPU
SW (AT89C51)
TEMP_I2C TEMP
_I2C (ReonVX-210) I2C MOTOR PWB
I2C FAN FAN
D-SUB 15pin
CN
LOCK ALERT
ZOOM Motor
CN
PC(RGBHV) WT7016A
CN
Motor PWM FAN
Driver M Sensor CTL Reg.
CN
Trigger out WT7016A TEMP
(12V) Motor IC
Driver M Sensor TEMP_I/F
CN
CN
12V
FAN
FOCUS Motor Reg.
Remote Remote
MCU
CN
CN
CN
H SHIFT Motor
CN
3D
(LM3S6911) BD6380EFV I2C D
FAN
A
Reg.
CN
3D Glass out I/O
I/O M Encoder +5V C
I2C Expand
Expand Motor
CN
CN
MOTOR
CN
CN Driver FAN
(PCA
TERMINAL-2 LAN LAN
(PCA
9555)
I/F
9555) M Encoder CN
Reg.
PWB TEMP
CN
V SHIFT Motor IC FAN
CN
TEMP Reg.
CN
From to JIG IRIS1 Motor SENSOR

WT7016A PWB
CN
D
Motor FAN
CN
Driver M A
Reg.
JIG SW C
WT7016A
CN
CV3P3 Sensor +12V
Motor FAN
CN
Driver M Reg.
CN
AC Inlet PWR_12V CV5P0 Sensor -8V
CN
CN
VA 3pin
CV5P0 3V3_STB LENS BARRIER

Motor
LAMP LAMP
CN
_CVR
CN
CN
5VSB COVER
POWER
CN
PWB
CN
PSON CN
PWB
Lamp_CTL
CN
PGO Solenoid
WT7016A
Motor IRIS2
M
CN
Driver Motor
PROCESSOR PWB CN
CN CN CN
Lamp
CN
BALLAST PWB
CN
Thermostat
(No.PA040<Rev.001>)2-5 2-6(No.PA040<Rev.001>)
CIRCUIT DIAGRAMS
DD PWB CIRCUIT DIAGRAM (1/12) [LVDS INPUT] NOTE : The schematic diagram is only for reference. Avoid replacing individual parts.
Replace the entire unit only.
LVDS CONNECTOR 1ST SIDE B BOTTOM (W4K) LVDS CONNECTOR 3RD SIDE B TOP (DLA-X3)
Board_Edge CN1001 Board_Edge CN1003
OPEN QGA0504F1-41X
TCM2010-201-4P-T(TDK) TCM2010-201-4P-T(TDK)
FI-RE41S-HF-R1500 FI-RE41S-HF-R1500
FL1001 FL1013
1
GND 1 OPEN GND 1 NQR0686-002X
TA1N 1 8 RA1N TA5N 1 8 RA5N
TA1- 2 RA1N TA5- 2 RA5N
TA1P 2 7 RA1P TA5P 2 7 RA5P
TA1+ 3 RA1P TA5+ 3 RA5P
TB1N 3 6 RB1N TB5N 3 6 RB5N
TB1- 4 RB1N TB5- 4 RB5N
TB1P 4 5 RB1P TB5P 4 5 RB5P
TB1+ 5 RB1P TB5+ 5 RB5P
GND 6 GND 6
FL1002 FL1014
TC1N 1 8 RC1N TC5N 1 8 RC5N
TC1- 8 RC1N TC5- 8 RC5N
TC1P 2 7 RC1P TC5P 2 7 RC5P
TC1+ 9 RC1P TC5+ 9 RC5P
TCLK1N 3 6 RCLK1N TCLK5N 3 6 RCLK5N
TCLK1- 10 RCLK1N TCLK5- 10 RCLK5N
TCLK1P 4 5 RCLK1P TCLK5P 4 5 RCLK5P
TCLK1+ 11 RCLK1P TCLK5+ 11 RCLK5P
GND 12 GND 12
FL1003 FL1015
TD1N 1 8 RD1N TD5N 1 8 RD5N
TD1- 14 RD1N TD5- 14 RD5N
TD1P 2 7 RD1P TD5P 2 7 RD5P
TD1+ 15 RD1P TD5+ 15 RD5P
TE1N 3 6 RE1N
RE1N TE5N 3 6 RE5N
TE1- 16 RE1N TE5- 16 RE5N
TE1P 4 5 RE1P
RE1P TE5P 4 5 RE5P
TE1+ 17 RE1P TE5+ 17 RE5P
GND 18 GND 18
FL1004 FL1016
GND 19
TA2N 1
OPEN
8 RA2N
To DD PWB (3/12) GND 19
TA6N 1
NQR0686-002X
8 RA6N
To DD PWB (3/12)
TA2P 2 7 RA2P TA6P 2 7 RA6P
GND 24 GND 24
FL1005 FL1017
OPEN TC2+ 27
TC2P 2 7 RC2P
RC2P
To MD PWB (4/6) TC6+ 27
TC6P 2 7 RC6P
RC6P
TCLK2- 28
TCLK2N 3 6 RCLK2N
RCLK2N
CN2703 TCLK6- 28
TCLK6N 3 6 RCLK6N
RCLK6N
GND 30 GND 30
FL1006 FL1018
TE2N 3 6 RE2N TE6N 3 6 RE6N
TE2P 4 5 RE2P TE6P 4 5 RE6P
GND 36 GND 36
K1022 K1027
GND 37 OPEN GND 37
NQR0499-001X
ASP0 38 ASP0 ASP0 38 ASP0
GND 39 GND 39
GND 40
K1023 To DD PWB (4/12) GND 40
K1028 To DD PWB (4/12)
OPEN NQR0499-001X
41
41
SEL0 41 SEL0 SEL0 41 SEL0
GND-PAD 42 GND-PAD 42
R1013 R1014 R1042 R1043
OPEN OPEN OPEN OPEN
1005 1005 1005 1005
GND GND
Pin42-53 of CN1001
Pin42-53 of CN1001
for GND_PAD
for GND_PAD
GND GND
LVDS CONNECTOR 2ND SIDE A BOTTOM (W4K) LVDS CONNECTOR 4TH SIDE A TOP (DLA-X3)
CN1002 R1027 OPEN 1005 CN1004 R1056 0 1005

Board_Edge Board_Edge
OPEN QGA0504C1-41X
R1028 OPEN 1005 FI-RE41S-VF-R1300 R1057 0 1005
FI-RE41S-VF-R1300
R1029 OPEN 1005 R1058 0 1005

1
1
GND 1 GND 1
K1024 OPEN K1029 OPEN
FSW_LC 2 FSW_LC FSW_LC 2 FSW_LC
K1025 OPEN K1030 OPEN
WIC_V 3
K1026 OPEN
WIC_V
To DD PWB (4/12) WIC_V 3
K1031 OPEN
WIC_V
To DD PWB (4/12)
FSW_WIC 4 FSW_WIC FSW_WIC 4 FSW_WIC
GND 5 TCM2010-201-4P-T(TDK) GND 5 TCM2010-201-4P-T(TDK)

FL1007 FL1019
TE4P 1 8 RE4P TE8P 1 8 RE8P
GND 11 GND 11
FL1008 FL1020
GND 17 GND 17
FL1009 FL1021
TA4P 3 6 RA4P
RA4P TA8P 3 6 RA8P
TA4N 4 5 RA4N
RA4N TA8N 4 5 RA8N
GND 23 GND 23
FL1010 FL1022
GND 24
TE3P 1
OPEN
8 RE3P
To DD PWB (3/12) GND 24
TE7P 1
NQR0686-002X
8 RE7P
To DD PWB (3/12)
OPEN TD3+ 27
TD3N 4 5 RD3N
RD3P To MD PWB (4/6) TD7+ 27
TD7N 4 5 RD7N
RD7P
TD3- 28 RD3N CN2704 TD7- 28 RD7N
GND 29 GND 29
FL1011 FL1023
GND 35 GND 35
FL1012 FL1024
TA3P 3 6 RA3P
RA3P TA7P 3 6 RA7P
TA3N 4 5 RA3N
RA3N TA7N 4 5 RA7N
41
41
GND 41 GND 41
DD PWB ASS'Y (1/12)

Mount Hole 4x 3.6(Rand 8.0)
TP1001 TP1002 TP1003 TP1004
GND-PAD 50 PAD1 PAD1 PAD1 PAD1 GND-PAD 50
Pin42-53 of CN1001
Pin42-53 of CN1001
for GND_PAD
for GND_PAD
GND GND
GND
c10656001a_1201_1/12_0.0
(No.PA040<Rev.001>)2-7 2-8(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (2/12) [FPGA (1/3) CONTROL LINE]
NOTE : The schematic diagram is only for reference. Avoid replacing individual parts.
DVCC33V
IC1001 IC1001
XC6LX102FGG484I XC6LX102FGG484I
FPGA POWER (I/O,CORE) FPGA GND

D16 VCCAUX
BANK 2,3 =>> SHEET 3 A1 GND
BANK 2,3 =>> SHEET 3
F11 VCCAUX
BANK 0,1,OTHER =>> SHEET 4 A22 GND
BANK 0,1,OTHER =>> SHEET 4
G12 VCCAUX B5 GND
C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1009 C1010 C1011 C1012 C1013 H9 VCCAUX B9 GND
0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 4.7 4.7 4.7 4.7 100
*C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C2 *C2 *C2 *C2 *C3 H15 VCCAUX B13 GND
K15 VCCAUX B17 GND
L8 VCCAUX D4 GND
GND M15 VCCAUX D18 GND
N8 VCCAUX E2 GND
R6 VCCAUX E7 GND
R10 VCCAUX E11 GND
R12 VCCAUX E15 GND
U11 VCCAUX E21 GND
V6 VCCAUX G5 GND
G18 GND
H7 GND
J2 GND
J9 GND
J8 VCCINT
J11 GND
LX100 MINIMUM CAPACITOR C1014 C1015 C1016 C1017

J10 VCCINT
J13 GND
J12 VCCINT
100 100 100 100 J15 GND
*C3 *C3 *C3 *C3
J14 VCCINT
J21 GND
K9 VCCINT
K10 GND
GND K11 VCCINT
K12 GND
K13 VCCINT
K14 GND
L10 VCCINT
L5 GND
C1018 C1019 C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1027 C1028 C1029 C1030 L12 VCCINT
4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 4.7 L9 GND
*C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2 *C2
L14 VCCINT
L11 GND
M9 VCCINT
L13 GND
GND M11 VCCINT
L18 GND
M13 VCCINT
M10 GND
N10 VCCINT
M12 GND
C1031 C1032 C1033 C1034 C1035 C1036 C1037 C1038 C1039 C1040 C1041 C1042 C1043 N12 VCCINT
0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 M14 GND
*C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1
N14 VCCINT
N2 GND
P9 VCCINT
N9 GND
GND P11 VCCINT
N11 GND
P13 VCCINT
N13 GND
R14 VCCINT
N17 GND
C1044 C1045 C1046 C1047 C1048 C1049 C1050 C1051 C1052 C1053 C1054 C1055 C1056 C1057
0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 0.47 N21 GND
*C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1
P10 GND
P12 GND
GND
P14 GND
LX150 ADDITIONAL CAPACITOR R5 GND
R18 GND
C1058 C1059 C1060
OPEN OPEN OPEN
U2 GND
*C3 *C3 *C3
U7 GND
U21 GND
GND
V4 GND
V10 GND
DVCC12V
V14 GND
C1061 C1062 C1063 C1064 C1065 C1066 C1067
OPEN OPEN OPEN OPEN OPEN OPEN OPEN
1.2V/2.5A W7 GND
*C2 *C2 *C2 *C2 *C2 *C2 *C2
W16 GND
W19 GND
GND
AA5 GND
AA9 GND
AA13 GND
C1068 C1069 C1070 C1071 C1072 C1073 C1074 C1075 C1076 C1077 C1078 C1079 C1080
OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN
AA17 GND
*C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1 *C1
AB1 GND
AB22 GND
GND
GND
CONTROL LINE
DVCC33V
DVCC33V
Q1001
INK0001AM1-X
2SK1374-X
SSM3K17FU-X 1 D
IC1004
2 R1060 TC7SZ125FU-X
OPEN
G R1132
0
To DD PWB (4/12)
1
3 S VCC G F_SDA_O
R1059
2
IN A
4.7k
3
OUT Y GND
R1061 0
R1062 0
F_SDA_I
To DD PWB (4/12) C1125
0.1
R1063 0
R_SDA
To DD PWB (5/12)
R1064 0
G_SDA
To DD PWB (6/12)
R1065 0
B_SDA
To DD PWB (7/12)
DVCC33V
GND
DVCC33V
Q1002
CN1005 INK0001AM1-X
QGA1009C1-30W 2SK1374-X
SSM3K17FU-X 1 D
SDA 1
K1001 NQR0499-001X R1067
2
SCL 2 OPEN
K1002 NQR0499-001X G
GND 3
3 S
GND 4
R1066
TCK 5 TCK 4.7k
TMS 6
K1003 NQR0499-001X
TMS R1068 0
F_SCL To DD PWB (4/12)
TDI 7
K1004 NQR0499-001X
TDI R1069 0
R_SCL To DD PWB (5/12)
K1005 NQR0499-001X
To DD PWB (4/12) R1070 0
G_SCL
To DD PWB (6/12)
DD PWB ASS'Y (2/12)

TDO 8 TDO DVCC18V
K1006 NQR0499-001X
VCC 9 R1071 0
B_SCL
To DD PWB (7/12)
K1007 NQR0499-001X
DVCC33V
GND 10
PROGRAM 11
K1008 NQR0499-001X
PROG_B_2
To DD PWB (3/12),(4/12) DVCC33V
R1078
FPGA_RST 12 SYS_RSTN
K1009 NQR0499-001X 1k
VSYNC 13 DD_VSYNC
IC1005
DD_IRQ0 14
K1010 NQR0499-001X
DD_IRQ0
To DD PWB (4/12) TC7SZ125FU-X
K1011 NQR0499-001X
CONFIG 15 DONE_2
R1073 ASI_RST2
To DD PWB (5/12),(6/12),(7/12)
3.3k
To DD SUB PWB (2/4) K1012 NQR0499-001X
To DD PWB (11/12)
Q1004
REMUDONE To DD PWB (5/12)
3
GND OUT Y ASIPWR25 INK0001AM1-X

GND 16
CN5003 2SK1374-X
2
IN A SSM3K17FU-X 1 D
GND 17
Q1003 DVCC33V
BEMUDONE
To DD PWB (7/12)
1
RT1N141U-X G VCC 2
GND 18
DRC9114E-X
G
R1072 DTC114EE-X R1077
DD_P_ON 19 DD_P_ON DVCC33V
K1013 NQR0499-001X ON OFF 1k 1k
C1127
P_ON_25 20 3 S
0.1
K1014 NQR0499-001X
IC1003
P_ON_18 21 ASIPWR18 TC7W08FU-X
K1015 NQR0499-001X R1079
P_ON_13 22
K1016 NQR0499-001X
ASIPWR13 To DD PWB C1126
0
(12/12) OPEN
8
GND 23 1A VCC
R1074 R1075 R1076 R1131
GND 1Y
OPEN 4.7k 4.7k 4.7k GND
7
GND 24 1B
6
GND 25 2B
GND
2Y
To DD PWB (4/12) GEMUDONE
To DD PWB (6/12)
5
LVDS_OE 26 LVDS_OE GND 2A
K1017 NQR0499-001X
LCD_EN 27 LCD_EN
K1018 NQR0499-001X
4.7k
4.7k
R1081
R1082
R1084
ASI_RST 28
K1019 NQR0499-001X
ASI_RST To DD PWB C1122
0.1
4.7k
EMU_RST 29
K1020 NQR0499-001X
EMU_RST (5/12),(6/12),(7/12) R1080
4.7k
EMU_DONE 30
K1021 NQR0499-001X
R1083
4.7k
GND
GND
c10656001a_1201_1/12_0.0
(No.PA040<Rev.001>)2-9 2-10(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (3/12) [FPGA (2/3)]
DVCC33V IC1001 DVCC33V IC1001

XC6LX102FGG484I XC6LX102FGG484I
T9 VCCO_2
FPGA BANK 2 C2 VCCO_3
FPGA BANK 3
T13 VCCO_2
POWER(I/O,CORE),GND =>> SHEET 2 F4 VCCO_3
POWER(I/O,CORE),GND =>> SHEET 2
V8 VCCO_2
BANK 0,1,OTHER =>> SHEET 4 F6 VCCO_3
C1100 C1101 C1102 C1103 C1104 C1105 C1106 C1107 C1108 C1109 C1110 V12 VCCO_2 C1111 C1112 C1113 C1114 C1115 C1116 C1117 C1118 C1119 C1120 C1121 G2 VCCO_3
0.47 0.47 0.47 0.47 0.47 0.47 4.7 4.7 4.7 4.7 100 0.47 0.47 0.47 0.47 0.47 0.47 4.7 4.7 4.7 4.7 100
*C1 *C1 *C1 *C1 *C1 *C1 *C2 *C2 *C2 *C2 *C3 *C1 *C1 *C1 *C1 *C1 *C1 *C2 *C2 *C2 *C2 *C3
V16 VCCO_2 J5 VCCO_3
W5 VCCO_2 L2 VCCO_3
AA3 VCCO_2 L7 VCCO_3

GND GND
AA7 VCCO_2 N5 VCCO_3
AA11 VCCO_2 R2 VCCO_3
AA15
AA19
VCCO_2
VCCO_2
LVDS INPUT W4K U5
W2
VCCO_3
VCCO_3
LVDS INPUT DLA-X3
R1001 OPEN 1005 din_a_n[0] R1030 100 1005 din_c_n[0]
RA1N AB21 IO_L2N_CMPMOSI_2 RA5N W1 IO_L2N_3 IO_L81N_3 C4
din_a_p[0] din_c_p[0]
RA1P AA21 IO_L2P_CMPCLK_2 RA5P W3 IO_L2P_3 IO_L81P_3 D3
din_a_n[1] din_c_n[1]
RB1N AB19 IO_L5N_2 RB5N V1 IO_L32N_M3DQ15_3 IO_L58P_3 D5
RB1P Y19 IO_L5P_2 RB5P V2 IO_L32P_M3DQ14_3 IO_L58N_3 E4
R1002 OPEN 1005 R1031 100 1005
IO_L82P_3 E5
RC1N AB18 IO_L14N_D12_2 RC5N U1 IO_L33N_M3DQ13_3 IO_L82N_3 E6
RC1P AA18 IO_L14P_D11_2 RC5P U3 IO_L33P_M3DQ12_3 IO_L55N_M3A14_3 F5
RCLK1N RCLK5N IO_L80N_3 F7
RCLK1P RCLK5P IO_L55P_M3A13_3 G6
R1004 OPEN 1005 R1033 100 1005

IO_L80P_3 G7
RD1N AB17 IO_L15N_2 RD5N T1 IO_L34N_M3UDQSN_3 IO_L49N_M3A2_3 H5
RD1P Y17 IO_L15P_2 RD5P T2 IO_L34P_M3UDQS_3 IO_L49P_M3A7_3 H6
RE1N AB16 IO_L19N_2 NC(LX75, LX100) IO_L51P_2 T8 RE5N R1 IO_L35N_M3DQ11_3 IO_L59N_3 H8
RE1P AA16 IO_L19P_2 NC(LX75, LX100) IO_L52P_2 T10 RE5P R3 IO_L35P_M3DQ10_3 IO_L41N_GCLK26_M3DQ5_3 J1
To DD PWB (1/12) R1006 OPEN 1005

NC(LX75, LX100) IO_L22P_2 T12 To DD PWB (1/12) R1035 100 1005
IO_L41P_GCLK27_M3DQ4_3 J3
RA2N AB15 IO_L21N_2 NC(LX75, LX100) IO_L51N_2 U8 RA6N P1 IO_L36N_M3DQ9_3 IO_L45N_M3ODT_3 J6
RA2P Y15 IO_L21P_2 NC(LX75, LX100) IO_L52N_2 U10 RA6P P2 IO_L36P_M3DQ8_3 IO_L59P_3 J7
RB2N U13 IO_L12N_D2_MISO3_2 NC(LX75, LX100) IO_L22N_2 U12 RB6N H1 IO_L47N_M3A1_3 IO_L45P_M3A3_3 K6
RB2P U14 IO_L12P_D1_MISO2_2 NC(LX75, LX100) IO_L53P_2 W6 RB6P H2 IO_L47P_M3A0_3 IO_L57P_3 K7
R1008 OPEN 1005 R1037 100 1005
NC(LX75, LX100) IO_L17N_2 W15 IO_L57N_VREF_3 K8
RC2N W11 IO_L42N_2 NC(LX75, LX100) IO_L54P_2 Y5 RC6N H3 IO_L46N_M3CLKN_3 IO_L42N_GCLK24_M3LDM_3 L4
RC2P V11 IO_L42P_2 NC(LX75, LX100) IO_L53N_2 Y6 RC6P H4 IO_L46P_M3CLK_3 IO_L25N_3 L6
clk_a_n clk_c_n
RCLK2N Y12 IO_L29N_GCLK2_2 NC(LX75, LX100) IO_L17P_2 Y16 RCLK6N J4 IO_L44N_GCLK20_M3A6_3 IO_L42P_GCLK25_TRDY2_M3UDM_3 M3
clk_a_p clk_c_p
RCLK2P W12 IO_L29P_GCLK3_2 NC(LX75, LX100) IO_L54N_2 AB5 RCLK6P K3 IO_L44P_GCLK21_M3A5_3 IO_L31N_VREF_3 M4
R1010 OPEN 1005 R1039 100 1005

IO_L31P_3 M5
RD2N AB8 IO_L45N_2 RD6N F3 IO_L51N_M3A4_3 IO_L25P_3 M6
RD2P AA8 IO_L45P_2 RD6P G4 IO_L51P_M3A10_3 IO_L23P_3 M7
RE2N Y4 IO_L62N_D6_2 RE6N B3 IO_L83N_VREF_3 IO_L23N_3 M8
RE2P W4 IO_L62P_D5_2 RE6P A2 IO_L83P_3 IO_L26N_3 N4
R1012 OPEN 1005 R1041 100 1005
IO_L11P_3 N6
IO_L11N_3 N7
IO_L26P_3 P3
IO_L24N_3 P4
R1015 OPEN 1005 din_b_n[0] R1044 100 1005 din_d_n[0]
RA3N AB14 IO_L16N_VREF_2 RA7N N1 IO_L37N_M3DQ1_3 IO_L8N_3 P5
din_b_p[0] din_d_p[0]
RA3P AA14 IO_L16P_2 RA7P N3 IO_L37P_M3DQ0_3 IO_L8P_3 P6
din_b_n[1] din_d_n[1]
RB3N AB13 IO_L30N_GCLK0_USERCCLK_2 RB7N M1 IO_L38N_M3DQ3_3 IO_L7N_3 P7
RB3P Y13 IO_L30P_GCLK1_D13_2 RB7P M2 IO_L38P_M3DQ2_3 IO_L7P_3 P8
R1016 OPEN 1005 R1045 100 1005
IO_L24P_3 R4
RC3N AB12 IO_L31N_GCLK30_D15_2 RC7N L1 IO_L39N_M3LDQSN_3 IO_L9N_3 T3
NC(LX75) IO_L60N_2 R7
RC3P AA12 IO_L31P_GCLK31_D14_2 RC7P L3 IO_L39P_M3LDQS_3 IO_L9P_3 T4
clk_b_n clk_d_n
RCLK3N AB11 IO_L32N_GCLK28_2 RCLK7N K4 IO_L43N_GCLK22_IRDY2_M3CASN_3 IO_L10P_3 U4
clk_b_p clk_d_p
NC(LX75) IO_L59P_2 R9
RCLK3P Y11 IO_L32P_GCLK29_2 RCLK7P K5 IO_L43P_GCLK23_M3RASN_3 IO_L10N_3 V3
OPEN 1005
R1018
NC(LX75) IO_L40P_2 R11 R1047 100 1005
IO_L1N_VREF_3 Y1
RD3N AB10 IO_L41N_VREF_2 RD7N K1 IO_L40N_M3DQ7_3 IO_L1P_3 Y2
RD3P AA10 IO_L41P_2 RD7P K2 IO_L40P_M3DQ6_3
NC(LX75) IO_L10P_2 R16
RE3N AB9 IO_L43N_2 RE7N G1 IO_L48N_M3BA1_3
NC(LX75) IO_L60P_2 T7
RE3P Y9 IO_L43P_2 RE7P G3 IO_L48P_M3BA0_3
OPEN 1005 1005
To DD PWB (1/12) R1020
R1021 OPEN 1005 din_b_n[5]

NC(LX75) IO_L40N_2 T11
To DD PWB (1/12) R1049
R1050 100
100
1005 din_d_n[5]
RA4N AB7 IO_L48N_RDWR_B_VREF_2 RA8N F1 IO_L50N_M3BA2_3
NC(LX75) IO_L7N_2 T15
RA4P Y7 IO_L48P_D7_2 RA8P F2 IO_L50P_M3WE_3
RB4N AB6 IO_L49N_D4_2 RB8N E1 IO_L52N_M3A9_3
NC(LX75) IO_L63P_2 U6
RB4P AA6 IO_L49P_D3_2 RB8P E3 IO_L52P_M3A8_3
R1022 OPEN 1005 R1051 100 1005

NC(LX75) IO_L8N_2 U16
RC4N AB4 IO_L57N_2 RC8N D1 IO_L53N_M3A12_3
RC4P AA4 IO_L57P_2 RC8P D2 IO_L53P_M3CKE_3
NC(LX75) IO_L63N_2 V5
RCLK4N RCLK8N
RCLK4P RCLK8P
OPEN 1005 R1053 100 1005
R1024 IO_L50N_2 V9
NC(LX75)
NC(LX75) IO_L18P_2 V13
RD4N AB3 IO_L58N_2 RD8N C1 IO_L54N_M3A11_3
RD4P Y3 IO_L58P_2 RD8P C3 IO_L54P_M3RESET_3
RE4N AB2 IO_L64N_D9_2 RE8N B1 IO_L60N_3
RE4P AA2 IO_L64P_D8_2 RE8P B2 IO_L60P_3
R1026 OPEN 1005 R1055 100 1005
NC(LX75) IO_L46P_2 W8
NC(LX75) IO_L18N_2 W13

V15 IO_L13N_D10_2
NC(LX75) IO_L11N_2 W17

T17 IO_L4N_VREF_2

T18 IO_L4P_2
NC(LX75) IO_L47N_2 Y8
CONFIG NC(LX75) IO_L20N_2 Y14
DIN
AA20 IO_L3P_D0_DIN_MISO_MISO1_2
CSO
T5 IO_L65N_CSO_B_2
DVCC33V
DVCC33V
DD PWB ASS'Y (3/12)

IC1002
2.4k
R1085
R1086
R1087
4.7k
M25P32-VMW6-X
NRSA6AD-472W
R1088 R1089
R1091
4.7k 100 R1092

4.7k
0 M0
1
/CS VCC AA22 IO_L1N_M0_CMPMISO_2

INIT_B
2
DO /HOLD T6 IO_L65P_INIT_B_2
CCLK
3
/WP CLK Y21 IO_L1P_CCLK_2

MOSI
4
GND DIO AB20 IO_L3N_MOSI_CSI_B_MISO0_2

M1
U15 IO_L13P_M1_2
DVCC33V R1090
100 R1093
0
C1123
0.1
NCB31CK-104X GND
CN1006 GND
QGA1501C5-08W
TCK 1
TMS 2
TDI 3
TDO 4
To JIG CONNECTOR
VCC 5
GND 6
PROGRAM_B_2 7 PROG_B_2
To DD PWB (2/12),(4/12)
GND 8
GND
c10656001a_1201_3/12_0.0
(No.PA040<Rev.001>)2-11 2-12(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (4/12) [FPGA (3/3)]
DVCC33V
IC1001
XC6LX102FGG484I IC1001
XC6LX102FGG484I DVCC33V
R1095 R1096 R1097 R1098 R1099

330 4.7k 4.7k 4.7k 4.7k
DVCC33V
FPGA OTHER
DONE_2 Y22 DONE_2
POWER(I/O,CORE),GND =>> SHEET 2 FPGA BANK 1 VCCO_1 C21
To DD PWB TCK G15 TCK
BANK 2,3 =>> SHEET 3 POWER(I/O,CORE),GND =>> SHEET 2 VCCO_1 E19
R1094
(2/12) TMS C18 TMS
BANK 0,1,OTHER =>> SHEET 4 VCCO_1 G21
OPEN TDI E18 TDI
VCCO_1 J18 C1090 C1091 C1092 C1093 C1094 C1095 C1096 C1097 C1098 C1099
TDO A19 TDO
0.47 0.47 0.47 0.47 0.47 0.47 4.7 4.7 4.7 100
*C1 *C1 *C1 *C1 *C1 *C1 *C2 *C2 *C2 *C3
PROG_B_2 AA1 PROGRAM_B_2 VCCO_1 L16
CONFIG
D1001
OPEN VCCO_1 L21
Mount Side A
To DD PWB (2/12),(3/12) VCCO_1 N18
GND
VCCO_1 R21
Q1005
1
OPEN
VCCO_1 U18
2
VCCO_1 W21
DVCC33V
3 R_DO[0] 1 8 R1110
IO_L58N_1 L15 RPIXD00
R_DO[1] 2 7 33
IO_L72N_1 N16 RPIXD01
GND
R_DO[2] 3 6 NRB04CJ-330W
IO_L58P_1 M16 RPIXD02
R_DO[3] 4 5
IO_L72P_1 P17 RPIXD03
R_DO[4] 1 8 R1111
IO_L60P_1 W20 RPIXD04
R_DO[5] 2 7 33
IO_L70N_1 V20 RPIXD05
R1100 R1101 R1102 R_DO[6] 3 6 NRB04CJ-330W
RFUSE
OPEN 0 0 P15 RFUSE IO_L52P_M1DQ14_1 V21 RPIXD06
NC(LX45)
R_DO[7] 4 5
CMPCS_B_2
Y20 CMPCS_B_2 IO_L70P_1 U19 RPIXD07
R_DO[8] 1 8 R1112
VFS
P16 VFS IO_L73P_1 P18 RPIXD08
NC(LX45)
R_DO[9] 2 7 33
VBATT
R17 VBATT IO_L71P_1 M17 RPIXD09
NC(LX45)
R_DE[0] 3 6 NRB04CJ-330W
SUSPEND
N15 SUSPEND IO_L71N_1 M18 RPIXD10
R_DE[1] 4 5
IO_L61P_1 L17 RPIXD11
R_DE[2]
R1103
0
R1133 R1104 IO_L53P_1 M19
R_DE[3]
1 8 R1113
RPIXD12 To DD PWB (5/12)
0 0 2 7 33
IO_L42P_GCLK7_M1UDM_1 M20 RPIXD13
R_DE[4] 3 6 NRB04CJ-330W
IO_L42N_GCLK6_TRDY1_M1LDM_1 L19 RPIXD14
GND R_DE[5] 4 5
IO_L61N_1 K18 RPIXD15
R_DE[6] 1 8 R1114
IO_L40N_GCLK10_M1A6_1 K19 RPIXD16
R_DE[7] 2 7 33
GND IO_L40P_GCLK11_M1A5_1 K20 RPIXD17
R_DE[8] 3 6 NRB04CJ-330W
IO_L38N_A4_M1CLKN_1 J19 RPIXD18
R_DE[9] 4 5
DVCC33V
IC1001 IO_L38P_A5_M1CLK_1 H20
R_PIXCK
R1115 33
RPIXD19
IO_L60N_1 W22 RPIXCK

XC6LX102FGG484I IO_L74N_DOUT_BUSY_1 T20
R_PIXEN 1 8 R1116
RPIXEN
R_VSYNC 2 7 33
IO_L73N_1 R19 RVSYNC
R_HSYNC 3 6 NRB04CJ-330W
B4 VCCO_0
FPGA BANK 0 IO_L51P_M1DQ12_1 U20
4 5
RHSYNC
B7 VCCO_0
POWER(I/O,CORE),GND =>> SHEET 2
B11 VCCO_0
G_DO[3] 1 8 R1117
C1081 C1082 C1083 C1084 C1085 C1086 C1087 C1088 C1089 B15 VCCO_0
IO_L47P_FWE_B_M1DQ0_1 N20 GPIXD03
0.47 0.47 0.47 0.47 0.47 4.7 4.7 4.7 100 G_DO[2] 2 7 33
*C1 *C1 *C1 *C1 *C1 *C2 *C2 *C2 *C3 B19 VCCO_0
IO_L53N_VREF_1 N19 GPIXD02
G_DO[1] 3 6 NRB04CJ-330W
E9 VCCO_0
IO_L59N_1 P20 GPIXD01
G_DO[0] 4 5
DVCC33V E13 VCCO_0
IO_L59P_1 P19 GPIXD00
G_DO[7] 1 8 R1118
GND E17 VCCO_0
IO_L50N_M1UDQSN_1 T22 GPIXD07
G_DO[6] 2 7 33
G10 VCCO_0
IO_L50P_M1UDQS_1 T21 GPIXD06
G_DO[5] 3 6 NRB04CJ-330W
G14 VCCO_0
IO_L51N_M1DQ13_1 U22 GPIXD05
G_DO[4] 4 5
IO_L52N_M1DQ15_1 V22 GPIXD04
G_DE[1] 1 8 R1119
R1106 R1105 IO_L48N_M1DQ9_1 P22 GPIXD11
G_DE[0] 33
4.7k 4.7k 2 7
IO_L48P_HDC_M1DQ8_1 P21 GPIXD10
G_DO[9] 3 6 NRB04CJ-330W
IO_L49N_M1DQ11_1 R22 GPIXD09
I2C_SDA_IN
G_DO[8] 4 5
F_SDA_I A4 IO_L1N_VREF_0
IO_L49P_M1DQ10_1 R20 GPIXD08
I2C_SDA_OUT
To DD PWB (2/12) F_SDA_O
I2C_SCL
A5 IO_L2N_0
IO_L14P_0 E8
IO_L45N_A0_M1LDQSN_1 L22
G_DE[5] 1 8 R1120
GPIXD15
To DD PWB (6/12)
NC(LX45, LX75) G_DE[4] 2 7 33
F_SCL A6 IO_L4N_0
IO_L46N_FOE_B_M1DQ3_1 M22 GPIXD14
ASP0 NC(LX45, LX75) IO_L17P_0 E10 G_DE[3] 3 6 NRB04CJ-330W
ASP0 A7 IO_L5N_0
IO_L46P_FCS_B_M1DQ2_1 M21
To DD PWB (1/12) SEL0
SEL0
A8 IO_L6N_0
NC(LX45, LX75) IO_L14N_0 F8
IO_L47N_LDC_M1DQ1_1 N22
G_DE[2] 4 5
GPIXD13
sys_rst_n GPIXD12
NC(LX45, LX75) IO_L15N_0 F9 G_DE[9]
To DD PWB (2/12) SYS_RSTN A10 IO_L34N_GCLK18_0
NC(LX45, LX75) IO_L17N_0 F10
IO_L43N_GCLK4_M1DQ5_1 J22
G_DE[8]
1 8 R1121
GPIXD19
2 7 33
IO_L44P_A3_M1DQ6_1 K21 GPIXD18
TP_DE TP_DE NC(LX45, LX75) IO_L44N_0 F12
TP1011 G_DE[7] 3 6 NRB04CJ-330W
A14 IO_L50N_0
OPEN IO_L44N_A2_M1DQ7_1 K22 GPIXD17
TP_HSYNC TP_HSYNC NC(LX45, LX75) IO_L15P_0 G8
TP1012 G_DE[6] 4 5
A15 IO_L51N_0
OPEN IO_L45P_A1_M1LDQS_1 L20 GPIXD16
TP_VSYNC TP_VSYNC NC(LX45, LX75) IO_L16P_0 G9
TP1013 G_PIXCK 33
A13 IO_L38N_VREF_0 R1122
OPEN IO_L37N_A6_M1A1_1 F22 GPIXCK
TP1 TP1 NC(LX45, LX75) IO_L18P_0 G11
TP1014 G_HSYNC 1 8 R1123
A17 IO_L64N_SCP4_0
OPEN IO_L34P_A13_M1WE_1 H19 GHSYNC
TP2 TP2 NC(LX45, LX75) IO_L16N_0 H10
TP1015 G_VSYNC 2 7 33
A18 IO_L65N_SCP2_0
OPEN IO_L34N_A12_M1BA2_1 H18 GVSYNC
TP3 TP3 NC(LX45, LX75) IO_L18N_0 H11
TP1016 G_PIXEN 3 6 NRB04CJ-330W
A16 IO_L63N_SCP6_0
OPEN IO_L33P_A15_M1A10_1 G19 GPIXEN
NC(LX45, LX75) IO_L44P_0 H12
4 5
DD_VSYNC
DD_VSYNC C5 IO_L2P_0
LVDS_OE
To DD PWB (2/12) LVDS_OE

DD_IRQ0
D6 IO_L3P_0
B_DO[3] 1 8 R1124
DD_IRQ0 D7 IO_L32P_0
IO_L31P_A19_M1CKE_1 D21 BPIXD03
FSW_LC
B_DO[2] 2 7 33
FSW_LC C8 IO_L7N_0
IO_L31N_A18_M1A12_1 D22 BPIXD02
WIC_VSYNC
B_DO[1] 3 6 NRB04CJ-330W
To DD PWB (1/12) WIC_V
FSW_WIC
C9 IO_L8P_0
IO_L35P_A11_M1A7_1 E20
B_DO[0] 4 5
BPIXD01
FSW_WIC C10 IO_L33N_0

IO_L35N_A10_M1A2_1 E22 BPIXD00
B_DO[7] 1 8 R1125
DVCC33V
IO_L29P_A23_M1A13_1 D19 BPIXD07
B_DO[6] 2 7 33
IO_L29N_A22_M1A14_1 D20 BPIXD06
B_DO[5] 3 6 NRB04CJ-330W
IO_L33N_A14_M1A4_1 F20 BPIXD05
B_DO[4] 4 5
IO_L37P_A7_M1A0_1 F21 BPIXD04
B_DE[1] 1 8 R1126
R1108 IO_L19P_1 B21 BPIXD11
B_DE[0] 33
0 2 7
DVCC33V IO_L19N_1 B22 BPIXD10
XTAL A3 IO_L1P_HSWAPEN_0
IO_L32P_A17_M1A8_1 C20
B_DO[9] 3 6 NRB04CJ-330W
BPIXD09
IO_L43N_0 D12 B_DO[8] 4 5
NC(LX45)
IO_L32N_A16_M1A9_1 C22 BPIXD08
R1109
OPEN
NC(LX45) IO_L45N_0 D13
IO_L10P_1 F16
B_DE[3] 1 8 R1127
BPIXD13
To DD PWB (7/12)
C1124 B_DE[5]
NC(LX45) IO_L43P_0 E12 2 7 33
0.1 IO_L10N_1 F17 BPIXD15
IO_L47P_0 E14 B_DE[2] 3 6 NRB04CJ-330W
NC(LX45)
GND IO_L30P_A21_M1RESET_1 F18 BPIXD12
X1001 IO_L45P_0 B_DE[4]
NC(LX45) F13 4 5
NAX1113-001X IO_L30N_A20_M1A11_1 F19 BPIXD14
IO_L48P_0 F14 B_DE[9] 1 8 R1128
NC(LX45)
R1107 IO_L1P_A25_1 C19 BPIXD19
IO_L47N_0 B_DE[8] 33
33 NC(LX45) F15 2 7
1
STDBY VCC
1005 IO_L20P_1 A20 BPIXD18
OSC_CLK_75M OSC_CLK_75M
IO_L46N_0 G13 B_DE[7] 3 6 NRB04CJ-330W
NC(LX45)
2
GND OUT A12 IO_L37N_GCLK12_0

IO_L1N_A24_VREF_1 B20 BPIXD17
IO_L46P_0 H13 B_DE[6] 4 5
NC(LX45)
IO_L20N_1 A21 BPIXD16
IO_L48N_0 H14 B_PIXCK 33
NC(LX45) R1129
GND IO_L39P_M1A3_1 G20 BPIXCK
B_PIXEN 1 8 R1130
IO_L39N_M1ODT_1 G22 BPIXEN
B_VSYNC 2 7 33
IO_L41P_GCLK9_IRDY1_M1RASN_1 H21 BVSYNC
B_HSYNC 3 6 NRB04CJ-330W
A9 IO_L8N_VREF_0
IO_L41N_GCLK8_M1CASN_1 H22 BHSYNC
4 5
A11 IO_L35N_GCLK16_0
B6 IO_L4P_0
B8 IO_L6P_0
D_OUT TP1017
B10 IO_L34P_GCLK19_0
IO_L43P_GCLK5_M1DQ4_1 J20
OPEN
B12 IO_L37P_GCLK13_0
B14 IO_L50P_0
B16 IO_L63P_SCP7_0
B18 IO_L65P_SCP3_0 G16
C6 IO_L3N_0 G17
C7 IO_L5P_0 H16
C11 IO_L35P_GCLK17_0 H17
C12 IO_L36N_GCLK14_0 J16
C13 IO_L38P_0 J17
C14 IO_L49N_0 K16
C15 IO_L51P_0 K17
C16 IO_L62N_VREF_0 T19
C17
D8
D9
D10
IO_L64P_SCP5_0
IO_L32N_0
IO_L7P_0
IO_L33P_0
DD PWB ASS'Y (4/12)
D11 IO_L36P_GCLK15_0
D14 IO_L49P_0
D15 IO_L62P_0
D17 IO_L66N_SCP0_0
E16 IO_L66P_SCP1_0
c10656001a_1201_4/12_0.0
(No.PA040<Rev.001>)2-13 2-14(No.PA040<Rev.001>)
ASI_RST2
0.1
C2007
0.1
C2006
22k
R2011
GND
47/6.3
C2005
NQR0499-001X
K2001
NRSA6AD-472W
0.1
C2251
R2033
4.7k
R2013
OPEN
R2012
22k
17 18 19 20 21 22 23 24
R2032
5.6k
NRSA6AD-562W
NC
REXT
COMP
VSS33A
VSS33A
VDD33A
VDD33A
0.1
C2004
NCB31HK-104X
To DD PWB (2/12),(6/12),(7/12)
ULCDSENSE
0.1
C2008
16 VDDA VDD33 25
RD33V
15 NC VSS 26
14 VSSA VDD18 27
C2011
0.1
NCB31HK-104X
0.1
C2003
R_UV1
13 V1 DPCSB 28
R_UVITO
12 VITO DP_DIN 29
IC2002
ASI900
11 VSSA DP_CLK 30
0
R2008
0.1
C2012
10 NC RESET 31
9 VDDA VSS 32
0.1
NCB31HK-104X
OPEN
R2010
C2009
ITOS<0>
ITOS<1>
ITOS<2>
ITOS<3>
NC
R(MON)
VSS
VDD18
OPEN
R2009
K2003
K2002
8 7 6 5 4 3 2 1
NCB31HK-104X
NQR0499-001X
NQR0499-001X
DD PWB CIRCUIT DIAGRAM (5/12) [RED DRIVER]
RD18V
GND
N5V
R_UV1
0.1
C2002
R_UVITO
GND
47/16
C2013
47/6.3
C2001
P9V
0
R2015
0
R2014
RADPSD
RADPCS
RADPCLK
RAITOS0
RAITOS1
RAITOS2
RAITOS3
47/16
C2010
4700p
C2253
NCB31HK-472X
5 4
6 3
7 2
8 1
ARY
47k
R2202
4700p
C2252
GND
RVTTLCD
47/6.3
To DD PWB (2/12),(6/12),(7/12)
RUVITO
C2014
0
0
0
0
0
0
NCB31HK-472X
R2007
R2006
R2005
R2004
R2003
R2002
R2001
R2195
R2194
R2193
R2192
R2191
ARY
ARY
ARY
ARY
ARY
33
33
33
33
OPEN
OPEN
D2001
To DD PWB (6/12)
UVITO 1 RKZ5.6B2KG-X
DZ2J056/M/-X
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
UVITO 2 TP2001
OPEN
RUV1
UV1 3
RA_DPSD
RA_DPCS
C2015
RA_ITOS0
RA_ITOS1
RA_ITOS2
RA_ITOS3
RA_DPCLK
VLCD33V 4 0.1
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
VLCD33V 5
C2016
VLCD33V 6
0.1
R2016
T1
T3
T4
T2
T6
T5
V5
V4
V3
P5
P4
P3
P1
Y2
V2
Y1
V1
R1
R2
R3
U5
U4
R7
R5
U3
U1
R6
VLCD33V 7
W4
W3
W2
W1
To DD PWB (2/12)
1005
To DD PWB (6/12)
0
S
GND 8 R2017
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TP7
TP6
TP5
TP4
TP3
TP2
TP1
TP0
0 1005
GND 9 R2018
0 1005
RDPSDO R_DPSDO
DPSDO 10 D3 DPSDO EMU_DONE W20 REMUDONE
ASI900_DPCLK
ASI900_DPSDO
LCDVITOSEL[0]
LCDVITOSEL[1]
LCDVITOSEL[2]
LCDVITOSEL[3]
ASI900_DPCS_N
RDPCLK R_DPCLK
DPCLK 11 E4 DPCLK EMUCLKIN_I N18 REMUCLK
RDPCS R_DPCS
DPCS 12 D4 DPCS_N EMURESET_NI N17 EMU_RST
To DD PWB (2/12)
C2017
VTTLCD 13 H8 NC
0.1
RLCDD31 R_LCDD31
LCDD31 14 E3 LCDDATA[31] XTALIN P22 RXTAL
RLCDD30 9 8 R_LCDD30
LCDD30 15 E2 LCDDATA[30] XTALIN2 P21
LCDD29 16 E1 LCDDATA[29] SCL V21 R_SCL
To DD PWB (2/12),(6/12),(7/12)
LCDD28 17 F5 LCDDATA[28] SDA V22 R_SDA
RLCDD27 12 5 R_LCDD27 ASI900 I/F
LCDD27 18 F4 LCDDATA[27] RESET V18 ASI_RST
LCDD26 19 F3 LCDDATA[26]
C2018 14 3 R_LCDD25
VTTLCD 20 G6 LCDDATA[25] PIXD0[0] C22 RPIXD00
0.1 15 2 R_LCDD24
GND 21 G5 LCDDATA[24] PIXD0[1] C21 RPIXD01
16 1
GND 22 R2019 P7 S PIXD0[2] D22 RPIXD02
RLCDD25
33
LCDD25 23 8ARY P6 S PIXD0[3] D21 RPIXD03
RLCDD24
LCDD24 24 N2 S PIXD0[4] E22 RPIXD04
R2020
RLCDD23 33
LCDD23 25 8ARY H7 NC PIXD0[5] E20 RPIXD05
RLCDD22 R_LCDD23
LCDD22 26 G4 LCDDATA[23] PIXD0[6] E19 RPIXD06
LCDD21 27 G3 LCDDATA[22] PIXD0[7] E18 RPIXD07
LCDD20 28 H5 LCDDATA[21] PIXD0[8] F22 RPIXD08
C2019 11 6 R_LCDD20
VTTLCD 29 H4 LCDDATA[20] PIXD0[9] F21 RPIXD09
0.1 12 5
RLCDD19 R_LCDD19
LCDD17 32 J7 LCDDATA[17] PIXD1[2] F18 RPIXD12
LCDD16 33 J5 LCDDATA[16] PIXD1[3] F17 RPIXD13
RLCDOP1 16 1 R_LCDOP1
LCDOP1 34 H2 LCDOP[1] PIXD1[4] G22 RPIXD14
RLCDCKB R_LCDCLB
LCDCLKB 35 G1 LCDCLKB PIXD1[5] G21 RPIXD15
C2020 R2021 22
To DD PWB (4/12)
VTTLCD 36 NRSA6AD-220W PIXD1[6] G20 RPIXD16

0.1
R2022 10 RPIXD17
VTTLCD 37 PIXD1[7] G18
NRSA6AD-100W
C2021
GND 38 R2023 10 PIXD1[8] G17 RPIXD18
0.1 NRSA6AD-100W
GND 39 R2024 22 H6 NC PIXD1[9] G16 RPIXD19
NRSA6AD-220W
RLCDCKA R_LCDCKA
LCDCLKA 40 F1 LCDCLK
RLCDOP0 R_LCDOP0
(No.PA040<Rev.001>)2-15
LCDOP0 41 G2 LCDOP[0] HSYNC M22 RHSYNC
VIDEO & 3.3V I/F
IC2001
RLCDD15 R_LCDD15
D-ILA
RED DRIVER 1/3
2/3 =>> SHEET 8
To Rch
LCDD15 42 J4 LCDDATA[15] VSYNC L22 RVSYNC
3/3 =>> SHEET 11
IMAGER I/F
ASI6101SL
LCDD14 43 J1 LCDDATA[14] PIXVALID M19 RPIXEN

LCDD13 44 K7 LCDDATA[13] PIXCLK N19 RPIXCK
LCDD12 45 K6 LCDDATA[12]
C2022 12 5 R_LCDD11
VTTLCD 46 K4 LCDDATA[11] PIXD2[0] H22
0.1 13 4
RLCDD11 R_LCDD10
LCDD11 47 K3 LCDDATA[10] PIXD2[1] H21
RLCDD08 16 1
LCDD08 50 R2025 D2 NC PIXD2[4] H18
RLCDD07
33
LCDD07 51 8ARY D1 NC PIXD2[5] H17
RLCDD06
LCDD06 52 C2 NC PIXD2[6] H16
R2026
C2023 33
VTTLCD 53 8ARY C1 NC PIXD2[7] J22
0.1
R_LCDD07
GND 54 L5 LCDDATA[7] PIXD2[8] J20
9 8 R_LCDD06
LCDD05 56 L2 LCDDATA[5] PIXD3[0] J17
LCDD03 58 M5 LCDDATA[3] PIXD3[2] K22
16 1
VTTLCD 62 PIXD3[6] K18
C2025 C2024
VLCD33V 63 PIXD3[7] K17
0.1 0.1
VLCD33V 64 PIXD3[8] L21
C2026
0.1
R2027 22
VLCD33V 66 NRSA6AD-220W
GND
R2028 22
GND 67 NRSA6AD-220W
R2029 22
GND 68 NRSA6AD-220W T22 S
RLCDINC R_LCDINC
LCDINCR 69 N1 LCDINCR VIDEO & 3.3V I/F T21 S
RLCDV0S R_LCDV0S
LCDV0SEL 70 N3 LCDV0SEL R22 S
RLCDV1S R_LCDV1S
LCDV1SEL 71 N4 LCDV1SEL R21 S
UV1 72 TP2002 J8 VLCDREF N20 S

OPEN
2-16(No.PA040<Rev.001>)
VLCD25V 73 J3 VLCDREF
VLCD25V 74
R2196
R2197
R2198
R2199
ARY
ARY
ARY
ARY
33
33
33
33
C2027
VLCD25V 75
0.1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
JTAGCK_B
JTAGDO_B
JTAGDTDI_B
JTAGMS_B
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GPIO2
GPIO1
GPIO0
SPICLK_B
SPIDOUT_B
SPIDIN_B
SPICS_NB
RLCDVREF
VLCD25V 76
J15
L18
T17
T19
T20
T16
V20
Y21
Y22
P17
P19
P18
P16
U22
U20
U19
U18
R18
R20
N22
N21
H15
M20
M18
W21
W19
W22
C2028
VLCD25V 77
0.1
VLCD25V 78
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
C2029
VLCD25V 79
0.1
GND
VLCD25V 80
0.1
0.1
C2030
1005
47/6.3
C2031
R2201
0.1
4.7k
C2033
C2032
RVTTLCD
CN2001
C2034
47/6.3
RVLCD33V
OPEN
R2030
QGF0401F1-80W
4 3 2 1
8 1
RD33V
R2172
DO
/CS
/WP
GND
7 2
4.7k
R2173
IC2012
6 3
TH2002
0.1
R2162
4.7k
4.7k
47/6.3
C2036
C2035
R2174
M25P40VMN6PB2-X
5 4
4.7k
NAD0046-001X
GND
DIO
CLK
/HOLD
VCC
0.1
0
C2038
5 6 7 8
ARY
R2168
RVLCD25V
1k
4 3 2 1
OPEN
OPEN
0
R2171
R2170
R2169
R2164
R2165
R2166
R2167
4.7k
4.7k
4.7k
4.7k
R2031
SD
GND PAD
GND
VREF
VSENSE
IC2007
9
LP2996MR-X
RD25V
GND
RD33V
0.1
AVIN
VDDQ
PVIN
VTT
C2242
5 6 7 8
4.7k
R2163
220/6.3
C2037
NEX60JM-227X
RD33V
47/6.3
C2039
GND
RD25V
TH2001
0.1
C2040
NAD0046-005X
RVTTLCD
RVLCD25V
DD PWB ASS'Y (5/12)

c10656001a_1201_5/12_0.0
ASI_RST2
0.1
C3007
0.1
C3006
22k
R3011
GND
47/6.3
C3005
NQR0499-001X
K3001
NRSA6AD-472W
0.1
C3251
R3033
4.7k
R3013
C3243
NCB20JK-106X
OPEN
R3012
22k
NQR0499-001X
17 18 19 20 21 22 23 24
GND
R3032
5.6k
0.1
K3004
NRSA6AD-562W
NC
C3244
REXT
COMP
VSS33A
VSS33A
VDD33A
VDD33A
0.1
C3004
DVCC33V
NCB31HK-104X
ULCDSENSE
0.1
C3008
To DD PWB (2/12),(5/12),(7/12)
16 VDDA VDD33 25
GD33V
15 NC VSS 26 C3245
1
4
NCB20JK-106X
VDD
OE
14 VSSA VDD18 27
C3011
0.1
NCB31HK-104X
0.1
C3003
G_UV1
13 V1 DPCSB 28
NQR0499-001X
G_UVITO
2
3
OUT
GND
GND
12 VITO DP_DIN 29
IC3002
ASI900
0.1
K3005
C3246
11 VSSA DP_CLK 30
0
R3008
0.1
EMU_CLK
C3012
10 NC RESET 31
DVCC33V
9 VDDA VSS 32
X3001
100MHz
NAX1069-001X
0.1
NCB31HK-104X
0
1005
R3175
OPEN
R3010
C3009
ITOS<0>
ITOS<1>
ITOS<2>
ITOS<3>
NC
R(MON)
VSS
VDD18
1
4
OPEN
R3009
VDD
OE
K3003
K3002
8 7 6 5 4 3 2 1
NCB31HK-104X
2
3
NQR0499-001X
NQR0499-001X
OUT
GND
EMUCLK
DVCC33V
GD18V
GND
N5V
To DD PWB (5/12)
G_UV1
0.1
C3002
G_UVITO
DD_XTAL
DD PWB CIRCUIT DIAGRAM (6/12) [GREEN DRIVER]
IC3013
GND
X3002
NAX1070-001X
IDT23051DCG-X
14.318MHz
47/16
C3013
0
1005
R3176
To DD PWB (7/12)
0
1005
R3177
47/6.3
C3001
8
1
P9V
CLKOUT REF
R_EMUCLK
7
2
DVCC33V
0
R3015
0
R3014
CLK4 CLK2 REMUCLK
GADPSD
GADPCS
B_EMUCLK
6
3
GADPCLK
GAITOS0
GAITOS1
GAITOS2
GAITOS3
VDD CLK1
DDXTAL
BEMUCLK
GND
47/16
5
4
C3010
CLK3 GND
0
1005
R3179
0.1
4700p
C3253
C3247
IC3014
NCB31HK-472X
IDT23051DCG-X
5 4
0
1005
G_EMUCLK
6 3
R3180
GND
8
1
CLKOUT REF
7 2 R_XTAL
7
2
CLK4 CLK2 RXTAL

8 1 B_XTAL
6
3
VDD CLK1 BXTAL

GND
ARY
47k
R3202
4700p
C3252
5
4
GND
CLK3 GND
GVTTLCD
0
0.1
1005
R3182
C3248
47/6.3
GUVITO
C3014
0
0
0
0
0
0
G_XTAL
NCB31HK-472X
R3007
R3006
R3005
R3004
R3003
R3002
R3001
R3195
R3194
R3193
R3192
R3191
ARY
ARY
ARY
ARY
ARY
33
33
33
33
GND
OPEN
OPEN
0
D3001
1005
R3181
UVITO 1 RKZ5.6B2KG-X
DZ2J056/M/-X
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
UVITO 2 TP3001
OPEN
0
GUV1
1005
R3178
UV1 3
GA_DPSD
GA_DPCS
C3015
GA_ITOS0
GA_ITOS1
GA_ITOS2
GA_ITOS3
GA_DPCLK
VLCD33V 4 0.1
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
VLCD33V 5
C3016
VLCD33V 6
To DD PWB (2/12)
0.1
GXTAL
R3016
T1
T3
T4
T2
T6
T5
V5
V4
V3
P5
P4
P3
P1
Y2
V2
Y1
V1
R1
R2
R3
U5
U4
R7
R5
U3
U1
R6
VLCD33V 7
W4
W3
W2
W1
GEMUCLK
0 1005
To DD PWB (5/12)
GND 8 R3017
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TP7
TP6
TP5
TP4
TP3
TP2
TP1
TP0
0 1005
GND 9 R3018
0 1005
GDPSDO G_DPSDO
(2/12),(5/12),(7/12)
To DD PWB (7/12)
DPSDO 10 D3 DPSDO EMU_DONE W20 GEMUDONE

ASI900_DPCLK
ASI900_DPSDO
LCDVITOSEL[0]
LCDVITOSEL[1]
LCDVITOSEL[2]
LCDVITOSEL[3]
To DD PWB
ASI900_DPCS_N
GDPCLK G_DPCLK
DPCLK 11 E4 DPCLK EMUCLKIN_I N18
GDPCS G_DPCS
C3017
VTTLCD 13 H8 NC
0.1
GLCDD31 G_LCDD31
LCDD31 14 E3 LCDDATA[31] XTALIN P22
GLCDD30 9 8 G_LCDD30
LCDD29 16 E1 LCDDATA[29] SCL V21 G_SCL
LCDD28 17 F5 LCDDATA[28] SDA V22 G_SDA
GLCDD27 12 5 G_LCDD27 ASI900 I/F
C3018 14 3 G_LCDD25
VTTLCD 20 G6 LCDDATA[25] PIXD0[0] C22 GPIXD00
0.1 15 2 G_LCDD24
GND 21 G5 LCDDATA[24] PIXD0[1] C21 GPIXD01
16 1
GND 22 R3019 P7 S PIXD0[2] D22 GPIXD02
GLCDD25
33
LCDD25 23 8ARY P6 S PIXD0[3] D21 GPIXD03
GLCDD24
LCDD24 24 N2 S PIXD0[4] E22 GPIXD04
R3020
GLCDD23 33
LCDD23 25 8ARY H7 NC PIXD0[5] E20 GPIXD05
GLCDD22 G_LCDD23
LCDD22 26 G4 LCDDATA[23] PIXD0[6] E19 GPIXD06
LCDD21 27 G3 LCDDATA[22] PIXD0[7] E18 GPIXD07
To DD PWB (2/12)
LCDD20 28 H5 LCDDATA[21] PIXD0[8] F22 GPIXD08

C3019 11 6 G_LCDD20
VTTLCD 29 H4 LCDDATA[20] PIXD0[9] F21 GPIXD09
0.1 12 5
GLCDD19 G_LCDD19
LCDD17 32 J7 LCDDATA[17] PIXD1[2] F18 GPIXD12
LCDD16 33 J5 LCDDATA[16] PIXD1[3] F17 GPIXD13
GLCDOP1 16 1 G_LCDOP1
LCDOP1 34 H2 LCDOP[1] PIXD1[4] G22 GPIXD14
GLCDCKB G_LCDCLB
To DD PWB (2/12),(5/12),(7/12)
(No.PA040<Rev.001>)2-17
LCDCLKB 35 G1 LCDCLKB PIXD1[5] G21 GPIXD15
C3020 R3021 22
To DD PWB (4/12)
VTTLCD 36 NRSA6AD-220W PIXD1[6] G20 GPIXD16

0.1
R3022 10 GPIXD17
NRSA6AD-100W
C3021
GND 38 R3023 10 PIXD1[8] G17 GPIXD18
0.1 NRSA6AD-100W
GND 39 R3024 22 H6 NC PIXD1[9] G16 GPIXD19
NRSA6AD-220W
GLCDCKA G_LCDCKA
GLCDOP0 G_LCDOP0
LCDOP0 41 G2 LCDOP[0] HSYNC M22 GHSYNC
VIDEO & 3.3V I/F
IC3001
GLCDD15 G_LCDD15
D-ILA
2/3 =>> SHEET 9
LCDD15 42 J4 LCDDATA[15] VSYNC L22 GVSYNC
To Gch
3/3 =>> SHEET 11
IMAGER I/F
ASI6101SL
LCDD14 43 J1 LCDDATA[14] PIXVALID M19 GPIXEN

GREEN DRIVER 1/3
LCDD13 44 K7 LCDDATA[13] PIXCLK N19 GPIXCK
C3022 12 5 G_LCDD11
0.1 13 4
GLCDD11 G_LCDD10
GLCDD08 16 1
LCDD08 50 R3025 D2 NC PIXD2[4] H18
GLCDD07
33
GLCDD06
R3026
C3023 33
0.1
G_LCDD07
9 8 G_LCDD06
16 1
C3025 C3024
0.1 0.1
C3026
0.1
R3027 22
GND
R3028 22
2-18(No.PA040<Rev.001>)
GND 67 NRSA6AD-220W
R3029 22
GND 68 NRSA6AD-220W S N20
GLCDINC G_LCDINC
LCDINCR 69 N1 LCDINCR VIDEO & 3.3V I/F S R21
GLCDV0S G_LCDV0S
LCDV0SEL 70 N3 LCDV0SEL S R22
GLCDV1S G_LCDV1S
LCDV1SEL 71 N4 LCDV1SEL S T21
UV1 72 TP3002 J8 VLCDREF S T22

OPEN
VLCD25V 74
R3196
R3197
R3198
R3199
ARY
ARY
ARY
ARY
33
33
33
33
C3027
VLCD25V 75
0.1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
JTAGCK_B
JTAGDO_B
JTAGDTDI_B
JTAGMS_B
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GPIO2
GPIO1
GPIO0
SPICLK_B
SPIDOUT_B
SPIDIN_B
SPICS_NB
GLCDVREF
VLCD25V 76
J15
L18
T17
T19
T20
T16
V20
Y21
Y22
P17
P19
P18
P16
U22
U20
U19
U18
R18
R20
N22
N21
H15
M20
M18
W21
W19
W22
C3028
VLCD25V 77
0.1
VLCD25V 78
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
C3029
VLCD25V 79
0.1
GND
VLCD25V 80
0.1
0.1
C3030
1005
47/6.3
C3031
R3201
0.1
4.7k
C3033
C3032
GVTTLCD
C3034
CN3001
47/6.3
GVLCD33V
OPEN
R3030
4 3 2 1
QGF0401F1-80W
8 1
GD33V
R3172
DO
/CS
/WP
GND
7 2
4.7k
R3173
IC3012
6 3
TH3002
0.1
R3162
4.7k
4.7k
47/6.3
C3036
C3035
R3174
M25P40VMN6PB2-X
5 4
4.7k
NAD0046-001X
GND
DIO
CLK
/HOLD
VCC
0.1
0
C3038
5 6 7 8
ARY
R3168
GVLCD25V
1k
1k
4 3 2 1
OPEN
0
R3171
R3170
R3169
R3164
R3165
R3166
R3167
4.7k
4.7k
4.7k
4.7k
R3031
SD
GND PAD
GND
VREF
VSENSE
IC3007
9
LP2996MR-X
GD25V
GND
GD33V
0.1
AVIN
VDDQ
PVIN
VTT
C3242
5 6 7 8
4.7k
R3163
220/6.3
C3037
NEX60JM-227X
GD33V
47/6.3
C3039
GND
GD25V
TH3001
0.1
C3040
NAD0046-005X
GVTTLCD
GVLCD25V
DD PWB ASS'Y (6/12)

c10656001a_1201_6/12_0.0
ASI_RST2
0.1
C4007
0.1
C4006
22k
R4011
GND
47/6.3
C4005
NQR0499-001X
K4001
NRSA6AD-472W
0.1
C4251
R4033
4.7k
R4013
OPEN
R4012
22k
17 18 19 20 21 22 23 24
R4032
5.6k
NRSA6AD-562W
NC
REXT
COMP
VSS33A
VSS33A
VDD33A
VDD33A
0.1
C4004
To DD PWB (2/12),(5/12),(6/12)
NCB31HK-104X
ULCDSENSE
0.1
C4008
16 VDDA VDD33 25
BD33V
15 NC VSS 26
14 VSSA VDD18 27
C4011
0.1
NCB31HK-104X
0.1
C4003
B_UV1
13 V1 DPCSB 28
B_UVITO
12 VITO DP_DIN 29
IC4002
ASI900
11 VSSA DP_CLK 30
0
R4008
0.1
C4012
10 NC RESET 31
9 VDDA VSS 32
0.1
NCB31HK-104X
OPEN
R4010
C4009
ITOS<0>
ITOS<1>
ITOS<2>
ITOS<3>
NC
R(MON)
VSS
VDD18
OPEN
R4009
K4003
K4002
8 7 6 5 4 3 2 1
NCB31HK-104X
NQR0499-001X
NQR0499-001X
BD18V
GND
N5V
B_UV1
0.1
C4002
B_UVITO
GND
47/16
C4013
DD PWB CIRCUIT DIAGRAM (7/12) [BLUE DRIVER]
47/6.3
C4001
P9V
0
R4015
0
R4014
BADPSD
BADPCS
BADPCLK
BAITOS0
BAITOS1
BAITOS2
BAITOS3
47/16
C4010
4700p
C4253
NCB31HK-472X
5 4
6 3
7 2
8 1
ARY
47k
R4202
4700p
C4252
GND
BVTTLCD
47/6.3
To DD PWB (2/12),(5/12),(6/12)
BUVITO
C4014
0
0
0
0
0
0
NCB31HK-472X
R4007
R4006
R4005
R4004
R4003
R4002
R4001
R4195
R4194
R4193
R4192
R4191
ARY
ARY
ARY
ARY
ARY
33
33
33
33
OPEN
OPEN
D4001
UVITO 1
To DD PWB (6/12)
RKZ5.6B2KG-X
DZ2J056/M/-X
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
UVITO 2 TP4001
OPEN
BUV1
UV1 3
BA_DPSD
BA_DPCS
C4015
BA_ITOS0
BA_ITOS1
BA_ITOS2
BA_ITOS3
BA_DPCLK
VLCD33V 4 0.1
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
VLCD33V 5
C4016
VLCD33V 6
0.1
R4016
T1
T3
T4
T2
T6
T5
V5
V4
V3
P5
P4
P3
P1
Y2
V2
Y1
V1
R1
R2
R3
U5
U4
R7
R5
U3
U1
R6
VLCD33V 7
W4
W3
W2
W1
To DD PWB (6/12)
1005
To DD PWB (2/12)
0
S
GND 8 R4017
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TP7
TP6
TP5
TP4
TP3
TP2
TP1
TP0
0 1005
GND 9 R4018
0 1005
BDPSDO B_DPSDO
DPSDO 10 D3 DPSDO EMU_DONE W20 BEMUDONE
ASI900_DPCLK
ASI900_DPSDO
LCDVITOSEL[0]
LCDVITOSEL[1]
LCDVITOSEL[2]
LCDVITOSEL[3]
ASI900_DPCS_N
BDPCLK B_DPCLK
DPCLK 11 E4 DPCLK EMUCLKIN_I N18 BEMUCLK
BDPCS B_DPCS
C4017
To DD PWB (2/12)
VTTLCD 13 H8 NC
0.1
BLCDD31 B_LCDD31
LCDD31 14 E3 LCDDATA[31] XTALIN P22 BXTAL
BLCDD30 9 8 B_LCDD30
LCDD29 16 E1 LCDDATA[29] SCL V21 B_SCL
To DD PWB (2/12),(5/12),(6/12)
LCDD28 17 F5 LCDDATA[28] SDA V22 B_SDA
BLCDD27 12 5 B_LCDD27 ASI900 I/F
C4018 14 3 B_LCDD25
VTTLCD 20 G6 LCDDATA[25] PIXD0[0] C22 BPIXD00
0.1 15 2 B_LCDD24
GND 21 G5 LCDDATA[24] PIXD0[1] C21 BPIXD01
16 1
GND 22 R4019 P7 S PIXD0[2] D22 BPIXD02
BLCDD25
33
LCDD25 23 8ARY P6 S PIXD0[3] D21 BPIXD03
BLCDD24
LCDD24 24 N2 S PIXD0[4] E22 BPIXD04
R4020
BLCDD23 33
LCDD23 25 8ARY H7 NC PIXD0[5] E20 BPIXD05
BLCDD22 B_LCDD23
LCDD22 26 G4 LCDDATA[23] PIXD0[6] E19 BPIXD06
LCDD21 27 G3 LCDDATA[22] PIXD0[7] E18 BPIXD07
LCDD20 28 H5 LCDDATA[21] PIXD0[8] F22 BPIXD08
C4019 11 6 B_LCDD20
VTTLCD 29 H4 LCDDATA[20] PIXD0[9] F21 BPIXD09
0.1 12 5
BLCDD19 B_LCDD19
LCDD17 32 J7 LCDDATA[17] PIXD1[2] F18 BPIXD12
LCDD16 33 J5 LCDDATA[16] PIXD1[3] F17 BPIXD13
BLCDOP1 16 1 B_LCDOP1
LCDOP1 34 H2 LCDOP[1] PIXD1[4] G22 BPIXD14
BLCDCKB B_LCDCLB
LCDCLKB 35 G1 LCDCLKB PIXD1[5] G21 BPIXD15
C4020 R4021 22
To DD PWB (4/12)
VTTLCD 36 NRSA6AD-220W PIXD1[6] G20 BPIXD16

0.1
R4022 10 BPIXD17
NRSA6AD-100W
C4021
GND 38 R4023 10 PIXD1[8] G17 BPIXD18
0.1 NRSA6AD-100W
GND 39 R4024 22 H6 NC PIXD1[9] G16 BPIXD19
NRSA6AD-220W
BLCDCKA B_LCDCKA
BLCDOP0 B_LCDOP0
LCDOP0 41 G2 LCDOP[0] HSYNC M22 BHSYNC
VIDEO & 3.3V I/F
D-ILA
IC4001
BLCDD15 B_LCDD15
To Bch
LCDD15 42 J4 LCDDATA[15] VSYNC L22 BVSYNC
3/3 =>> SHEET 11
BLUE DRIVER 1/3
2/3 =>> SHEET 10
IMAGER I/F
ASI6101SL
LCDD14 43 J1 LCDDATA[14] PIXVALID M19 BPIXEN
(No.PA040<Rev.001>)2-19
LCDD13 44 K7 LCDDATA[13] PIXCLK N19 BPIXCK
C4022 12 5 B_LCDD11
0.1 13 4
BLCDD11 B_LCDD10
BLCDD08 16 1
LCDD08 50 R4025 D2 NC PIXD2[4] H18
BLCDD07
33
BLCDD06
R4026
C4023 33
0.1
B_LCDD07
9 8 B_LCDD06
16 1
C4025 C4024
0.1 0.1
C4026
0.1
R4027 22
GND
R4028 22
GND 67 NRSA6AD-220W
R4029 22
GND 68 NRSA6AD-220W S N20
BLCDINC B_LCDINC
LCDINCR 69 N1 LCDINCR VIDEO & 3.3V I/F S R21
BLCDV0S B_LCDV0S
LCDV0SEL 70 N3 LCDV0SEL S R22
BLCDV1S B_LCDV1S
LCDV1SEL 71 N4 LCDV1SEL S T21
UV1 72 TP4002 J8 VLCDREF S T22

OPEN
VLCD25V 74
R4196
R4197
R4198
R4199
ARY
ARY
ARY
ARY
33
33
33
33
2-20(No.PA040<Rev.001>)
C4027
VLCD25V 75
0.1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
JTAGCK_B
JTAGDO_B
JTAGDTDI_B
JTAGMS_B
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GPIO2
GPIO1
GPIO0
SPICLK_B
SPIDOUT_B
SPIDIN_B
SPICS_NB
BLCDVREF
VLCD25V 76
J15
L18
T17
T19
T20
T16
V20
Y21
Y22
P17
P19
P18
P16
U22
U20
U19
U18
R18
R20
N22
N21
H15
M20
M18
W21
W19
W22
C4028
VLCD25V 77
0.1
VLCD25V 78
5
6
7
8
5
6
7
8
5
6
7
8
5
6
7
8
C4029
VLCD25V 79
0.1
GND
VLCD25V 80
0.1
0.1
C4030
1005
47/6.3
C4031
R4201
0.1
4.7k
C4033
C4032
BVTTLCD
CN4001
C4034
47/6.3
BVLCD33V
OPEN
R4030
QGF0401F1-80W
4 3 2 1
8 1
BD33V
R4172
DO
/CS
/WP
GND
7 2
4.7k
R4173
IC4012
6 3
TH4002
0.1
R4162
4.7k
4.7k
47/6.3
C4036
C4035
R4174
M25P40VMN6PB2-X
5 4
4.7k
NAD0046-001X
GND
DIO
CLK
/HOLD
VCC
0.1
0
C4038
5 6 7 8
ARY
R4168
BVLCD25V
1k
1k
4 3 2 1
OPEN
0
R4171
R4170
R4169
R4164
R4165
R4166
R4167
4.7k
4.7k
4.7k
4.7k
R4031
SD
GND PAD
GND
VREF
VSENSE
IC4007
9
LP2996MR-X
BD25V
GND
BD33V
0.1
AVIN
VDDQ
PVIN
VTT
C4242
5 6 7 8
4.7k
R4163
220/6.3
C4037
NEX60JM-227X
BD33V
47/6.3
C4039
GND
BD25V
TH4001
0.1
C4040
NAD0046-005X
BVTTLCD
BVLCD25V
DD PWB ASS'Y (7/12)

c10656001a_1201_7/12_0.0
DD PWB CIRCUIT DIAGRAM (8/12) [RED DRIVER - DDR2]
R0VREF RD18V R0VTT R1VTT RD18V R1VREF
IC2008
DLL LOOP VTT
IC2009
LP2996MR-X LP2996MR-X
DQR_O
1
GND VTT VTT GND
2
SD PVIN PVIN SD
AVIN DQR_I AVIN
3
VSENSE VSENSE
4
VREF VDDQ VDDQ VREF
9 9
C2045 C2102
GND PAD 0.1 0.1 GND PAD
C2041 C2043 C2101 C2099 C2100 C2098

C2042 C2044 NEX60JM-227X
0.1 0.1 NEX60JM-227X 47/6.3 0.1 0.1
220/6.3
47/6.3 R0VREF
IC2001 R1VREF
220/6.3
R0VTT R1VTT
ASI6101SL
GND
GND
F10 VREFDDR VREFDDR T10
R2210 R2218
47 G13 VREFDDR VREFDDR T13 47
C2078 1005 R2206 22 1005 R0DQR0 R1DQR0 R2214 22 1005 1005 C2135
0.1 C8 DQR0_O[0] DQR1_O[0] AA7 0.1
R2211 R0_DQR0 R1_DQR0 R2219
47 D8 DQR0_I[0] DQR1_I[0] Y7 47
1005 R2207 22 1005 R0DQR1 R1DQR1 R2215 22 1005 1005
C11 DQR0_O[1] DQR1_O[1] W11
C2046
C2047
C2048
C2049
C2050
C2051
C2108
C2107
C2106
C2105
C2104
C2103
R2212 R0_DQR1 R1_DQR1 R2220
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
47 A11 DQR0_I[1] DQR1_I[1] V11 47
C2079 1005 R2208 22 1005 R0DQR2 R1DQR2 R2216 22 1005 1005 C2136
R0_DQSN1 0.1 D13 DQR0_O[2] DQR1_O[2] U13 0.1 R1_DQSN1
R2213 R0_DQR2 R1_DQR2 R2221
R0_DQSN0 47 C13 DQR0_I[2] DQR1_I[2] V13 47 R1_DQSN0
1005 R2209 22 1005 R0DQR3 R1DQR3 R2217 22 1005 1005
R0_DQS1 B17 DQR0_O[3] DQR1_O[3] AB19 R1_DQS1
R0_DQR3 R1_DQR3
R0_DQS0 A17 DQR0_I[3] DQR1_I[3] AA19 R1_DQS0
C2080 R0_DQ4 R2069 1 16 R0DQ4 R1DQ7 1 16 R2132 R1_DQ7 C2137
0.1 E7 DQ0[4] DQ1[7] W7 0.1
R0_DQ3 22 2 15 R0DQ3 R1DQ6 2 15 22 R1_DQ6
D7 DQ0[3] DQ1[6] AB5
R0_DQ5 8ARY 3 14 R0DQ5 R1DQ0 3 14 8ARY R1_DQ0
F7 B7 E8 A8 J2 R7 R3 L1 E2 J1 J7 A1 A3 E1 E3 J9 J3 M9 P9 R1 N1 A4 DQ0[5] DQ1[0] AB4 N1 R1 P9 M9 J3 J9 E3 E1 A3 A1 J7 J1 E2 L1 R3 R7 J2 A8 E8 B7 F7
R0_DQ2 4 13 R0DQ2 R1DQ1 4 13 R1_DQ1
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
C4 DQ0[2] DQ1[1] U7
C2081 R0_DQ1 5 12 R0DQ1 R1DQ2 5 12 R1_DQ2 C2138
0.1 E8 DQ0[1] DQ1[2] V7 0.1
R0_DQ0 6 11 R0DQ0 R1DQ3 6 11 R1_DQ3
B5 DQ0[0] DQ1[3] U8
R0_DM1 R0_DQ6 7 10 R0DQ6 R1DQ4 7 10 R1_DQ4 R1_DM1
B3 UDM VDDQ A9 C2052 F8 DQ0[6] DQ1[4] V8 C2109 A9 VDDQ UDM B3
R0_DM0 0.1 R0_DQ7 8 9 R0DQ7 R1DQ5 8 9 R1_DQ5 0.1 R1_DM0
F3 LDM VSSQ A7 A5 DQ0[7] DQ1[5] AA5 A7 VSSQ LDM F3
C2053 C2110
R0_DQ0 R0_DQ15 R2070 1 16 R0DQ15 R1DQ14 1 16 R2133 R1_DQ14 R1_DQ0
C2082
C2139
G8 DQ0 VDDQ C1 0.1 D9 DQ0[15] DQ1[14] U9 0.1 C1 VDDQ DQ0 G8
0.1
0.1
R0_DQ1 R0_DQ8 22 2 15 R0DQ8 R1DQ9 2 15 22 R1_DQ9 R1_DQ1
G2 DQ1 VSSQ B2 A8 DQ0[8] DQ1[9] Y10 B2 VSSQ DQ1 G2
R0_DQ2 R0_DQ13 8ARY 3 14 R0DQ13 R1DQ12 3 14 8ARY R1_DQ12 R1_DQ2
H7 DQ2 VDDQ C7 C2054 E9 DQ0[13] DQ1[12] AA8 C2111 C7 VDDQ DQ2 H7
R0_DQ3 0.1 R0_DQ10 4 13 R0DQ10 R1DQ11 4 13 R1_DQ11 0.1 R1_DQ3
H3 DQ3 VSSQ B8 B8 DQ0[10] DQ1[11] AB8 B8 VSSQ DQ3 H3
R0_DQ4 C2055 R0_DQ11 5 12 R0DQ11 R1DQ10 5 12 R1_DQ10 C2112 R1_DQ4
C2083
C2140
H1 DQ4 VDDQ C3 0.1 E11 DQ0[11] DQ1[10] W10 0.1 C3 VDDQ DQ4 H1
0.1
0.1
R0_DQ5 R0_DQ12 6 11 R0DQ12 R1DQ13 6 11 R1_DQ13 R1_DQ5
H9 DQ5 VSSQ D2 F11 DQ0[12] DQ1[13] W9 D2 VSSQ DQ5 H9
R0_DQ6
F1 DQ6
IC2003 VDDQ C9 C2056
R0_DQ9 7 10 R0DQ9
D10 DQ0[9] DQ1[8] Y8
R1DQ8 7 10 R1_DQ8
C2113 C9 VDDQ
IC2005 DQ6 F1
R1_DQ6
R0_DQ8
F9 DQ7
H5PS5162FFR-S5C VSSQ D8
C2057 R0_DQ20 R2071 1 16 R0DQ20
C10 DQ0[14] DQ1[15] V10
R1DQ23 1 16 R2134 R1_DQ23 C2114
D8 VSSQ
H5PS5162FFR-S5C DQ7 F9
R1_DQ8
C2084
C2141
C8 DQ8 VDDQ E9 0.1 E14 DQ0[20] DQ1[23] AB15 0.1 E9 VDDQ DQ8 C8
0.1
0.1
R0_DQ9 R0_DQ19 22 2 15 R0DQ19 R1DQ22 2 15 22 R1_DQ22 R1_DQ9
C2 DQ9 VSSQ E7 A15 DQ0[19] DQ1[22] V12 E7 VSSQ DQ9 C2
R0_DQ10 R0_DQ21 8ARY 3 14 R0DQ21 R1DQ16 3 14 8ARY R1_DQ16 R1_DQ10
D7 DQ10 VDDQ G1 C2058 F13 DQ0[21] DQ1[16] T12 C2115 G1 VDDQ DQ10 D7
D3 DQ11 VSSQ F2 F12 DQ0[18] DQ1[17] Y14 F2 VSSQ DQ11 D3
R0_DQ12 C2059 R0_DQ17 5 12 R0DQ17 R1DQ18 5 12 R1_DQ18 C2116 R1_DQ12
C2085
C2142
D1 DQ12 VDDQ G7 0.1 A16 DQ0[17] DQ1[18] AB14 0.1 G7 VDDQ DQ12 D1
0.1
0.1
D9 DQ13 VSSQ F8 E13 DQ0[16] DQ1[19] AA13 F8 VSSQ DQ13 D9
B1 DQ14 VDDQ G3 C2060 C15 DQ0[22] DQ1[20] AB13 C2117 G3 VDDQ DQ14 B1
B9 DQ15 VSSQ H2 D14 DQ0[23] DQ1[21] U12 H2 VSSQ DQ15 B9
R0_CLKE C2061 R0_DQ31 R2072 1 16 R0DQ31 R1DQ30 1 16 R2135 R1_DQ30 C2118 R1_CLKE
C2086
C2143
K2 CKE VDDQ G9 0.1 F16 DQ0[31] DQ1[30] T14 0.1 G9 VDDQ CKE K2
0.1
0.1
R0_CLK0 R0_DQ24 22 2 15 R0DQ24 R1DQ25 2 15 22 R1_DQ25 R1_CLK0
RD18V J8 CLK VSSQ H8 E16 DQ0[24] DQ1[25] W15 H8 VSSQ CLK J8 RD18V
R0_CLKN0 R0_DQ29 8ARY 3 14 R0DQ29 R1DQ28 3 14 8ARY R1_DQ28 R1_CLKN0
K8 /CLK NC A2 H14 DQ0[29] DQ1[28] AB17 A2 NC /CLK K8
R0_DQ26 4 13 R0DQ26 R1DQ27 4 13 R1_DQ27
C17 DQ0[26] DQ1[27] Y17
C2087 R0_DQ27 5 12 R0DQ27 R1DQ26 5 12 R1_DQ26 C2144
0.1 A18 DQ0[27] DQ1[26] Y15 0.1
/RAS
/CAS
/CAS
/RAS
ODT
ODT
R0_DQ28 6 11 R0DQ28 R1DQ29 6 11 R1_DQ29
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B19 DQ0[28] DQ1[29] AA16
R0_DQ25 7 10 R0DQ25 R1DQ24 7 10 R1_DQ24
R2038 R2039 K7 L7 K3 L8 K9 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 B18 DQ0[25] DQ1[24] V15 R8 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 L3 L2 K9 L8 K3 L7 K7 R2102 R2101
100 100 R0_DQ30 8 9 R0DQ30 R1DQ31 8 9 R1_DQ31 100 100
1005 1005 A19 DQ0[30] DQ1[31] R14 1005 1005
C2088 R2046 1 16 R0_AD5 R0_AD5 R2073 1 16 R0AD5 R1AD4 1 16 R2136 R1_AD4 R1_AD4 1 16 R2110 C2145
0.1 A12 A0[5] A1[4] W6 0.1
82 2 15 R0_AD6 R0_AD6 22 2 15 R0AD6 R1AD3 2 15 22 R1_AD3 R1_AD3 2 15 100
C5 A0[6] A1[3] W5
8ARY 3 14 R0_AD7 R0_AD7 8ARY 3 14 R0AD7 R1AD2 3 14 8ARY R1_AD2 R1_AD2 3 14 8ARY
B12 A0[7] A1[2] Y5
R0_ODTN
R0_RASN
R0_CASN
R1_CASN
R1_RASN
R2040 R2041 R2104 R2103
R0_AD10
R0_AD12
R1_AD12
R1_AD10
R0_AD11
R1_AD11
R0_WEN
R1_WEN
R0_CSN
R1_ODT
R1_CSN
R0_AD0
R0_AD1
R0_AD2
R0_AD3
R0_AD4
R0_AD5
R0_AD6
R0_AD7
R0_AD8
R0_AD9
R1_AD9
R1_AD8
R1_AD7
R1_AD6
R1_AD5
R1_AD4
R1_AD3
R1_AD2
R1_AD1
R1_AD0
R0_BA0
R0_BA1
R1_BA1
R1_BA0
4 13 R0_AD8 R0_AD8 4 13 R0AD8 R1AD1 4 13 R1_AD1 R1_AD1 4 13
100 100 B3 A0[8] A1[1] AA3 100 100
1005 1005 GND GND 1005 1005
C2089 5 12 R0_AD9 R0_AD9 5 12 R0AD9 R1AD0 5 12 R1_AD0 R1_AD0 5 12 C2146
0.1 D12 A0[9] A1[0] AB3 0.1
6 11 R0_AD10 R0_AD10 6 11 R0AD10 6 11 6 11
E15 A0[10]
7 10 R0_AD11 R0_AD11 7 10 R0AD11 R1BA0 7 10 R1_BA0 R1_BA0 7 10
R0VREF A3 A0[11] BA1[0] U14 R1VREF
C2062
C2063
C2064
C2065
C2066
C2067
C2124
C2123
C2122
C2121
C2120
C2119
8 9 R0_AD12 R0_AD12 8 9 R0AD12 R1BA1 8 9 R1_BA1 R1_BA1 8 9
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
E12 A0[12] BA1[1] U10
DDR2 CH0 I/F
DDR2 CH1 I/F

C2090 R2047 1 16 R0_BA1 R0_BA1 R2074 1 16 R0BA1 R1AD12 1 16 R2137 R1_AD12 R1_AD12 1 16 R2109 C2147
R0_DQSN3 0.1 G15 BA0[1] A1[12] AB20 0.1 R1_DQSN3
82 2 15 R0_BA0 R0_BA0 22 2 15 R0BA0 R1AD11 2 15 22 R1_AD11 R1_AD11 2 15 100
R0_DQSN2 E17 BA0[0] A1[11] AA20 R1_DQSN2
8ARY 3 14 8ARY 3 14 R1AD10 3 14 8ARY R1_AD10 R1_AD10 3 14 8ARY
R0_DQS3 A1[10] W18 R1_DQS3
R0_DQS2 E6 A0[0] A1[9] W17 R1_DQS2
C2091 5 12 R0_AD1 R0_AD1 5 12 R0AD1 R1AD8 5 12 R1_AD8 R1_AD8 5 12 C2148
0.1 F15 A0[1] A1[8] U16 0.1
F7 A0[2] A1[7] V16
F7 B7 E8 A8 J2 R7 R3 L1 E2 J1 J7 A1 A3 E1 E3 J9 J3 M9 P9 R1 N1 G14 A0[3] A1[6] W14 N1 R1 P9 M9 J3 J9 E3 E1 A3 A1 J7 J1 E2 L1 R3 R7 J2 A8 E8 B7 F7
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
D5 A0[4] A1[5] V6
C2092 1005 82 R2048 R0_DM0 R0_DM0 1005 0 R2075 R0DM0 R1DM0 R2138 0 1005 R1_DM0 R1_DM0 R2111 82 1005 C2149
0.1 G10 DM0[0] DM1[0] AA4 0.1
1005 82 R2049 R0_DM1 R0_DM1 1005 0 R2076 R0DM1 R1DM1 R2139 0 1005 R1_DM1 R1_DM1 R2112 82 1005
A10 DM0[1] DM1[1] AB7
R0_DM3 1005 82 R2050 R0_DM2 R0_DM2 1005 0 R2077 R0DM2 R1DM2 R2140 0 1005 R1_DM2 R1_DM2 R2113 82 1005 R1_DM3
B3 UDM VDDQ A9 C2068 B16 DM0[2] DM1[2] Y12 C2125 A9 VDDQ UDM B3
R0_DM2 0.1 1005 82 R2051 R0_DM3 R0_DM3 1005 0 R2078 R0DM3 R1DM3 R2141 0 1005 R1_DM3 R1_DM3 R2114 82 1005 0.1 R1_DM2
F3 LDM VSSQ A7 D15 DM0[3] DM1[3] Y18 A7 VSSQ LDM F3
C2069 C2126
R0_DQ16 R0_DQS0 1005 22 R2079 R0DQS0 R1DQS0 R2142 22 1005 R1_DQS0 R1_DQ16
C2093
C2150
G8 DQ0 VDDQ C1 0.1 A6 DQS0[0] DQS1[0] Y6 0.1 C1 VDDQ DQ0 G8
0.1
0.1
G2 DQ1 VSSQ B2 A9 DQS0[1] DQS1[1] Y9 B2 VSSQ DQ1 G2
H7 DQ2 VDDQ C7 C2070 B14 DQS0[2] DQS1[2] Y13 C2127 C7 VDDQ DQ2 H7
R0_DQ19 0.1 R0_DQS3 1005 22 R2082 R0DQS3 R1DQS3 R2145 22 1005 R1_DQS3 0.1 R1_DQ19
H3 DQ3 VSSQ B8 D16 DQS0[3] DQS1[3] AB18 B8 VSSQ DQ3 H3
R0_DQ20 C2071 R0_DQSN0 1005 22 R2083 R0DQSN0 R1DQSN0 R2146 22 1005 R1_DQSN0 C2128 R1_DQ20
C2094
C2151
H1 DQ4 VDDQ C3 0.1 C6 DQS0_N[0] DQS1_N[0] AB6 0.1 C3 VDDQ DQ4 H1
0.1
0.1
R0_DQ21 R0_DQSN1 1005 22 R2084 R0DQSN1 R1DQSN1 R2147 22 1005 R1_DQSN1 R1_DQ21
H9 DQ5 VSSQ D2 C9 DQS0_N[1] DQS1_N[1] AB9 D2 VSSQ DQ5 H9
R0_DQ22
F1 DQ6
R0_DQSN2 1005 22 R2085 R0DQSN2
A14 DQS0_N[2] DQS1_N[2] W13
R1DQSN2 R2148 22 1005 R1_DQSN2
C2129 C9 VDDQ
IC2006 DQ6 F1
R1_DQ22
R0_DQ23 0.1 R0_DQSN3 1005 22 R2086 R0DQSN3 R1DQSN3 R2149 22 1005 R1_DQSN3 0.1 R1_DQ23
R0_DQ24
F9 DQ7
C2073 R0_CLK0 1005 22 R2089 R0CLK0
C16 DQS0_N[3] DQS1_N[3] AA18
R1CLK0 R2152 22 1005 R1_CLK0 C2130
D8 VSSQ
R1_DQ24
C2095
C2152
C8 DQ8 VDDQ E9 0.1 A7 CK0[0] CK1[0] AB10 0.1 E9 VDDQ DQ8 C8
0.1
0.1
R0_DQ25 R0_CLKN0 1005 22 R2090 R0CLKN0 R1CLKN0 R2153 22 1005 R1_CLKN0 R1_DQ25
C2 DQ9 VSSQ E7 B7 CK0_N[0] CK1_N[0] AA10 E7 VSSQ DQ9 C2
R0_DQ26 1005 82 R2062 R0_CLKE R0_CLKE 1005 22 R2091 R0CLKE R1CLKE R2154 22 1005 R1_CLKE R1_CLKE R2125 100 1005 R1_DQ26
D7 DQ10 VDDQ G1 C2074 D18 CKE0 CKE1 AB11 C2131 G1 VDDQ DQ10 D7
0.1 0.1
R0_DQ27 R0_CLK1 1005 22 R2092 R0CLK1 R1CLK1 R2155 22 1005 R1_CLK1 R1_DQ27
D3 DQ11 VSSQ F2 A13 CK0[1] CK1[1] AA15 F2 VSSQ DQ11 D3
R0_DQ28 C2075 R0_CLKN1 1005 22 R2093 R0CLKN1 R1CLKN1 R2156 22 1005 R1_CLKN1 C2132 R1_DQ28
C2096
C2153
D1 DQ12 VDDQ G7 0.1 B13 CK0_N[1] CK1_N[1] AB16 0.1 G7 VDDQ DQ12 D1
0.1
0.1
R0_DQ29 1005 82 R2065 R0_CASN R0_CASN 1005 22 R2094 R0CASN R1CASN R2157 22 1005 R1_CASN R1_CASN R2128 100 1005 R1_DQ29
D9 DQ13 VSSQ F8 F9 CAS0_N CAS1_N AA11 F8 VSSQ DQ13 D9
R0_DQ30 R0_RASN R0_RASN 1 8 R0RASN R1RASN R1_RASN R1_RASN 1 8 R1_DQ30
B1 DQ14 VDDQ G3 C2076 D11 RAS0_N RAS1_N Y16 C2133 G3 VDDQ DQ14 B1
R0_DQ31 0.1 R2068 4 5 R0_WEN R0_WEN R2097 2 7 R0WEN R1WEN 4 5 R2160 R1_WEN R1_WEN 2 7 R2131 0.1 R1_DQ31
B9 DQ15 VSSQ H2 C18 WE0_N WE1_N W16 H2 VSSQ DQ15 B9
R0_CLKE C2077 100 3 6 R0_CSN R0_CSN 22 3 6 R0CSN R1CSN 3 6 22 R1_CSN R1_CSN 3 6 100 C2134 R1_CLKE
C2097
C2154
K2 CKE VDDQ G9 0.1 G9 CS0_N CS1_N AB12 0.1 G9 VDDQ CKE K2
0.1
0.1
R0_CLK1 ARY 2 7 R0_ODTN R0_ODTN ARY 4 5 R0ODTN R1ODTN 2 7 ARY R1_ODT R1_ODT 4 5 ARY R1_CLK1
J8 CLK VSSQ H8 B10 ODT0 ODT1 U17 H8 VSSQ CLK J8
R0_CLKN1 1 8 R0CALN R1CALN 1 8 R1_CLKN1
K8 /CLK NC A2 B20 CAL0_N CAL1_N T9 A2 NC /CLK K8
NRSA6AD-200W
R0CALP R1CALP
A20 CAL0_P CAL1_P R9
NRSA6AD-300W
R2096
C19 NC
NRSA6AD-200W
20
R2095
/RAS
/CAS
/CAS
/RAS
GND GND
20
ODT
ODT
R2159
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
RD18V RD18V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
30
D19 NC
30
R2158
NRSA6AD-300W
K7 L7 K3 L8 K9 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 IC2001 R8 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 L3 L2 K9 L8 K3 L7 K7
R1_CALN
R2042 R2043 R2106 R2105

100 100 ASI6101SL 100 100
R1_CALP
R0_CALN
R0_CALP
1005 1005 1005 1005
R2067 R2130
20 20
NRSA6AD-200W
RED DRIVER 2/3 NRSA6AD-200W
1/3 =>> SHEET 5
R2066
3/3 =>> SHEET 11
R2129
R0_ODTN
R0_RASN
R0_CASN
R1_CASN
R1_RASN
R2044 R2045 R2108 R2107
R0_AD10
R0_AD12
R1_AD12
R1_AD10
R0_AD11
R1_AD11
R0_WEN
R1_WEN
30
R0_CSN
R1_ODT
R1_CSN
R0_AD0
R0_AD1
R0_AD2
R0_AD3
R0_AD4
R0_AD5
R0_AD6
R0_AD7
R0_AD8
R0_AD9
30
R1_AD9
R1_AD8
R1_AD7
R1_AD6
R1_AD5
R1_AD4
R1_AD3
R1_AD2
R1_AD1
R1_AD0
R0_BA0
R0_BA1
R1_BA1
R1_BA0
100 100 NRSA6AD-300W NRSA6AD-300W 100 100
1005 1005 GND GND 1005 1005
GND GND
DD PWB ASS'Y (8/12)

c10656001a_1201_8/12_0.0
(No.PA040<Rev.001>)2-21 2-22(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (9/12) [GREEN DRIVER - DDR2]
G0VREF GD18V G0VTT G1VTT GD18V G1VREF
IC3008
DLL LOOP VTT
IC3009
DQR_O
1
GND VTT VTT GND
2
SD PVIN PVIN SD
AVIN DQR_I AVIN
3
VSENSE VSENSE
4
VREF VDDQ VDDQ VREF
9 9
C3045 C3102
C3041 C3043 C3101 C3099 C3100 C3098

C3042 C3044 NEX60JM-227X
0.1 0.1 NEX60JM-227X 47/6.3 0.1 0.1
220/6.3
47/6.3 G0VREF
IC3001 G1VREF
220/6.3
G0VTT G1VTT
ASI6101SL
GND
GND
R3210 R3218
C3078 1005 R3206 22 1005 G0DQR0 G1DQR0 R3214 22 1005 1005 C3135
0.1 C8 DQR0_O[0] DQR1_O[0] AA7 0.1
R3211 G0_DQR0 G1_DQR0 R3219
47 D8 DQR0_I[0] DQR1_I[0] Y7 47
1005 R3207 22 1005 G0DQR1 G1DQR1 R3215 22 1005 1005
C11 DQR0_O[1] DQR1_O[1] W11
C3046
C3047
C3048
C3049
C3050
C3051
C3108
C3107
C3106
C3105
C3104
C3103
R3212 G0_DQR1 G1_DQR1 R3220
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
47 A11 DQR0_I[1] DQR1_I[1] V11 47
C3079 1005 R3208 22 1005 G0DQR2 G1DQR2 R3216 22 1005 1005 C3136
G0_DQSN1 0.1 D13 DQR0_O[2] DQR1_O[2] U13 0.1 G1_DQSN1
R3213 G0_DQR2 G1_DQR2 R3221
G0_DQSN0 47 C13 DQR0_I[2] DQR1_I[2] V13 47 G1_DQSN0
1005 R3209 22 1005 G0DQR3 G1DQR3 R3217 22 1005 1005
G0_DQS1 B17 DQR0_O[3] DQR1_O[3] AB19 G1_DQS1
G0_DQR3 G1_DQR3
G0_DQS0 A17 DQR0_I[3] DQR1_I[3] AA19 G1_DQS0
C3080 G0_DQ4 R3069 1 16 G0DQ4 G1DQ7 1 16 R3132 G1_DQ7 C3137
0.1 E7 DQ0[4] DQ1[7] W7 0.1
G0_DQ3 22 2 15 G0DQ3 G1DQ6 2 15 22 G1_DQ6
D7 DQ0[3] DQ1[6] AB5
G0_DQ5 8ARY 3 14 G0DQ5 G1DQ0 3 14 8ARY G1_DQ0
G0_DQ2 4 13 G0DQ2 G1DQ1 4 13 G1_DQ1
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
C4 DQ0[2] DQ1[1] U7
C3081 G0_DQ1 5 12 G0DQ1 G1DQ2 5 12 G1_DQ2 C3138
0.1 E8 DQ0[1] DQ1[2] V7 0.1
G0_DQ0 6 11 G0DQ0 G1DQ3 6 11 G1_DQ3
B5 DQ0[0] DQ1[3] U8
G0_DM1 G0_DQ6 7 10 G0DQ6 G1DQ4 7 10 G1_DQ4 G1_DM1
G0_DM0 0.1 G0_DQ7 8 9 G0DQ7 G1DQ5 8 9 G1_DQ5 0.1 G1_DM0
C3053 C3110
G0_DQ0 G0_DQ15 R3070 1 16 G0DQ15 G1DQ14 1 16 R3133 G1_DQ14 G1_DQ0
C3082
C3139
0.1
0.1
G0_DQ1 G0_DQ8 22 2 15 G0DQ8 G1DQ9 2 15 22 G1_DQ9 G1_DQ1
G0_DQ2 G0_DQ13 8ARY 3 14 G0DQ13 G1DQ12 3 14 8ARY G1_DQ12 G1_DQ2
G0_DQ3 0.1 G0_DQ10 4 13 G0DQ10 G1DQ11 4 13 G1_DQ11 0.1 G1_DQ3
G0_DQ4 C3055 G0_DQ11 5 12 G0DQ11 G1DQ10 5 12 G1_DQ10 C3112 G1_DQ4
C3083
C3140
0.1
0.1
G0_DQ5 G0_DQ12 6 11 G0DQ12 G1DQ13 6 11 G1_DQ13 G1_DQ5
G0_DQ6
F1 DQ6
G0_DQ9 7 10 G0DQ9
D10 DQ0[9] DQ1[8] Y8
G1DQ8 7 10 G1_DQ8
C3113 C9 VDDQ
IC3005 DQ6 F1
G1_DQ6
G0_DQ8
F9 DQ7
C3057 G0_DQ20 R3071 1 16 G0DQ20
C10 DQ0[14] DQ1[15] V10
G1DQ23 1 16 R3134 G1_DQ23 C3114
D8 VSSQ
G1_DQ8
C3084
C3141
0.1
0.1
G0_DQ9 G0_DQ19 22 2 15 G0DQ19 G1DQ22 2 15 22 G1_DQ22 G1_DQ9
G0_DQ10 G0_DQ21 8ARY 3 14 G0DQ21 G1DQ16 3 14 8ARY G1_DQ16 G1_DQ10
G0_DQ12 C3059 G0_DQ17 5 12 G0DQ17 G1DQ18 5 12 G1_DQ18 C3116 G1_DQ12
C3085
C3142
0.1
0.1
G0_CLKE C3061 G0_DQ31 R3072 1 16 G0DQ31 G1DQ30 1 16 R3135 G1_DQ30 C3118 G1_CLKE
C3086
C3143
0.1
0.1
G0_CLK0 G0_DQ24 22 2 15 G0DQ24 G1DQ25 2 15 22 G1_DQ25 G1_CLK0
GD18V J8 CLK VSSQ H8 E16 DQ0[24] DQ1[25] W15 H8 VSSQ CLK J8 GD18V
G0_CLKN0 G0_DQ29 8ARY 3 14 G0DQ29 G1DQ28 3 14 8ARY G1_DQ28 G1_CLKN0
G0_DQ26 4 13 G0DQ26 G1DQ27 4 13 G1_DQ27
C17 DQ0[26] DQ1[27] Y17
C3087 G0_DQ27 5 12 G0DQ27 G1DQ26 5 12 G1_DQ26 C3144
0.1 A18 DQ0[27] DQ1[26] Y15 0.1
/RAS
/CAS
/CAS
/RAS
ODT
ODT
G0_DQ28 6 11 G0DQ28 G1DQ29 6 11 G1_DQ29
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B19 DQ0[28] DQ1[29] AA16
G0_DQ25 7 10 G0DQ25 G1DQ24 7 10 G1_DQ24
100 100 G0_DQ30 8 9 G0DQ30 G1DQ31 8 9 G1_DQ31 100 100
1005 1005 A19 DQ0[30] DQ1[31] R14 1005 1005
C3088 R3046 1 16 G0_AD5 G0_AD5 R3073 1 16 G0AD5 G1AD12 1 16 R3136 G1_AD12 G1_AD12 1 16 R3109 C3145
0.1 A12 A0[5] A1[12] AB20 0.1
100 2 15 G0_AD6 G0_AD6 22 2 15 G0AD6 G1AD11 2 15 22 G1_AD11 G1_AD11 2 15 100
C5 A0[6] A1[11] AA20
8ARY 3 14 G0_AD7 G0_AD7 8ARY 3 14 G0AD7 G1AD10 3 14 8ARY G1_AD10 G1_AD10 3 14 8ARY
B12 A0[7] A1[10] W18
G0_ODTN
G0_RASN
G0_CASN
G1_CASN
G1_RASN
R3040 R3041 R3104 R3103
G0_AD10
G0_AD12
G1_AD12
G1_AD10
G0_AD11
G1_AD11
G0_WEN
G1_WEN
G0_CSN
G1_ODT
G1_CSN
G0_AD0
G0_AD1
G0_AD2
G0_AD3
G0_AD4
G0_AD5
G0_AD6
G0_AD7
G0_AD8
G0_AD9
G1_AD9
G1_AD8
G1_AD7
G1_AD6
G1_AD5
G1_AD4
G1_AD3
G1_AD2
G1_AD1
G1_AD0
G0_BA0
G0_BA1
G1_BA1
G1_BA0
4 13 G0_AD8 G0_AD8 4 13 G0AD8 G1AD9 4 13 G1_AD9 G1_AD9 4 13
100 100 B3 A0[8] A1[9] W17 100 100
1005 1005 GND GND 1005 1005
C3089 5 12 G0_AD9 G0_AD9 5 12 G0AD9 G1AD8 5 12 G1_AD8 G1_AD8 5 12 C3146
0.1 D12 A0[9] A1[8] U16 0.1
E15 A0[10] A1[7] V16
G0VREF A3 A0[11] A1[6] W14 G1VREF
C3062
C3063
C3064
C3065
C3066
C3067
C3124
C3123
C3122
C3121
C3120
C3119
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
E12 A0[12] A1[5] V6
DDR2 CH0 I/F
DDR2 CH1 I/F

C3090 R3047 1 16 G0_BA1 G0_BA1 R3074 1 16 G0BA1 G1AD4 1 16 R3137 G1_AD4 G1_AD4 1 16 R3110 C3147
G0_DQSN3 0.1 G15 BA0[1] A1[4] W6 0.1 G1_DQSN3
100 2 15 G0_BA0 G0_BA0 22 2 15 G0BA0 G1AD3 2 15 22 G1_AD3 G1_AD3 2 15 100
G0_DQSN2 E17 BA0[0] A1[3] W5 G1_DQSN2
8ARY 3 14 8ARY 3 14 G1AD2 3 14 8ARY G1_AD2 G1_AD2 3 14 8ARY
G0_DQS3 A1[2] Y5 G1_DQS3
G0_DQS2 E6 A0[0] A1[1] AA3 G1_DQS2
C3091 5 12 G0_AD1 G0_AD1 5 12 G0AD1 G1AD0 5 12 G1_AD0 G1_AD0 5 12 C3148
0.1 F15 A0[1] A1[0] AB3 0.1
6 11 G0_AD2 G0_AD2 6 11 G0AD2 6 11 6 11
F7 A0[2]
7 10 G0_AD3 G0_AD3 7 10 G0AD3 G1BA0 7 10 G1_BA0 G1_BA0 7 10
F7 B7 E8 A8 J2 R7 R3 L1 E2 J1 J7 A1 A3 E1 E3 J9 J3 M9 P9 R1 N1 G14 A0[3] BA1[0] U14 N1 R1 P9 M9 J3 J9 E3 E1 A3 A1 J7 J1 E2 L1 R3 R7 J2 A8 E8 B7 F7
8 9 G0_AD4 G0_AD4 8 9 G0AD4 G1BA1 8 9 G1_BA1 G1_BA1 8 9
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
D5 A0[4] BA1[1] U10
C3092 1005 82 R3048 G0_DM0 G0_DM0 1005 0 R3075 G0DM0 G1DM0 R3138 0 1005 G1_DM0 G1_DM0 R3111 82 1005 C3149
0.1 G10 DM0[0] DM1[0] AA4 0.1
1005 82 R3049 G0_DM1 G0_DM1 1005 0 R3076 G0DM1 G1DM1 R3139 0 1005 G1_DM1 G1_DM1 R3112 82 1005
A10 DM0[1] DM1[1] AB7
G0_DM3 1005 82 R3050 G0_DM2 G0_DM2 1005 0 R3077 G0DM2 G1DM2 R3140 0 1005 G1_DM2 G1_DM2 R3113 82 1005 G1_DM3
G0_DM2 0.1 1005 82 R3051 G0_DM3 G0_DM3 1005 0 R3078 G0DM3 G1DM3 R3141 0 1005 G1_DM3 G1_DM3 R3114 82 1005 0.1 G1_DM2
C3069 C3126
G0_DQ16 G0_DQS0 1005 22 R3079 G0DQS0 G1DQS0 R3142 22 1005 G1_DQS0 G1_DQ16
C3093
C3150
0.1
0.1
G0_DQ19 0.1 G0_DQS3 1005 22 R3082 G0DQS3 G1DQS3 R3145 22 1005 G1_DQS3 0.1 G1_DQ19
G0_DQ20 C3071 G0_DQSN0 1005 22 R3083 G0DQSN0 G1DQSN0 R3146 22 1005 G1_DQSN0 C3128 G1_DQ20
C3094
C3151
0.1
0.1
G0_DQ21 G0_DQSN1 1005 22 R3084 G0DQSN1 G1DQSN1 R3147 22 1005 G1_DQSN1 G1_DQ21
G0_DQ22
F1 DQ6
G0_DQSN2 1005 22 R3085 G0DQSN2
A14 DQS0_N[2] DQS1_N[2] W13
G1DQSN2 R3148 22 1005 G1_DQSN2
C3129 C9 VDDQ
IC3006 DQ6 F1
G1_DQ22
G0_DQ23 0.1 G0_DQSN3 1005 22 R3086 G0DQSN3 G1DQSN3 R3149 22 1005 G1_DQSN3 0.1 G1_DQ23
G0_DQ24
F9 DQ7
C3073 G0_CLK0 1005 22 R3089 G0CLK0
C16 DQS0_N[3] DQS1_N[3] AA18
G1CLK0 R3152 22 1005 G1_CLK0 C3130
D8 VSSQ
G1_DQ24
C3095
C3152
0.1
0.1
G0_DQ25 G0_CLKN0 1005 22 R3090 G0CLKN0 G1CLKN0 R3153 22 1005 G1_CLKN0 G1_DQ25
G0_DQ26 1005 100 R3062 G0_CLKE G0_CLKE 1005 22 R3091 G0CLKE G1CLKE R3154 22 1005 G1_CLKE G1_CLKE R3125 100 1005 G1_DQ26
0.1 0.1
G0_DQ27 G0_CLK1 1005 22 R3092 G0CLK1 G1CLK1 R3155 22 1005 G1_CLK1 G1_DQ27
G0_DQ28 C3075 G0_CLKN1 1005 22 R3093 G0CLKN1 G1CLKN1 R3156 22 1005 G1_CLKN1 C3132 G1_DQ28
C3096
C3153
0.1
0.1
G0_DQ29 1005 100 R3065 G0_CASN G0_CASN 1005 22 R3094 G0CASN G1CASN R3157 22 1005 G1_CASN G1_CASN R3128 100 1005 G1_DQ29
G0_DQ30 G0_RASN G0_RASN 1 8 G0RASN G1RASN G1_RASN G1_RASN 1 8 G1_DQ30
G0_DQ31 0.1 R3068 4 5 G0_WEN G0_WEN R3097 2 7 G0WEN G1WEN 4 5 R3160 G1_WEN G1_WEN 2 7 R3131 0.1 G1_DQ31
G0_CLKE C3077 100 3 6 G0_CSN G0_CSN 22 3 6 G0CSN G1CSN 3 6 22 G1_CSN G1_CSN 3 6 100 C3134 G1_CLKE
C3097
C3154
0.1
0.1
G0_CLK1 ARY 2 7 G0_ODTN G0_ODTN ARY 4 5 G0ODTN G1ODTN 2 7 ARY G1_ODT G1_ODT 4 5 ARY G1_CLK1
G0_CLKN1 1 8 G0CALN G1CALN 1 8 G1_CLKN1
NRSA6AD-200W
G0CALP G1CALP
NRSA6AD-300W
R3096
C19 NC
NRSA6AD-200W
20
R3095
/RAS
/CAS
/CAS
/RAS
GND GND
20
ODT
ODT
R3159
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
GD18V GD18V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
30
D19 NC
30
R3158
IC3001 NRSA6AD-300W
K7 L7 K3 L8 K9 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 R8 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 L3 L2 K9 L8 K3 L7 K7
G1_CALN
R3042 R3043 R3106 R3105
100 100 ASI6101SL G1_CALP
100 100
G0_CALN
G0_CALP
1005 1005 1005 1005
R3067 R3130
20 20
NRSA6AD-200W
GREEN DRIVER 2/3 NRSA6AD-200W
1/3 =>> SHEET 6
R3066
3/3 =>> SHEET 11
R3129
G0_ODTN
G0_RASN
G0_CASN
G1_CASN
G1_RASN
R3044 R3045 R3108 R3107
G0_AD10
G0_AD12
G1_AD12
G1_AD10
G0_AD11
G1_AD11
G0_WEN
G1_WEN
G0_CSN
G1_ODT
G1_CSN
30
G0_AD0
G0_AD1
G0_AD2
G0_AD3
G0_AD4
G0_AD5
G0_AD6
G0_AD7
G0_AD8
G0_AD9
G1_AD9
G1_AD8
G1_AD7
G1_AD6
G1_AD5
G1_AD4
G1_AD3
G1_AD2
G1_AD1
G1_AD0
G0_BA0
G0_BA1
30
G1_BA1
G1_BA0
100 100 NRSA6AD-300W NRSA6AD-300W 100 100
1005 1005 GND GND 1005 1005
GND GND
DD PWB ASS'Y (9/12)

c10656001a_1201_9/12_0.0
(No.PA040<Rev.001>)2-23 2-24(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (10/12) [BLUE DRIVER - DDR2]
B0VREF BD18V B0VTT B1VTT BD18V B1VREF
IC4008
DLL LOOP VTT
IC4009
DQR_O
1
GND VTT VTT GND
2
SD PVIN PVIN SD
AVIN DQR_I AVIN
3
VSENSE VSENSE
4
VREF VDDQ VDDQ VREF
9 9
C4045 C4102
C4041 C4043 C4101 C4099 C4100 C4098

C4042 C4044 NEX60JM-227X
0.1 0.1 NEX60JM-227X 47/6.3 0.1 0.1
220/6.3
47/6.3 B0VREF
IC4001 B1VREF
220/6.3
B0VTT B1VTT
ASI6101SL
GND
GND
R4210 R4218
C4078 1005 R4206 22 1005 B0DQR0 B1DQR0 R4214 22 1005 1005 C4135
0.1 C8 DQR0_O[0] DQR1_O[0] AA7 0.1
R4211 B0_DQR0 B1_DQR0 R4219
47 D8 DQR0_I[0] DQR1_I[0] Y7 47
1005 R4207 22 1005 B0DQR1 B1DQR1 R4215 22 1005 1005
C11 DQR0_O[1] DQR1_O[1] W11
C4046
C4047
C4048
C4049
C4050
C4051
C4108
C4107
C4106
C4105
C4104
C4103
R4212 B0_DQR1 B1_DQR1 R4220
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
47 A11 DQR0_I[1] DQR1_I[1] V11 47
C4079 1005 R4208 22 1005 B0DQR2 B1DQR2 R4216 22 1005 1005 C4136
B0_DQSN1 0.1 D13 DQR0_O[2] DQR1_O[2] U13 0.1 B1_DQSN1
R4213 B0_DQR2 B1_DQR2 R4221
B0_DQSN0 47 C13 DQR0_I[2] DQR1_I[2] V13 47 B1_DQSN0
1005 R4209 22 1005 B0DQR3 B1DQR3 R4217 22 1005 1005
B0_DQS1 B17 DQR0_O[3] DQR1_O[3] AB19 B1_DQS1
B0_DQR3 B1_DQR3
B0_DQS0 A17 DQR0_I[3] DQR1_I[3] AA19 B1_DQS0
C4080 B0_DQ4 R4069 1 16 B0DQ4 B1DQ7 1 16 R4132 B1_DQ7 C4137
0.1 E7 DQ0[4] DQ1[7] W7 0.1
B0_DQ3 22 2 15 B0DQ3 B1DQ6 2 15 22 B1_DQ6
D7 DQ0[3] DQ1[6] AB5
B0_DQ5 8ARY 3 14 B0DQ5 B1DQ0 3 14 8ARY B1_DQ0
B0_DQ2 4 13 B0DQ2 B1DQ1 4 13 B1_DQ1
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
C4 DQ0[2] DQ1[1] U7
C4081 B0_DQ1 5 12 B0DQ1 B1DQ2 5 12 B1_DQ2 C4138
0.1 E8 DQ0[1] DQ1[2] V7 0.1
B0_DQ0 6 11 B0DQ0 B1DQ3 6 11 B1_DQ3
B5 DQ0[0] DQ1[3] U8
B0_DM1 B0_DQ6 7 10 B0DQ6 B1DQ4 7 10 B1_DQ4 B1_DM1
B0_DM0 0.1 B0_DQ7 8 9 B0DQ7 B1DQ5 8 9 B1_DQ5 0.1 B1_DM0
C4053 C4110
B0_DQ0 B0_DQ15 R4070 1 16 B0DQ15 B1DQ14 1 16 R4133 B1_DQ14 B1_DQ0
C4082
C4139
0.1
0.1
B0_DQ1 B0_DQ8 22 2 15 B0DQ8 B1DQ9 2 15 22 B1_DQ9 B1_DQ1
B0_DQ2 B0_DQ13 8ARY 3 14 B0DQ13 B1DQ12 3 14 8ARY B1_DQ12 B1_DQ2
B0_DQ3 0.1 B0_DQ10 4 13 B0DQ10 B1DQ11 4 13 B1_DQ11 0.1 B1_DQ3
B0_DQ4 C4055 B0_DQ11 5 12 B0DQ11 B1DQ10 5 12 B1_DQ10 C4112 B1_DQ4
C4083
C4140
0.1
0.1
B0_DQ5 B0_DQ12 6 11 B0DQ12 B1DQ13 6 11 B1_DQ13 B1_DQ5
B0_DQ6
F1 DQ6
B0_DQ9 7 10 B0DQ9
D10 DQ0[9] DQ1[8] Y8
B1DQ8 7 10 B1_DQ8
C4113 C9 VDDQ
IC4005 DQ6 F1
B1_DQ6
B0_DQ8
F9 DQ7
C4057 B0_DQ20 R4071 1 16 B0DQ20
C10 DQ0[14] DQ1[15] V10
B1DQ23 1 16 R4134 B1_DQ23 C4114
D8 VSSQ
B1_DQ8
C4084
C4141
0.1
0.1
B0_DQ9 B0_DQ19 22 2 15 B0DQ19 B1DQ22 2 15 22 B1_DQ22 B1_DQ9
B0_DQ10 B0_DQ21 8ARY 3 14 B0DQ21 B1DQ16 3 14 8ARY B1_DQ16 B1_DQ10
B0_DQ12 C4059 B0_DQ17 5 12 B0DQ17 B1DQ18 5 12 B1_DQ18 C4116 B1_DQ12
C4085
C4142
0.1
0.1
B0_CLKE C4061 B0_DQ31 R4072 1 16 B0DQ31 B1DQ30 1 16 R4135 B1_DQ30 C4118 B1_CLKE
C4086
C4143
0.1
0.1
B0_CLK0 B0_DQ24 22 2 15 B0DQ24 B1DQ25 2 15 22 B1_DQ25 B1_CLK0
BD18V J8 CLK VSSQ H8 E16 DQ0[24] DQ1[25] W15 H8 VSSQ CLK J8 BD18V
B0_CLKN0 B0_DQ29 8ARY 3 14 B0DQ29 B1DQ28 3 14 8ARY B1_DQ28 B1_CLKN0
B0_DQ26 4 13 B0DQ26 B1DQ27 4 13 B1_DQ27
C17 DQ0[26] DQ1[27] Y17
C4087 B0_DQ27 5 12 B0DQ27 B1DQ26 5 12 B1_DQ26 C4144
0.1 A18 DQ0[27] DQ1[26] Y15 0.1
/RAS
/CAS
/CAS
/RAS
ODT
ODT
B0_DQ28 6 11 B0DQ28 B1DQ29 6 11 B1_DQ29
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
B19 DQ0[28] DQ1[29] AA16
B0_DQ25 7 10 B0DQ25 B1DQ24 7 10 B1_DQ24
100 100 B0_DQ30 8 9 B0DQ30 B1DQ31 8 9 B1_DQ31 100 100
1005 1005 A19 DQ0[30] DQ1[31] R14 1005 1005
C4088 R4046 1 16 B0_AD5 B0_AD5 R4073 1 16 B0AD5 B1AD12 1 16 R4136 B1_AD12 B1_AD12 1 16 R4109 C4145
0.1 A12 A0[5] A1[12] AB20 0.1
100 2 15 B0_AD6 B0_AD6 22 2 15 B0AD6 B1AD11 2 15 22 B1_AD11 B1_AD11 2 15 82
C5 A0[6] A1[11] AA20
8ARY 3 14 B0_AD7 B0_AD7 8ARY 3 14 B0AD7 B1AD10 3 14 8ARY B1_AD10 B1_AD10 3 14 8ARY
B12 A0[7] A1[10] W18
B0_ODTN
B0_RASN
B0_CASN
B1_CASN
B1_RASN
R4040 R4041 R4104 R4103
B0_AD10
B0_AD12
B1_AD12
B1_AD10
B0_AD11
B1_AD11
B0_WEN
B1_WEN
B0_CSN
B1_ODT
B1_CSN
B0_AD0
B0_AD1
B0_AD2
B0_AD3
B0_AD4
B0_AD5
B0_AD6
B0_AD7
B0_AD8
B0_AD9
B1_AD9
B1_AD8
B1_AD7
B1_AD6
B1_AD5
B1_AD4
B1_AD3
B1_AD2
B1_AD1
B1_AD0
B0_BA0
B0_BA1
B1_BA1
B1_BA0
4 13 B0_AD8 B0_AD8 4 13 B0AD8 B1AD9 4 13 B1_AD9 B1_AD9 4 13
100 100 B3 A0[8] A1[9] W17 100 100
1005 1005 GND GND 1005 1005
C4089 5 12 B0_AD9 B0_AD9 5 12 B0AD9 B1AD8 5 12 B1_AD8 B1_AD8 5 12 C4146
0.1 D12 A0[9] A1[8] U16 0.1
E15 A0[10] A1[7] V16
B0VREF A3 A0[11] A1[6] W14 B1VREF
C4062
C4063
C4064
C4065
C4066
C4067
C4124
C4123
C4122
C4121
C4120
C4119
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
E12 A0[12] A1[5] V6
DDR2 CH0 I/F
DDR2 CH1 I/F

C4090 R4047 1 16 B0_BA1 B0_BA1 R4074 1 16 B0BA1 B1AD4 1 16 R4137 B1_AD4 B1_AD4 1 16 R4110 C4147
B0_DQSN3 0.1 G15 BA0[1] A1[4] W6 0.1 B1_DQSN3
100 2 15 B0_BA0 B0_BA0 22 2 15 B0BA0 B1AD3 2 15 22 B1_AD3 B1_AD3 2 15 82
B0_DQSN2 E17 BA0[0] A1[3] W5 B1_DQSN2
8ARY 3 14 8ARY 3 14 B1AD2 3 14 8ARY B1_AD2 B1_AD2 3 14 8ARY
B0_DQS3 A1[2] Y5 B1_DQS3
B0_DQS2 E6 A0[0] A1[1] AA3 B1_DQS2
C4091 5 12 B0_AD1 B0_AD1 5 12 B0AD1 B1AD0 5 12 B1_AD0 B1_AD0 5 12 C4148
0.1 F15 A0[1] A1[0] AB3 0.1
6 11 B0_AD2 B0_AD2 6 11 B0AD2 6 11 6 11
F7 A0[2]
7 10 B0_AD3 B0_AD3 7 10 B0AD3 B1BA0 7 10 B1_BA0 B1_BA0 7 10
F7 B7 E8 A8 J2 R7 R3 L1 E2 J1 J7 A1 A3 E1 E3 J9 J3 M9 P9 R1 N1 G14 A0[3] BA1[0] U14 N1 R1 P9 M9 J3 J9 E3 E1 A3 A1 J7 J1 E2 L1 R3 R7 J2 A8 E8 B7 F7
8 9 B0_AD4 B0_AD4 8 9 B0AD4 B1BA1 8 9 B1_BA1 B1_BA1 8 9
LDQS
UDQS
/LDQS
/UDQS
VREF
NC
NC
NC
NC
VDDL
VSSDL
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSSDL
VDDL
NC
NC
NC
NC
VREF
/UDQS
/LDQS
UDQS
LDQS
D5 A0[4] BA1[1] U10
C4092 1005 82 R4048 B0_DM0 B0_DM0 1005 0 R4075 B0DM0 B1DM0 R4138 0 1005 B1_DM0 B1_DM0 R4111 82 1005 C4149
0.1 G10 DM0[0] DM1[0] AA4 0.1
1005 82 R4049 B0_DM1 B0_DM1 1005 0 R4076 B0DM1 B1DM1 R4139 0 1005 B1_DM1 B1_DM1 R4112 82 1005
A10 DM0[1] DM1[1] AB7
B0_DM3 1005 82 R4050 B0_DM2 B0_DM2 1005 0 R4077 B0DM2 B1DM2 R4140 0 1005 B1_DM2 B1_DM2 R4113 82 1005 B1_DM3
B0_DM2 0.1 1005 82 R4051 B0_DM3 B0_DM3 1005 0 R4078 B0DM3 B1DM3 R4141 0 1005 B1_DM3 B1_DM3 R4114 82 1005 0.1 B1_DM2
C4069 C4126
B0_DQ16 B0_DQS0 1005 22 R4079 B0DQS0 B1DQS0 R4142 22 1005 B1_DQS0 B1_DQ16
C4093
C4150
0.1
0.1
B0_DQ19 0.1 B0_DQS3 1005 22 R4082 B0DQS3 B1DQS3 R4145 22 1005 B1_DQS3 0.1 B1_DQ19
B0_DQ20 C4071 B0_DQSN0 1005 22 R4083 B0DQSN0 B1DQSN0 R4146 22 1005 B1_DQSN0 C4128 B1_DQ20
C4094
C4151
0.1
0.1
B0_DQ21 B0_DQSN1 1005 22 R4084 B0DQSN1 B1DQSN1 R4147 22 1005 B1_DQSN1 B1_DQ21
B0_DQ22
F1 DQ6
B0_DQSN2 1005 22 R4085 B0DQSN2
A14 DQS0_N[2] DQS1_N[2] W13
B1DQSN2 R4148 22 1005 B1_DQSN2
C4129 C9 VDDQ
IC4006 DQ6 F1
B1_DQ22
B0_DQ23 0.1 B0_DQSN3 1005 22 R4086 B0DQSN3 B1DQSN3 R4149 22 1005 B1_DQSN3 0.1 B1_DQ23
B0_DQ24
F9 DQ7
C4073 B0_CLK0 1005 22 R4089 B0CLK0
C16 DQS0_N[3] DQS1_N[3] AA18
B1CLK0 R4152 22 1005 B1_CLK0 C4130
D8 VSSQ
B1_DQ24
C4095
C4152
0.1
0.1
B0_DQ25 B0_CLKN0 1005 22 R4090 B0CLKN0 B1CLKN0 R4153 22 1005 B1_CLKN0 B1_DQ25
B0_DQ26 1005 100 R4062 B0_CLKE B0_CLKE 1005 22 R4091 B0CLKE B1CLKE R4154 22 1005 B1_CLKE B1_CLKE R4125 82 1005 B1_DQ26
0.1 0.1
B0_DQ27 B0_CLK1 1005 22 R4092 B0CLK1 B1CLK1 R4155 22 1005 B1_CLK1 B1_DQ27
B0_DQ28 C4075 B0_CLKN1 1005 22 R4093 B0CLKN1 B1CLKN1 R4156 22 1005 B1_CLKN1 C4132 B1_DQ28
C4096
C4153
0.1
0.1
B0_DQ29 1005 100 R4065 B0_CASN B0_CASN 1005 22 R4094 B0CASN B1CASN R4157 22 1005 B1_CASN B1_CASN R4128 82 1005 B1_DQ29
B0_DQ30 B0_RASN B0_RASN 1 8 B0RASN B1RASN B1_RASN B1_RASN 1 8 B1_DQ30
B0_DQ31 0.1 R4068 4 5 B0_WEN B0_WEN R4097 2 7 B0WEN B1WEN 4 5 R4160 B1_WEN B1_WEN 2 7 R4131 0.1 B1_DQ31
B0_CLKE C4077 100 3 6 B0_CSN B0_CSN 22 3 6 B0CSN B1CSN 3 6 22 B1_CSN B1_CSN 3 6 100 C4134 B1_CLKE
C4097
C4154
0.1
0.1
B0_CLK1 ARY 2 7 B0_ODTN B0_ODTN ARY 4 5 B0ODTN B1ODTN 2 7 ARY B1_ODT B1_ODT 4 5 ARY B1_CLK1
B0_CLKN1 1 8 B0CALN B1CALN 1 8 B1_CLKN1
NRSA6AD-200W
B0CALP B1CALP
NRSA6AD-300W
R4096
C19 NC
NRSA6AD-200W
20
R4095
/RAS
/CAS
/CAS
/RAS
GND GND
20
ODT
ODT
R4159
/WE
BA0
BA1
BA1
BA0
/WE
A10
A12
A12
A10
A11
A11
/CS
/CS
NC
NC
BD18V BD18V
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
30
D19 NC
30
R4158
NRSA6AD-300W
K7 L7 K3 L8 K9 L2 L3 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 IC4001 R8 R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8 L3 L2 K9 L8 K3 L7 K7
B1_CALN
R4042 R4043 R4106 R4105
100 100 ASI6101SL 100 100
B1_CALP
B0_CALN
B0_CALP
1005 1005 1005 1005
R4067 R4130
20 20
NRSA6AD-200W
BLUE DRIVER 2/3 NRSA6AD-200W
1/3 =>> SHEET 7
R4066
3/3 =>> SHEET 11
R4129
B0_ODTN
B0_RASN
B0_CASN
B1_CASN
B1_RASN
R4044 R4045 R4108 R4107
B0_AD10
B0_AD12
B1_AD12
B1_AD10
B0_AD11
B1_AD11
B0_WEN
B1_WEN
30
B0_CSN
B1_ODT
B1_CSN
30
B0_AD0
B0_AD1
B0_AD2
B0_AD3
B0_AD4
B0_AD5
B0_AD6
B0_AD7
B0_AD8
B0_AD9
B1_AD9
B1_AD8
B1_AD7
B1_AD6
B1_AD5
B1_AD4
B1_AD3
B1_AD2
B1_AD1
B1_AD0
B0_BA0
B0_BA1
B1_BA1
B1_BA0
100 100 NRSA6AD-300W NRSA6AD-300W 100 100
1005 1005 GND GND 1005 1005
GND GND
DD PWB ASS'Y (10/12)

c10656001a_1201_10/12_0.0
(No.PA040<Rev.001>)2-25 2-26(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (11/12) [RGB DRIVER / GND]
DVCC18V RD18V DVCC18V GD18V DVCC18V BD18V
1.8V/1.4A 1.8V/1.4A 1.8V/1.4A
LC2001 LC3001 LC4001

C2155 C3155 C4155
NQR0415-006X NQR0415-006X NQR0415-006X
47/6.3 47/6.3 47/6.3
1 2 1 2 1 2
3 3 3
C2156 C3156 C4156
0.1 0.1 0.1
IC2001 IC3001 IC4001
1.8V/0.4A
1.8V/0.4A
1.8V/0.4A
ASI6101SL ASI6101SL ASI6101SL
C2170 C3170 C4170
M8 VCC18 GND B2 M8 VCC18 GND B2 M8 VCC18 GND B2
0.1 0.1 0.1
C2171 P2 VCC18 GND B4 C3171 P2 VCC18 GND B4 C4171 P2 VCC18 GND B4
0.1 0.1 0.1
C2172 P8 VCC18 GND B6 C3172 P8 VCC18 GND B6 C4172 P8 VCC18 GND B6
0.1 0.1 0.1
C2173 AA1 VCC18 GND B9 C3173 AA1 VCC18 GND B9 C4173 AA1 VCC18 GND B9
0.1 0.1 0.1
GND B21 GND B21 GND B21
C2174 C3174 C4174

A2 VDDRQ GND C3 A2 VDDRQ GND C3 A2 VDDRQ GND C3
0.1 0.1 0.1
C2175 C3175 C4175
A21 VDDRQ GND C7 A21 VDDRQ GND C7 A21 VDDRQ GND C7
0.1 0.1 0.1
C2176 C3176 C4176
B11 VDDRQ GND C14 B11 VDDRQ GND C14 B11 VDDRQ GND C14
0.1 0.1 0.1
C2177 C3177 C4177
B15 VDDRQ GND C20 B15 VDDRQ GND C20 B15 VDDRQ GND C20
0.1 0.1 0.1
C2178 C3178 C4178
C12 VDDRQ GND D6 C12 VDDRQ GND D6 C12 VDDRQ GND D6
0.1 0.1 0.1
C2179 C3179 C4179
F14 VDDRQ GND D17 F14 VDDRQ GND D17 F14 VDDRQ GND D17
0.1 0.1 0.1
1.8V
1.8V
1.8V
C2180 C3180 C4180
H9 VDDRQ GND E10 H9 VDDRQ GND E10 H9 VDDRQ GND E10
0.1 0.1 0.1
C2181 C3181 C4181
H11 VDDRQ GND E21 H11 VDDRQ GND E21 H11 VDDRQ GND E21
0.1 0.1 0.1
C2182 C3182 C4182
H12 VDDRQ GND F2 H12 VDDRQ GND F2 H12 VDDRQ GND F2
0.1 0.1 0.1
C2183 C3183 C4183
R10 VDDRQ GND F6 R10 VDDRQ GND F6 R10 VDDRQ GND F6
0.1 0.1 0.1
C2184 C3184 C4184
R11 VDDRQ GND G11 R11 VDDRQ GND G11 R11 VDDRQ GND G11
0.1 0.1 0.1
C2185 C3185 C4185
R12 VDDRQ GND G19 R12 VDDRQ GND G19 R12 VDDRQ GND G19
0.1 0.1 0.1
C2186 C3186 C4186
V9 VDDRQ GND H10 V9 VDDRQ GND H10 V9 VDDRQ GND H10
0.1 0.1 0.1
C2187 C3187 C4187
V14 VDDRQ GND H13 V14 VDDRQ GND H13 V14 VDDRQ GND H13
0.1 0.1 0.1
C2188 C3188 C4188
Y4 VDDRQ GND J2 Y4 VDDRQ GND J2 Y4 VDDRQ GND J2
0.1 0.1 0.1
C2189 C3189 C4189
0.1 0.1 0.1
C2190 C3190 C4190
0.1 0.1 0.1
C2191 C3191 C4191
AA12 VDDRQ GND J14 AA12 VDDRQ GND J14 AA12 VDDRQ GND J14
0.1 0.1 0.1
C2192 C3192 C4192
AB2 VDDRQ GND J21 AB2 VDDRQ GND J21 AB2 VDDRQ GND J21
0.1 0.1 0.1
C2193 C3193 C4193
DVCC13V RD13V AB21 VDDRQ GND K5 DVCC13V GD13V AB21 VDDRQ GND K5 DVCC13V BD13V AB21 VDDRQ GND K5
0.1 0.1 0.1
GND K9 GND K9 GND K9
1.3V/1A 1.3V/1A 1.3V/1A 1.3V/1A 1.3V/1A 1.3V/1A
LC2002 GND LC3002 GND LC4002 GND
NQR0415-006X NQR0415-006X NQR0415-006X
1 2 1 2 1 2
GND L10 GND L10 GND L10

3 3 3
C2194 C3194 C4194
C2161 J9 VDD GND L12
0.1 0.1 0.1
47/6.3 C2195 47/6.3 C3195 47/6.3 C4195
C2162 J11 VDD GND L14 C3162 J11 VDD GND L14 C4162 J11 VDD GND L14
0.1 0.1 0.1 0.1 0.1 0.1
C2196 C3196 C4196
J13 VDD GND M2 J13 VDD GND M2 J13 VDD GND M2
0.1 0.1 0.1
C2197 C3197 C4197
K10 VDD GND M9 K10 VDD GND M9 K10 VDD GND M9
0.1 0.1 0.1
C2198 C3198 C4198
GND K12 VDD GND M11 GND K12 VDD GND M11 GND K12 VDD GND M11
0.1 0.1 0.1
C2199 C3199 C4199
K14 VDD GND M13 K14 VDD GND M13 K14 VDD GND M13
0.1 0.1 0.1
C2200 C3200 C4200
L9 VDD GND M21 L9 VDD GND M21 L9 VDD GND M21
0.1 0.1 0.1
C2201 C3201 C4201
L11 VDD GND N5 L11 VDD GND N5 L11 VDD GND N5
0.1 0.1 0.1
C2202 C3202 C4202
L13 VDD GND N10 L13 VDD GND N10 L13 VDD GND N10
0.1 0.1 0.1
GND
GND
GND
C2203 C3203 C4203
M10 VDD GND N12 M10 VDD GND N12 M10 VDD GND N12
0.1 0.1 0.1
To DD PWB (2/12) To DD PWB (2/12)
1.3V
1.3V
1.3V
C2204
0.1
M12 VDD GND N14 To DD PWB (2/12) C3204
0.1
M12 VDD GND N14
C4204
0.1
M12 VDD GND N14
C2205 C3205 C4205

M14 VDD GND P9 M14 VDD GND P9 M14 VDD GND P9
0.1 0.1 0.1
C2206 C3206 C4206
N9 VDD GND P11 N9 VDD GND P11 N9 VDD GND P11
0.1 0.1 0.1
DVCC33V RD33V DVCC33V GD33V DVCC33V BD33V
C2207 C3207 C4207
N11 VDD GND P13 N11 VDD GND P13 N11 VDD GND P13
0.1 0.1 0.1
C2208 C3208 C4208
N13 VDD GND R4 3.3V/0.2A N13 VDD GND R4 3.3V/0.2A N13 VDD GND R4
3.3V/0.2A 0.1 0.1 0.1
C2209 C3209 C4209
P10 VDD GND R8 P10 VDD GND R8 P10 VDD GND R8
LC2003
0.1 LC3003
0.1 LC4003
0.1
C2164 C2210 C3164 C3210 C4164 C4210
NQR0415-006X P12 VDD GND R13 NQR0415-006X P12 VDD GND R13 NQR0415-006X P12 VDD GND R13
0.1 0.1 0.1 0.1 0.1 0.1
1 2 1 2 1 2
C2211 C3211 C4211
P14 VDD GND R15 P14 VDD GND R15 P14 VDD GND R15
0.1 0.1 0.1
3 3 3
GND R19 GND R19 GND R19
C2163 C3163 C4163
2
2
47/6.3 GND U2 47/6.3 GND U2 47/6.3 GND U2
GND GND GND
LC2004
LC3004
LC4004
NQR0415-006X
NQR0415-006X
NQR0415-006X
3
3
3.3V/0.1A GND U6 3.3V/0.1A GND U6 3.3V/0.1A GND U6
1
1
GND U11 GND U11 GND U11
C2212 C3212 C4212

B22 VCC GND U15 B22 VCC GND U15 B22 VCC GND U15
ASIPWR25 0.1 0.1 0.1
ASIPWR25 ASIPWR25
C2213 C3213 C4213
D20 VCC GND U21 D20 VCC GND U21 D20 VCC GND U21
0.1 0.1 0.1
C2214 C3214 C4214
G12 VCC GND V17 G12 VCC GND V17 G12 VCC GND V17
0.1 0.1 0.1
1 2 3 C2215 1 2 3 C3215 1 2 3 C4215
J18 VCC GND V19 J18 VCC GND V19 J18 VCC GND V19
0.1 0.1 0.1
CE
GND
NC
NC
NC
C2216 C3216 C4216
CE
CE
GND
GND
K15 VCC GND W8 K15 VCC GND W8 K15 VCC GND W8
0.1 0.1 0.1
C2217 C3217 C4217
R1170H251B-X
R1170H251B-X
R1170H251B-X
SOT89-5
SOT89-5
SOT89-5
K16 VCC GND W12 K16 VCC GND W12 K16 VCC GND W12
IC2011
IC3011
IC4011
0.1 0.1 0.1
C2218 C3218 C4218
L15 VCC GND Y3 VCC GND Y3 VCC GND Y3
OUT
VDD
L15
OUT
VDD
L15
0.1 0.1 0.1
OUT
VDD
C2219 C3219 C4219

L20 VCC GND Y20 L20 VCC GND Y20 L20 VCC GND Y20
0.1 0.1 0.1
3.3V
3.3V
3.3V
5 4 C2220 5 4 C3220 5 4 C4220
M15 VCC GND AA2 M15 VCC GND AA2 M15 VCC GND AA2
C2166 0.1 C3166 0.1 C4166 0.1
0.1 C2221 0.1 C3221 0.1 C4221
N8 VCC GND AA6 N8 VCC GND AA6 N8 VCC GND AA6
0.1 0.1 0.1
C2222 C3222 C4222
P15 VCC GND AA9 P15 VCC GND AA9 P15 VCC GND AA9
0.1 0.1 0.1
C2223 C3223 C4223
P20 VCC GND AA14 P20 VCC GND AA14 P20 VCC GND AA14
0.1 0.1 0.1
C2224 C3224 C4224
T11 VCC GND AA17 T11 VCC GND AA17 T11 VCC GND AA17
0.1 0.1 0.1
C2167 C3167 C4167
C2225 C3225 C4225
10 T15 VCC GND AA21 10 T15 VCC GND AA21 10 T15 VCC GND AA21
NCB20JK-106X 0.1 NCB20JK-106X 0.1 NCB20JK-106X 0.1
C2168 C2226 C3168 C3226 C4168 C4226
T18 VCC T18 VCC T18 VCC
0.1 0.1 0.1 0.1 0.1 0.1
C2227 C3227 C4227
RD25V AA22 VCC GD25V AA22 VCC BD25V AA22 VCC
0.1 0.1 0.1
C2169 C3169 C4169
47/6.3 47/6.3 47/6.3
2.5V/0.5A 2.5V/0.5A 2.5V/0.5A
GND GND GND
2.5V/0.2A 2.5V/0.2A 2.5V/0.2A
C2228 C3228 C4228

0.1 GND SCAN R16
0.1 GND SCAN R16
0.1 GND SCAN R16
B1 VLCD B1 VLCD B1 VLCD
GND SCAN R17 GND SCAN R17 GND SCAN R17
C2229 C3229 C4229
E5 VLCD E5 VLCD E5 VLCD
0.1 0.1 0.1
C2230 C3230 C4230
K2006 GND J6 VLCD K3006 GND J6 VLCD K4006 GND J6 VLCD
NQR0499-001X
0.1 NQR0499-001X
0.1 NQR0499-001X
0.1
C2231 C3231 C4231
2.5V
2.5V
2.5V
K8 VLCD K8 VLCD K8 VLCD
0.1 0.1 0.1
C2232 GND C3232 GND C4232 GND
L3 VLCD L3 VLCD L3 VLCD
0.1 0.1 0.1
C2233 C3233 C4233
L8 VLCD L8 VLCD L8 VLCD
0.1 0.1 0.1
L6 VCCA8 L6 VCCA8 L6 VCCA8
M7 VCCA7 M7 VCCA7 M7 VCCA7
T7 VCCA5 T7 VCCA5 T7 VCCA5
L16 VCCA4 L16 VCCA4 L16 VCCA4

PLL 2.5V
PLL 2.5V
PLL 2.5V
R2205 100 1005 R3205 100 1005 R4205 100 1005
R2204 100 1005 R3204 100 1005 R4204 100 1005
R2203 100 1005 R3203 100 1005 R4203 100 1005
G7 VCCA1 G7 VCCA1 G7 VCCA1
N7 VSSA8 N7 VSSA8 N7 VSSA8
L7 VSSA7 L7 VSSA7 L7 VSSA7

0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
NBZ0010-396X
39/16
39/16
39/16
39/16
39/16
39/16
39/16
39/16
39/16
C2254
C2256
C2258
C3254
C3256
C3258
C4254
C4256
C4258
C2255
C2257
C2259
C3255
C3257
C3259
C4255
C4257
C4259
T8 VSSA5 T8 VSSA5 T8 VSSA5
L17 VSSA2 L17 VSSA2 L17 VSSA2
G8 VSSA1 G8 VSSA1 G8 VSSA1
IC2001 IC3001 IC4001

ASI6101SL ASI6101SL ASI6101SL
RED DRIVER 3/3 GREEN DRIVER 3/3 BLUE DRIVER 3/3
1/3 =>> SHEET 5 1/3 =>> SHEET 6 1/3 =>> SHEET 7
2/3 =>> SHEET 8 2/3 =>> SHEET 9 2/3 =>> SHEET 10

c10656001a_1201_11/12_0.0
(No.PA040<Rev.001>)2-27 2-28(No.PA040<Rev.001>)
DD PWB CIRCUIT DIAGRAM (12/12) [MAIN POWER]
P12V
DVCC33V
P12V N8V
3.3V/2.5A
Q6013 8 7 6 5
PWR R6017 R6019 UPA2706GR-X
12V/3.0A -8V/0.1A
18k OPEN
D
0.5%
R6011 R6012 R6043 0
47k 47k
R6014
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
C6035
C6036
C6037
C6038
10
10
10
10
CN6001 47k
S G R6042 0
QGA2013C1-08W
BM08B-PASS-TFT(LF)(SN) R6018 C6024
IC6004 1 2 3 4
OPEN
K6001 NQR0499-001X Q6011 3.3k MB39A136PFT-X R6041 0
C6031
P12V 1 0.5%
RT1N141U-X C6022 0.1
K6002 NQR0499-001X DRC9114E-X 0.047 NCB31HK-104X
P12V 2 DTC114EE-X NCB31HK-473X 1 2 R6040 0
R6032 4.7
24
1
K6003 NQR0499-001X CTL1 CB1
To DD SUB PWB (4/4) P12V 3

R6033 2.2 R6038 L6001
23
2
CS1 DRVH1
4.7 8 7 6 5 NQLF3EN-3R6X
GND 4
CN6002 Q6005 C6023 330p 3.6u
22
3
RT1N141U-X FB1 LX1
R6015 NCB31HK-331X D
GND 5 DRC9114E-X R6020 R6016 180k
5.6k DRVL1
39k
21
4
DTC114EE-X COMP1
ON OFF R6013 0.5% C6029 0.1 D6002 C6030
GND 6 0.5%
1k
NCB31HK-471X
NCB31HK-104X DB2S310-X 2.2
NEX60GM-337X
NEX60GM-337X
20
5
K6004 NQR0499-001X ILIM1 VCC
To DD PWB (2/12) DD_P_ON R6021 R6022 NCB11CK-225X S
NCB31HK-102X
Q6014
C6033
N8V 7 G
56k
C6039
C6040
C6041
0.5% 100k 0.5%
470p
0.001
330/4
330/4
UPA2706GR-X
19
6
RT VB
R6024 1 2 3 4 OS OS
GND 8 Q6012 C6025 0.1
47k
18
7
RT1N141U-X VREF GND
DRC9114E-X NCB31HK-104X
R6034
17
8
DTC114EE-X CTL2 DRVL2
C6045 R6026 D6003 2.2
OPEN 0.5%
56k
R6036 DB2S310-X
16
9
ILIM2 LX2
R6025 2.2
Q6006 39k DRVH2 DVCC12V
10
15
1 1 1 COMP2
2 RT1N141U-X 0.5% R6027 180k
DRC9114E-X
14
11
FB2 CB2
2 2 2 DTC114EE-X R6028 C6027 1.2V/2.5A
1 R6023 R6035
1k 15k 330p GND
12
13
CS2 MODE 4.7 8 7 6 5
0.5% R6029 NCB31HK-331X
1k C6032
C6028 0.1 D
0.5%
OPEN
NCB31HK-104X
R6047 0
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
C6047
C6048
C6049
C6050
10
10
10
10
R6030
OPEN
C6046
10k S G R6046 0
UPA2706GR-X
R6031
C6001 C6002 C6003 C6004 C6005 C6006 C6007 C6008 0.5%
OPEN
330p 10/16 330p 10/16 330p 10/16 330p 10/16 C6026 1 2 3 4
/50 /50 /50 /50 0.047 R6045 0
Q6015
NCB31HK-473X
GND 1 2 R6044 0
L6002
8 7 6 5 NQLF3EN-3R6X
GND 3.6u
D
R6039
4.7
NEX60GM-337X
NEX60GM-337X
NCB31HK-102X
S G Q6016
C6042
C6043
C6044
0.001
330/4
330/4
C6034 UPA2706GR-X
470p 1 2 3 4 OS OS
ON OFF NCB31HK-471X
To DD PWB (2/12) LCD_EN

R6037
2.2
P12V
GND
C6012
0.1
R6005 NCB31HK-104X
10k
N8V
C6011 R6002 R6003 R6004

0.001 1k 1k 1k Q6002
-8V/0.1A NCB31HK-102X
2SA1774/QR/-X R6006
DSA9001/R/-X 10k
2SA1989/QR/-X
R6001 R6007
3.3k 1k
Q6001
2SD1664/QR/-W
D6001
RKS801KF-X Q6003 P12V
C6009
RT1N141U-X C6013
47/16
DRC9114E-X OPEN
C6010
DTC114EE-X
0.1
NCB31HK-104X
IC6003
NJM79M05DL1A-X
GND
DVCC18V
COMMON
N5V
OUT
1.8V/5A
IN
Q6019 8 7 6 5
1 2 3 -5V/0.1A R6075 R6077 UPA2706GR-X
15k OPEN
D
0.5%
R6106 R6107 R6101 0
47k 47k
R6072
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
C6071
C6072
C6073
C6074
10
10
10
10
47k
S G R6100 0
C6020
47/16 R6076 C6060
C6017 C6018 IC6005 1 2 3 4
C6021 OPEN
Q6017 1.2k MB39A136PFT-X R6099 0
4.7/25 OPEN 0.1 0.5% C6067
RT1N141U-X C6058 0.1
DRC9114E-X 0.047 NCB31HK-104X
DTC114EE-X NCB31HK-473X
R6090 4.7 1 2 R6098 0
24
1
CTL1 CB1
R6091 2.2 R6096 L6003
23
2
CS1 DRVH1
C6019 4.7 8 7 6 5 NQLF3EN-3R6X
0.1 Q6007 C6059 330p 3.6u
22
3
RT1N141U-X FB1 LX1
NCB31HK-104X R6073 NCB31HK-331X
R6078 D
GND
DRC9114E-X R6074 180k DRVL1
10k 39k
21
4
DTC114EE-X COMP1
R6071 0.5% C6065 0.1 D6004 C6066
0.5%
ON OFF 1k
NCB31HK-471X
NCB31HK-104X DB2S310-X 2.2
NEX60GM-337X
NEX60GM-337X
20
5
ILIM1 VCC
ASIPWR18 R6080 NCB11CK-225X S
NCB31HK-102X
R6079 Q6020
C6069
G
IC6006 56k
C6075
C6076
C6077
100k 0.5%
470p
0.5%
0.001
330/4
330/4
UPA2706GR-X
19
6
RT VB
PQ200WNA1Z-X R6082 1 2 3 4 OS OS
Q6018 47k C6061 0.1
P12V
18
P9V
7
RT1N141U-X VREF GND
DRC9114E-X NCB31HK-104X
R6092
17
8
DTC114EE-X CTL2 DRVL2
9V/0.1A C6081 R6084 D6005 2.2
56k
To DD PWB OPEN 0.5% R6094 DB2S310-X
16
9
ILIM2 LX2
R6083 2.2
DVCC33V DRVH2
39k
(2/12) Q6008 DVCC13V
10
15
VOUT
COMP2
0.5% 180k
GND
RT1N141U-X R6085
CTL
ADJ
VIN
DVCC33V
DRC9114E-X
14
11
FB2 CB2
DTC114EE-X R6086 C6063 1.3V/3A
R6081 R6093
1 2 3 4 5 15k 330p GND
1k
12
13
ON OFF CS2 MODE 4.7 8 7 6 5
0.5% R6087 NCB31HK-331X
ASIPWR13
3.3k C6068
C6064 0.1 D
IC6007 0.5%
TC7SZ125FU-X
OPEN
NCB31HK-104X
R6105 0
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
NCJ11EK-106X-A
C6083
C6084
C6085
C6086
R6061
10
10
10
10
R6088
OPEN
C6082
3.3k 10k S G R6104 0
UPA2706GR-X
R6089
0.5%
3
GND OUT Y OPEN

C6062 1 2 3 4
0.047
1.8k
R6103 0
Q6021
0.5%
R6064
2
IN A NCB31HK-473X
1
G VCC
1 2 R6102 0
Q6004
RT1N141U-X C6056 L6004
1.8k
C6054 C6055
0.5%
C6057
R6065
DRC9114E-X
10/16 0.1 47/16 0.1 8 7 6 5 NQLF3EN-3R6X
R6062 DTC114EE-X 3.6u
NCB31HK-104X NCB31HK-104X GND
1k C6052
D
0.1 R6097
4.7
NEX60GM-337X
NEX60GM-337X
NCB31HK-102X
S G Q6022
C6078
C6079
C6080
R6066
0.001
330/4
330/4
C6053 C6070 UPA2706GR-X
1.5k 470p
OPEN 1 2 3 4 OS OS
0.5%
NCB31HK-471X
R6095
2.2
GND
GND

c10656001a_1201_12/12_0.0
(No.PA040<Rev.001>)2-29 2-30(No.PA040<Rev.001>)
DD SUB PWB CIRCUIT DIAGRAM (1/4) [DC_FAN]
12V
IC5301
PQ200WNA1Z-X
VC(ON/OFF)
VOUT
VADJ
FAN_2
GND
VIN
1 2 3 4 5
φ#/#: CN5301
DD SUB PWB ASS'Y (1/4)

QGA2001C6-03X
K5301 *K2
1 VCC
K5302 *K1
2 LOCK
R5301 0.5A MAX
C5301 3.9k 3 GND
10 _0.5%
2
STZ6.8N-X
D5301
SC-59
C5312
1
330p
R5302 C5303 C5304
2.2k 0.1 47/16
_0.5%
C5311
330p
5V Address = 0x9E
R5303
IC5101 ǡ
M62339FP-W
R5115 2.2k _0.5%
1
VCC AO1
R5111 ǡ R5116 2.2k _0.5%
To DD SUB PWB (2/3),(3/4)
2
SCL SCL AO2
R5112 ǡ
SDA
R5117 2.2k _0.5%
3
SDA AO3
IC5401
PQ200WNA1Z-X
VC(ON/OFF)
C5109
0.1
4
FAN_ON GND AO4
VOUT
VADJ
FAN_4
GND
VIN
FAN_LOCK
1 2 3 4 5
φ#/#: CN5401
QGA2001C6-03X
To DD SUB PWB (3/4) LAMP_CVR
LAMP_RTN
K5401
K5402
*K2
*K1
1 VCC
2 LOCK
R5401 0.5A MAX
C5401 3.9k 3 GND
10 _0.5%
2
LAMP_ON
STZ6.8N-X
D5401
LAMP_WATT
SC-59
C5105 C5106 C5107 C5108 C5412
C5101 C5102 C5104
1
0.1 0.1 0.1 OPEN 330p
0.1 0.1 22/6.3 R5402 C5403 C5404
2.2k 0.1 47/16
_0.5%
CPU C5411
330p
Signal Low High
FAN_ON ON OFF
FAN_LOCK OK NG R5403
ǡ
LAMP_CVR OK NG
LAMP_RTN OK NG
LAMP_ON ON OFF
LAMP_WATT HIGH LOW
IC5501
PQ200WNA1Z-X
VC(ON/OFF)
FAN_7
VOUT
VADJ
GND
VIN
1 2 3 4 5
φ#/#: CN5501
QGA2001C6-05X
K5501 *K2
1 VCC
K5502 *K1
2 LOCK
0.5A MAX
Address = 0x98 R5501
C5501 3.9k 3 GND
10 _0.5%
2
IC5102
4 NC
M62334FP-W
STZ6.8N-X
5 NC
D5501
R5118 2.2k _0.5%
SC-59
1
VCC AO1 C5512
1
330p
R5502 C5503 C5504
2.2k 0.1 47/16
R5113 ǡ R5119 2.2k _0.5%
_0.5%
2
SCL AO2 C5511
330p
R5114 ǡ R5120 2.2k _0.5%
3
SDA AO3 R5503
ǡ
4
GND AO4
C5114
0.1
CVR_SW
IC5601
CN5005
PQ200WNA1Z-X
QGA1217C2-03X
VC(ON/OFF)
GND 1
FAN_6
VOUT
VADJ
GND
To LANP DOOR K5122 *K1
VIN
CVR_SW 2
GND 3 1 2 3 4 5
C5110 C5111 C5112 C5113
0.1 0.1 0.1 OPEN φ#/#: CN5601
QGA1501C5-03W
K5601 *K2
1 VCC
K5602 *K1
2 LOCK
R5601 0.5A MAX
C5172 C5601 3.9k 3 GND
330p 10 _0.5%
2
5V
STZ6.8N-X
D5601
SC-59
C5612
1
330p
R5602 C5603 C5604
2.2k 0.1 47/16
_0.5%
C5611
ON 330p
R5219
R5217
4.7k
OPEN R5603
OFF OFF ǡ
Q5203
RT1N141U-X
PWM_FAN_ON
R5218 100
OFF OFF
IC5701
PQ200WNA1Z-X
VC(ON/OFF)
ON
To DD SUB PWB (2/4)
VOUT
VADJ
GND
FAN_3
VIN
1 2 3 4 5
φ#/#: CN5701
QGA2001C6-05X
K5701 *K2
R5201 R5202 R5203 R5204 R5205 R5206 1 VCC
4.7k 4.7k 4.7k 4.7k 4.7k 4.7k K5702 *K1
BALLAST 5V 2 LOCK
C5701 R5701 0.5A MAX
10 3.9k 3 GND
_0.5%
4 NC
R5214
OPEN
2
CN5006 5 NC
QGA1217C2-05X
K5131 *K1 STZ6.8N-X
FLAG_OC 1 R5213 D5701
R5216 100 Q5202 4.7k R5702 C5703 C5704 SC-59
FLAG_OE 2 C5712
2.2k
To BALLAST PWB RT1N141U-X 0.1 47/16
1
330p
K5133 *K2 _0.5%
5V 3
CN2 ON/OFF 4
K5134 *K1 L H TP5003
C5711
330p
K5135 *K1 Unlock Lock Q5201
WATTAGE 5 R5703
RT1N141U-X R5211
D5201 ǡ
ǡ
RKS801KF-X
D5202
RKS801KF-X
D5203
RKS801KF-X
R5212
OPEN
R5215
C5181 C5183 C5185 C5186 C5187
ǡ
330p 330p 330p 0.1 22/6.3 D5204
C5184 RKS801KF-X
IC5901
330p
PQ200WNA1Z-X
VC(ON/OFF)
D5205
RKS801KF-X
FAN_5
VOUT
VADJ
GND
VIN
D5206
RKS801KF-X 1 2 3 4 5
φ#/#: CN5901
D5207 QGA2001C6-03X
RKS801KF-X K5901 *K2
PWM_FAN_LOCK 1 VCC
K5902 *K1
2 LOCK
0.5A MAX
C5901 R5901
GND 10 3.9k 3 GND
_0.5%
2
STZ6.8N-X
D5901
SC-59
C5912
1
330p
R5902 C5903 C5904
2.2k 0.1 47/16
_0.5%
C5911
330p
To DD SUB PWB (3/4) R5903

ǡ
GND
c10664001a_1201_1/4_0.0
(No.PA040<Rev.001>)2-31 2-32(No.PA040<Rev.001>)
DD SUB PWB CIRCUIT DIAGRAM (2/4) [I/F TEMP PWM_FAN]
5V
PWM FAN DRIVER

DD_SDA
IC5013
R5085 OPEN R5082
OPEN OPEN 3.3V
To DD SUB PWB (3/4) Address = 0x5E
1
VCC NC
2
OUT2 OUT1
3
IN2 IN1 DD_SCL
R5089 R5087 IC5802
R5808
R5810
1k
1k
5
4
OPEN NC GND OPEN EMC2301-X
R5088 R5086
OPEN OPEN R5806 R5804
DD PWB ǡ ǡ
To DD SUB PWB (3/4)
R5084
R5083
ǡ
8
PWM_SDA SMDATA ALERT# /ALERT
ǡ
C5017
0.1
To DD SUB PWB (3/4) R5807
ǡ
GND
7
PWM_SCL SMCLK CLK
R5809
1k
CN5003
QGA1009C1-30W
6
VDD TACH TACH
K5012 *K1
2
C5051 C5052
K5013
*K1 2
C5802
0.1 (F)
3
5
STZ6.8N-X GND PWM PWM
OPEN OPEN 1
D5009
4 CONFIG_3.3V
3
5 TCK
K5014 *K1
6 TMS R5805
7
K5015 *K1
TDI
(A) 10k
K5016 *K1
8 TDO
K5017 *K1
GND
9
C5053 C5054 C5055 C5056 C5057 K5018
OPEN OPEN OPEN OPEN OPEN *K2
10
11 PROGRAM_B_2
*K1
12
K5019
SYS_RST_N
To DD SUB PWB (3/4) 12V
K5020 *K1
13
K5021 *K1
DD_VSYNC
(B)
14
K5024 *K1
IRQ0_TO_DD To DD SUB PWB (3/4) IC5801
PQ200WNA1Z-X
To DD PWB (2/12)
15 DONE_2
(C)
VC(ON/OFF)
K5023 *K1
16
C5058 C5059 C5060 C5062 C5063
CN1005
VOUT
VADJ
FAN_1(PWM)
GND
OPEN OPEN OPEN OPEN OPEN
VIN
17
18 5V 1 2 3 4 5
19 DD_PWR
*K1
11V
K5025
CN5801
20 ASIPWR25 QGA1501C5-04W
K5026 *K1
K5801 *K2 11V
21
K5027 *K1
ASIPWR18
To DD SUB PWB (1/4) PWM_FAN_ON
R5801
1 VCC
22 ASIPWR13 IC5011 2 GND

K5028 *K1 C5801 8.2k
TC74VHCT08AFT-X K5802 *K1
23 10 _0.5%
TACH 3 TACH
24
(F) PWM
K5803 *K1
4 PWM
(B)
14
C5064 C5065 C5066 C5067
1
DD_VSYNC 1A VCC
25 OPEN OPEN OPEN OPEN
13
R5802
2
1B 4B
2
26 LVDS_OE 2.2k
R5069 ǡ
K5041 *K1
To DD SUB PWB (3/4) (D) _0.5%
12
3
DDVSYNC 1Y 4A EMU_DONE
27 LCD_EN STZ6.8N-X
ǡ C5803 C5804
K5029 *K1
(E)
R5072
To DD SUB PWB (3/4) R5803 D5801
11
4
MISOA_FROM_VEL 2A 4Y EMUDONE 0.1 47/16
390 SC-59
28 ASI_RST C5813
K5030 *K1 _0.5%
10
5
2B 3B
1
330p
29 EMU_RST
R5070 ǡ
K5031 *K1
To DD SUB PWB (3/4) (C)
9
MISOA 2Y 3A DONE_2
30 EMU_DONE
*K1 R5071 ǡ C5811 C5812
K5032
To DD SUB PWB (3/4)
8
GND 3Y CONFIG_DONE 330p 330p
GND
C5080 C5068 C5069 C5070 C5071 C5021

OPEN OPEN OPEN OPEN OPEN 0.1
GND To DD SUB PWB (3/4)
GND
MD PWB
CN5008
QGA1217F1-10X
SCL
1
K5039 *K1
LVDS_EN_VEL
To DD SUB PWB (1/3),(3/4) SDA
2 VEL_PON_1
K5040 *K1
3
To DD SUB PWB (3/4)
4 VEL_PON_0
K5042 *K1
To MD PWB (1/6) 5
C5078 C5079 C5081
CN5001 6
OPEN OPEN OPEN
7 SSA
K5043 *K1 5V 5V
5V
8
K5044 *K1
MISOA_FROM_VEL
(E) To DD SUB PWB (3/4) K5010 K5009 K5048 K5047
2
9 MOSIA *K1 *K1 *K1 *K1
K5045 *K1 K5011 K5049
*K2 *K2
10 SCLKA STZ6.8N-X STZ6.8N-X
K5046 *K1 R5110
D5008 D5007
3
10k R5104 R5106 R5108

OPEN 4.7k OPEN
R5103 OPEN
1
C5019 C5018 C5045 C5044
OPEN OPEN OPEN OPEN
1
C5016 R5101 ǡ C5043

C5082 C5083 C5084 C5085 STZ6.8N-X STZ6.8N-X
8
0.1 SDA VDD 0.1
OPEN OPEN OPEN OPEN D5013 D5014
R5102 ǡ
7
SCL A0
GND
6
O.S. A1
5
GND A2
C5020 C5046
330p 330p
/50 /50
GND IC5103 C5115 GND
MM3286DF-X 0.1
R5105 R5107 R5109

4.7k OPEN 4.7k
CN5002
GND Address = 0x94
QGA1217C2-04X
TO CN5001
5V_TEMP
SDA_TEMP
SCL_TEMP
4
1
5V
SDA
SCL
GND
FPGA_CONFIG CONFIG_3.3V
To TEMP SENSOR PWB To DD SUB PWB (3/4)

CN5004
CN1
QGA1501F4-08W
1 TCK
K5033 *K1
5V
2 TMS
*K1
3
K5034
TDI
(A)
K5035 *K1
4
*K1
TDO TEMP BOARD TEMP TEMP(TERMINAL PB)
K5036
R5047
To JIG CONNECTOR 5
K5037 *K2
4.7k
7
K5038 *K1
FPGA_W_SEL
To DD SUB PWB (3/4)
3
8
1

C5072 C5073 C5074 C5075 C5076 C5077 STZ6.8N-X STZ6.8N-X STZ6.8N-X
OPEN OPEN OPEN OPEN OPEN OPEN D5010 D5011 D5012
GND
c10664001a_1201_2/4_0.0
(No.PA040<Rev.001>)2-33 2-34(No.PA040<Rev.001>)
DD SUB PWB CIRCUIT DIAGRAM (3/4) [CPU]
5V EEPROM 5V
5V 3.3V
Address = 0xA0
Address = 0xA2
LED
IC5005 IC5006
OPEN
R5055
OPEN
R5056
OPEN
R5057
C5037 R1EX24512ASAS-X C5038 R1EX24512ASAS-X
300
300
120
0.1 0.1
8
A0 VCC A0 VCC
7
A1 WP A1 WP
6
NC SCL NC SCL
SYNC
ERR
3.3V
4
5
VSS SDA VSS SDA
D5002
D5003
OPEN
OPEN
D5001
OPEN
RED
GREEN
ORANGE
GND 5V GND 5V
Address = 0xA4 Address = 0xA6
5V
TP5001 TP5002 ERR_LED

IC5002
TC7SZ07AFE-X
C5039
IC5007
R1EX24512ASAS-X C5040
IC5008
R1EX24512ASAS-X
SON5-P-0.50 (G) GND
R5051 SYNC_LED
0.1 0.1
4.7k
NC
5
VCC
8
A0 VCC A0 VCC IN
R5053
2
100
7
A1 WP A1 WP
GND
4
5V 3.3V 5V GND
OUT
6
NC SCL NC SCL
5
VSS SDA VSS SDA
C5034
0.1
OPEN
OPEN
OPEN
4.7k
4.7k
4.7k
4.7k
L H GND
GND GND I2C_SEL PC CPU

5V
WP1 Normal_OP. W-Protect
IC5003
TC7SZ07AFE-X
R5059
R5058
R5040
R5001
R5022
R5021
R5038
SON5-P-0.50
R5050
4.7k
WP1 R5060 100
NC Signal Low High
5
VCC
IN LAMP_ON ON OFF
ASI_RST R5054
2
100 LAMP_WATT HIGH LOW
5V
EMU_RST
To DD SUB PWB (2/4) LAMP_RTN OK NG
4
GND
OUT
R5092 100 LAMP_CVR OK NG
DD_SDA
FAN_LOCK OK NG
I2C_SEL R5012 100
DD_SCL C5035 FAN_ON ON OFF
1
0.1
RA5034
3.3V 5V 4.7k GND LAMP_ON
LAMPWATT
I2C_SEL2
EMU_RST
ASI_RST
LAMPON
LAMP_WATT
8
FAN_ON
LAMP_RTN
FAN_ON To DD SUB PWB (1/4)
LAMP_RTN
5
C5013
22/6.3 LAMP_CVR
RA5002 LAMP_CVR
OPEN
5V C5014
GND 0.1
4
33 32 31 30 29 28 27 26 25 24 23
R5018 Balanced_Circuit
3.3k
P0.4
P0.5
P0.6
P0.7
EA
NIC
ALE/PROG
PSEN
P2.7
P2.6
P2.5
PROGRAM_B_2
IRQ0_TO_DD C5012
34 P0.3 P2.4 22 X5001
R5017
OPEN
NDC31HJ-180X
Q5003 R5036 NAX1098-001X
5V 18p
INK0001AM1-X 35 P0.2 P2.3 21 ǡ 24MHz
3
SYS_RST_N
36 P0.1 P2.2 20
LVDS_OE 2 1
5V 37 P0.0 P2.1 19
5
2
R5037
RA5022 38 VCC P2.0 18 1M
1 3 4
4.7k
39 NIC IC5001 NIC 17
AT89C51RD2RLTUM
40 P1.0 VSS 16 R5035 C5011
4
R5068
10k I2C_SDA1 ǡ NDC31HJ-180X
41 P1.1/SS XTAL1 15 18p
I2C_SCL2
R5067 42 P1.2 XTAL2 14
10k I2C_SDA2 GND
43 P1.3 P3.7 13
I2C_SCL1
44 P1.4 P3.6 12
P1.5/MISO
P1.7/MOSI
R5066
ǡ
P1.6/SCK
R5065
P3.0/RxD
P3.1/TxD
ǡ
To DD SUB PWB (4/4) P_ON_L
P3.2
P3.3
P3.4
P3.5
RST
NIC
RA5023
R5014
C5041 IC5009
10k
100 1 2 3 4 5 6 7 8 9 10 11
0.1 TC74HC4053AFT-X
R5015
5V
10k
8
5V GND
16
1
1Y VCC R5052
R5064 OPEN 4.7k FAN
CN5009
15
2
0Y Y-COM
QGA1501C5-03W
R5063 OPEN
14
3
1Z X-COM
R5030 100
FAN 1
13
4
Z-COM 1X
To DD SUB PWB R5019 100
8
CVR 2
12
5
0Z 0X
JIG / TEMP
(2/4) RA5020
OPEN GND 3
11
6
INH A
CVR
10
R5003
7
C5009 VEE B
5V
1
0.1 ǡ GND
8
GND C
CN5001 VEL_SS
QGA1217C2-15X
CONFIG_DONE
LVDS_EN_VEL
FPGA_W_SEL
MISO
GND 1
SYNC_LED
FAN_LOCK
EMUDONE
DDVSYNC
ERR_LED
330p
330p
SCK
C5001
C5002
OPEN
OPEN
C5003
C5004
R5061
R5062
OPEN
OPEN
SCL 2 SCL_TEMP
/50
/50
1
MOSI
RXD
TXD
SDA_TEMP GND
SDA 3 GND
100
R5007
RA5082
5V
5V 4 5V_TEMP 4.7k
R5004 ǡ
SCL 5 K5001 *K1
8
R5005 ǡ
4
SDA 6 K5002 *K1
C5010
IIC_SEL 7 K5003 *K1
R5006 100
RA5021 10/16 LVDS_EN_VEL
To DD SUB PWB (2/4)
To PROCESSOR PWB GND 8
100
ERR_LED
(G)
5
P_ON_L 9 SYNC_LED
100
100
R5024
R5025
K5004 *K1
To DD SUB PWB (1/4)
R5027
FAN_LOCK
1k
GND 10
5V 11 FPGA_W_SEL
K5005 *K2
TXD 12 CONFIG_DONE
K5006 *K1
GND EMUDONE
RXD 13 K5007 *K1
DL_CTL 14 DDVSYNC
K5008 *K1
3
3
2
NC 15 LVDS_OE
D5004 D5006
STZ6.8N-X
SC-59
STZ6.8N-X
SC-59
SYS_RST_N To DD SUB PWB (2/4)
IRQ0_TO_DD
330p
330p
330p
330p
C5005
C5006
C5007
C5008
1
/50
/50
/50
/50
PROGRAM_B_2
SSA
D5005
STZ6.8N-X MISOA
SC-59
5V
SCLKA
GND MOSIA
IC5010
5V BA8274F-X R5074
470
R5077
470
8
VCC NC
7
OUT2 OUT1
SDA SCL
Q5002 Q5001
6
IN2 IN1
INK0001AM1-X INK0001AM1-X
2
NC GND
R5011
R5009
3.3k
R5076
R5075
3.3k
OPEN
OPEN
C5042
0.1
3
I/O EXPANDER
GND
R5008 OPEN
Address = 0x70
R5010 OPEN
5V
IC5012
M62320GP1-X
SDA
3.3V SDA
16
1
S0 CS0
Q5005
SCL R5045 ǡ
INK0001AM1-X SCL
15
2
1 SCL SCL CS1
R5046 ǡ
14
3
SDA SDA CS2
R5080
OPEN
13
4
VEL_PON_0 D0 VDD
DC_FAN / TEMP / IO_EXPANDER
To DD SUB PWB (2/4) LCD_EN
12
5
3 VEL_PON_1 D1 D7
R5081
To DD SUB PWB (4/4) ASIPWR13
To DD SUB PWB (2/4)
11
6
PON_33 D2 D6
3.3k
SDA
PWM_SDA
To DD SUB PWB (2/4) ASIPWR18
10
7
DD_PWR D3 D5
ASIPWR25
9
GND D4
SCL
Q5004
INK0001AM1-X
PWM_SCL
To DD SUB PWB (2/4)
1 C5015
22
R5078
OPEN
/ALERT
2 NCJ11CM-226X-R
C5049
0.1
GND
3 5V
IC5004
R5079
TC7SET04FU-X
PWM_FAN
3.3k
5
VCC NC

2
IN A
R5073 OPEN
To DD SUB PWB (1/4)
4
PWM_FAN_LOCK OUT Y GND
C5086
0.1
GND
c10664001a_1201_3/4_0.0
(No.PA040<Rev.001>)2-35 2-36(No.PA040<Rev.001>)
DD SUB PWB CIRCUIT DIAGRAM (4/4) [POWER]
12V -8V
-8V 12V
CN6001 CN6002
QGA2013C1-08W QGA2013C1-10W
K6001 *K2 K6006 *K2
12V 1 1 12V
K6002 *K2 K6007 *K2
12V 2 2 12V
K6003 *K2 K6008 *K2
12V 3 3 12V
GND 4 4 GND To DD PWB (12/12)

To POWER PWB GND 5 5 GND CN6001
CN201 C6010
0.1
GND 6 6 GND
K6004 *K2 K6009 *K2
-8V 7 7 -8V
GND 8 8 GND
K6010 *K2
9 12V To MD PWB (6/6)
10 GND CN8001
C6001 C6003 C6005 C6007
330p 330p 330p 330p
C6011 C6013 C6015 C6017 C6019

GND 330p 330p 330p 330p 330p
/50 /50 /50 /50 /50
GND
12V
5V
R6001 ON OFF
Q6001
33k
RT1N141U-X R6018
1k
P_ON_L To DD SUB PWB (3/4)
5V
C6053
R6002 C6049 10
0.01
10k
R6028
R6031
C6021 10k C6048 0.1
10k
0.033 Q6003
ON OFF R6032 RT1N141U-X
GND 8 7 6 5 Q6002
IC6001 1k
R6030 RT1N141U-X R6029 10k
NR885K-X 1k
SS
EN
NC
FB
To DD SUB PWB (3/4) PON_33

ON OFF
5 6 7 8
K6011 K6012 IC6003
9
*K2 *K2 C6047 MM1663DH-X
CONT
NC
NC
VIN
C6046
OPEN 0.1
GND
SW
BS
IN
9
1 2 3 4 GND
VOUT
GND
CN
NC
R6017 4 3 2 1
C6030
ǡ
0.001
R6012
R6014
10 C6050
10
L6001 0.1 3.3V
NQLF6EM-100X R6016
C6022 10u ǡ
C6023 C6024
0.1
10 10
C6051 22
R6003
ǡ
C6025 C6029 R6015
22 OPEN R6004 R6005 OPEN C6033
8.2k 390k 0.1 C6052 22
C6026
22
GND
GND
R6013
1.5k
GND

c10664001a_1201_4/4_0.0
(No.PA040<Rev.001>)2-37 2-38(No.PA040<Rev.001>)
MD PWB CIRCUIT DIAGRAM (1/6) [LVDS I/F SPI]
To MD PWB (2/6)
RX_DV_HD
RX_DV_DE
RX_DV_VD
RX_DVB5
RX_DVB4
RX_DVB3
RX_DVB2
RX_DVB1
RX_DVB0
RX_DVY5
RX_DVY4
RX_DVY3
RX_DVY2
RX_DVY1
RX_DVY0
3.3V LVDS33V
R2830
K2705
R2829
R2828
NQR0499-002X
33
5
33
33
RA2829
RA2828
RA2827
RA2826
33
33
33
33
1
4
C2705 C2706 C2707
10 0.1 0.1
CYC_B3
VIDEO INPUT
CYC_B2
CYC_B1
CYC_B0
GND
CYC_HD
CYC_DE
CYC_VD
CYC_B5
CYC_B4
CYC_G5
CYC_G4
CYC_G3
CYC_G2
CYC_G1
CYC_G0
CN2701
OPEN
C2728
C2725
C2724
C2723
C2722
QGA0504F1-41X
0.1
0.1
0.1
0.1
FL2710
GND 1 NQR0686-002X
1 8
TA1- 2 VEL_A1-
2 7
TA1+ 3 VEL_A1+
TB1- 4
3 6
VEL_B1- OSD IN/OUT
4 5
TB1+ 5 VEL_B1+
108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
GND 6 RA2825
PGND
PVCC
VCC
CONT12
DE
VSYNC
HSYNC
B19
B18
GND
VCC
B17
B16
B15
B14
B13
B12
GND
VCC
B10
G19
G18
G17
G16
G15
GND
VCC
G14
G13
G12
G10
R19
R18
CONT11
B11
G11
FL2709 33
GND 7 NQR0686-002X 1 8
1 8
TC1- 8 VEL_C1- CN2702
2 7
QGA0504F1-31X
2 7
TC1+ 9 VEL_C1+ FL2701 CYC_R5 3 6
3 6 1 NQR0686-002X R2796 109 LGND R17 72 RX_DVR5
TCLK1- 10 VEL_CLK1- TA1N 1 8 100 RA1N CYC_R4 4 5
4 5 2 110 RA1- GND 71 RX_DVR4
TCLK1+ 11 VEL_CLK1+ TA1P 2 7 RA1P CYC_R3 1 8
C2721
3 111 RA1+ VCC 70 RX_DVR3
0.1
GND 12 TB1N 3 6 RB1N CYC_R2 2 7
FL2708 4 112 RB1- R16 69 RX_DVR2
GND 13 NQR0686-002X TB1P 4 5 RB1P CYC_R1 3 6
1 8 5 113 RB1+ R15 68 RX_DVR1
TD1- 14 VEL_D1- R2797 CYC_R0 4 5
2 7 6 100 114 LVCC R14 67 RX_DVR0
TD1+
TE1-
15
16
3 6
VEL_D1+
VEL_E1-
7
TC1N 1
FL2702
NQR0686-002X
8
R2798
100 RC1N
C2708
115 LGND R13 66 RA2824
33
To MD PWB (2/6)
0.1
4 5 8 116 RC1- R12 65
TE1+ 17 VEL_E1+ TC1P 2 7 RC1P
9 117 RC1+ R11 64
GND 18
GND 19
FL2707
NQR0686-002X
To MD PWB (2/6) 10
TCLK1N
TCLK1P
3
4
6
5
RCLK1N
RCLK1P
118 RCLK- R10 63
1 8 11 119 RCLK+ CGND 62

TA2- 20 VEL_A2- R2799
C2720
2 7 12 100 120 LVCC CVCC 61
0.1
TA2+ 21 VEL_A2+ FL2703 CYC_CLK
3 6 13 NQR0686-002X R2800 121 LGND CLKOUT 60 RX_DV_CLK
C2709
TB2- 22 VEL_B2- TA2N 1 8 100 RA2N R2823
0.1
4 5 14 122 RD1- GND 59 33
TB2+ 23 VEL_B2+ TA2P 2 7 RA2P
15 123 RD1+ GND 58
GND 24 TB2N 3 6 RB2N
C2727
FL2706 16 124 RE1- VCC 57
To PROCESSOR PWB GND 25
1
NQR0686-002X
8 17
TB2P 4 5 RB2P
125 RE1+ CONT22 56
0.1
CN3 TC2- 26
2 7
VEL_C2-
18
R2801
100 126 LVCC
IC2701 CONT21 55
TC2+ 27 VEL_C2+ FL2704
19 NQR0686-002X LGND GND 54
To PROCESSOR PWB
3 6 R2802 127
C2710
To CMS PWB TCLK2- 28

4 5
VEL_CLK2-
20
TC2N 1 8 100 RC2N 0.1
128 RA2- THC63LVD1024 VCC 53
C2719
0.1
CN2
TCLK2+ 29 VEL_CLK2+
CN2 21
TC2P 2 7 RC2P
129 RA2+ B29 52
GND 30 TCLK2N 3 6 RCLK2N
FL2705 22 130 RB2- B28 51
GND 31 NQR0686-002X TCLK2P 4 5 RCLK2P
1 8 23 131 RB2+ B27 50
TD2- 32 VEL_D2- R2803
2 7 24 100 132 LVCC B26 49
TD2+ 33 VEL_D2+
3 6 25 133 LGND B25 48
C2711
TE2- 34 VEL_E2-
0.1
4 5 26 OSD_RCLK3N 134 RC2- GND 47
TE2+ 35 VEL_E2+
C2718
27 OSD_RCLK3P 135 RC2+ VCC 46
0.1
GND 36
28 OSD_RHD3N 136 LGND SET L H M B24 45
GND
FSW_WIC
37
38
K2701 NQR0499-001X
FSW_WIC
29 OSD_RHD3P (L) 137 LGND /PDWN H Power_down Normal_operation B23 44
K2702 NQR0499-001X 30 OSD_RVD3N 138 LVCC MODE0 H Dual_out Single_out B22 43

WIC_V
FSW_LC
39
40
K2703 NQR0499-001X
WIC_V
FSW_LC
To MD PWB (4/6) 31 OSD_RVD3P
C2712
139 LGND MODE1 L Dual_in Single_in B21 42
0.1 DK L CLKOUT_delay 0 CLKOUT_delay + CLKOUT_delay -
K2704 NQR0499-001X 32 140 RD2- B20 41
SEL0 41 SEL0
R_F L Falling_edge Rising_edge
33 141 RD2+ G29 40
GND-PAD 42 OE H Output_disable Output_enable
34 142 RE2- GND 39
GND-PAD 43 MODE2 L DDR_disable DDR_enable
C2701 R2701 R2702 R2703 C2717
35 143 RE2+ VCC 38
OPEN ǡ ǡ ǡ MAP H LVDS_MAP2 LVDS_MAP1 0.1
GND-PAD 44
36 144 LGND G28 37
GND-PAD 45
37
RESERVED
GND-PAD 46
38
MODE0
MODE1
MODE2
/PDWN
PGND
PVCC
GND-PAD 47
GND
GND
GND
MAP
VCC
VCC
VCC
VCC
G20
G21
G22
G23
G24
G25
G26
G27
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R/F
OE
DK
39
GND-PAD 48
40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
GND-PAD 49
41
GND-PAD 50
GND-PAD 51
GND
GND-PAD 52
GND-PAD 53
0.1
0.1
0.1
0.1
OPEN
C2713
C2714
C2715
C2726
C2716
LVDS33V
GND
R2807
3.3k
TP2701 TP2702 TP2703 TP2704 TP2705 TP2706 TP2707 TP2708 TP2709 TP2710 TP2711 TP2712 TP5013
R2808
3.3k
R2809 R2816
3.3k OPEN
R2810 R2817
OPEN 3.3k
R2811 R2818
OPEN 3.3k
GND
R2812 R2819
OPEN 3.3k
R2813 R2820
3.3k OPEN
R2814 R2821
OPEN 3.3k
R2815 R2822
3.3k OPEN
3.3V
IC2702
BU90LV047A-X
R2786
GND 4.7k K2711 ǡ
DOUT1-
16
1
OSD_RHD3N
EN
K2710 ǡ
DOUT1+
15
2
3.3V OSD_RHD3P
DIN1
K2709 ǡ
DOUT2+
14
3
OSD_RVD3P
DIN2
DOUT2-
K2708 ǡ
(L)
13
4
OSD_RVD3N
VCC
3.3V K2707 ǡ
DOUT3-
12
5
OSD_RCLK3N
GND
K2706 ǡ
C2729 C2730 DOUT3+
11
6
CN5001 IC5017 OSD_RCLK3P
0.1 0.001 DIN3
QGA1217F1-10X TC74LCX08FT-F-X DOUT4+
10
7
10
K5008 NQR0499-001X
SCLKA (H) R2787 4.7k
DIN4
DOUT4-
9
K5007 NQR0499-001X
(I) R5047
(I) SL
14
1
9 MOSIA MOSIA 1A VCC R2788 OPEN

OPEN
K5006 NQR0499-001X
To MD PWB (2/6)
13
2
8 MISOA_FROM_VEL 1B 4B
K5005 NQR0499-001X
(K) R5043 ǡ
(J)
12
3
7 SSA MOSIA_TO_VEL 1Y 4A LVDS_EN_VEL

2
To DD SUB PWB (2/4) 1
(K)
R5046 ǡ
To MD PWB (2/6)
GND
11
4
6 SSA 2A 4Y LVDS_EN
C5008 C5007 C5006 C5005 2 R2777 ǡ
CN5008 OPEN OPEN OPEN OPEN 3 1
GCKO
10
5
5 2B 3B
R2776 ǡ
K5004 NQR0499-001X
STZ6.8N-X
D5002
To MD PWB (2/6) R5044 ǡ
(H) GVDO
To MD PWB (2/6)
6
4 VEL_PON_0 3 SSA_TO_VEL 2Y 3A SCLKA

R2775 ǡ
GHDO
R5045 ǡ
To MD PWB (6/6) STZ6.8N-X
To MD PWB (2/6)
7
3 GND 3Y SCLKA_TO_VEL
D5001
K5002 NQR0499-001X
2 VEL_PON_1
1
K5001 NQR0499-001X
LVDS_EN_VEL (J) C5143
0.1
C5004 C5002 C5001

OPEN OPEN OPEN
MD PWB ASS'Y (1/6)

GND
GND
c10663001a_1201_1/6_0.0
(No.PA040<Rev.001>)2-39 2-40(No.PA040<Rev.001>)
To MD PWB (1/6)
GCKO
GVDO
GHDO
5M SPI
SSA_TO_VEL
MOSIA_TO_VEL
SCLKA_TO_VEL
MISOA_FROM_VEL
RX_DV_CLK
RX_DV_DE
RX_DV_HD
TP1015
RX_DV_VD
TP1016
RX_DVR0
RX_DVR1
TP1017
CMOS IN / OSD INOUT
RX_DVR2
RX_DVR3
TP1018
RX_DVR4
100k
R1053
RX_DVR5
C1070
0.0068
1k
R1018
TP1019
SCLK_B
TP1023
4 3
TP1020
MOSI_B
CD
20M SPI
OUT
RX_DVB0
IC-PST8428U-W
IC1002
RX_DVB1
TP1021
MISO_B
VDD
To MD PWB (1/6)
GND
VEL_VSYNC
VEL_RESET
RX_DVB2
SS_B
SYSTEM RESET
RX_DVB3
TP1022
1 2
RX_DVB4
RX_DVB5
MD PWB CIRCUIT DIAGRAM (2/6) [INPUT I/F]
R1016
3.3V
10
3.3V
GND
OPEN
R1109
0.01
C1069
GND
RX_DVY0
RX_DVY1
RX_DVY2
RX_DVY3
RX_DVY4
RX_DVY5
VEL_VDD33
F1
E1
B1
A1
D1
C1
SSB
MISOB
MOSIB
VDD33
VDD33
SCLKB
C1036 0.1
F2
E2
B2
D2
C2
A2
VSS
SSA
MISOA
MOSIA
SCLKA
VDD33
GHDO
TP1014
F3
E3 D3 C3 B3 A3
SCL
VSS
TP1037
GHDO VDD33 CLKRI VDD33 SCL

RX_DV_CLK
VEL_RESET
GVDO
C1035 0.1
F4
E4 D4 C4 B4 A4
VSS
TP1012
CLKDVI XRST VDD33 GVDO TESTIO_SYS R1009 OPEN

RX_DV_DE
GCKO
F5
E5 D5 C5 B5 A5
VSS
SDA
TP1038
DVDE VDD33 GCKO VDD33 SDA C1034 0.1
RX_DVR5
RX_DVR0
RX_DVR3
RX_DVR4
F6
E6 D6 C6 B6 A6
VSS
VDD33 DV50R5 DV50R0 DV50R3 DV50R4
RX_DVR1
RX_DVR2
RX_DV_HD
F7 E7 D7 C7 B7 A7
VDD33 A1AVSS A1AVSS DV50R1 DV50R2 DVHD

TP1013
C1063 0.1 RX_DV_VD
GND
F8 E8 D8 C8 B8 A8
A1AVDD A1AVDD DVVD DV96R1 DV96R0
CLKWI
RX_DVB2
VEL_A1AVDD
F9 E9 D9 C9 B9 A9
GND
2 1
VSS VSS VSS DV96R2 DV50B2 CLKCUI RX_DVB0
10p
RX_DVB1
C1092
RX_DVB3
100k
R1002
3 4
27MHz
F10 E10 D10 C10 B10 A10

RX_DVB4 R1003
DV50B0 DV50B1 DV50B3 VSS DV96R3 CLKCUO 10p
220
X1001
C1091
RX_DVB5
NAX1067-001X
F11 E11 D11 C11 B11 A11
DV50B4 DV96B0 DV50B5 RLVVDD33 VSS VSS
C1033 0.1
F12 E12 D12 C12 B12 A12
(No.PA040<Rev.001>)2-41
DV96B2 DV96B1 DV96B3 RLVVDD33 R2EM R2EP
RX_DVY2
RX_DVY0
RX_DVY1 R1052 100 VEL_E2+
VEL_E2-
F13 E13 D13 C13 B13 A13 VEL_D2+

R1051 100
DVY2 DVY0 DVY1 RLVVDD33 R2DM R2DP
RX_DVY3 VEL_D2-
RX_DVY4
RX_DVY5
F14 E14 D14 C14 B14 A14
DVY3 DVY4 DVY5 RLVVDD33 R2CLKM R2CLKP

LVDS IN
R1050 100 VEL_CLK2+
VEL_CLK2-
C1032 0.1
F15 E15 D15 C15 B15 A15 VEL_C2+
IC1001
R1049 100
DVY6 DVY7 RLVVSS RLVVDD33 R2CM R2CP
VEL_C2-
JCC5078
F16 E16 D16 C16 B16 A16
TP1025
DVY9 DVY8 RLVVSS RLVVDD33 R2BM R2BP
C1030 0.1 VEL_B2+

R1048 100
VEL_B2-
F17 E17 D17 C17 B17 A17 VEL_A2+

R1047 100
VDD12 VDD12 VDD12 VDD12 R2AM R2AP R1007 OPEN C1031 0.1
VEL_A2-
TP1011
F18 E18 D18 C18 B18 A18 C1029 0.1
SEL_BUS1 TEST1 RLVVSS RLVVDD33 VDD12 VDD12

R1017 220 ASP2
VEL_1.25V
VEL_VSYNC
F19 E19 D19 C19 B19 A19 C1028 0.1
ASP2 VDHO RLVVSS RLVVDD33 RLVVDD33 RLVVDD33

HDO_PWM1
ASP1
F20 E20 D20 C20 B20 A20
HDO_PWM1 ASP1 RLVVSS RLVVDD33 R1EM R1EP

CLK_RO
To MD PWB (1/6)
2-42(No.PA040<Rev.001>)
R1046 100 VEL_E1+
TP1010
VEL_E1-
C1027 0.1
F21 E21 D21 C21 B21 A21 VEL_D1+
R1045 100
CLK_RO TEST0 RLVVSS RLVVDD33 R1DM R1DP
R1006 OPEN VEL_D1-
DEO
F22 E22 D22 C22 B22 A22
SEL_BUS0 DEO RLVVSS RLVVDD33 R1CLKM R1CLKP

ASP0
R1044 100 VEL_CLK1+
VEL_CLK1-
C1026 0.1
F23 E23 D23 C23 B23 A23 VEL_C1+
R1043 100
ASP0 TXPD RLVVSS RLVVDD33 R1CM R1CP
VEL_C1-
PWM0
VDO_PWM2
F24 E24 D24 C24 B24 A24
PWM0 VDO_PWM2 RLVVSS RLVVDD33 R1BM R1BP

VEL_RLVVDD33
R1042 100 VEL_B1+
VEL_B1-
B25 A25 VEL_A1+

R1041 100
R1AM R1AP
VEL_A1-
LVDS_EN
R1008
4.7k
ASP0
VEL_TLVVDD33
ASP1
ASP2
CLK_RO
DEO
PWM0
HDO_PWM1
VDO_PWM2
TP1024
R1060
R1059
R1058
R1054
R1057
R1056
R1055
(M)
OPEN
OPEN
ǡ
ǡ
ǡ
ǡ
ǡ
VEL_VDO
VEL_HDO
VEL_DEO
VEL_CLK_RO
VEL_VDO
VEL_DEO
VEL_HDO
VEL_CLK_RO
ASP0_TO_CYC
MD PWB ASS'Y (2/6)

TP1026
TP1027
(M)
TP1028
TP1029
To MD PWB (4/6)
c10663001a_1201_2/6_0.0
MD PWB CIRCUIT DIAGRAM (3/6) [VDD]
3.3V
VEL_VDD33
VEL_RLVVDD33
VEL_TLVVDD33
VEL_DPAVDD
VEL_A1AVDD
1.25V
VEL_1.25V = VDD12 + VDDR + VDDA + VDDILV
1.8V
VEL_VDDIO
D1.8V_2(SHEET6)
3.3V 1.8V 1.25V
VEL_VDDIO VEL_VDD33 VEL_VDDIO VEL_1.25V
R1027 ǡ C1054 10 R1021 ǡ C1066 10 R1020 ǡ C1064 10
VEL_RLVVDD33 R1024 ǡ R1025 ǡ

G1 G2 G4 G7
VSS VSS VSS VSS
C1001 0.1 R1019 ǡ C1056 10
H3 H6
VEL_TLVVDD33
VSS VDDIO
R1022 ǡ C1058 10
J2 J5
VSS VDDIO
VEL_VDD33
VEL_DPAVDD
C1002 0.1 VEL_1.25V
K3 K4 K6
VSS VDDIO VDDIO R1023 ǡ C1060 10
0.1
0.1
0.1
0.1
VEL_A1AVDD
C1037
C1051
C1050
C1049
L3
VSS
R1026 ǡ C1062 10
M12
M13
M14
M15
M16
M17
M18
M2 M5 M19
VDD33
VDD33
VDD12
RLVVDD12
RLVVDD12
RLVVDD12
VSS VDDIO TLVVDD12
VDD12
C1048 0.1
GND
N12
N13
N14
N15
N16
N17
N1 N4 N18 N19
VDD33
VDD12
VDD12
VDD12
VDD12
VDD12
VSS VDDIO VDD12 VDD12
C1003 0.1 C1047 0.1
P3 P6 P12 P13 P14 P15 P16 P17 P18 P19
VSS VDDIO VSS VSS VSS VSS VSS VDD12 VDD12 TLVVDD12
C1046 0.1
R2 R5 R12 R13 R14 R15 R16 R17 R18 R19
VSS VDDIO VSS VSS VSS VSS VSS VDD12 VDD12 VDD12
C1045 0.1
T3 T4 T12 T13 T14 T15 T16 T17 T18 T19
VSS VDDIO VSS VSS VSS VSS VSS VDD12 VDD12 TLVVDD12
C1004 0.1 C1044 0.1
VDDR
VDDR
VDDR
U12
U13
U14
U3 U6 U15 U16 U17 U18 U19
VDDIO VDDIOCK VSS VSS VDD12 VDD12 VDD12
VDD12
VDD12
VDD12
VDDR
VDDA
VDDA
C1043 0.1
V12
V13
V14
V15
V16
V17
V2 V5 V18 V19
VSS VDDIO VDD12 TLVVDD12
VDD12
VDD12
VDD12
VDD12
VDDR
VDDA
VDDA
W12
W13
W14
W15
W16
W17
W18
W1 W4 W19
VSS VSS VDD12
C1005 0.1
Y3 Y6
VSS VDDIO
0.1
0.1
0.1
0.1
0.1
C1038
C1039
C1040
C1041
C1042
AA5
VDDIO
C1006 0.1
GND
AB3 AB4 AB6
VSS VDDIO VDDIOCK
AC2 AC3
VSS VSS IC1001

JCC5078
AD2 AD4 AD5 AD6
VSS VSS VDDIO VSS
TP1001
VEL_DPAVDD
VDDIOCK
VDD12
VDDIO
VDDIO
VDDIO
VDDIO
VDDR
AE10
AE14
AE18
AE20
AE22
AE23
AE24
AE8
VSS
C1052 0.1 AE1 AE3 AE4 AE5 AE6
VSS VSS VDDIO VSS TESTIO_DDR
C1007 0.1
VDD12
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDR
AF13
AF16
AF19
AF22
AF23
AF24
AF11
AF7
AF9
VSS
AF2 AF3 AF4 AF5 AF6
VSS VDDIO VSS DPAVSS DPAVDD

CK33IN
VDD12
VDDIO
VDDIO
VDDIO
VDDIO
VDDR
AG12
AG15
AG18
AG20
AG22
AG23
AG24
AG5
AG6
VSS
VSS
AG1 AG2 AG3
VSS VDDIO VSS
VDD12
VDDIO
VDDIO
VDDR
AH13
AH17
AH19
AH22
AH23
AH24
AH11
AH5
AH6
AH7
VSS
VSS
VSS
VSS
VSS
VSS
AH2
VSS
VDD12
VDDR
AJ10
AJ14
AJ16
AJ22
AJ23
AJ24
AJ4
VSS
VSS
VSS
VSS
VSS
AJ1
VSS
FPENF
VDD12
VDDR
AK12
AK15
AK18
AK23
AK24
AK25
AK2
AK3
AK5
AK9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK1
VEL_1.25V
ǡ
VSS
MD PWB ASS'Y (3/6)

R1004
R1001
ǡ
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
C1008
C1009
C1010
C1012
C1013
C1014
C1016
C1015
C1011
GND
c10663001a_1201_3/6_0.0
(No.PA040<Rev.001>)2-43 2-44(No.PA040<Rev.001>)
MD PWB CIRCUIT DIAGRAM (4/6) [OUTPUT]
VEL_TLVVDD33
CN2704
QGA0504F1-41X
TP1009 1 GND
TP1008 K2716 NQR0499-001X
FSW_LC 2 FSW_LC
TP1007
To MD PWB WIC_V
K2715 NQR0499-001X
3 WIC_V
A26 A27 A28 A29 A30

(1/6) FSW_WIC
K2714 NQR0499-001X
4 FSW_WIC
TLVVSS TSTAIO1R TSTAIOT PTEST TLVVSS

R2704 R2705 R2706 5 GND
T8EN ǡ ǡ ǡ
T8EP 6 GND
T7EN T8EP 8 1
7 TE8+
T7EP T8EN 7 2
B26 B27 B28 B29 B30 8 TE8-
TLVVSS T8EN T8EP T7EN T7EP T8DP 6 3
9 TD8+
T8DN T8DN 5 4
T8DP 10 TD8-
T7DN FL2722 11 GND

NQR0686-002X
T7DP
C25 C26 C27 C28 C29 C30 12 GND
TLVVDD33 T8DN T8DP T7DN T7DP T8CLKP 8 1
TLVVSS
13 TCLK8+
C1053 0.1
T8CLKN T8CLKN 7 2
T8CLKP 14 TCLK8-
T7CLKN T8CP 6 3
15 TC8+
T7CLKP T8CN 5 4
D25 D26 D27 D28 D29 D30 16 TC8-
TLVVDD33 T8CLKN T8CLKP T7CLKN T7CLKP
TLVVSS FL2721 17 GND
NQR0686-002X
T8CN
T8CP 18 GND
T7CN T8BP 8 1
19 TB8+
T7CP T8BN 7 2
E25 E26 E27 E28 E29 E30 20 TB8-
TLVVDD33 T8CN T8CP T7CN T7CP T8AP 6 3
TLVVSS
21 TA8+
T8BN T8AN 5 4
T8BP 22 TA8-
T7BN
FL2720 23 GND
NQR0686-002X
T7BP
F25 F26 F27 F28 F29 F30 24 GND
TLVVDD33 T8BN T8BP T7BN T7BP T7EP 8 1
TLVVSS
25 TE7+
C1025 0.1
T8AN T7EN 7 2
T8AP
T7AN T7DP 6 3
26 TE7-
To DD PWB (1/12)
G25 G26 G27 G28 G29 G30
T7AP T7DN 5 4
27
28
TD7+
TD7-
CN1004
TLVVDD33 T8AN T8AP T7AN T7AP
NQR0686-002X
30 GND
C1024 0.1
T7CLKP 8 1
31 TCLK7+
T7CLKN 7 2
H25 H26 H27 H28 H29 H30 32 TCLK7-
TLVVDD33 TLVVDD33 TLVVDD33 TLVVDD33 TLVVDD33 T7CP 6 3
TLVVSS
33 TC7+
T6EN T7CN 5 4
T6EP 34 TC7-
T5EN
FL2718 35 GND
NQR0686-002X
T5EP
J25 J26 J27 J28 J29 J30 36 GND
TLVVDD33 T6EN T6EP T5EN T5EP T7BP 8 1
TLVVSS
37 TB7+
C1023 0.1
T6DN T7BN 7 2
T6DP 38 TB7-
T5DN T7AP 6 3
39 TA7+
T5DP T7AN 5 4
K25 K26 K27 K28 K29 K30 40 TA7-
TLVVDD33 T6DN T6DP T5DN T5DP
NQR0686-002X
T6CLKN
T6CLKP 42 GND-PAD
T5CLKN
43 GND-PAD
T5CLKP
L25 L26 L27 L28 L29 L30 44 GND-PAD
TLVVSS
45 GND-PAD
T6CN
T6CP 46 GND-PAD
T5CN
47 GND-PAD
T5CP
M25 M26 M27 M28 M29 M30 48 GND-PAD
TLVVDD33 T6CN T6CP T5CN T5CP
TLVVSS
49 GND-PAD
C1022 0.1
T6BN
T6BP 50 GND-PAD
T5BN
51 GND-PAD
T5BP
N25 N26 N27 N28 N29 N30 52 GND-PAD
TLVVDD33 T6BN T6BP T5BN T5BP
TLVVSS
53 GND-PAD
T6AN
T6AP
T5AN
T5AP GND
P25 P26 P27 P28 P29 P30
TLVVDD33 T6AN T6AP T5AN T5AP
TLVVSS
IC1001
JCC5078 TLVVSS
R25
TLVVSS
R26
TLVVSS
R27
TLVVSS
R28
TLVVSS
R29
TLVVSS
R30
CN2703
QGA0504F1-41X
T25 T26 T27 T28 T29 T30 53 GND-PAD

TLVVDD33 T4EN T4EP T3EN T3EP
TLVVSS
52 GND-PAD
C1021 0.1
51 GND-PAD
50 GND-PAD
U25 U26 U27 U28 U29 U30 49 GND-PAD

TLVVDD33 T4DN T4DP T3DN T3DP
TLVVSS
48 GND-PAD
47 GND-PAD
46 GND-PAD
V25 V26 V27 V28 V29 V30 45 GND-PAD

TLVVSS
44 GND-PAD
43 GND-PAD
42 GND-PAD
K2713 NQR0499-001X
W25
TLVVDD33
W26
T4CN
W27
T4CP
W28
T3CN
W29
T3CP
W30
To MD PWB (1/6) SEL0 41 SEL0
TLVVSS C2732 40 GND

C1020 0.1 OPEN
39 GND
K2712 NQR0499-001X
To MD PWB (2/6) ASP0_TO_CYC 38 ASP0
Y25 Y26 Y27 Y28 Y29 Y30 C2731 37 GND

OPEN
TLVVDD33 T4BN T4BP T3BN T3BP FL2716
TLVVSS
NQR0686-002X 36 GND
T6EP
35 TE6+
T6EN 5 4
34 TE6-
T6DP 6 3
AA25 AA26 AA27 AA28 AA29 AA30 33 TD6+
TLVVDD33 T4AN T4AP T3AN T3AP T6DN 7 2
TLVVSS
32 TD6-
8 1
31 GND
C1019 0.1 FL2715
NQR0686-002X 30 GND
T6CLKP
AB25 AB26 AB27 AB28 AB29 AB30 29 TCLK6+
TLVVDD33 TLVVDD33 TLVVDD33 TLVVDD33 TLVVDD33 T6CLKN 5 4
TLVVSS
T6CP 6 3
28 TCLK6- To DD PWB 1/12)
T6CN 7 2
27 TC6+
CN1003
26 TC6-
8 1
AC25 AC26 AC27 AC28 AC29 AC30 25 GND
TLVVDD33 T2EN T2EP T1EN T1EP FL2714
TLVVSS
NQR0686-002X 24 GND
C1018 0.1
T6BP
23 TB6+
T6BN 5 4
22 TB6-
T6AP 6 3
AD25 AD26 AD27 AD28 AD29 AD30 21 TA6+
TLVVDD33 T2DN T2DP T1DN T1DP T6AN 7 2
TLVVSS
20 TA6-
8 1
19 GND
FL2713
NQR0686-002X 18 GND
T5EP
AE25 AE26 AE27 AE28 AE29 AE30 17 TE5+
TLVVDD33 T2CLKN T2CLKP T1CLKN T1CLKP T5EN 5 4
TLVVSS
16 TE5-
T5DP 6 3
15 TD5+
T5DN 7 2
14 TD5-
8 1
AF25 AF26 AF27 AF28 AF29 AF30 13 GND
TLVVDD33 T2CN T2CP T1CN T1CP FL2712
TLVVSS
NQR0686-002X 12 GND
C1017 0.1
T5CLKP
11 TCLK5+
T5CLKN 5 4
10 TCLK5-
T5CP 6 3
AG25 AG26 AG27 AG28 AG29 AG30 9 TC5+
TLVVDD33 T2BN T2BP T1BN T1BP T5CN 7 2
TLVVSS
8 TC5-
8 1
7 GND
FL2711
NQR0686-002X 6 GND
T5BP
AH25 AH26 AH27 AH28 AH29 AH30 5 TB5+
TLVVDD33 T2AN T2AP T1AN T1AP T5BN 5 4
TLVVSS
4 TB5-
T5AP 6 3
R1005 2.2k
TP1006
3 TA5+
T5AN 7 2
2 TA5-
8 1
AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 1 GND
SELGENCLK TMODE4 TLVVSS TLVVSS
TLVVSS TLVVSS
TP1005
TP1004
GND
TP1003
TP1002
AK26 AK27 AK28 AK29 AK30
TLVVSS TMODE3 TMODE2 TMODE1 TMODE0
MD PWB ASS'Y (4/6)

GND
c10663001a_1201_4/6_0.0
(No.PA040<Rev.001>)2-45 2-46(No.PA040<Rev.001>)
MD PWB CIRCUIT DIAGRAM (5/6) [DDR]
1.8V
1.8VD_AB
DEMITAS R2100 ǡ
1.8VD_CD
C8137 C8138
0.1 0.1
/10 /10
R2200 ǡ
GND
1.8VD_AB 1.8VD_AB 1.8VD_CD 1.8VD_CD
OPEN
OPEN
OPEN
OPEN
0.01
0.01
0.01
0.01
10
10
10
10
C2103
C2102
C2101
C2153
C2152
C2151
C2203
C2202
C2201

DLA-X3-xx - XC380-xx - X7-xx - XC780-xx - X9-xx - XC980-xx (SCH)

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Copyright:

Available Formats

DLA-X3-xx - XC380-xx - X7-xx - XC780-xx - X9-xx - XC980-xx (SCH)

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Copyright:

Available Formats

DLA-X3-BE, DLA-X3-BU, DLA-X3-WE, DLA-XC380-BC, DLA-X7-BE,

DLA-X7-BU, DLA-XC780-BC, DLA-X9-BE, DLA-X9-BU, DLA-XC980-BC

: Connector : Wrapping or soldering

EXHAUST DUCT FAN [DLA-X3/XC380]

IR&LED PWB KEYPAD PWB SPI

I2C PortA OUT

From to JIG IRIS1 Motor SENSOR

CV5P0 3V3_STB LENS BARRIER

ASP0 38 ASP0 ASP0 38 ASP0

CN1002 R1027 OPEN 1005 CN1004 R1056 0 1005

R1029 OPEN 1005 R1058 0 1005

GND 5 TCM2010-201-4P-T(TDK) GND 5 TCM2010-201-4P-T(TDK)

TD3- 28 RD3N CN2704 TD7- 28 RD7N

DD PWB ASS'Y (1/12)

FPGA POWER (I/O,CORE) FPGA GND

K15 VCCAUX B17 GND

GND M15 VCCAUX D18 GND

R10 VCCAUX E11 GND

R12 VCCAUX E15 GND

U11 VCCAUX E21 GND

LX100 MINIMUM CAPACITOR C1014 C1015 C1016 C1017

LX150 ADDITIONAL CAPACITOR R5 GND

DD PWB ASS'Y (2/12)

GND OUT Y ASIPWR25 INK0001AM1-X

DVCC33V IC1001 DVCC33V IC1001

AA3 VCCO_2 L7 VCCO_3

AA11 VCCO_2 R2 VCCO_3

RCLK1N RCLK5N IO_L80N_3 F7

RCLK1P RCLK5P IO_L55P_M3A13_3 G6

R1004 OPEN 1005 R1033 100 1005

To DD PWB (1/12) R1006 OPEN 1005

R1010 OPEN 1005 R1039 100 1005

R1021 OPEN 1005 din_b_n[5]

R1023 OPEN 1005 din_b_n[7] R1052 100 1005 din_d_n[7]

NC(LX75) IO_L44P_2 W10

NC(LX75) IO_L18N_2 W13

NC(LX75) IO_L20P_2 W14

NC(LX75) IO_L11N_2 W17

NC(LX75) IO_L6P_2 W18

NC(LX75) IO_L44N_2 Y10

CONFIG NC(LX75) IO_L20N_2 Y14

NC(LX75) IO_L6N_2 Y18

DD PWB ASS'Y (3/12)

4.7k 100 R1092

/CS VCC AA22 IO_L1N_M0_CMPMISO_2

/WP CLK Y21 IO_L1P_CCLK_2

GND DIO AB20 IO_L3N_MOSI_CSI_B_MISO0_2

R1095 R1096 R1097 R1098 R1099

IO_L60N_1 W22 RPIXCK

To DD PWB (2/12) LVDS_OE

FSW_WIC C10 IO_L33N_0

GND OUT A12 IO_L37N_GCLK12_0

B18 IO_L65P_SCP3_0 G16

C11 IO_L35P_GCLK17_0 H17

C12 IO_L36N_GCLK14_0 J16

C13 IO_L38P_0 J17

C14 IO_L49N_0 K16

C15 IO_L51P_0 K17

C16 IO_L62N_VREF_0 T19

VTTLCD 36 NRSA6AD-220W PIXD1[6] G20 RPIXD16

LCDD14 43 J1 LCDDATA[14] PIXVALID M19 RPIXEN

VLCD33V 64 PIXD3[8] L21