Lee SHAM OBUINNIONA |" AM/FM STEREO TUNER SANSUI T-77 ot CUocrettete = Rye SANSUI ELECTRIC CO., LTD.BLOCK DIAGRAM IF ap 8 TDC) vwsea] 79 secure) = [Staten Disoioy] Tseucus eoooe ib 0 7 SEoWENT! (Beco ent) HOHOHGOOOO 55a] | fl PPODOHOD ® ©QoOoO® ‘conTROE \e") 6.8 we (Camp oRER 1. OPERATION 1-1, General ‘The main functions of the Quartz Synthesizer Tuner T-77 will be scribed below: 1) Manual tuning of one step/one push If UP or DOWN key switch is pushed once lightly, the receive fre quency (every frequency displayed on the indicator tubes) changes bby one step (100 kHz in FM; 1 kHz in AM). 2) Fast forwarding tuning While UP or DOWN key switch is kept pushed slightly, the receive frequency continues to change. 3) Automatic search tuning If UP or DOWN key switch is pushed once deeply, the receive fre quency continues to change and stops when it reaches a frequency lof the next broadcasting station, 4) Memory write and memory read By pushing MEMORY and STATION key switches, itis possible to store the receive frequencies of six FM/AM stations, And also, by pushing one of STATION key switches once, itis possible to select any desired station automatically 5) Digital display of receive frequency The receive frequency is displayed digitally by using fluorescent indicator tubes ‘The Quartz Synthesizer Tuner T-77 comprises a PLL synthesizer circuit (TC 9123P) for mainly stabilizing the local oscillator fre ‘quencies, a synthesizer control circuit (TC 9124AP}, a digital display circuit (TC 50226P) for displaying receive frequencies, and a muting control cireuit 1 1-2. Operation of quartz PLL synthesizer circuit Fig. 1-1 PLL Synthes ls i ay ern i L 4 Fig 1-1 shows a PLL circuit for stabilising the local oscillator fe auencies. The local oscillator frequency fed from a VCO focal oscillator is divided by a Pre-Sealer section, and further divided by a program rmable counter section (a counter by which a divide ratio N can be predetermined freely by presetting it from outside) into 1/NThe output frequency from the programmable counter and the re: ference frequency from a reference frequency divider are phase ‘compared by a phase comparator. I the output signal from the programmable counter lags the refer: ‘ence signal, the output of the phase comparator changes to L level ‘only during a time interval whieh corresponds to the degree of phase difference, and if the signal leads the reference signal, the output ‘changes to H level. This L or H level signa is applied to a varactor diode in a VCO local oscillator, after having smoothed through a low-pass filter, in order to control voltage across the varactor diode, that is, 10 change the capacitance of the diode. Fig. 1-1 illustrates a closed-loop PLL circuit, in which VCO local oscillator frequencies are controlled so that a programmable counter Output trequency may be put in phase with a reference frequency divided trom 4 quartz oscillator frequency. Thetefore, high-stable focal oscillator frequencies can be obtained by using this PLL In addition, the controt voltage outputted from the phase compara tor is also applied to a varactor diode in a RF stage tuning circuit, so that an accurate 1uning can be made for receive frequencies, A. Electronic tuning. ‘A ning circult comprises Land C. ‘A conventional tuner has used a variable capacitor for changing the tuning frequency; however, the electronic tuning circuit uses a varacior diode of a semiconductor in place of the varlable capacitor Since the electrostatic capacity of the varactor diode changes ac. ‘cording to the intensity of DC voltage applied across the varactor diode, the tuning frequency is controlled by changing the applied voltage. 1-3, Operation of synthesizer control circuit Table 141 eT 2 Synthesizer control IC block diagram & EE A. General The main function of the synthesizer control circuit is to generate receive frequency data signals in accordance with the instructions keyed-in from the operation board. The frequency data signals are sent to the programmable counter of the PLL synthesizer circuit in order to determine the local oscillator frequencies and RF amplifier stage tuning frequencies in accordance Wwith the operation of the PLL synthesizer circuit, 25 explained ‘under Paragraph 1-2. (See Fig. 11) (On the other hand, the frequency data signals are also sent to a receive frequency display circuit, which comprises a seven-segment decoder IC, an indicator tube drive circuit, and frequency indicator tubes, inorder to digitally display the receive frequencies. In this case, CMOS IC (TC 9124AP} is used for the synthesizer contro! circuit Since the operation of this control IC (TC 9124AP) is 190 compli: ‘ated to explain here, as shown in Fig. 1-2, only the functions of input/output terminals of this IC are described in the following paragraphs, B. Main input/output terminals of control IC and the func- tion 1) Digit signal terminals (T) to Ts) “The digit signals generated inside the control IC mean four kinds of timing pulse signals (Ty to T,) as listed in Table I-1 Ifthe digit signals (Ty to T,) are apples to the operation key Input terminals {Ky 0 Ks), the data are read in inside the IC according to the timings of the digit signals (Ty to Ta). Also, the data outputs (A to D) of receive frequency and various mode display outputs (009, to DOs) vary according to the respective timings of the digit signals (Ty Ta), —_$__— —— i aie Serie. gies Sk ‘The input/output of the control IC is synchronized with the digit signals (Ty to Ta). 2) Operation key input terminals (Ky to Ks) ‘By applying the digit signals (Ty to T4) 10 the operation key input terminals (Ky to Ks), 20 instructions (inputs) are formed in total, whieh are different from each other according to the timings of the digit signals (T) to Ta). (See Table 1-1) 3) Receive frequency data output terminals (A to D) The receive frequency data from the receive frequency data output terminals (A to D) and the receive modes ate sent to the PLL syn thesizer 1C (TC 9123P) and the receive frequency display cicuit, in BCD notation, while synchronizing with the timings of the digit signals (Ty to Ta). ‘The receive frequency data outputs (A to D) and the display outputs (D0p to O4) are dynamic data which vary according to each timing of the digit signals (Ty t0 Ta). That is to say, the Units digit of a receive frequency data is sent basing on the timing of digit signal Ty; the tens digit is sent on Ta: the hundreds digit is sent on T; and the thousands digit is sent on Ts 44) Various-mode display driver output terminals (D0 to DO) These terminals output the cisplay output signals for displaying ‘operating conditions of the control IC such as memory reading ad 4resses, automatic scanning, or memory write conditions, Since the display is lit up dynamically synchronizing with the digit signals (Ty 10 Ta) itis possible to display 16:kind indications. (See Table 1-1)1-4. Operations of PLL Synthesizer Tuner ‘A. FM/AM switching circuit (See Fig. 1-3) Fig. 1-3 FM/AM swithching circuit [eine] + wr he FMJAM switching operation is carries out by dpplying digit signal T oF Tz to Key input Ks. When FM is being received, the FM/AM, switching output pin of the control IC, TC.9124AP is at H level, and £Q5 is in an ON state. Accordingly, the digit signal T is grounded through {D2 and £Q5. In this case, if {Sp (FM/AM selector switch) is An FM Generator Oxetoscope Genescope [AM Standard Signal Generator awsse FM Stancara Signal Generator Fuse FM Stereo Generator Stereo SG Onionope Scope ‘agio Oxistr ‘Nido Ose comers> Modulation ant. Moo, THO.