Advanced Packaging of 3D Fan-out RF
Microsystem for 5G IoT Communication
Chenhui Xia
Micro system Manufacturing Micro system Manufacturing
Department
CETC 58
WuXi, China
smartxvip@163.com
Xuefei Ming
Micro system Manufacturing
Department
CETC 58
WuXi, China
mxf_hyx2006@163.com
Abstract—An advanced packaging method of 3D fan-out
RF microsystem for 5G IoT communication is studied.
Through the double-sided wiring technology on the glass wafer,
the fabrication of the antenna array is realized, and the
integration of the RF microsystem is completed by using the
resin fan-out package. Finally, the electrical interconnection
between the RF microsystem and the transceiver antenna is
realized through the permanent bonding process between the
resin wafer and the glass wafer. The loss of the RF
transmission line is measured by using the RF millimeter wave
probe table. The results show that the RF transmission loss
from the chip end to the antenna end in the glass wafer fan-out
package is very small, and it is only 0.25dB when working in
28GHz. A slot coupling antenna is designed on the glass wafer.
The antenna can operate at 28GHz with a gain of 5.91dB. This
successful demonstration provides a practical solution for the
integration of low-loss RF microsystems for 5G IoT
communications.
Keywords—AiP, Fan-out package, RF microsystem, 5G
communications
I. INTRODUCTION
With the advent of the 5G era, the frequency of the
millimeter wave system is getting higher and higher, and the
size of the antenna unit is getting smaller and smaller, which
makes the high integration of the RF front-end and the
antenna in the package [1]. The antenna in package
technology (AiP) can not only take into account the antenna
performance, but also greatly improve the integration of the
system, so the packaged antenna technology has great
advantages in 5G wireless communication and radar chip
packaging [2]. RF integration system requires a significant
reduction in the size and cost of the package, which usually
uses system in packaging (SiP) technology to achieve
integration. SiP is a highly integrated technology, which
interconnects passive components, RF chips, digital and
analog chips, control chips and power management chips
into a package through high-density wiring [3]. Wafer-level
packaging is considered to be one of the most effective
integration means used in SiP products. Glass wafer is a kind
of substrate material for RF SiP, and glass has small
coefficient of thermal expansion, high surface smoothness,
good corrosion resistance, and can form wafer shapes of
various sizes like silicon wafers. At the same time, because
of its low dielectric loss and low price, glass wafers have
become good packaging materials in wafer-level packaging,
2020 21st International Conference on Electronic Packaging Technology (ICEPT)
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Hui Wang Gang Wang
Micro system Manufacturing
Department Department
CETC 58 CETC 58
WuXi, China WuXi, China
wangh_wx@126.com wanggang_cetc@126.com
especially in the field of radio frequency applications.
Typical applications such as IPD inductors, filters, millimeter
wave antennas and so on [4]–[6]. In this paper, an antenna
array is fabricated on a glass wafer by wafer-level RDL
technology, and the RF chip and antenna are integrated into a
package by resin molding technology. in this work, we show
an advanced packaging method of 3D fan-out RF
microsystem for 5G IoT communication.
II. RADIO FREQUENCY TRANSMISSION LOSS
In order to obtain the RF transmission performance of the
wafer-level package, the CPW transmission line structure
was fabricated on the glass wafer. Because the transceiver
antenna of the RF microsystem is fed by CPW, and the
antenna and the chip are also connected by CPW, it is very
important to obtain the RF transmission loss of CPW [7].
The CPW transmission line is realized by RDL process in
wafer level packaging. The ground wire of the CPW
transmission line structure is distributed on both sides of the
signal line, which is suitable for the millimeter wave probe
station, so it is more convenient for testing.
Cu Pi
Glass
(a) (b)
Figure 1. (a) The structure of CPW, (b) The photos of CPW.
The structure of the CPW transmission line is shown in
figure 1. The dielectric constant of the glass wafer is 5.1, the
loss tangent is 0.01, and the thickness of the glass substrate is
300 μm. The transmission line is made of copper and has a
thickness of 5 μm. The surface of the transmission line is
covered with 10 μm thick polyimide to prevent the oxidation
of copper. The width of the CPW transmission line is 70 μm,
the spacing is 25 μm, and the length is 1.35mm. A
rectangular test window of 100 × 300 μm2 is opened in the
polyimide layer at both ends of the transmission line.
The transmission line is measured on a high frequency
probe test bench, using a GSG probe with a distance of 100
μm and a PNA network analyzer for 67GHz performance.
The test results show that when the CPW transmission line is
in 28GHz, the insertion loss is 0.25dB, as shown in figure 2. 5mm2, the size of the radiation patch is 2 × 2mm2, and the
This shows that the glass wafer is a good choice for RF size of the feeder and coupling gap is:
microsystem integration applications. W=0.12mm,W1=0.07mm,W2=0.1mm,W3=0.31mm,L2=2.9
0
3mm,L3=0.4mm.

Sim. Cu Pi
Mea. Glass
-20
Cu Pi
S11(dB)

-40 (a)

-60
0 10 20 30 40 50 60 70
Frequency(GHz)

(a)
0.0

-0.2 (b)
S21(dB)

-0.4
Sim.
Mea.
-0.6

-0.8
0 10 20 30 40 50 60 70
Frequency(GHz)

(b)
Figure 2. Comparison of measurement and simulation results. (a)
S21 of CPW, (b) S11 of CPW. (c)
Figure 4. Structure and geometry of antenna. (a) The structure of
III. DESIGN AND MANUFACTURE OF ANTENNA
the antenna, (b) The shape of the antenna, (c) The picture of the
The patch antenna is very suitable for wafer-level antenna.
processing [8]. The wiring process is carried out on the
Through the simulation results, it is found that the
positive and negative sides of the glass wafer (thickness 300
working frequency of the antenna with the reflection
μm, dielectric constant 5.1, loss tangent 0.01) to form a slot
coefficient below-10dB is 27.8GHz-28.7GHz. Figure 5
coupling antenna. One side of the glass wafer is the radiation
shows the emission coefficient of the antenna.
patch of the antenna, and the other is the feeding and
reflecting ground plane of the antenna. The CPW is used for 0
feeding, and the coupling gap is located directly below the
Reflection Coefficient(dB)

radiation patch, which is used to stimulate the radiation patch. -10

-20

W1 -30

L3
-40
W2 W3 26 28 30 32
L2
L1
Frequency(GHz)

Figure 5. Reflection coefficient of antenna.

L W
(a) (b)
Figure 3. The size of the antenna. (a) The front of the antenna, (b)
The back of the antenna.
The electromagnetic simulation software HFSS is used to
simulate and optimize the slot coupling antenna. After
analysis and optimization, the size of the antenna unit is 5 ×
Through the radiation pattern of the antenna, it can be
found that the radiation direction of the antenna is directly
above the radiation patch, which is very suitable for the
stacking integration of RF microsystems, which is used for
the fabrication of transceiver antennas at the top of three-
dimensional stacking integration. The bottom end is used for
the integration of RF chips. Figure 6 shows the radiation
pattern of the antenna, from which it can be seen that the
gain of the antenna can reach 5.91dB.

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Figure 6. Radiation pattern of antenna.
IV. INTEGRATION OF RF MICROSYSTEMS
3D fan-out packaging is a kind of advanced wafer-level
packaging, which is different from the traditional packaging
technology. Wafer-level packaging technology takes the
wafer as the processing object and carries out the packaging
process directly on the wafer. It has high machining accuracy
and consistency, and its wiring accuracy can reach um level,
which is very suitable for the integration of RF microsystems
[9]. In this paper, a process of permanent bonding between
glass wafers and resin wafers is adopted to avoid the use of
welding technology to achieve three-dimensional stacking.
Figure 7 shows the packaging process of the 3D fan-out RF
microsystem used in this paper.
(a)
(b)
(c)
(d)
(e)
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(f)
Figure 7. RF microsystem integration process. (a) Double-sided
wiring of glass wafers, (b) Chips and the TSV adapter board are
welded to the back of the glass wafer, (c) Injection molding
reconstructed resin wafer, (d) Grinding and resin wafer RDL, (e)
The ball is implanted at the external leading end to form a package,
(f) Upper plate welding and heat sink installation.
In this paper, a specific packaging prototype is made for
a kind of 5G IoT communication equipment. It consists of 5
chips and 64-unit antenna array, including 3 RF chips and 2
TSV transfer chips. The TSV transfer chip is used to realize
vertical signal transmission. Figure 8 is a schematic diagram
of the three-dimensional structure of a three-dimensional fan-
out RF microsystem prototype.
Antenna Layer
Feeder Layer
Chip's Layer
RDL & BGA
Figure 8. Schematic diagram of 3D fan-out RF microsystem.
The 3D fan-out RF microsystem is fabricated by using
the wafer-level fan-out packaging process platform. First of
all, double-sided wiring is carried out on the glass wafer, the
front wiring layer of the glass wafer is used as the radiation
patch of the antenna, and the back is used as the connection
line between the feeder layer of the antenna and the chip.
After the ball is planted, the chip is flip-welded to the back of
the glass wafer, and then the five chips are reformed into
resin wafers by injection molding. Through the rewiring
process, the interconnection between the chips and the final
external lead-out end are made on the resin wafer. Then
through the ball planting process, a solder ball bump is
planted on the surface leading end of the resin wafer to form
the final package. The process prototype of 3D fan-out RF
microsystem is shown in figure 9.
Figure 9. Process prototype of 3D fan-out RF microsystem.
 CONCLUSION
In this paper, the wafer-level RDL technology is used to
fabricate the 5G IoT communication antenna on the 12-inch
glass wafer. The S parameters of the transmission line are
tested by the RF millimeter wave probe, and the RF
transmission loss of the glass wafer in the 0~67GHz range is
obtained. The results show that the RF transmission loss of
the glass wafer is very small and can be used as the
packaging substrate of RF devices. A coupled slot antenna is
designed on the glass wafer. The antenna works in the range
of 27.8GHz to 28.7GHz, and the antenna gain can reach
5.91dB. On this basis, a prototype of 3D fan-out RF
microsystem for 5G IoT communication is designed and
fabricated. Through the wafer-level fan-out packaging
process platform, the prototype is fabricated, and the process
of permanent bonding between glass wafer and resin wafer is
adopted, so that the package has higher structural strength,
higher reliability, less warping and lower process complexity.
The above results verify the effectiveness of glass wafers as
RF device packaging, and provide a feasible three-
dimensional fan-out microsystem integration solution for 5G
IoT communication.
2020 21st International Conference on Electronic Packaging Technology (ICEPT)
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