Bidirectional Shift Registers

Module 57

LCST – Logic Circuits and Switching

th
Theory
Source: Digital Fundamentals by Floyd, T. 11 Edition

Module 57 – Bidirectional Shift Registers 1

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Introduction

 A bidirectional shift register is one in which the data can be

shifted either left or right.

 It can be implemented by using gating logic that enables the

transfer of a data bit from one stage to the next stage to the
right or to the left, depending on the level of a control line.

Module 57 – Bidirectional Shift Registers 2

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Learning Objectives
 After completing this module, the learners
should be able to:

1. Explain the operation of a bidirectional shift register

2. Discuss the 74HC194 4-bit bidirectional universal shift

register

3. Develop and analyze timing diagrams for bidirectional

shift registers.

Module 57 – Bidirectional Shift Registers 3

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4-Bidirectional Shift Register

Module 57 – Bidirectional Shift Registers 4

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4-Bidirectional Shift Register cont’d

 EXAMPLE 7–11

Module 57 – Bidirectional Shift Registers 5

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4-Bidirectional Shift Register cont’d

Module 57 – Bidirectional Shift Registers 6

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER

 Fixed-Function Device

Module 57 – Bidirectional Shift Registers 7

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER cont’d

 A universal shift register has both serial and

parallel input and output capability.

 Parallel loading, which is synchronous with a

positive transition of the clock, is accomplished
by applying the four bits of data to the parallel
inputs and a HIGH to the S0 and S1 inputs.

 Shift right is accomplished synchronously with

the positive edge of the clock when S0 is HIGH
and S1 is LOW.

 Serial data in this mode are entered at the shift-

right serial input (SR SER).

Module 57 – Bidirectional Shift Registers 8

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER cont’d

 When S0 is LOW and S1 is HIGH, data bits shift

left synchronously with the clock, and new data
are entered at the shift-left serial input (SL SER).

 Input SR SER goes into the Q0 stage, and SL SER

goes into the Q3 stage.

Module 57 – Bidirectional Shift Registers 9

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER cont’d

Module 57 – Bidirectional Shift Registers 10

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER cont’d

 Programmable Logic Device (PLD)

 The following code describes a 4-bit bidirectional shift register

with a serial input:

Module 57 – Bidirectional Shift Registers 11

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IMPLEMENTATION:
4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER cont’d

 Programmable Logic Device (PLD)

Module 57 – Bidirectional Shift Registers 12

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Mastery Exercises

Module 57 – Bidirectional Shift Registers 13

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