Power-On Configurations S812 Revision 0.

Application Notes

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Power-On Configurations

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S812
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AMLOGIC, Inc.
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2518 Mission College Blvd

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Santa Clara, CA 95054

U.S.A.
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www.amlogic.com

AMLOGIC reserves the right to change any information described herein at any time without notice.
AMLOGIC assumes no responsibility or liability from use of such information.

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Power-On Configurations S812 Revision 0.1

Table of Content
1 GENERAL DESCRIPTION....................................................................................................................................... 4
2 POWER-ON FLOW CHART .................................................................................................................................... 4
3 POWER-ON CONFIGURATION TABLE................................................................................................................ 5
4 INITIALIZATION ..................................................................................................................................................... 5

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Power-On Configurations S812 Revision 0.1

Revision History
Revision Revised Date By Changes
Number
0.1 Aug. 20, 2014 Kevin Zhu Initial release draft

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Power-On Configurations S812 Revision 0.1

1 General Description
This document is a user guide of S812 power–on mode configurations. S812 can be configured to boot from NAND,
eMMC, tSD, SPI NOR and SD card.

2 Power-on Flow Chart

S812 supports the following 4 boot solutions:

 NAND + (SDIO/USB)

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 (eMMC) + (SDIO/USB)
 tSD + (SDIO/USB)
 SPI + (SDIO/USB)

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User can follow the flow chart shown below to configure the desired booting mode. The detailed set-up can be
found in the next section.

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Figure 1. Power-on Flow Chart
START

DEV_1ST_CFG
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01x 100/001 11x 101

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eMMC tSD_SDIO NAND SPI

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DATA CHECK

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DEV_2ND_CFG
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10 11 01

SDIO_A SDIO_B SDIO_C

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DATA CHECK

USBBOOT_EN
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JUMP TO SRAM USB BOOT

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3 Power-on Configuration Table

As shown in the table below, user can simply pull the corresponding pads to high or low to set up the booting modes.

Table 1. Power-on Configuration Table

Pad Function Bit Default Comments
BOOT_14 DEV_1ST_CFG2 9 1 **DEV_1ST_CFG[2:0]:
BOOT_13 POC_RESERVED 8 1 111:NAND(Default)
BOOT_12 DEV_1ST_CFG1 7 1 110:NAND_TOGGLE
BOOT_11 DEV_1ST_CFG0 6 1 101:SPI
100:tSD_SD_A
011:eMMC_SD_C
010:eMMC_SD_A
001:tSD_SD_C

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000:SKIP_1ST
BOOT_7 POC_RESERVED 5 1
BOOT_6 POC_RESERVED 4 1

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BOOT_5 DEV_2ND_CFG1 3 1 **DEV_2ND_CFG[1:0]:
BOOT_4 DEV_2ND_CFG0 2 1 11:SD_B (default)
10:SD_A
01: SD_C

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00:SKIP_2ND
BOOT_3 POC_RESERVED 1 1
BOOT_2 USBOOT_EN 0 1 **USBOOT_EN:
1:USBOOT(default)

Here are typical applications:

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0:SKIP_USBOOT

a) NAND w/o toggle(boot pins) + SDIO_B(card pins), ---- no external pull-down

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b) tSD/eMMC(boot pins) + SDIO_B(card pins), ---- only one pull-down on boot_14/nand_ren_wr which
doesn’t affect tSD/eMMC pins
c) SPI(boot pins, boot device) + NAND w/o toggle(boot pins, companion device) + SDIO_B(card pins), ----
only one pull-down on boot_12/nand_cle/nor_q which should be ok since nand_cle/nor_q is not critical
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d) NAND w/ toggle(boot pins) + SDIO_B(card pins), -- only one pull-down on boot_11/nand_ale/nor_d

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which should be ok since nand_ale/nor_d is not critical

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4 Initialization
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A typical initialization routine is:

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a. Disable Instruction and Data Cache;

b. Disable all pad's pull-up except TEST_N;
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c. Initialize stack pointer;

d. Call RomCode ;
e. Jump to memory location where boot_loader is moved in;

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