Dell laptop schematic overview

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MODEL NAME : QLM00
PCB NO : LA-7841P ( DA********** )
BOM P/N : TBD
1 1
Dell/Compal Confidential
Schematic Document
2
Phantom(Chief River) 2
Ivy Bridge ULV(BGA1023) + Panther Point

DISCRETE VGA N13P-GV(optimus)
2012-01-19
Rev: 1.0 (X04)
3 3
@ : Nopop Component
CONN@ : Connector Component
DIS@ : pop when DIS configuration
UMA@ : pop when UMA configuration
MB Type BOM P/N
TPM 4319EJ31L01
TCM 4319EJ31L02 2@ 4@
TPM DIS/ TCM DIS 2@ 3@
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.3
LA-7841P
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DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 07, 2012 Sheet 1 of 65
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ZZZ
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PCB-MB
Conn. P.8 P.43
128M*16 x 4 =1GB
VGA +VCCP VRAM * 4 Fan Control LID SW
P.39 P.40
DC/DC GDDR5 P.29~30 Intel
P.33 P.57
64 bit Ivy Bridge RTC Circuit
P.16
1
System Single Channel DDRIII-DIMM x 1 1
+1.5V / Processor 1.5V DDR3 1333 MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7

DC/DC GPU PEG 2.0 x16 P.14 Power SW
P.34
+0.75VS P.58 N13P-GV ULV 17W DC (Daughter Board) P.39
8GB Max
GB2-64 BGA 1023 Balls
DCIN / BATT +VCCSA P.24 ~ 28 P.7 ~ 13
CONN P.53 P.59
FDI x8 DMI x4
CPU / iGPU 100MHz 100MHz
CHARGER 2.7GT/s 20Gb/s
CORE
P.54 P.60
LVDS Conn. LVDS (Dual Channel) SATA3.0 Port 0 SATA3 Re-Driver SATA HDD Conn.
3/5V ALW dGPU P.35 PS8520 P.43 P.43
CORE
P.55 P.61
HDMI Conn. HDMI 1.4 (1.65Gb/s) Port 1 SATA3 Re-Driver Mini Card-2 Daughter board
P.36
PS8520 mSATA DIS SKU
2 P.43 ( Full ) P.48 2
+1.8VS (DIS Only)
Intel
P.56 DisplayPort 1.1 USB 3.0 Port 1
Mini DP Conn. Panther Point USB 3.0 Conn. X1
Port 0
P.37
PCH HM77 USB2.0 P.44
Port 2
USB 3.0 Conn. X1
( Power Share ) P.45
Port 1
PI5USB1457 P.45
BGA 989 Balls
PCI-E x1
Port 4 Port 3 Port 1 Port 5 Mini Card-2 SIM Daughter board
WWAN P.48 UMA SKU
( Full ) P.48
Card Reader Mini Card-1 LAN(GbE)
RTS5209 WLAN / BT4.0 RTL8111F
P.48 Half P.42 P.41
Port 12
Digital Camera
P.35
HD Audio Digi Mic (Array) P.35
3 in 1 USB2.0
3
Socket Port 4 RJ45 P.16 ~ 23

3
P.48 P.41
Audio Codec
Daughter board ALC3260 P.48
SPI ROM SPI LPC Bus Headphone / Mic
8M x 1P.16 Jack x 1
33MHz
Int. Speaker x2 ( Combo )
P.48
P.48
Discrete TPM ENE KBC
AT97SC3204 Daughter board
KB9012
P.40 P.38
KB matrix PS/2
Int.KBD Touch Pad

P.39 P.39
4 4
Security Classification Compal Secret Data Compal Electronics,Inc.

C 0.3
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Compal Confidential
Project Code : QLM00
File Name : LA-7841P
1 LA-7841P M/B 1
Camera
LS-7841P POWER BUTTON BOARD
LS-7842P LED INDICATE BOARD
LS-7843P BATTERY INDICATED BOARD
LS-7844P I/O BOARD 40 pin LCD Panel
Wire
IO/B
40 pin
FFC
INDICATOR/B 10 pin HDD

Wire Wire
2
Led-Wireless
6 pin 2
Led-CapsLock
4 pin
FFC
TP LED/B
Touch Pad FFC Led x 6
POWER BUTTON/B
4 pin on/off SW
Lid Led x 1
3 3
4 pin 4 pin
Wire Wire
FRONT LIGHT L/B FRONT LIGHT R/B
Led x 2 Led x 2
4 4

Block Diagram
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
0.3
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A
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Board ID Table for AD channel
Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Board ID PCB Revision 0 None
0 0 0 V 0 V 0.155 V 0x00-0x0C 0 0.1
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 0x0D-0x1C 1 0.2 1 JUSB1 (2.0 Ext Left Side)
2 18K +/- 5% 0.375 V 0.503 V 0.621 V 0x1D-0x30 2 0.3
3 33K +/- 5% 0.634 V 0.819 V 0.945 V 0x31-0x49 3 0.4 2 Bluetooth
4 56K +/- 5% 0.958 V 1.185 V 1.359 V 0x4A-0x69 4 1.0
5 100K +/- 5% 1.372 V 1.650 V 1.838 V 0x6A-0x8E 5 3 CAMERA
6 200K +/- 5% 1.851 V 2.200 V 2.420 V 0x8F-0xBB 6
7 NC 2.433 V 3.300 V 3.300 V 0xBC-0xFF 7 4 JMINI1 (WLAN)
PCH
SMBUS Control Table
5 JMINI2 (WWAN/DMC)
Thermal Thermal VGA Thermal
SOURCE MINI1 MINI2 BATT SODIMM FFS VGA DMC XDP Charger
Sensor 1 Sensor 2 Sensor 6 ELC 8051
EC_SMB_CK1
EC_SMB_DA1
KB930
V 7 None
EC_SMB_CK2
EC_SMB_DA2
KB930
V V V 8 None
PCH_SML0CLK PCH Link
PCH_SML0DATA 9 None
PCH_SML1CLK
PCH_SML1DATA
PCH
V 10 None
MEM_SMBCLK
MEM_SMBDATA
PCH
V V V V V V V 11 None
12 None
CLKOUT DESTINATION 13 None

1 1
PCI0 PCH_LOOPBACK
PCI1 EC LPC
PCI2 None
SATA DESTINATION PCI EXPRESS DESTINATION
PCI3 None
SATA0 HDD Lane 1 10/100/1G LAN
PCI4 None
SATA1 None Lane 2 MINI CARD-2 WWAN/DMC
SATA2 ODD Lane 3 MINI CARD-1 WLAN

DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
SATA3 None Lane 4 CARD READER
CLKOUT_PCIE0 None CLKOUTFLEX0 None
SATA4 None Lane 5 None
CLKOUT_PCIE1 10/100/1G LAN CLKOUTFLEX1 None
SATA5 None Lane 6 USB 3.0
CLKOUT_PCIE2 MINI CARD-2 WWAN CLKOUTFLEX2 None
Lane 7 None
Symbol Note :
CLK CLKOUT_PCIE3 MINI CARD-1 WLAN CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 CARD READER : means Digital Ground
CLKOUT_PCIE5 None
: means Analog Ground
CLKOUT_PCIE6 USB 3.0
CLKOUT_PCIE7 None Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
Notes List
Size Document Number Rev
CLKOUT_PEG_B None AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
LA-7841P 0.3
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A
5 4 3 2 1
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+3VS
2.2K IO
2.2K
14 CONN
2.2K
SMBUS Address [0x9a]
WWAN/mSATA
+3V_PCH 15 SMBUS Address [TBD]
D 2.2K D
+3VS
H14 SMBCLK 202
DMN66D0
C9 SMBDATA 200 DIMMA SMBUS Address [A0]
DMN66D0
4
5 TP SMBUS Address [TBD]
2.2K +3VS_WLAN
PCH +3V_PCH
2.2K 30 SMBUS Address [TBD]
C8 SML0CLK WLAN
2.2K
32
2.2K
G12 SML0DATA
+3VS_WLAN
32 4 SMBUS Address [TBD]
DMN66D0 WLAN G Sensor
30 6
DMN66D0
M16 E14
SML1CLK 2.2K
SML1DATA 2.2K
+3V_PCH
C C
DMN66D0 DMN66D0
EC_SMB_CK2 8.2K
EC_SMB_DA2 +3VS +3VS

8.2K
80 79
2.2K
2.2K
+3VS
10
DMN66D0 Camera
9
DMN66D0
KBC +3V_GPU
B B
2.2K
2.2K
+3V_GPU
D9
DMN66D0
D8 GPU SMBUS Address [0x9E]
4.7K DMN66D0
+3VALW
4.7K
77 EC_SMB_CK1
100 ohm 4
78 EC_SMB_DA1 100 ohm 5 BATTERY SMBUS Address [TBD]
CONN
9
CHARGER
8
A A

PROCESSOR(1/7) DMI,FDI,PEG
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Custom 0.3
5 4 3 2 1
5 4 3 2 1
EN_INVPWR
WWW.AliSaler.Com SI3457BDV
QV29
+INV_PWR_SRC RT8207MZQW
PU300
+0.75VS
CPU1.5V_S3_GATE AO4728L
+1.5V_CPU_VDDQ
QU6
SYSON RT8207MZQW
+1.5V
PU300
SUSP# SI3456DDV
ADAPTER +1.5VS
D D
UZ4
SUSP# TPS51212DSCR
+VCCP
PU500
VR_ON ISL95836HRTZ
BATTERY B+ +VCC_CORE /
PU700 +VCC_GFXCORE_AXG
PWRSHARE_EN_EC#
TPS2062ADR
UI2 +5V_CHGUSB
CHARGER PM_SLP_S3#
SI3456DDV
QN1 +5VS_HDD ODD_EN#
FDC655BN
SUSP# QN4 +5VS_ODD AC mode Ta -> Tb -> Tc
SI4800BDY
QZ6 +5VS EN_DFAN1 DC mode Tc -> Ta -> Tb
APE8873M
PCH_PWR_EN UE4 +FAN_POWER
EC_ON / +5VALW AO3419L Power Bottom & +3V/+5V_ALW
QH5 +5V_PCH BATBTN &
VCOUT0_PH / USBCHG_DET
MAINPWON RT8205LZQW
+V1.05S_VCCP_PWRGOOD RT8205LZQW
PU200 Tc ON/OFF EC_ON Ta +VSBP
C PGOOD C
+3VALW TPS51461RGER
PU600 +VCCSA
ENE KB9012 Tb TP0610K
PCH_PWR_EN
SI3456DDV
QZ12 +3V_PCH
EC_ENVDD / PWRBTN# 4 PBTN_OUT# +3V/+5V_PCH
SUSP# VGA_LVDDEN
SY8033BDBC AO3419L PCH
PU400 +1.8VS QV27 +LCDVDD
AO3419L/SI3456DDV
SUSP# EN_CAM
DPWROK 5 PCH_DPWROK PCH_PWR_EN 4
SI4800BDY SI2301CDS
QZ8 +3VS QV31 +3VS_CAM
EN_WOL WLAN_EN RSMRST# 6 PCH_RSMRST#
+1.5V/+0.75VS
AO3419L SI3456DDV
QL3 +LAN_IO QM1 +3VS_WLAN
ACPRESENT 7 AC_PRESENT RT8207MZQW
SYSON 9 PGOOD
SLP_S5# 8 PM_SLP_S5#
+1.8VS
SLP_S3# 10 PM_SLP_S3#
SUSP# 12 SY8033BDBC
PGOOD
APWROK 11 PCH_APWROK +3VS

B B
PWROK 17 PCH_PWROK SI4800BDY
+5VS
SYS_PWROK
18
GPU +3VS +1.5V +VCCP
SI4800BDY
+1.5VS
DGPU_PWR_EN RC delay RC delay
AO3419L SI4634DY SI4634DY
UZ2 UZ1 +VCC_CORE/+VCC_GFXCORE_AXG
QZ1
SI3456DDV
ISL95836HRTZ-T
+3V_GPU +1.5VSDGPU +1.05VSDGPU
16 VR_ON +VCCP
PGOOD
B+ TPS51212DSCR
+VCCSA
VGATE PGOOD
+1.5V_CPU_VDDQ
14 TPS51461RGER
PGOOD
ISL62883CHRTZ
AO4728L
SA_PGOOD 15
A
PU800 13 CPU1.5V_S3_GATE A
+GPU_CORE

Power Diagram
Size
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PEG_RCOMPO (G4) R_COMP place close to CPU
width 4 mils
PEG_ICOMPI (G3) VCC_IO PEG_ICOMPI and RCOMPO signals should be
shorted and routed with
Trace length width 12 mils max length = 500 mils
Max is 500 mils PEG_ICOMPO (G1) R_COMP
- typical impedance = 43 mohms
+VCCP PEG_ICOMPO signals should be routed with
U2A RU1
D G3 PEG_COMP 2 1 max length = 500 mils D
PEG_ICOMPI G1 - typical impedance = 14.5 mohms
M2 PEG_ICOMPO G4 24.9_0402_1%
<18> DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO
P6
<18> DMI_CRX_PTX_N1 DMI_RX#[1]
P1
<18> DMI_CRX_PTX_N2 DMI_RX#[2]
P10 H22 PEG_GTX_C_HRX_N15
<18> DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] J21 PEG_GTX_C_HRX_N14
N3 PEG_RX#[1] B22 PEG_GTX_C_HRX_N13
<18> DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2]
P7 D21 PEG_GTX_C_HRX_N12
DMI
P3 A19 PEG_GTX_C_HRX_N11
P11 D17 PEG_GTX_C_HRX_N10
<18> DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] B14 PEG_GTX_C_HRX_N9
K1 PEG_RX#[6] D13 PEG_GTX_C_HRX_N8
<18> DMI_CTX_PRX_N0 M8 DMI_TX#[0] PEG_RX#[7] A11 PEG_GTX_C_HRX_N7
<18> DMI_CTX_PRX_N1 N4 DMI_TX#[1] PEG_RX#[8] B10 PEG_GTX_C_HRX_N6
<18> DMI_CTX_PRX_N2 R2 DMI_TX#[2] PEG_RX#[9] G8 PEG_GTX_C_HRX_N5
<18> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8 PEG_GTX_C_HRX_N4
K3 PEG_RX#[11] B6 PEG_GTX_C_HRX_N3
<18> DMI_CTX_PRX_P0 M7 DMI_TX[0] PEG_RX#[12] H8 PEG_GTX_C_HRX_N2
<18> DMI_CTX_PRX_P1 P4 DMI_TX[1] PEG_RX#[13] E5 PEG_GTX_C_HRX_N1
<18> DMI_CTX_PRX_P2 T3 DMI_TX[2] PEG_RX#[14] K7 PEG_GTX_C_HRX_N[0..15]
PEG_GTX_C_HRX_N0
<18> DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] PEG_GTX_C_HRX_N[0..15] <24> PT
K22 PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_P[0..15]
CPU Option
PEG_RX[0] K19 PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_P[0..15] <24>
PEG_RX[1] C21 PEG_GTX_C_HRX_P13 PEG_HTX_C_GRX_N[0..15]
U7 PEG_RX[2] D19 PEG_GTX_C_HRX_P12 PEG_HTX_C_GRX_N[0..15] <24>
<18> FDI_CTX_PRX_N0 W11 FDI0_TX#[0] PEG_RX[3] C19 PEG_GTX_C_HRX_P11 PEG_HTX_C_GRX_P[0..15]
<18> FDI_CTX_PRX_N1 W1 FDI0_TX#[1] PEG_RX[4] D16 PEG_GTX_C_HRX_P10 PEG_HTX_C_GRX_P[0..15] <24>
<18>
<18>
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
AA6 FDI0_TX#[2] PEG_RX[5] C13 PEG_GTX_C_HRX_P9 Sandy Bridge 1.6G
W6 FDI0_TX#[3] PEG_RX[6] D12 PEG_GTX_C_HRX_P8 U2
<18> FDI_CTX_PRX_N4 V4 FDI1_TX#[0] PEG_RX[7] C11 PEG_GTX_C_HRX_P7
<18> FDI_CTX_PRX_N5 Y2 FDI1_TX#[1] PCI EXPRESS -- GRAPHICS PEG_RX[8] C9 PEG_GTX_C_HRX_P6
C <18> FDI_CTX_PRX_N6 AC9 FDI1_TX#[2] PEG_RX[9] F8 PEG_GTX_C_HRX_P5 C
<18> FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
Intel(R) FDI
C8 PEG_GTX_C_HRX_P4
PEG_RX[11] C5 PEG_GTX_C_HRX_P3
U6 PEG_RX[12] H6 PEG_GTX_C_HRX_P2
<18> FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13] SNB1.6G
W10 F6 PEG_GTX_C_HRX_P1 CPU_SNB1.6G@
<18> FDI_CTX_PRX_P1 W3 FDI0_TX[1] PEG_RX[14] K6 PEG_GTX_C_HRX_P0
<18> FDI_CTX_PRX_P2 AA7 FDI0_TX[2] PEG_RX[15] PT
<18> FDI_CTX_PRX_P3 W7 FDI0_TX[3] G22 1 2
PEG_HTX_GRX_N15 CU1 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N15
<18>
<18>
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
T4 FDI1_TX[0] PEG_TX#[0] C23 PEG_HTX_GRX_N14 CU2 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N14 Ivy Bridge 1.5G
AA3 FDI1_TX[1] PEG_TX#[1] D23 PEG_HTX_GRX_N13 CU3 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N13 U2
<18> FDI_CTX_PRX_P6 AC8 FDI1_TX[2] PEG_TX#[2] F21 PEG_HTX_GRX_N12 1 2 PEG_HTX_C_GRX_N12
CU4 @ 0.22U_0402_16V7K~D
<18> FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19 1 2
PEG_HTX_GRX_N11 CU5 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N11
AA11 PEG_TX#[4] C17 PEG_HTX_GRX_N10 CU6 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N10
<18> FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
AC12 K15 PEG_HTX_GRX_N9 CU7 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N9
<18> FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17 PEG_HTX_GRX_N8 CU8 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N8
U11 PEG_TX#[7] F14 PEG_HTX_GRX_N7 CU9 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N7
<18> FDI_INT FDI_INT PEG_TX#[8] IVB1.5G
A15 PEG_HTX_GRX_N6 CU10 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N6 CPU_IVB1.5G@
AA10 PEG_TX#[9] J14 PEG_HTX_GRX_N5 CU11 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N5
<18> FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10]
AG8 H13 PEG_HTX_GRX_N4 CU12 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N4
<18> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] M10 PEG_HTX_GRX_N3 CU13 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N3
PEG_TX#[12] F10 PEG_HTX_GRX_N2 CU14 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N2 Ivy Bridge 1.7G
+VCCP PEG_TX#[13] D9 PEG_HTX_GRX_N1 CU15 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N1 U2
RU2 PEG_TX#[14] J4 PEG_HTX_GRX_N0 CU16 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_N0
1 2 EDP_COMP AF3 PEG_TX#[15]
AD2 eDP_COMPIO F22 PEG_HTX_GRX_P15
PT
CU17 1 2 @
SSI2
0.22U_0402_16V7K~D PEG_HTX_C_GRX_P15
24.9_0402_1% AG11 eDP_ICOMPO PEG_TX[0] A23 PEG_HTX_GRX_P14 CU18 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P14
eDP_HPD# PEG_TX[1] D24 PEG_HTX_GRX_P13 CU19 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P13
PEG_TX[2] E21 PEG_HTX_GRX_P12 CU20 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P12
PEG_TX[3] IVB1.7G
AG4 G19 PEG_HTX_GRX_P11 CU21 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P11 CPU_IVB1.7G@
AF4 eDP_AUX# PEG_TX[4] B18 PEG_HTX_GRX_P10 CU22 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P10
eDP_AUX PEG_TX[5] K17 PEG_HTX_GRX_P9 CU23 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P9
PEG_TX[6]
eDP
eDP_COMPIO and ICOMPO signals G17 PEG_HTX_GRX_P8 CU24 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P8

B AC3 PEG_TX[7] E14 PEG_HTX_GRX_P7 CU25 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P7 B
should be shorted near balls and AC4 eDP_TX#[0] PEG_TX[8] C15 PEG_HTX_GRX_P6 1 2 PEG_HTX_C_GRX_P6
CU26 DIS@ 0.22U_0402_16V7K~D
routed with typical impedance AE11 eDP_TX#[1] PEG_TX[9] K13 PEG_HTX_GRX_P5 CU27 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P5
<25 mohms AE7 eDP_TX#[2] PEG_TX[10] G13 PEG_HTX_GRX_P4 CU28 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P4
eDP_TX#[3] PEG_TX[11] K10 PEG_HTX_GRX_P3 CU29 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P3
AC1 PEG_TX[12] G10 PEG_HTX_GRX_P2 CU30 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P2
AA4 eDP_TX[0] PEG_TX[13] D8 PEG_HTX_GRX_P1 CU31 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P1
AE10 eDP_TX[1] PEG_TX[14] K4 PEG_HTX_GRX_P0 CU32 1 2 DIS@ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P0
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3] SSI2
IVY-BRIDGE_BGA1023~D
@
Typ- suggest 220nF. The change in AC capacitor

Trace length Max is 500 mils value from 100nF to 220nF is to enable compatibility
with future platforms having PCIE Gen3 (8GT/s)
R_COMP place close to CPU

width 4 mils
eDP_COMPIO (AF3) VCC_IO
width 12 mils
eDP_ICOMPO (AD2) R_COMP
A A

PROCESSOR(1/7) DMI,FDI,PEG
Custom 0.3
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5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com CLK_CPU_DPLL# RU25 1 2 1K_0402_5%~D

+VCCP
CLK_CPU_DPLL RU24 1 2 1K_0402_5%~D
U2B
J3 close to CPU within 0.5"

BCLK H2 CLK_CPU_DMI <17>
BCLK# CLK_CPU_DMI# <17> RCOMP0 & 1 : trace width = 20mil
MISC
CLOCKS
F49 RCOMP2 : trace width = 15mil
<20> H_SNB_IVB# PROC_SELECT# AG3 CLK_CPU_DPLL spacing = 20mil
@ RU18 DPLL_REF_CLK AG1 CLK_CPU_DPLL#
D 1 2 C57 DPLL_REF_CLK# SM_RCOMP0 RU58 2 1 140_0402_1% D
10K_0402_5%~D PROC_DETECT#
N59 SM_RCOMP1 RU59 2 1 25.5_0402_1%
BCLK_ITP CLK_RES_ITP <17>
N58
BCLK_ITP# CLK_RES_ITP# <17>
SM_RCOMP2 RU61 2 1 200_0402_1%
H_CATERR# C49
PAD~D T15 @ CATERR#
THERMAL
ST RU31
1 SHORT 2 H_PECI_ISO A48 AT30 H_DRAMRST#
<20,38> H_PECI PECI SM_DRAMRST#
0_0402_5%~D
+VCCP
BF44 SM_RCOMP0
PU/PD for JTAG signals
+VCCP H_PROCHOT#_R C45 SM_RCOMP[0] BE43 SM_RCOMP1
DDR3
MISC
close to CPU PROCHOT# SM_RCOMP[1] BG43 SM_RCOMP2 XDP_TMS RU17 1 2 51_0402_5%
within 0.3" ~ 1.5" SM_RCOMP[2]
2
XDP_TDI_R RU23 1 2 51_0402_5%

RU30 D45
<20> H_THERMTRIP# THERMTRIP#
62_0402_5% XDP_TDO RU27 1 2 51_0402_5%
RU32 N53 XDP_PRDY#

1
1 2 H_PROCHOT#_R PRDY# N55 XDP_PREQ# XDP_TCK RU28 1 2 51_0402_5%

<38,54> H_PROCHOT# PREQ#
56_0402_5%
L56 XDP_TCK XDP_TRST# RU29 1 2 51_0402_5%
TCK L55 XDP_TMS
TMS
PWR MANAGEMENT
J58 XDP_TRST#
TRST#
JTAG & BPM

C48 M60 XDP_TDI_R RU38 1 2 0_0402_5%~D XDP_TDI
<18> H_PM_SYNC PM_SYNC TDI L59 XDP_TDO_R RU39 1 2 0_0402_5%~D XDP_TDO
TDO
H_CPUPWRGD B46 +3VS

C <20> H_CPUPWRGD UNCOREPWRGOOD C
K58 XDP_DBRESET#_R RU41 1 2 0_0402_5%~D XDP_DBRESET#
DBR# XDP_DBRESET# <18> XDP_DBRESET# RU35 1 2 1K_0402_5%~D
close to main route without stub PM_SYS_PWRGD_BUF_R BE45 G58 XDP_BPM#0 @ T4930PAD~D
SM_DRAMPWROK BPM#[0] E55 XDP_BPM#1
BPM#[1] @ T4931PAD~D
E59 XDP_BPM#2 T4932PAD~D
BPM#[2] @
G55 XDP_BPM#3 T4933PAD~D
BPM#[3] @
RU33 2 1 10K_0402_5%~D H_CPUPWRGD G59 XDP_BPM#4 @ T4934PAD~D
BUF_CPU_RST# D44 BPM#[4] H60 XDP_BPM#5
RESET# BPM#[5] @ T4935PAD~D
J59 XDP_BPM#6 T4936PAD~D
BPM#[6] @
J61 XDP_BPM#7 T4937PAD~D
BPM#[7] @
+VCCP CONN@
JXDP1
XDP_PREQ# 1
IVY-BRIDGE_BGA1023~D XDP_PRDY# 2 1
@ 3 2
4 3
Place near JXDP1 4
5
6 5
H_CPUPWRGD Res 6
+VCCP 7
1K, close to JXDP 8 7
within 0.5" ~ 3" 9 8
Buffered reset to CPU +3VS H_CPUPWRGD RU7 1 @ 2 1K_0402_5%~D H_CPUPWRGD_XDP 10 9
10
.1U_0402_16V7K
.1U_0402_16V7K
RU8 1 @ 2 0_0402_5%~D CFD_PWRBTN#_XDP 11
ST 1 ST 1 <18,38> PBTN_OUT# 11
CU33
CU34
RU9 1 @ 2 1K_0402_5%~D CFG0_R 12
<10> CFG0 1 2 SYS_PWROK_XDP 13 12
<18,38,60> VGATE RU10 @ 0_0402_5%~D
+VCCP @ @ 14 13
1 close to CPU 2 2 <17> CLK_CPU_ITP 14
CU35 15
within 1" ~ 2" <17> CLK_CPU_ITP#
16 15
16
1
B 0.1U_0402_16V4Z~D PLT_RST# RU12 2 @ 1 1K_0402_5%~D XDP_RST#_R 17 B

2 RU42 XDP_DBRESET# 18 17
PT 75_0402_5% 19 18
RU13 2 @ 1 0_0402_5%~D XDP_TDO 20 19
<16> PCH_JTAG_TDO 20
5
U3 RU47 The resistor for HOOK2 XDP_TRST# 21

2
1 43_0402_1% RU14 2 @ 1 0_0402_5%~D XDP_TDI 22 21

should be placed such
P
NC <16> PCH_JTAG_TDI 22
4 BUFO_CPU_RST# 1 2 BUF_CPU_RST# RU19 2 @ 1 0_0402_5%~D XDP_TMS 23
Y that the stub is very <16> PCH_JTAG_TMS 23
2 RU20 1 @ 2 0_0402_5%~D XDP_TCK1 24
<19,38,40,41,42,48> PLT_RST# A <16> PCH_JTAG_TCK 24
G
small on CFG0 net. 25 27

@ XDP_TCK 26 25 G1 28
3
SN74LVC1G07DCKR_SC70-5 RU55 26 G2
0_0402_5%~D ACES_87152-26051
2
close to SO-DIMM +1.5V

@ RU71
0_0402_5%~D
1
1 2
RU72
1K_0402_5%~D
+3V_PCH RU73
Follow DG 0.71
ST 1K_0402_5%~D
2
S
D
AND Gate and its surrounding close to CPU H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2
+1.5V_CPU_VDDQ DDR3_DRAMRST# <14>
parts keep 2" ~ 8" with Res CU36 1 within 0.5" ~ 2" SSI2
2
200 & 130 ohm RU74 QU3

G
2
1
.1U_0402_16V7K 4.99K_0402_1%~D BSS138-G_SOT23-3

2 RU60
ST U4 200_0402_5%~D
1
RU62 74AHC1G09GW_TSSOP5~D ST
5
0_0402_5%~D ST
2
1 SHORT 2 1 RU43 1 SHORT 2 DRAMRST_CNTRL

P
<12,38,58> CPU1.5V_S3_GATE B <14,17> DRAMRST_CNTRL_PCH

4 PM_SYS_PWRGD_BUF 1 2 PM_SYS_PWRGD_BUF_R RU75 0_0402_5%~D 1
A 2 O 130_0402_5% CU39 A
<18> PM_DRAM_PWRGD A
G
RU117 .047U_0402_16V7K
3
1 2 RU63 2
+3V_PCH
200_0402_5%~D 39_0402_5%
RU118 0_0402_5%~D @
1 2
1 @ 2
D
2
SSI2
QU2 @ Security Classification Compal Secret Data Compal Electronics, Inc.
<12,34> RUN_ON_CPU1.5VS3#
G 2N7002_SOT23-3 Issued Date 2011/07/15 2012/07/15 Title
S
Deciphered Date
PROCESSOR(2/7) PM,XDP,CLK
3
Custom 0.3
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5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com U2C U2D
<14> DDR_A_D[0..63] DDR_A_D0 AG6 AL4

DDR_A_D1 AJ6 SA_DQ[0] AU36 AL1 SB_DQ[0] BA34
AP11 SA_DQ[1] SA_CK[0] AV36 M_CLK_DDR0 <14> AN3 SB_DQ[1] SB_CK[0] AY34
DDR_A_D2
DDR_A_D3 AL6 SA_DQ[2] SA_CK#[0] AY26 M_CLK_DDR#0 <14> AR4 SB_DQ[2] SB_CK#[0] AR22
DDR_A_D4 AJ10 SA_DQ[3] SA_CKE[0] DDR_CKE0_DIMMA <14> AK4 SB_DQ[3] SB_CKE[0]
DDR_A_D5 AJ8 SA_DQ[4] AK3 SB_DQ[4]
DDR_A_D6 AL8 SA_DQ[5] AN4 SB_DQ[5]
DDR_A_D7 AL7 SA_DQ[6] AR1 SB_DQ[6]
D DDR_A_D8 AR11 SA_DQ[7] AU4 SB_DQ[7] D
DDR_A_D9 AP6 SA_DQ[8] AT40 AT2 SB_DQ[8] BA36
DDR_A_D10 AU6 SA_DQ[9] SA_CK[1] AU40 M_CLK_DDR1 <14> AV4 SB_DQ[9] SB_CK[1] BB36
DDR_A_D11 AV9 SA_DQ[10] SA_CK#[1] BB26 M_CLK_DDR#1 <14> BA4 SB_DQ[10] SB_CK#[1] BF27
DDR_A_D12 AR6 SA_DQ[11] SA_CKE[1] DDR_CKE1_DIMMA <14> AU3 SB_DQ[11] SB_CKE[1]
DDR_A_D13 AP8 SA_DQ[12] AR3 SB_DQ[12]
DDR_A_D14 AT13 SA_DQ[13] AY2 SB_DQ[13]
DDR_A_D15 AU13 SA_DQ[14] BA3 SB_DQ[14]
DDR_A_D16 BC7 SA_DQ[15] BE9 SB_DQ[15]
DDR_A_D17 BB7 SA_DQ[16] BB40 BD9 SB_DQ[16] BE41
DDR_A_D18 BA13 SA_DQ[17] SA_CS#[0] BC41 DDR_CS0_DIMMA# <14> BD13 SB_DQ[17] SB_CS#[0] BE47
DDR_A_D19 BB11 SA_DQ[18] SA_CS#[1] DDR_CS1_DIMMA# <14> BF12 SB_DQ[18] SB_CS#[1]
DDR_A_D20 BA7 SA_DQ[19] BF8 SB_DQ[19]
DDR_A_D21 BA9 SA_DQ[20] BD10 SB_DQ[20]
DDR_A_D22 BB9 SA_DQ[21] BD14 SB_DQ[21]
DDR_A_D23 AY13 SA_DQ[22] BE13 SB_DQ[22]
DDR_A_D24 AV14 SA_DQ[23] AY40 BF16 SB_DQ[23] AT43
DDR_A_D25 AR14 SA_DQ[24] SA_ODT[0] BA41 M_ODT0 <14> BE17 SB_DQ[24] SB_ODT[0] BG47
DDR_A_D26 AY17 SA_DQ[25] SA_ODT[1] M_ODT1 <14> BE18 SB_DQ[25] SB_ODT[1]
DDR_A_D27 AR19 SA_DQ[26] BE21 SB_DQ[26]
DDR_A_D28 BA14 SA_DQ[27] BE14 SB_DQ[27]
DDR_A_D29 AU14 SA_DQ[28] BG14 SB_DQ[28]
DDR_A_D30 BB14 SA_DQ[29] BG18 SB_DQ[29]
DDR_A_D31 BB17 SA_DQ[30] AL11 DDR_A_DQS#0 DDR_A_DQS#[0..7] <14> BF19 SB_DQ[30] AL3
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 BD50 SB_DQ[31] SB_DQS#[0] AV3
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 BF48 SB_DQ[32] SB_DQS#[1] BG11
DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 BD53 SB_DQ[33] SB_DQS#[2] BD17
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 BF52 SB_DQ[34] SB_DQS#[3] BG51
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 BD49 SB_DQ[35] SB_DQS#[4] BA59
DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 BE49 SB_DQ[36] SB_DQS#[5] AT60
SA_DQ[37] SA_DQS#[6] SB_DQ[37] SB_DQS#[6]
DDR SYSTEM MEMORY A
DDR_A_D38 AT48 AK55 DDR_A_DQS#7 BD54 AK59
DDR SYSTEM MEMORY B

DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] BE53 SB_DQ[38] SB_DQS#[7]
C DDR_A_D40 BA49 SA_DQ[39] BF56 SB_DQ[39] C
DDR_A_D41 AV49 SA_DQ[40] BE57 SB_DQ[40]
DDR_A_D42 BB51 SA_DQ[41] BC59 SB_DQ[41]
DDR_A_D43 AY53 SA_DQ[42] AY60 SB_DQ[42]
DDR_A_D44 BB49 SA_DQ[43] BE54 SB_DQ[43]
DDR_A_D45 AU49 SA_DQ[44] AJ11 DDR_A_DQS0 DDR_A_DQS[0..7] <14> BG54 SB_DQ[44]
DDR_A_D46 BA53 SA_DQ[45] SA_DQS[0] AR10 DDR_A_DQS1 BA58 SB_DQ[45] AM2
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 AW59 SB_DQ[46] SB_DQS[0] AV1
DDR_A_D48 BA55 SA_DQ[47] SA_DQS[2] AU17 DDR_A_DQS3 AW58 SB_DQ[47] SB_DQS[1] BE11
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 AU58 SB_DQ[48] SB_DQS[2] BD18
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 AN61 SB_DQ[49] SB_DQS[3] BE51
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 AN59 SB_DQ[50] SB_DQS[4] BA61
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 AU59 SB_DQ[51] SB_DQS[5] AR59
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] AU61 SB_DQ[52] SB_DQS[6] AK61
DDR_A_D54 AP56 SA_DQ[53] AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D55 AP52 SA_DQ[54] AR58 SB_DQ[54]
DDR_A_D56 AN57 SA_DQ[55] AK58 SB_DQ[55]
DDR_A_D57 AN53 SA_DQ[56] AL58 SB_DQ[56]
DDR_A_D58 AG56 SA_DQ[57] AG58 SB_DQ[57]
DDR_A_D59 AG53 SA_DQ[58] AG59 SB_DQ[58]
DDR_A_D60 AN55 SA_DQ[59] AM60 SB_DQ[59]
AN52 SA_DQ[60] BG35 DDR_A_MA[0..15] <14> AL59 SB_DQ[60] BF32
DDR_A_D61 DDR_A_MA0
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 AF61 SB_DQ[61] SB_MA[0] BE33
DDR_A_D63 AK56 SA_DQ[62] SA_MA[1] BE35 DDR_A_MA2 AH60 SB_DQ[62] SB_MA[1] BD33
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 SB_DQ[63] SB_MA[2] AU30
SA_MA[3] AT34 DDR_A_MA4 SB_MA[3] BD30
SA_MA[4] AU34 DDR_A_MA5 SB_MA[4] AV30
SA_MA[5] BB32 DDR_A_MA6 SB_MA[5] BG30
BD37 SA_MA[6] AT32 DDR_A_MA7 BG39 SB_MA[6] BD29
<14> DDR_A_BS0 BF36 SA_BS[0] SA_MA[7] AY32 DDR_A_MA8 BD42 SB_BS[0] SB_MA[7] BE30
<14> DDR_A_BS1 BA28 SA_BS[1] SA_MA[8] AV32 DDR_A_MA9 AT22 SB_BS[1] SB_MA[8] BE28
<14> DDR_A_BS2 SA_BS[2] SA_MA[9] BE37 DDR_A_MA10 SB_BS[2] SB_MA[9] BD43
B SA_MA[10] BA30 DDR_A_MA11 SB_MA[10] AT28 B
SA_MA[11] BC30 DDR_A_MA12 SB_MA[11] AV28
BE39 SA_MA[12] AW41 DDR_A_MA13 AV43 SB_MA[12] BD46
<14> DDR_A_CAS# BD39 SA_CAS# SA_MA[13] AY28 DDR_A_MA14 BF40 SB_CAS# SB_MA[13] AT26
<14> DDR_A_RAS# AT41 SA_RAS# SA_MA[14] AU26 BD45 SB_RAS# SB_MA[14] AU22
DDR_A_MA15
<14> DDR_A_WE# SA_WE# SA_MA[15] SB_WE# SB_MA[15]
IVY-BRIDGE_BGA1023~D IVY-BRIDGE_BGA1023~D
@ @
A A

PROCESSOR(3/7) DDRIII
Custom 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com U2E
CFG Straps for Processor

CFG0 B50 BE7
<8> CFG0 CFG[0] RSVD28 +V_DDR_REFA_M3 <14>
CFG1 C51 BG7
PAD~D T18 @ CFG2 B54 CFG[1] RSVD29 CFG2 RU77 1 2 1K_0402_1%~D
CFG3 D53 CFG[2]
PAD~D T17 @ CFG4 A51 CFG[3] N42 CFG4 RU78 1 @ 2 1K_0402_1%~D
CFG5 C53 CFG[4] RSVD30 L42
CFG6 C55 CFG[5] RSVD31 L45 CFG5
ST
RU85 1 @ 2 1K_0402_1%~D
CFG7 H49 CFG[6] RSVD32 L47
D CFG8 A55 CFG[7] RSVD33 CFG6 RU86 1 @
SSI2
2 1K_0402_1%~D D
PAD~D T16 @ CFG9 H51 CFG[8]
PAD~D T21 @ CFG10 K49 CFG[9] M13 CFG7 RU87 1 @ 2 1K_0402_1%~D
PAD~D T22 @ CFG11 K53 CFG[10] RSVD34 M14
PAD~D @
T4917 CFG[11] RSVD35
CFG12 F53 U14
PAD~D T28 @ CFG13 G53 CFG[12] RSVD36 W14
PAD~D T29 @ CFG14 L51 CFG[13] RSVD37 P13
PAD~D T30 @ CFG15 F51 CFG[14] RSVD38
PAD~D T31 @ CFG[15] 1 (Default value) 0
CFG16 D52
PAD~D T23 @ CFG17 L53 CFG[16] AT49
PAD~D T20 @ CFG[17] RSVD39 PCI Express* Static x16 Normal operation (match Lane numbers
K24 CFG2
RSVD40 Lane Numbering Reversal socket pin map) reversed
H43
RESERVED
VCC_VAL_SENSE PCI Express* Static x4 Lane Normal operation (match Lane numbers
As PDDG rev0.8, K43 AH2 CFG3
VSS_VAL_SENSE RSVD41 AG13
Numbering Reversal socket pin map) reversed
VCC_VAL_SENSE & RSVD42 AM14
VAXG_VAL_SENSE RSVD43 eDP enable CFG4 Disable Enable
H45 AM15
are removed. K45 VAXG_VAL_SENSE RSVD44
VSSAXG_VAL_SENSE PEG DEFER TRAINING CFG7 PEG Train immediately PEG Wait for
N50
following RESETB BIOS for
F48 RSVD45 de-assertion training
PAD~D T24 @ VCC_DIE_SENSE
follow "458544_CR_PDDG_rev_0.8",
CPU_RSVD6 H48
section "2.2.1", Intel recommends CPU_RSVD7 K48 RSVD6
providing accessibility to the pins RSVD7 11 1 x16 PCI Express (Default value)
A4
DC_TEST_A4
1
F48 & G48 for debug purpose. The C4 PCI Express 10 2 x8 PCI Express
BA19 DC_TEST_C4 D3
pins should be via through to the RSVD8 DC_TEST_D3 Bifurcation
RU83 RU84 AV19 D1 CFG[6:5] 01 reserved
backside of the board to allow 1K_0402_1%~D 1K_0402_1%~D AT21 RSVD9 DC_TEST_D1 A58 (x16 Lane)
backside probing with no BB21 RSVD10 DC_TEST_A58 A59 00 1 x8, 2 x4 PCI Express
2
connection to other BB19 RSVD11 DC_TEST_A59 C59

C AY21 RSVD12 DC_TEST_C59 A61 C
rails/components on the platform. RSVD13 DC_TEST_A61
BA22 C61
AY22 RSVD14 DC_TEST_C61 D61
NAR00 pull down 12/28/09 RSVD15 DC_TEST_D61
AU19 BD61
AU21 RSVD16 DC_TEST_BD61 BE61
BD21 RSVD17 DC_TEST_BE61 BE59
BD22 RSVD18 DC_TEST_BE59 BG61
BD25 RSVD19 DC_TEST_BG61 BG59
BD26 RSVD20 DC_TEST_BG59 BG58
RSVD21 DC_TEST_BG58 follow "452823_COUGAR_CANYON(BGA1023)_Customer_Ready_Schematic".
BG22 BG4
BE22 RSVD22 DC_TEST_BG4 BG3
It's for Huron River platform, since can't find CPU Ivy bridge BGA1023
BG26 RSVD23 DC_TEST_BG3 BE3 schematic for Chief River at this moment.
BE26 RSVD24 DC_TEST_BE3 BG1
BF23 RSVD25 DC_TEST_BG1 BE1
BE24 RSVD26 DC_TEST_BE1 BD1
RSVD27 DC_TEST_BD1
@
B B
A A

PROCESSOR(4/7) RSVD,CFG
Custom 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
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POWER U2F
+VCCP decoupling
Cap. in Page 62.
+VCC_CORE decoupling
Cap. in Page 62. +VCCP
AF46 8.5A
+VCC_CORE VCCIO[1] AG48
VCCIO[3] AG50
A26 VCCIO[4] AG51
33A A29 VCC[1] VCCIO[5] AJ17
A31 VCC[2] VCCIO[6] AJ21
ULV 17W , Max Current VCC[3] VCCIO[7]
A34 AJ25
D in Turbo Mode or HFM A35 VCC[4] VCCIO[8] AJ43 D
A38 VCC[5] VCCIO[9] AJ47
A39 VCC[6] VCCIO[10] AK50
A42 VCC[7] VCCIO[11] AK51
C26 VCC[8] VCCIO[12] AL14
D27 VCC[15] VCCIO[19] AL48
D32 VCC[16] VCCIO[20] AM16
PEG IO AND DDR IO

E26 VCC[21] VCCIO[25] AN20
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]
CORE SUPPLY
F25
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
F42 VCC[34] VCCIO[31] AB17
G42 VCC[35] VCCIO[32] AB20
C H25 VCC[36] VCCIO[33] AC13 C
H26 VCC[37] VCCIO[34] AD16
H32 VCC[40] VCCIO[37] AE14
H34 VCC[41] VCCIO[38] AE15
H35 VCC[42] VCCIO[39] AF16
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J32 VCC[50] VCCIO[47] AJ14
J34 VCC[51] VCCIO[48] AJ15
J35 VCC[52] VCCIO[49]
J37 VCC[53]
J38 VCC[54]
J40 VCC[55] +VCCP
J42 VCC[56]
K26 VCC[57] W16
K27 VCC[58] VCCIO50 W17
VCC[59] VCCIO51 1
K29 CU40
K32 VCC[60]
K34 VCC[61] 1U_0402_6.3V6K~D
K35 VCC[62] 2
K37 VCC[63]
K39 VCC[64]
VCC[66] As 473716_Ivy_Bridge_EDS(1 of 2)_Mobile_rev1.5,
K42 BC22
L25 VCC[67] VCCIO_SEL @ T25 PAD~D Page 92, VCCIO_SEL, "For Chief River platforms
L28 VCC[68] this pin should not be used"
B L33 VCC[69] B
L36 VCC[70]
L40 VCC[71] +VCCP
N26 VCC[72]
N30 VCC[73] AM25
QUIET
RAILS
N34 VCC[74] VCCPQE[1] AN22 +VCCP

VCC[75] VCCPQE[2] 1 close to CPU
N38 CU94
VCC[76] within 0.3" ~ 1.5"
1
1U_0402_6.3V6K~D
2 RU93
2 75_0402_5%
A44 H_CPU_SVIDALRT# RU94 1 2 43_0402_1%

VIDALERT# B43 VR_SVID_ALRT# <60>
VIDSCLK VR_SVID_CLK <60>
SVID
C44
VIDSOUT VR_SVID_DAT <60>
+VCC_CORE
RU92 2 1 130_0402_5%
+VCCP
2
close to CPU
close to CPU RU97 within 2"
within 0.3" ~ 1.5" 100_0402_1%~D
1
F43 VCCSENSE_R
VCC_SENSE VCCSENSE <60>
SENSE LINES
G43 VSSSENSE_R
VSS_SENSE VSSSENSE <60>
1
RU100 1 2 10_0402_1%~D RU102

+VCCP
100_0402_1%~D
AN16 VCCIO_SENSE_R
A VCCIO_SENSE AN17 VSS_SENSE_VCCIO VCCIO_SENSE <57> A
2
VSS_SENSE_VCCIO VSSIO_SENSE <57>

1
close to CPU
within 2"
RU103
10_0402_1%~D
2
@
PROCESSOR(5/7) PWR,BYPASS
Custom 0.3
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5 4 3 2 1
5 4 3 2 1
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+1.5V_CPU_VDDQ
RU105 1K_0402_1%~D
2 @ 1
1 @ 2
RU107 1K_0402_1%~D
+VCC_GFXCORE_AXG
decoupling Cap. in Page 62.
U2G POWER VREF traces should have
20 mil trace width &
+SM_VREF RU120 +0.75VS
D +VCC_GFXCORE_AXG 0_0402_5%~D spacing to other signals D
AY43
ST 2 1
AA46 SM_VREF
33A 1
VREF
AB47 VAXG[1] CU97 @ RU104
AB50 VAXG[2] .1U_0402_16V7K 0_0402_5%~D +1.5V_CPU_VDDQ +1.5V
ULV GT2 , Max Current VAXG[3] +V_DDR_REFA
AB51 2 1
in Turbo Mode AB52 VAXG[4] 2
AB53 VAXG[5] 3 1 CU95 2 1 0.1U_0402_10V7K
AB55 VAXG[6]
VAXG[7]
1
AB56 CU96 2 1 0.1U_0402_10V7K
AB58 VAXG[8] RU121 @ QU4
SSI2
AB59 VAXG[9] 100K_0402_5%~D AP2302GN-HF_SOT23-3 CU153 2 1 0.1U_0402_10V7K
AC61 VAXG[10] @ 2 RUN_ON_CPU1.5VS3
AD47 VAXG[11] CU154 2 1 0.1U_0402_10V7K
2
AD48 VAXG[12]
AD50 VAXG[13] 5A
AD51 VAXG[14] AJ28
VAXG[15] VDDQ[1]
- 1.5V RAILS
AD52 AJ33
VAXG[16] VDDQ[2]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AD53 AJ36
AD55 VAXG[17] VDDQ[3] AJ40
VAXG[18] VDDQ[4] 1 1 1 1 1 1 1 1 1 1
CU98
CU99
CU100
CU101
CU102
CU103
CU104
CU105
CU106
CU107
AD56 AL30 Intel PDDG rev0.8 :
AD58 VAXG[19] VDDQ[5] AL34
AD59 VAXG[20] VDDQ[6] AL38
330uF x 1 - Bottom CPU edge
AE46 VAXG[21] VDDQ[7] AL42 2 2 2 2 2 2 2 2 2 2 10uF x 8 - Bottom CPU edge
N45 VAXG[22] VDDQ[8] AM33 1uF x 10 - Under CPU
P47 VAXG[23] VDDQ[9] AM36
P48 VAXG[24] VDDQ[10] AM40
P50 VAXG[25] VDDQ[11] AN30
P51 VAXG[26] VDDQ[12] AN34
VAXG[27] VDDQ[13]
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
P52 AN38
VAXG[28] VDDQ[14]
330U_D2_2V_Y
P53 AR26 1 1 1 1 1 1 1 1 1
DDR3
VAXG[29] VDDQ[15]
CU109
CU110
CU111
CU112
CU113
CU114
CU115
CU116
CU117
P55 AR28
GRAPHICS
C P56 VAXG[30] VDDQ[16] AR30 + C
P61 VAXG[31] VDDQ[17] AR32
T48 VAXG[32] VDDQ[18] AR34 2 2 2 2 2 2 2 2
T58 VAXG[33] VDDQ[19] AR36 2
T59 VAXG[34] VDDQ[20] AR40
T61 VAXG[35] VDDQ[21] AV41
U46 VAXG[36] VDDQ[22] AW26
V47 VAXG[37] VDDQ[23] BA40
V48 VAXG[38] VDDQ[24] BB28
V50 VAXG[39] VDDQ[25] BG33
V51 VAXG[40] VDDQ[26]
V52 VAXG[41]
V53 VAXG[42]
V55 VAXG[43]
V56 VAXG[44]
V58 VAXG[45]
V59 VAXG[46]
W50 VAXG[47]
W51 VAXG[48]
W52 VAXG[49]
W53 VAXG[50]
W55 VAXG[51]
W56 VAXG[52]
W61 VAXG[53]
Y48 VAXG[54]
Y61 VAXG[55]
close to CPU VAXG[56]
within 2"
+1.5V_CPU_VDDQ
RU114
1 2 RU125 +1.5V_CPU_VDDQ Source
+VCC_GFXCORE_AXG
QUIET RAILS
100_0402_1%~D AM28 +1.5V_VCCDQ 1 2
ST
SENSE
LINES
B RU122 1 SHORT 2 0_0402_5%~D VCC_AXG_SENSE_R F45 VCCDQ[1] AN26 +1.5V QU5 +1.5V_CPU_VDDQ B
<60> VCC_AXG_SENSE VAXG_SENSE VCCDQ[2] AO4728L_SO8
RU123 1 SHORT 2 0_0402_5%~D VSS_AXG_SENSE_R G45 0_0603_5%~D 1 +VSBP
<60> VSS_AXG_SENSE VSSAXG_SENSE 8 1
RU115 CU137
1 2 7 2
1
100_0402_1%~D 1U_0402_6.3V6K~D 6 3
ST 2 +3VALW 5
+1.8VS RU116 RU108
1.8V RAIL
0_0805_5%~D 1.5A 100K_0402_5%~D
4
1
1 SHORT 2 +1.8VS_VCCPLL BB3
2
BC1 VCCPLL[1] RU110
Intel PDDG rev0.8 : VCCPLL[2]
330U_D2_2.5VY_R9M~D
CU138
1U_0402_6.3V6K~D
CU140
1U_0402_6.3V6K~D
CU141
BC4 100K_0402_5%~D RUN_ON_CPU1.5VS3

330uF x 1 - Bottom CPU edge 1 1 1 VCCPLL[3]
3
1uF x 2 - Top CPU edge
1
+
1
2
RU112 QU6B
2 2 BC43 0_0402_5%~D 5 2N7002DWH_SOT363-6 CU136
2 VDDQ_SENSE BA43 1 2 RU111 0.1U_0402_25V6K~D
VSS_SENSE_VDDQ <8,38,58> CPU1.5V_S3_GATE
6
SENSE LINES
330K_0402_5% 2
6A
2
L17 @RU113
@ RU113
L21 VCCSA[1] 0_0402_5%~D QU6A
+VCCSA N16 VCCSA[2] 1 2 2 2N7002DWH_SOT363-6
N20 VCCSA[3] <34,38,56,57,58> SUSP# ST
N22 VCCSA[4]
1
SA RAIL
1
P17 VCCSA[5] RUN_ON_CPU1.5VS3# <8,34>
CU155
VCCSA[6]
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
P20 U10 .1U_0402_16V7K

VCCSA[7] VCCSA_SENSE VCCSA_SENSE <59>
330U_D2_2V_Y
1 1 1 1 1 1 R16 @
VCCSA[8] 2
CU142
CU143
CU144
CU145
CU149
CU150
R18
+ R21 VCCSA[9]
U15 VCCSA[10]
VCCSA VID
2 2 2 2 2 V16 VCCSA[11]
2 V17 VCCSA[12] D48
VCCSA[13] VCCSA_VID[0] VCCSA_VID0 <59>
lines
V18 D49 VID[0] VID[1] 2011 2012

V21 VCCSA[14] VCCSA_VID[1] VCCSA_VID1 <59> 0 0 0.90 V Yes Yes
A W20 VCCSA[15] 0 1 0.85 V Yes Yes A
VCCSA[16] 1 0 0.725 V No Yes
1 1 0.675 V No Yes
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
Intel PDDG rev0.8 : 1 1 1 1 1

CU146
CU147
CU148
CU151
CU152
330uF x 1 - Bottom CPU edge IVY-BRIDGE_BGA1023~D

@
10uF x 5 - Bottom CPU edge
1uF x 5 - Under CPU 2 2 2 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
PROCESSOR(6/7) PWR
Custom 0.3
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5 4 3 2 1
5 4 3 2 1
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U2H U2I
D BG17 M4 D
A13 AM38 BG21 VSS[181] VSS[250] M58
A17 VSS[1] VSS[91] AM4 BG24 VSS[182] VSS[251] M6
A21 VSS[2] VSS[92] AM42 BG28 VSS[183] VSS[252] N1
A37 VSS[6] VSS[96] AN1 BG49 VSS[187] VSS[256] N28
A49 VSS[9] VSS[99] AN28 C29 VSS[190] VSS[259] N40
AA1 VSS[12] VSS[102] AN40 D10 VSS[193] VSS[262] N48
AA53 VSS[17] VSS[107] AP10 D29 VSS[198] VSS[267] P14
AB16 VSS[21] VSS[111] AR13 D43 VSS[202] VSS[271] P58
AB18
AB21
VSS[22]
VSS[23]
VSS[24]
VSS[112]
VSS[113]
VSS[114]
AR17
AR21
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
AB48 AR41 D54 R17
AB61 VSS[25] VSS[115] AR48 D58 VSS[206] VSS[275] R20
AC10 VSS[26] VSS[116] AR61 D6 VSS[207] VSS[276] R4
AC14 VSS[27] VSS[117] AR7 E25 VSS[208] VSS[277] R46
AC46 VSS[28] VSS[118] AT14 E29 VSS[209] VSS[278] T1
AC6 VSS[29] VSS[119] AT19 E3 VSS[210] VSS[279] T47
AD17 VSS[30] VSS[120] AT36 E35 VSS[211] VSS[280] T50
C AD20 VSS[31] VSS[121] AT4 E40 VSS[212] VSS[281] T51 C
AD4 VSS[32] VSS[122] AT45 F13 VSS[213] VSS[282] T52
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
F15
F19
VSS[214]
VSS[215]
VSS[216]
VSS[283]
VSS[284]
VSS[285]
T53
T55
AE8 AU1 F29 T56
AF1 VSS[36] VSS[126] AU11 F35 VSS[217] VSS[286] U13
AF17 VSS[37] VSS[127] AU28 F40 VSS[218] VSS[287] U8
AF21 VSS[38] VSS[128] AU32 F55 VSS[219] VSS[288] V20
AF47 VSS[39] VSS[129] AU51 G51 VSS[220] VSS[289] V61
AF48 VSS[40] VSS[130] AU7 G6 VSS[221] VSS[290] W13
AF50 VSS[41] VSS[131] AV17 G61 VSS[222] VSS[291] W15
AF51 VSS[42] VSS[132] AV21 H10 VSS[223] VSS[292] W18
AF56 VSS[46] VSS[136] AV48 H4 VSS[227] VSS[296] Y4
AF58 VSS[47] VSS[137] AV55 H53 VSS[228] VSS[297] Y47
AF59 VSS[48] VSS[138] AW13 H58 VSS[229] VSS[298] Y58
VSS[49] VSS[139] VSS[230] VSS[299] follow "458544_CR_PDDG_rev_0.8", section "2.2.1",
AG10 AW43 J1 Y59 RU119
AG14 VSS[50] VSS[140] AW61 J49 VSS[231] VSS[300] G48 1 2
Intel recommends providing accessibility to the
AG18 VSS[51] VSS[141] AW7 J55 VSS[232] VSS[301] @ 0_0402_5%~D pins F48 & G48 for debug purpose. The pins
AG47 VSS[52] VSS[142] AY14 K11 VSS[233] should be via through to the backside of the board
AG52 VSS[53] VSS[143] AY19 K21 VSS[234]
VSS[54] VSS[144] VSS[235] to allow backside probing with no connection to
AG61 AY30 K51
AG7 VSS[55] VSS[145] AY36 K8 VSS[236] A5 other rails/components on the platform.
AH4 VSS[56] VSS[146] AY4 L16 VSS[237] VSS_NCTF_1 A57
AH58 VSS[57] VSS[147] AY41 L20 VSS[238] VSS_NCTF_2 BC61
AJ13 VSS[58] VSS[148] AY45 L22 VSS[239] VSS_NCTF_3 BD3
AJ16 VSS[59] VSS[149] AY49 L26 VSS[240] VSS_NCTF_4 BD59
AJ20 VSS[60] VSS[150] AY55 L30 VSS[241] VSS_NCTF_5 BE4
NCTF
AJ22 VSS[61] VSS[151] AY58 L34 VSS[242] VSS_NCTF_6 BE58
AJ26 VSS[62] VSS[152] AY9 L38 VSS[243] VSS_NCTF_7 BG5
VSS[63] VSS[153] VSS[244] VSS_NCTF_8 Dell short to ground
B AJ30 BA1 L43 BG57 B
AJ34 VSS[64] VSS[154] BA11 L48 VSS[245] VSS_NCTF_9 C3
AJ38 VSS[65] VSS[155] BA17 L61 VSS[246] VSS_NCTF_10 C58
AJ42 VSS[66] VSS[156] BA21 M11 VSS[247] VSS_NCTF_11 D59
AJ45 VSS[67] VSS[157] BA26 M15 VSS[248] VSS_NCTF_12 E1
AJ48 VSS[68] VSS[158] BA32 VSS[249] VSS_NCTF_13 E61
AJ7 VSS[69] VSS[159] BA48 VSS_NCTF_14
AK1 VSS[70] VSS[160] BA51
AK52 VSS[71] VSS[161] BB53
AL10 VSS[72] VSS[162] BC13
AL13 VSS[73] VSS[163] BC5
AL17 VSS[74] VSS[164] BC57 IVY-BRIDGE_BGA1023~D
AL21 VSS[75] VSS[165] BD12
AL25 VSS[76] VSS[166] BD16
VSS[77] VSS[167] @
AL28 BD19
AL33 VSS[78] VSS[168] BD23
AL36 VSS[79] VSS[169] BD27
AL40 VSS[80] VSS[170] BD32
AL43 VSS[81] VSS[171] BD36
AL47 VSS[82] VSS[172] BD40
AL61 VSS[83] VSS[173] BD44
AM13 VSS[84] VSS[174] BD48
AM20 VSS[85] VSS[175] BD52
AM22 VSS[86] VSS[176] BD56
AM26 VSS[87] VSS[177] BD8
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180]
A IVY-BRIDGE_BGA1023~D A
Security Classification Compal Secret Data

Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title Compal Electronics, Inc.
PROCESSOR(7/7) VSS
Custom 0.3
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5 4 3 2 1
5 4 3 2 1
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<9> DDR_A_DQS#[0..7]
M1 Circuit (Voltage Divider)
+1.5V
+V_DDR_REFA +1.5V
1
JDIMM1
2
+1.5V
3 VREF_DQ VSS 4 DDR_A_D4

<9> DDR_A_DQS[0..7] VSS DQ4
2.2U_0603_6.3V6K~D
0.1U_0402_16V7K~D
M3+M1: Default DDR_A_D0 5 6 DDR_A_D5
RD2 DDR_A_D1 7 DQ0 DQ5 8
<9> DDR_A_D[0..63] Recommendation 9 DQ1 VSS 10 DDR_A_DQS#0
1K_0402_1%~D 1 1
11 VSS DQS0# 12 DDR_A_DQS0
<9> DDR_A_MA[0..15] DM0 DQS0
CD1
CD2
13 14
2
DDR_A_D2 15 VSS VSS 16 DDR_A_D6
+V_DDR_REFA 2 2 DQ2 DQ6
DDR_A_D3 17 18 DDR_A_D7
DQ3 DQ7
1
19 20
D RD3 DDR_A_D9 23 DQ8 DQ12 24 DDR_A_D13 D
1K_0402_1%~D 25 DQ9 DQ13 26
DDR_A_DQS#1 27 VSS VSS 28
2
DDR_A_DQS1 29 DQS1# DM1 30
All VREF traces should have DQS1 RESET# DDR3_DRAMRST# <8>
31 32
20mil trace width & spacing DDR_A_D10 33 VSS VSS 34 DDR_A_D14
DDR_A_D11 35 DQ10 DQ14 36 DDR_A_D15
37 DQ11 DQ15 38
M3 Circuit (Processor Generated SO-DIMM VREF_DQ) 43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS VSS 46
@ RD6 1 2 0_0402_5%~D DDR_A_DQS2 47 DQS2# DM2 48
49 DQS2 VSS 50 DDR_A_D22
QD1 BSS138-G_SOT23-3 DDR_A_D18 51 VSS DQ22 52 DDR_A_D23
DDR_A_D19 53 DQ18 DQ23 54
1 3 55 DQ19 VSS 56 DDR_A_D28
D
+V_DDR_REFA +V_DDR_REFA_M3 <10> VSS DQ28

SSI2 DQ24 DQ29
1
DDR_A_D25 59 60
RD10 61 DQ25 VSS 62 DDR_A_DQS#3
G
2
1K_0402_5%~D 63 VSS DQS3# 64 DDR_A_DQS3

@ 65 DM3 DQS3 66
<8,17> DRAMRST_CNTRL_PCH VSS VSS
2

71 DQ27 DQ31 72
VSS VSS
73 74
<9> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <9>
75 76
77 VDD VDD 78 DDR_A_MA15
close to SO-DIMM NC A15
79 80 DDR_A_MA14
<9> DDR_A_BS2 BA2 A14
81 82
C DDR_A_MA12 83 VDD VDD 84 DDR_A_MA11 C
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
+1.5V 87 A9 A7 88
DDR_A_MA8 89 VDD VDD 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
VDD VDD
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
1 1 1 1 A1 A0
CD3
CD4
CD5
CD6
99 100
101 VDD VDD 102
<9> M_CLK_DDR0 CK0 CK1 M_CLK_DDR1 <9>
103 104
2 2 2 2 <9> M_CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 <9>
105 106
DDR_A_MA10 107 VDD VDD 108
A10/AP BA1 DDR_A_BS1 <9> +1.5V
109 110
<9> DDR_A_BS0 BA0 RAS# DDR_A_RAS# <9>
111 112
113 VDD VDD 114
<9> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <9>
1
115 116
<9> DDR_A_CAS# CAS# ODT0 M_ODT0 <9>
117 118 RD4
DDR_A_MA13 119 VDD VDD 120 1K_0402_1%~D
+1.5V A13 ODT1 M_ODT1 <9>
121 122
<9> DDR_CS1_DIMMA# S1# NC
123 124
2
125 VDD VDD 126 +VREF_CA
ST 127 TEST VREF_CA 128
VSS VSS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
330U_D2_2.5VM_R6M~D
0.1U_0402_16V7K~D
2.2U_0603_6.3V6K~D
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
1 DDR_A_D33 131 132 DDR_A_D37
133 DQ33 DQ37 134 RD5
1 1 1 1 1 1 VSS VSS 1 1
CD8
CD9
CD10
CD11
CD12
CD13
CD7
CD16
CD15
+ DDR_A_DQS#4 135 136 1K_0402_1%~D
DDR_A_DQS4 137 DQS4# DM4 138
2
2 2 2 2 2 2 2 DDR_A_D34 141 VSS DQ38 142 DDR_A_D39 2 2
DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS 146 DDR_A_D44
B DDR_A_D40 147 VSS DQ44 148 DDR_A_D45 B
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS 152 DDR_A_DQS#5
155 DM5 DQS5 156
+0.75VS DDR_A_D42 157 VSS VSS 158 DDR_A_D46
DDR_A_D43 159 DQ42 DQ46 160 DDR_A_D47
161 DQ43 DQ47 162
DQ48 DQ52
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
DDR_A_D49 165 166 DDR_A_D53

167 DQ49 DQ53 168
1 1 1 1 VSS VSS
DDR_A_DQS#6 169 170
DQS6# DM6
CD17
CD18
CD19
CD20
DDR_A_DQS6 171 172

2 2 2 2 DDR_A_D50 175 VSS DQ54 176 DDR_A_D55
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS 180 DDR_A_D60
DDR_A_D56 181 VSS DQ60 182 DDR_A_D61
DDR_A_D57 183 DQ56 DQ61 184
185 DQ57 VSS 186 DDR_A_DQS#7
189 DM7 DQS7 190
DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
1 2 197 VSS VSS 198
RD8 10K_0402_5%~D 199 SA0 EVENT# 200
+3VS VDDSPD SDA PCH_SMBDATA <17,39,43,48>
1 2 201 202
SA1 SCL PCH_SMBCLK <17,39,43,48>
2.2U_0603_6.3V6K~D
0.1U_0402_16V7K~D
1 1 RD9 10K_0402_5%~D 203 204

VTT VTT +0.75VS
CD22
CD21
+0.75VS
205 206
207 GND1 GND2 208
A 2 2 BOSS1 BOSS2 A
BELLW_80001-1021

DDRIII DIMMA
Size
Document Number Rev
0.3
LA-7841P
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5 4 3 2 1
5 4 3 2 1
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intent to blank
D D
C C
B B
A A

DDRIII DIMMB
Size
Document Number Rev
0.3
LA-7841P
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5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com RH1
1 2
10M_0402_5%
PCH_RTCX1
PCH_RTCX2 PCH_INTVRMEN RH13 2 1 330K_0402_5%

+RTCVCC
1 2 RTC Battery RH16 2 @ 1 330K_0402_5%

@
YH1 2 1 HDA_SDOUT
32.768KHZ_12.5PF_9H03200019 CH1 10P_0402_50V8J~D Integrated 1.05V VRM Enable /
@
+RTCBATT Disable (should always be
15P_0402_50V8J~D
2 1 HDA_BIT_CLK
SSI2 CH2 10P_0402_50V8J~D pulled high to VccRTC)
1 1
CH3 CH4 Low = X
2
18P_0402_50V8J~D +3VLP INTVRMEN
Reserve for RF, close to PCH RH34 High = enable
2 2
1K_0402_5%~D
+RTCVCC
D D
RH2
PT
2 1
1 2 SM_INTRUDER#
3
1M_0402_5%~D +3V_PCH
DH1
CLP1 & CLP2 BAT54CW_SOT323-3 HDA_SYNC RH32 2 1 1K_0402_5%~D
far away hot spot place near DIMM UH1A
W=20mils PLL ODVR VOLTAGE (Internal
1
1 ME CMOS PCH_RTCX1 A20 C38 +RTCVCC
RTCX1 FWH0 / LAD0 LPC_AD0 <38,40,42> PD 20K)
1
CH5 A38 1
+RTCVCC C20 FWH1 / LAD1 B37 LPC_AD1 <38,40,42>
CLRP1 @ PCH_RTCX2 CH12 LOW = SET VCCVRM
LPC
RTCX2 FWH2 / LAD2 C37 LPC_AD2 <38,40,42>
1U_0402_6.3V6K~D SHORT PADS
TO 1.8 V (DEFAULT)
2
1 2 2 D20 FWH3 / LAD3 LPC_AD3 <38,40,42>
PCH_RTCRST# 1U_0402_6.3V6K~D HDA_SYNC
RH3 20K_0402_5%~D RTCRST# D36 2
FWH4 / LFRAME# LPC_FRAME# <38,40,42> HIGH = SET
1 2 PCH_SRTCRST# G22
RH4 20K_0402_5%~D SRTCRST# E36 VCCVRM TO 1.5 V
1 ME CMOS LDRQ0#
1
SM_INTRUDER# K22 K36 RH10 2 1 10K_0402_5%~D
+3VS
RTC
CH6 CLRP2 @ INTRUDER# LDRQ1# / GPIO23
1U_0402_6.3V6K~D SHORT PADS PCH_INTVRMEN C17 V5 SERIRQ <38,40>
2
2 INTVRMEN SERIRQ +3VS
AM3 SATA_PRX_DTX_N0 <43> HDA_SPKR RH17 2 @ 1 1K_0402_5%~D

HDA_BIT_CLK N34 SATA0RXN AM1
HDA_BCLK SATA0RXP SATA_PRX_DTX_P0 <43> SATA Gen3 topology,
RH5 1 2 HDA_BIT_CLK AP7 HDD
<48> HDA_BITCLK_AUDIO AC cap close to device
SATA 6G
+5VS L34 SATA0TXN AP5 SATA_PTX_DRX_N0 <43>
33_0402_5%~D HDA_SYNC No Reboot strap (Internal
HDA_SYNC SATA0TXP SATA_PTX_DRX_P0 <43> within 200mil
RH6 1 2 HDA_RST# HDA_SPKR T10 AM10 PD 20K)
<48> HDA_RST_AUDIO# <48> HDA_SPKR SPKR SATA1RXN SATA_PRX_DTX_N1 <43>
2
G
33_0402_5%~D AM8 Low = Default

SATA1RXP SATA_PRX_DTX_P1 <43>
HDA_RST# K34 AP11 mSATA SPKR
1 2 HDA_SYNC_R 3 1 HDA_RST# SATA1TXN AP10 SATA_PTX_DRX_N1 <43>
<48> HDA_SYNC_AUDIO RH7 HDA_SYNC High = No Reboot
SATA1TXP SATA_PTX_DRX_P1 <43>
33_0402_5%~D
S
<48> HDA_SDIN0
E34 AD7
RH8 1 2 QH1 HDA_SDIN0 SATA2RXN AD5
1M_0402_5%~D BSS138-G_SOT23-3 G34 SATA2RXP AH5
HDA_SDIN1 SATA2TXN AH4 +3V_PCH
RH15 1 2 HDA_SDOUT
SSI2 C34 SATA2TXP
<48> HDA_SDOUT_AUDIO HDA_SDIN2
C 33_0402_5%~D AB8 HDA_SDOUT RH23 2 @ 1 1K_0402_5%~D C
IHDA
A34 SATA3RXN AB10
RH11 1 2 HDA_SDIN3 SATA3RXP AF3
<38> HDA_SDO SATA3TXN
1K_0402_5%~D AF1 Flash Descriptor Security
HDA_SDOUT A36 SATA3TXP
HDA_SDO Y7 Override / Intel ME Debug
for enable ME code programing
SATA
SATA4RXN Y5 Mode (Internal PD 20K)
+3VS USB_WWAN_DET# C36 SATA4RXP AD3
<48> USB_WWAN_DET# HDA_DOCK_EN# / GPIO33 SATA4TXN LOW = Secure
AD1 HDA_SDO
1 2 USB_WWAN_DET# N32 SATA4TXP
HDA_DOCK_RST# / GPIO13 HIGH = Override
RH251 8.2K_0402_5%~D Y3
SATA5RXN Y1
SATA5RXP AB3
PCH_JTAG_TCK 1 2 PCH_JTAG_TCK J3 SATA5TXN AB1
<8> PCH_JTAG_TCK JTAG_TCK SATA5TXP
RH35 51_0402_5% close PCH
PCH_JTAG_TMS H7 Y11 +VCCP
<8> PCH_JTAG_TMS JTAG_TMS SATAICOMPO within 500mil
JTAG
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
+3V_PCH +3V_PCH +3V_PCH <8> PCH_JTAG_TDI JTAG_TDI SATAICOMPI RH21 37.4_0402_1%
PCH_JTAG_TDO H1
<8> PCH_JTAG_TDO JTAG_TDO AB12 +VCCP
SATA3RCOMPO
1
RH19 RH20 RH18 AB13 SATA3_COMP 1 2

SATA3COMPI RH22 49.9_0402_1%
200_0402_5%~D 200_0402_5%~D 200_0402_5%~D
@ @ @ CH14
2 1 PCH_SPI_CLK PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2
2
PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO SPI_CLK SATA3RBIAS RH28 750_0402_1%~D

@ 10P_0402_50V8J~D PCH_SPI_CS0# Y14
SPI_CS0#
1
+3VS
RH25 RH26 RH24 PAD~D T4921@
T1
SPI_CS1# P3 PCH_SATALED# RH14 2 @ 1 10K_0402_5%~D
100_0402_1%~D 100_0402_1%~D 100_0402_1%~D Reserve for RF, close to PCH
SPI
SATALED#
PCH_SPI_SI V4 V14 PCH_GPIO21 RH12 2 1 10K_0402_5%~D
2
SPI_MOSI SATA0GP / GPIO21

PCH_SPI_SO U3 P1 RH29 2 1 10K_0402_5%~D
SPI_MISO SATA1GP / GPIO19
BBS_BIT0 <19>
B BD82PPSM-QNHN-A0_BGA989~D B
SPI ROM FOR BIOS & EC ( 8MByte ) SPI BIOS Pinout
+3V_PCH (1)CS# (5)DIO

(2)DO (6)CLK
(3)WP# (7)HOLD#
2
ST 1 (4)GND (8)VCC
RH33 RH38 CH11 RH40
W25X32
3.3K_0402_5% 3.3K_0402_5% .1U_0402_16V7K 3.3K_0402_5%
2
1
UH2
PCH_SPI_CS0# 1 8
/CS VCC
Reserve for EMI, close to UH2
PCH_SPI_SO 2 7
DO /HOLD RH41 @ CH13 @
3 6 PCH_SPI_CLK PCH_SPI_CLK 2 1 1 2
/WP CLK
4 5 PCH_SPI_SI 33_0402_5%~D 22P_0402_50V8J~D
GND DIO
W25Q64CVSSIG_SO8~D
A A

PCH (1/8) SATA,HDA,SPI, LPC
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0.3
LA-7841P
5 4 3 2 1
5 4 3 2 1
+3V_PCH
WWW.AliSaler.Com UH1B
SMBCLK
SMBDATA
1
RH45
1
2
2.2K_0402_5%~D
2
RH46 2.2K_0402_5%~D
BG34
ST SML0CLK 1 2
<41> PCIE_PRX_GLANTX_N1 PERN1
<41> PCIE_PRX_GLANTX_P1 BJ34 E12 PCH_LID_SW_IN# 1 SHORT 2 RH47 2.2K_0402_5%~D
PERP1 SMBALERT# / GPIO11 EC_LID_OUT# <38>
10/100/1G LAN CH15 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_N1_C AV32 RH44 0_0402_5%~D SML0DATA 1 2
<41> PCIE_PTX_GLANRX_N1 PETN1
CH16 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_P1_C AU32 H14 SMBCLK RH49 2.2K_0402_5%~D
<41> PCIE_PTX_GLANRX_P1 PETP1 SMBCLK SMBCLK <42>
SML1CLK 1 2
BE34 C9 SMBDATA RH50 2.2K_0402_5%~D
PERN2 SMBDATA SMBDATA <42>
BF34 SML1DATA 1 2
BB32 PERP2 RH51 2.2K_0402_5%~D
AY32 PETN2 PCH_LID_SW_IN# 1 2
D PETP2 A12 DRAMRST_CNTRL_PCH RH52 10K_0402_5%~D D
SMBUS
SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH <8,14>
BG36 DRAMRST_CNTRL_PCH 1 2
<42> PCIE_PRX_WLANTX_N3 PERN3
<42> PCIE_PRX_WLANTX_P3 BJ36 C8 SML0CLK RH53 1K_0402_5%~D
CH19 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_N3_C AV34 PERP3 SML0CLK PCH_GPIO74 1 2
MiniWLAN (Mini Card 1) <42> PCIE_PTX_WLANRX_N3
CH20 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_P3_C AU34 PETN3 G12 SML0DATA RH240 10K_0402_5%~D
<42> PCIE_PTX_WLANRX_P3 PETP3 SML0DATA
BF36 +3VS +3VS
<48> PCIE_PRX_CARDTX_N4 PERN4
<48> PCIE_PRX_CARDTX_P4 BE36
CH21 1 2 0.1U_0402_10V7K~D PCIE_PTX_CARDRX_N4_C AY34 PERP4 C13 PCH_GPIO74
CARD_READER <48> PCIE_PTX_CARDRX_N4 PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH <-> MEM, LCD, TP,
CH22 1 2 0.1U_0402_10V7K~D PCIE_PTX_CARDRX_P4_C BB34
<48> PCIE_PTX_CARDRX_P4 PETP4 WLAN, FFS, IO
2
E14 SML1CLK
BG37 SML1CLK / GPIO58 RH71 RH72
PCI-E*
BH37 PERN5 M16 SML1DATA
PERP5 SML1DATA / GPIO75 2.2K_0402_5%~D 2.2K_0402_5%~D
2
AY36
BB36 PETN5
1
PETP5 SMBCLK 6 1
PCH_SMBCLK <14,39,43,48>
BJ38
BG38 PERN6 DMN66D0LDW-7_SOT363-6~D
AU36 PERP6 M7 connects to a Wireless LAN QH2A
Controller
AV36 PETN6 CL_CLK1 RH78
PETP6 Device supporting Intel Active 1 @ 2
5
BG40 T11 Management Technology(iAMT) 0_0402_5%~D
Link
BJ40 PERN7 CL_DATA1
AY40 PERP7 +3V_PCH SMBDATA 3 4
PETN7 PCH_SMBDATA <14,39,43,48>
BB40 P10
PETP7 CL_RST1# DMN66D0LDW-7_SOT363-6~D
2
BE38 QH2B
BC38 PERN8 RH64 RH82
AW38 PERP8 10K_0402_5%~D 1 @ 2
AY38 PETN8 0_0402_5%~D
PETP8
1
M10
C PEG_A_CLKRQ# / GPIO47 PEG_A_CLKRQ# <24> +3VS C
PAD~D T2 @ Y40
PAD~D T3 @ Y39 CLKOUT_PCIE0N PT
CLKOUT_PCIE0P AB37
CLKOUT_PEG_A_N CLK_PEG_VGA# <24>
RH66 1 2 10K_0402_5%~D PCIECLKREQ0# J2 AB38 PCH <-> EC
+3V_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PEG_VGA <24> ST
2
CLOCKS
AB49 AV22 SML1CLK 6 1 PCH_SMLCLK <24,35,38>
<41> CLK_PCIE_LAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# <8>
AB47 AU22
<41> CLK_PCIE_LAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <8>
5
10/100/1G LAN DMN66D0LDW-7_SOT363-6~D
M1 @ QH3A
<41> LANCLK_REQ# PCIECLKRQ1# / GPIO18
+3VS RH69 2 1 10K_0402_5%~D AM12 @ T26 PAD~D SML1DATA 3 4 PCH_SMLDATA <24,35,38>
CLKOUT_DP_N AM13 @ T27 PAD~D
AA48 CLKOUT_DP_P DMN66D0LDW-7_SOT363-6~D
AA47 CLKOUT_PCIE2N @ QH3B
CLKOUT_PCIE2P BF18 CLKIN_DMI#
RH74 2 1 10K_0402_5%~D PCH_GPIO20 V10 CLKIN_DMI_N BE18 CLKIN_DMI
+3VS PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
Y37 BJ30 CLKIN_GND1 CLKIN_DMI# RH56 1 2 10K_0402_5%~D

<42> CLK_PCIE_MINI1# CLKOUT_PCIE3N CLKIN_GND1_N
Y36 BG30 CLKIN_DMI RH57 1 2 10K_0402_5%~D
<42> CLK_PCIE_MINI1 CLKOUT_PCIE3P CLKIN_GND1_P
MiniWLAN (Mini Card 1) CLKIN_GND1 RH55 1 2 10K_0402_5%~D
<42> MINI1CLK_REQ# A8 CLKIN_DOT96# RH58 1 2 10K_0402_5%~D
RH77 2 1 10K_0402_5%~D PCIECLKRQ3# / GPIO25 G24 CLKIN_DOT96# CLKIN_DOT96 RH59 1 2 10K_0402_5%~D
+3V_PCH CLKIN_DOT_96N E24 CLKIN_DOT96 CLKIN_SATA# RH60 1 2 10K_0402_5%~D
Y43 CLKIN_DOT_96P CLKIN_SATA RH61 1 2 10K_0402_5%~D
<48> CLK_PCIE_CD# CLKOUT_PCIE4N
Y45 CLK_PCH_14M RH62 1 2 10K_0402_5%~D
<48> CLK_PCIE_CD CLKOUT_PCIE4P
CARD_READER AK7 CLKIN_SATA#
L12 CLKIN_SATA_N AK5 CLKIN_SATA
<48> CDCLK_REQ# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
+3V_PCH RH81 2 1 10K_0402_5%~D
V45 K45 CLK_PCH_14M

ST
V46 CLKOUT_PCIE5N REFCLK14IN
B CLKOUT_PCIE5P RH65 CH26 B
+3V_PCH RH83 1 2 10K_0402_5%~D PCH_GPIO44 L14 H45 CLK_PCI_LPBACK CLK_PCI_LPBACK 2 1 1 2

PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK <19>
33_0402_5%~D 22P_0402_50V8J~D
AB42 V47 XTAL25_IN
AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT
CLKOUT_PEG_B_P XTAL25_OUT Reserve for EMI, close to PCH
RH84 1 2 10K_0402_5%~D PEG_B_CLKREQ# E6 +VCCP
+3V_PCH PEG_B_CLKRQ# / GPIO56 XTAL25_IN
Y47 XCLK_RCOMP 1 2
V40 XCLK_RCOMP RH85 90.9_0402_1% 2 1 XTAL25_OUT
V42 CLKOUT_PCIE6N 1M_0402_5%~D RH89
CLKOUT_PCIE6P YH2
+3V_PCH RH88 1 2 10K_0402_5%~D PCH_GPIO45 T13 1 3
PCIECLKRQ6# / GPIO45 IN OUT
V38 K43 CLKOUTFLEX0 RH97 1 2 CLK_PCI_TPM 2 4
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_PCI_TPM <40> GND GND
V37 22_0402_1%
FLEX CLOCKS
1 1
15P_0402_50V8J~D
CLKOUT_PCIE7P F47 KB_DET# 25MHZ_18PF_X3G025000DI1H-H~D
CLKOUTFLEX1 / GPIO65 KB_DET# <39>
15P_0402_50V8J~D
RH90 1 2 10K_0402_5%~D PCH_GPIO46 K12
CH27
CH28
+3V_PCH PCIECLKRQ7# / GPIO46 H47 CLKOUTFLEX2 @ RH245 1 2 option for LAN 25MHz
SSI2
PT2 @ RH91 2 1 0_0402_5%~D CLK_BCLK_ITP# AK14 CLKOUTFLEX2 / GPIO66 22_0402_1%
LAN_25M <41> 2 2
<8> CLK_CPU_ITP# CLKOUT_ITPXDP_N
@ RH92 2 1 0_0402_5%~D CLK_BCLK_ITP AK13 K49
<8> CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 PT PT
SSI2 Remove CAM_DET#
RH93 2 @ 1 0_0402_5%~D BD82PPSM-QNHN-A0_BGA989~D
<8> CLK_RES_ITP#
RH94 2 @ 1 0_0402_5%~D
<8> CLK_RES_ITP +3VS
KB_DET# RH98 2 1 100K_0402_5%~D

ST
A A
CLK_PCI_TPM CH98 1 2 10P_0402_50V8J~D
Reserve for EMI, close to PCH

PCH (2/8) PCIE, SMBUS, CLK
0.3
LA-7841P
5 4 3 2 1
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5 4 3 2 1
WWW.AliSaler.Com <7> DMI_CTX_PRX_N0

BC24
BE20
UH1C
DMI0RXN FDI_RXN0
BJ14
AY14
FDI_CTX_PRX_N0 <7>
<38> ENBKL
<35> VGA_LVDDEN
ENBKL
VGA_LVDDEN
J47
M45
UH1D
L_BKLTEN
L_VDD_EN
SDVO_TVCLKINN
SDVO_TVCLKINP
AP43
AP45
<7> DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 <7>
BG18 BE14 P45 AM42
<7> DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 <7> <35> VGA_PWM L_BKLTCTL SDVO_STALLN
BG20 BH13 AM40
<7> DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 <7> SDVO_STALLP
BC12 LVDS_DDC_CLK T40
FDI_RXN4 FDI_CTX_PRX_N4 <7> <35> LVDS_DDC_CLK L_DDC_CLK
BE24 BJ12 +3VS LVDS_DDC_DATA K47 AP39
<7> DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 <7> <35> LVDS_DDC_DATA L_DDC_DATA SDVO_INTN
BC20 BG10 AP40
<7> DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 <7> SDVO_INTP
BJ18 BG9 RH133 1 2 2.2K_0402_5%~D CTRL_CLK T45
<7> DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 <7> L_CTRL_CLK
BJ20 RH135 1 2 2.2K_0402_5%~D CTRL_DATA P39
<7> DMI_CTX_PRX_P3 DMI3RXP L_CTRL_DATA
BG14
FDI_RXP0 FDI_CTX_PRX_P0 <7>
AW24 BB14 RH123 1 2 2.37K_0402_1%~D LVDS_IBG AF37 P38
<7> DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 <7> LVD_IBG SDVO_CTRLCLK PCH_SDVO_CTRLCLK <36>
AW20 BF14 AF36 M39
D <7> DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 <7> LVD_VBG SDVO_CTRLDATA PCH_SDVO_CTRLDATA <36> D
BB18 BG13 @ PAD~D T4
<7> DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 <7>
AV18 BE12 AE48
<7> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 <7> LVD_VREFH
BG12 AE47 AT49
DMI
FDI
FDI_RXP5 FDI_CTX_PRX_P5 <7> LVD_VREFL DDPB_AUXN
AY24 BJ10 AT47
<7> DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 <7> DDPB_AUXP
AY20 BH9 AT40
<7> DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 <7> DDPB_HPD HDMI_PCH_HPD# <36>
AY18 AK39
<7> DMI_CRX_PTX_P2 AU18 DMI2TXP <35> LVDS_ACLK- AK40 LVDSA_CLK# AV42
LVDS
<7> DMI_CRX_PTX_P3 DMI3TXP AW16 <35> LVDS_ACLK+ LVDSA_CLK DDPB_0N AV40 HDMI_A0N_VGA <36>
FDI_INT FDI_INT <7> AN48 DDPB_0P AV45 HDMI_A0P_VGA <36>
4mil width and close +1.05VS_VCC_EXP BJ24 AV12 <35> LVDS_A0- AM47 LVDSA_DATA#0 HDMI DDPB_1N AV46 HDMI_A1N_VGA <36>
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 <7> <35> LVDS_A1- AK47 LVDSA_DATA#1 DDPB_1P AU48 HDMI_A1P_VGA <36>
PCH within 500mil
Digital Display Interface

1 2 DMI_IRCOMP BG25 BC10 <35> LVDS_A2- AJ48 LVDSA_DATA#2 DDPB_2N AU47 HDMI_A2N_VGA <36>
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <7> LVDSA_DATA#3 DDPB_2P AV47 HDMI_A2P_VGA <36>
RH99 49.9_0402_1%
1 2 BH21 AV14 AN47 DDPB_3N AV49 HDMI_A3N_VGA <36>
RBIAS_CPY
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <7> <35> LVDS_A0+ AM49 LVDSA_DATA0 DDPB_3P HDMI_A3P_VGA <36>
RH100 750_0402_1%~D
BB10 <35> LVDS_A1+ AK49 LVDSA_DATA1
FDI_LSYNC1 FDI_LSYNC1 <7> <35> LVDS_A2+ AJ47 LVDSA_DATA2 P46
LVDSA_DATA3 DDPC_CTRLCLK PCH_DDPC_CTRLCLK <37>
P42
SSI2 DDPC_CTRLDATA PCH_DDPC_CTRLDATA <37>
A18 DSWODVREN AF40
DSWVRMEN <35> LVDS_BCLK- AF39 LVDSB_CLK# AP47
ST <35> LVDS_BCLK+ LVDSB_CLK DDPC_AUXN AP49
PCH_DPC_AUXN <37>
DDPC_AUXP PCH_DPC_AUXP <37>
System Power Management

PAD~D T4924 SUSACK# C12 E22 PCH_DPWROK 1 SHORT 2 PCH_RSMRST#_R AH45 AT38 DP_PCH_HPD
SUSACK# DPWROK <35> LVDS_B0- LVDSB_DATA#0 DDPC_HPD DP_PCH_HPD <37>
@ RH101 0_0402_5%~D AH47
<35> LVDS_B1- AF49 LVDSB_DATA#1 AY47
K3 B9 WAKE# 1 SHORT 2
ST <35> LVDS_B2- AF45 LVDSB_DATA#2 DDPC_0N AY49 PCH_DPC_N0 <37>
<8> XDP_DBRESET# SYS_RESET# WAKE# WAKE_PCH# <38> LVDSB_DATA#3 DDPC_0P PCH_DPC_P0 <37>
RH103 0_0402_5%~D AY43
AH43 DDPC_1N AY45 PCH_DPC_N1 <37>
1 @ 2 SYS_PWROK P12 N3 PM_CLKRUN#
SSI2 <35> LVDS_B0+ AH49 LVDSB_DATA0 DDPC_1P BA47 PCH_DPC_P1 <37>
RH104 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# <40> <35> LVDS_B1+ AF47 LVDSB_DATA1 mDP DDPC_2N BA48 PCH_DPC_N2 <37>
<35> LVDS_B2+ AF43 LVDSB_DATA2 DDPC_2P BB47 PCH_DPC_P2 <37>
PCH_PWROK 1 SHORT 2 PM_PWROK_R L22 G8 SUS_STAT# LVDSB_DATA3 DDPC_3N BB49 PCH_DPC_N3 <37>
T5 PAD~D
C PWROK SUS_STAT# / GPIO61 DDPC_3P PCH_DPC_P3 <37> C
RH105 0_0402_5%~D @
ST SHORT
1 SHORT 2 APWROK_R L10 N14 SUSCLK_R 2 1 N48 M43
APWROK SUSCLK / GPIO62 SUSCLK <38> P49 CRT_BLUE DDPD_CTRLCLK M36
RH106 0_0402_5%~D RH107 0_0402_5%~D
ST T49 CRT_GREEN DDPD_CTRLDATA
B13 D10 CRT_RED
<8> PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# <38> AT45
ST T39 DDPD_AUXN AT43
CRT
PCH_RSMRST# 1 SHORT 2 PCH_RSMRST#_R C21 H4 M40 CRT_DDC_CLK DDPD_AUXP BH41
<38> PCH_RSMRST# RSMRST# SLP_S4# PM_SLP_S4# <38> CRT_DDC_DATA DDPD_HPD
RH108 0_0402_5%~D
BB43
SUSPWRDNACK K16 F4 M47 DDPD_0N BB45
<38> SUSPWRDNACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# <38,43> CRT_HSYNC DDPD_0P
M49 BF44
CRT_VSYNC DMC DDPD_1N BE44
PT 1 SHORT 2 PBTN_OUT#_R E20 G10 SLP_A# T4938 PAD~D
PT DDPD_1P BF42
<8,38> PBTN_OUT# PWRBTN# SLP_A# DDPD_2N
RH110 0_0402_5%~D @ CRT_IREF T43 BE42
T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N
1
AC_PRESENT 1 SHORT 2 AC_PRESENT_R H20 G16 PM_SLP_SUS# T4927 PAD~D BG42
<38> AC_PRESENT ACPRESENT / GPIO31 SLP_SUS# DDPD_3P
RH112 0_0402_5%~D @
ST RH115 BD82PPSM-QNHN-A0_BGA989~D
PCH_GPIO72 E10 AP14 1K_0402_0.5%~D
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC <8>
2
RI# A10 K14
RI# SLP_LAN# / GPIO29
BD82PPSM-QNHN-A0_BGA989~D
CH29
SUSCLK_R 2 1
@
+3V_PCH 10P_0402_50V8J~D
+3VS
B PCH_GPIO72 RH116 1 2 10K_0402_5%~D +RTCVCC B
Reserve for RF, close to PCH RH136 1 2 8.2K_0402_5%~D PM_CLKRUN#

RI# RH117 1 2 10K_0402_5%~D DSWODVREN RH119 2 1 330K_0402_5% RH137 1 2 2.2K_0402_5%~D LVDS_DDC_CLK
RH138 1 2 2.2K_0402_5%~D LVDS_DDC_DATA
WAKE# RH118 1 2 10K_0402_5%~D RH122 2 @ 1 330K_0402_5%
AC_PRESENT RH121 1 2 10K_0402_5%~D RH132 1 2 100K_0402_5%~D VGA_LVDDEN

RH134 1 2 100K_0402_5%~D ENBKL
SUSPWRDNACK RH124 1 2 10K_0402_5%~D Deep S4/S5 Well On-Die Voltage Regulator Enable RH241 1 2 1M_0402_5%~D DP_PCH_HPD
PT
Low = disable
PCH_RSMRST# RH127 1 2 10K_0402_5%~D DSWVRMEN
High = enable
SYS_PWROK RH130 1 2 10K_0402_5%~D
+3VS
1
CH30
0.1U_0402_16V7K~D
2
5
UH3
VCC
PCH_PWROK 1
<38> PCH_PWROK IN1 4 SYS_PWROK
2 OUT
GND
<8,38,60> VGATE IN2

A A
MC74VHC1G08DFT2G_SC70-5
3

PCH (3/8) DMI,FDI,PM,GFX,DP
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
RH242
RH244
1 @
1 @
2 1K_0402_5%~D
2 BBS_BIT1
1K_0402_5%~D
BBS_BIT0 <16>
RH243
1 @ 2 WL_OFF#
1K_0402_5%~D
BG26
UH1E
RSVD1
RSVD2
AY7
AV7
AU3
BJ26 TP1 RSVD3 BG4
BH25 TP2 RSVD4
A16 Top-Block Swap Override TP3
Boot BIOS Strap (Both internal PU 20K) BJ16 AT10
(Internal PU 20K) BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6
BIT 1 BIT 0 Low = swap enabled TP6
Boot BIOS Location GNT3# AH37 AU2
AK43 TP7 RSVD7 AT4
GNT1# SATA1GP High = Default TP8 RSVD8
AK45 AT3
C18 TP9 RSVD9 AT1
0 0 LPC TP10 RSVD10
N30 AY3
D H3 TP11 RSVD11 AT5 D
0 1 Reserved TP12 RSVD12
AH12 AV3
AM4 TP13 RSVD13 AV1
1 0 PCI(non-mobile) TP14 RSVD14
AM5 BB1
Y13 TP15 RSVD15 BA3
1 1 SPI TP16 RSVD16
K24 BB5
L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8
TP20 RSVD20 BD4
RSVD
RSVD21 BF6 +1.8VS
RSVD22
B21 AV5 NV_ALE RH139 1 @ 2 1K_0402_5%~D
M20 TP21 RSVD23 AV10
AY16 TP22 RSVD24
TP23 Intel Anti-Theft Techonlogy
BG46 AT8
TP24 RSVD25
Low = disable
+3VS AY5 NV_ALE
RPH1 RSVD26 BA2
RSVD27 High = enable
8 1 PCI_PIRQA# BE28
7 2 <44> USB3RN1 BC30 USB3Rn1 AT12
PCI_PIRQB#
6 3 PCI_PIRQD# <45> USB3RN2 BE32 USB3Rn2 RSVD28 BF3
5 4 PCI_PIRQC# BJ32 USB3Rn3 RSVD29
BC28 USB3Rn4
<44> USB3RP1 BE30 USB3Rp1
8.2K_0804_8P4R_5%
<45> USB3RP2 BF32 USB3Rp2
USB Conn 1
USB30
RPH2 BG32 USB3Rp3 C24
8 1 DGPU_HOLD_RST# AV26 USB3Rp4 USBP0N A24 USB20_N0 <44>
7 2 PCH_GPIO52
USB Conn 2 (Power Share) <44> USB3TN1 BB26 USB3Tn1 USBP0P C25 USB20_P0 <44> USB Conn 1
6 3 <45> USB3TN2 AU28 USB3Tn2 USBP1N B25 USB20_N1 <45>
DGPU_PWR_EN# USB Conn 2 (Power Share)
5 4 WL_OFF# AY30 USB3Tn3 USBP1P C26 USB20_P1 <45>
AU26 USB3Tn4 USBP2N A26
C <44> USB3TP1 AY26 USB3TP1 USBP2P K28 C
8.2K_0804_8P4R_5%
<45> USB3TP2 AV28 USB3Tp2 USBP3N H28
RPH3 AW30 USB3Tp3 USBP3P E28
8 1 FFS_INT1 USB3Tp4 USBP4N D28 USB20_N4 <42>
7 2 ODD_DA# USBP4P C28 USB20_P4 <42> Mini Card(WLAN)
6 3 PCH_GPIO5 USBP5N A28 USB20_N5 <48>
5 4 USBP5P C29 USB20_P5 <48> Mini Card(WWAN)
USBP6N B29
8.2K_0804_8P4R_5% PCI_PIRQA# K40 USBP6P N28
PCI_PIRQB# K38 PIRQA# USBP7N M28
PCI_PIRQC# H38 PIRQB# USBP7P L30
PCI
+3VS PCI_PIRQD# G38 PIRQC# USBP8N K30
PIRQD# USBP8P G30
DGPU_HOLD_RST#C46 USBP9N E30
REQ1# / GPIO50 USBP9P
2
REQ[1:3]# & PCH_GPIO52 C44 C30
USB
RH247 DGPU_PWR_EN# E40 REQ2# / GPIO52 USBP10N A30
GNT[1:3]# are used REQ3# / GPIO54 USBP10P L32
10K_0402_5%~D
DIS@ as GPIO on Mobile BBS_BIT1 D47 USBP11N K32
EN_CAM E42 GNT1# / GPIO51 USBP11P G32
GNT[1:3]# have internal <35>
1
EN_CAM WL_OFF# F46 GNT2# / GPIO53 USBP12N E32 USB20_N12 <35>

<33,61> DGPU_PWR_EN weak PU, and disable <42> WL_OFF# GNT3# / GPIO55 USBP12P C32 USB20_P12 <35> Camera
2 1 after PLTRST# deassert USBP13N
CH99 D A32
0.01U_0402_16V7K~D FFS_INT1 G42 USBP13P
2 DGPU_PWR_EN# <43> FFS_INT1 G40 PIRQE# / GPIO2
DIS@ ODD_DA# Within 500 mils
1 G C42 PIRQF# / GPIO3 C33 USBRBIAS 1 2 +3V_PCH
SSI2 QH6 DIS@
<37> DP_CBL_DET PCH_GPIO5 D44 PIRQG# / GPIO4 USBRBIAS# RH143 22.6_0402_1%
S ME2N7002D-G_SOT23-3 PIRQH# / GPIO5 RPH4
3 B33 USB_OC0# 4 5
PAD~D T6 @ K10 USBRBIAS USB_OC1# 3 6
ST PME# USB_OC2# 2 7
PCH_PLTRST# C6 A14 USB_OC0# USB_OC3# 1 8
PLTRST# OC0# / GPIO59 K20 USB_OC1# USB_OC0# <44>
B OC1# / GPIO40 B17 USB_OC1# <45> B
CH31 USB_OC2# 10K_1206_8P4R_5%~D
ST 2 1 CLK_PCI1 RH144 2 1 22_0402_5% CLK_PCI0 H49 OC2# / GPIO41 C16 USB_OC3# RPH5
<17> CLK_PCI_LPBACK 1 2 22_0402_5% CLK_PCI1 H43 CLKOUT_PCI0 OC3# / GPIO42 L16 USB_OC4# USB_OC4# 4 5
RH145
<38> CLK_PCI_LPC 1 2 22_0402_5% CLK_LPC_DEBUG_RJ48 CLKOUT_PCI1 OC4# / GPIO43 A16 USB_OC5# USB_OC5# 3 6
10P_0402_50V8J~D RH252
<42> CLK_LPC_DEBUG K42 CLKOUT_PCI2 OC5# / GPIO9 D14 2 7
PAD~D T8 @ CLK_PCI3 USB_OC6# USB_OC6#
PAD~D T9 @ CLK_PCI4 H40 CLKOUT_PCI3 OC6# / GPIO10 C14 USB_OC7# USB_OC7# 1 8
Reserve for RF, close to PCH CLKOUT_PCI4 OC7# / GPIO14
10K_1206_8P4R_5%~D
CH100
1 2 CLK_LPC_DEBUG
@
27P_0402_50V8J RH148 1 @ 2 0_0402_5%~D
Switchable Graphics
Signal GPIO Type DuringReset After Reset Usage Description 1 @ 2 +3V_GPU
RH149 0_0402_5%~D
Driven by Switchable Graphics Driver to 1 2
DGPU_PWROK <20,61>
5
+3VS @ RH151 0_0402_5%~D
turn on/off the discrete graphics power. 1 1 2 PCH_PLTRST#
DGPU_PWR_EN# GPIO54 Output High High Must have
P
0 = dGPU power switch turned on 4 IN1 DIS@ RH152 0_0402_5%~D
<24> PLTRST_VGA# O
5
1 = Power switch turned off 2 DGPU_HOLD_RST#
IN2
G
1
1 PCH_PLTRST#
PT PT
P
4 IN1 DIS@ RH154

Driven by dGPU VR to indicate the power
3
<8,38,40,41,42,48> PLT_RST# O
1
2 100K_0402_5%~D UH4
status to PCH. Used to enable clocks to dGPU. IN2
G
DIS@ RH156 DIS@

0 = dGPU power is not stable. Keep clock
1
2 SN74AHC1G08DCKR_SC70-5 100K_0402_5%~D
3
2
disabled & reset asserted. RH155 UH5 RH157 PT PT
1 = dGPU power is stable. Clock can be @
2
100K_0402_5%~D 10K_0402_5%~D
enabled; reset can be deasserted
DGPU_PWROK GPIO17 Input - - Must have
2
If DGPU_PRSNT# is 1, in-order to get regular

discrete GFX cards working, program
A A
DGPU_PWROK as GPO and assert a high
SN74AHC1G08DCKR_SC70-5
value (1) on the pin.
Discrete Graphics Enable signal. Controlled by

Switchable Graphics Driver and driven by PCH
GPIO. Used to gate with Platform Reset to Security Classification Compal Secret Data Compal Electronics, Inc.
DGPU_HOLD_RST# GPIO50 Output Low Low Must have enable the Reset for dGPU. Issued Date 2011/07/15 2012/07/15 Title
Deciphered Date
0 = Keep dGPU in reset.
1 = Reset is released. This action taken 100 ms THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/8) PCI, USB, NVRAM
Size
Document Number Rev
after DGPU_PWROK to ensure clock is stable. 0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
PCH_GPIO0 RH170 1
+3VS
2 10K_0402_5%~D
TACH[0:7] are not
available on Mobile,
Configuration ID :
DIS = High
+3VS
used as GPIO
UH1F UMA = Low
2
PCH_GPIO1 RH164 1 2 10K_0402_5%~D
RH250
PCH_GPIO6 RH184 1 2 10K_0402_5%~D PCH_GPIO0 T7 C40 10K_0402_5%~D
BMBUSY# / GPIO0 TACH4 / GPIO68 DIS@
EC_SCI# RH160 1 2 10K_0402_5%~D PCH_GPIO1 A42 B41
1
TACH1 / GPIO1 TACH5 / GPIO69 KB_BL_DET <39> CFG_ID
PCIE_MCARD1_DET# RH172 1 2 10K_0402_5%~D PCH_GPIO6 H36 C41 CFG_ID +3VS
TACH2 / GPIO6 TACH6 / GPIO70
2
MSATA_DET# RH176 1 2 10K_0402_5%~D EC_SCI# E38 A40 RH249
<38> EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71 USB_MCARD1_DET# <42>
2
D 10K_0402_5%~D D
BT_RADIO_DIS# RH174 1 2 8.2K_0402_5%~D EC_SMI# C10 RH159 UMA@
<38> EC_SMI# GPIO8
10K_0402_5%~D
1
PCH_GPIO16 RH181 1 2 10K_0402_5%~D PCH_GPIO12 C4
LAN_PHY_PWR_CTRL / GPIO12
1
WWAN_RADIO_DIS# RH180 1 2 10K_0402_5%~D PCH_GPIO15 G2 P4
GPIO15 A20GATE GATEA20 <38>
RH161
KB_RST# RH175 1 2 10K_0402_5%~D AU16 PCH_PECI_R 1 2
PCH_GPIO16 U2 PECI H_PECI <8,38>
@ 0_0402_5%~D
SATA4GP / GPIO16 P5 KB_RST#
RCIN# KB_RST# <38>
D40 AY11
GPIO
<19,61> DGPU_PWROK TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <8>
CPU/MISC
MSATA_DET# T5 AY10 H_THERMTRIP#_C 1 2
+3V_PCH <48> MSATA_DET# SCLOCK / GPIO22 THRMTRIP# H_THERMTRIP# <8>
E8 T14 INIT3_3V# T4914 PAD~D RH162 close to PCH
EC_SMI# RH183 1 2 10K_0402_5%~D GPIO24 INIT3_3V# @ 390_0402_5%
PCH_GPIO27 E16 AY1 NV_CLE
within 0.25" ~ 2.5"
PAD~D T4915
PCH_GPIO12 RH248 1 2 10K_0402_5%~D @ GPIO27 DF_TVS
INIT3_3Vl has
PCH_GPIO28 P8
HDD_DETECT# 1 2 10K_0402_5%~D GPIO28 AH8
weak internal PU,
RH179
BT_RADIO_DIS# K1 TS_VSS1 can't pull low
SSI2 <42> BT_RADIO_DIS# STP_PCI# / GPIO34 AK11
DBC_EN K4 TS_VSS2
PCH_GPIO36 1 2 10K_0402_5%~D <35> DBC_EN GPIO35 AH10 +VCCPNAND
RH171
PCH_GPIO36 V8 TS_VSS3
PCH_GPIO37 RH246 1 2 10K_0402_5%~D SATA2GP / GPIO36 AK10
TS_VSS4
1
PCH_GPIO37 M5 Weak internal PU,
DBC_EN RH177 1 2 10K_0402_5%~D SATA3GP / GPIO37 RH166
PCIE_MCARD1_DET# N2 P37
Do not pull low
SSI2 2.2K_0402_5%~D
CE_EN 1 2 10K_0402_5%~D <42> PCIE_MCARD1_DET# SLOAD / GPIO38 NC_1
RH182
CE_EN M3 RH167
2
C <35> CE_EN SDATAOUT0 / GPIO39 NV_CLE 2 1 C
SSI2 V13 BG2 1K_0402_5%~D
H_SNB_IVB# <8>
<43> FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
WWAN_RADIO_DIS# V3 BG48 put two Res close to minimize the stub
<48> WWAN_RADIO_DIS# SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
HDD_DETECT# D6 BH3 DMI and FDI Tx/Rx Termination
<43> HDD_DETECT# GPIO57 VSS_NCTF_17
BH47
Voltage (Internal PD 20K)
VSS_NCTF_18
Low=Set to Vss
A4 BJ4 DF_TVS
+3V_PCH VSS_NCTF_1 VSS_NCTF_19
High=Set to Vcc
RH158 1K_0402_5%~D A44 BJ44
PCH_GPIO15 1 2 VSS_NCTF_2 VSS_NCTF_20
A45 BJ45
VSS_NCTF_3 VSS_NCTF_21
TLS Confidentiality (Internal PD 20K) A46 BJ46
NCTF
Low = no confidentiality A5 BJ5
GPIO15
High = confidentiality A6 BJ6
PCH_GPIO35 VSS_NCTF_6 VSS_NCTF_24
B3 C2
B47 C48
1 2 PCH_GPIO28 BD1 D1
@ RH165 1K_0402_5%~D BD49 D49
On-Die PLL Voltage Regulator BE1 E1
(Internal PU 20K) BE49 E49
B VSS_NCTF_12 VSS_NCTF_30 B
Low = Disable
GPIO28 BF1 F1
High = Enable
BF49 F49
PCH_GPIO28 needs to be connected to XDP_FN8

Please refer to Huron River Debug Board DG 0.5
A A

PCH (5/8) GPIO, CPU, MISC
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
D D
PCH Power Rail Table

+VCCP +1.05VS_VCCCORE
UH1G POWER S0 Iccmax
@ +VCCADAC +3VS Voltage Rail Voltage Current (A)
JP1
0.01U_0402_16V7K~D
0.1U_0402_10V7K~D
1300mA LH1
2 1 AA23 1mA VCCADAC U48 2 1
AC23 VCCCORE[1] BLM18PG181SN1_0603~D
VCCCORE[2] 1 1 1 V_PROC_IO 1.05 0.001
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AD21 CH34
JUMP_43X39 VCCCORE[3]
CRT
CH32
CH33
1 1 1 1 AD23 U47
AF21 VCCCORE[4] VSSADAC 10U_0603_6.3V6M~D
VCCCORE[5]
V5REF 5 0.001
2 2 2
CH36
CH37
CH38
AF23
VCC CORE
CH35
10U_0603_6.3V6M~D AG21 VCCCORE[6] +3VS
2 2 2 2 AG23 VCCCORE[7]
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 1mA AK36
AG26 VCCCORE[9] VCCALVDS
AG27 VCCCORE[10] AK37
VCCCORE[11] VSSALVDS
Vcc3_3 3.3 0.266
AG29 +VCCTX_LVDS +1.8VS
AJ23 VCCCORE[12] LH2
AJ26 VCCCORE[13] AM37 2 1 VccADAC 3.3 0.001
LVDS
AJ27 VCCCORE[14] VCCTX_LVDS[1] 0.1UH_MLF1608DR10KT_10%_1608
VCCCORE[15] 1 1 1
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
22U_0805_6.3V6M~D
CH41
AJ29 AM38 0.1uH inductor, 200mA
VCCCORE[16] VCCTX_LVDS[2]
CH39
CH40
AJ31 VccADPLLA 1.05 0.08
VCCCORE[17] AP36
60mA VCCTX_LVDS[3]
+VCCP 2 2 2
AP37 VccADPLLB 1.05 0.08
AN19 VCCTX_LVDS[4]
+VCCP +VCCAPLLEXP VCCIO[28]
@ LH3 VccCore 1.05 1.3
1 2 BJ22 +3VS
1UH_LB2012T1R0M_20%~D VCCAPLLEXP
1 V33 VccDMI 1.05 0.042
C CH42 AN16 VCC3_3[6] C
HVCMOS
VCCIO[15]
1
10U_0603_6.3V6M~D AN17 CH43 VccIO 1.05 2.925
@ 2 VCCIO[16] V34
VCC3_3[7] 0.1U_0402_10V7K~D
AN21 2 VccASW 1.05 1.01
VCCIO[17]
AN26
VCCIO[18]
VccSPI 3.3 0.02
AN27 2925mA AT16
VCCIO[19] VCCVRM[3] +VCCAFDI_VRM
+VCCP +1.05VS_VCC_EXP AP21 +VCCP VccDSW 3.3 0.003
JP15 VCCIO[20]
@
1 2 AP23 AT20
VCCIO[21] VCCDMI[1]
1 VccpNAND 1.8 0.19
+VCCP
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AP24
DMI
JUMP_43X118
CH45 VCCIO[22] CH44
VCCIO
CH46
CH47
CH48
CH49
AP26 20mA AB36 VccRTC 3.3 6 uA

10U_0603_6.3V6M~D VCCIO[23] VCCCLKDMI 2 1U_0402_6.3V6K~D
2 2 2 2 2 1
AT24
VCCIO[24] CH50 VccSus3_3 3.3 0.119
1U_0402_6.3V6K~D
AN33 2
VCCIO[25]
VccSusHDA 3.3 / 1.5 0.01
+3VS AN34 AG16
VCCIO[26] VCCDFTERM[1] +VCCPNAND @ JP16
VccVRM 1.8 / 1.5 0.16
BH29 190mA AG17 2 1
VCC3_3[3] VCCDFTERM[2] +1.8VS
0.1U_0402_10V7K~D
1
DFT / SPI
CH51 1 JUMP_43X39 VccCLKDMI 1.05 0.02
CH52
AJ16
0.1U_0402_10V7K~D VCCDFTERM[3]
B 2 AP16 VccSSC 1.05 0.095 B
+VCCP +1.05VS_VCCAPLL_FDI +VCCAFDI_VRM VCCVRM[2] 2
AJ17
VCCDFTERM[4]
2 @ 1 BG6 VccDIFFCLKN 1.05 0.055
RH194 0_0603_5%~D VccAFDIPLL
1U_0402_6.3V6K~D
1 @ JP17
AP17 VccALVDS 3.3 0.001
+VCCP VCCIO[27]
CH53
20mA V1 +3V_VCCPSPI 2 1
VCCSPI +3V_PCH
FDI
2@ AU20 JUMP_43X39 VccTX_LVDS 1.8 0.06

+VCCP VCCDMI[2] 1
CH54
BD82PPSM-QNHN-A0_BGA989~D 1U_0402_6.3V6K~D
2
+1.5VS +VCCAFDI_VRM
RH197
2 1
0_0603_5%~D
A A

PCH (6/8) PWR
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
+VCCP
WWW.AliSaler.Com +3V_PCH
2
RH198
@ 1
0_0603_5%~D
QH5
1 SHORT 2 UH1J POWER +VCCP +5VALW RH201 AO3419L_SOT23-3 +5V_PCH
RH199 0_0603_5%~D 1 0_0603_5%~D
D
CH55 +VCCACLK AD49 N26 2 1 3 1
ST VCCACLK VCCIO[29]
0.1U_0402_10V7K~D
1
0.1U_0402_10V7K~D P26 CH56
2 +VCCPDSW T16 VCCIO[30] PT
VCCDSW3_3 3mA 1
P28 1U_0402_6.3V6K~D
VCCIO[31] 2
CH57
G
@ CH58 2 1 +PCH_VCCDSW V12 T27
0.1U_0402_10V7K~D DCPSUSBYP VCCIO[32] 2
2
D T29 D
SSI2 T38 VCCIO[33] +3V_PCH <34> PCH_PWR_EN#
+VCCP +3VS VCC3_3[5]
@ LH4 1
10UH_LBR2012T100M_20%~D CH75 T23
1 2 +VCCAPLL_CPY_PCH +VCCAPLL_CPY_PCH BH23 119mA VCCSUS3_3[7]
VCCAPLLDMI2 1
1 1U_0402_6.3V6K~D T24 CH60
CH59 2 AL29 VCCSUS3_3[8] +5V_PCH +3V_PCH
+VCCP VCCIO[14]
10U_0603_6.3V6M~D V23 0.1U_0402_10V7K~D
@ VCCSUS3_3[9] 2
USB
2
2 +VCCSUS1 AL24 V24 +3V_PCH
DCPSUS[3] VCCSUS3_3[10] RH208 DH2
1
@ P24 RB751S40T1_SOD523-2~D
CH62 VCCSUS3_3[6] 10_0402_1%~D
1
1U_0402_6.3V6K~D AA19 CH61
1
2 VCCASW[1] T26 +PCH_V5REF_SUS
+VCCP +1.05VM_VCCASW VCCIO[34] +VCCP
@ AA21 1010mA 0.1U_0402_10V7K~D 1
JP18 VCCASW[2] 2 CH64
2 1 AA24 M26 +PCH_V5REF_SUS
VCCASW[3] 1mA V5REF_SUS
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 1 0.1U_0402_10V7K~D
AA26 @ CH63 2
JUMP_43X39 VCCASW[4]
Clock and Miscellaneous

CH65
CH66
AN23 +VCCA_USBSUS 1 2
AA27 DCPSUS[4]
2 2 VCCASW[5] AN24 1U_0402_6.3V6K~D
VCCSUS3_3[1] +3V_PCH
0.1U_0402_10V7K~D
AA29
VCCASW[6]
1 +5VS +3VS
AA31
VCCASW[7]
CH67
AC26 P34 +PCH_V5REF_RUN
VCCASW[8] 1mA V5REF
2
2
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1
AC27 RH212 DH3
VCCASW[9]
CH68
CH69
CH70
N20 RB751S40T1_SOD523-2~D
VCCSUS3_3[2] +3V_PCH
AC29 1 10_0402_1%~D
PCI/GPIO/LPC
C 2 2 2 VCCASW[10] N22 C
1
AC31 VCCSUS3_3[3] CH71 +PCH_V5REF_RUN
VCCASW[11] P20 1U_0402_6.3V6K~D+3VS
VCCSUS3_3[4] 2 1
AD29 CH72
VCCASW[12] P22
AD31 VCCSUS3_3[5] 1U_0402_16V6K
SSI2 VCCASW[13] 1 2
+VCCP LH7 W21 AA16 CH73
10UH_LBR2012T100M_20%~D VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K~D
1 2 +VCCA_DPLLA 1 2 +1.05VS_VCCA_A_DPL W23 W16 +3VS 2
RH239 0_0402_5%~D VCCASW[15] VCC3_3[8]
W24 T34
VCCASW[16] VCC3_3[4]
220U_B2_2.5VM_R35M~D
1 2 +VCCA_DPLLB 1 2 +1.05VS_VCCA_B_DPL 1
220U_B2_2.5VM_R35M~D
RH232 0_0402_5%~D LH8 W26 CH76

VCCASW[17]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 +3VS
10UH_LBR2012T100M_20%~D 1 1 W29 0.1U_0402_10V7K~D
+ + VCCASW[18] 2
CH94
CH95
SSI2
CH96
CH97
W31 AJ2
VCCASW[19] VCC3_3[2]
2 2 2 2 1
W33 CH77
VCCASW[20] AF13
VCCIO[5] 0.1U_0402_10V7K~D +VCCP
+VCCRTCEXT N16 2
DCPRTC AH13
1 VCCIO[12]
CH79 1
Y49 AH14 CH78
+VCCAFDI_VRM VCCVRM[4] VCCIO[13]
0.1U_0402_10V7K~D 1U_0402_6.3V6K~D
SSI2
+VCCP 2
AF14 2 +VCCSATAPLL @ LH6 +VCCP
+1.05VS_VCCA_A_DPL BD47 VCCIO[6] 10UH_LBR2012T100M_20%~D
VCCADPLLA 80mA AK1 1 2
1
SATA
CH80 +1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA
B VCCADPLLB 80mA 1 B
CH81
1U_0402_6.3V6K~D AF11 10U_0603_6.3V6M~D
2 VCCVRM[1] +VCCAFDI_VRM
AF17 @
AF33 VCCIO[7] 2
AF34 VCCDIFFCLKN[1] AC16 +VCCP
VCCDIFFCLKN[2]
55mA VCCIO[2]
1 AG34
VCCDIFFCLKN[3] AC17
CH82 VCCIO[3]
1 1
1U_0402_6.3V6K~D AG33 AD17 CH83
2 CH84 VCCSSC 95mA VCCIO[4]
1U_0402_6.3V6K~D CH85 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D
2 2 1 +VCCSST V16 2
DCPSST +VCCP
2 @ 1 +1.05VM_VCCSUS
+VCCP
RH219 0_0603_5%~D 1 T17 T21
@ V19 DCPSUS[1] VCCASW[22]
CH86 DCPSUS[2]
MISC
+VCCP 1U_0402_6.3V6K~D V21

2 VCCASW[23]
BJ8
CPU
V_PROC_IO 1mA T19

1 1 1 VCCASW[21]
CH87 CH88 CH89
+RTCVCC +3V_PCH
4.7U_0603_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
2 2 2 A22 P32
VCCRTC 10mA VCCSUSHDA
RTC
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1U_0402_6.3V6K~D
HDA
1 1 1 1
CH93
CH90
CH91
CH92
BD82PPSM-QNHN-A0_BGA989~D 0.1U_0402_10V7K~D
2 2 2 2
A A

PCH (7/8) PWR
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
UH1I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
D UH1H B11 VSS[162] VSS[262] K46 D
H5 B15 VSS[163] VSS[263] K7
VSS[0] B19 VSS[164] VSS[264] L18
AA17 AK38 B23 VSS[165] VSS[265] L2
AA2 VSS[1] VSS[80] AK4 B27 VSS[166] VSS[266] L20
AB11 VSS[5] VSS[84] AL16 B7 VSS[170] VSS[270] L48
AB14 VSS[6] VSS[85] AL17 F45 VSS[171] VSS[271] M12
AB39 VSS[7] VSS[86] AL19 BB12 VSS[172] VSS[272] P16
AB4 VSS[8] VSS[87] AL2 BB16 VSS[173] VSS[273] M18
AC19 VSS[12] VSS[91] AL27 BB28 VSS[177] VSS[277] M32
AC34 VSS[17] VSS[96] AM11 BC14 VSS[182] VSS[282] M46
AC48 VSS[18] VSS[97] AM14 BC18 VSS[183] VSS[283] M8
AD10 VSS[19] VSS[98] AM36 BC2 VSS[184] VSS[284] N18
AD11 VSS[20] VSS[99] AM39 BC22 VSS[185] VSS[285] P30
AD12 VSS[21] VSS[100] AM43 BC26 VSS[186] VSS[286] N47
AD24 VSS[24] VSS[103] AM7 BC36 VSS[189] VSS[289] T33
AD26 VSS[25] VSS[104] AN2 BC40 VSS[190] VSS[290] P40
AD34 VSS[28] VSS[107] AN31 BD46 VSS[193] VSS[293] P7
C AD36 VSS[29] VSS[108] AP12 BD5 VSS[194] VSS[294] R2 C
AD37 VSS[30] VSS[109] AP19 BE22 VSS[195] VSS[295] R48
AD38 VSS[31] VSS[110] AP28 BE26 VSS[196] VSS[296] T12
AD39 VSS[32] VSS[111] AP30 BE40 VSS[197] VSS[297] T31
AD4 VSS[33] VSS[112] AP32 BF10 VSS[198] VSS[298] T37
AD42 VSS[35] VSS[114] AP4 BF16 VSS[200] VSS[300] W34
AD8 VSS[39] VSS[118] AR2 BF26 VSS[204] VSS[304] V11
AE2 VSS[40] VSS[119] AR48 BF28 VSS[205] VSS[305] V17
AE3 VSS[41] VSS[120] AT11 BD3 VSS[206] VSS[306] V26
AF10 VSS[42] VSS[121] AT13 BF30 VSS[207] VSS[307] V27
AF12 VSS[43] VSS[122] AT18 BF38 VSS[208] VSS[308] V29
AD14 VSS[44] VSS[123] AT22 BF40 VSS[209] VSS[309] V31
AD16 VSS[45] VSS[124] AT26 BF8 VSS[210] VSS[310] V36
AF16 VSS[46] VSS[125] AT28 BG17 VSS[211] VSS[311] V39
AF26 VSS[49] VSS[128] AT34 BG44 VSS[214] VSS[314] W17
AF27 VSS[50] VSS[129] AT39 BG8 VSS[215] VSS[315] W19
AF29 VSS[51] VSS[130] AT42 BH11 VSS[216] VSS[316] W2
AF4 VSS[54] VSS[133] AU24 BH19 VSS[219] VSS[319] Y12
AF42 VSS[55] VSS[134] AU30 H10 VSS[220] VSS[320] Y38
AF46 VSS[56] VSS[135] AV16 BH27 VSS[221] VSS[321] Y4
AG19 VSS[60] VSS[139] AV38 BH39 VSS[225] VSS[325] BG29
B AG2 VSS[61] VSS[140] AV4 BH43 VSS[226] VSS[328] N24 B
AG31 VSS[62] VSS[141] AV43 BH7 VSS[227] VSS[329] AJ3
AG48 VSS[63] VSS[142] AV8 D3 VSS[228] VSS[330] AD47
AH11 VSS[64] VSS[143] AW14 D12 VSS[229] VSS[331] B43
AH3 VSS[65] VSS[144] AW18 D16 VSS[230] VSS[333] BE10
AH36 VSS[66] VSS[145] AW2 D18 VSS[231] VSS[334] BG41
AH39 VSS[67] VSS[146] AW22 D22 VSS[232] VSS[335] G14
AH40 VSS[68] VSS[147] AW26 D24 VSS[233] VSS[337] H16
AH42 VSS[69] VSS[148] AW28 D26 VSS[234] VSS[338] T36
AJ19 VSS[72] VSS[151] AW36 D34 VSS[237] VSS[343] C22
AJ21 VSS[73] VSS[152] AW40 D38 VSS[238] VSS[344] AP13
AJ24 VSS[74] VSS[153] AW48 D42 VSS[239] VSS[345] M14
AJ33 VSS[75] VSS[154] AV11 D8 VSS[240] VSS[346] AP3
AJ34 VSS[76] VSS[155] AY12 E18 VSS[241] VSS[347] AP1
AK12 VSS[77] VSS[156] AY22 E26 VSS[242] VSS[348] BE16
AK3 VSS[78] VSS[157] AY28 G18 VSS[243] VSS[349] BC16
VSS[79] VSS[158] G20 VSS[244] VSS[350] BG28
BD82PPSM-QNHN-A0_BGA989~D G26 VSS[245] VSS[351] BJ28
G28 VSS[246] VSS[352]
G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
A VSS[258] A

PCH (8/8) VSS
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com PEG_HTX_C_GRX_P0
PEG_HTX_C_GRX_N0
AG6
AG7
UV1A
PEX_RX0
Part 1 of 5
C6 GPU_VID_4
PEG_HTX_C_GRX_P1 AF7 PEX_RX0_N GPIO0 B2 GPU_VID_3
PEG_HTX_C_GRX_N1 AE7 PEX_RX1 GPIO1 D6 GPU_VID_0
PEX_RX1_N GPIO2 GPU_VID_0 <61>
PEG_HTX_C_GRX_P2 AE9 C7 1
GPU_GPIO3 @ RV3526 2 0_0402_5%~D H_DPRSLPVR GPU_VID_1
PEX_RX2 GPIO3 H_DPRSLPVR <61> GPU_VID_1 <61>
PEG_HTX_C_GRX_N2 AF9 F9 GPU_VID_2
PEG_HTX_C_GRX_P3 AG9 A3 GPU_VID_1 GPU_VID_3
PEG_HTX_C_GRX_N3 AG10 PEX_RX3 GPIO5 A4 GPU_VID_2 +3V_GPU SSI2 GPU_VID_4
GPU_VID_3 <61>
PEG_HTX_C_GRX_P4 AF10 B6 GPU_VID_5
GPIO
PEX_RX4 GPIO7 GPU_VID_5 <61>
D PEG_HTX_C_GRX_N4 AE10 A6 1 DIS@
RV2402 2 10K_0402_5%~D D
PEG_HTX_C_GRX_P5 AE12 PEX_RX4_N GPIO8 F8 THM_ALERT#
PEG_HTX_C_GRX_N5 AF12 PEX_RX5 GPIO9 C5
PEX_RX5_N GPIO10 FBVREF_ALTV <29,30>
PEG_HTX_C_GRX_P6 AG12 E7 GPU_VID_0
PEG_HTX_C_GRX_N6 AG13 PEX_RX6 GPIO11 D7 GPU_GPIO12 GPU_GPIO12 DIS@ DV6 2 1 RB751V-40_SOD323-2
PEX_RX6_N GPIO12 GPU_HOT# <38>
PEG_HTX_C_GRX_P7 AF13 B4 GPU_VID_5
PEG_HTX_C_GRX_N7 AE13 PEX_RX7 GPIO13 B3 1 DIS@
RV2405 2 100K_0402_5%~D
PEG_HTX_C_GRX_P8 AE15 PEX_RX7_N GPIO14 C3 1 DIS@
RV2406 2 100K_0402_5%~D
PEG_HTX_C_GRX_N8 AF15 PEX_RX8 GPIO15 D5
PEG_HTX_C_GRX_P9 AG15 PEX_RX8_N GPIO16 D4 1 DIS@
RV2407 2 100K_0402_5%~D
PEG_HTX_C_GRX_N9 AG16 PEX_RX9 GPIO17 C2 1 DIS@
RV2408 2 100K_0402_5%~D
PEG_HTX_C_GRX_P[0..15] PEG_HTX_C_GRX_P10 AF16 PEX_RX9_N GPIO18 F7 1 DIS@
RV2409 2 100K_0402_5%~D
<7> PEG_HTX_C_GRX_P[0..15] PEX_RX10 GPIO19
PEG_HTX_C_GRX_N10 AE16 E6
PEG_HTX_C_GRX_N[0..15] PEG_HTX_C_GRX_P11 AE18 PEX_RX10_N GPIO20 C4
<7> PEG_HTX_C_GRX_N[0..15] PEX_RX11 GPIO21
PEG_HTX_C_GRX_N11 AF18
PEG_GTX_C_HRX_P[0..15] PEG_HTX_C_GRX_P12 AG18 PEX_RX11_N
<7> PEG_GTX_C_HRX_P[0..15] PEX_RX12
PEG_HTX_C_GRX_N12 AG19
PEG_GTX_C_HRX_N[0..15] PEG_HTX_C_GRX_P13 AF19 PEX_RX12_N AE3
<7> PEG_GTX_C_HRX_N[0..15] PEX_RX13 DACA_HSYNC
PEG_HTX_C_GRX_N13 AE19 AE4
PEG_HTX_C_GRX_P14 AE21 PEX_RX13_N DACA_VSYNC
PEG_HTX_C_GRX_N14 AF21 PEX_RX14 AG3
DACA
PEG_HTX_C_GRX_P15 AG21 PEX_RX14_N DACA_RED AF3 +3V_GPU
PEG_HTX_C_GRX_N15 AG22 PEX_RX15 DACA_BLUE AF4 +3V_GPU
SSI2 PEX_RX15_N DACA_GREEN SSI2
2 1 AC9 AE2 1 2
PCI EXPRESS
PEG_GTX_C_HRX_P0 CV2402 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P0 GPU_GPIO3 DIS@
C
PEG_GTX_C_HRX_N0 CV2403 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N0 AB9 PEX_TX0 DACA_VREF AF2 GPU_GPIO12 1
RV3527 DIS@ 2 10K_0402_5%~D C
PEX_TX0_N DACA_RSET
1
PEG_GTX_C_HRX_P1 CV2404 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P1 AB10 THM_ALERT# 2
RV2432 DIS@ 1 10K_0402_5%~D
PEG_GTX_C_HRX_N1 CV2405 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N1 AC10 PEX_TX1 @ RV2412 I2CA_SCL 2
RV2442 DIS@ 1 2.2K_0402_5%~D
PEG_GTX_C_HRX_P2 CV2406 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P2 AD11 PEX_TX1_N 10K_0402_5%~D I2CA_SDA 2
RV2413 DIS@ 1 2.2K_0402_5%~D
PEG_GTX_C_HRX_N2 CV2407 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N2 AC11 PEX_TX2 AE5 GPU_JTAG_TCK @ TV2401 I2CB_SCL 2
RV2414 DIS@ 1 2.2K_0402_5%~D
PEG_GTX_C_HRX_P3 CV2408 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P3 AC12 PEX_TX2_N JTAG_TCK AE6 GPU_JTAG_TDI @ TV2402 I2CB_SDA 2
RV2415 DIS@ 1 2.2K_0402_5%~D
2
PEG_GTX_C_HRX_N3 CV2401 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N3 AB12 PEX_TX3 JTAG_TDI AF6 GPU_JTAG_TDO @ TV2403 I2CC_SCL 2
RV2416 DIS@ 1 2.2K_0402_5%~D
TEST
PEG_GTX_C_HRX_P4 CV2409 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P4 AB13 PEX_TX3_N JTAG_TDO AD6 GPU_JTAG_TMS @ TV2404 GPU_TESTMODE I2CC_SDA 2
RV2417 DIS@ 1 2.2K_0402_5%~D
PEG_GTX_C_HRX_N4 CV2410 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N4 AC13 PEX_TX4 JTAG_TMS AG4 RV2419 1 DIS@ 2 10K_0402_5%~D 2
EC_SMB_CK2_PX RV2418 DIS@ 1 2.2K_0402_5%~D
PEG_GTX_C_HRX_P5 CV2411 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P5 AD14 PEX_TX4_N JTAG_TRST_N ST 2
EC_SMB_DA2_PX RV2420 DIS@ 1 2.2K_0402_5%~D
1
PEG_GTX_C_HRX_N5 CV2412 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N5 AC14 PEX_TX5 AD9 GPU_TESTMODE DIS@ RV2421 2.2K_0402_5%~D
PEG_GTX_C_HRX_P6 CV2413 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P6 AC15 PEX_TX5_N TESTMODE RV2422
PEG_GTX_C_HRX_N6 CV2414 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N6 AB15 PEX_TX6
PEX_TX6_N 10K_0402_5%~D
PEG_GTX_C_HRX_P7 CV2415 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_P7 AB16
PEG_GTX_C_HRX_N7 CV2416 2 1 DIS@ 0.22U_0402_16V7K~D PEG_GTX_HRX_N7 AC16 PEX_TX7 B7 I2CA_SCL
2
PEG_GTX_C_HRX_P8 CV2417 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P8 AD17 PEX_TX7_N I2CA_SCL A7 I2CA_SDA
PEG_GTX_C_HRX_N8 CV2418 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N8 AC17 PEX_TX8 I2CA_SDA
PEG_GTX_C_HRX_P9 CV2419 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P9 AC18 PEX_TX8_N C9 I2CB_SCL
PEG_GTX_C_HRX_N9 CV2420 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N9 AB18 PEX_TX9 I2CB_SCL C8 I2CB_SDA
PEG_GTX_C_HRX_P10 CV2421 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P10 AB19 PEX_TX9_N I2CB_SDA
I2C
PEG_GTX_C_HRX_N10 CV2422 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N10 AC19 PEX_TX10 A9 I2CC_SCL
PEG_GTX_C_HRX_P11 CV2423 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P11 AD20 PEX_TX10_N I2CC_SCL B9 I2CC_SDA
PEG_GTX_C_HRX_N11 CV2424 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N11 AC20 PEX_TX11 I2CC_SDA +3V_GPU
PEG_GTX_C_HRX_P12 CV2425 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P12 AC21 PEX_TX11_N D9 EC_SMB_CK2_PX
B PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_P13
CV2426
CV2427
2
2
1
1
@
@
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
PEG_GTX_HRX_N12
PEG_GTX_HRX_P13
AB21
AD23
PEX_TX12
PEX_TX12_N
I2CS_SCL
I2CS_SDA
D8 EC_SMB_DA2_PX I2C Slave Address 0X9E B
PEX_TX13
2
PEG_GTX_C_HRX_N13 CV2428 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N13 AE23
PEG_GTX_C_HRX_P14 CV2429 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P14 AF24 PEX_TX13_N DIS@
ST
PEG_GTX_C_HRX_N14 CV2430 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N14 AE24 PEX_TX14 A10 RV2423
1 DIS@ 2 10K_0402_5%~D EC_SMB_CK2_PX 1 6
PEX_TX14_N XTAL_SSIN PCH_SMLCLK <17,35,38>
PEG_GTX_C_HRX_P15 CV2431 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_P15 AG24
5
PEG_GTX_C_HRX_N15 CV2432 2 1 @ 0.22U_0402_16V7K~D PEG_GTX_HRX_N15 AG25 PEX_TX15 C10 RV2424
1 DIS@ 2 10K_0402_5%~D QV2402A
PEX_TX15_N XTAL_OUTBUFF DMN66D0LDW-7_SOT363-6~D
ST
CLK
AE8 B10 XTAL_OUT EC_SMB_DA2_PX 4 3

PT <17> CLK_PEG_VGA
AD8 PEX_REFCLK XTAL_OUT DIS@
PCH_SMLDATA <17,35,38>
<17> CLK_PEG_VGA# PEX_REFCLK_N C11 XTALIN QV2402B
AF22 XTAL_IN DMN66D0LDW-7_SOT363-6~D
1 2 AE22 PEX_TSTCLK_OUT
RV2425 DIS@ 200_0402_5%~D PEX_TSTCLK_OUT_N
2 1 AF25 AB6 RV2431 1 @ 210M_0402_5%
RV2426 DIS@ 2.49K_0402_1%~D PEX_TERMP PEX_WAKE_N
2 1 AC7 D10 RV2428
1 DIS@ 2 10K_0402_5%~D
<19> PLTRST_VGA# PEX_RST_N PGOOD
RV2427 DIS@ 0_0402_5%~D DIS@
CLKRQ_GPU# AC6 E9 1 DIS@
RV2429 2 10K_0402_5%~D +3V_GPU YV2401
PEX_CLKREQ_N CEC XTALIN 1 3 XTAL_OUT
+3V_GPU +3V_GPU IN OUT
N13P-GV-S_FCBGA595~D
PT DIS@
1
2 4
1
DIS@
PT
DIS@ CV2433 GND GND CV2434
2
DIS@ 10P_0402_50V8J~D 27MHZ_12PF_X3G027000FC1H-H~D 10P_0402_50V8J~D

RV2433 2 2
A
10K_0402_5%~D
SSI2 A
2
QV2401
G
1
DIS@ 3 CLKRQ_GPU#
<17> PEG_A_CLKRQ# Security Classification Compal Secret Data Compal Electronics, Inc.
D

2N7002H 1N_SOT23-3 @ RV2434
@ 10K_0402_5%~D
N13P(1/5)_PCIE/GPIO/I2C/DAC
1 2 Size Document Number Rev
Custom LA-7841P 0.3
1
RV2401 0_0402_5%~D MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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UV1C
Part 3 of 5
D1 STRAP0
AC4 IFPA_TXC STRAP0 D2 STRAP1
STRAP
Y4 IFPA_TXC_N STRAP1 E4 STRAP2
Y3 IFPA_TXD0 STRAP2 E3 STRAP3
AA3 IFPA_TXD0_N STRAP3 D3 STRAP4
AA2 IFPA_TXD1 STRAP4 C1 BUFRST 2 DIS@ 1
AB1 IFPA_TXD1_N STRAP5 RV2502 10K_0402_1%~D
AA1 IFPA_TXD2
AA4 IFPA_TXD2_N
AA5 IFPA_TXD3
IFPA_TXD3_N
GENERAL
D D11 BUFRST D
AB5 BUFRST_N
AB4 IFPB_TXC E12
AB3 IFPB_TXC_N THERMDN F12
AB2 IFPB_TXD4 THERMDP
AD3 IFPB_TXD4_N
LVDS / TMDS
AD2 IFPB_TXD5 +3V_GPU
AE1 IFPB_TXD5_N
AD1 IFPB_TXD6 D12 ROM_CS# 1 @ 2
AD4 IFPB_TXD6_N ROM_CS_N RV2503 10K_0402_5%~D
AD5 IFPB_TXD7 C12 ROM_SCLK_GPU
SERIAL
IFPB_TXD7_N ROM_SCLK
B12 ROM_SI_GPU 1
N4 ROM_SI
N5 IFPC_AUX_I2CW_SCL A12 ROM_SO_GPU @CV2502
@CV2502
T2 IFPC_AUX_I2CW_SDA_N ROM_SO 68P_0402_50V8J~D
T3 IFPC_L0 2
T1 IFPC_L0_N
R1 IFPC_L1 AA6
R2 IFPC_L1_N IFPAB_RSET
R3 IFPC_L2 T6
N2 IFPC_L2_N IFPC_RSET
N3 IFPC_L3 U6
IFPC_L3_N IFPD_RSET
K6
P3 IFPEF_RSET
P4 IFPD_AUX_I2CX_SCL
V3 IFPD_AUX_I2CX_SDA_N
V4 IFPD_L0 AD10
U3 IFPD_L0_N NC AD7
U4 IFPD_L1 NC B19
T4 IFPD_L1_N NC
C T5 IFPD_L2 G1 C
R4 IFPD_L2_N NC_G1 G2
R5 IFPD_L3 NC_G2 G3
IFPD_L3_N NC_G3 G4
NC_G4 G5
J2 NC_G5 G6
J3 IFPE_AUX_I2CY_SCL NC_G6 G7
N1 IFPE_AUX_I2CY_SDA_N NC_G7
M1 IFPE_L0 V1
M2 IFPE_L0_N NC_V1 V2
M3 IFPE_L1 NC_V2 V5
K2 IFPE_L1_N NC_V5 V6
K3 IFPE_L2 NC_V6
K1 IFPE_L2_N W1
J1 IFPE_L3 NC_W1 W2
IFPE_L3_N NC_W2 W3
NC_W3 W4
H3 NC_W4
H4 IFPF_AUX_I2CZ_SCL
M4 IFPF_AUX_I2CZ_SDA_N
M5 IFPF_L0
L3 IFPF_L0_N E10
L4 IFPF_L1 VMON_IN0 F10
K4 IFPF_L1_N VMON_IN1
K5 IFPF_L2
J4
J5
IFPF_L2_N
IFPF_L3
VRAM Setting GPU BIOS Device ID
IFPF_L3_N
Vendor STRAP[3:0] N13P-GV-S-A2 0x1140
DIS@
B
Samsung 128MX16 (SA000048E0L) 0101 PT B
+3V_GPU
Hynix 128MX16 (SA00004GD0L) 0100 Binary Mode Straps
PT
10K_0402_1%~D
34.8K_0402_1%~D
34.8K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
4.99K_0402_1%~D
4.99K_0402_1%~D
4.99K_0402_1%~D
STRAP Pin Name STRAP Mapping Resistance Polarity

SAMSUNG HYNIX
2
2
@ RV2504
DIS@ RV2506
RV2505
@ RV2507
RV2508
@ RV2509
RV2510
RV2511
For Hynix Pull-down 10K ohm to GND,

RV2504 RV2512 STRAP0 RAM_CFG[0] 10K Ohm Samsung pull-high 10K ohm to 3.3V
1
@ @ @ @
STRAP0
STRAP1 RAM_CFG[1] 10K Ohm Pull-down 10K ohm to GND
STRAP1
STRAP2 10K_0402_1%~D 10K_0402_1%~D STRAP2 RAM_CFG[2] 10K Ohm Pull-up 10K ohm to +3V_GPU
STRAP3 X76_SAM@ X76_HYN@
STRAP4
ROM_SCLK_GPU STRAP3 RAM_CFG[3] 10K Ohm Pull-down 10K ohm to GND
ROM_SI_GPU
10K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
34.8K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
10K_0402_1%~D
ROM_SO_GPU
STRAP4 PCIE_MAX_SPEED 10K Ohm Pull-down 10K ohm to GND
2
2
DIS@ RV2515
DIS@ RV2516
DIS@ RV2517
@ RV2512
DIS@ RV2513
DIS@ RV2501
DIS@ RV2518
@ RV2514
ROM_SCLK SMB_ALT_ADDR 10K Ohm Pull-down 10K ohm to GND

1
ROM_SI SUB_VENDOR 10K Ohm Pull-down 10K ohm to GND
A PT ROM_SO VGA_DEVICE 10K Ohm Pull-down 10K ohm to GND A

N13P(2/5)_LVDS/HDMI/DP/STRP
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com (42A) Place Under GPU

+1.5V_GPU
+GPU_CORE +3V_GPU
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
UV1D
Place Near GPU Place Under GPU Per Pin RV2602
1 1 1 1 1 1 1 1 1 1 1 1
CV2608
CV2609
CV2616
CV2618
CV2619
CV2617
Part 4 of 5 +3.3V_RUN_VDD33 1 DIS@ 2
CV2625
CV2623
CV2622
CV2620
CV2615
CV2624
K10 B26 0_0603_5%~D
VDD FBVDDQ
DIS@
DIS@
DIS@
@
K12 C25
DIS@
DIS@
DIS@
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
K14 VDD FBVDDQ E23 2 2 2 2 2 2 2 2 2 2 2 2
4.7U_0603_6.3VAK~D
VDD FBVDDQ 1 1 1 1 1 1
K16 E26
D K18 VDD FBVDDQ F14 CV2660 CV2661 CV2662 CV2663 CV2664 CV2665 D
DIS@
DIS@
DIS@
VDD FBVDDQ
DIS@
DIS@
DIS@
L11 F21
L13 VDD FBVDDQ G13 2 2 2 2 2 2
L15 VDD FBVDDQ G14
Place Near GPU
L17 VDD FBVDDQ G15
VDD FBVDDQ
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
M10 G16
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
M12 VDD FBVDDQ G18
VDD FBVDDQ 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CV2613
CV2606
CV2607
CV2610
CV2621
CV2626
CV2627
CV2628
CV2629
CV2630
M14 G19
M16 VDD FBVDDQ G20
CV2658
CV2657
CV2656
CV2655
VDD FBVDDQ
@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
M18 G21
N11 VDD FBVDDQ H24 2 2 2 2 2 2 2 2 2 2 2 2 2 2
N13 VDD FBVDDQ H26
N15 VDD FBVDDQ J21
N17 VDD FBVDDQ K21
P10 VDD FBVDDQ L22
P12 VDD FBVDDQ L24 +1.05V_GPU
P14 VDD FBVDDQ L26
VDD FBVDDQ
P16
VDD FBVDDQ
M21 Mid-way between GPU and power supply Place near GPU Place Under GPU Place Near GPU (210mA) +3V_GPU
P18 N21
VDD FBVDDQ
CV2648
CV2649
CV2650
R11 R21 +3.3V_PEX_VDD 2 RV2611 1
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
R13 VDD FBVDDQ T21 0_0603_5%~D
0.1U_0402_16V7K~D
4.7U_0603_6.3VAK~D
4.7U_0603_6.3VAK~D
VDD FBVDDQ 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R15 V21 1 1 1 DIS@
R17 VDD FBVDDQ W21
CV2654
CV2653
CV2641
CV2642
CV2643
CV2652
CV2647
CV2644
CV2645
CV2646
CV2651
POWER
VDD FBVDDQ
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
T10 CV2674 CV2675 CV2676
DIS@
DIS@
C VDD 2 2 2 2 2 2 2 2 2 2 2 2 2 2 C
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
T12 AA10
DIS@
DIS@
T14 VDD PEX_IOVDDQ AA12 2 2 2
T16 VDD PEX_IOVDDQ AA13
T18 VDD PEX_IOVDDQ AA16
U11 VDD PEX_IOVDDQ AA18
U17 VDD PEX_IOVDDQ AA21 RV2621 +1.05V_GPU
V10 VDD PEX_IOVDDQ AB22
Place near GPU Place under GPU DIS@
V12 VDD PEX_IOVDDQ AC23 +PEX_PLLVDD 1 2
V14 VDD PEX_IOVDDQ AD24 0_0402_5%~D LV2603 +1.05V_GPU
Place near GUP Place under GPU
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
4.7U_0603_6.3VAK~D
V16 VDD PEX_IOVDDQ AE25 DIS@
VDD (3300mA) PEX_IOVDDQ 1 1 1
V18 AF26 +SP_PLLVDD 2 1
VDD PEX_IOVDDQ AF27
CV2671
CV2672
CV2669
RV2601 BLM18PG181SN1_0603~D
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4.7U_0603_6.3VAK~D
1 DIS@ 2 F2 PEX_IOVDDQ
<61> GPU_VDD_SENSE VDD_SENSE 2 2 2 1 1 1 1
DIS@
DIS@
DIS@
0_0402_5%~D AA22
G10 PEX_IOVDD AB23
CV2677
CV2678
CV2680
CV2601
VDD33 PEX_IOVDD
DIS@
DIS@
DIS@
G12 AC24
DIS@
G8 VDD33 PEX_IOVDD AD25 2 2 2 2
+3.3V_RUN_VDD33 G9 VDD33 PEX_IOVDD AE26
VDD33 PEX_IOVDD AE27
F11 PEX_IOVDD
3V3AUX (66mA)
B Place near GPU Place under GPU LV2602 +1.05V_GPU B
+3.3V_PEX_VDD AB8 AA8 +3.3V_PEX_VDD DIS@ +1.05V_GPU
PEX_SVDD_3V3 PEX_PLL_HVDD AA9 +FB_PLL_AVDD One per Pin 2 1 DIS@
RV2603 2 DIS@ 1 10K_0402_5%~D W6 PEX_PLL_HVDD MMZ1608D301BT_0603
Place near GPU Place under GPU LV2604
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
RV2604 2 DIS@ 1 10K_0402_5%~D Y6 IFPA_IOVDD +CORE_PLLVDD 2 1
IFPB_IOVDD 1 1 1 1 1
RV2605 2 DIS@ 1 10K_0402_5%~D P6 AA14 +PEX_PLLVDD
22U_0805_6.3V6M~D
0.1U_0402_10V7K~D
2 1 10K_0402_5%~D R6 IFPC_IOVDD PEX_PLLVDD AA15
CV2666
CV2667
CV2673
CV2670
CV2668
RV2606 DIS@ (150mA) 1 1 BLM18PG300SN1D_2P~D
IFPD_IOVDD PEX_PLLVDD
DIS@
DIS@
DIS@
DIS@
RV2608 2 DIS@ 1 10K_0402_5%~D H6 N6 +SP_PLLVDD
DIS@
2 1 10K_0402_5%~D J6 IFPE_IOVDD VID_PLLVDD M6 2 2 2 2 2
CV2681
CV2682
RV2607 DIS@
IFPF_IOVDD SP_PLLVDD
DIS@
DIS@
L6 +CORE_PLLVDD
RV2609 2 DIS@ 1 10K_0402_5%~D V7 CORE_PLLVDD F16 +FB_PLL_AVDD 2 2
RV2610 2 DIS@ 1 10K_0402_5%~D W7 IFPAB_PLLVDD FB_PLLAVDD P22
IFPAB_PLLVDD FB_PLLAVDD H22
RV2612 2 DIS@ 1 10K_0402_5%~D M7 FB_DLLAVDD
RV2613 2 DIS@ 1 10K_0402_5%~D N7 IFPC_PLLVDD
IFPC_PLLVDD W5 1 DIS@ 2 +1.5V_GPU
RV2615 2 DIS@ 1 10K_0402_5%~D R7 DACA_VDD RV2614 10K_0402_5%~D
RV2616 2 DIS@ 1 10K_0402_5%~D T7 IFPD_PLLVDD D22 1 DIS@ 2
IFPD_PLLVDD FB_CAL_PD_VDDQ RV2617 40.2_0402_1%~D
RV2618 2 DIS@ 1 10K_0402_5%~D J7 F3 1 DIS@ 2
RV2620 2 DIS@ 1 10K_0402_5%~D K7 IFPEF_PLLVDD FB_CLAMP RV2619 10K_0402_5%~D
IFPEF_PLLVDD
A A
DIS@ Security Classification Compal Secret Data Compal Electronics, Inc.
N13P(3/5)_POWER
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-7841P 0.3
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UV1E
Part 5 of 5
AA7 L10
A2 GND GND L12
D A26 GND GND L14 D
AB11 GND GND L16
AB14 GND GND L18
AB17 GND GND L2
AB20 GND GND L23
AB24 GND GND L25
AC2 GND GND L5
AC22 GND GND M11
AC26 GND GND M13
AC5 GND GND M15
AC8 GND GND M17
AD12 GND GND N10
AD13 GND GND N12
AD15 GND GND N14
AD16 GND GND N16
AD18 GND GND N18
GND GND
GND
AD19 P11
AD21 GND GND P13
AD22 GND GND P15
AE11 GND GND P17
AE14 GND GND P2
AE17 GND GND P23
AE20 GND GND P26
AF1 GND GND P5
C GND GND C
AF11 R10
AF14 GND GND R12
AF17 GND GND R14
AF20 GND GND R16
AF23 GND GND R18
AF5 GND GND T11
AF8 GND GND T13
AG2 GND GND T15
AG26 GND GND T17
B1 GND GND U10
B11 GND GND U12
B14 GND GND U14
B17 GND GND U16
B20 GND GND U18
B23 GND GND U2
B27 GND GND U23
B5 GND GND U26
B8 GND GND U5
E11 GND GND V11
E14 GND GND V13
E17 GND GND V15
E2 GND GND V17
E20 GND GND Y2
E22 GND GND Y23
B B
E25 GND GND Y26
E5 GND GND Y5
E8 GND GND AB7
H2 GND GND
H23 GND C24 RV2701 1 DIS@ 2 40.2_0402_1%~D
H25 GND FB_CAL_PU_GND
H5 GND B25 RV2702 1 DIS@ 2 60.4_0402_1%~D
K11 GND FB_CAL_TERM_GND
K13 GND F6 RV2703 1 @
PT
2 40.2K_0402_1%~D
K15 GND MULTI_STRAP_REF0_GND F4 RV2704 1 @ 2 40.2K_0402_1%~D
K17 GND MULTI_STRAP_REF1_GND F5 RV2705 1 @ 2 40.2K_0402_1%~D
GND MULTI_STRAP_REF2_GND
F1 RV2706 1 DIS@ 2 0_0402_5%~D
GND_SENSE
DIS@
GPU_VSS_SENSE <61>
A A

N13P(4/5)_GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B LA-7841P 0.3
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Part 2 of 5 FBA_CMD[0..31] <29,30>
<29> FBA_D[0..31] FBA_D0 E18 C27 FBA_CMD0
FBA_D1 F18 FBA_D0 FBA_CMD0 C26 FBA_CMD1
FBA_D2 E16 FBA_D1 FBA_CMD1 E24 FBA_CMD2
FBA_D3 F17 FBA_D2 FBA_CMD2 F24 FBA_CMD3
FBA_D4 D20 FBA_D3 FBA_CMD3 D27 FBA_CMD4
FBA_D5 D21 FBA_D4
FBA_D5
FBA_CMD4
FBA_CMD5
D26 FBA_CMD5 Mode H - Command Mapping
FBA_D6 F20 F25 FBA_CMD6
FBA_D7 E21 FBA_D6 FBA_CMD6 F26 FBA_CMD7
FBA_D7 FBA_CMD7 DATA Bus
FBA_D8 E15 F23 FBA_CMD8
D FBA_D9 D15 FBA_D8 FBA_CMD8 G22 FBA_CMD9 Address D
FBA_D9 FBA_CMD9 0..31 32..63
FBA_D10 F15 G23 FBA_CMD10
FBA_D11 F13 FBA_D10 FBA_CMD10 G24 FBA_CMD11
FBA_D11 FBA_CMD11 CMD0 CS*
FBA_D12 C13 F27 FBA_CMD12
FBA_D13 B13 FBA_D12 FBA_CMD12 G25 FBA_CMD13
FBA_D13 FBA_CMD13 CMD1 A3_BA3
FBA_D14 E13 G27 FBA_CMD14
FBA_D15 D13 FBA_D14 FBA_CMD14 G26 FBA_CMD15
MEMORY INTERFACE
FBA_D16 B15 M24 FBA_CMD16
FBA_D17 C16 FBA_D16 FBA_CMD16 M23 FBA_CMD17
FBA_D18 A13 K24 FBA_CMD18
FBA_D19 A15 FBA_D18 FBA_CMD18 K23 FBA_CMD19
FBA_D20 B18 M27 FBA_CMD20
FBA_D21 A18 FBA_D20 FBA_CMD20 M26 FBA_CMD21
FBA_D21 FBA_CMD21 CMD5 WE*
FBA_D22 A19 M25 FBA_CMD22
FBA_D23 C19 FBA_D22 FBA_CMD22 K26 FBA_CMD23
FBA_D23 FBA_CMD23 CMD6 A7_A8
FBA_D24 B24 K22 FBA_CMD24
FBA_D25 C23 FBA_D24 FBA_CMD24 J23 FBA_CMD25
FBA_D25 FBA_CMD25 CMD7 A6_A11
FBA_D26 A25 J25 FBA_CMD26
FBA_D27 A24 FBA_D26 FBA_CMD26 J24 FBA_CMD27
FBA_D27 FBA_CMD27 CMD8 ABI*
FBA_D28 A21 K27 FBA_CMD28
FBA_D29 B21 FBA_D28 FBA_CMD28 K25 FBA_CMD29
FBA_D29 FBA_CMD29 CMD9 A12_RFU
FBA_D30 C20 J27 FBA_CMD30
FBA_D31 C21 FBA_D30 FBA_CMD30 J26 FBA_CMD31
<30> FBA_D[32..63] FBA_D31 FBA_CMD31 CMD10 A0_A10
FBA_D32 R22
FBA_D33 R24 FBA_D32
FBA_D33 FBA_DBI[3..0] <29> CMD11 A1_A9
FBA_D34 T22 D19 FBA_DBI0
FBA_D35 R23 FBA_D34 FBA_DQM0 D14 FBA_DBI1
FBA_D35 FBA_DQM1 CMD12 RAS*
FBA_D36 N25 C17 FBA_DBI2
FBA_D37 N26 FBA_D36 FBA_DQM2 C22 FBA_DBI3
FBA_D37 FBA_DQM3 FBA_DBI[7..4] <30> CMD13 RST*
FBA_D38 N23 P24 FBA_DBI4
FBA_D39 N24 FBA_D38 FBA_DQM4 W24 FBA_DBI5
FBA_D39 FBA_DQM5 CMD14 CKE*
FBA_D40 V23 AA25 FBA_DBI6
C FBA_D41 V22 FBA_D40 FBA_DQM6 U25 FBA_DBI7 C
FBA_D41 FBA_DQM7 CMD15 CAS#
FBA_D42 T23
+1.5V_GPU FBA_D43 U22 FBA_D42 F19
FBA_D43 FBA_DQS_RN0 CMD16 CS*
FBA_D44 Y24 C14
FBA_D44 FBA_DQS_RN1
1.1K_0402_1%~D 1.1K_0402_1%~D
FBA_D45 AA24 A16 CMD17 A3_BA3

FBA_D45 FBA_DQS_RN2
1
@ RV2807
FBA_D46 Y22 A22

FBA_D47 AA23 FBA_D46 FBA_DQS_RN3 P25
FBA_D47 FBA_DQS_RN4 CMD18 A2_BA0
FBA_D48 AD27 W22
FBA_D49 AB25 FBA_D48 FBA_DQS_RN5 AB27
16mil FBA_D49 FBA_DQS_RN6 CMD19 A4_BA2
FBA_D50 AD26 T27
2
+FB_VREF FBA_D51 AC25 FBA_D50 FBA_DQS_RN7

FBA_D51 FBA_EDC[3..0] <29> CMD20 A5_BA1
FBA_D52 AA27 E19 FBA_EDC0
FBA_D52 FBA_DQS_WP0
1
@ RV2808
0.01U_0402_25V7K~D
1 FBA_D53 AA26 C15 FBA_EDC1 CMD21 WE*

FBA_D53 FBA_DQS_WP1
@ CV2805
FBA_D54 W26 B16 FBA_EDC2

FBA_D55 Y25 FBA_D54 FBA_DQS_WP2 B22 FBA_EDC3
FBA_D55 FBA_DQS_WP3 FBA_EDC[7..4] <30> CMD22 A7_A8
FBA_D56 R26 R25 FBA_EDC4
2 FBA_D57 T25 FBA_D56 FBA_DQS_WP4 W23 FBA_EDC5 CMD23 A6_A11
2
FBA_D58 N27 FBA_D57 FBA_DQS_WP5 AB26 FBA_EDC6

FBA_D59 R27 FBA_D58 FBA_DQS_WP6 T26 FBA_EDC7
FBA_D59 FBA_DQS_WP7 CMD24 ABI*
FBA_D60 V26
FBA_D61 V27 FBA_D60 D18
FBA_D61 FBA_WCK01 FBA_WCK01 <29> CMD25 A12_RFU
FBA_D62 W27 C18
FBA_D63 W25 FBA_D62 FBA_WCK01_N D17 FBA_WCK01# <29>
FBA_D63 FBA_WCK23 FBA_WCK23 <29> CMD26 A0_A10
D16
+FB_VREF D23 FBA_WCK23_N T24 FBA_WCK23# <29>
TV2406 @
FB_VREF_PROBE FBA_WCK45 FBA_WCK45 <30> CMD27 A1_A9
U24
D24 FBA_WCK45_N V24 FBA_WCK45# <30>
CLKA0 CMD28 RAS*
<29> CLKA0 D25 FBA_CLK0 FBA_WCK67 V25 FBA_WCK67 <30>
CLKA0#
<29> CLKA0# FBA_CLK0_N FBA_WCK67_N FBA_WCK67# <30> +1.5V_GPU CMD29 RST*
CLKA1 N22
<30> CLKA1 M22 FBA_CLK1 F22
CLKA1# RV2801 1 2 60.4_0402_1%~D CMD30 CKE*
<30> CLKA1# FBA_CLK1_N FBA_DEBUG0 J22 RV2812 1 2 60.4_0402_1%~D
B FBA_DEBUG1 B
CMD31 CAS*
A A

N13P(5/5)_MEMORY INTERFACE
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
Memory Partition A - Lower 32
128X16 GDDR5
UV4
MF=0 MF=1
MIRROR
MF=1 MF=0
UV5
NORMAL
bits MF=0 MF=1 MF=1 MF=0 FBA_EDC3 C2
C13 EDC0 EDC3
DQ24
DQ25
DQ0
DQ1
A4
A2
B4
FBA_D24
FBA_D25
FBA_D26
FBA_CMD[0..31]
FBA_D[0..31]
FBA_CMD[0..31] <28,30>
A4 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D[0..31] <28>

FBA_D0 FBA_EDC1 FBA_D27
FBA_EDC0 C2 DQ24 DQ0 A2 FBA_D1 R2 EDC2 EDC1 DQ27 DQ3 E4 FBA_D28 FBA_DBI[0..3]
C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D2 EDC3 EDC0 DQ28 DQ4 E2 FBA_D29 FBA_DBI[0..3] <28>
FBA_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D3 DQ29 DQ5 F4 FBA_D30 FBA_EDC[0..3]
R2 EDC2 EDC1 DQ27 DQ3 E4 D2 DQ30 DQ6 F2 FBA_EDC[0..3] <28>
FBA_D4 FBA_DBI3 FBA_D31
EDC3 EDC0 DQ28 DQ4 E2 FBA_D5 D13 DBI0# DBI3# DQ31 DQ7 A11
D DQ29 DQ5 F4 FBA_D6 FBA_DBI1 P13 DBI1# DBI2# DQ16 DQ8 A13 D
FBA_DBI0 D2 DQ30 DQ6 F2 FBA_D7 P2 DBI2# DBI1# DQ17 DQ9 B11
D13 DBI0# DBI3# DQ31 DQ7 A11 DBI3# DBI0# DQ18 DQ10 B13
FBA_DBI2 P13 DBI1# DBI2# DQ16 DQ8 A13 CLKA0 J12 DQ19 DQ11 E11
P2 DBI2# DBI1# DQ17 DQ9 B11 CLKA0# J11 CK DQ20 DQ12 E13
DBI3# DBI0# DQ18 DQ10 B13 FBA_CMD14 J3 CK# DQ21 DQ13 F11
CLKA0 J12 DQ19 DQ11 E11 CKE# DQ22 DQ14 F13
<28> CLKA0 CK DQ20 DQ12 DQ23 DQ15
CLKA0# J11 E13 FBA_CMD9 J5 U11 FBA_D8 +1.5V_GPU
<28> CLKA0# CK# DQ21 DQ13 A12/RFU/NC DQ8 DQ16
FBA_CMD14 J3 F11 U13 FBA_D9
PT CKE# DQ22 DQ14 F13 FBA_CMD10 K4 DQ9 DQ17 T11 FBA_D10
FBA_CMD9 J5 DQ23 DQ15 U11 FBA_D16 FBA_CMD11 K5 A8/A7 A10/A0 DQ10 DQ18 T13 FBA_D11
CLKA0 A12/RFU/NC DQ8 DQ16 U13 FBA_D17 FBA_CMD1 K10 A11/A6 A9/A1 DQ11 DQ19 N11 FBA_D12
DQ9 DQ17 BA1/A5 BA3/A3 DQ12 DQ20
1
10K_0402_5%~D
FBA_CMD6 K4 T11 FBA_D18 FBA_CMD2 K11 N13 FBA_D13
A8/A7 A10/A0 DQ10 DQ18 BA2/A4 BA0/A2 DQ13 DQ21
2
RV2911
FBA_CMD7 K5 T13 FBA_D19 M11 FBA_D14
RV2902 FBA_CMD4 K10 A11/A6 A9/A1 DQ11 DQ19 N11 FBA_D20 FBA_CMD4 H10 DQ14 DQ22 M13 FBA_D15
FBA_CMD3 K11 BA1/A5 BA3/A3 DQ12 DQ20 N13 FBA_D21 FBA_CMD3 H11 BA3/A3 BA1/A5 DQ15 DQ23 U4
80.6_0402_1%~D BA2/A4 BA0/A2 DQ13 DQ21 BA0/A2 BA2/A4 DQ0 DQ24
M11 FBA_D22 FBA_CMD7 H5 U2
DIS@
2
FBA_CMD1 H10 DQ14 DQ22 M13 FBA_D23 FBA_CMD6 H4 A9/A1 A11/A6 DQ1 DQ25 T4
1
CLKA0# FBA_CMD2 H11 BA3/A3 BA1/A5 DQ15 DQ23 U4 A10/A0 A8/A7 DQ2 DQ26 T2 FBA_CMD14
BA0/A2 BA2/A4 DQ0 DQ24 DQ3 DQ27
0.01U_0402_16V7K~D
FBA_CMD11 H5 U2 N4
FBA_CMD10 H4 A9/A1 A11/A6 DQ1 DQ25 T4 A5 DQ4 DQ28 N2
1 A10/A0 A8/A7 DQ2 DQ26 VPP/NC DQ5 DQ29 DIS@
T2 U5 M4 FBA_CMD13
DQ3 DQ27 VPP/NC DQ6 DQ30
CV2901
N4 +1.5V_GPU M2
DQ4 DQ28 DQ7 DQ31
@
A5 N2
VPP/NC DQ5 DQ29
1
2 +1.5V_GPU
10K_0402_5%~D
U5 M4 RV2904 1 DIS@ 21K_0402_1%~D J1
VPP/NC DQ6 DQ30 MF
RV2901
M2 RV2905 1 DIS@ 21K_0402_1%~D FBA_SEN1J10
DQ7 DQ31 RV2906 1 DIS@ 2121_0402_1%~D J13 SEN B1 DIS@
RV2907 1 DIS@ 2 1K_0402_1%~D J1 +1.5V_GPU ZQ VDDQ D1
RV2908 1 DIS@ 2 1K_0402_1%~D FBA_SEN0J10 MF VDDQ F1
2
RV2909 1 DIS@ 2 121_0402_1%~D J13 SEN B1 FBA_CMD8 J4 VDDQ M1
ZQ VDDQ D1 FBA_CMD15 G3 ABI# VDDQ P1
VDDQ F1 FBA_CMD5 G12 RAS# CAS# VDDQ T1
C FBA_CMD8 J4 VDDQ M1 FBA_CMD12 L3 CS# WE# VDDQ G2 C
FBA_CMD12 G3 ABI# VDDQ P1 FBA_CMD0 L12 CAS# RAS# VDDQ L2
FBA_CMD0 G12 RAS# CAS# VDDQ T1 WE# CS# VDDQ B3
FBA_CMD15 L3 CS# WE# VDDQ G2 VDDQ D3
FBA_CMD5 L12 CAS# RAS# VDDQ L2 VDDQ F3
WE# CS# VDDQ B3 FBA_WCK23# D5 VDDQ H3
PLACE 0.1uF CAPS CLOSEST TO THE
VDDQ D3 FBA_WCK23 D4 WCK01# WCK23# VDDQ K3 MEMORY DEVICES
VDDQ F3 WCK01 WCK23 VDDQ M3
FBA_WCK01# D5 VDDQ H3 FBA_WCK01# P5 VDDQ P3
PLACE LARGER CAPACITORS
<28> FBA_WCK01# WCK01# WCK23# VDDQ WCK23# WCK01# VDDQ
<28> FBA_WCK01
FBA_WCK01 D4
WCK01 WCK23 VDDQ
K3 FBA_WCK01 P4
WCK23 WCK01 VDDQ
T3 SLIGHTLY FARTHER AWAY
M3 One Per pin E5
VDDQ VDDQ
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
FBA_WCK23# P5 P3 N5
<28> FBA_WCK23# WCK23# WCK01# VDDQ VDDQ
FBA_WCK23 P4 T3 +FBA_VREFD_L A10 E10 1 1 1 1 1 1 1 1 1 1
<28> FBA_WCK23 WCK23 WCK01 VDDQ VREFD VDDQ
820P_0402_50V7K~D
820P_0402_50V7K~D
CV2906
CV2903
CV2907
CV2908
CV2911
CV2912
One Per pin E5 U10 N10
VDDQ VREFD VDDQ
CV2915
CV2914
CV2905
CV2913
N5 +FBA_VREFC_L J14 B12
VDDQ VREFC VDDQ
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
+FBA_VREFD_L A10 E10 1 1 1 2 D12
VREFD VDDQ VDDQ 2 2 2 2 2 2 2 2 2 2
CV2929
CV2909
U10 N10 DIS@ F12
VREFD VDDQ VDDQ
820P_0402_50V7K~D
820P_0402_50V7K~D
+FBA_VREFC_L J14 B12 CV2904 820P_0402_50V7K~D H12

VREFC VDDQ VDDQ
820P_0402_50V7K~D
DIS@
DIS@
1 1 D12 FBA_CMD13 J2 K12
VDDQ 2 2 RESET# VDDQ
CV2928
CV2927
F12 M12
VDDQ VDDQ
10U_0603_6.3V6M~D
1 H12 P12
VDDQ VDDQ
CV2910
DIS@
DIS@
FBA_CMD13 J2 K12 T12 1

2 2 RESET# VDDQ VDDQ
CV2930
M12 G13
VDDQ VDDQ
DIS@
P12 +1.5V_GPU L13

2 VDDQ VDDQ
DIS@
T12 B14
VDDQ G13
PT VDDQ D14 2
VDDQ L13 VDDQ F14
+1.5V_GPU VDDQ
VDDQ
VDDQ
B14
D14
F14
SAMSUNG G1
L1 VDD
VDDQ
VDDQ
VDDQ
M14
P14
T14
PLACE 0.1uF CAPS CLOSEST TO THE VDDQ M14 UV5 UV4 G4 VDD VDDQ +FBA_VREFD_L +1.5V_GPU
MEMORY DEVICES G1 VDDQ P14 L4 VDD
B L1 VDD VDDQ T14 C5 VDD A1 B
PLACE LARGER CAPACITORS VDD VDDQ VDD VSSQ
931_0402_1%
G4 R5 C1 2 DIS@ 1 2 DIS@ 1
SLIGHTLY FARTHER AWAY VDD VDD VSSQ
RV2913
L4 C10 E1 RV2917 RV2914
C5 VDD A1 R10 VDD VSSQ N1 DIS@ 1.33K_0402_1%~D 549_0402_1%~D
R5 VDD VSSQ C1 D11 VDD VSSQ R1
VDD VSSQ PCB-MB PCB-MB VDD VSSQ
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
C10 E1 X76_SAM@ X76_SAM@ G11 U1 1 DIS@ 2 2 DIS@ 1
2
R10 VDD VSSQ N1 L11 VDD VSSQ H2 RV2912 RV2916
1 1 1 1 1 VDD VSSQ VDD VSSQ
CV2918
D11 R1 P11 K2 1.33K_0402_1%~D 549_0402_1%~D

VDD VSSQ VDD VSSQ
CV2919
CV2920
CV2921
CV2922
G11 U1 G14 A3 +FBA_VREFC_L

L11 VDD VSSQ H2 L14 VDD VSSQ C3
VDD VSSQ VDD VSSQ
1
2 2 2 2 2 P11 K2 E3
VDD VSSQ
HYNIX VSSQ
931_0402_1%
RV2915
DIS@
DIS@
DIS@
DIS@
DIS@
G14 A3 N3
L14 VDD VSSQ C3 VSSQ R3
VDD VSSQ E3 H1 VSSQ U3 DIS@
VSSQ VSS VSSQ
SSM3K7002FU_SC70-3~D
N3 UV5 UV4 K1 C4
2
VSSQ R3 B5 VSS VSSQ R4
H1 VSSQ U3 G5 VSS VSSQ F5
VSS VSSQ VSS VSSQ
1
D
QV2901
K1 C4 L5 M5
GDDR5 Mode H Mapping B5 VSS VSSQ R4 T5 VSS VSSQ F10 2
VSS VSSQ VSS VSSQ <24,30> FBVREF_ALTV
G5 F5 B10 M10
GB2-64 Channel 0 0...31 L5 VSS VSSQ M5 D10 VSS VSSQ C11
G
DIS@
PCB-MB PCB-MB S
3
CMD0 CS# T5 VSS VSSQ F10 X76_HYN@ X76_HYN@ G10 VSS VSSQ R11
B10 VSS VSSQ M10 L10 VSS VSSQ A12
CMD1 A3_BA3 D10 VSS VSSQ C11 P10 VSS VSSQ C12
CMD2 A2_BA0 G10 VSS VSSQ R11 T10 VSS VSSQ E12
L10 VSS VSSQ A12 H14 VSS VSSQ N12
CMD3 A4_BA2 P10 VSS VSSQ C12 K14 VSS VSSQ R12
VSS VSSQ VSS170-BALL VSSQ
CMD4 A5_BA1 T10
VSS VSSQ
E12
VSSQ
U12
H14 N12 H13
CMD5 WE# K14 VSS VSSQ R12 SGRAM GDDR5 VSSQ K13
VSS170-BALL VSSQ VSSQ
CMD6 A7_A8 VSSQ
U12
VSSQ
A14
H13 C14
A CMD7 A6_A11 SGRAM GDDR5 VSSQ K13 VSSQ E14 A
VSSQ VSSQ
CMD8 ABI# VSSQ
A14
VSSQ
N14
C14 R14
CMD9 A12_RFU VSSQ E14 VSSQ U14
VSSQ N14 VSSQ
CMD10 A0_A10
CMD11 A1_A9
VSSQ
VSSQ
R14
U14
H5GQ2H24MFR-T2C_BGA170~D
@
DELL CONFIDENTIAL/PROPRIETARY
VSSQ
CMD12 RAS#
H5GQ2H24MFR-T2C_BGA170~D 123
CMD13 RST# @ PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
CMD14 CKE# BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM A Lower
CMD15 CAS# NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.3
LA-7841P
5 4
WWW.AliSaler.Com 3 2
Date: Tuesday, February 07, 2012
1
Sheet 29 of 65
5 4 3 2 1
WWW.AliSaler.Com
Memory Partition A - Upper MIRROR
32 bits
UV7
UV6
MF=0 MF=1
NORMAL
MF=1 MF=0
A4 FBA_D32
MF=0 MF=1 MF=1 MF=0 FBA_EDC4 C2 DQ24 DQ0 A2 FBA_D33 FBA_CMD[0..31]
EDC0 EDC3 DQ25 DQ1 FBA_CMD[0..31] <28,29>
C13 B4 FBA_D34
A4 FBA_D56 FBA_EDC6 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D35 FBA_D[32..63]
C2 DQ24 DQ0 A2 R2 EDC2 EDC1 DQ27 DQ3 E4 FBA_D[32..63] <28>
FBA_EDC7 FBA_D57 FBA_D36
C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D58 EDC3 EDC0 DQ28 DQ4 E2 FBA_D37 FBA_DBI[4..7]
FBA_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D59 DQ29 DQ5 F4 FBA_D38 FBA_DBI[4..7] <28>
R2 EDC2 EDC1 DQ27 DQ3 E4 FBA_D60 FBA_DBI4 D2 DQ30 DQ6 F2 FBA_D39 FBA_EDC[4..7]
EDC3 EDC0 DQ28 DQ4 E2 D13 DBI0# DBI3# DQ31 DQ7 A11 FBA_EDC[4..7] <28>
FBA_D61
DQ29 DQ5 F4 FBA_D62 FBA_DBI6 P13 DBI1# DBI2# DQ16 DQ8 A13
D FBA_DBI7 D2 DQ30 DQ6 F2 FBA_D63 P2 DBI2# DBI1# DQ17 DQ9 B11 D
D13 DBI0# DBI3# DQ31 DQ7 A11 DBI3# DBI0# DQ18 DQ10 B13 +1.5V_GPU
FBA_DBI5 P13 DBI1# DBI2# DQ16 DQ8 A13 CLKA1 J12 DQ19 DQ11 E11
P2 DBI2# DBI1# DQ17 DQ9 B11 CLKA1# J11 CK DQ20 DQ12 E13
DBI3# DBI0# DQ18 DQ10 B13 FBA_CMD30 J3 CK# DQ21 DQ13 F11
CLKA1 J12 DQ19 DQ11 E11 CKE# DQ22 DQ14 F13
<28> CLKA1 CK DQ20 DQ12 DQ23 DQ15
1
10K_0402_5%~D
CLKA1# J11 E13 FBA_CMD25 J5 U11 FBA_D48
<28> CLKA1# CK# DQ21 DQ13 A12/RFU/NC DQ8 DQ16
RV3001
FBA_CMD30 J3 F11 U13 FBA_D49
PT CKE# DQ22 DQ14 F13 FBA_CMD22 K4 DQ9 DQ17 T11 FBA_D50 DIS@
FBA_CMD25 J5 DQ23 DQ15 U11 FBA_D40 FBA_CMD23 K5 A8/A7 A10/A0 DQ10 DQ18 T13 FBA_D51
CLKA1 A12/RFU/NC DQ8 DQ16 U13 FBA_D41 FBA_CMD20 K10 A11/A6 A9/A1 DQ11 DQ19 N11 FBA_D52
2
FBA_CMD26 K4 DQ9 DQ17 T11 FBA_D42 FBA_CMD19 K11 BA1/A5 BA3/A3 DQ12 DQ20 N13 FBA_D53
A8/A7 A10/A0 DQ10 DQ18 BA2/A4 BA0/A2 DQ13 DQ21
2
FBA_CMD27 K5 T13 FBA_D43 M11 FBA_D54 FBA_CMD30

RV3003 FBA_CMD17 K10 A11/A6 A9/A1 DQ11 DQ19 N11 FBA_D44 FBA_CMD17 H10 DQ14 DQ22 M13 FBA_D55
FBA_CMD18 K11 BA1/A5 BA3/A3 DQ12 DQ20 N13 FBA_D45 FBA_CMD18 H11 BA3/A3 BA1/A5 DQ15 DQ23 U4
80.6_0402_1%~D BA2/A4 BA0/A2 DQ13 DQ21 BA0/A2 BA2/A4 DQ0 DQ24
M11 FBA_D46 FBA_CMD27 H5 U2 FBA_CMD29
DIS@ DQ14 DQ22 A9/A1 A11/A6 DQ1 DQ25
FBA_CMD20 H10 M13 FBA_D47 FBA_CMD26 H4 T4
1
CLKA1# FBA_CMD19 H11 BA3/A3 BA1/A5 DQ15 DQ23 U4 A10/A0 A8/A7 DQ2 DQ26 T2
BA0/A2 BA2/A4 DQ0 DQ24 DQ3 DQ27
1
0.01U_0402_16V7K~D
10K_0402_5%~D
FBA_CMD23 H5 U2 N4
A9/A1 A11/A6 DQ1 DQ25 DQ4 DQ28
RV3002
1 FBA_CMD22 H4 T4 A5 N2
A10/A0 A8/A7 DQ2 DQ26 T2 U5 VPP/NC DQ5 DQ29 M4 DIS@
DQ3 DQ27 VPP/NC DQ6 DQ30
CV3001
N4 M2
DQ4 DQ28 DQ7 DQ31
@
A5 N2
2
2 +1.5V_GPU U5 VPP/NC DQ5 DQ29 M4 RV3005 1 DIS@ 2 1K_0402_1%~D J1 +1.5V_GPU
VPP/NC DQ6 DQ30 M2 RV3006 1 DIS@ 2 1K_0402_1%~D FBA_SEN3J10 MF
DQ7 DQ31 RV3008 1 DIS@ 2 121_0402_1%~D J13 SEN B1
RV3007 1 DIS@ 2 1K_0402_1%~D J1 +1.5V_GPU ZQ VDDQ D1
RV3009 1 DIS@ 2 1K_0402_1%~D FBA_SEN2J10 MF VDDQ F1
RV3010 1 DIS@ 2 121_0402_1%~D J13 SEN B1 FBA_CMD24 J4 VDDQ M1
ZQ VDDQ D1 FBA_CMD28 G3 ABI# VDDQ P1
VDDQ F1 FBA_CMD16 G12 RAS# CAS# VDDQ T1 +1.5V_GPU
FBA_CMD24 J4 VDDQ M1 FBA_CMD31 L3 CS# WE# VDDQ G2
C FBA_CMD31 G3 ABI# VDDQ P1 FBA_CMD21 L12 CAS# RAS# VDDQ L2 C
FBA_CMD21 G12 RAS# CAS# VDDQ T1 WE# CS# VDDQ B3
FBA_CMD28 L3 CS# WE# VDDQ G2 VDDQ D3
CAS# RAS# VDDQ VDDQ
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
FBA_CMD16 L12 L2 F3
WE# CS# VDDQ B3 FBA_WCK45# D5 VDDQ H3
VDDQ WCK01# WCK23# VDDQ 1 1 1 1 1 1
CV3028
CV3008
CV3003
CV3004
CV3005
CV3006
D3 FBA_WCK45 D4 K3
VDDQ F3 WCK01 WCK23 VDDQ M3
VDDQ VDDQ
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
FBA_WCK67# D5 H3 FBA_WCK67# P5 P3
<28> FBA_WCK67# WCK01# WCK23# VDDQ WCK23# WCK01# VDDQ 2 2 2 2 2 2
FBA_WCK67 D4 K3 FBA_WCK67 P4 T3
<28> FBA_WCK67 WCK01 WCK23 VDDQ WCK23 WCK01 VDDQ
M3 E5
FBA_WCK45# P5 VDDQ P3 VDDQ N5
<28> FBA_WCK45# WCK23# WCK01# VDDQ VDDQ
FBA_WCK45 P4 T3 +FBA_VREFD_H A10 E10
<28> FBA_WCK45 WCK23 WCK01 VDDQ VREFD VDDQ
820P_0402_50V7K~D
820P_0402_50V7K~D
E5 U10 N10
VDDQ VREFD VDDQ
820P_0402_50V7K~D
N5 +FBA_VREFC_H J14 B12
+FBA_VREFD_H A10 VDDQ E10 VREFC VDDQ D12
VREFD VDDQ 1 1 VDDQ
820P_0402_50V7K~D
820P_0402_50V7K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CV3016
CV3009
U10 N10 1 F12
VREFD VDDQ VDDQ
820P_0402_50V7K~D
CV3007
+FBA_VREFC_H J14 B12 H12 1 1 1 1 1
VREFC VDDQ VDDQ
CV3011
DIS@
DIS@
1 1 D12 FBA_CMD29 J2 K12
VDDQ 2 2 RESET# VDDQ
CV3012
CV3013
CV3014
CV3015
CV3017
CV3018
DIS@
1 F12 M12
VDDQ 2 VDDQ
CV3010
DIS@
DIS@
DIS@
DIS@
DIS@
H12 P12
VDDQ VDDQ 2 2 2 2 2
DIS@
DIS@
FBA_CMD29 J2 K12 T12

2 2 RESET# VDDQ VDDQ
DIS@
M12 G13
2 VDDQ P12 VDDQ L13
VDDQ T12 VDDQ B14
VDDQ G13 VDDQ D14
VDDQ L13 VDDQ F14
GDDR5 Mode H Mapping +1.5V_GPU VDDQ B14 VDDQ M14
VDDQ D14 G1 VDDQ P14
GB2-64 Channel 0 32...63 VDDQ F14 L1 VDD VDDQ T14
CMD16 CS# VDDQ M14 G4 VDD VDDQ
G1 VDDQ P14 L4 VDD
CMD17 A3_BA3 L1 VDD VDDQ T14 C5 VDD A1
B CMD18 A2_BA0 G4 VDD VDDQ R5 VDD VSSQ C1 B
L4 VDD C10 VDD VSSQ E1
CMD19 A4_BA2 C5 VDD A1 R10 VDD VSSQ N1
VDD VSSQ VDD VSSQ R1
CMD20 A5_BA1 R5
VDD VSSQ
C1 D11
VDD VSSQ U1
C10 E1 +1.5V_GPU G11
CMD21 WE# R10 VDD VSSQ N1 L11 VDD VSSQ H2
VDD VSSQ VDD VSSQ K2
CMD22 A7_A8 D11
VDD VSSQ
R1 P11
VDD VSSQ A3
G11 U1 G14 +FBA_VREFD_H +1.5V_GPU
CMD23 A6_A11 L11 VDD VSSQ H2 L14 VDD VSSQ C3
VDD VSSQ VDD VSSQ E3
CMD24 ABI# P11
VDD VSSQ
K2
VSSQ N3
RV3014 RV3013
931_0402_1%
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
G14 A3 1 DIS@ 2 2 DIS@ 1
CMD25 A12_RFU VDD VSSQ VSSQ R3
1
L14 C3 1 1 1 1 1
VDD VSSQ VSSQ U3
CV3029
RV3012
CMD26 A0_A10 E3 H1 1.33K_0402_1%~D 549_0402_1%~D
VSSQ VSS VSSQ C4
CV3023
CV3024
CV3025
CV3026
N3 K1 DIS@ RV3017 RV3016
CMD27 A1_A9 VSSQ VSS VSSQ R4
DIS@
DIS@
DIS@
DIS@
DIS@
R3 B5 1 DIS@ 2 2 DIS@ 1
PT H1 VSSQ U3 2 2 2 2 2 G5 VSS VSSQ F5
CMD28 RAS#
2
K1 VSS VSSQ C4 L5 VSS VSSQ M5 1.33K_0402_1%~D 549_0402_1%~D
CMD29 RST#
SAMSUNG B5 VSS
VSS
VSSQ
VSSQ
R4 T5 VSS
VSS
VSSQ F10
VSSQ M10
+FBA_VREFC_H
1
G5 F5 B10
CMD30 CKE# L5 VSS VSSQ M5 D10 VSS VSSQ C11 DIS@ RV3015
CMD31 CAS# UV7 UV6 T5 VSS VSSQ F10 G10 VSS VSSQ R11
VSS VSSQ VSS VSSQ A12 931_0402_1%
B10 M10 L10
D10 VSS VSSQ C11 P10 VSS VSSQ C12
2
G10 VSS VSSQ R11 T10 VSS VSSQ E12
L10 VSS VSSQ A12 H14 VSS VSSQ N12
P10 VSS VSSQ C12 K14 VSS VSSQ R12
VSS VSSQ VSS170-BALL VSSQ U12
1
D
PCB-MB PCB-MB T10 E12
VSS VSSQ VSSQ H13
QV3001
X76_SAM@ X76_SAM@ H14 N12 2
K14 VSS VSSQ R12 SGRAM GDDR5 VSSQ <24,29>
K13
FBVREF_ALTV
G
VSS170-BALL VSSQ U12 VSSQ A14 DIS@ S
3
VSSQ H13 VSSQ C14
SGRAM GDDR5 VSSQ K13 VSSQ E14
A VSSQ A14 VSSQ N14 A
HYNIX VSSQ
VSSQ
VSSQ
C14
E14
N14
VSSQ R14
VSSQ U14
VSSQ
UV7 UV6 VSSQ R14 H5GQ2H24MFR-T2C_BGA170~D
VSSQ
VSSQ
U14 @ DELL CONFIDENTIAL/PROPRIETARY
H5GQ2H24MFR-T2C_BGA170~D
@ 123
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
PCB-MB PCB-MB TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
X76_HYN@ X76_HYN@ BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM A Upper
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-7841P
5 4
1
Sheet 30 of 65
5 4 3 2 1
WWW.AliSaler.Com
intent to blank
D D
C C
B B
A A

Block Diagram
Size
Document Number Rev
0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
intent to blank
D D
C C
B B
A A

Block Diagram
Size
Document Number Rev
0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
+3VS to +3V_GPU +1.5VS to +1.5V_GPU +1.05VS to +1.05V_GPU
Around 1.4 A
+3VALW +VSBP
DIS@
Around 4.5 A+1.44A X 4pcs VRAM=10.26A
+3VS QV2801 +3V_GPU
ST
PT SI3456DDV-T1-GE3_TSOP6~D PT2 Around 3 A
1
DIS@ DIS@
D
DIS@ RV2804 6 +1.5V QV2803 +VCCP DIS@ +1.05V_GPU
S
RV2805 40.2K_0402_1%~D 5 4 SIR818DP-T1_POWERPAK-SO8-5~D +1.5V_GPU QV2804
100K_0402_5%~D 2 3 AO4304L_SO8
D 1 2 8 1 D
2
5 1 7 2
G
6 3
ST
3
SHORT 5
3.3VS_GFX_EN 2 1
4
RV3525 0_0402_5%~D
SSI2
4
3
PT
1
DIS@ 1 3.3VS_GFX_EN 1 2 RV2810
QV2806B
DIS@
1 2
DMN66D0LDW-7_SOT363-6~D
RV3528 @ DIS@ RV2811 20K_0402_5%~D 3.3VS_GFX_EN
3.3VS_GFX_ON# 5 150K_0402_5%~D CV2804
0.1U_0402_25V6K~D 47K_0402_5%~D
SSI2 1 1
6
2 DIS@
2
CV2807 CV2808
DIS@
DIS@
QV2806A PT 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D
DGPU_PWR_EN 2 DMN66D0LDW-7_SOT363-6~D 2 2
<19,61> DGPU_PWR_EN
DIS@
1
C
GPU Power Discharge Path GPU Power Up Power Rail Sequence GPU Power Up Sub-system Sequence C
T1
T8
Driver call
to enable GPU
+3V_GPU
+1.5V_GPU +1.05V_GPU +GPU_CORE +3V_GPU Power EN
ST ST +GPU_CORE
1
1
NV3V3Pgood
DIS@ DIS@ DIS@ DIS@
ST RZ10
ST RZ11 RZ40 RZ41
22_0402_5%~D 22_0402_5%~D 22_0402_5%~D 22_0402_5%~D +1.5V_GPU 27Mhz
2
2
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
GPU all PG T1 Custom
+1.05V_GPU T2 >0
6
DIS@ DIS@ DIS@ DIS@ 6

QZ5A QZ5B QZ21B QZ21A CLK REQ# T3 >0
The ramp time for any rail must be more than 40us. T4 >0
3.3VS_GFX_ON# 2 3.3VS_GFX_ON# 5 3.3VS_GFX_ON# 5 3.3VS_GFX_ON# 2 T5 >100us
100MHz T6 >0
1
T7 <48ms
PT PT GPU Power Down Sequence GPU Reset# T8 500ms
T9 >0
First rail to power down PCIe Training
B B
Toff < 10ms T9 T2 T3 T4 T5 T6 T7

Last rail to power down
GPU Power Down Sub-system Sequence
T1
T7
GPU Disable call
Link tear
down
GPU Reset#
Power EN
T1 Custom
27Mhz T2 >0
T3 >0
100MHz T4 <=0
T5 >=0
T6 Custom
NV3V3Pgood
T7 Custom
Call Return
A A
T2 T3 T4 T5 T6

Block Diagram
Size
Document Number Rev
0.3
WWW.AliSaler.Com
5 4 3 2 1
A B C D E
WWW.AliSaler.Com
+3VALW to +3V_PCH +5VALW to +5VS
SI4800BDY-T1-GE3_SO8
+VSBP +5VALW QZ6 +5VS
8 1
1
7 2 1
1
SI4800BDY-T1-GE3_SO8 RZ14 6 3 CZ11
+VSBP +3VALW QZ12 +3V_PCH +5VALW 5 RZ13 @
1 1
100K_0402_5%~D 10U_0805_10V4Z~D
8 1 2 470_0402_5%
ST
4
1
1
7 2 1 SSI2
2
1
RZ27 6 3 CZ45 RZ20
3
+5VALW 5
+5VS_D
RZ36 @ 1
100K_0402_5%~D 10U_0603_6.3V6M~D 100K_0402_5%~D CZ15
2 470_0402_5% QZ7B
2
1
SUSP 5 0.1U_0603_50V_X7R
SSI2
2
RZ26 DMN66D0LDW-7_SOT363-6~D 2
6
+3V_PCH_D
1
4
100K_0402_5%~D CZ48
6
QZ14B @ QZ19A
2
5 DMN66D0LDW-7_SOT363-6~D 0.1U_0603_50V_X7R QZ7A 2

2 ST DMN66D0LDW-7_SOT363-6~D
SSI2
6
1 2
<12,38,56,57,58> SUSP#
4
1
D DMN66D0LDW-7_SOT363-6~D
ME2N7002D-G_SOT23-3
SSI2
1
2 2
QZ13
<38> PCH_PWR_EN G
QZ14A
DMN66D0LDW-7_SOT363-6~D @ +3VALW to +3VS
1
S
PCH_PWR_EN# <22> 3 SI4800BDY-T1-GE3_SO8
SSI2 +VSBP +3VALW QZ8 +3VS
8 1
1
7 2
1
RZ17 6 3 1
5 CZ20 @ RZ37
100K_0402_5%~D
10U_0603_6.3V6M~D 470_0402_5%
4
2
ST SSI2
2 +3VS_D
1 1
D CZ38
ME2N7002D-G_SOT23-3
SUSP 2
QZ10
0.1U_0603_50V_X7R
G 2
2 2
3
S
3
@ QZ19B
5
SSI2
4
+1.5V To +1.5VS
PT
+VSBP +1.5V QZ4 +1.5VS
AO4304L_SO8
8 1
1
7 2 1
1
6 3 CZ39
SSI2 RZ21 5 RZ34 @
330K_0402_5% 10U_0603_6.3V6M~D
2 470_0402_5%
2
SSI2
+1.5VS_D
SSI2 1
1
D
CZ41
SUSP 2 RZ42
G 1.5M_0402_5%~D 0.1U_0603_50V_X7R
S 2
3
QZ11 @ QZ18B
5
SSI2
4
3 3
+5VALW +1.5V +VCCP +1.5V_CPU_VDDQ +0.75VS

1
RZ33 @ RZ39 @ RZ35 @ RZ32 @ RZ31 @
100K_0402_5%~D 470_0402_5% 470_0402_5% 220_0402_5%~D 22_0402_5%

2
2
+1.5V_D
+VCCP_D
+1.5V_CPU_VDDQ_CHG
+DDR_CHG
@ QZ20
SSI2
1
D
ST
6
SYSON# 2
4 1 G @ QZ18A @ QZ16 @ QZ17 4
1
D D D
S
3
ME2N7002D-G_SOT23-3
SUSP 2 2 2
<8,12> RUN_ON_CPU1.5VS3#
2
QZ15
DMN66D0LDW-7_SOT363-6~D G G
<38,58> SYSON G S S
1
@
S
3

DC/DC Interface
0.3
LA-7841P
WWW.AliSaler.Com
A B C D E
5 4 3 2 1
+3VS
WWW.AliSaler.Com
LCD PWR CTRL LVDS Conn.
1
@ RV3502
ST
@ 4.7K_0402_5%~D
DV3502 JLVDS
2
BKOFF# 1 2 DISPOFF# 1
+LCDVDD +5VALW <38> BKOFF# 2 1
<18> LVDS_A0- LVDS_A0-
2
1
<18> LVDS_A0+ LVDS_A0+ 3
CH751H-40PT_SOD323-2~D 4 3
PT 10K_0402_5%~D 4
1
+3VS DV3503 LVDS_A1- 5
RV3506 <18> LVDS_A1- 5
RV3504 +LCDVDD 2 1 LVDS_A1+ 6
100_0402_1%~D RV3505
PT <18> LVDS_A1+
7 6
2
7
3
10K_0402_5%~D W=60mils <18> LVDS_A2- LVDS_A2- 8
CH751H-40PT_SOD323-2~D LVDS_A2+ 9 8
<18> LVDS_A2+
1 1
2
S
10 9
D D QV3501 LVDS_ACLK- 11 10 D
QV3502 2 2 1
PT 2 AO3419L_SOT23-3
<18> LVDS_ACLK-
LVDS_ACLK+ 12 11
SSM3K7002FU_SC70-3~D G G
ST RV3529 2 1LVDS_DDC_CLK RV3530 2 1LVDS_DDC_DATA
<18> LVDS_ACLK+
13 12
RV3503 0_0402_5%~D 0_0402_5%~D LVDS_B0- 14 13
S <18> LVDS_B0-
3
150K_0402_5%
D
LVDS_B0+ 15 14
1 1 <18> LVDS_B0+ 15
DV3501 1 16
1
VGA_LVDDEN 2 CV3504 +LCDVDD @ CV3528 @ CV3529 LVDS_B1- 17 16
<18> VGA_LVDDEN W=60mils <18> LVDS_B1- 17
1
D 0.1U_0402_16V7K~D 470P_0402_50V7K~D 470P_0402_50V7K~D LVDS_B1+ 18
2 2 <18> LVDS_B1+ 18
1 2 QV3503 1 1 19
G 2 CV3506 LVDS_B2- 20 19
BSS138-G_SOT23-3 <18> LVDS_B2-
1
EC_ENVDD 3 CV3505 0.1U_0402_16V7K~D LVDS_B2+ 21 20
<38> EC_ENVDD S SSI2 PT <18> LVDS_B2+
3
4.7U_0603_6.3VAK~D 22 21
BAT54C-7-F_SOT23~D RV3507 2 2 SSI2 LVDS_BCLK- 23 22
<18> LVDS_BCLK- 23
10K_0402_5%~D LVDS_BCLK+ 24
+3VS <18> LVDS_BCLK+ 24
25
2
LCD_TEST 26 25
<38> LCD_TEST 26
LVDS_DDC_CLK 27
<18> LVDS_DDC_CLK 27
@ RV3523 2 1 0_0402_5%~D CE_EN LVDS_DDC_DATA 28
<18> LVDS_DDC_DATA 28
@ RV3524 2 1 0_0402_5%~D DBC_EN INV_PWM 29
DISPOFF# 30 29
31 30
ST SSI2 32 31
+3VS CE_EN 33 32
<20> CE_EN 33
DBC_EN 34
<20> DBC_EN 34
+3VS 35
1
36 35 41
W=60mils +LCDVDD
37 36 G1 42
@ RV3510 38 37 G2 43
10K_0402_5%~D 39 38 G3 44
39 G4
0.1U_0402_16V7K~D
10U_0805_10V4Z~D
W=60mils +INV_PWR_SRC 40 45
2
40 G5
1 1 1
LCD backlight PWR CTRL
CV3501
CV3508
CV3507 ACES_50398-04071-001
SSI2 @
DV5
2 1 INV_PWM 0.1U_0402_16V7K~D
<18> VGA_PWM 2 2 2
RB751V-40_SOD323-2
ST
DV4 Reserve 2 Pins for AUO panel extra feature for Dell. 8/25Scott: follow Conn list,check LCD pin define
C C
2 1 Panel side Pin34 DCR(Dynamic Contrast Ratio)
<38> EC_INV_PWM
Panel side Pin35 DBC(Dynamic Backlight Control)
@ RB751V-40_SOD323-2
1
RV3516 1 2 0_0603_5%~D
RV3508
B+ QV3504 10K_0402_5%~D
SI3457CDV +INV_PWR_SRC PT
D
2
6
S
4 5
2
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
1
1
1 1
RV3514
3
CV3509
CV3510
1M_0402_5%~D PT
PT 2 2
PT * Reserved for EMI/ESD/RF
2
DLW21SN900SQ2L_0805_4P~D
PWR_SRC_ON 1 2 USB20_P12_L
<19> USB20_P12 1 2
need to close to JLVDS
1
RV3515 4 3 USB20_N12_L
<19> USB20_N12 4 3
1M_0402_5%~D DV3504
@ LI4 DMIC0 6 1 USB20_P12_L
1 SHORT 2 V I/O V I/O
PT
2
RI6 0_0402_5%~D 5 2
+5VS V BUS Ground
ST
1
SHORT D 1 SHORT 2 DMIC_CLK_R 4 3 USB20_N12_L

2 1 +LCDVDD_R 2 QV3505 RI8 0_0402_5%~D V I/O V I/O
<38> EN_INVPWR
RV3517 0_0402_5%~D G SSM3K7002FU_SC70-3~D @ IP4223CZ6_SO6-6
S ST
3
RV3519
0_0402_5%~D
DMIC_CLK 2 1 DMIC_CLK_R
<48> DMIC_CLK
B 1 B
@ CV3513
470P_0402_50V7K~D
2
Webcam PWR CTRL Webcam Conn. +3VS_CAM +3VS

SSI2
* Reserved for LCD
JCAM
USB20_P12_L
1
2 1
2
sequence tuning
USB20_N12_L 3
4 3
5 4
DMIC0 6 5 +INV_PWR_SRC
<48> DMIC0 7 6
ST Remove CAM_DET# SSI2 7
DMIC_CLK_R 8 +5VALW
1
+3VS +3VS_CAM 9 8
QV3506 <17,24,38> PCH_SMLCLK 9
<17,24,38> PCH_SMLDATA 10 @ RV3520
1
SI2301CDS-T1-GE3_SOT23-3 11 10 820_0402_5%~D
12 GND RV3521
GND
S
3 1 100K_0402_5%~D
D
3 2
ACES_87036-1001-CP @
@
2
1
QV3507B
G
2
2
RV3522
CV3515 100K_0402_5%~D 5
0.1U_0402_16V7K~D
6
1 @
2
4
QV3507A
A +LCDVDD_R 2 A
1
D
1
ME2N7002D-G_SOT23-3
2
QV3508
<19> EN_CAM G
S
ST 3

LVDS /camera conn.
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
Place close to JHDMI
D
<18> HDMI_A3N_VGA
CV758 2
CV759 2
1 0.1U_0402_10V7K~D
1 0.1U_0402_10V7K~D
TMDS_TXCN
TMDS_TXCP
RV422 1
LV7
@ 2 0_0402_5%~D
SSI2 HDMI Conn. D
<18> HDMI_A3P_VGA
TMDS_TXCN 1 2 TMDS_L_TXCN
CV760 2 1 0.1U_0402_10V7K~D TMDS_TX0N 1 2
<18> HDMI_A2N_VGA
CV761 2 1 0.1U_0402_10V7K~D TMDS_TX0P
ST
<18> HDMI_A2P_VGA
TMDS_TXCP 4 3 TMDS_L_TXCP
CV762 2 1 0.1U_0402_10V7K~D TMDS_TX1N 4 3 @
<18> HDMI_A1N_VGA 1 1
CV763 2 1 0.1U_0402_10V7K~D TMDS_TX1P EXC34CG900U W=40mils RV424 0_1206_5%~D
<18> HDMI_A1P_VGA
@CV3517
@ CV3517 @CV3518
@ CV3518 2 1 +VDISPLAY_VCC
CV764 2 1 0.1U_0402_10V7K~D TMDS_TX2N RV423 1 @ 2 0_0402_5%~D 4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
<18> HDMI_A0N_VGA 2 2
CV765 2 1 0.1U_0402_10V7K~D TMDS_TX2P DV8 FV1
<18> HDMI_A0P_VGA
2 1 2 1
+5VS
10U_0603_6.3V6M~D
0.1U_0402_10V7K~D
RV425 1 @ 2 0_0402_5%~D 3 NC 1 1
CV766
1.5A_6V_1206L150PR~D
LV8 BAT1000-7-F_SOT23-3~D CV767
TMDS_TX0N 1 2 TMDS_L_TX0N
1 2 2 2
ST
TMDS_TX0P 4 3 TMDS_L_TX0P
PT 4 3
EXC34CG900U 1 1
1
470_0402_5%
RV429
470_0402_5%
RV430
470_0402_5%
RV431
470_0402_5%
RV432
470_0402_5%
RV433
470_0402_5%
RV434
470_0402_5%
RV435
470_0402_5%
RV436
@
RV426 1 2 0_0402_5%~D @CV3519
@ CV3519 @CV3520
@ CV3520
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
2 2
2 RV428 1 @ 2 0_0402_5%~D
2
LV9 JHDMI
TMDS_TX1N 1 2 TMDS_L_TX1N HDMI_HPLUG 19
1 2 18 HP_DET
+3VS ST 17 +5V
TMDS_TX1P 4 3 TMDS_L_TX1P DDC_DAT_HDMI 16 DDC/CEC_GND
4 3 SDA
1
C D DDC_CLK_HDMI 15 C
2 QV34 EXC34CG900U HDMI_Reserved 14 SCL
1 1 Reserved
G 2N7002_SOT23-3 HDMI_CEC 13
RV437 1 @ 2 0_0402_5%~D @CV3521
@ CV3521 @CV3522
@ CV3522 TMDS_L_TXCN 12 CEC
S
3
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D 11 CK-
SSI2 2 2 TMDS_L_TXCP 10 CK_shield
TMDS_L_TX0N 9 CK+
RV439 1 @ 2 0_0402_5%~D 8 D0-
TMDS_L_TX0P 7 D0_shield
LV10 TMDS_L_TX1N 6 D0+
TMDS_TX2N 1 2 TMDS_L_TX2N 5 D1-
1 2 TMDS_L_TX1P 4 D1_shield 20
ST TMDS_L_TX2N 3 D1+ GND 21
TMDS_TX2P 4 3 TMDS_L_TX2P 2 D2- GND 22
4 3 TMDS_L_TX2P 1 D2_shield GND 23
EXC34CG900U D2+ GND
1 1
CONCR_099AMAC19CBACNF
RV441 1 @ 2 0_0402_5%~D @CV3523
@ CV3523 @CV3524
@ CV3524 CONN@
4.7P_0402_50V8C~D 4.7P_0402_50V8C~D
2 2
+5VS 46@ ROYALTY HDMI W/LOGO

Part Number Description
ST RO0000002HM HDMI W/Logo:RO0000002HM

2
DV9
RB751V40_SC76-2 @ RV443
0_0402_5%~D
SSI2
B B
For EMI Reserve
1
@ CV3525 1 2 0.1U_0402_25V6K~D HDMI_HPLUG

+3VS
@ CV3526 1 2 0.1U_0402_25V6K~D HDMI_Reserved
@ CV3527 1 2 0.1U_0402_25V6K~D HDMI_CEC

+3VS
close to JHDMI
2
2
RV444
2.2K_0402_5%~D
2.2K_0402_5%~D
RV445
RV447
1M_0402_1%~D
2
G
QV36
1
1
1
RV450 RV451 3 1 HDMI_HPLUG

<18> HDMI_PCH_HPD#
2.2K_0402_5%~D 2.2K_0402_5%~D QV35A
D
2
1
2
1 6 DDC_CLK_HDMI RV442
<18> PCH_SDVO_CTRLCLK
20K_0402_5%~D
5
2
<18> PCH_SDVO_CTRLDATA 4 3 DDC_DAT_HDMI
QV35B
A A

HDMI
Custom LA-7841P 0.3
5 4 3 2 1
WWW.AliSaler.Com
5 4 3 2 1
WWW.AliSaler.Com 1
FV2
2
+3VS_DP
+3VS
1 1
mDP
10U_0603_6.3V6M~D
CV769
0.1U_0402_16V7K~D
CV770
1.5A_6V_1206L150PR~D
2 2
JMDP
D CV779 2 1 0.1U_0402_10V6K~D DISP_A0P

ST D
<18> PCH_DPC_P0
CV780 2 1 0.1U_0402_10V6K~D DISP_A0N 1
<18> PCH_DPC_N0 GND
CV781 2 1 0.1U_0402_10V6K~D DISP_A1P RV449 DISP_HPD_SINK 2
<18> PCH_DPC_P1 HPD
CV782 2 1 0.1U_0402_10V6K~D DISP_A1N 0_0402_5%~D DISP_A0P 3
<18> PCH_DPC_N1 LANE0_P
CV783 2 1 0.1U_0402_10V6K~D DISP_A2P DP_CBL_DET 1 SHORT 2 CAB_DET_SINK 4
<18> PCH_DPC_P2 <19> DP_CBL_DET CONFIG1
CV784 2 1 0.1U_0402_10V6K~D DISP_A2N DISP_A0N 5
<18> PCH_DPC_N2 LANE0_N
CV785 2 1 0.1U_0402_10V6K~D DISP_A3P +3VS DISP_CEC 6
<18> PCH_DPC_P3 CONFIG2
CV786 2 1 0.1U_0402_10V6K~D DISP_A3N 7
<18> PCH_DPC_N3 GND
8
1
GND
100K_0402_5%~D
DISP_A1P 9
LANE1_P
RV452
DISP_A3P 10
LANE3_P
DISP_A1N 11
LANE1_N
DISP_A3N 12
LANE3_N
PCH_DPC_AUXP 13
2
<18> PCH_DPC_AUXP PCH_DPC_AUXN 14
GND
<18> PCH_DPC_AUXN 15
GND
CAB_DET_SINK# DISP_A2P LANE2_P
DISP_CLK_AUXP_CONN 16
AUXCH_P
Close to JMDP1 DISP_A2N 17
LANE2_N
DISP_DAT_AUXN_CONN 18
+3VS AUXCH_N
1
D 19
GND
1
QV37 2 20
DP_PWR
RV457 RV458 2N7002_SOT23-3 G
2.2K_0402_5%~D 2.2K_0402_5%~D S 21
3
22
SSI2
RV455
CV787
CV788
RV456
23
GROUND
PCH_DDPC_CTRLCLK 24
<18> PCH_DDPC_CTRLCLK PCH_DDPC_CTRLDATA
<18> PCH_DDPC_CTRLDATA
1
1 1
ACON_MAR25-20K1801
CONN@
2 2
2
1M_0402_5%~D
22U_0805_6.3V6M~D
0.1U_0402_10V6K~D
5.1M_0402_5%
C C
DDC Dongle SW for DP
B
DP HPD to PCH (iGPU) B
+5VS
+3VS
2
G
2 1 3 1 DISP_HPD_SINK
<18> DP_PCH_HPD
D
CV790 0.1U_0402_10V6K~D
SSI2 QV3
UV13 BSS138-G_SOT23-3
1
CAB_DET_SINK# 1 14
DISP_CLK_AUXP_CONN 2 BE0 VCC 13 CAB_DET_SINK RV454
A0 BE3 0.1U_0402_10V6K~D 100K_0402_5%~D
PCH_DDPC_CTRLCLK 3 12 CV792 2 1 DISP_CLK_AUXP_CONN RV470 1 2100K_0402_5%~D
B0 A3
2
CAB_DET_SINK# 4 11 PCH_DPC_AUXP
DISP_DAT_AUXN_CONN 5 BE1 B3 10 CAB_DET_SINK
A1 BE2 0.1U_0402_10V6K~D
PCH_DDPC_CTRLDATA 6 9 CV791 2 1 DISP_DAT_AUXN_CONN RV472 1 2100K_0402_5%~D
B1 A2 +3VS
7 8 PCH_DPC_AUXN
A GND B2 A
PI3C3125LEX_TSSOP14~D

DP/FAN/HDD
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
LE1
ST FBMA-L11-160808-800LMT_0603
+3VALW RE83 1 SHORT 2 0_0402_5%~D 0.1U_0402_16V7K~D 0.1U_0402_16V7K~D +3VALW_EC 1 2 +EC_VCCA Board ID
1
CE59
1
CE4
1
CE5
1
CE6
1
CE7
2
CE8
2
CE9 +3VALW PT
1
1000P_0402_50V7K~D CE10
2
2 2 2 2 2 1 1
10U_0402_6.3V6M~D 0.1U_0402_16V7K~D 0.1U_0402_16V7K~D 1000P_0402_50V7K~D 2 0.1U_0402_16V7K~D RE76
Ra
ECAGND
100K_0402_5%~D
D D
ST
1
AD_BID0
111
125
RE10 1 SHORT 20_0402_5%~D
22
33
96
67
+3VLP
1
UE1
1
KSI[0..7] Rb RE77 CE12
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
KSI[0..7] <39>
56K_0402_5% 0.1U_0402_16V7K~D
KSO[0..16]
KSO[0..16] <39> ST 2
2
GATEA20 1 21 KB_LED_PWM
<20> GATEA20 GATEA20/GPIO00 GPIO0F KB_LED_PWM <39>
KB_RST# 2 23 BEEP#
<20> KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# <48>
SERIRQ 3 26 VGATE
<16,40> SERIRQ 4 SERIRQ GPIO12 27 VGATE <8,18,60>
LPC_FRAME# ACOFF
ST <16,40,42> LPC_FRAME#
LPC_AD3 5 LPC_FRAME# ACOFF/GPIO13 ACOFF <54>
2 1 ECAGND
<16,40,42> LPC_AD3
LPC_AD2 7 LPC_AD3 Page 4 for Board ID Rev. mapping
CE11 PWM Output CE13 100P_0402_50V8J~D
<16,40,42> LPC_AD2 LPC_AD2
22P_0402_50V8J~D LPC_AD1 8 63 EC_BATT_PRS
2 1 2 1
<16,40,42> LPC_AD1
LPC_AD0 10 LPC_AD1
LPC & MISC
BATT_TEMP/GPIO38 64
EC_BATT_PRS <53,54> SSI2 +3VS
<16,40,42> LPC_AD0 LPC_AD0 GPIO39 65 SSD_EN <43,48>
RE13 33_0402_5%~D ADP_I
ADP_I/GPIO3A ADP_I <53,54>
CLK_PCI_LPC 12 AD Input 66 AD_BID0
<19> CLK_PCI_LPC 13 CLK_PCI_EC GPIO3B 75 1 2
PLT_RST# TP_CLK
<8,19,40,41,42,48> PLT_RST# PCIRST#/GPIO05 GPIO42 PWRSHARE_EN_EC# <45>
EC_RST# 37 76 AOAC_Thermal RE14 4.7K_0402_5%~D
RE57 2 1 EC_SCI# 20 EC_RST# IMON/GPIO43 TP_DATA 1 2
<20> EC_SCI# 38 EC_SCII#/GPIO0E
10K_0402_5%~D BATT_CAP_LED#_LV5 RE15 4.7K_0402_5%~D
<49> BATT_CAP_LED#_LV5 GPIO1D 68
DAC_BRIG/GPIO3C BATT_CAP_LED#_LV1 <49>
RE11 2 1 47K_0402_5%~D 70 FAN_CTRL
PT +3VALW SSI2 DA Output
EN_DFAN1/GPIO3D 71 EC_ENVDD
EN_DFAN1 <39>
IREF/GPIO3E EC_ENVDD <35>
CE14 2 1 0.1U_0402_16V7K~D KSI0 55 72
+3VALW PT KSI1 56 KSI0/GPIO30 CHGVADJ/GPIO3F BATT_CAP_LED#_LV2 <49>
PT KSI2 57 KSI1/GPIO31 ST PT
1 2 EC_SMB_CK1 KSI3 58 KSI2/GPIO32 83 EAPD_R# RE60 2 SHORT 10_0402_5%~D EAPD#
KSI3/GPIO33 EC_MUTE#/GPIO4A EAPD# <48>
RE17 2.2K_0402_5%~D KSI4 59 84 PWRSHARE_OE#
KSI4/GPIO34 USB_EN#/GPIO4B PWRSHARE_OE# <45>
1 2 EC_SMB_DA1 KSI5 60 85 AC_PRESENT
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 AC_PRESENT <18>
RE18 2.2K_0402_5%~D KSI6 PS2 Interface PCH_PWROK
KSI6/GPIO36 EAPD/GPIO4D PCH_PWROK <18>
1 @ 2 EAPD_R# KSI7 62 87 TP_CLK
RE28 10K_0402_5%~D
SSI2 KSO0 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA
TP_CLK <39> +3VLP
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <39>
1 @ 2 WAKE_PCH# KSO1 40
RE33 10K_0402_5%~D KSO2 41 KSO1/GPIO21
PT
2
KSO3 42 KSO2/GPIO22 97 EN_INVPWR
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 EN_INVPWR <35>
C KSO4 43 98 EN_WOL RE74 C
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 EN_WOL <41>
KSO5 HDA_SDO
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 1 SHORT 2
HDA_SDO <16> 47K_0402_1%~D
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 RE62 0_0402_5%~D

VCIN0_PH <53>
SPI Device Interface
1
KSO8 47 KSO7/GPIO27
KSO9 48 KSO8/GPIO28 119
ST AOAC_Thermal
PT KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 BATT_CAP_LED#_LV3 <49> SSI2
KSO10/GPIO2A SPIDO/GPIO5C BATT_CAP_LED#_LV4 <49>
KSO11 50 SPI Flash ROM 126 WLAN_EN#
WLAN_EN# <42>
1
+3VS KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 GPU_HOT#_R RE63 1 SHORT 2 0_0402_5%~D
52 KSO12/GPIO2C SPICS#/GPIO5A GPU_HOT# <24>
KSO13
KSO14 53 KSO13/GPIO2D
1
PT
2 PCH_SMLCLK KSO15 54 KSO14/GPIO2E 73 ENBKL
ST
RE36 2.2K_0402_5%~D
PT KSO16 81 KSO15/GPIO2F ENBKL/GPIO40 74 PCH_PWR_EN
ENBKL <18>
HE1
EC to BAT,Charge PCH_PWR_EN <34>
2
1 2 PCH_SMLDATA SUSPWRDNACK 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 BATBTN# 100K_0402_1%_TSM0B104F4251RZ
<18> SUSPWRDNACK KSO17/GPIO49 FSTCHG/GPIO50 90
RE37 2.2K_0402_5%~D BATT_CHG_LED#
ST BATT_CHG_LED#/GPIO52 91 CAPS_LED#
BATT_CHG_LED# <49>
2 1 KSO3 77 CAPS_LED#/GPIO53 92 CAPS_LED# <39>
EC_SMB_CK1 GPIO LCD_TEST
<53,54> EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 LCD_TEST <35>
@ RE59 10K_0402_5%~D EC_SMB_DA1 78 93 BATT_LOW_LED#
<53,54> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <49>
PCH_SMLCLK 79 SM Bus 95 SYSON
<17,24,35> PCH_SMLCLK
PCH_SMLDATA 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 VR_ON
SYSON <34,58> ST
SSI2 <17,24,35> PCH_SMLDATA EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 PM_SLP_S4#
VR_ON <60>
ST PM_SLP_S4#/GPIO59 PM_SLP_S4# <18> SSI2 +3VLP
ST
EC to Ambient Light Sensor, GPU
RE34 1 SHORT 2 0_0402_5%~D PM_SLP_S3#_R 6 100 PCH_RSMRST#
<18,43> PM_SLP_S3#
RE35 1 SHORT 2 0_0402_5%~D PM_SLP_S5#_R 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 PCH_RSMRST# <18> ST VCOUT0_PH# RE78 1 2 10K_0402_5%~D
<18> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# <17>
EC_TX EC_SMI# 15 102 RE64 1 SHORT 2 0_0402_5%~D VCIN1_PH <53>
<20> EC_SMI# 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103
T4913 @ PAD~D PS_ID H_PROCHOT#_EC
<53> PS_ID GPIO0A H_PROCHOT#_EC/GPXIOA06
PBTN_SW# 17 104 VCOUT0_PH#
GPIO0B VCOUT0_PH/GPXIOA07 VCOUT0_PH# <55>
EC_WLAN_WAKE# 18 GPO 105 BKOFF# SYSON 1 2
PT <42> EC_WLAN_WAKE#
USBCHG_DET_EC# 19 GPIO0C
GPIO
BKOFF#/GPXIOA08 106 CPU1.5V_S3_GATE
BKOFF# <35> SSI2 RE75 10K_0402_5%~D
GPIO0D PBTN_OUT#/GPXIOA09 CPU1.5V_S3_GATE <8,12,58>
25 107 EC_LAN_WAKE#
<35> EC_INV_PWM
SYSTEM_FAN_FB 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 HWPG
EC_LAN_WAKE# <41> PT AC_IN 1 2
<39> SYSTEM_FAN_FB FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
WAKE_PCH# 29 @ RE58 100K_0402_5%~D
SSI2 <18> WAKE_PCH#
EC_TX 30 EC_PME#/GPIO15 SSI2
<42> EC_TX 31 EC_TX/GPIO16 110 2 1
EC_RX AC_IN AC_IN
<42> EC_RX EC_RX/GPIO17 AC_IN/GPXIOD01 AC_IN <54>
AUD_MUTE# 32 112 EC_ON CE16 100P_0402_50V8J~D
<48> AUD_MUTE# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON <55>
BATT_TURBO_BOOST EC_ON_CTRL#
SSI2 <54> BATT_TURBO_BOOST
USB_PWR_EN# 36 SUSP_LED#/GPIO19
GPI
ON/OFF/GPXIOD03 115 LID_SW_IN#
SSI2 EC_ON
SSI2 1 2
B PT <44> USB_PWR_EN# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 SUSP#
LID_SW_IN# <40>
CE60 1U_0402_6.3V6K~D
B
SUSP#/GPXIOD05 117 SUSP# <12,34,56,57,58>
PBTN_OUT#
SSI2 GPXIOD06 118 EC_PECI
PBTN_OUT# <8,18>
1 2
PECI_KB9012/GPXIOD07 H_PECI <8,20>
AGND/AGND
GPU_VR_HOT# 122 RE38 43_0402_1%

<61> GPU_VR_HOT#
RE39 1 SHORT 2 0_0402_5%~D EC_CRY2 123 XCLKI/GPIO5D 124 +V18R
ST
GND/GND
GND/GND
GND/GND
GND/GND
<18> SUSCLK XCLKO/GPIO5E V18R

1
GND0
ST
2
1 CE17
RE40 4.7U_0805_10V6K
CE18 KB9012QF-A3_LQFP128_14X14 2
11
24
35
94
113
69
100K_0402_5%~D 20P_0402_50V8J~D
2 LE2
1
ECAGND 2 1
FBMA-L11-160808-800LMT_0603
+3VLP
Power on Circuit +3VLP
1
SSI2
2
RE79
+3VS 100K_0402_5%~D RE49 HWPG PT +3VALW
DE2
1 2 USBCHG_DET_EC# 1 2 100K_0402_5%~D
<60> VR_HOT# <45> USBCHG_DET# +3VLP
2
2
RE72 10K_0402_5%~D DE3
1
USBCHG_DET_D <55> 1 2
1 RB751V40_SC76-2 BATBTN# EC_ON_CTRL# RE66
<49> BATBTN#
1
DE6 D
ST 1 SSI2
2
CE19 1 2 USBCHG_DET#_D 2 QE4 RB751V40_SC76-2 CE25 10K_0402_5%~D

RE41 0.1U_0402_16V7K~D G 2N7002_SOT23-3 1 2
SSI2
ST +3VLP
1
2 RB751V40_SC76-2 RE73 10K_0402_5%~D DE1 0.1U_0402_25V6K~D 1 2
0_0402_5%~D S SSI2
3
1 2 2 <53,55> POK
SHORT PBTN_SW# @ RE67 0_0402_5%~D
<39> PBTN_SW#
PT ST
1
UE2 RB751V40_SC76-2 1 SHORT 2 HWPG

<59> SA_PGOOD
1 2 USBCHG_DET_EC# RE68 0_0402_5%~D
P
+3VALW
A <8,54> H_PROCHOT# H_PROCHOT# 4 2 H_PROCHOT#_EC RE69 10K_0402_5%~D A
Y A 1 2 USBCHG_DET#_D 1 SHORT 2
NC
PT2 +3VLP <58> +1.5V_PWROK

G
RE80 100K_0402_5%~D RE70 0_0402_5%~D

2
SN74LVC1G06DCKR_SC70-5 USBCHG_DET#_D 1 2
1
1 RE42 @ RE81 150K_0402_5% 1 SHORT 2

<56> +1.8VS_PWROK
CE21 100K_0402_5%~D RE71 0_0402_5%~D
47P_0402_50V
PT2
ST
1

EC ENE-KB930/ ENE3810
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
Power ON Circuit - PWR/Button Board Keyboard back light
ST
SW1
DTSM-61K-S-Q-T/R(756) 0730: Steg Follow CONN List
1 3
<38> PBTN_SW#
+5VS
ST +5VS_KBL
2 4
F1
0.75A_24V_1812L075-24DR
2 1
PT +5VS
10U_0603_6.3V6M~D
D D
20mil
1U_0603_10V6K~D
0817 Hank: Move power BTN to MB 1 1 +VSBP QE5
C11
ME2N7002D-G_SOT23-3
+3VALW
C12
100K_0402_5%~D
1 3 1 2 KB_CAPS_LED
1
2 2 RE84 470_0402_5%~D
S
RE54
ST
100K_0402_5%~D
1
ST
G
2
2
RE51
+5VS_KBL 1
ME2N7002D-G_SOT23-3
ACES_50504-0040N-001 D 1
4 6
3 4 G2 5
QE6
KB_BL_DET 2 1 2 @ CE61
<20> KB_BL_DET 2 3 G1 <38> CAPS_LED# G 0.1U_0402_25V6K~D
R30 47K_0402_5%~D
KB_BL_PWM 1 2 2
1
1
S
R31 JKBL 3
20mil
100K_0402_5%~D ST
1
D
2 Q11
<38> KB_LED_PWM
G SSM3K7002FU_SC70-3~D
S
3
C C
FAN Control circuit

+FAN_POWER
+5VS FAN +FAN_POWER

INT_KBD Conn.
CE55
1 2 KSI[0..7]
40mil 40mil <38> KSI[0..7]
KSO[0..16]
1U_0402_6.3V6K~D <38> KSO[0..16]
1000P_0402_50V7K~D
2.2U_0603_10V6K~D
U30 +3VS +5VS
2 1
1 8
VEN GND
CE54
2 7 CE27
3 VIN GND 6
VO GND 1 2
10K_0402_5%~D
10K_0402_5%~D
4 5 JKB
<38> EN_DFAN1 VSET GND
2
KB_DET# 1
<17> KB_DET# 2 1
G996P11U_SO8 RE53 RE52 KSI7
KSI6 3 2
SSI2 KSI4 4 3
KSI2 5 4
1
JFAN KSI5 6 5
B 1 KSI1 7 6 B
SYSTEM_FAN_FB 2 1 2 1 KSI3 8 7
<38> SYSTEM_FAN_FB 3 2 KSI0 9 8
DE4 @ @
CH751H-40PT_SOD323-2~D 4 3 KSO5 10 9
CP1 CP6
5 G1 KSO13 1 8 KSI2 1 8 KSO4 11 10
G2 KSO15 2 7 KSI4 2 7 KSO7 12 11
ACES_50271-0030N-001 KSO16 3 6 KSI6 3 6 KSO6 13 12
KSO12 4 5 KSI7 4 5 KSO8 14 13
0730: Steg Follow CONN List KSO3 15 14
15
100P_0805_8P4C_50V8K 100P_0805_8P4C_50V8K KSO1 16
@ @ KSO2 17 16
KSO0 18 17
CP2 CP5
KSO10 1 8 KSI0 1 8 KSO12 19 18
Touch pad +3VS

KSO11
KSO9
2
3
7
6
KSI3
KSI1
2
3
7
6
KSO16
KSO15
20
21
19
20
21
KSO14 4 5 KSI5 4 5 KSO13 22
KSO14 23 22
JTP 100P_0805_8P4C_50V8K KSO9 24 23
100P_0805_8P4C_50V8K
1 KSO11 25 24
L1 1 2 BLM18AG601SN1D_0603~D TP_CLK_R 2 1 @ @ KSO10 26 25
<38> TP_CLK 1 2 BLM18AG601SN1D_0603~D 3 2 27 26
L2 TP_DATA_R CP3 CP4 KB_CAPS_LED
<38> TP_DATA 4 3 1 8 1 8 28 27
KSO6 KSO2
<14,17,43,48> PCH_SMBDATA 5 4 KSO7 2 7 KSO1 2 7 29 28 31
<14,17,43,48> PCH_SMBCLK 6 5 KSO4 3 6 KSO3 3 6 30 29 GND 32
6 30 GND
PESD5V0U2BT_SOT23-3~D
7 KSO5 4 5 KSO8 4 5
8 G1 ACES_88514-3001
G2
3
100P_0805_8P4C_50V8K 100P_0805_8P4C_50V8K
SSI2
ACES_51522-00601-001
1
1
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
10P_0402_50V8J~D
DE7
@
C13
C14
C15
C16
KB_DET# CE28 1 2 100P_0402_50V8J~D

DE5
@ KSO0 CE29 1 2 100P_0402_50V8J~D

2
A @ A
ST
1
Close to JTP connector

SW/TP/SCREW
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com
ATMEL TPM for XPS
+3VS
0.1U_0402_25V6K~D
TPM@ C1
4700P_0402_25V7K~D
ST @
1 1
C2
+3VS
U1
ST
D 2 2 D
10
50mA
VCC_0
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
0.1U_0402_25V6K~D
10U_0603_6.3V6M~D
5 19
SB3V VCC_1
TPM@ C3
TPM@ C4
TPM@ C5
TPM@ C6
24
VCC_2
1 1 1 1
+3VS
28 12 2 2 2 2
LPCPD# V_BAT 13
26 NBO_13 14
<16,38,42> LPC_AD0 LAD0 NBO_14
<16,38,42> LPC_AD1 23
20 LAD1
<16,38,42> LPC_AD2 LAD2
<16,38,42> LPC_AD3 17
LAD3 6
GPIO6
CLK_PCI_TPM 21 9
<17> CLK_PCI_TPM 22 LCLK TESTBI 8
<16,38,42> LPC_FRAME# 16 LFRAME# TESTI +3VS
<8,19,38,41,42,48> PLT_RST# 27 LRESET#
<16,38> SERIRQ 1 SHORT 2 0_0402_5%~D
15 SERIRQ
R34
<18> PM_CLKRUN# CLKRUN# 7 PP 1 2
NC_7 @ R1 4.7K_0402_5%~D
ST 1 4
2 ATEST_1 GND_4 11
3 ATEST_2 GND_11 18
ATEST_3 GND_18 25
GND_25
AT97SC3204-X2A14-AB_TSSOP28
TPM@
C ST C
CLK_PCI_TPM
1
ST R2
33_0402_5%~D
2
1
C8
27P_0402_50V8J~D
2
Lid Switch
B
PT2
Screw Hole B
H1 H2 H3 H4 H5 H6 H7 H13 +3VALW
H_2P3 H_1P3 H_3P0 H_3P3 H_1P7x1P3 H_2P3 H_2P3 H_3P0

@ @ @ @ @ @ @ @
1
1
1
2
H9 H10 H11 H12 H14 U5 R4
C9 47K_0402_5%~D
VDD
H_4P1X3P7 H_4P1X3P7 H_3P6 H_3P9 H_2P3 0.1U_0402_16V7K~D
2
@ @ @ @ @ 2
1
3
OUTPUT LID_SW_IN# <38>
GND
S-5711ACDL-M3T1S_SOT23-3
1
No CIS Symbol, Change PN to SA00003GI00 as ME recommand.
A A
FD1 FD2 FD3 FD4

@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
1
CONN & LID
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
+LAN_IO
WWW.AliSaler.Com W=60mils
+3VALW
W=60mils
PT +LAN_VDD
2
+LAN_IO 1.5A
@RL1
@RL1
PT
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
S
D
3 1 470_0603_5%
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1 1 1 1 1 1 1
2
1 1 1 1 1 1 1
1
1U_0402_6.3V6K~D
CL1
100K_0402_5%~D
RL2
CL8 CL9 CL10 CL11 CL12 CL13 CL14
CL2 CL3 CL4 CL5 CL6 CL7
1
QL3 D 2 2 2 2 2 2 2
2 2 2 2 2 2 2
G
AO3419L_SOT23-3 2 EN_WOL#
1
G
2
EN_WOL# S @ QL4
3
D SSM3K7002FU_SC70-3~D D
2
RL24
These caps close to Pin 3,6,9,13,29,41,45
10K_0402_5%~D These caps close to Pin 12,27,39,42,47,48
1
+LAN_IO
+LAN_IO W=40mils W=20mils
1
D +LAN_VDD
2 QL5 RL5 1 SHORT 2 0_0603_5%~D +LAN_VDDREG
<38> EN_WOL
0.1U_0402_16V7K~D
1 SHORT 2 +LAN_EVDD10
4.7U_0603_6.3V6K~D
G SSM3K7002FU_SC70-3~D
2
0.1U_0402_16V7K~D
1U_0402_6.3V6K~D
S RL7 ST 1 1 RL6 0_0603_5%~D
3
RL4 10K_0402_5%~D ST
10K_0402_5%~D CL16 CL17 1 1
2
G
1
X5R 2 2 CL18 CL19
1
1 3 LAN_WAKE#
<38> EC_LAN_WAKE# 2 2
S
PT PT
QL6
2N7002H_SOT23-3
CL20 & CL21 close to chip side
UL1
CL20 1 2 0.1U_0402_16V7K~D
PCIE_PRX_GLANTX_P1_C 22 31
<17> PCIE_PRX_GLANTX_P1 HSOP LED3/EEDO 37
CL21 1 2 0.1U_0402_16V7K~D
PCIE_PRX_GLANTX_N1_C 23 LED1/EESK 40
<17> PCIE_PRX_GLANTX_N1 HSON LED0
17 30 RL8 1 2 10K_0402_5%~D
<17> PCIE_PTX_GLANRX_P1 18 HSIP EECS/SCL 32 RL9 1 2 10K_0402_5%~D
<17> PCIE_PTX_GLANRX_N1 HSIN EEDI/SDA +LAN_VDD
C LL1 C
W=60mils
16 1 LAN_MDIP0 +LAN_SROUT1.05 1 2 W=60mils
<17> LANCLK_REQ# CLKREQB MDIP0
0.1U_0402_16V7K~D
2
4.7U_0603_6.3V6K~D
LAN_MDIN0
25 MDIN0 4 LAN_MDIP1 2.2UH_NLC252018T-2R2J-N_5%
<8,19,38,40,42,48> PLT_RST# PERSTB MDIP1 1 1
5 LAN_MDIN1
19 MDIN1 7 LAN_MDIP2 CL23 CL24 X5R
<17> CLK_PCIE_LAN 20 REFCLK_P NC/MDIP2 8 LAN_MDIN2
<17> CLK_PCIE_LAN# REFCLK_N NC/MDIN2 10 2 2
LAN_MDIP3
NC/MDIP3 11 LAN_MDIN3
XTLO 43 NC/MDIN3
CKXTAL1
XTLI 44 13
CKXTAL2 DVDD10 +LAN_VDD
29 These components close to Pin 36
PT DVDD10 41
LAN_WAKE# 28 DVDD10 ( Should be place within 200 mils )
RL11 LANWAKEB
1 2 ISOLATEB 26 27
+3VS ISOLATEB DVDD33 39
1K_0402_5%~D DVDD33
14 12 @
NC/SMBCLK AVDD33 +LAN_IO RL10
2
RL12 1 2 10K_0402_5%~D 15 42 15P_0402_50V8J~D CL22

RL13 RL14 1 2 1K_0402_5%~D 38 NC/SMBDATA AVDD33 47 1 2 XTLI 2 1
+LAN_IO GPO/SMBALERT AVDD33 LAN_25M <17>
15K_0402_5% 48 1
AVDD33 0_0402_5%~D
2 1 33 YL1
+LAN_IO
1
ENSWREG 21 +LAN_EVDD10 1
RL15 0_0402_5%~D 25MHZ_12PF_7V25000012
3.3V : Enable switching regulator 34 EVDD10 2
0V : Disable switching regulator +LAN_VDDREG 35 VDDREG 3 GND
VDDREG AVDD10 +LAN_VDD
6
AVDD10 9
RL17 1 2 2.49K_0402_1%~D 46 AVDD10 45 4
RSET AVDD10 GND
B 24 36 +LAN_SROUT1.05 B
49 GND REGOUT 3
PGND
1 2 3 XTLO
RTL8111F-CGT_QFN48_6x6
15P_0402_50V8J~D CL25
JLAN1
SSI2
LAN_IO Rising time (10%~90%) must >1mS and <100mS 12
TL1 RJ45_TX3- 8 GND
PR4- 11
+V_DAC 1 24 RL19 1 2 75_0603_1% RJ45_TX3+ 7 GND
LAN_MDIN3 2 TCT1 MCT1 23 RJ45_TX3- RL20 1 2 75_0603_1% PR4+
LAN_MDIP3 3 TD1+ MX1+ 22 RJ45_TX3+ RL21 1 2 75_0603_1% RJ45_RX1- 6
TD1- MX1- RL22 1 2 75_0603_1% PR2-
+V_DAC 4 21 RJ45_TX2- 5
LAN_MDIN2 5 TCT2 MCT2 20 RJ45_TX2- PR3-
CL26 1 2 LAN_MDIP2 6 TD2+ MX2+ 19 RJ45_TX2+ RJ45_TX2+ 4
TD2- MX2- 1 PR3+
0.01U_0402_16V7K~D +V_DAC 7 18 CL27 RJ45_RX1+ 3
LAN_MDIN1 8 TCT3 MCT3 17 RJ45_RX1- 1000P_1808_3KV7K~D PR2+
LAN_MDIP1 9 TD3+ MX3+ 16 RJ45_RX1+ 2 RJ45_TX0- 2
TD3- MX3- PR1- 10
+V_DAC 10 15 RJ45_TX0+ 1 GND
LAN_MDIN0 11 TCT4 MCT4 14 RJ45_TX0- PR1+ 9
LAN_MDIP0 12 TD4+ MX4+ 13 RJ45_TX0+ GND
TD4- MX4-
SANTA_130460-2
CONN@
A X'FORM_ IH-160 LAN A
0817 Hank: Change to temp part

P25-LAN RTL8111E
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com +VSBP +3VALW

WLAN / BT4.0 PCIE Mini Card
+1.5VS +1.5VS_WLAN
PT QM3 +3VS_WLAN
AON7212L_DFN8-5
1
+3VALW 1 JP11 @
RM7 2 2 1
330K_0402_5% 5 3 2 1
1
JUMP_43X39
0.1U_0402_16V7K~D
CM7
0.1U_0402_16V7K~D
CM8
0.01U_0402_16V7K~D
CM9
RM29 1 1 1
4.7U_0603_6.3V6K~D
CM1
0.1U_0402_16V7K~D
CM2
0.1U_0402_16V7K~D
CM3
0.01U_0402_16V7K~D
CM4
47P_0402_50V
CM5 @
10K_0402_5%~D 1 1 1 1 1
4
WLAN_EN
1
D D 2 2 2 D
1 2 2 2 2 2
0.1U_0402_25V6K~D
2
<38> WLAN_EN#
QM1
CM28
G RM20
SSI2 S 1.5M_0402_5%~D PT
3
2 +3VS_WLAN +3VS
2
SSI2
1
RM26
10K_0402_5%~D
2
G
2
WL_OFF#_R 1 3 WL_OFF#
WL_OFF# <19>
QM4 2N7002_SOT23-3
S
PT
+3VS_WLAN +3VS_WLAN +1.5VS_WLAN
@ RM28 1 2 10K_0402_5%~D
SSI2
JMINI1
1 2
PT <38> EC_WLAN_WAKE#
PAD~D T10@ 3 1 2 4
PAD~D T11@ 5 3 4 6
7 5 6 8 RM16 1 2 0_0402_5%~D
<17> MINI1CLK_REQ# 7 8 LPC_FRAME# <16,38,40>
9 10 RM14 1 2 0_0402_5%~D LPC_AD3 <16,38,40>
11 9 10 12 RM17 1 2 0_0402_5%~D
<17> CLK_PCIE_MINI1# 11 12 LPC_AD2 <16,38,40>
13 14 RM18 1 2 0_0402_5%~D LPC_AD1 <16,38,40>
C <17> CLK_PCIE_MINI1 13 14 C
15 16 RM19 1 2 0_0402_5%~D LPC_AD0 <16,38,40>
PLT_RST# 1 2 17 15 16 18
RM24 0_0402_5%~D 19 17 18 20 WL_OFF#_R
<19> CLK_LPC_DEBUG 19 20
21 22 PLT_RST#
23 21 22 24 PLT_RST# <8,19,38,40,41,48>
<17> PCIE_PRX_WLANTX_N3 25 23 24 26
<17> PCIE_PRX_WLANTX_P3 27 25 26 28
29 27 28 30 MINI1_SMBCLK
31 29 30 32 MINI1_SMBDATA
<17> PCIE_PTX_WLANRX_N3 31 32
33 34
<17> PCIE_PTX_WLANRX_P3 33 34
35 36
37 35 36 38 USB20_N4 <19>
<20> PCIE_MCARD1_DET# 39 37 38 40 USB20_P4 <19>
41 39 40 42 USB_MCARD1_DET# <20>
+3VS_WLAN 41 42
43 44
RM10 1 2 0_0402_5%~D 45 43 44 46
<38> EC_TX 47 45 46 48
RM12 2 1 100K_0402_5%~D EC_TX_R 49 47 48 50
EC_RX_R 51 49 50 52
51 52 +3VS_WLAN
SSI2 53 54
RM13 1 2 1K_0402_5%~D GND1 GND2
<20> BT_RADIO_DIS#
1
RM25 1 2 0_0402_5%~D ACES_51722-0520W-001
<38> EC_RX
RM22 RM23
QM2A
2
2.2K_0402_5%~D 2.2K_0402_5%~D DMN66D0LDW-7_SOT363-6~D
2
MINI1_SMBCLK 1 6
SMBCLK <17>
@ RM8 1 2
0_0402_5%~D
B B
+3VS_WLAN
QM2B
5
MINI1_SMBDATA 4 3
SMBDATA <17>
@ RM9 1 2
0_0402_5%~D
A A

WLAN/WWAN/SIM/BT
Custom LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
+3VS @ +3VS_RD_M
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SATA III Re-driver for mSATA
JP13
JUMP_43X39
1 2 REXT_mSATA
.1U_0402_16V7K
MSATA@ CN1
MSATA@ CN26
MSATA@ CN27
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
ST PT2
2
1 1 1 1 MSATA@
CN2
MSATA@
RN44
2.2K_0402_5%~D
2 2 2 2
1
U44 MSATA@
D D
<38,48> SSD_EN MSATA@ RN42 1 2 0_0402_5%~D mSATA_ON 7 6
EN VDD 16
SATA_PTX_DRX_P1 MSATA@ CN30 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P1_C 1 VDD
<16> SATA_PTX_DRX_P1 A_INp
<16> SATA_PTX_DRX_N1 SATA_PTX_DRX_N1 MSATA@ CN31 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N1_C 2 10
A_INn NC 20 REXT_mSATA +3VS_RD_M
SATA_PRX_DTX_P1 MSATA@ CN11 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_C 5 REXT PT2
<16> SATA_PRX_DTX_P1 B_OUTp
SATA_PRX_DTX_N1 MSATA@ CN10 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N1_C 4 9 mSATA_PE1 MSATA@ RN3 1 2 10K_0402_5%~D
<16> SATA_PRX_DTX_N1 B_OUTn A_PRE0 8 mSATA_PE2 MSATA@ RN4 1 2 10K_0402_5%~D
MSATA@ RN10 1 2 10K_0402_5%~D mSATA_BPRE1 17 B_PRE0
SSI2 MSATA@ RN11 1 2 10K_0402_5%~D mSATA_APRE1 19 B_PRE1 15 SATA_PTX_DRX_P1_RC MSATA@ CN12 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P1_RC1
+3VS_RD_M A_PRE1 A_OUTp SATA_PTX_DRX_P1_RC1 <48>
14 SATA_PTX_DRX_N1_RC MSATA@ CN13 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N1_RC1
PT2 RN12 1 @ 2 0_0402_5%~D mSATA_TEST 18 A_OUTn SATA_PTX_DRX_N1_RC1 <48>
3 TEST 11 SATA_PRX_DTX_P1_RC MSATA@ CN8 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P1_RC1
GND B_INp SATA_PRX_DTX_P1_RC1 <48>
13 12 SATA_PRX_DTX_N1_RC MSATA@ CN9 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N1_RC1
GND B_INn SATA_PRX_DTX_N1_RC1 <48>
21
EPAD
PS8520BTQFN20GTR2_TQFN20_4X4
+3VS
1
C C
JP5
JUMP_43X39
@ +5VS
+VSBP +5VALW QN1 +5VS_HDD
2
SI3456DDV-T1-GE3_TSOP6~D
+3.3V_RUN_FFS
1
+3VS
10U_0603_6.3V6M~D
0.1U_0402_25V6K~D
SSI2
D
RN23 6
S
1 1 100K_0402_5%~D 5 4
RN24 2
1
CN15
CN14
+3VALW 330K_0402_5% 1
2
RN26 FFS_INT2_Q
ST
G
2
2 2
0.1U_0402_16V7K~D
1000P_0402_50V7K~D
10U_0805_10V6K~D
1U_0402_6.3V6K~D
10U_0805_10V4Z~D
100K_0402_5%~D
3
3
UN2 1 1 1 1 1
CN5
CN7
LNG3DM
QN2B
CN17
CN6
10 RN25 HDD_EN_5V
RES
CN4
1 13 5 100K_0402_5%~D
14 VDD_IO RES 15 2 2 2 2 2
VDD RES 6
16
3
FFS_INT1 11 RES
<19> FFS_INT1 INT 1
QN2A
FFS_INT2 9 5
<20> FFS_INT2 INT 2 GND
QN3B
12 FFS_INT2 2
7 GND 5
PCH_SMBDATA 6 SDO/SA0
SSI2
1
<14,17,39,48> PCH_SMBDATA
6
SDA / SDI / SDO
0.1U_0402_25V6K~D
<14,17,39,48> PCH_SMBCLK PCH_SMBCLK 4
4
SCL/SPC 2
1
NC
QN3A
8 3 1
CS NC PM_SLP_S3# RN29 1 SHORT 2 0_0402_5%~D 2
CN16
LNG3DMTR_LGA16_3X3~D RN46
1.5M_0402_5%~D
ST
1
1
2
2
RN30
100K_0402_5%~D
2
B B
SATA III Re-driver for HDD +3VS @

JP14
+3VS_RD
JUMP_43X39
1 2 REXT_SATA HDD CONN
0.01U_0402_16V7K~D
0.1U_0402_25V6K~D
.1U_0402_16V7K
ST
0.01U_0402_16V7K~D
JHDD
1
CN25 CN24 1 +3VS +5VS_HDD
1 1 1 1 1
CN19
CN18 RN45 2 SATA_PTX_DRX_P0_RC1

4.99K_0402_1%~D 2 3 SATA_PTX_DRX_N0_RC1
3 4
2 2 2 2 4 5 SATA_PRX_DTX_N0_RC1
2
5 6 SATA_PRX_DTX_P0_RC1
6 7
+3VS 7 8
8 9
9 10
U45 10 11
PM_SLP_S3# @ RN17 1 2 0_0402_5%~D 7 6 11 12 HDD_DETECT#
<18,38> PM_SLP_S3# EN VDD 1 12 HDD_DETECT# <20>
16 CN3 13
SATA_PTX_DRX_P0 CN32 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P0_C 1 VDD 13 14
<16> SATA_PTX_DRX_P0 A_INp +3VS_RD 14
<16> SATA_PTX_DRX_N0 SATA_PTX_DRX_N0 CN33 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N0_C 2 10 0.1U_0402_16V7K~D 15 +5VS_HDD
A_INn NC 20 REXT_SATA 2 15 16
SATA_PRX_DTX_P0 CN22 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_C 5 REXT 16 17
<16> SATA_PRX_DTX_P0 B_OUTp 17
SATA_PRX_DTX_N0 CN23 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N0_C 4 9 SATA_APRE0 RN6 1 @ 2 0_0402_5%~D 18 FFS_INT2_Q
<16> SATA_PRX_DTX_N0 B_OUTn A_PRE0 18
8 SATA_BPRE0 RN7 1 @ 2 0_0402_5%~D 19
RN13 1 @ 2 0_0402_5%~D SATA_BPRE1 17 B_PRE0 19 20
RN14 1 @ 2 0_0402_5%~D SATA_APRE1 19 B_PRE1 15 SATA_PTX_DRX_P0_RC CN20 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_P0_RC1 20 21
+3VS_RD A_PRE1 A_OUTp GND
14 SATA_PTX_DRX_N0_RC CN21 1 2 0.01U_0402_16V7K~D SATA_PTX_DRX_N0_RC1 22
RN31 1 @ 2 0_0402_5%~D SATA_TEST 18 A_OUTn GND 23
3 TEST 11 SATA_PRX_DTX_P0_RC CN28 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_P0_RC1 GND 24
A A
13 GND B_INp 12 SATA_PRX_DTX_N0_RC CN29 1 2 0.01U_0402_16V7K~D SATA_PRX_DTX_N0_RC1 GND
21 GND B_INn
EPAD J-L_UCNR2234B020-0
PS8520BTQFN20GTR2_TQFN20_4X4

HDD / FFS
C LA-7841P 0.3
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
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USB3.0 / USB2.0
SSI2
PT +USB3_VCCA
JUSB1
DLW21SN900SQ2L_0805_4P~D @ DI1 1
VBUS
150U_B2_6.3V-M~D
0.1U_0402_25V6K~D
D USB20_N0 1 2 USBP0_R_D- USB3TP1_D+ 1 10 USB3TP1_D+ USBP0_R_D- 2 D
<19> USB20_N0 1 2 D-
1 USBP0_R_D+ 3
USB3TN1_D- 2 9 USB3TN1_D- 4 D+
1 GND
CI1
USB20_P0 4 3 USBP0_R_D+ + USB3RN1_D- 5
<19> USB20_P0 4 3 StdA-SSRX-
2
CI2
USB3RP1_D+ 4 7 USB3RP1_D+ USB3RP1_D+ 6 10
LI1 StdA-SSRX+ GND
DI2
7 11
1 2 USB3RN1_D- 5 6 USB3RN1_D- 2 2 USB3TN1_D- 8 GND-DRAIN GND 12
@ RI1 0_0402_5%~D USB3TP1_D+ 9 StdA-SSTX- GND 13
3 StdA-SSTX+ GND
1 2 TAITW_PUBAU3-09FLBS1NN4H0
@ RI2 0_0402_5%~D 8
PT IP4292CZ10-TB_XSON10U10~D
1
@ LI2
2 1 USB3T_N1 4 3 USB3TN1_D-
<19> USB3TN1
CI3 0.01U_0402_16V7K~D 4 3 Place close to JUSB1
2 1 USB3T_P1 1 2 USB3TP1_D+ 0816 Hank: Change USB connector to DC233009W00
<19> USB3TP1 1 2
CI4 0.01U_0402_16V7K~D
DLW21SN900HQ2L_0805_4P~D PT
RI3 1 SHORT 2 0_0402_5%~D
+3VALW
RI4 1 SHORT 2 0_0402_5%~D
2.0A / Channel
1
ST +5VALW RI37 +USB3_VCCA
PT 10K_0402_5%~D
UI1
@ LI3 1 8
2
USB3RN1 4 3 USB3RN1_D- 2 GND OC1# 7 USB_OC0# <19>
<19> USB3RN1 4 3 IN OUT1
10U_0805_10V6K~D
0.1U_0402_25V6K~D
C 3 6 C
<38> USB_PWR_EN# 4 EN1# OUT2 5
USB3RP1 1 2 USB3RP1_D+ EN2# OC2#
<19> USB3RP1 1 2 1 1
TPS2062ADR_SO8~D
CI5
CI6
DLW21SN900HQ2L_0805_4P~D
RI5 1 SHORT 2 0_0402_5%~D 2 2
RI7 1 SHORT 2 0_0402_5%~D
ST
B B
A A

USB conn.
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
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USB Powershare
USB Power Switch

PI5USB1457 PI5USB1457A PT
INT ST +3VALW
D <38> PWRSHARE_EN_EC# D
0_0402_5%~D
INT
10K_0402_5%~D
2.0A
1
+5VALW
+5V_CHGUSB
RI26
RI38
UI2
1 8
ST ST
2
2 GND OC1# 7 USB_OC1# <19>
UI3
ST 3 IN OUT1 6
RI17 1 SHORT 2 0_0402_5%~D SB# 8 1 PWRSHARE_EN# 2 1 @ RI27 4 EN1# OUT2 5
<38> PWRSHARE_OE# 7 SB INT 2 USBP1_D- EN2# OC2#
<19> USB20_N1 0_0402_5%~D
6 Y- D- 3 USBP1_D+ TPS2062ADR_SO8~D
<19> USB20_P1 Y+ D+
CI11
CI12
5 4 SEL
VDD SEL
10U_0805_10V6K~D
0.1U_0402_16V7K~D
+5VALW 9 +5VALW
GND
1
0.1U_0402_25V6K~D
PI5USB1457AZAEX_TDFN8_2X2~D 1
2
1 RI18
10K_0402_5%~D 2
2
CI13
1
2
2
@ RI19
10K_0402_5%~D
1
C C
USB3.0 / USB2.0
SSI2
+5V_CHGUSB
JUSB3
1
DLW21SN900SQ2L_0805_4P~D VBUS
150U_B2_6.3V-M~D
0.1U_0402_25V6K~D
USBP1_R_D- 2
USBP1_D- 1 2 USBP1_R_D- USBP1_R_D+ 3 D-
1 2 1 D+
1 4
GND
CI14
+ USB3RN2_D- 5
SSRX-
2
CI15
USBP1_D+ 4 3 USBP1_R_D+ USB3RP2_D+ 6 11
4 3 SSRX+ GND
DI5
7 12
LI7 2 2 USB3TN2_D- 8 GND GND 13
1 2 USB3TP2_D+ 9 SSTX- GND 14
@ RI20 0_0402_5%~D USBCHG_DET# 10 SSTX+ GND
B <38> USBCHG_DET# DET B
1 2 TAIWI_USB005-107CRL-TW
@ RI21 0_0402_5%~D
CONN@
1
PT
@ LI8
2 1 USB3T_N2 4 3 USB3TN2_D-
<19> USB3TN2 4 3
CI16 0.01U_0402_16V7K~D
2 1 USB3T_P2 1 2 USB3TP2_D+
<19> USB3TP2
CI17 0.01U_0402_16V7K~D 1 2 PT
@ DI6
RI22 1 SHORT 2 0_0402_5%~D USB3TP2_D+ 1 10 USB3TP2_D+
RI23 1 SHORT 2 0_0402_5%~D USB3TN2_D- 2 9 USB3TN2_D-
USB3RP2_D+ 4 7 USB3RP2_D+
ST
USB3RN2_D- 5 6 USB3RN2_D-
PT
@ LI9 3
USB3RN2 4 3 USB3RN2_D-
<19> USB3RN2 4 3 8
USB3RP2 1 2 USB3RP2_D+ IP4292CZ10-TB_XSON10U10~D

<19> USB3RP2 1 2
RI24 1 SHORT 2 0_0402_5%~D Place close to JUSB3

A RI25 1 SHORT 2 0_0402_5%~D A
ST

USB conn.
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
A B C D E F G H
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1 1
2 2
3 3
4 4

HD Audio ALC275/Audio Jack
Custom
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A B C D E F G H
A B C D E
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1 1
2 2
3 3
4 4

Speaker/Audio Jack
Size Document Number
Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-7841P
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A B C D E
5 4 3 2 1
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IO BOARD Connector
SSI2
ACES_88194-4041
0730: Steg Follow CONN List 42
GND ST 0805: Steg follow CIS Symbol
41
GND
40 JSATA
39 40 1
D <17> PCIE_PTX_CARDRX_P4 39 1 SATA_PTX_DRX_P1_RC1 <43> D
38 2
<17> PCIE_PTX_CARDRX_N4 38 2 SATA_PTX_DRX_N1_RC1 <43>
37 3
36 37 3 4
<17> PCIE_PRX_CARDTX_P4 35 36 4 5 SATA_PRX_DTX_P1_RC1 <43>
<17> PCIE_PRX_CARDTX_N4 34 35 5 6 SATA_PRX_DTX_N1_RC1 <43>
33 34 6 7
<17> CLK_PCIE_CD 33 7 HDA_BITCLK_AUDIO <16>
32 8
<17> CLK_PCIE_CD#
31 32 8 9
+VSBP ST
31 9 +5VS
.1U_0402_16V7K
30 10
<19> USB20_N5 29 30 10 11
<19> USB20_P5 28 29 GND 12
27 28 GND
<14,17,39,43> PCH_SMBCLK 27 1 2 1
+3VS
CA59
26
<14,17,39,43> PCH_SMBDATA 25 26
ACES_50463-0104A-001 CA60 CA61
24 25 @ 0.1U_0402_25V6K~D
23 24 ST 2 1
1U_0402_6.3V6K~D
2
+1.5VS +RTCBATT 23
0.01U_0402_25V7K
.047U_0402_16V7K
.1U_0402_16V7K
22
4.7U_0603_6.3V6K~D
1 1 1 2 22
CM27
CM24
CM25
CM6
21
PT 20 21
19 20
2 2 2 1 <38> AUD_MUTE# 18 19
17 18
17
.1U_0402_16V7K
.1U_0402_16V7K
1 1 16
<16> HDA_SDIN0 16
CM26
CM29
15
ST <16> HDA_RST_AUDIO# 14 15
ST <16> HDA_SYNC_AUDIO 13 14 0816 Hank: P/N Correct, footprint Correct, but not CIS.
2 2 <16> HDA_SDOUT_AUDIO IO_BEEP# 12 13
11 12
<17> CDCLK_REQ# 10 11
<8,19,38,40,41,42> PLT_RST# 9 10
ST ST <38,43> SSD_EN 8 9
<20> MSATA_DET# 7 8
C PT +RTCVCC <16> USB_WWAN_DET# 6 7 C
<35> DMIC0 5 6
<35> DMIC_CLK 5
4
CA62 1U_0402_6.3V6K~D 3 4
2 1 IO_BEEP#
PT<38> EAPD# 2 3
<16> HDA_SPKR <20> WWAN_RADIO_DIS# 1 2
1
2 1 JIO
<38> BEEP#
CA63 1U_0402_6.3V6K~D
B B
A A

Card Reader RTS5209
Size
Document Number Rev
0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
WWW.AliSaler.Com +5VALW
+5VALW
Power LED 0730: Steg Follow CONN List
ST
R12100K_0402_5%~D
R11100K_0402_5%~D
R10 R9
1
+5VALW
R8100K_0402_5%~D
100K_0402_5%~D
1
1
IBAT1 1 2 BAT1 P49_10MIL_1 1 2 PWR_LED#_D
820_0402_5%~D 220_0402_5%~D JLED
2
1
2
D
2 1 D
2
R7
BATT_LOW_LED#_D 3 5
3 G1
3
Q5B D 4 6
3
5 Q3B D 4 G2
G 5 ACES_50504-0040N-001
DMN66D0LDW-7_SOT363-6~D G
S DMN66D0LDW-7_SOT363-6~D
4
6
Q6A D
S
4
6
2 Q3A D
<38> BATT_CAP_LED#_LV1
G
<38> BATT_CHG_LED# 2
DMN66D0LDW-7_SOT363-6~D G
S DMN66D0LDW-7_SOT363-6~D
1
S
1
+5VALW +5VALW
BATT LOW
R18100K_0402_5%~D
R14100K_0402_5%~D
R17100K_0402_5%~D
R13100K_0402_5%~D
R16 R15
1
1
IBAT2 1 2 BAT2 P49_10MIL_2 1 2
820_0402_5%~D 820_0402_5%~D
2
2
3
3
Q6B D Q4B D
5 5
C G G C
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
S S
4
4
6
6
Q7A D Q4A D
2 2
<38> BATT_CAP_LED#_LV2 <38> BATT_LOW_LED#
G G
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
S S
1
1
+5VALW
+5VALW
R27100K_0402_5%~D
R26100K_0402_5%~D
R25
1
R21100K_0402_5%~D
R20100K_0402_5%~D
R19
1
IBAT5 1 2 BAT5
IBAT3 1 2 BAT3
820_0402_5%~D
2
820_0402_5%~D
2
3
Q9B D
3
Q7B D 5
5 G
G DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D S
4
6
Q10A D
S
4
6
Q8A D 2
<38> BATT_CAP_LED#_LV3 2 G
B B
G DMN66D0LDW-7_SOT363-6~D
DMN66D0LDW-7_SOT363-6~D S
1
S
1
0730: Steg Follow CONN List

+5VALW
+5VALW
JBLED
1
2 1
R24100K_0402_5%~D
BAT1
R23100K_0402_5%~D
R22
1
BAT2 3 2
IBAT4 1 2 BAT4 BAT3 4 3
BAT4 5 4
BAT5 6 5 9
820_0402_5%~D 7 6 G1 10
<38> BATBTN#
2
8 7 G2
8
2
3
Q8B D ACES_51524-0080N-001
5
G
DMN66D0LDW-7_SOT363-6~D @D8
@D8
S PESD24VS2UT_SOT23-3~D
4
1
6
Q9A D
2 10mil ALL
G
A S A
1

Speaker/Audio Jack
C 0.3
LA-7841P
WWW.AliSaler.Com
5 4 3 2 1
5 4 3 2 1
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Version change list (P.I.R. List) EE section Page 1 of 1
Item Reason for change PG# Modify List Date Phase

P04-USB3.0 DEL POK to GRST , ADD RC , R62,C154
D 1 GRST delay to 2ms D
2
3
4
5
6
7
C
8 C
9
10
11
12
13
14
15
B B
A A

Block Diagram
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.3
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5 4 3 2 1
5 4 3 2 1
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D D
C C
B B
A A
Title
<Title>

A <Doc> 0.3

5 4
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3 2 1
5 4 3 2 1
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D D
C C
B B
A A
Title
<Title>

A <Doc> 0.3

5 4
WWW.AliSaler.Com
3 2 1
A B C D
+5VALW +3VALW
WWW.AliSaler.Com JDCIN9
SINGA_2DC-S060-020F
PL900
FBMA-L11-453215-800LMA90T_1812
VIN
BAV99W-7-F_SOT323-3~D
2 ADPIN 1 2
V+
2.2K_0402_5%
PR900
2
PD901
@ 0_0402_5%
1000P_0402_50V7K
1000P_0402_50V7K
7 1 2
100P_0402_50V8J
100P_0402_50V8J
1.8K_1206_5%~D
GND_2
PR901
1
V+
PR938
PC900
PC901
PC902
PC903
6
GND_1
1
5 PR902
1
V- 33_0402_5%
2
4 3 @ 1 3 PSID-3 1 2
S
1
V- ID PS_ID <38> 1
PQ900
FDV301N-G_SOT23-3~D
G
2
100K_0402_1%
2
PR904
PR903
10K_0402_1%
PSID-2 1 2
+5VALW
PL901
1
2
1
BLM18BD102SN1D_0603~D C
PSID 2 1 PSID-1 2 PQ901
15K_0402_1%
B MMST3904-7-F_SOT323~D
2
@ E
3
PR906
PD902
SM24_SOT23
1
BATT+ BATT++
BATT+
PL902
FBMA-L11-453215-800LMA90T_1812
1 2 BATT++
1
1
1000P_0402_50V7K~D
100P_0402_50V8J~D
100P_0402_50V8J~D
0.01U_0402_25V7K~D
1
1
PC904
PC905
PC906
PC907
PQ903
SI3457CDV
2
D
6
S
2
4 5 +VSBP
B+
1
2
2 2
PD904 1
100K_0402_1%
0.1U_0402_25V6
0.22U_0603_25V7K
1
G
SM24_SOT23
1
PR908
PC908
PC909
@
3
2
2
2
+5VALW
PR909
22K_0402_1%
EC_SMB_CK1 <38,54>
2
PR913 1 2 VSB_N_001
1VSB_N_003
JBATT9 100_0402_5%~D PR910
1 1 2 EC_SMB_DA1 <38,54>
100K_0402_1%
1 2
2 3 PR917
1
3 4 CLK_SMB 100_0402_5%~D PR916 PR911
4 5 DAT_SMB 1 2 10K_0402_1%~D 0_0402_5% D
5 6 BATT_PRS 1 2 1 2 1 2 VSB_N_002 2 PQ904
6 7 +3VALW <38,55> POK
SYS_PRS PR915 G SSM3K7002FU_SC70-3
7 8 100_0402_5%~D SHORT
.1U_0402_16V7K
S
3
8 9
PC910
9 10
1
10 11 PR918
2
11 EC_BATT_PRS <38,54>
3
0_0402_5%~D
ACES_50290-01101-001 SHORT @ PD905
SM24_SOT23
2
JIMBTY battery connector

1
SMART
3
Battery: PH901 under CPU botten side : 3
1.BATT+ CPU thermal protection at 90 degree C

2.BATT+ Recovery at 50 degree C
3.BATT+
4.CLK_SMB ADP_I <38,54> +3VLP
5.DAT_SMB
6.BATT_PRS
7.SYS_PRES
8.BAT_ALERT
2
9.GND
PR936 PR935
10.GND 13.7K_0402_1% 13K_0402_1%~D
11.GND
1
<38> VCIN1_PH <38> VCIN0_PH
13.7K_0402_1%
0.1U_0402_25V6
1
1 PH901
100K_0402_1%_TSM0B104F4251RZ
PC911
PR937
2
2
@
4 4
Compal Electronics, Inc.

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-DCIN / BATT CONN / OTP
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XPS14
A B C D
A B C D
WWW.AliSaler.Com Iada=0~3.34A(65W)
ADP_I = 19.9*Iadapter*Rsense
PQ100
P2 P3 PR100 B+ AO4407A_SO8
0.01_2512_1% 1 8
1 4 2 7
3 6
PQ102 2 3 CSIN 5
1
PQ101 AO4423L_SO8 1
AO4407A_SO8
4
8 1 1 8
VIN CHG_B+
7 2 2 7
6 3 3 6 @ PJP100
5 5 2 1
2 1
1
3.3_1210_5%~D
JUMP_43X118
2K_0603_5%
2K_0603_5%
1M_0402_5%~D
5.1K_0805_1%
5.1K_0805_1%
2200P_0402_25V7K~D
4
0.1U_0603_25V7K~D
1
PR136
PR137
PR138
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PR101
PR146
PR147
PC100
PC101
VIN CSIP
2
1
@ PQ103
BAS40CW_SOT323-3
PDTA144EU PNP_SOT323
PC102
PC103
1 2
2
5600P_0402_25V7K~D
0.1U_0603_25V7K~D
3
2
GNDA_24737 GNDA_24737
3.3_1210_5%~D
0.1U_0603_25V7K~D
3
PD100
PR107
PR103
PC104
DMN66D0LDW-7
1
PQ113 @ 47K_0402_1%~D
200K_0402_1%~D
2
1
2N7002-7-F_SOT23-3 2 PR105 PR106 PC108 1 2
PQ109B
PR104
VIN
1
1
2
D 5 0_0402_5%~D 0_0402_5%~D
PC106
0.1U_0603_25V7K~D
2
DDTC115EUA-7-F_SOT323
ACOFF 2 SHORT SHORT
200K_0402_1%~D
1
1
PC105
G
4
1
1
2
1 2 CMPIN_1 PR108
PR102
S
1M_0402_5%~D
3
2
PR110 2 1 @ PR139 3M_0402_5% 10K_0402_1%~D
PR142
DMN66D0LDW-7
2.2U_0805_25V6K
1
6
10_1206_1%
2
1 2 PC109 PR115
PQ109A
PC107
VIN 0.1U_0603_25V7K~D 1 2 PACIN 100K_0402_1%~D
1 1
1
1
2 2 1
PQ105
@ PR140 0_0402_5%~D V1
1
PR111 PC110
316K_0402_1%~D
150K_0402_1%~D PC111 1U_0603_25V6K PR113 PC112
1
2
2
1000P_0402_25V8-J 0_0603_5%~D 0.047U_0603_25V7K~D
20
14
2
3
1 2 PU100 1 2 BST_CHGA 1 2
PR112
2
V1 2 PQ104 2
CMPOUT
ACP
VCC
ACN
GND
2
DDTC115EUA-7-F_SOT323 PR114 GNDA_24737 2
2200P_0402_25V7K~D
DMN66D0LDW-7 2N SOT363-6
49.9K_0402_1%~D PD103 PC113
1
PR131 A+ 1 2 ACSETIN 6 17 BST BAT54HT1G_SOD323-2~D 1U_0603_10V6K~D
ACDET BTST
6
5
6
7
8
1
200K_0402_1%~D 1 2 1 2
PC114
AO4466L_SO8~D
3
3
1 2 CHARGER_LDO
PQ107
PACIN
PQ106A
GNDA_24737 ACOV 5 16 CHARGER_LDO
2
2 DMN66D0LDW-7 2N SOT363-6 ACOK REGN
100K_0402_5%~D
1
1
PACIN PR116 BQ24737RGRR_VQFN20_3P5X3P5~D
1
PC129 100K_0402_5%~D 9 18 DH_CHG 4
1
SCL HIDRV
3
PQ106B
0.1U_0603_25V7K~D
2
PR117
@ PR134 8 19 LX_CHG
2
5 <38> AC_IN 1 2 SDA PHASE
3
2
1
PL100
BATT+
1
0_0402_5%~D 7 15 DL_CHG 4.7UH_ETQP3W4R7WFN_5.5A_20% PR120 0.01_2512_1%
4
IOUT LODRV
1
PR121 PR119 D 1 2CHG 1 4
CMPIN
47K_0402_5%~D 121K_0402_1%~D 2
SRN
SRP
BM#
ILIM
PACIN 1 2 G 21 1 2 2 3
121K_0402_1%~D
4.7_1206_5%~D
PAD
1
S PQ112
2
5
6
7
8
@ PR143 2N7002-7-F_SOT23-3 PR135
PR122
PR123
11
10
12
13
PQ110
0_0402_5%~D 0_0402_5%~D
ACON
AO4712L_SO8~D
ACOV 1 2 GNDA_24737 SHORT
10K_0402_5%~D
DDTC115EUA-7-F_SOT323
@ +3VALW
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2
2
1
1
PR124
0_0402_5%~D
10_0402_1%~D
6.8_0402_1%~D
680P_0402_50V7K~D
2
2
2CMPIN_1
0_0402_5%~D 4
PC117
PC118
PC119
PC120
PR128 0_0402_5%~D
10K_0402_5%~D
1
SHORT
PR125
PR133
PR132
2
1 2 @
PC116
<38,53> EC_SMB_CK1
2
ACOFF 2 PC128 @ @
PQ111
<38> ACOFF
2
2
PR126
1 1
3
2
1
2
0_0402_5%~D .1U_0402_16V7K~D
1
SHORT 1 2 2 1
121K_0402_1%
GNDA_24737
1 2
PR127
<38,53> EC_SMB_DA1
3
3 3
PR129 PC121 @ PC122
PR141
1
1
100_0402_1%~D 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D
1
1 2 CSSP
PR148
<38,53> ADP_I
2
PR130
100K_0402_1% CSSN
2 1 @
2 1
0.1U_0603_25V7K~D
2
PC126
PC123
100P_0402_50V8J~D 2 1
CC = 4.1A
1
GNDA_24737
PC125
H_PROCHOT# <8,38>
0.01U_0402_25V7K GNDA_24737
GNDA_24737 CV = 17.7V
1
<38>
BATT_TURBO_BOOST
@ PC124
1U_0603_25V6K VIN
2
+3VALW
316K_0402_1%~D
@ PC115
2
1000P_0402_25V8J~D
1 2
PR144
A+
1
D
2 @ PR109 @
<38,53> EC_BATT_PRS
1
G 10K_0402_1%~D 1 2 ACSETIN_A
S@
3
PQ142 PR145
1
2N7002_SOT23 0_0402_5%~D
1
D PQ108
4
2 4
G 2N7002-7-F_SOT23-3
S
3
1
@ PC127
1U_0603_25V6K
2

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-Charger
XPS14
A B C D
WWW.AliSaler.Com
A B C D E
WWW.AliSaler.Com
2VREF_8205
1
PC200
1U_0603_16V6K
2
1 1
PC219
100P_0402_50V8J~D
PC218 2 1
@ 0.1U_0402_25V6
1 2
PR200 PR201
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
0_0402_5%
PR202 PR203
B++
20K_0402_1% 20K_0402_1%
B++
2
B+ 1 2 FB_3V FB_5V 1 2
SHORT
@ PJP200
2 1 +3VLP
2 1
ENTRIP2
ENTRIP1
PR216
1
JUMP_43X118 PR204 PR205
2200P_0402_50V7K
4.7U_0805_25V6-K
133K_0402_1%~D 76.8K_0402_1%
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
1 2 1 2
1
1
PC207
PC201
PC202
PC203
PC206
PC204
PQ200
1
AON7408L_DFN8-5 PU200
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC205 PQ201
4 10U_0603_6.3V6M 25 AON7408L_DFN8-5
P PAD
2
7 24 4
2 VOUT2 VOUT1 2
UG_3V
1
2
3
PC208 8 23 PC209
VREG3 PGOOD POK <38,53>
0.22U_0603_10V7K 0.22U_0603_10V7K
2 1 BST1_3V 1 PR206 2 BST_3V 9 22 BST_5V 1 PR207 2 BST1_5V 2 1
3
2
1
BOOT2 BOOT1
2.2_0603_5% 2.2_0603_5%
PL200 10 21 UG_5V PL201
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20% UGATE2 UGATE1 4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
+3VALWP 1 2 LX_3V 11 20 LX_5V 1 2
PHASE2 PHASE1 +5VALWP
1
1
2.2_1206_5%
2.2_1206_5%
12 19 LG_5V
LGATE2 LGATE1
5
PR208
PR209
150U_D2_6.3VM
SKIPSEL
150U_D2_6.3VM
VREG5
SECFB
1
PQ202
GND
1
VIN
PC210
+ AON7702A_DFN8-5
EN
2
2
1
BZT52-B5V6S_SOD323-2
PC211
@ 4 +
4 LG_3V B++ RT8205LZQW(2)_WQFN24_4X4 PC222
1 SNUB_3V
SNUB_5V
13
14
15
16
17
18
2 .1U_0402_16V7K~D
2
2
1
1000P_0603_50V7K~D
3
2
1
1000P_0603_50V7K~D
PD906
@ PC221 PQ203
1
2
3
1
0_0402_5%
.1U_0402_16V7K~D AON7702A_DFN8-5
2
PC212
PR219
VL
1
PC213
@
PR215
2
@ 0_0402_5%
2
2
1
SHORT
PC214
1
4.7U_0805_10V6K
2
1
@ PR210
499K_0402_1%
@ PR211
3 0_0402_5% 2VREF_8205
5VALWP 3
3.3VALWP
2
VCOUT0_PH# 1 2 TDC 4.54A

TDC 7.64A Peak Current 6.49A
B++
1
Peak Current 10.7A

200K_0402_1%
OCP current 7.788A

1U_0603_10V6K
OCP current 12.84A

1
PR212
PC215
TYP MAX
1
TYP MAX H/S Rds(on) :27mohm , 34mohm
2
H/S Rds(on) :27mohm , 34mohm @ @ PC216
2
0.1U_0402_25V6 L/S Rds(on) :11mohm , 14mohm
L/S Rds(on) :11mohm , 14mohm
ENTRIP1
ENTRIP2
6
PQ204A PQ204B
2 N_3_5V_001 5
SSM6N7002FU-2N_SOT363-6 SSM6N7002FU-2N_SOT363-6
1
PJP201 PJP202
1 2 VL 1 2 1 2 +3VALW
+5VALWP +5VALW +3VALWP
2 1 PR214 @ @
<38> USBCHG_DET_D PAD-OPEN 4x4m PAD-OPEN 4x4m
PD907 RB751V40_SC76-2 100K_0402_5%
PR217 PJP203 PJP204
2 1 2 1 1 2 1 2
4 <38> EC_ON 4
PD908 RB751V40_SC76-2
1
1K_0402_5% D PQ205 @ @
1 2 2 PAD-OPEN 4x4m PAD-OPEN 4x4m
<38> VCOUT0_PH#
PD909 RB751V40_SC76-2 G 2N7002-7-F_SOT23-3
S
3
2
@ PC1335
2.2U_0603_10V7K Compal Electronics, Inc.
1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-3VALWP/5VALWP
XPS14
A B
WWW.AliSaler.Com C D
E
Sheet 55 of 65
A B C D
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1
<38> +1.8VS_PWROK 1
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR401/PR404)=0.6*(1+20K/10K)=1.8V
@ PU400 PL400
4
PJP400 1UH_PH041H-1R0MS_3.8A_20%
1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
PG
+3VALW PVIN LX +1.8VS
9 3
22P_0402_50V8J
PVIN LX
1
PAD-OPEN 3x3m
4.7_1206_5%
+1.8VSP
1
PC401
8
SVIN
TDC 1.092A
PR400
PC400 PR401
22U_0805_6.3V6M 6 1.8VSP_FB 20K_0402_1%
2
FB
5 @ Peak Current 1.56A
22U_0805_6.3VAM
22U_0805_6.3VAM
1SNUB_1.8VSP 2
2
EN
1
NC
NC
TP
PC402
PC403
11
2
1 2 EN_1.8VSP
<12,34,38,57,58> SUSP#
1
1
PR402 0_0402_5%
0.1U_0402_10V7K
PC404
SY8033BDBC_DFN10_3X3 PR404
1
@ PR403 10K_0402_1%
680P_0603_50V7K
PC405
47K_0402_5%
2
@
2
2 2
3 3
4 4

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-1.8VSP
WWW.AliSaler.Com
XPS14
A B C D
5 4 3 2 1
WWW.AliSaler.Com @ PJP500
+V1.05S_VCCPP_B+ 2 1 B+
2 1
JUMP_43X118
+3VS
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
1
1
PC501
PC500
PC502
PC503
2
D D
2
5
PR500
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ500
100K_0402_5%
1
4
<59> +V1.05S_VCCP_PWRGOOD
PR501 PC504
PU500 2.2_0603_5% 0.1U_0603_50V7K~D
PR502 1 10 BST_+V1.05S_VCCPP 1 2 1 2
3
2
1
43K_0402_1% PGOOD VBST
1 2 TRIP_+V1.05S_VCCPP 2 9 UG_+V1.05S_VCCPP PL500
TRIP DRVH 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PR503 EN_+V1.05S_VCCPP 3 8 SW _+V1.05S_VCCPP 1 2 +VCCP
0_0402_5% EN SW
1 2 FB_+V1.05S_VCCPP 4 7 +V1.05S_VCCPP_5V +5VALW
<12,34,38,56,58> SUSP# VFB V5IN
RF_+V1.05S_VCCPP 5 6 LG_+V1.05S_VCCPP
TST DRVL
1
1 2
SIR818DP-T1-GE3
11
PQ501
TP PC506 @ PR504
1
TPS51212DSCR_SON10_3X3 1U_0603_6.3V6M 4.7_1206_5%

1
0.1U_0402_10V7K
2
2
@ PC505 PR505 4
0.1U_0402_16V7K
PC509
470K_0402_1%
2
1
@
3
2
1
1
C @ PC508 C
1000P_0402_50V7K
2
2 1 2 1
@ PC510 @ PR506
1000P_0402_50V7K 1.2K_0402_1%
PR508
0_0402_5%
2 1 2 1
VCCIO_SENSE <11>
PR507 SHORT
4.99K_0402_1%
2
PR510
10K_0402_1%~D
1
PR509
0_0402_5%
B 1 2 B
VSSIO_SENSE <11>
SHORT
+V1.05S_VCCPP
TDC 11.9A
Peak Current 17A
OCP current 20.4A
TYP MAX
H/S Rds(on) :10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-V1.05S_VCCPP
XPS14
5 4
Date: Tuesday, February 07, 2012 Sheet
1
57 of 65
5 4 3 2 1
WWW.AliSaler.Com @
PJP300 0.75Volt +/- 5%
VLDOIN_1.5V 2 1 +1.5V TDC 0.7A
PR300
PAD-OPEN1x1m
Peak Current 1A
@ PJP301 2.2_0603_5%~D
B+ 2
2 1
1 1.5V_B+ 1 2 BOOT_1.5V OCP Current 1.2A
JUMP_43X118
DH_1.5V
2200P_0402_50V7K~D
D D
4.7U_0805_25V6K~D
4.7U_0805_25V6K~D
0.1U_0402_25V6K~D
+0.75VSP
2
1
1
PC301 SW _1.5V
PC300
PC302
PC303
PC304
0.22U_0603_10V7K
1
2
1
DL_1.5V
16
17
18
19
20
PQ300
PU300 PC305 PC306
10U_0603_6.3V6M 10U_0603_6.3V6M
VLDOIN
PHASE
UGATE
BOOT
VTT
2
21
PAD
4 15 1
LGATE VTTGND
PR301 14 2
PL300 6.04K_0402_1% PGND VTTSNS
1
2
3
0.56UH_PDME104T-R56MS1R407_30A_20%~D 1 2 CS_1.5V
+1.5V 1 2 13 3
PC307 CS RT8207MZQW _W QFN20_3X3 GND PC309
5
1U_0603_10V6K~D 0.033U_0402_16V7~D
2.2_1206_5%
SIR818DP-T1-GE3
12 4
PQ302
PR302 PR303 VTTREF_1.5V
5.1_0603_5%~D VDDP VTTREF
+5VALW 1 2 VDD_1.5V 11 5 +1.5V

1 SNUB_1.5V 2
VDD VDDQ
PGOOD
1 4
PC310
TON
+ PC308
FB
S5
S3
220U_D2_4VY_R15M~D 1U_0603_10V6K~D PC314
220P_0402_50V7K~D
1000P_0603_50V7K~D
1
2
3
10
6
C 2 +5VALW 1 2 C
PC311
PR304
10K_0402_1%~D
<38> +1.5V_PWROK
2
1.5V_FB 2 1
PR305
1M_0402_1%~D
2
PR306 1.5V_B+ 1 2
1
0_0402_5%~D PR307
1 2 S5_1.5V 9.53K_0402_1%~D PC312
<34,38> SYSON
@ 0.1U_0402_16V7K~D
1.5VP
2
1
S3_1.5V
1
TDC 13.83A PC313
@ 0.1U_0402_16V7K~D
2
Peak Current 19.7A
OCP current 23.6A @ PR308
0_0402_5%~D
TYP MAX <12,34,38,56,57> SUSP#
1 2
H/S Rds(on) :10mohm , 14.5mohm PR323 +1.5V
L/S Rds(on) :3mohm , 3.6mohm 0_0402_5%~D
1 2
<8,12,38> CPU1.5V_S3_GATE
B B
PR118
0_0603_5%~D
1 2 +0.75VS
+0.75VSP
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-1.5VP/0.75VSP
XPS14
5 4
1
58 of 65
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VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.85V
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
1 0 0.775V
VCCSA VID is 00 prior to VCCIO stability. 1 1 0.75V
D D
+3VS output voltage adjustable network for ULV CPU
100K_0402_5%
@ PC619 0.033U_0402_16V7K~D
1
2 1
PR601
2 1
@ PR600 1K_0402_5%
2
<38> SA_PGOOD VCCSA_VID1 <12>
VCCSA_VID0 <12>
PR602 1K_0402_5%
2 1
1U_0603_10V6K
+5VALW
2 1
2
PC620 0.033U_0402_16V7K~D
PC600
PR603 PR604
10_0402_1% 0_0402_5%
1
2 1 +VCCSA_EN 1 2
+V1.05S_VCCP_PWRGOOD <57>
PC601
2.2U_0603_10V7K
1 2
+VCC_SAP
TDC 4.2A
18
17
16
15
14
13
PU600 Peak Current 6A
PR605 PC602
VID1
VID0
PGOOD
EN
V5FILT
V5DRV
2.2_0603_5%~D 0.1U_0603_50V7K~D
12 +VCCSA_BT 1 2+VCCSA_BT_1 1 2
19 BST PL600
PGND 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
C 11 +VCCSA_PHASE 1 2 +VCCSA C
20 SW
PGND
10
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
0.1U_0402_10V7K
2200P_0402_50V7K
1
21 SW
2.2_1206_5%
PGND
2
PR606
PC607
PC608
PC610
PC611
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
TPS51463RGER_QFN24_4X4 9
PC612
PC613
PC614
PC615
PC604
PC605
PC606
PC609
0.1U_0402_25V6
22 SW
1
1
1000P_0603_50V7K~D
2
VIN
1 2
8 @ @
PAD-OPEN 43X118 23 SW
PC603
1
@ PJP600 2 VIN
7
2
2 1 +VCCSA_PWR_SRC +VCCSA_PWR_SRC 24 SW
+3VALW VIN
25
COMP
MODE
TP
SLEW
VOUT
VREF
GND
1
6
PR607
2 1
33K_0402_5%
PR608
100_0402_1%
PC616 2 1
2 1
0.22U_0402_10V6K
2 1 2 1
2 1
VCCSA_SENSE <12>
PC617 PR609 2
3300P_0402_50V7K 5.1K_0402_5% PR610 SHORT
PC618 0_0402_5%~D
0.01U_0402_25V7K
1
B B
A A

Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT PWR-VCC_SAP
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
XPS14
5 4
WWW.AliSaler.Com 3
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
1
Sheet 59 of 65
5 4 3 2 1
PC700 330P_0402_50V7K~D PR700
WWW.AliSaler.Com
2
PR701
1
3.83K_0402_1%~D
2 1
PH700
NTCG
Local sense put on HW site
2 1 1
PR702
2 2K_0402_1%~D
2.49K_0402_1%~D PR703
PC701
150P_0402_50V8J~D GFX_B+
@ PL700
HCB4532KF-800T90_1812~D
1 2 B+
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
470K_0402_5%_ERTJ0EV474J~D 1 2 2 1 2 1
PC748
PC747
PC704
PC705
PC709
267K_0402_1%~D @ PJP700
330P_0402_50V7K~D
1 2 @ PC702 2 1
2 1
1
PR704 1 2
<12> VCC_AXG_SENSE PC708
27.4K_0402_1%~D @ PR705 PC703 JUMP_43X118
5
330P_0402_50V7K~D 2 1 2 1 1 2
2
PQ700
PC707
PC706 499_0402_1%~D
2 1 390P_0402_50V7K~D 47P_0402_50V8J~D
2
<12> VSS_AXG_SENSE
0.01U_0402_16V7K~D
VSUMG+ UGATE1G 4
2
D D
PR706
2.61K_0402_1%~D
PL701
3
2
1
0.22U_0402_16V7K~D
0.022U_0402_25V7K~D
0.36UH_PDME104T-R36MS0R825_37A_20%~D
1
11K_0402_1%~D
PR707 @ PHASE1G 4 1
2
100_0402_1%~D +VCC_GFXCORE_AXG
1
PR709
PC710
PC711
2 1 PR708 PC713 3 2
1
4.7_1206_5%~D
SIR818DP-T1-GE3
SIR818DP-T1-GE3
150K_0402_1%~D 0.22U_0603_10V7K
1
PQ701
PQ702
@ BOOT1G 1 2 2 1
1
PR711
PH701 PC712
1
2
10K_0402_5%_ERTJ0ER103J 470P_0402_50V7K~D PR710
1
2.2_0603_5%~D PR714 PR715
1 2
VSUMG- 1 2 LGATE1G 4 4 3.65K_0603_1% 1_0402_5%
680P_0402_50V7K~D
@ PR716
2
PC714 PR712 0_0402_5%
1
1
.1U_0402_16V7K~D 332_0402_1% PWMG2 2 1 +5VS
2
PC715
3
2
1
3
2
1
+VCCP VSUMG+
2
UGATE1G
PHASE1G
LGATE1G
BOOT1G
VSUMG-
130_0402_1%~D
54.9_0402_1%~D
1
1
PR717
PR719
40
39
38
37
36
35
34
33
32
31
PU700
2
VAXG_core
ISUMNG
RTNG
FBG
COMPG
PGOODG
PWM2G
LGATE1G
PHASE1G
UGATE1G
BOOT1G
PR720
PR721
0_0402_5%~D
+5VS TDC 21.5A
<11> VR_SVID_CLK
0_0402_5%~D 1
ISUMPG BOOT2
30 SHORT Peak Current 29A
SHORT 2 29 2 1
C
<11> VR_SVID_ALRT#
+5VS 1 2 ISEN2G 3 ISEN1G
ISEN2G
UGATE2
PHASE2
28 OCP current 39.6A C
NTCG 4 27
5 NTCG LGATE2 26 1 2 Load line -3.9mV/A
<11> VR_SVID_DAT 6 SCLK VCCP 25
7 ALERT# VDD 24 PWM3 PR722
FSW=300kHz
SDA PWM3
<38> VR_HOT#
8
VR_HOT# LGATE1
23 LGATE1 0_0603_5%~D CHOCK DCR 0.82mohm +/- 5%
1 PR723 2 9 22 PHASE1 SHORT
<38> VR_ON NTC 10 VR_ON PHASE1 21 UGATE1 PR729
NTC UGATE1
ISEN3/FB2
0_0402_5%~D 1_0603_5%
TYP MAX
1
2 1
PGOOD
BOOT1
+5VS
ISUMN
ISUMP
COMP
ISEN2
ISEN1
@ PR725 PC717
RTN
1 2 41 2 1
FB
+VCCP +5VALW
2
TP
1U_0603_10V6K~D
1U_0603_10V6K~D
499_0402_1%~D 43P_0603_50V8J
@ PR724
11
12
13
14
15
16
17
18
19
20
PC718
PC719
ISL95836HRTZ-T_TQFN40_5X5~D 1_0603_5%
1
BOOT1
PR726
VCC_core
2
1 2 1 2 TDC 16A
ISEN2
PH702
3.83K_0402_1%~D
470K_0402_5%_ERTJ0EV474J~D
VGATE <8,18,38> Peak Current 33A
PR728
2 1 1 2 +3VS OCP current 39.6A
PR727 1.91K_0402_1%~D
27.4K_0402_1%~D Load line -2.9mV/A
COMP FSW=300kHz
FB @ PL702
HCB4532KF-800T90_1812~D
CPU_Vcore: CHOCK DCR 0.82mohm +/-5%
PR736 CPU_B+ 1 2 B+
0_0402_5%
+5VS 1 2 TYP MAX
@ PJP701
B PC728 PC729 2 1 H/S Rds(on) :10mohm , 14.5mohm B
2 1
2
PR733
1
470P_0402_50V7K~D
2 1
47P_0402_50V7K~D
2 1 1 2 JUMP_43X118
499_0402_1%~D
PR738 PR734
PR737 267K_0402_1%~D 42.2K_0402_1%~D
1 2 2 1 2 1
Change Ecology A2a
1.91K_0402_1%~D PC730
150P_0402_50V8J~D CPU_B+
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
PC733
33U_25V_M
PC750
PC749
PC734
PC735
PC736
1
PQ706
PQ703
1 2 1 2
PC724
+
PR740
2K_0402_1%~D 680P_0402_50V7K~D
2
UGATE1 4 4 2
VCCSENSE <11>
PC737 @ @ PL704
3
2
1
3
2
1
330P_0402_50V7K~D
330P_0402_50V7K~D 0.36UH_PDME104T-R36MS0R825_37A_20%~D
1 2 PHASE1 4 1 +VCC_CORE
@
2
4.7_1206_5%~D
VSUM+ PC738 PC740 3 2
1
2.61K_0402_1%~D
PC739
SIR818DP-T1-GE3
SIR818DP-T1-GE3
0.01U_0402_16V7K~D 0.22U_0603_10V7K
1
PQ707
PQ708
PR743
10K_0402_5%_ERTJ0ER103J
1 2 BOOT1 1 2 2 1
1
1
PR741
0.1U_0402_25V7K~D
PR742
11K_0402_1%~D
680P_0402_50V7K~D
VSSSENSE <11>
0.033U_0402_16V7
2.2_0603_5%~D PR747 PR749
1 2
1
0.1U_0402_25V6
LGATE1 4 4 3.65K_0603_1%~D 1_0402_5%~D

2 2
1
PH703
PR744
2
PC741
PC742
PC743
PC744
Local sense put on HW site
2
2
2
3
2
1
3
2
1
A A
VSUM+
1
VSUM-
VSUM- 1 2
PR748
340_0402_1%
1
.1U_0402_16V7K~D

PC745
@
PC746 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
@ PR750
2
1 2 1 2 TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-CPU_CORE
649_0402_1%~D 2200P_0402_25V7K~D NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
WWW.AliSaler.Com
0.1
XPS14
5 4 3 2 1
8 7 6 5 4 3 2 1
WWW.AliSaler.Com
+3V_GPU
+VGA_B+
@ PJP800
2 1
2 1 B+
GPU_VID_0 1 2 @ PR800 2.2K_0402_5%
1 2 DIS@ PR801 2.2K_0402_5% JUMP_43X118
0.1U_0402_25V6
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
GPU_VID_1 1 2 DIS@ PR802 2.2K_0402_5%
PC832
PC831
PC800
PC801
PC802
H H
1 2 @ PR805 2.2K_0402_5%
1
GPU_VID_2 1 2 @ PR804 2.2K_0402_5%
1 2 DIS@ PR803 2.2K_0402_5%
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
5
GPU_VID_3 1 2 @ PR807 2.2K_0402_5%
1 2 DIS@ PR808 2.2K_0402_5%
PQ800
2
DIS@ PR806
1K_0402_5% DIS@ PR810 GPU_VID_4 1 2 DIS@ PR811 2.2K_0402_5%
2 1 0_0402_5% 1 2 @ PR812 2.2K_0402_5%
<19,33> DGPU_PWR_EN 4
DIS@ PC803 GPU_VID_5 1 2 DIS@ PR814 2.2K_0402_5%
1
0.1U_0402_25V6 1 2 @ PR813 2.2K_0402_5%
<24> H_DPRSLPVR 1 2 DIS@ PR816 DIS@ PC804
H_DPRSLPVR 1 2 @ PR815 2.2K_0402_5% 2.2_0603_5%~D 0.22U_0603_10V7K Change Ecology A2a
3
2
1
BOOT2_VGA 1 2 BOOT2_2_VGA 1 2
DIS@ PR818 PSI# 1 2 @ PR817 2.2K_0402_5% UGATE2_VGA DIS@ PL800

G 2.2K_0402_5% 0.22UH_FDUE0640J-H-R22M-P3_25A_20%~D G
1 2 H_DPRSLPVR PHASE2_VGA 2 1
+GPU_CORE
2
GPU_VID_5 <24> DIS@ DIS@
5
+3VS PR859 PR809
SIR818DP-T1-GE3
SIR818DP-T1-GE3
0_0402_5% 0_0402_5%
PQ802
PQ801
1
@ PR819 GPU_VID_4 <24> DIS@
DIS@ PR820
2.2_1206_5%
1
330U_D2_2V_Y
1.91K_0402_1% DIS@
1
1 2 CLK_ENABLE# V2P_VGA V2N_VGA +
DIS@ PC805
GPU_VID_3 <24> LGATE2_VGA 4 4
3.65K_0603_1%~D
1
2
PR821
PR822
10K_0603_1%~D
2
1000P_0603_50V7K~D
@ PR825 2
1.91K_0402_1% GPU_VID_2 <24>
1
DIS@ PR826
PC806
3
2
1
3
2
1
1
0_0402_5% DIS@
DIS@
DIS@
2
1
1 2 GPU_VID_1 <24> @ PR824 PR823
2
<19,20> DGPU_PWROK 10K_0402_1%~D 1_0402_5%
DIS@ PR827 1 2 V1N_VGA
DIS@
2.2K_0402_5% GPU_VID_0 <24>
2
F 1 2 PSI# F
GPU_VID_6
GPU_VID_5
GPU_VID_4
GPU_VID_3
GPU_VID_2
GPU_VID_1
GPU_VID_0
VSUM-_VGA
+3VS
VSUM+_VGA
ISEN2_VGA
DIS@ PR828
47K_0402_1%~D
1 2
DIS@ PR829
2.2K_0402_5%
1 2 DIS@ PC807
+3VS
DIS@ 1U_0603_10V6K
40
39
38
37
36
35
34
33
32
31
PU800 1 2
CLK_EN#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
DPRSLPVR
VR_ON
<38> GPU_VR_HOT#
30
@ PR831 BOOT2 29
27.4K_0402_1% 1 UGATE2 28
@ 2 1 2 PGOOD PHASE2 27
PR833 3 PSI# VSSP2 26
4.02K_0402_1%~D 4 RBIAS LGATE2 25 1 2
N13P-GV
VR_TT# VCCP +5VS
E
1 2 2 1 5
6 NTC PWM3
24
23
1 2
PR832
TDC 42A E
@ PH800 7 VW LGATE1 22 PR834 0_0402_5%~D Peak Current 54A

470K_0402_5%_ERTJ0EV474J~D 8 COMP VSSP1 21 0_0402_5%~D SHORT
1 2 9 FB PHASE1 SHORT OCP current 85A
ISEN3
UGATE1
10
FSW=400kHz
BOOT1
ISUM+
ISEN2
1
ISEN1
ISUM-
VSEN
IMON
DIS@ PC808 PC810 DIS@

8.06K_0402_1%
1000P_0402_50V7K
VDD
RTN
VIN
22P_0402_50V8J 41 1U_0603_10V6K CHOCK DCR 0.89mohm +/- 7%

PR836
249K_0402_1%
AGND
2
DIS@ PC809
2
PR835
11
12
13
14
15
16
17
18
19
20
DIS@ PR837
TYP MAX
2
562_0402_1% DIS@ PC811 ISL62883CHRTZ-T_TQFN40_5X5

DIS@
@ 1 2 1 2
1
DIS@ PC812 DIS@ PR839

390P_0402_50V7K PR838
0_0402_5%~D SHORT
33P_0402_50V8J~D 3.57K_0402_1%~D 1 2 +5VS
1 2 1 2
D D
ISEN2_VGA
1 2 1 2 1 2 +VGA_B+
ISEN1_VGA DIS@ PR841
0.22U_0402_16V7K~D
0.22U_0402_16V7K~D
DIS@ PC813 DIS@ PR840 0_0402_5% +VGA_B+

1
150P_0402_50V8J 412K_0402_1% 1 2
+5VS
1
@ PR842 DIS@ PR843

PC814
PC815
PC816
249K_0402_1%~D 1_0402_5%
1U_0603_10V6K
1
DIS@
2
BOOT1_VGA
PC820
0.1U_0402_25V6
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
4.7U_0805_25V6-K
2
5
DIS@ PC817
PC833
PC834
PC818
PC819
DIS@
DIS@
DIS@
2
0.22U_0603_25V7K
1
PQ803
VSUM-_VGA
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
UGATE1_VGA 4
+GPU_CORE 1 2
DIS@ PR847 DIS@ PC821
C @ PR844 2.2_0603_5%~D 0.22U_0603_10V7K C
3
2
1
100_0402_5% 1 2 BOOT1_1_VGA 1 2
VSUM+_VGA DIS@ PL801

1 2 0.22UH_FDUE0640J-H-R22M-P3_25A_20%~D
<26> GPU_VDD_SENSE
PHASE1_VGA 2 1
82.5_0402_5%
+GPU_CORE
1
PR848
2.61K_0402_1%
1
2
0_0402_5%~D DIS@ DIS@
PR845
PR846
5
SHORT DIS@ PC822 PR858 PR830
SIR818DP-T1-GE3
SIR818DP-T1-GE3
330P_0402_50V7K 0_0402_5% 0_0402_5%
PQ804
PQ805
0.1U_0402_25V6
0.1U_0402_25V6
2
@ DIS@ DIS@
PC824
PC825
1 1
330U_D2_2V_Y
330U_D2_2V_Y
2
1
DIS@ PR851
PC826
PC827
DIS@
2.2_1206_5%
2
1
1
V1P_VGA V1N_VGA + +
LGATE1_VGA 4 4
0.01U_0402_25V7K
DIS@
DIS@
2
2
1
2
PR855 DIS@ PC828 2 2
PC823
PR850
PR852
1_0402_5%
11K_0402_1%
10K_0603_1%~D
3.65K_0603_1%~D
2
1000P_0603_50V7K~D
1
1
0_0402_5%~D 1000P_0402_50V7K DIS@ PH801
DIS@ PR853
PR849
DIS@
DIS@
SHORT 10K_0402_1%_TSM0A103F34D1RZ
2
3
2
1
3
2
1
1
1 2
PC829
<27> GPU_VSS_SENSE
2
B @ B
DIS@
DIS@
2
1
DIS@
2
2 VSUM-_VGA
1 2 V2N_VGA
DIS@
VSUM+_VGA
1 2 1 2 VSUM-_VGA
ISEN1_VGA
@ PR854
@ PR856 DIS@ PR857 10K_0402_1%~D
100_0402_5% 1.65K_0402_1%~D Layout Note:
Place near Phase1 Choke
1
DIS@ PC830
0.1U_0402_16V7K
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-VGA_CORE
XPS14
8 7 6
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1
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+VCC_CORE +VCC_GFXCORE_AXG +VCCP
+VCCP
+VCC_CORE +VCCP
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1242
PC1243
PC1244
PC1245
PC1246
PC1248
PC1249
PC1250
PC1251
PC1252
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
+VCC_GFXCORE_AXG
PC1247
2
2
@ @
1
1
D D
PC1219 PC1220 PC1221 PC1222 PC1223 PC1259
2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D 2.2U_0402_6.3V6M~D
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1
22U_0805_6.3V6M
22U_0805_6.3V6M
PC1224
PC1225
PC1226
PC1227
PC1234
PC1235
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1265
PC1266
PC1267
PC1268
PC1269
PC1270
PC1271
PC1272
PC1273
PC1274
PC1275
2 2 2 2 2 2
2
@ @
1
1
PC1228 PC1229 PC1230 PC1231 PC1232 PC1233
2
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1288
PC1289
PC1290
PC1291
1
1
PC1253
PC1254
PC1255
PC1256
PC1257
PC1258
2
1
1
@
2
PC1236 PC1237 PC1238 PC1239 PC1240 PC1241
2
2
+VCC_CORE
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1
1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
PC1303
PC1304
PC1305
PC1306
PC1307
PC1308
PC1309
PC1310
PC1311
PC1312
1
1
PC1281
PC1276
PC1287
PC1278
PC1285
PC1279
2
C 1 1 1 1 1 C
@ @
2
PC1315 PC1316 PC1317 PC1318 PC1319
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM
2 2 2 2 2
330U_X_2VM_R6M
330U_X_2VM_R6M
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1
1
PC1300
PC1292
PC1294
PC1301
PC1297
1 1
1 1 1 1 1
PC1320
PC1321
+ +
2
PC1322 PC1323 PC1324 PC1325 PC1326 Charlie note:
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM +1.05V_RUN_VTT_1
2 2 2 2 2 3.1uF*26 (SE000000K8L) 2 2
4.10uF*10 (SE000005T8L)
+1.05V_RUN_VTT_2
5.330uF 6m *2 (SGA00001Q80)
1 1
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
+ +
PC1313
PC1314
1 1 1 1
PC1327 PC1328 PC1329 PC1330 Charlie note:
22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 22U_0805_6.3VAM 2 2 iGfx_Cout1
2 2 2 2 1.22uF*6 (SE000000I10)
2.10uF*6 (SE000005T8L)
3.1uF*11 (SE000000K8L)
iGfx_Cout2
1.330uF 9m *2 (SGA20331E10)
B B
+VCC_CORE
+VCC_CORE
1 1
330U_D2_2VM_R6M
1
330U_D2_2VM_R6M
470U_D2_2VM_R4.5M
+ + +
PC1332
PC1333
PC1334
2 2 2
Charlie note: Vcore_Cout1
1.2.2uF*16 (SE00000888L)
2.22uF*12 (SE000008L80)
Vcore_Cout2
1.330uF 9m *3 (SGA20331E10)
A A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL PROCESSOR DECOUPLING
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. XPS14
5 4
1
62 of 65
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+GPU_CORE (place under GPU) +GPU_CORE +GPU_CORE (place near GPU) +GPU_CORE
D +GPU_CORE +GPU_CORE D
DIS@ PC1176
DIS@ PC1177
DIS@ PC1178
DIS@ PC1179
DIS@ PC1180
DIS@ PC1181
DIS@ PC1182
DIS@ PC1183
DIS@ PC1184
DIS@ PC1185
DIS@ PC1212
DIS@ PC1213
DIS@ PC1214
DIS@ PC1215
DIS@ PC1216
DIS@ PC1217
DIS@ PC1218
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
47U_0805_6.3V6M~D
22U_0805_6.3V6M
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1
1
2
2
DIS@ PC1196
DIS@ PC1199
DIS@ PC1198
DIS@ PC1197
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
1 1 1 1
2 2 2 2
C C
B B
A A

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL GPU DECOUPLING
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. XPS14
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WWW.AliSaler.Com Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
X XX XXX XX'XX/XX Compal_XX XXXXX Change PRXX from Xohm to XXKohm. X01
D D
C C
B B
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PWR-PIR
XPS14
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Item Page
Model Date ECN Number Item Id Rev. Issue Description Solution Description
1 38 01/12 1.0 PCB REV change to 1.0 Change RE77 to 56K
QLM00
2 24 01/12 1.0 Change EC_SMB_CK2_PX/EC_SMB_DA2_PX pull up resistor as design guide Change RV2420,RV2421 to 2.2K
3 39 01/12 1.0 Adjust CAPS_LED brightness Change RE84 to 470ohm
4 45 01/12 1.0 Sync up with XPS 15" for pull up power rail RI38 pull up from +5VALW to +3VALW
D D
5 17,24,35 01/12 1.0 Solve adaptor detect issue Depop QH3; change GPU SMBus/Ambient Light Sensor connect to
PCH_SMLDATA and PCH_SMLCLK
6 45 01/12 1.0 Purchase recommand Change UI3 to high active parts
7 40 01/12 1.0 BOM structure control ADD TPM@ for TPM circuit
8 38 01/12 1.0 For USBCHG_DET_D can't turn on 3V/5V issue Change RE78 pull up to +3VLP
9 45 01/12 1.0 Vendor recommand UI2 EN pin pull up resistor RI38 change to 10K
Change JLVDS connector PN to SP01001BT00, footprint to
10 35 01/12 1.0 Change JLVDS connector PN and footprint as assembly issue ACES_59003-04006-001_40P
11 39 01/12 1.0 ME change SW1 PN change to SN100005100
12 33 01/16 1.0 Solve 1.5V voltage drop issue Change QV2803 to SB00000SJ0L to lower Rds on
C C
13 01/16 1.0 Remove 0 ohm to short pad for MP RI22,RI23,RI24,RI25,RI17,RI3,RI4,RI5,RI7,RN29,RM10,RM25,RL25,RL6,R34,RE83,
RE10,RE34,RE35,RE39, RE68,RE70,RE71,RE60,RE62,RE63,RE64,RV449,
RV3519,RV3517,RI6,RI8,RV3525,RH199,RH105,RH106,RH108,RH110,RH112,RH101,
RH103,RH107,RH44,RU125,RU122,RU123,RU116,RU131,RU75,RU62
14 10 01/17 1.0 Change setting for Ivy Bridge support 1x16 PCI Epress and Sandy Bridge Depop RU85
only UMA Config
15 49 01/17 1.0 ME requirement for LED brightness tunning R9 Change to 220ohm for Power LED(White)
16 39 01/18 1.0 EMI requirement Add DE7 on TP SMBus
17 38,35,39 01/19 1.0 Thailand flood disaster, original material shortage Change DE1,DE2,DE3,DE6 PN to SCS00002G00;
QE5,QE6,QV3508,QZ10,QZ13,QZ15 to SB00000M700; DV9 to SCS00002G00
18 35 01/19 1.0 JLVDS pin define change for opertion risk JLVDS Pin38 NC and up shift to Pin33
19 33 01/20 1.0 Change HF part Change RZ10,RZ11,RZ40,RZ41 PN to SD028220A8L
20 48 01/20 1.0 Manufacture highlight change Change JSATA footprint to ACES_50463-0104A-001_10P-T

B B
17,19,40 01/20 1.0 EMI requirement Populate PCI CLK reserved parts RH65,CH26,CH31,R2,C8
21
36 01/20 1.0 EMI requirement for LVDS Change LV7,LV8,LV9,LV10 to SM070002S00
22
23 39 01/30 1.0 Change HF part Change F1 to SP040003200
24 48,53 01/30 1.0 Solve audio power consumption issue Change PQ903 PN to SB93457001L, JSATA pin8 B+ change to +VSBP
25 17,38 01/30 1.0 EMI requirement Populate CH98,CE11,RE13
26 14 02/01 1.0 1.5V power rail reach up to 1.614V, change for derating concern CD7 capacitor change from 2V to 2.5V
27 15 02/02 1.0 EMI requirement Add RV3529,RV3530,CV3528,CV3529
Change CA59 to SE076104K80; CE17 to SE064475KL0;CN2,CH11,CN19,CM25,CM26,
28 02/02 1.0 Customer concern Y5V MLCC performance CM29,CU33,CU34,CU35,CU36,CU97,CU155 to SE076104K80; CM24,CU39 change to
SE076473K80; CN7,CZ11,CV3508 change to SE064106M8L
29
30
31
A A
32

Change List
0.3
LA-7841P
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Dell laptop schematic overview

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A B C D E

Ivy Bridge ULV(BGA1023) + Panther Point

TPM DIS/ TCM DIS 2@ 3@

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.AliSaler.Com CPU ITP FFS

System Single Channel DDRIII-DIMM x 1 1

+1.5V / Processor 1.5V DDR3 1333 MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7

Socket Port 4 RJ45 P.16 ~ 23

Int.KBD Touch Pad

Security Classification Compal Secret Data Compal Electronics,Inc.

INDICATOR/B 10 pin HDD

FRONT LIGHT L/B FRONT LIGHT R/B

Security Classification Compal Secret Data Compal Electronics, Inc.

CLKOUT DESTINATION 13 None

SATA2 ODD Lane 3 MINI CARD-1 WLAN

EC_SMB_DA2 +3VS +3VS

Security Classification Compal Secret Data Compal Electronics, Inc.

APWROK 11 PCH_APWROK +3VS

PWROK 17 PCH_PWROK SI4800BDY

Security Classification Compal Secret Data Compal Electronics, Inc.

eDP_COMPIO and ICOMPO signals G17 PEG_HTX_GRX_P8 CU24 1 2 @ 0.22U_0402_16V7K~D PEG_HTX_C_GRX_P8

Typ- suggest 220nF. The change in AC capacitor

R_COMP place close to CPU

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.AliSaler.Com CLK_CPU_DPLL# RU25 1 2 1K_0402_5%~D

CLK_CPU_DPLL RU24 1 2 1K_0402_5%~D

J3 close to CPU within 0.5"

XDP_TDI_R RU23 1 2 51_0402_5%

RU32 N53 XDP_PRDY#

1 2 H_PROCHOT#_R PRDY# N55 XDP_PREQ# XDP_TCK RU28 1 2 51_0402_5%

JTAG & BPM

H_CPUPWRGD B46 +3VS

B 0.1U_0402_16V4Z~D PLT_RST# RU12 2 @ 1 1K_0402_5%~D XDP_RST#_R 17 B

U3 RU47 The resistor for HOOK2 XDP_TRST# 21

1 43_0402_1% RU14 2 @ 1 0_0402_5%~D XDP_TDI 22 21

small on CFG0 net. 25 27

close to SO-DIMM +1.5V

200 & 130 ohm RU74 QU3

.1U_0402_16V7K 4.99K_0402_1%~D BSS138-G_SOT23-3

1 SHORT 2 1 RU43 1 SHORT 2 DRAMRST_CNTRL

<12,38,58> CPU1.5V_S3_GATE B <14,17> DRAMRST_CNTRL_PCH

WWW.AliSaler.Com U2C U2D

<14> DDR_A_D[0..63] DDR_A_D0 AG6 AL4

DDR SYSTEM MEMORY B

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CFG Straps for Processor

connection to other BB19 RSVD11 DC_TEST_A59 C59

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PEG IO AND DDR IO

N34 VCC[74] VCCPQE[1] AN22 +VCCP

A44 H_CPU_SVIDALRT# RU94 1 2 43_0402_1%

RU100 1 2 10_0402_1%~D RU102

VSS_SENSE_VCCIO VSSIO_SENSE <57>

0_0805_5%~D 1.5A 100K_0402_5%~D

BC4 100K_0402_5%~D RUN_ON_CPU1.5VS3

P20 U10 .1U_0402_16V7K

V18 D49 VID[0] VID[1] 2011 2012

Intel PDDG rev0.8 : 1 1 1 1 1

330uF x 1 - Bottom CPU edge IVY-BRIDGE_BGA1023~D

Security Classification Compal Secret Data

3 VREF_DQ VSS 4 DDR_A_D4

+V_DDR_REFA +V_DDR_REFA_M3 <10> VSS DQ28