Samsung r700 Schematic Diagram

4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY. Table of Contents
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
Sheet 1 Cover
D Sheet 2 Diagram (Block/Power) & Annotations D
Sheet 8 Clock Generator
Sheet 9 Thermal Sensor & FAN
Sheet 10-12 Merom-4M CPU
Sheet 13-17 Crestline-GMCH
Sheet 18 DDR2 SODIMM A
GENEVA Sheet 19
Sheet 20-23
DDR2 SODIMM B
ICH8-M
g
Sheet 24 ICH8-M STRAP
Sheet 25-28 NIVIDIA NB8P
n
Sheet 29 NIVIDIA NB8P STRAP
l
Sheet 30 Video Memory Channel A
CPU : MEROM
u
Sheet 31 Video Memory Channel B
Sheet 32 LCD and Camera Connector
a
Chip Set : SANTAROSA CHIPSET Sheet 33 CRT PORT
s i
C C
Sheet 34 SIO CHIP and Connector
t
Remarks : Mobility Platform Sheet 35 7 IN 1 Card Reader
Sheet 36 MINI CARD AND ROBSON DVB-T
m n
Sheet 37 Express card
Sheet 38 AUDIO - ALC262
a e
Sheet 39 AUDIO - AMP
Model Name : GENEVA Sheet 40 AUDIO - HEADPHONE & MIC JACK
S fid
Sheet 41 AUDIO - POWER
PBA Name : MAIN Sheet 42-43 LAN AND CONNECTOR
Sheet 44-45 MICOM AND MICOM POWER LOGIC
PCB Code : BA41-XXXXX Sheet 46 POWER - SWITCH POWER
Sheet 47 POWER - VCCP P1.25V and P1.2V
Dev. Step : PV2
n
Sheet 48 POWER - DDR2 POWER
B B
Sheet 49 POWER - CHARGE & POWER MANAGEMENT
Revision : 1.0
o
Sheet 50 POWER - P3.3V_ALW & P5V_AUX
Sheet 51 POWER - CPU VRM
T.R. Date : Sheet 52 POWER - GFX CORE P1.5V
C
Sheet 53 HDD & ODD Connector
Sheet 54 USB/MDC/BLUETOOTH/TOUCHPAD
Sheet 55 KBD/LID SWITCH/80H/ICT/LED IF/USB /IF
DRAW CHECK APPROVAL Sheet 56 OTHERS
Sheet 57 TOUCHPAD AND LED B’D
Sheet 58 SIO AND USB B’D
Sheet 59 TEST POINT
Sheet 60 TEST POINT
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MILAN
APPROVAL REV PART NO.
KEVIN LEE 1.0 COVER BA41-XXXXX

MODULE CODE LAST EDIT
October 23, 2007 10:38:02 AM PAGE 1 OF 58

4 3 2 1
COM-22C-015(1996.6.5) REV. 3 D:/tingting/geneva/Geneva_pr_1023
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY.
FAN CPU Smart IGFX / EGFX

Charging
Clocking Mobile Processor DC/DC Battery DC/DC
PG 9 Circuit Module CORE
CK-505 IMVP-6
D Merom-4M D
PG 8 CPU PG 51 PG 49 PG 49 46 PG 52
Thermistor (800MHz)
(TBD) 478pin
PG 9
ON BOARD
PG 10,11,12 L2 Cache : 4 MB
PG 71 HDMI FSB
Termination VCCP / DC-DC
PG 18,19
800 MT/S PG 47
Channel A (Standard) DDR II 667/533,400 DDR II PG 18
g
GMCH-M Dual channel
SODIMM 0
DDR II Power
NVIDIA
Crestline-GM DDR II PG 19 PG 48
n
Channel B (Reverse) DDR II 667/533,400
NB8P / M (TBD) SODIMM 1
PG 32 LCD 30PIN
LCD/CRT/TV
l
1299 FCBGA
u
PG 25-29 PG 13 - 17
a
PG 33 CRT
s i
C Direct Media Interface CLINK C
x4, 1.5V
t
PG 54 USB 0,1,2,3 USB 0,1,2,3
PG 37
52P
m n
Lane 0 MINI CARD
ANT PCIE x1
PG 55 Bluetooth USB 5 ROBSON Marvell
SVHS / RCA
a e
Component DVB-T OPTION 8E8055(GLAN)
ICH8-M PG 42 RJ45 PG 43
GLCI (Lane5) 82566Mx (Nineveh) OPTION
S fid
HDAUDIO
High Definition Audio 676 BGA
LCI 82562V
ANT
Aud. Audio HD Primary
PCIE x1 Lane 1 52P
AMP
ALC262 12P PG 20 - 24 USB 4 Mini Card Kedron
CLINK
MDC HD Secondary
PG 39 PG 38
n
RJ11
PG 37
Modem
PG 43
B B
PG 40 PG 54
o
SPI
HEADPHONE SPI ROM
PG 22
MIC-IN
LPC
2P 2P PG 53 SATA HDD
C SATA 0
PATA
80 Port
MIO_BUTTON
Pri. IDE slave
SPKR R PG 55 Touch
MICOM PAD PG 55
3.3V LPC, 33MHz
HD64F2169/2160
PG 51 TMKBC (TBD) KBD PG 55
SPKR L
PG 53
CD-ROM
A CD / DVD A
DRAW DATE TITLE
FIR(CIR) LED PG 45
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
PG 54 WUSHIJIANG PV2
KEVIN LEE 1.0 BLOCK DIAGRAM BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
BOARD INFORMATION
D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices
Crystal / Oscillator
Devices IDSEL# REQ/GNT# Interrupts
TYPE FREQUENCY DEVICE USAGE
Cardbus AD25 3 B,C,D
Crystal 32.768KHz ICH8-M Real Time Clock
DT PCI SLOT AD22 1 B,C,D,C Crystal 10MHz MICOM HD64F2169/2160
MiniPCI SLOT AD23 2 A,B Crystal 14.318MHz CLOCK-Generator CK-505
g
USB AD29(internal) - USB2.0 #0 (USB0) : A Crystal 24.576MHz Cardbus Controller 1394
USB2.0 #1 (USB1) : D Crystal 25MHz LAN Intel LAN
USB2.0 #2 (USB4) : C Crystal 27MHz (TBD) VIDEO PEG
USB2.0 #3 (USB5) : E 24.576MHz (TBD) HD Audio Audio
Crystal
USB2.0 #4 (EHCI) : H
n
Hub to PCI AD30(internal) - -
LPC bridge/IDE/AC97/SMBUS AD31(internal) - B
l
Internal MAC AD24(internal) - E
u
AC Link - - B
GLAN - - F
LCD Pannel Detect (TBD)
s i a
C Devices Resolution PANNEL_DETECT_0 C
Voltage Rails
VDC
VCC_CORE
Primary DC system power supply (7 to 21V)
Core Voltage for CPU
m n t 2
I C / SMB Address
a e
MCH_CORE Core Voltage for CPU Devices Address Hex Bus
ICH_CORE Core Voltage for CPU
P1.05V (VCCP) VTT for CPU, Crestline & ICH8-M
ICH8-m Master - SMBUS Master
P1.05V_M 1.05V switched power rail for ME (on in M0/M1) CPU Thermal Sensor 1001 110x 9Ch Thermal Sensor
S fid
P1.25V_M 1.25V switched power rail for ME (on in M0/M1) SODIMM0 1010 000x A0h -
P3.3V_M 3.3V switched power rail for ME (on in M0/M1) SODIMM1 1010 010x A4h -
P3.3V_A 3.3V always power rail (by KBC3_ALWS_ON) Thermal Sensor on SODIMM0 0011 000x 30h -
MICOM_P3V 3.3V always power rail (for Micom) Thermal Sensor on SODIMM1 0011 010x 34h -
LAN_3.3V 3.3V always power rail (for LAN) CK-505M (Clock Generator) 1101 001x D2h Clock, Unused Clock Output Disable
P1.5V 1.5V switched off power rail (off in S3-S5) DB400 (PCI Express Clocks) 1101 110x DCh Clock Buffer for PCI Express
P1.5V_AUX 1.5V switched on power rail TBD 0100 1100 4Ch Thermal Sensor
P2.5V 2.5V switched off power rail (off in S3-S5) TBD : (LVDS BackLight Inverter) 0101 1000 58h -
P1.8V 1.8V switched off power rail (off in S3-S5) TBD : (ALS) 0111 0010 72h Ambient Light Sensor
n
P1.8V_AUX 1.8V power rail for DDR TBD : (AUX DISPLAY) 0011 110x 3Ch EMA
P0.9V 0.9V power rail for DDR LAN 1100 1000 C8h 82566
P3.3V 3.3V switched off power rail (off in S3-S5) PCI Express Docking TBD TBD TBD
B P3.3V_AUX 3.3V switched on power rail TPM TBD TBD TBD B
P5V 5.0V switched off power rail (off in S3-S5)
o
P5V_AUX 5.0V switched on power rail
USB PORT Assign
PORT #
0
1
2
3
4
5
6
7
8
9
ASSIGNED TO
SYSTEM PORT 0
SYSTEM PORT 1
DMB
Expresas Card
DOCKING PORT 0
Bluetooth
Mini PCI Express
Aux Display
Test Port (RSVD)
WWAN/WIBRO (TBD)
PCI Express Assign
PORT #
0
1
2
3
4
5
C
ASSIGNED TO
PCIE x1 Slot
Mini Card (Golan)
Mini Card (WIBRO : RSVD)
Expresas Card
DOCKING PORT 0
GLAN
REVISION HISTORY
See rev notes for more information.
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
WUSHIJIANG PV2
ELECTRONICS
KEVIN LEE 1.0 BOARD INFO BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
POWER DIAGRAM
KBC3_ALWS_ON
KBC3_MEPWRON KBC3_SUSPWR KBC3_MEPWRON KBC3_PWRON
D (CHP3_S4_STATE*) (CHP3_SLPM*) D
(CHP3_SLPM*) (CHP3_SLPS3*) KBC3_VRON
ME ENABLE ME DISABLE
AC Adapter
(CHP3_S4_STATE*) or (CHP3_SLPM*) MEROM
CPU_CORE
: KBC3_DDRPWRON (CHP3_SLPS4*)
ME OPTION PEG
P1.8V
DOCK DC VDC P1.8V_AUX (ME) P1.8V_AUX GDDR-3 for PEG
g
SODIMM (DDR II) SODIMM (DDR II)
CRESTLINE CRESTLINE
P0.9V DDR II-Termination
DDR II for PEG (TBD)
P0.9 (ME)
n
ME OPTION
Battery DC
l
DDR II-Termination CRESTLINE
DDR II for PEG (TBD) P1.25V ICH8-M
u
R5C843
P1.25V_M
a
PEG
P1.25V_M
s i
C nVidia C
CRESTLINE
CRESTLINE P1.2V
t
P1.05V_M
P1.05V MEROM
m
CRESTLINE P1.05V_M CRESTLINE
n
(VCCP) ICH8-M
MICOM_P3V CRESTLINE
a
ICH8-M PCMCIA HDD R5C843
e
FDD USB M_PCI PEG
MICOM P5V_AUX P5V CRT HEATSINK FAN CIRCUIT
MICOM MDC AUX DISPLAY
S fid
P3.3V_M
CK505
SPI P1.5V CRESTLINE VCCA MEROM
ICH ICH8-M
P1.5V
P3.3V_ALW P3.3V_AUX CRESTLINE Thermal Sensor MICOM
n
Power Sequence by ME On/Off ICH8-M SODIMM
ICH8-M
ICH8-M P3.3V_M P3.3V SUPER I/O FWH M_PCI
B Host Boot / ME Off LAN PEG PCMCIA TPM
B
P3.3V_LAN MDC
MDC LEDs
o
(SLPS4* = S4_STATE*) > (SLPM* = SLPS3*) BT CRESTLINE LCD
P3.3V_WLL CK505
CRESTLINE
INT_VR_ICH
Host / ME Boot ICH8-M SPI ICH8-M

(SLPS4* = S4_STATE*) > SLPM* > SLPS3* LAN P1.05V_AUX P2.5V R5C843
C
PEG
INT_VRM_LAN
Host S5 / ME Boot P1.8V_LAN VTT3_PWRGD ATI (TBD)

(SLPS4* = SLPM*) > S4_STATE* > SLPS3* P1.5V_AUX EGFX_CORE nVidia (TBD)
LAN
ICH8-M
Power On/Off Table by S-state P1.0V_LAN MCH3_GFX_VR_EN
IGFX_CPRE CRESTLINE
Rail M0 M1 M off
LAN
State S0 S3 S4 S5 S3 S4 S5
+V*A(LWS)
S5-S3 S3- S0 S0
ON ON ON ON ON ON ON
+V*LAN
+1.8V_AUX ON ON ON ON ON
S5-S3/Moff-M0 S4-S3/M1-M0 S0/M0
A A
+0.9V ON ON ON ON
DRAW DATE TITLE
+V*AUX ON ON ON
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
+V* M ON ON ON ON ELECTRONICS
WUSHIJIANG PV2
+V* (CORE) ON POWER DIAGRAM
KEVIN LEE 1.0 BA41-XXXXX

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. POWER RAILS ANALYSIS Rev. 0.5
D
220V This sheet should be updated !!! D
Adapter Battery
3.3V_AUX ( TBD A )
5V_AUX ( TBD A )
MICOM 3V ( TBD A )
1.8V ( TBD A )
g
1.05V
0.1 A (TBD) ITP
CPU CORE MICOM 3V

CPU CORE ( TBD A )
1.05V (VCCP)
24.5 A (TBD) Merom-4M 3.3V
0.1 A (TBD)
Thermal
3.3V
0.08 A (TBD) KBC
n
1.05V ( TBD A ) 3 A (TBD) Sensor 0.08 A (TBD)
1.5V ( 34 W )
1.5V ( TBD A ) 0.3 A (TBD)
l
2.5V ( TBD A )
3.3V ( TBD A ) 3.3V MICOM 3V
SIO PWR LED
u
0.02 A (TBD) 0.1 A (TBD)
5V ( TBD A ) 1.05V (MCH CORE)
1.8V_AUX ( TBD A ) 4.8 A (TBD) *1.5V : 13.4 A (TBD)
1.05V (VCCP)
a
2.5 A (TBD) Crestline
0.9V_AUX ( TBD A ) 1.5V 1.8V
1.3 A (TBD)
s i
P3.3V_ALW ( TBD A )
C 3.3V 0.14 A (TBD) C

2.5V CLOCK 3.3V
P1.8V_ALW (TBD A)
P1.0V_ALW (TBD A)
GMCH 0.2 A (TBD) R5C843

VGA CORE (TBD A)
0.2 A (TBD) 0.1 A (TBD)

VDC INV ( TBD A )
3.3V 3.3V_AUX
0.12 A (TBD) 0.1 A (TBD)
t
(8 - 8.5 W )
PEX IO (TBD A)
1.8V_AUX 2.7 A (TBD)

RTC_Battery
3.3V KeyBoard
0.2 A (TBD) 3.3V_AUX
1.05V (ICH CORE) LAN (Intel)
m
1.3 A (TBD) 0.6 A (TBD)
n
1.05V (VCCP)
1.5V 0.4 A (TBD)
1.3 A (TBD) ICH8-M
3.3V
0.2 A (TBD)
3.3V 0.01 A (TBD) KBD LED 3.3V_AUX
a
3.3V_AUX SD Card
e
0.12 A (TBD) 0.1 A (TBD)
5V
5V_AUX 2.7 A (TBD)
RTC_Battery
2.7 A (TBD) ( ~ 2.0 W ) 3.3V 0.02 A (TBD) FWH 3.3V_AUX
0.01 A (TBD) 1.2 A (TBD)
S fid
5V_AUX
1 A (TBD)
Card Bus
1V-1.2V (VGA CORE) 3.3V
8 A (TBD) 0.06 A (TBD) HD Audio 3.3V
1.5V 5V 0.07 A (TBD) 0.7 A (TBD)
0.035 A (TBD) 3.3V_AUX
1.8V
1 A (TBD) 0.2 A (TBD) Mini PCI
2.5V PEG 5V
0.4 A (TBD)
1.2V (PEX IO) 0.28 A (TBD) 5V
1.6 A (TBD) 1 A (TBD) HDD PATA
n
3.3V 5V 1 A (TBD) ODD
0.01 A (TBD) 3.3V
3.3V_AUX 0.3 A (TBD)
B 1.8V_AUX
0.01 A (TBD) MDC B
3.1 A (TBD) DDR-2 5V 0.3 A (TBD)
5V SATA HDD
o
0.9V_AUX 0.22 A (TBD)
1 A (TBD) (Dual slots)
( ~ 5.0 W )
1.8V GDDR 5V FAN
3.1 A (TBD) 0.16 A (TBD)
P1.2V_ALW
P2.5V_ALW
P3.3V_ALW
TBD A (TBD)
TBD A (TBD)
TBD A (TBD)
LAN (82566)
3.3V (LCD 3V)
19V (VDC INV)
C 0.67 A (TBD)
0.24 A (TBD)
LCD 5V
5V
5V
1 A (TBD)
2 A (TBD)
0.2 A (TBD)
Audio AMP
USB (x 4)
Touch Pad
A A
DRAW DATE TITLE
Value by Datasheet/Application notes (Value by measurement)

CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
WUSHIJIANG PV2
ELECTRONICS
KEVIN LEE 1.0 POWER RAILS BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS Host Boot / ME Off
TO BE UPDATED!!
(SLPS4* = S4_STATE*) > (SLPM* = SLPS3*)
RTC 1) VCC_RTC
1 POWER SEQUENCE Rev. 0.5
6) P3.3V_LAN(A)
M-1) KBC3_DDR_PWRON (TBD) = 8) KBC3_SUSPWR Battery CHP3_RTCRST
9) P3.3V_AUX
M-2) KBC3_ME_PWRON = 15) KBC3_PWRON
Host / ME Boot
(SLPS4* = S4_STATE*) > SLPM* > SLPS3*
26) VRM3_CPU_PWRGD
D PRTC PRTC
9-M) ME Host Clock

26 D
Host S5 / ME Boot 21) CLK3_PWRGD*
POWER 10
(SLPS4* = SLPM*) > S4_STATE* > SLPS3*
23 9-M) P3.3V_M
21
LAN100_SLP
16) ICH_CORE (P1.05V)
INTVRMEN
S/W 10) CHP3_SLPS5*
23) CLK3_PWRGD CK-505 24) Clock Running
20) KBC3_ALL_PWRGD
11) CHP3_SLPS4*
Sheet 8
24
DC/DC B’d
11 12) CHP3_SLPSM*
20
12 13) CHP3_S4_STATE*
7) P1.05V_AUX
7) P1.5V_AUX CHP3_VRMPWRGD
PG-2) VTT3_PWRGD CPU
4 13 18) KBC3_PWRGD VRM
4) POWER_SW*
g
14) CHP3_SLPS3* 26) VRM3_CPU_PWRGD
VRMPWRGD 19) KBC3_VRON DC/DC B’d
KBC 14 18 27) CHP3_PWROK

18) KBC3_PWRGD (Test Option) 22) CLK3_PWRGD*_INV 22 (Test Option)
n
PWROK
M-1) KBC3_DDR_PWRON 28) CPU1_PWRGDCPU 28) CPU1_PWRGDCPU 25) VCC_CORE
l
M-2) KBC3_ME_PWRON 26) VRM3_CPU_PWRGD 17 29) PLT3_RST* CPU
ICH8-M 20 28 25
u
8 8) KBC3_SUSPWR 17) CHP3_ME_PWROK 29) PCI3_RST* 29
a
15) KBC3_PWRON 16-PG) VTT3_PWRGD 16) P1.5V 16
5
s i
C CL_PWROK Sheet 22-25 C
19) KBC3_VRON 9-PG) 1.8V_AUX_PWRGD 16) P1.05V 30
t
Sheet 10-12
M-2) KBC3_ME_PWRON
3 19 30) CPU1_CPURST*
5) KBC3_ALWS_ON
8) KBC3_SUSPWR or M-2) KBC3_ME_PWRON 9) P1.8V_AUX

MICOM_P3V DDR2 POWER
27
8) KBC3_SUSPWR
15) KBC3_PWRON
15
m
2) VDC
n
27) CHP3_PWROK
Adapter
9) 0.9V PWROK
AC_DC / Battery M-1) KBC3_DDR_PWRON MAX8632 17) CHP3_ME_PWROK
a
16) P2.5V (Test Option) 9-PG) 1.8V_AUX_PWRGD CL_PWROK 29) PLT3_RST*
MIC5219
e
MAX 8724 Sheet 50
12
Battery
8) KBC3_SUSPWR M-2) KBC3_ME_PWRON 9-M) P1.05V_M GMCH
S fid
9-M) P1.25V_M 9) P1.8V_AUX
2) VDC
LT1930 16) P12V

8 9-M) P1.05V_M 16) MCH_CORE 16) P1.05V
2 2) VDC 9-M) P1.25V_M
Thermal
16) GFX_CORE 16) P3.3V
Monitor Sheet 15-19
GFX VR 16) GFX_CORE M-2) KBC3_ME_PWRON 16) P1.5V Sheet 14
TPS5130
n
15) KBC3_PWRON 16) P1.2V
B P3.3V_LAN & P5V_AUX 16) P3.3V B
9) P5V_AUX 9 15 PCIe
o
MAX 1999 16-PG) VTT3_PWRGD 16) P1.8V
16) P1.5V
Devices
29
C
FDS6680A 9-M) P3.3V_M 9) P5V_AUX
6) P3.3V_LAN
16) P5V
Sheet 40 FDS4435 16) P1.2V
6 Sheet 40
9) P1.8V_AUX
DDR2 2) VDC
FDS6680A 9) P3.3V_AUX 9) P3.3V_AUX
FDS6680A
16) P3.3V
9) P0.9V
Memory PEG
Sheet 40 9-M) P3.3V_M 16) P3.3V
Sheet 40
9 9) P1.8V_AUX
Sheet 20-21
FDS6680A 16) P1.8V

Sheet 40 16 16) P3.3V
9-M) P1.25V_M 16) P1.8V
PCI 29) PCI3_RST*
7) P1.0V_LAN
FDS6680A 16) P1.25V
Devices
A LOM BCP69 Sheet 40
16) P1.5V
A
9-M) P1.05V_M
Nineveh 7) P1.8V_LAN
FDS6680A 16) P1.05V DRAW DATE TITLE
Sheet 46 SUN XIAO 6/26/2007
Gevena SAMSUNG
Sheet 46-47
7 Sheet 40 CHECK
WUSHIJIANG
DEV. STEP
PV2
ELECTRONICS
KEVIN LEE 1.0 POWER SEQUENCE BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
CLOCK DISTRIBUTION Rev. 0.8
P0.8V
CLK_3.3V_M FS(2:0)
D D
200 MHz CLK0_HOST_CPU/CPU*
CPU BSEL
CLK3_PWRGD*
100 MHz EXP3_CLKREQ*

FSB 667/533/400 MHz
MUX
ITP_EN EXPRESS CARD
333/266/200 MHz CLK1_MCLK0/0*
CPU_STP* 200 MHz CLK0_HOST_GMCH/GMCH* HPLL

Main PLL
SSC MPLL 333/266/200 MHz CLK1_MCLK1/1* SODIMM #0
100 MHz CLK1_PEG/PEG*
g
PCI Express Gfx
Crestline 333/266/200 MHz CLK1_MCLK3/3*
PEG
MCH3_CLKREQ* GMCH SODIMM #1
n
MUX 333/266/200 MHz CLK1_MCLK4/4*
100 MHz CLK1_MCH3GPLL/3GPLL*
l
PCIE PLL
u
96 MHz CLK1_DREFCLK/CLK*
DPLLA
s i a
C SS(96/100) SEL 100 MHz CLK1_DREFSSC/SSC* C
PLL3 DPLLB
SSC
t
Option For External GFX
CLK3_GFX_27M/SSC
CK-505M (w/ CLKREQ* & SSDC)
DMI 100 MHz CLK1_DCKLAN*

DCK LAN
m n
100 MHz 100 MHz PEX3_CLKREQ* (TBD) CLK1_MINIPCIE/PCIE*
MINI PCIE CARD
100 MHz 100 MHz PEX3_CLKREQ* (TBD) CLK1_WIPCIE*
a e
HDSPA
100 MHz 100 MHz PEX3_CLKREQ* (TBD) CLK1_NF*
ROBSON
100 MHz
S fid
CLK1_PCIEICH/ICH*
SLG8SP513
PCIEPLL ICH8-M
48 MHz CLK3_USB48
48MHz PLL USBPLL 100 MHz
CHP3_SATACLKREQ* LAN (3rd Vender)
MUX
100 MHz CLK1_SATA/SATA*

SATAPLL
n
AUD3_BCLK
B 14.318 MHz CLK3_ICH14
HD 24 MHz HD Audio B
o
33 MHz CLK3_PCLKICH 32.768 KHz
OSC
CLK3_SIO14 MDC3_BCLK
MDC
C
33 MHz CLK3_PCLKSIO SIO
17.86 MHz
33 MHz CLK3_TPMLPC RTC Clock
PCI_STP* 33 MHz TPM 1.2 32.768 KHz 32.768 KHz
SPI3_CLK
SPI
Buffer
2801-003856
LAN3_PHYCLK
33 MHz CLK3_PCLKMICOM
KBC 10 MHz
1394 Clock
LCI LAN
33 MHz CLK3_PCLKCB (Intel)
CARDBUS 24.576 MHz 25 MHz
14 MHz 2801-003898 2801-003892
A A
OSC
33 MHz CLK3_PCLKMIN
MINI PCI DRAW DATE TITLE
14.318 MHz SUN XIAO 6/26/2007

Gevena SAMSUNG
2801-003730 Page 8
CHECK DEV. STEP
ELECTRONICS
WUSHIJIANG PV2
33 MHz CLK3_PCLKPORT80
PORT 80 APPROVAL
KEVIN LEE
REV
1.0 CLOCK DIAGRAM

PART NO.
BA41-XXXXX

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
BLM18PG181SN1
PROPRIETARY INFORMATION THAT IS SEL_LCDCLK* Pin 20/21 Pin 24/25
SAMSUNG ELECTRONICS CO’S PROPERTY. P3.3V
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS LOW DOT_96/DOT_96# LCDCLK/LCDCLK#
HIGH SRC_0/SRC_0# 27M & 27M_SS
B33
VDD_SRC_IO VDD_CPU_IO VDD_PLL3_IO VDD_IO
10000nF 6.3V
10000nF 6.3V
10000nF 6.3V
10000nF 6.3V
10V
10V
VDD_REF VDD_48 VDD_PCI VDD_PLL3 VDD_SRC VDD_CPU
FSA FSB FSC CLK REQ DEVICE SRC PORT
4700nF
4700nF
D D
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
HOST CLK CLK REQ A SATA SRC2
BSEL0 BSEL1 BSEL2
CLK REQ B GMCH SRC4
0 0 0 266 MHz CLK REQ E MINI CARD SRC6
C530
C528
C529
C531
C538
C535
C537
C526
C527
C525
C536
C540
C539
C543
C534
C541
C210
C186
0 0 1 333 MHz CLK REQ F EXPRESS CARD SRC8
0 1 0 200 MHz
0 1 1 400 MHz
1 0 0 133 MHz P3.3V
1 0 1 100 MHz
U13
1 1 0 166 MHz SLG8SP513
g
1 1 1 RSVD 19 4
VDD_IO VDD_REF
33 16
VDD_SRC_IO1 VDD_48
43 9
VDD_SRC_IO2 VDD_PCI
R258 52 23
VDD_SRC_IO3 VDD_PLL3
R238 33 56
n
CLK3_USB48 10K VDD_CPU_IO
27 46
VDD_PLL3_IO VDD_SRC
CPU1_BSEL0 R237 2.2K
VDD_CPU
62
l
55
CPU1_BSEL1 NC
CPU1_BSEL2 R265 10K
CPU0
61
CLK0_HCLK0
u
17 60
R266 33 64
USB_FS_A CPU0# CLK0_HCLK0#
CLK3_ICH14 FSB_TESTMODE
R264
a
33 5 58
CLK3_SIO14 REF_FS_C_TEST_SEL CPU1_MCH
57 CLK0_HCLK1
44
CPU1_MCH# CLK0_HCLK1#
s i
C CHP3_CPUSTP# 45
CPUSTOP#
40 C
CHP3_PCISTP# PCISTOP# SRC11_CLKREQH#
39 CLK1_EXPRESSCARD
SRC11#_CLKREQG# CLK1_EXPRESSCARD#
t
R240 100 1% 63
CLK3_PWRGD CLKPWRGD_PWRDN#
41
SRC10 CLK1_PCIEICH
CLK3_PCLKICH R259 33 1% 14
PCIF_5_ITP_EN SRC10#
42
CLK1_PCIEICH#
m
CLK3_PCLKSIO_DS R260 33 1% 13 37
CLK1_ROBSON
n
PCI_4_SEL_LCDCLK# SRC9
R257 33 1% 38
CLK3_DBGLPC R261 33 1% 12
SRC9# CLK1_ROBSON#
CLK3_PCLKSIO PCI_3
54
R262 33 1% 11
SRC8_ITP
53 CLK1_PCIELAN
a
CLK3_PCLKMICOM PCI_2 SRC8#_ITP# CLK1_PCIELAN#
e
R263 475 1% 10 51 R239 0
MCH3_CLKREQ# PCI_1_CLKREQ_B# SRC7_CLKREQF#
50
LAN3_CLKREQ#
8
SRC7#_CLKREQE# MIN3_CLKREQ#
CHP3_SATACLKREQ# PCI_0_CLKREQ_A#
48
S fid
7
SRC6
47
CLK1_MINIPCIE
SMB3_CLK 6
SCL SRC6# CLK1_MINIPCIE#
SMB3_DATA SDA
34
3
SRC4
35
CLK1_MCH3GPLL
2
XTAL_IN SRC4# CLK1_MCH3GPLL#
XTAL_OUT
31
18
SRC3_CLKREQC#
32 EXP3_CLKREQ#
VSS_48 SRC3#_CLKREQD#
59
14.31818MHz VSS_CPU
22 28
Y3 VSS_IO SRC2 CLK1_SATA
n
15 29
26
VSS_PCI SRC2# CLK1_SATA#
VSS_PLL3
2
1 24
R256 VSS_REF LCDCLK_27M GFX3_27M
B C249
30
VSS_SRC1 LCDCLK#_27M_SS
25
GFX3_27M_SS B
0.033nF
C250 C248 C247 36
VSS_SRC2
o
0.033nF 0.047nF 0.033nF 49 20
C251 C252 VSS_SRC3 SRC0_DOT96
21 CLK1_PEG
0.033nF 0.033nF
10K SRC0#_DOT96# CLK1_PEG#
NO_STUFF
Place 14.318MHz within

500mils of CK-505
C NO_STUFF
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CLOCK GENERATOR
KEVIN LEE 1.0 CK-505 BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
THERMAL SENSOR & FAN CONTROL D
P3.3V_AUX
R590
49.9
P5.0V 1% P3.3V P3.3V_AUX
g
1%
1%
1%
1%
C620 C619 C625 C624
10K
10K
10K
10K
10000nF 10000nF
100nF 100nF
n
6.3V 6.3V (Selectable : PWR_SHDN)
NO_STUFF
l
P3.3V
R588
R589
R587
R575
u
U511
EMC2102
a
1 22
24
VDD_3V SMDATA
23 KBC3_THERM_SMDATA
VDD_5V_1 SMCLK KBC3_THERM_SMCLK R16
27
s i
C VDD_5V_2 10K Line Width = 20 mil C
19 1%
14
ALERT#
12 THM3_ALERT# J30
KBC3_PWRGD POWER_OK SYS_SHDN# THM3_STP#
t
16 HDR-4P-1R-SMD
RESET#
2
DN1 CPU2_THERMDC FAN5_VDD 1
R578 0 10
FAN_MODE DP1
3 C622 2
25 0.47nF
FAN5_VDD FAN_1 CPU2_THERMDA FAN3_FDBACK# 3
m
26 4
GFX3_THRMDN
n
FAN_2 DN2 4
28 5 C623
FAN3_FDBACK# TACH DP2 0.47nF
13 6
GFX3_THRMDP C9
CPU3_THRMTRIP# THERMTRIP# DN3
7
10000nF
a
DP3 2 6.3V
e
R579 0 9
SHDN_SEL
P3.3V_AUX 11
TRIP_SET CLK_SEL
17 C621 MMBT3904
18 2.2nF 1 Q516
NO_STUFF CLK_IN
8 3
NC_1
R576 15 20
S fid
NC_2 GND
R1 100K 21 29
NC_3 THRM_PAD
1%
R577
R2 56.2K
1% MT9 MT11
RMNT-2.5-7.0-1P RMNT-2.5-7.0-1P
o n B
C
TRIP_SET pin voltage = (T-75)/21
3.3 * [R2/(R1+R2)] = (T-75)/21
VCCP_CORE P3.3V
R574
R580 10K
NO_STUFF
2K 1%
1%
CPU3_THRMTRIP#
3
1 Q512
MMBT3904
2
CPU1_THRMTRIP# NO_STUFF
R573 0
A GFX3_THERM# A
NO_STUFF DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 THERMAL BLOCK
KEVIN LEE 1.0 THERMAL & FAN CONTROL BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
VCCP_CORE
56.2 1%
J1-1
MEROM-SOCKET
n g J1-2
MEROM-SOCKET
R656
1/4 2/4
CPU1_A#(16:3) 13-D1 3 J4 H1
CPU1_D#(15:0) 13-D3 0 E22 Y22 32 13-D3
CPU1_D#(47:32)
A3* ADS* CPU1_ADS# D0* D32*
l
4 L5 E2 13-C2 1 F24 AB24 33
5 L4
A4* BNR*
G5 13-C2
CPU1_BNR# 2 E26
D1* D33*
V24 34
A5* BPRI* CPU1_BPRI# D2* D34*
u
6 K5 3 G22 V26 35
A6* D3* D35*
7 M3 F1 4 F23 V23 36
0
A7* BR0* CPU1_BREQ# D4* D36*

ADDR GROUP
a
8 N2 13-C2 5 G25 T22 37
A8* D5* D37*
9 J1 H5 6 E25 U25 38
10 N3
A9* DEFER*
F21
CPU1_DEFER# 7 E23
D6* D38*
U23 39
s
13-B2
i
C A10* DRDY* CPU1_DRDY# D7* D39* C
DATA GRP 0
DATA GRP 2
11 P5 E1 13-B2 8 K24 Y25 40
12 P2
A11* DBSY* 13-B2
CPU1_DBSY# 9 G24
D8* D40*
W22 41
A12* D9* D41*
t
CONTROL
13 L2 D20 10 J24 Y23 42

A13* IERR* D10* D42*
14 P4 B3 11 J23 W24 43
15 P1
A14* INIT* 20-C1
CPU1_INIT# 12 H22
D11* D43*
W25 44
A15* D12* D44*
16 R1 H4 13 F26 AA23 45
CPU1_ADSTB0# A16* LOCK* CPU1_LOCK# D13* D45*
m
13-C2 M1 13-B2 14 K22 AA24 46
n
ADSTB0* D14* D46*
C1 13-B3 15 H23 AB25 47
RESET*
F3 13-A2
CPU1_CPURST# J26
D15* D47*
Y26
RS0*
F4 13-A2
CPU1_RS0# CPU1_DSTBN0# 13-B2 H26
DSTBN0* DSTBN2*
AA26 13-B2
CPU1_DSTBN2#
CPU1_A#(35:17) 13-D1 17 Y2
RS1*
G3 13-A2
CPU1_RS1# CPU1_DSTBP0# 13-B2 H25
DSTBP0* DSTBP2*
U22 13-B2
CPU1_DSTBP2#
a
A17* RS2* CPU1_RS2# CPU1_DBI0# DINV0* DINV2* CPU1_DBI2#
e
18 U5 G2 13-B2 13-B2 13-B2
19 R3
A18* TRDY* CPU1_TRDY# CPU1_D#(31:16) 13-D3 16 N22 AE24 48 13-D3
CPU1_D#(63:48)
A19* D16* D48*
20 W6 G6 17 K25 AD24 49
21 U4
A20* HIT*
E4 13-B2
CPU1_HIT# 18 P26
D17* D49*
AA21 50
22 Y5
A21* HITM* 13-B2
CPU1_HITM# 19 R23
D18* D50*
AB22 51
S fid
A22* D19* D51*
23 U1 A6 20 L23 AB21 52
24 R4
A23* A20M*
A5 CPU1_A20M# 21 M24
D20* D52*
AC26 53
1
20-C1
ADDR GROUP
25 T5
A24* FERR*
C4 20-C1
CPU1_FERR# 22 L22
D21* D53*
AD20 54
26 T3
A25* IGNNE* CPU1_IGNNE# 23 M23
D22* D54*
AE22 55
A26* D23* D55*
ICH
DATA GRP 1
DATA GRP 3
27 W2 D5 24 P25 AF23 56
28 W5
A27* STPCLK*
C6 20-C1
CPU1_STPCLK# 25 P23
D24* D56*
AC25 57
29 Y4
A28* LINT0
B4 20-C1
CPU1_INTR 26 P22
D25* D57*
AE21 58
30 U2
A29* LINT1
A3 20-C1
CPU1_NMI 27 T24
D26* D58*
AD21 59
31 V4
A30* SMI* 20-C1
CPU1_SMI# 28 R24
D27* D59*
AC22 60
A31* CPU1_REQ#(4:0) D28* D60*
n
32 W3 K3 0 13-A2 29 L25 AD23 61
A32* REQ0* D29* D61*
33 AA4 H2 1 30 T25 AF22 62
A33* REQ1* D30* D62*
34 AB2 K2 2 31 N25 AC23 63
A34* REQ2* D31* D63*
B 35 AA3
A35* REQ3*
J3 3
CPU1_DSTBN1#
L26
DSTBN1* DSTBN3*
AE25
CPU1_DSTBN3# B
V1 L1 4 13-B2 M26 AF24 13-B2
CPU1_ADSTB1# ADSTB1* REQ4* CPU1_DSTBP1# DSTBP1* DSTBP3* CPU1_DSTBP3#
o
13-C2 13-B2 N24 AC20 13-B2
CPU1_DBI1# 13-B2
DINV1* DINV3* 13-B2
CPU1_DBI3#
MT504
RMNT-38-70-1P
MT505
RMNT-38-70-1P
MT508
RMNT-38-70-1P
MT509
RMNT-38-70-1P
C CPU CONNECTOR PART NUMBER 3704-001153
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CPU
KEVIN LEE 1.0 MEROM(1/3) BA41-XXXXX

undefined October 23, 2007 10:38:02 AM PAGE 10 OF 58

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
CPU Core Voltage Table IMVP-6
J1-3 P1.5V
MEROM-SOCKET Active Mode
Active/Deeper Sleep Deeper Sleep/Extended Deeper Sleep
A22 B26 Dual Mode Region
H CLK
CLK0_HCLK0 8-C1 A21
BCLK0 VCCA_1
C26 Dual Mode Region
CLK0_HCLK0# 8-C1
BCLK1 VCCA_2 C674 C673
10nF 10000nF
D7 K6 VID(6:0) Voltage VID(6:0) Voltage VID(6:0) Voltage
CPU1_SLP# 13-B3 B5
SLP* VCCP_1
J6
16V 6.3V
CPU1_DPSLP# 20-C1 E5
DPSLP* VCCP_2
M6 0 0 0 0 0 0 0 1.5000 V 0 1 0 1 0 0 0 1.0000 V 1 0 1 0 0 0 1 0.4875 V
CPU1_DPRSTP# 14-B1 20-C1 60-C4 D24
DPRSTP* VCCP_3
N6 0 0 0 0 0 0 1 1.4875 V 0 1 0 1 0 0 1 0.9875 V 1 0 1 0 0 1 0 0.4750 V
CPU1_DPWR# 13-B2 D6
DPWR* VCCP_4
T6 0 0 0 0 0 1 0 1.4750 V 0 1 0 1 0 1 0 0.9750 V 1 0 1 0 0 1 1 0.4625 V
g
CPU1_PWRGDCPU 20-C1 AE6
PWRGOOD VCCP_5
R6 0 0 0 0 0 1 1 1.4625 V 0 1 0 1 0 1 1 0.9625 V 1 0 1 0 1 0 0 0.4500 V
CPU1_PSI# 60-B4
PSI* VCCP_6
K21 0 0 0 0 1 0 0 1.4500 V 0 1 0 1 1 0 0 0.9500 V 1 0 1 0 1 0 1 0.4375 V
CPU1_VID(6:0) 6 AE2
VCCP_7
J21 0 0 0 0 1 0 1 1.4375 V 0 1 0 1 1 0 1 0.9375 V 1 0 1 0 1 1 0 0.4250 V
60-C4 VID_6 VCCP_8
60-B4 5 AF3 M21 VCCP_CORE 0 0 0 0 1 1 0 1.4250 V 0 1 0 1 1 1 0 0.9250 V 1 0 1 0 1 1 1 0.4125 V
VCCP_CORE VID_5 VCCP_9 0 0 0 0 1 1 1 1.4125 V 0 1 0 1 1 1 1 0.9125 V 1 0 1 1 0 0 0 0.4000 V
AE3 N21
n
4
VID_4 VCCP_10 0 0 0 1 0 0 0 1.4000 V 0 1 1 0 0 0 0 0.9000 V 1 0 1 1 0 0 1 0.3875 V
3 AF4 T21
VID_3 VCCP_11 0 0 0 1 0 0 1 1.3875 V 0 1 1 0 0 0 1 0.8875 V 1 0 1 1 0 1 0 0.3750 V
2 AE5 R21 EC509
VID_2 VCCP_12
l
0 0 0 1 0 1 0 1.3750 V 0 1 1 0 0 1 0 0.8750 V 1 0 1 1 0 1 1 0.3625 V
R657 1 AF5
VID_1 VCCP_13
V21 330uF C658 C640 C639 C661 C659 C660
0 0 0 1 0 1 1 1.3625 V 0 1 1 0 0 1 1 0.8625 V 1 0 1 1 1 0 0 0.3500 V
56.2 0 AD6 W21 2.5V 100nF 100nF 100nF 100nF 100nF 100nF
VID_0 3/4 VCCP_14 0 0 1
u
1% V6 AL 0 0 1 1 0 0 1.3500 V 1 1 0 1 0 0 0.8500 V 0 1 1 1 0 1 0.3375 V
VCCP_15 0 0 0 1 1 0 1 1.3375 V 0 1 1 0 1 0 1 0.8375 V 1 0 1 1 1 1 0 0.3250 V
D21 G21
THERMAL
PROCHOT* VCCP_16 0 0 0 1 1 1 0 1.3250 V 0 1 1 0 1 1 0 0.8250 V 1 0 1 1 1 1 1 0.3125 V
a
A24
CPU2_THERMDA 9-B4 B25
THRMDA
AC1
OXI Cap 0 0 0 1 1 1 1 1.3125 V 0 1 1 0 1 1 1 0.8125 V 1 1 0 0 0 0 0 0.3000 V
VCCP_CORE CPU2_THERMDC C7
THRMDC PREQ*
AC2 0 0 1 0 0 0 0 1.3000 V 0 1 1 1 0 0 0 0.8000 V 1 1 0 0 0 0 1 0.2875 V
s
9-B4
i
C CPU1_THRMTRIP# 14-B1 20-C1
THERMTRIP* PRDY*
AC4 0 0 1 0 0 0 1 1.2875 V 0 1 1 1 0 0 1 0.7875 V 1 1 0 0 0 1 0 0.2750 V C
BPM3* 0 0 1 0 0 1 0 1.2750 V 0 1 1 1 0 1 0 0.7750 V 1 1 0 0 0 1 1 0.2625 V
XDP/ITP SIGNALS
C21 AD1
CPU1_BSEL2 BSEL2 BPM2* 0 1 0 1 1 0
t
8-C4 11-A4 B23 AD3 Change to 270uF 0 0 0 1 1 1.2625 V 1 1 0 1 1 0.7625 V 1 0 1 0 0 0.2500 V
R660 CPU1_BSEL1 BSEL1 BPM1* 0 0 1 0 1 0 0 1.2500 V 0 1 1 1 1 0 0 0.7500 V 1 1 0 0 1 0 1 0.2375 V
1K 8-C4 11-A4 B22 AD4
1%
CPU1_BSEL0 8-C4 11-A4
BSEL0 BPM0* 0 0 1 0 1 0 1 1.2375 V 0 1 1 1 1 0 1 0.7375 V 1 1 0 0 1 1 0 0.2250 V
AD26 AC5 0 0 1 0 1 1 0 1.2250 V 0 1 1 1 1 1 0 0.7250 V 1 1 0 0 1 1 1 0.2125 V
GTLREF TCK CPU1_TCK 0 0 1 0 1 1 1 1.2125 V 0 1 1 1 1 1 1 0.7125 V 1 1 0 1 0 0 1
0 0.2000 V
m
AA6 11-A3
n
R591 54.9 1% Y1
TDI
AB3 11-A3
CPU1_TDI 0 0 1 1 0 0 0 1.2000 V 1 0 0 0 0 0 0 0.7000 V 1 1 0 1 0 0 1 0.1875 V
R661 COMP3 TDO 0 0 1 1 0 0 1 1.1875 V 1 0 0 0 0 0 1 0.6875 V 1 1 0 1 0 1 0 0.1750 V
2K R592 27.4 1%AA1 AB5
1% R659 54.9 1%U26
COMP2 TMS
AB6 11-A3
CPU1_TMS 0 0 1 1 0 1 0 1.1750 V 1 0 0 0 0 1 0 0.6750 V 1 1 0 1 0 1 1 0.1625 V
COMP1 TRST* CPU1_TRST# 0 0 1 1 0 1 1 1.1625 V 1 0 0 0 0 1 1 0.6625 V 1 1 0 1 1 0 0 0.1500 V
R658 27.4 1%R26 C20R652 0 11-A3
a
COMP0 DBR* ITP3_DBRESET# 0 1 1 0 1 0
e
22-D4 0 1 1 0 0 1.1500 V 0 0 1 0 0 0.6500 V 1 1 1 0 1 0.1375 V
AF7 D2 0 0 1 1 1 0 1 1.1375 V 1 0 0 0 1 0 1 0.6375 V 1 1 0 1 1 1 0 0.1250 V
CPU1_VCCSENSE 12-C4 60-B4 AE7
VCCSENSE RSVD_1
F6 0 0 1 1 1 1 0 1.1250 V 1 0 0 0 1 1 0 0.6250 V 1 1 0 1 1 1 1 0.1125 V
CPU1_VSSSENSE 12-B4 60-B4
VSSSENSE RSVD_2
D3 0 0 1 1 1 1 1 1.1125 V 1 0 0 0 1 1 1 0.6125 V 1 1 1 0 0 0 0 0.1000 V
RSVD_3 0 1 0 0 0 0 0 1.1000 V 1 0 0 1 0 0 0 0.6000 V 1 1 1 0 0 0 1 0.0875 V
D22
S fid
RSVD_4 0 1 0 0 0 0 1 1.0875 V 1 0 0 1 0 0 1 0.5875 V 1 1 1 0 0 1 0 0.0750 V
C23 M4
RSVD
1%
1%
TEST1 RSVD_5 0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V

D25 N5
TEST2 RSVD_6 0 1 0 0 0 1 1 1.0625 V 1 0 0 1 0 1 1 0.5625 V 1 1 1 0 1 0 0 0.0500 V
C24 T2
TEST3 RSVD_7 0 1 0 0 1 0 0 1.0500 V 1 0 0 1 1 0 0 0.5500 V 1 1 1 0 1 0 1 0.0375 V
AF26 V3
TEST4 RSVD_8 0 1 0 0 1 0 1 1.0375 V 1 0 0 1 1 0 1 0.5375 V 1 1 1 0 1 1 0 0.0250 V
AF1 B2
100nF
TEST5 RSVD_9 0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V

1K
1K
A26 C3
0
TEST6 RSVD_10 0 1 0 0 1 1 1 1.0125 V 1 0 0 1 1 1 1 0.5125 V 1 1 1 1 0 1

0 0 0.0000 V
1 0
1 1 0 0 0 0 0.5000 V 1 1 1 1 0 0 1 0.0000 V
1 1 1 1 0 1 0 0.0000 V
C680
1 1 1 1 0 1 1 0.0000 V
R654
R597
n
Deeper Slp
R655
R653
Active
NO_STUFF 1 1 1 1 1 0 0 0.0000 V
DPRSLPVR 0 DPRSLPVR 1 1 1 1 1 1 0 1 0.0000 V
B DPRSTP* 0 1 1 1 1 1 1 0 0.0000 V B
DPRSTP* 1 1 1 1 1 1 1 1 0.0000 V
PSI2* 0 or 1
o
PSI2* 0 or 1 *"1111111" : 0V power good asserted.
ITP DISABLE
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
C
VCCP_CORE
GTLREF : Keep the Voltage divider within 0.5"
1%
1%
of the first GTLREF0 pin with Zo=55ohm trace.

Minimize coupling of any switching signals to this net.
40.2
150
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)

trace shorter than 1/2" to their respective Banias socket pins.
1%R593
1%R595
GND test points within 100mil of the VCC/VSSsense at the end of the line.
Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
11-C3
CPU1_TDI
CPU1_TMS (preferred 50mil) from any other signal. And GND via 100mil away
11-C3
11-C3
CPU1_TCK from each of the VCC/VSS test point vias.
27.4
CPU1_TRST#
475
11-C3
A A
R594
R596
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CPU
NO_STUFF MEROM(2/3)

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
M22
M25
N23
N26
R22
K23
K26
P21
P24
L21
L24
M2
M5
N1
N4
R2
K4
P3
P6
L3
L6
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
A11 K1
VSS_1 CPU_CORE CPU_CORE VSS_120
A14 J5
VSS_2 VSS_119
A16 J25
VSS_3 VSS_118
A19 J22
VSS_4 VSS_117
A2 A10 AE9 J2
VSS_5 VCC_1 VCC_51 VSS_116
A23 A12 AF10 H6
A25 A13 AF12 H3
A4 A15 AF14 H24
g
A8 A17 AF15 H21
AA11 A18 AF17 G4
AA14 A20 AF18 G26
AA16 A7 AF20 G23
AA19 A9 AF9 G1
n
CPU_CORE NO_STUFF NO_STUFF NO_STUFF AA2
VSS_13
AA10
VCC_9 J1-4 VCC_59
B10
VSS_108
F8
AA22 AA12 B12 F5
MEROM-SOCKET
l
AA25 AA13 B14 F25
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
AA5 AA15 B15 F22
u
AA8 AA17 B17 F2
AB1
VSS_18
VSS_19
AA18
VCC_14
VCC_15
4/4 VCC_64
VCC_65
B18
VSS_103
VSS_102
F19
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
a
AB11 AA20 B20 F16
AB13 AA7 B7 F13
AB16 AA9 B9 F11
s i
C AB19
VSS_22
AB10
VCC_18 VCC_68
C10
VSS_99
E8 C
AB26 AB12 C12 E6
C633
C631
C632
C634
C653
C654
C636
C635
C637
C638
C67
C664
C657
C656
C655
t
AB4 AB14 C13 E3
AB8 AB15 C15 E24
AC11 AB17 C17 E21
AC14 AB18 C18 E19
m
AC16 AB20 C9 E16
n
AC19 AB7 D10 E14
AC21 AB9 D12 E11
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
20%
CPU1_VCCSENSE
R599 100 1% AC24
VSS_32
AC10
VCC_28 VCC_78
D14
VSS_89
D8
AC3 AC12 D15 D4
a
e
AC6 AC13 D17 D26
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
22000nF
AC8 AC15 D18 D23
AD11 AC17 D9 D19
AD13 AC18 E10 D16
AD16 AC7 E12 D13
S fid
AD19 AC9 E13 D11
C665
C666
C662
C663
C645
C646
C647
C66
C81
C82
C68
C642
C641
C644
C643
AD2 AD10 E15 D1
AD22 AD12 E17 C8
AB23 AD14 E18 C5
CPU1_VSSSENSE R600 100 1% AD25
VSS_43
AD15
VCC_39 VCC_89
E20
VSS_78
C25
AD5 AD17 E7 C22
AD8 AD18 E9 C2
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
AE1 AD7 F10 C19

NO_STUFF

NO_STUFF
NO_STUFF
AE11 AD9 F12 C16

n
AE14 AE10 F14 C14
AE16 AE12 F15 C11
AE19 AE13 F17 B8
B AE23
VSS_51
AE15
VCC_47 VCC_97
F18
VSS_70
B6 B
AE26 AE17 F20 B24
o
AE4 AE18 F7 B21
AE8 AE20 F9
6x 330 uF : CPU VR side AF11
B19
B16
VSS_55 VSS_66
AF13 B13
Be Caution the placement of decap!! AF16
AF19
VSS_56
VSS_57
VSS_65
VSS_64
B11
AF8
C
VSS_58 VSS_63
AF2 AF6
VSS_59 VSS_62
AF21 AF25
VSS_163
VSS_162
VSS_161
VSS_160
VSS_159
VSS_158
VSS_157
VSS_156
VSS_155
VSS_154
VSS_153
VSS_152
VSS_151
VSS_150
VSS_149
VSS_148
VSS_147
VSS_146
VSS_145
VSS_144
VSS_143
VSS_142
VSS_60 VSS_61
Y6
Y3
Y24
Y21
W4
W26
W23
W1
V5
V25
V22
V2
U6
U3
U24
U21
T4
T26
T23
T1
R5
R25
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CPU
KEVIN LEE 1.0 MEROM(3/3) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL VCCP_CORE
SAMSUNG ELECTRONICS CO’S PROPERTY. XC501
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS C730 C733 C732
470nF
C731 4700nF 4700nF 330uF
EXCEPT AS AUTHORIZED BY SAMSUNG. 2200nF 2.5V NO_STUFF
16V 10V 10V OXI
U13
U12
U11
T13
T11
T10
U9
U8
U7
U5
U3
U2
U1
R3
R2
R1
T9
T7
T6
T5
T3
T2
D 10-D4 10-C4
CPU1_A#(35:3) D
CPU1_D#(63:0)
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
J13 3
10-C1 10-C2 10-D1 10-D2
0 E2 HA*_3 B11 4
HD*_0 HA*_4
1 G2 HD*_1 HA*_5 C11 5
2 G7 M11 6
HD*_2 HA*_6
3 M6 HD*_3 HA*_7 C15 7
4 H7 F16 8
5 H3 HD*_4 VTT HA*_8 L13 9
HD*_5 HA*_9
6 G4 G17 10
7 F3 HD*_6 HA*_10 C14 11
HD*_7 HA*_11
8 N8 HD*_8 HA*_12 K16 12
9 H2 B13 13
HD*_9 HA*_13
10 M10 HD*_10 HA*_14 L16 14
11 N12 J17 15
g
VCCP_CORE 12 N9 HD*_11 HA*_15 B14 16
U32-1
Host Address Bus

HD*_12 HA*_16
13 H5 HD*_13 HA*_17 K19 17
14 P13 P15 18
HD*_14 HA*_18
R684 15 K9 HD*_15 LE88CLPM HA*_19 R17 19
n
221 16 M2 B16 20
1% 17 W10 HD*_16 HA*_20 H20 21
13-A3
MCH1_HXSWING
18 Y8
HD*_17
HD*_18 1 OF 5 HA*_21
HA*_22
L19 22
l
19 V4 D17 23
HD*_19 HA*_23
R685 20 M3 HD*_20 HA*_24 M17 24
u
100 C728 21 J1
HD*_21 HA*_25
N16 25
1% 100nF 22 N5 HD*_22 HA*_26 J19 26
a
23 N3 B18 27
24 W6 HD*_23 HA*_27 E19 28
HD*_24 HA*_28
W9 B17
s
25 29
i
C 26 N2 HD*_25 HA*_29 B15 30 C
Host Data Bus

HD*_26 HA*_30
27 Y7 HD*_27 HA*_31 E17 31
t
28 Y9 C18 32
HD*_28 HA*_32 Calero : HA*[35:32] not support
29 P4 HD*_29 HA*_33 A19 33
30 W3 B19 34
31 N1 HD*_30 HA*_34 N19 35
HD*_31 HA*_35
m
32 AD12
n
33 AE3 HD*_32 G12
34 AD9
HD*_33 H_ADS*
H17 10-C3
CPU1_ADS#
35 AC9
HD*_34 H_ADSTB*_0
G20 10-C4
CPU1_ADSTB0#
36 AC7 HD*_35 H_ADSTB*_1 C8 10-B4
CPU1_ADSTB1#
a
HD*_36 H_BNR* CPU1_BNR#
e
37 AC14 E8 10-C3
VCCP_CORE 38 AD11 HD*_37 H_BPRI* F12 10-C3
CPU1_BPRI#
39 AC11
HD*_38 H_BREQ* 10-C3
CPU1_BREQ#
HD*_39
40 AB2
HD*_40
R697 41 AD7 D6
S fid
42 AB1
HD*_41 H_DEFER*
C10 10-C3
CPU1_DEFER#
1K HD*_42 H_DBSY* CPU1_DBSY#
1% 43 Y3 H8 10-C3
13-A3 44 AC6
HD*_43 H_DPWR*
K7 11-D4
CPU1_DPWR#
MCH1_HVREF 45 AE2 HD*_44 H_DRDY* 10-C3
CPU1_DRDY#
HD*_45
R696 C812 46 AC5 HD*_46 H_HIT* E4
CPU1_HIT#
2K 100nF 47 AG3 C6 10-C3
1% 48 AJ9
HD*_47 H_HITM*
G10 10-C3
CPU1_HITM#
49 AH8
HD*_48 H_LOCK*
B7 10-C3
CPU1_LOCK#
50 AJ14 HD*_49 H_TRDY* 10-C3
CPU1_TRDY#
HD*_50
n
51 AE9 AM5
52 AE11 HD*_51 HPLL_CLK AM7 8-C1
CLK0_HCLK1
53 AH12
HD*_52 HPLL_CLK* 8-C1
CLK0_HCLK1#
HD*_53
B 54 AJ5
HD*_54 H_DINV*_0
K5 10-C2
CPU1_DBI0# B
55 AH5 L2 10-B2
HD*_55 H_DINV*_1 CPU1_DBI1#
o
56 AJ6 AD13 10-C1
57 AE7 HD*_56 H_DINV*_2 AE13 10-B1
CPU1_DBI2#
58 AJ7
HD*_57 H_DINV*_3 CPU1_DBI3#
HD*_58
59 AJ2 M7 10-C2
60 AE5
HD*_59 H_DSTBN*_0
K3 10-B2
CPU1_DSTBN0#
61 AJ3
HD*_60 H_DSTBN*_1
AD2 10-C1
CPU1_DSTBN1#
C
62 AH2 HD*_61 H_DSTBN*_2 AH11 10-B1
CPU1_DSTBN2#
63 AH13
HD*_62 H_DSTBN*_3 CPU1_DSTBN3#
HD*_63 L7 10-C2
B6
H_DSTBP*0
K2 10-B2
CPU1_DSTBP0#
CPU1_CPURST# 10-C3 E5
H_CPURST* H_DSTBP*1
AC2 10-C1
CPU1_DSTBP1#
CPU1_SLP# 11-D4
H_CPUSLP* H_DSTBP*2
AJ10 10-B1
CPU1_DSTBP2#
VCCP_CORE H_DSTBP*3 CPU1_DSTBP3#
R688 54.9 1% W1
R687 54.9 1% W2 H_SCOMP M14 0 10-B3
CPU1_REQ#(4:0)
H_SCOMP* H_REQ*_0
E13 1
B3 H_REQ*_1 A11 2
MCH1_HXSWING H_SWING H_REQ*_2
R686
13-C4 24.9 1% C2 H_RCOMP H_REQ*_3 H13 3
B12 4
A9 VCC Core VTT LF H_REQ*_4
MCH1_HVREF 13-B4 B9
H_DVREF
E12
H_AVREF H_RS*_0 CPU1_RS0#
VTTLF_1
VTTLF_2
VTTLF_3
D7 10-C3
VCC_10
VCC_11
VCC_12
VCC_13
H_RS*_1 CPU1_RS1#
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
D8 10-C3
H_RS*_2 10-C3
CPU1_RS2#
470nF A716V
470nF F216V
470nFAH116V
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
R30
A A
VCCP_CORE
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
C727
C729
C734
ELECTRONICS
WUSHIJIANG PV2 CMCH
KEVIN LEE 1.0 CRESTLINE (1/5) BA41-XXXXX


4 3 2 1
A
B
C
D
COM-22C-015(1996.6.5) REV. 3
4
4
SAMSUNG PROPRIETARY

MCH3_ICHSYNC#
MCH3_CLKREQ#
R714
R735
22-A4
0
20K
8-C4 14-A2
G40
G39
K36
H35
N40
N41
L43
L41
E42
D44
A45
A47
E44
B45
B47
G44
C45
D46
F48
E50
G50
F49
E51
G51
H39
J40
K40
E40
E39
D35
C37
L27
J27
F27
K27
G27
E27
P33
M35
C32
E29
F29
J29
K29
G32
H32
E33
F33
G35
K33
R32 1%
TEST_2
A37 TEST_1
TVB_RTN
TVA_RTN
TVC_RTN
TVB_DAC
TVA_DAC
TVC_DAC
CRT_RED
LVDS_IBG
CLK_REQ*
CRT_RED*
L_VDD_EN
CRT_BLUE
LVDS_VBG
ICH_SYNC*
L_BKLT_EN
CRT_BLUE*
LVDSB_CLK
LVDSA_CLK
L_DDC_CLK
CRT_VSYNC
CRT_HSYNC
LVDSB_CLK*
LVDSA_CLK*
CRT_GREEN
L_CTRL_CLK
LVDS_VREFL
L_DDC_DATA
LVDS_VREFH
CRT_GREEN*
L_BKLT_CTRL
L_CTRL_DATA
CRT_DDC_CLK
CRT_TVO_IREF
TV_DCONSEL_1
TV_DCONSEL_0
CRT_DDC_DATA
LVDSB_DATAP_2
LVDSB_DATAP_1
LVDSB_DATAP_0
LVDSA_DATAP_2
LVDSA_DATAP_1
LVDSA_DATAP_0
LVDSB_DATAN_2
LVDSB_DATAN_1
LVDSB_DATAN_0
LVDSA_DATAN_2
LVDSA_DATAN_1
LVDSA_DATAN_0
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MISC LVDS TV VGA
PEG_RXN_0 J51
PEG_RXN_1 L51
N47
A35 PEG_RXN_2 T45
B37 RSVD_1 PEG_RXN_3 T50
B36 RSVD_2 PEG_RXN_4 U40
RSVD_3 PEG_RXN_5
72-B4
B34 Y44
RSVD_4 PEG_RXN_6
C34 RSVD_5 PEG_RXN_7 Y40
BF23 RSVD_6 Y17 VCC_AXG_NCTF_25 VCC_AXG_1 R20 PEG_RXN_8 AB51
27-D3
BG23 Y19 T14 W49
3
3
RSVD_7 VCC_AXG_NCTF_26 VCC_AXG_2 PEG_RXN_9
C
BJ29 RSVD_8 Y20 VCC_AXG_NCTF_27 VCC_AXG_3 W13 PEG_RXN_10 AD44
BJ20 Y21 W14 AD40
27-D2
BK22 Y23 Y12 AG46

BC23 RSVD_10 Y24 VCC_AXG_NCTF_29 VCC_AXG_5 AA20 PEG_RXN_12 AH49
BD24 RSVD_11 Y26 VCC_AXG_NCTF_30 VCC_AXG_6 AA23 PEG_RXN_13 AG45
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
BE24 Y28 AA26 AG41

18-C4 18-C2
19-C4 19-C2
PEG1_RXN(15:0)
BH39 RSVD_14 Y29 VCC_AXG_NCTF_33 VCC_AXG_9 AA28

BF19 AA16 AB21
27-C3 27-C2
RSVD_20 VCC_AXG_NCTF_34 VCC_AXG_10

BH20 RSVD_21
a AA17 VCC_AXG_NCTF_35 VCC_AXG_11 AB24 PEG_RXP_0 J50
o
BK18 AB16 AB29 L50
BJ18 RSVD_22 AB19 VCC_AXG_NCTF_36 VCC_AXG_12 AC20 PEG_RXP_1 M47
AW20 RSVD_23 AC16 VCC_AXG_NCTF_37 VCC_AXG_13 AC21 PEG_RXP_2 U44
BK20 RSVD_24 AC17 VCC_AXG_NCTF_38 VCC_AXG_14 AC23 PEG_RXP_3 T49
P36 RSVD_25 AC19 VCC_AXG_NCTF_39 VCC_AXG_15 AC24 PEG_RXP_4 T41
RSVD_26 VCC_AXG_NCTF_40 VCC_AXG_16 PEG_RXP_5
P37 RSVD_27 AD15 VCC_AXG_NCTF_41 VCC_AXG_17 AC26 PEG_RXP_6 W45
RVSD
R35 AD16 AC28 W41
MEM1_AMA(14)
MEM1_BMA(14)
N35 RSVD_29 AD17 VCC_AXG_NCTF_43 VCC_AXG_19 AC29 PEG_RXP_8 AB50
GFX VCC
J12 AF16 AD20 Y48

H10
AR12
RSVD_30
RSVD_31
RSVD_32
n AF19
AH15
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
AD23
AD24
PEG_RXP_9
PEG_RXP_10
PEG_RXP_11
AC45
AC41
PEG1_TXN(15:0)
AR13 AH16 AD28 AH47

m
AM12 RSVD_33 AH17 VCC_AXG_NCTF_47 VCC_AXG_23 AF21 PEG_RXP_12 AG49
27-C2 27-B3 27-B2
P3.3V
AN13 RSVD_34 AH19 VCC_AXG_NCTF_48 VCC_AXG_24 AF26 PEG_RXP_13 AH45
27-C2 27-C3
27-D2 27-D3 72-C4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
AR37 AJ16 AA31 AG42
R711
R713
72-C4 27-D3 27-D2 27-C3
PEG1_RXP(15:0)
AM36 AJ17 AH20

PM-model
R712
RSVD_37 VCC_AXG_NCTF_51 VCC_AXG_27
PCIE GFX
AL36 RSVD_38 AJ19 VCC_AXG_NCTF_52 VCC_AXG_28 AH21

AM37 AK16 AH23 N45 C501 100nF
C48 RSVD_39 AK19 VCC_AXG_NCTF_53 VCC_AXG_29 AH24 PEG_TXN_0 U39 C898 100nF
RSVD_40 VCC_AXG_NCTF_54 VCC_AXG_30 PEG_TXN_1
1%
D47 AL16 AH26 U47 C503 100nF
s
B44 RSVD_41 AL17 VCC_AXG_NCTF_55 VCC_AXG_31 AD31 PEG_TXN_2 N51 C902 100nF
C44 RSVD_42 AL19 VCC_AXG_NCTF_56 VCC_AXG_32 AJ20 PEG_TXN_3 R50 C505 100nF
U32-2
CPU1_BSEL2
CPU1_BSEL1
CPU1_BSEL0
D20 AL20 AN14 T42 C906 100nF
2 OF 5
10K 14-A4 8-C4

B51 AL21 Y43 C508 100nF
10K 19-C3 14-B1

10K18-C3 14-B1
RSVD_45 VCC_AXG_NCTF_59 PEG_TXN_6
1%
AL23 T17 W46 C911 100nF
GFX VCC NCTF
VCC_AXG_NCTF_60 VCC_AXG_NCTF_1 PEG_TXN_7

AM15 VCC_AXG_NCTF_61 VCC_AXG_NCTF_2 T18 PEG_TXN_8 W38 C511 100nF
S fid
P27 AM16 T19 AD39 C915 100nF
11-A4
11-A4
11-A4
LE88CLPM
N27 CFG_0 AM19 VCC_AXG_NCTF_62 VCC_AXG_NCTF_3 T21 PEG_TXN_9 AC46 C513 100nF
N24 CFG_1 AM20 VCC_AXG_NCTF_63 VCC_AXG_NCTF_4 T22 PEG_TXN_10 AC49 C919 100nF
u
C21 CFG_2 AM21 VCC_AXG_NCTF_64 VCC_AXG_NCTF_5 T23 PEG_TXN_11 AC42 C515 100nF
C23 CFG_3 AM23 VCC_AXG_NCTF_65 VCC_AXG_NCTF_6 T25 PEG_TXN_12 AH39 C923 100nF
2
2
CFG_4 VCC_AXG_NCTF_66 VCC_AXG_NCTF_7 PEG_TXN_13

F23 CFG_5 AP15 VCC_AXG_NCTF_67 VCC_AXG_NCTF_8 U15 PEG_TXN_14 AE49 C157 100nF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
N23 CFG_6 AP16 VCC_AXG_NCTF_68 VCC_AXG_NCTF_9 U16 PEG_TXN_15 AH44 C926 100nF
G23 CFG_7 AP17 VCC_AXG_NCTF_69 VCC_AXG_NCTF_10 U17
MCH3_EXTTS0#
e
MCH3_EXTTS1#
MCH3_CLKREQ#
J20 AP19 U19
C20 CFG_8 AP20 VCC_AXG_NCTF_70 VCC_AXG_NCTF_11 U20 M45 C500 100nF
R24 CFG_9 AP21 VCC_AXG_NCTF_71 VCC_AXG_NCTF_12 U21 PEG_TXP_0 T38 C895 100nF
CFG_10 VCC_AXG_NCTF_72 VCC_AXG_NCTF_13 PEG_TXP_1
n
L23 AP23 U23 T46

DRAW
C502 100nF
CFG
CHECK CFG_11 VCC_AXG_NCTF_73 VCC_AXG_NCTF_14 PEG_TXP_2

J23 AP24 U26 N50 C900 100nF
APPROVAL
GFX VCC NCTF
E23 AR20 V16 R51 C506 100nF
MODULE CODE
E20 CFG_14 AR21 VCC_AXG_NCTF_76 VCC_AXG_NCTF_17 V17 PEG_TXP_5 U43 C904 100nF
K23 CFG_15 AR23 VCC_AXG_NCTF_77 VCC_AXG_NCTF_18 V19 PEG_TXP_6 W42 C507 100nF
M20 AR24 V20 Y47 C909 100nF
n

M24 AR26 V21 Y39 C510 100nF
L32 CFG_17 V26 VCC_AXG_NCTF_79 VCC_AXG_NCTF_20 V23 PEG_TXP_8 AC38 C914 100nF
N33 CFG_18 V28 VCC_AXG_NCTF_80 VCC_AXG_NCTF_21 V24 PEG_TXP_9 AD47 C512 100nF
g
L35 V29 Y15 AC50 C918 100nF

CFG_20 Y31 VCC_AXG_NCTF_82 VCC_AXG_NCTF_23 Y16 PEG_TXP_11 AD43 C514 100nF
t
KEVIN LEE
WUSHIJIANG
SUN XIAO
VCC_AXG_NCTF_83 VCC_AXG_NCTF_24 PEG_TXP_12

PEG_TXP_13 AG39 C921 100nF
PEG_TXP_14 AE50 C156 100nF
REV
DATE
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
PEG_TXP_15 AH43 C925 100nF

LAST EDIT
DEV. STEP
i
27-D2
NC PM ME CLK DMI PCIE GFX

1.0
PV2
6/26/2007
72-D4 27-D3
27-C3 27-C2
TITLE
a l
NC_16
NC_15
NC_14
NC_13
NC_12
NC_11
NC_10
NC_9
NC_8
NC_7
NC_6
NC_5
NC_4
NC_3
NC_2
NC_1
DPRSLPVR
THERMTRIP*
RSTIN*
PWROK
PM_EXT_TS*_1
PM_EXT_TS*_0
PM_DPRSTP*
PM_BM_BUSY*
CL_VREF
CL_RST*
CL_PWROK
CL_DATA
CL_CLK
PEG_CLK*
PEG_CLK
DPLL_REF_SSCLK*
DPLL_REF_SSCLK
DPLL_REF_CLK*
DPLL_REF_CLK
DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0
DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0
DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0
DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
GFX_VR_EN
GFX_VID_3
GFX_VID_2
GFX_VID_1
GFX_VID_0
PEG_COMPO
PEG_COMPI
A5
E1
J36
L36
L39
BJ1
A49
A50
B50
BL2
BL3
K45
K44
B42
E36
B39
A39
E35
PEG1_TXP(15:0)
C51
N20
H47
H48
C42
C38
N43
BK2
BK1
G36
G41
M43
BJ51
AJ42
AJ47
AJ41
AJ46
AJ39
AJ38
BL49
BL50
AT43
BK50
BK51
AV20
AK50
AN49
AN45
AN41
AN46
AN42
AN47
AM50
AM49
AM43
AM39
AM44
AM40
AM47
GMCH
Gevena
R698
CRESTLINE (2/5)
1
1
R736
October 23, 2007 10:38:02 AM

24.9
60-C4 22-C4
20-C1 11-C4
10022-B4
AW49 51-C4 34-A4 25-B2
60-C4 20-C1 11-D4
22-D4
14-A1
22-C2
25-C1 22-B4
22-C2
22-C2
8-B1
8-B1
22-C2
22-D2
22-D2
22-D2
22-C2
22-D2
22-D2
22-D2
22-C2
22-C2
22-D2
22-D2
22-C2
22-C2
22-D2
22-D2
PAGE
MCH3_CL_VREF
1%
1%
PART NO.
P1.05V_PEG
14
14-B1
PLT3_RST#
DMI1_TXP_3
DMI1_TXP_2
DMI1_TXP_1
DMI1_TXP_0
DMI1_TXN_3
DMI1_TXN_2
DMI1_TXN_1
DMI1_TXN_0
DMI1_RXP_3
DMI1_RXP_2
DMI1_RXP_1
DMI1_RXP_0
DMI1_RXN_3
DMI1_RXN_2
DMI1_RXN_1
DMI1_RXN_0
KBC3_PWRGD
C516
OF
100nF
CPU1_DPRSTP#
MCH3_CL_VREF
MCH3_EXTTS1#
MCH3_EXTTS0#
CHP3_CL_CLK_0
MCH3_BMBUSY#
CLK1_MCH3GPLL
CHP3_DPRSLPVR
CHP3_CL_RST#_0
CHP3_CL_DATA_0
CLK1_MCH3GPLL#
KBC3_PWRGD 25-A4
CPU1_THRMTRIP#
P1.25V
1K
SAMSUNG
1%
390
58
BA41-XXXXX
R501
R502
ELECTRONICS
21-C1
22-B4
39-C3
38-C2
37-A4
28-C3
27-C2
Connect to GND for PM-model

A
B
C
D
D:/tingting/geneva/Geneva_pr_1023
4 3 2 1
SAMSUNG PROPRIETARY
MEM1_ADQ(63:0) 18-D4
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
AW44
AW47
AW43
AW40
AW36
AW41
AW11
BG47
BG50
BG42
BG40
BG10
AR43
AR41
AR45
BH49
BH45
AR40
AU15
BD10
AN10
AN11
BA45
AY46
BB45
BB47
BE45
BE44
BE40
AY41
AV38
AV13
AV11
BA13
BA11
BE10
AT42
BF48
BF44
BF40
AT39
AT38
AT13
AT11
BJ45
AW9
AM8
AM9
BD8
BD7
AR5
AR8
AR9
AN3
AN9
AY9
BB9
BB5
AY7
AY6
BB7
AT5
AT7
AT9
D D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
BB19 AR49
MEM1_ABS0 18-B2 18-C4 BK19
SA_BS_0 SM_VREF_0
AW4 19-C3 18-C3
MEM1_VREF
MEM1_ABS1 18-B2 18-C4 BF29
SA_BS_1 SM_VREF_1 57-C4
MEM1_ABS2 18-B2 18-C4
18-B4
SA_BS_2
AW30
MEM1_ADM(7:0) 0 AT45
SM_CK*0
BA23 18-C4
CLK1_MCLK0#
1 BD44 SA_DM_0 SM_CK*1 AW25 18-B4
CLK1_MCLK1#
2 BD42
SA_DM_1 SM_CK*3
AW23 19-C4
CLK1_MCLK3#
DDR MUX
SA_DM_2 SYSTEM MEMORY A SM_CK*4 CLK1_MCLK4#
3 AW38 19-B4
SA_DM_3
4 AW13 AV29
5 BG8
SA_DM_4 SM_CK0
BB23 18-C4
CLK1_MCLK0
6 AY5
SA_DM_5 SM_CK1
BA25 18-C4
CLK1_MCLK1
7 AN6
SA_DM_6 SM_CK3
AV23 19-C4
CLK1_MCLK3
g
SA_DM_7 SM_CK4 19-C4
CLK1_MCLK4
MEM1_ADQS#(7:0) 18-A4 0 AT47 BE29
1 BD47
SA_DQS*_0 SM_CKE0
AY32 18-C2 18-B4
MEM1_CKE0
2 BC41
SA_DQS*_1 SM_CKE1
BD39 18-B4 18-B2
MEM1_CKE1
SA_DQS*_2 SM_CKE3 MEM1_CKE3
n
3 BA37 BG37 19-C2 19-B4
4 BA16 SA_DQS*_3 SM_CKE4 19-B4 19-B2
MEM1_CKE4
SA_DQS*_4
5 BH7 AY17
SA_DQS*_5 SB_BS_0 MEM1_BBS0
l
6 BC1 BG18 19-C4 19-B2
7 AP2
SA_DQS*_6 SB_BS_1
BG36 19-C4 19-B2
MEM1_BBS1
SA_DQS*_7 SB_BS_2 MEM1_BBS2
u
MEM1_ADQS(7:0) 18-B4 0 AT46 SA_DQS_0
U32-3 SB_DM_0 AR50 0
19-C4 19-B2
19-B4
MEM1_BDM(7:0)
a
1 BE48 BD49 1
SA_DQS_1 SB_DM_1
LE88CLPM
SYSTEM MEMORY A
2 BB43 BK45 2
SA_DQS_2 SB_DM_2
BC37 BL39
s
3 3
i
C 4 BB16 SA_DQS_3 SB_DM_3 BH12 4 C
SA_DQS_4 SB_DM_4
5 BH6 SA_DQS_5 3 OF 5 SB_DM_5 BJ7 5
t
6 BB2 BF3 6
SA_DQS_6 SB_DM_6
7 AP3 SA_DQS_7 SB_DM_7 AW2 7
MEM1_AMA(13:0) 18-C4 18-D2 0 BJ19 AU50 0 19-A4
MEM1_BDQS#(7:0)
SA_MA_0 SB_DQS*_0
m
1 BD20 BC50 1
n
2 BK27 SA_MA_1 SB_DQS*_1 BL45 2
SA_MA_2 SB_DQS*_2
3 BH28 SA_MA_3 SB_DQS*_3 BK38 3
4 BL24 BK12 4
5 BK28 SA_MA_4 SB_DQS*_4 BK7 5
SYSTEM MEMORY B
SA_MA_5 SB_DQS*_5
e
6 BJ27 BF2 6
7 BJ25 SA_MA_6 SB_DQS*_6 AV3 7
SA_MA_7 SB_DQS*_7
8 BL28
9 BA28
SA_MA_8
AT50 0 19-B4
MEM1_BDQS(7:0)
SA_MA_9 SB_DQS_0
10 BC19 BD50 1
S fid
SA_MA_10 SB_DQS_1
11 BE28 BK46 2
12 BG30 SA_MA_11 SB_DQS_2 BK39 3
SA_MA_12 SB_DQS_3
13 BJ16 BJ12 4
SA_MA_13 SB_DQS_4 BL7 5
SB_DQS_5
BL17 BE2 6
MEM1_ACAS# 18-B2 18-B4 BE18
SA_CAS* SB_DQS_6
AV2 7
MEM1_ARAS# 18-B2 18-B4 BA19
SA_RAS* SB_DQS_7
MEM1_AWE# 18-B2 18-B4 AY20
SA_WE*
BC18 0 19-C4
MEM1_BMA(13:0)
SA_RCVEN* SB_MA_0 BG28 1 19-D2
SB_MA_1
n
BG20 BG25 2
MEM1_CS0# 18-C2 18-C4 BK16 SM_CS*_0 SB_MA_2 AW17 3
MEM1_CS1# 18-C2 18-C4 BG16
SM_CS*_1 SB_MA_3
BF25 4
MEM1_CS2# SM_CS*_2 SB_MA_4
B MEM1_CS3#
19-C2 19-C4 BE13
SM_CS*_3 SB_MA_5
BE25 5 B
19-C2 19-C4 BA29 6
SB_MA_6
o
DDR MUX
BH18 BC28 7
MEM1_ODT0 18-B2 18-B4 BJ15 SM_ODT_0 SB_MA_7 AY28 8
MEM1_ODT1 18-B2 18-B4 BJ14
SM_ODT_1 SB_MA_8
BD37 9
P1.8V_AUX P1.8V_AUX MEM1_ODT2 19-B2 19-B4 BE16
SM_ODT_2 SB_MA_9
BG17 10
MEM1_ODT3 19-B2 19-B4
SM_ODT_3 SB_MA_10
BE37 11
SB_MA_11
R115 22.6 1% BL15 BA39 12
C
SM_RCOMP SYSTEM MEMORY B SB_MA_12
R116 22.6 1% BK14
SM_RCOMP* SB_MA_13
BG13 13
R129
BK31 BE17
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
1K SM_RCOMP_VOH SB_CAS* MEM1_BCAS#
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
1% BL31 AV16 19-B4 19-B2

SM_RCOMP_VOL SB_RAS*
BC17 19-B4 19-B2
MEM1_BRAS#
SB_WE*
AY18 19-B4 19-B2
MEM1_BWE#
C142 SB_RCVEN*
10nF
C140
R128 2200nF
16V
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
3.01K
1%
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
C143 C139 19-D4

MEM1_BDQ(63:0)
R127 10nF
1K 2200nF
16V
1%
Route as short as possible

A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 GMCH


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY. VCCP_CORE
EXCEPT AS AUTHORIZED BY SAMSUNG. 270uF P1.05V_PEG VCCP_CORE
C675 EC503 B32
C853 C676 C852 330uF BLM18PG181SN1
22000nF
1000nF 220nF 220nF 20% 2.5V
AL EC501
C179
10000nF 330uF
2.5V
D 6.3V AL D
B500 P1.25V
BLM18PG181SN1
AM35
AC33
AC35
AC36
AD33
AD35
AD36
AH33
AH35
AH36
AH37
AR35
AR36
AA33
AA35
AA36
AB33
AB36
AB37
AK33
AK35
AK36
AK37
AP35
AP36
AF33
AF36
AL33
AL35
AJ33
AJ35
AJ36
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
VCCP_CORE 220ohm@100MHz
R500
P3.3V P1.25V
VCC_NCTF_50
VCC_NCTF_49
VCC_NCTF_48
VCC_NCTF_47
VCC_NCTF_46
VCC_NCTF_45
VCC_NCTF_44
VCC_NCTF_43
VCC_NCTF_42
VCC_NCTF_41
VCC_NCTF_40
VCC_NCTF_39
VCC_NCTF_38
VCC_NCTF_37
VCC_NCTF_36
VCC_NCTF_35
VCC_NCTF_34
VCC_NCTF_33
VCC_NCTF_32
VCC_NCTF_31
VCC_NCTF_30
VCC_NCTF_29
VCC_NCTF_28
VCC_NCTF_27
VCC_NCTF_26
VCC_NCTF_25
VCC_NCTF_24
VCC_NCTF_23
VCC_NCTF_22
VCC_NCTF_21
VCC_NCTF_20
VCC_NCTF_19
VCC_NCTF_18
VCC_NCTF_17
VCC_NCTF_16
VCC_NCTF_15
VCC_NCTF_14
VCC_NCTF_13
VCC_NCTF_12
VCC_NCTF_11
VCC_NCTF_10
VCC_NCTF_9
VCC_NCTF_8
VCC_NCTF_7
VCC_NCTF_6
VCC_NCTF_5
VCC_NCTF_4
VCC_NCTF_3
VCC_NCTF_2
VCC_NCTF_1
1
VCC_PEG_1
AD51 C509
AL24
VCC_AXM_NCTF_1 VCC_PEG_2
V49 100nF
C857 AL26 VCC_AXM_NCTF_2 VCC_PEG_3 V50 C885 C504
C850 C855 AL28 W50 100nF C886
22000nF VCC_AXM_NCTF_3 VCC_PEG_4 10000nF
20% 220nF 220nF AL29 VCC_AXM_NCTF_4 VCC_PEG_5 W51 100nF 6.3V
AL31
PEG
g
AL32 VCC_AXM_NCTF_5 U51
VCC_AXM_NCTF_6 VCCA_PEG_PLL
AM26 VCC_AXM_NCTF_7 VCC NCTF
VCC AXM NCTF

AM28 K50
VCC_AXM_NCTF_8 VCCA_PEG_BG
AM29 VCC_AXM_NCTF_9
n
AM31 U48
VCC_AXM_NCTF_10 VCCD_PEG_PLL
C851 C856 C854 AM32
VCC_AXM_NCTF_11
100nF 100nF 100nF AM33
VCC_AXM_NCTF_12 VCCD_LVDS_1
J41
l
AP29 H42
VCC_AXM_NCTF_13 VCCD_LVDS_2
LVDS
AP31 VCC_AXM_NCTF_14
u
AP32 A41
VCC_AXM_NCTF_15 VCCA_LVDS
AP33 VCC_AXM_NCTF_16
a
AR31 A43
VCC_AXM_NCTF_17 VCC_TX_LVDS
AR32
AR33
VCC_AXM_NCTF_18 U32-4 J32
s i
C VCC_AXM_NCTF_19 VCC_SYNC C
LE88CLPM VCCA_CRT_DAC_1 A33
CRT
t
AJ23 B33
VCC_AXM_1 VCCA_CRT_DAC_2
P1.25V
AJ26 VCC_AXM_2 4 OF 5
VCC AXM
AK23 A30
AK24 VCC_AXM_3 VCCA_DAC_BG
VCC_AXM_4
m
AK29 C25
n
AT31 VCC_AXM_5 VCCA_TVA_DAC_1 B25
EC504 C864 VCC_AXM_6 VCCA_TVA_DAC_2
100uF AT33
22000nF VCC_AXM_7
C27
6.3V
20% VCCA_TVB_DAC_1
TV
AD AW18 B27
a
VCCA_SM_1 VCCA_TVB_DAC_2
e
AV19
AU19 VCCA_SM_2 B28
NO_STUFF VCCA_SM_3 VCCA_TVC_DAC_1
AU18 VCCA_SM_4 VCCA_TVC_DAC_2 A28
A SM
AU17
C815 C814 VCCA_SM_5
4700nF C813 AT22 B49
S fid
22000nF 1000nF AT21
VCCA_SM_6 VCCA_DPLLA
20% 10V
AT19 VCCA_SM_7 H49
VCCA_SM_8 VCCA_DPLLB
AT18
PLL
AT17 VCCA_SM_9 AL2
VCCA_SM_10 VCCA_HPLL
A SM CK A SM NCTF
AR17 AM2
VCCA_SM_NCTF_1 VCCA_MPLL P1.25V P1.25V
AR16 VCCA_SM_NCTF_2 B526
MMZ1608S121AT
P1.25V AN2
VCCD_HPLL P1.25V C735
n
BC29 AJ50 100nF
BB29 VCCA_SM_CK_1 VCC_DMI
C927 C679 C677 C678 MMZ1608S121AT
B525
R689
DMI
C859 C861 VCCA_SM_CK_2 22000nF
22000nF 1000nF VCC_RXR_DMI_1 AH50 100nF 100nF 20% 100nF 1
B 20% 6.3V
AU28
VCC_AXD_1 VCC_RXR_DMI_2
AH51 B
AU24 P1.05V_PEG
VCC_AXD_2
o
AT30 C40
VCC AXD
NO_STUFF AT29 VCC_AXD_3 VCC_HV_1 B40 C736
HV
VCC_AXD_4 VCC_HV_2 B29 22000nF
AT25 VCC_AXD_5 BLM18PG181SN1 20%
AT23 VCC SM LF VCC SM CK VCC SM M32
C862 VCC_AXD_6 VCCD_CRT
TV/CRT
1000nF C863 VCCD_TVDAC L29
C158 XC500
VCCP_CORE
VCC_SM_CK_4
VCC_SM_CK_3
VCC_SM_CK_2
VCC_SM_CK_1
100nF AR29 330uF

VCC_SM_LF_7
VCC_SM_LF_6
VCC_SM_LF_5
VCC_SM_LF_4
VCC_SM_LF_3
VCC_SM_LF_2
VCC_SM_LF_1
C
6.3V VCC_AXD_NCTF_1 N28
10000nF NO_STUFF
2.5V
VCC_SM_36
VCC_SM_35
VCC_SM_34
VCC_SM_33
VCC_SM_32
VCC_SM_31
VCC_SM_30
VCC_SM_29
VCC_SM_28
VCC_SM_27
VCC_SM_26
VCC_SM_25
VCC_SM_24
VCC_SM_23
VCC_SM_22
VCC_SM_21
VCC_SM_20
VCC_SM_19
VCC_SM_18
VCC_SM_17
VCC_SM_16
VCC_SM_15
VCC_SM_14
VCC_SM_13
VCC_SM_12
VCC_SM_11
VCC_SM_10
VCCD_QDAC 6.3V NO_STUFF
VCC_SM_9
VCC_SM_8
VCC_SM_7
VCC_SM_6
VCC_SM_5
VCC_SM_4
VCC_SM_3
VCC_SM_2
VCC_SM_1
B23 OXI
VCC AXF
NO_STUFF B21 VCC_AXF_1

VCC_AXF_2 If VCC_PEG = VCC_RXR_DMI
A21 P3.3V D517
VCC_AXF_3 Remove these parts
BAT54
R734 TP19346
12.11% 3 1
P1.25V
AT6
AW8
BD4
BD17
BE39
BC39
AW45
BJ23
BJ24
BK23
BK24
BL33
BK35
BK34
BK33
BK32
BJ34
BJ33
BJ32
BH35
BH34
BH32
BG35
BG33
BG32
BF34
BF33
BE35
BE33
BE32
BD35
BD32
BC35
BC33
BC32
BB33
BA35
BA33
BA32
AY35
AW35
AW33
AV33
AU35
AU33
AU32
AU30
C884
100nF
R715
0
P1.25V
B530 P1.5V
MMZ1608S121AT VCC_ PEG : P1.25V / P1.05V
C860 C858 C848
22000nF VCC_RXR_DMI : P1.25V / P1.05V
1000nF 100nF L10 P1.8V_AUX P1.8V_AUX
20%
1uH
NO_STUFF C849
EC505 100nF
C125 C123 C145 C144 C141
A 22000nF 22000nF 22000nF 330uF A
100nF 20% R114 100nF 20% 20%
2.5V
AL
Crestline : 22 uF, 5.6 nH 1
Crestline : 0ohm (No Filter) DRAW DATE TITLE
Crestline : 5.6 nH (Filter)

SUN XIAO 6/26/2007
Gevena SAMSUNG
C124 CHECK DEV. STEP
ELECTRONICS
10000nF WUSHIJIANG PV2 GMCH
6.3V APPROVAL REV PART NO.


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
*POCAFEB-11 Only (Remove in MP Model)
AW12
AW16
AW24
AW29
AW32
AM41
AM45
AN38
AN39
AN43
AR11
AR39
AR44
AR47
AU23
AU29
AU36
AU49
AU51
AP48
AP50
AV25
AV39
AV48
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
AT10
AT14
AT27
AT41
AT49
AW1
AW5
AW7
AM4
AN1
AN5
AN7
AR2
AR7
AU1
AU3
AP4
B10
D Current Setting (def. : default Option) D
CFG# Low High
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
A13 B20
VSS_1 VSS_121
A15 VSS_2 VSS_122 B24 CFG(5) DMIx2 DMIx4 (def.)
A17 B29 CFG(6) Reserved DDR-II (def.)
VSS_3 VSS_123
A24 B30
AA21
VSS_4 VSS_124
B35
CFG(7) DT/Transportable Mobile CPU (def.)
AA24 VSS_5 VSS_125 B38 CFG(9) PEG Reversal Normal
VSS_6 VSS VSS_126
AA29
VSS_7 VSS_127
B43 CFG(16) Dynamic ODT Dynamic ODT
AA32 B46 Disabled Enabled (def.)
VSS_8 VSS_128
AB20 B5
AB23
VSS_9
C36 L24
VSS_129
B8
CFG(18) VCC 1.05V (def.) VCC 1.5V
VSS_10 VSS_211 VSS_262 VSS_130 CFG(19) DMI Lane Normal DMI Lane Reversal
AB26 VSS_11 C7 VSS_212 VSS_263 L28 VSS_131 BA1
AB28 D13 L3 BA17 SDVO or PCIE X1
g
VSS_12 VSS_213 VSS_264 VSS_132 CFG(20) SDVO and PCIE X1
AB31 D24 L33 BA18 Only(def.) Simultaneously
VSS_13 VSS_214 VSS_265 VSS_133
AB32 VSS_14 D3 VSS_215 VSS_266 L49 VSS_134 BA2
AC10 D32 M28 BA24
AC13 VSS_16 D39 VSS_217 VSS_268 M42 VSS_136 BB12
n
AC3 D45 M46 BB25
AC39 VSS_17 D49 VSS_218 VSS_269 M49 VSS_137 BB40
AC43 E10 M5 BB44
l
AC47 E16 M50 BB49
AD1
VSS_20
VSS_21 E24
VSS_221
VSS_222
U32-5 VSS_272
VSS_273 M9
VSS_140
VSS_141 BB8
u
AD21 E28 N11 BC16
AD26
VSS_22
VSS_23 E32
VSS_223
VSS_224
LE88CLPM VSS_274
VSS_275 N14
VSS_142
VSS_143 BC24
a
AD29 E47 N17 BC25
AD3
AD32
VSS_24
VSS_25
F19
F36
VSS_225
VSS_226 5 OF 5 VSS_276
VSS_277
N29
N32
VSS_144
VSS_145
BC36
BC40
s i
C AD41 VSS_26 F4 VSS_227 VSS_278 N36 VSS_146 BC51 C
AD45 VSS_28 F40 VSS_229 VSS_280 N39 VSS_148 BD13
t
AD49 F50 N44 BD2
AD5 VSS_30 G1 VSS_231 VSS_282 N49 VSS_150 BD28
AD50 G13 N7 BD45
AD8 VSS_31 G16 VSS_232 VSS_283 P19 VSS_151 BD48
m
AE10 G19 P2 BD5
n
AE14 VSS_33 G24 VSS_234 VSS_285 P23 VSS_153 BE1
AE6 G28 P29 BE19
VSS
VSS
VSS
AF20 G29 P3 BE23
VSS
AF23 VSS_36 G33 VSS_237 VSS_288 P50 VSS_156 BE30
a
e
AF24 G42 R49 BE42
AF28 VSS_38 G45 VSS_239 VSS_290 T39 VSS_158 BE51
AF29 VSS_40 G48 VSS_241 VSS_292 T43 VSS_160 BE8
AF31 G8 T47 BF12
AG2 H24 U41 BF16
S fid
AG38 H28 U45 BF36
AG43 VSS_43 H4 VSS_244 VSS_295 U50 VSS_163 BG19
AG47 H45 V2 BG2
AG50 VSS_45 H50 VSS_246 VSS_297 V3 VSS_165 BG24
AH3 VSS_47 J11 VSS_248 VSS_299 W11 VSS_167 BG29
AH40 J16 W39 BG39
AH7 J24 W47 BG5
n
AJ11 J33 W7 BH17
AJ13 VSS_52 J35 VSS_253 VSS_304 Y11 VSS_172 BH30
AJ21 VSS_54 J39 VSS_255 VSS_306 Y13 VSS_174 BH44
B AJ24
VSS_55
K12
VSS_256 VSS_307
Y2
VSS_175
BH46 B
AJ29 K47 Y41 BH8
o
AJ32 K8 Y45 BJ11
AJ43 VSS_57 L1 VSS_258 VSS_309 Y49 VSS_177 BJ13
AJ45 VSS_59 L17 VSS_260 VSS_311 Y5 VSS_179 BJ38
AJ49 L20 Y50 BJ4
AK20 VSS_61 VSS_181 BJ42
AK21 BJ46
C
AK26 VSS_62 VSS_182 BK15
VSS_63 VSS SCB VSS NCTF VSS VSS_183
AK28 BK17
AK31 VSS_64 VSS_184 BK25
VSS_65 VSS_185
VSSA_PEG_BG
VSSA_DAC_BG
AK51 BK29
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_66 VSS_186
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
AL1 BK36
VSSA_LVDS
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6
VSS_67 VSS_187
AM11 VSS_68 VSS_188 BK40
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
AM13 BK44
AM3 VSS_69 VSS_189 BK6
VSS_70 VSS_190
K49
B41
B32
A3
B2
A51
BL1
BL51
C1
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
T27
T37
U24
U28
V31
V35
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
T33
T31
T29
R28
C50
C46
C41
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 GMCH


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL P0.9V
MEM1_AMA(13:0)
EXCEPT AS AUTHORIZED BY SAMSUNG. 15-B4 18-D4
Array resistors & Single resistors used to improve layout & routing.
0 RA517-2 3 4 56
1 RA510-1 1 2 56
2 RA516-1 1 2 56
3 RA510-2 3 4 56
D D
ME POWER RAIL UNDER ME ENABLE
4 RA516-2 3 4 56
5 RA511-2 3 4 56
MEM1_ADQ(63:0)
6 RA514-1 1 2 56
15-D3 P1.8V_AUX 7 RA514-2 3 4 56
DDR1-2
DDR2-SODIMM-200P-RVS 8 RA511-1 1 2 56
9 RA513-2 3 4 56
2/2 10 RA509-2 3 4 56
DDR1-1 112
VDD1 VSS16
18 11 RA515-1 1 2 56
111 24
DDR2-SODIMM-200P-RVS 117
VDD2 VSS17
41
VDD3 VSS18
1/2 96 53 12 RA513-1 1 2 56
g
MEM1_AMA(13:0) 15-C4 0 102 5 0 95
VDD4 VSS19
42 13 RA502-1 1 2 56
18-D2 A0 DQ0 VDD5 VSS20
1 101 7 1 118 54
A1 DQ1 VDD6 VSS21
2 100 17 2 81 59 R690 56.2 1%
3 99
A2 DQ2
19 3 82
VDD7 VSS22
65
MEM1_AMA(14) 14-A3 18-C4
A3 DQ3 VDD8 VSS23
n
4 98 4 4 87 60
A4 DQ4 VDD9 VSS24
5 97 6 5 103 66
A5 DQ5 P3.3V VDD10 VSS25
6 94 14 6 88 127
A6 DQ6 VDD11 VSS26
l
7 92 16 7 104 139
A7 DQ7 VDD12 VSS27
8 93 23 8 128
A8 DQ8 VSS28
u
9 91 25 9 199 145
A9 DQ9 VDDSPD VSS29
10 105 35 10 165
A10_AP DQ10 VSS30
a
11 90
A11 DQ11
37 11 C63 C62 83
NC1 VSS31
171
12 89
A12 DQ12
20 12 100nF
2200nF 120
NC2 VSS32
172
s
13 116 22 13 50 177
i
C 86
A13 DQ13
36 14 69
NC3 VSS33
187
MEM1_AMA(14) 14-A3 18-C2 84
A14 DQ14
38 15 163
NC4 VSS34
178
A15 DQ15 NCTEST VSS35
t
85 43 16 190
MEM1_ABS2 15-D4 18-B2
A16_BA2 DQ16
45 17
MCH3_EXTTS0#
14-A2 14-B1 1
VSS36
9
DQ17 MEM1_VREF VREF VSS37
107 55 18 15-D1 19-C3 57-C4 21
MEM1_ABS0 15-D4 18-B2 106
BA0 DQ18
57 19 201
VSS38
33
MEM1_ABS1 BA1 DQ19 GND0 VSS39 P0.9V
m
15-D4 18-B2 44 20 C324C992 202 155
n
DQ20 GND1 VSS40
110 46 21 100nF
2200nF 34
MEM1_CS0# 15-B4 18-C2 115
S0* DQ21
56 22 47
VSS41
132
MEM1_CS1# 15-B4 18-C2
S1* DQ22
58 23 133
VSS1 VSS42
144
DQ23 VSS2 VSS43
30 61 24 183 156 14-B1 18-C4 RA503-1 1 2 56
a
CLK1_MCLK0 CK0 DQ24 VSS3 VSS44 MEM1_CS0#
e
15-D1 32 63 25 77 168 14-B1 18-C4 RA500-1 1 2 56
CLK1_MCLK0# 15-D1 164
CK0* DQ25
73 26 12
VSS4 VSS45
2
MEM1_CS1# 14-B1 18-C2 RA508-2 3 4 56
CLK1_MCLK1 CK1 DQ26 VSS5 VSS46 MEM1_CS2#
CLK1_MCLK1#
15-D1 166
CK1* DQ27
75 27 48
VSS6 VSS47
3 MEM1_CS3#
14-B1 18-C2 RA505-2 3 4 56
15-D1 79 62 28 184 15
MEM1_CKE0 15-C1 18-C2 80
CKE0 DQ28
64 29 78
VSS7 VSS48
27
S fid
MEM1_CKE1 CKE1 DQ29 VSS8 VSS49
15-C1 18-B2
DQ30
74 30 71
VSS9 VSS50
39
MEM1_CKE0
14-B1 18-C4 RA512-1 1 2 56
113 76 31 72 149 14-B1 18-C4 RA515-2 3 4 56
MEM1_ACAS# CAS* DQ31 VSS10 VSS51 MEM1_CKE1
15-B4 18-B2 108 123 32 121 161 14-B1 18-C2 RA521-2 3 4 56
MEM1_ARAS# 15-B4 18-B2 109
RAS* DQ32
125 33 122
VSS11 VSS52
28
MEM1_CKE3 14-B1 18-C2 RA523-2 3 4 56
MEM1_AWE# 15-B4 18-B2
WE* DQ33
135 34 196
VSS12 VSS53
40
MEM1_CKE4
DQ34 VSS13 VSS54
R601 10K 1%
198
SA0 DQ35
137 35 193
VSS14 VSS55
138
R602 10K 1%
200
SA1 DQ36
124 36 8
VSS15 VSS56
150 MEM1_ODT0
14-B1 18-B4 RA502-2 3 4 56
197 126 37 162 14-B1 18-B4 RA500-2 3 4 56
SMB3_CLK 19-B4 22-B1 195
SCL DQ37
134 38
VSS57 MEM1_ODT1 14-B1 18-B2 RA507-1 1 2 56
SMB3_DATA SDA DQ38 MEM1_ODT2
n
DQ39
136 39
MEM1_ODT3
14-B1 18-B2 RA505-1 1 2 56
114 141 40
MEM1_ODT0 15-B4 18-B2 119
ODT0 DQ40
143 41
MEM1_ODT1 ODT1 DQ41
B MEM1_ADM(7:0)
15-B4 18-B2
DQ42
151 42
MEM1_ABS0
15-D4 18-C4 RA509-1 1 2 56
15-D4 0 10
DM0 DQ43
153 43
MEM1_ABS1
15-C4 18-C4 RA517-1 1 2 56
o
1 26
DM1 DQ44
140 44
MEM1_ABS2
15-C4 18-C4 RA512-2 3 4 56
2 52 142 45
DM2 DQ45
3 67
DM3 DQ46
152 46
MEM1_ACAS#
15-B4 18-C4 RA501-1 1 2 56
4 130
DM4 DQ47
154 47
MEM1_ARAS#
15-B4 18-B4 RA503-2 3 4 56
5 147
DM5 DQ48
157 48
MEM1_AWE#
15-B4 18-B4 RA501-2 3 4 56
6 170 159 49
C
DM6 DQ49 ME POWER RAIL UNDER ME ENABLE
7 185 173 50
DM7 DQ50
175 51 15-D2 18-C2 RA504-1 1 2 56
MEM1_ADQS(7:0) 15-C4 0 13
DQ51
158 52
MEM1_BBS0 15-C2 18-C2 RA525-2 3 4 56
DQS0 DQ52 MEM1_BBS1
1 31
DQS1 DQ53
160 53 Place near SO-DIMM0 MEM1_BBS2
15-C2 18-C2 RA521-1 1 2 56
2 51 174 54 P1.8V_AUX
DQS2 DQ54
3 70
DQS3 DQ55
176 55
MEM1_BCAS#
15-B2 18-C2 RA506-1 1 2 56
4 131
DQS4 DQ56
179 56
MEM1_BRAS#
15-B2 18-B2 RA508-1 1 2 56
5 148
DQS5 DQ57
181 57 EC510 MEM1_BWE#
15-B2 18-B2 RA506-2 3 4 56
6 169
DQS6 DQ58
189 58 330uF C688 C687 C681 C738 C737 C747 C750 C748 C749
7 188
DQS7 DQ59
191 59 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF
180 60 AL
MEM1_ADQS#(7:0) 15-C4 0 11
DQ60
182 61 NO_STUFF
DQS*0 DQ61
1 29 192 62
DQS*1 DQ62
2 49 194 63
DQS*2 DQ63
3 68
DQS*3
4 129
DQS*4 B
5 146 Place one cap close to every 2 pull-up resistors terminated to P0.9V
DQS*5 P0.9V
6 167
DQS*6
7 186
DQS*7
A EMI2 EMI3 EMI1 A
C744 C745 C743 C746 C685 C686 C742 C682 C684 C683 C740 C739 C741
EMI EMI EMI 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF DRAW DATE TITLE
CONTACT-PLATE-EMI CONTACT-PLATE-EMI CONTACT-PLATE-EMI
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 SODIMM
NO_STUFF
KEVIN LEE 1.0 DDR2 CH A BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
DDR SO-DIMM #1
D D
Array resistors & Single resistors used to improve layout & routing.
MEM1_BDQ(63:0) 15-A1 P1.8V_AUX P0.9V
DDR2-2
DDR2-SODIMM-200P-RVS
2/2
DDR2-1 112 18
g
VDD1 VSS16
111 24
DDR2-SODIMM-200P-RVS 117
VDD2 VSS17
41
VDD3 VSS18
MEM1_BMA(13:0)
1/2 96
VDD4 VSS19
53
19-D2 0 102 5 0 95 42
A0 DQ0 VDD5 VSS20
n
15-B1 1 101 7 1 118 54
A1 DQ1 VDD6 VSS21
2 100 17 2 81 59
A2 DQ2 VDD7 VSS22
3 99 19 3 82 65 R691 56.2 1%
A3 DQ3 VDD8 VSS23 MEM1_BMA(14)
l
4 98 4 4 87 60 14-A3 19-C4
A4 DQ4 VDD9 VSS24
5 97 6 5 103 66
A5 DQ5 VDD10 VSS25
u
6 94 14 6 P3.3V 88 127
A6 DQ6 VDD11 VSS26 MEM1_BMA(13:0)
7 92 16 7 104 139 15-B2 18-D2
A7 DQ7 VDD12 VSS27
a
8 93 23 8 128
A8 DQ8 VSS28
9 91
A9 DQ9
25 9 199
VDDSPD VSS29
145 0 RA525-1 1 2 56
RA518-1
s
10 105 35 10 165 1 56
i
1 2
C 11 90
A10_AP DQ10
37 11 C649C648 83
VSS30
171 2 RA524-2 3 4 56 C
A11 DQ11 NC1 VSS31
12 89
A12 DQ12
20 12 100nF
2200nF 120
NC2 VSS32
172 3 RA518-2 3 4 56
t
13 116 22 13 50 177
A13 DQ13 NC3 VSS33
86 36 14 69 187
MEM1_BMA(14) A14 DQ14 NC4 VSS34
14-A3 19-C2 84
A15 DQ15
38 15 163
NCTEST VSS35
178 4 RA524-1 1 2 56
85 43 16 190 5 RA519-1 1 2 56
MEM1_BBS2 A16_BA2 DQ16 MCH3_EXTTS1# VSS36
m
15-C1 19-B2 45 17 14-A2 14-B1 1 9 6 RA522-2 3 4 56
n
107
DQ17
55 18 MEM1_VREF 15-D1 18-C3 57-C4
VREF VSS37
21 7 RA522-1 1 2 56
MEM1_BBS0 15-C1 19-B2 106
BA0 DQ18
57 19 201
VSS38
33
MEM1_BBS1 BA1 DQ19 GND0 VSS39
15-C1 19-B2
DQ20
44 20 C163C164 202
GND1 VSS40
155
110 46 21 100nF
2200nF 34 8 RA519-2 3 4 56
a
MEM1_CS2# S0* DQ21 VSS41
e
15-B4 19-C2 115 56 22 47 132 9 RA520-1 1 2 56
MEM1_CS3# 15-B4 19-C2
S1* DQ22
58 23 133
VSS1 VSS42
144 10 RA504-2 3 4 56
DQ23 VSS2 VSS43
CLK1_MCLK3 30
CK0 DQ24
61 24 183
VSS3 VSS44
156 11 RA523-1 1 2 56
15-C1 32 63 25 77 168
CLK1_MCLK3# 15-D1 164
CK0* DQ25
73 26 12
VSS4 VSS45
2
S fid
CLK1_MCLK4 CK1 DQ26 VSS5 VSS46
15-C1 166 75 27 48 3 12 RA520-2 3 4 56
CLK1_MCLK4# 15-D1 79
CK1* DQ27
62 28 184
VSS6 VSS47
15 13 RA507-2 3 4 56
P3.3V MEM1_CKE3 15-C1 19-C2 80
CKE0 DQ28
64 29 78
VSS7 VSS48
27
MEM1_CKE4 15-C1 19-B2
CKE1 DQ29
74 30 71
VSS8 VSS49
39
DQ30 VSS9 VSS50
113 76 31 72 149
MEM1_BCAS# 15-B1 19-B2 108
CAS* DQ31
123 32 121
VSS10 VSS51
161
MEM1_BRAS# 15-B1 19-B2 109
RAS* DQ32
125 33 122
VSS11 VSS52
28
MEM1_BWE# 15-A1 19-B2
WE* DQ33
135 34 196
VSS12 VSS53
40
DQ34 VSS13 VSS54
R74 10K 1%198
SA0 DQ35
137 35 193
VSS14 VSS55
138
n
R73 10K 1%200
SA1 DQ36
124 36 8
VSS15 VSS56
150
197 126 37 162
SMB3_CLK 18-B4 22-B1 195
SCL DQ37
134 38
VSS57
SMB3_DATA SDA DQ38
B DQ39
136 39 B
114 141 40
MEM1_ODT2 ODT0 DQ40
o
15-B4 19-B2 119 143 41
MEM1_ODT3 15-B4 19-B2
ODT1 DQ41
151 42
MEM1_BDM(7:0) 15-C1 0 10
DQ42
153 43
DM0 DQ43
1 26 140 44
DM1 DQ44
2 52 142 45
DM2 DQ45
3 67 152 46
C
DM3 DQ46
4 130 154 47
DM4 DQ47
5 147 157 48
DM5 DQ48
6 170 159 49
DM6 DQ49
7 185 173 50
DM7 DQ50
175 51
MEM1_BDQS(7:0) 15-B1 0 13
DQ51
158 52
DQS0 DQ52
1 31
DQS1 DQ53
160 53 Place near SO-DIMM1 Place one cap close to every 2 pull-up resistors terminated to P0.9V
2 51 174 54 P1.8V_AUX P0.9V
DQS2 DQ54
3 70 176 55
DQS3 DQ55
4 131 179 56
DQS4 DQ56
5 148 181 57 EC502
DQS5 DQ57
6 169
DQS6 DQ58
189 58 330uF C763 C762 C697 C751 C752 C695 C761 C696 C760 C689 C693 C754 C690 C755 C757 C691 C694 C692 C753 C756 C759 C758
7 188
DQS7 DQ59
191 59 2.5V 2200nF 2200nF 2200nF 2200nF 2200nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
180 60 AL
MEM1_BDQS#(7:0) 15-C1 0 11
DQ60
182 61
DQS*0 DQ61 NO_STUFF
1 29 192 62
DQS*1 DQ62
2 49
DQS*2 DQ63
194 63 NO_STUFF
3 68
DQS*3
4 129
DQS*4
5 146
A 6 167
DQS*5
EMI4 EMI5 A
DQS*6
7 186
DQS*7 EMI EMI DRAW DATE TITLE
CONTACT-PLATE-EMI CONTACT-PLATE-EMI
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 SODIMM
KEVIN LEE 1.0 DDR2 CH B BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D U33-1 D
NH82801HBM
1/5
AG25 E5 0 51-C3 50-C2
LPC3_LAD(3:0)
RTCX1 FWH0_LAD0 66-A3 65-C3
AF24 F5 1
RTCX2 FWH1_LAD1
R177
G8 2
10M
FWH2_LAD2
AF23 F6 3
CHP3_RTCRST# RTCRST* FWH3_LAD3
RTC
LPC
20-B4
AD22 C4
Y1 CHP3_INTRUDER# 25-D3
20-B4 AF25
INTRUDER* FWH4_LFRAME*
66-A3 65-C3 51-C3 50-C2
LPC3_LFRAME#
0.032768MHz CHP3_INTVRMEN INTVRMEN
G9 VCCP_CORE
25-D3 AD21
LDRQ0*
E6
CHP3_LDRQ0#
1 4
CHP3_LAN100_SLP LAN100_SLP LDRQ1*_GPIO23 CHP3_LDRQ1#
g
2 3 B24 AF13
GLAN_CLK A20GATE
AG26 51-B3 21-B3
KBC3_A20G R178
D22
A20M* 10-C3
CPU1_A20M# 56.2
1%
C180 C189 LAN_RSTSYNC
AF26
0.007nF 0.007nF DPRSTP* CPU1_DPRSTP#
n
C21 AE26 60-C4 14-B1 11-D4
B21
LAN_RXD0 DPSLP* 11-D4
CPU1_DPSLP#
LAN_RXD1
LAN / GLAN
C22 AD24
LAN_RXD2 FERR* CPU1_FERR#
l
10-C3
D21 AG29
LAN_TXD0 CPUPWRGD_GPIO49 CPU1_PWRGDCPU
u
E20 11-C4
LAN_TXD1
C20 AF27
LAN_TXD2 IGNNE* CPU1_IGNNE#
CPU
10-C3
AH21 AE24 VCCP_CORE
P1.5V GLAN_DOCK*_GPIO13 INIT* CPU1_INIT#
s
AC20
i
10-C3
C D25
INTR
AH14 10-B3
CPU1_INTR C
GLAN_COMPI RCIN* KBC3_CPURST#
R269 24.9 1%C25
GLAN_COMPO
51-B3 21-B3
R176
t
AUD3_BCLK R194 33 1608 AD23 56.2
NMI CPU1_NMI
MDC3_BCLK 40-C4 R158 33 AJ16
HDA_BIT_CLK SMI*
AG28 10-B3
CPU1_SMI# 1%
65-C1 R198 33 AJ15 10-B3
AUD3_SYNC 40-C4 R159 33 R196 33
HDA_SYNC
AA24
MDC3_SYNC AUD3_RST# TP19110 STPCLK* CPU1_STPCLK#
m
65-C2 40-C4 R200 33 AE14 10-B3
n
P3.3V_MICOM MDC3_RST# 65-C2
HDA_RST*
AE27 R173 24.9 1%
P3.3V AJ17
THRMTRIP* CPU1_THRMTRIP#
AUD3_SDI0 65-C2 AH17
HDA_SDIN0
AA23 TP19114 11-C4
14-B1
IHDA
PRTC_BAT MDC3_SDI1 65-C2 AH15
HDA_SDIN1 TP8
a
HDA_SDIN2 IDE5_D(0:15)
e
AD13 V1 0 64-C4 64-C2
2
NO_STUFF R202 HDA_SDIN3 DD0

BAT54C
R205 33 U2 1 63-C3 63-B3

1K MDC3_SDO DD1
R522 1M 1% 1% R204
40-C4 65-D2 33 AE13 V3 2
D500
CHP3_INTRUDER# AUD3_SDO 71-B3 HDA_SDOUT DD2

T1 3
3
20-D3
DD3 Place 56 ohm resistor within 2" of ICH7-M
R215
C544 P3.3V AE10 V4 4
S fid
HDA_DOCK_EN*_GPIO33 DD4
10K
1000nF AG14 T5 5 Place PU resistor within 2" of 56ohm res.
1
HDA_DOCK_RST*_GPIO34 DD5
AB2 6
DD6
AF10 T6 7
CHP3_SATALED# 63-B2 SATALED* DD7
T3 8
DD8
SAT1_RXN0 C987 4.7nF 25V AF6
SATA0RXN DD9
R2 9
R521 20K 1% 63-B3 C988 4.7nF 25V AF5 T4 10
CHP3_RTCRST# SAT1_RXP0 SATA0RXP DD10
20-D3
SAT1_TXN0
63-B3 C944 4.7nF 25VAH5
SATA0TXN DD11
V6 11
63-B3 C943 4.7nF 25VAH6 V5 12
SAT1_TXP0 63-B3
SATA0TXP DD12
U1 13
DD13
n
C545 AG3
SATA1RXN DD14
V2 14
HDR-2P-SMD 1000nF AG4 U6 15
IDE
J506 SATA1RXP DD15
AJ4
SATA1TXN
B R520 1K 1% AJ3 AA4 B
SATA
2 SATA1TXP DA0
AA1 64-C3 63-C3
IDE5_A0
1 DA1 IDE5_A1
o
R523 AF2 AB3 64-C3 63-C3
NO_STUFF AF1
SATA2RXN DA2 64-C3 63-C3
IDE5_A2
1M SATA2RXP
1% AE4 Y6
For RTC Reset AE3
SATA2TXN DCS1*
Y5 64-C3 63-C3
IDE5_CS1#
SATA2TXP DCS3* 64-C3 63-C3
IDE5_CS3#
AB7 W4
C
CLK1_SATA# 8-B1 AC6
SATA_CLKN DIOR*
W3 64-C3 63-C3
IDE5_IOR#
CLK1_SATA 8-B1
SATA_CLKP DIOW*
Y2 64-C3 63-C3
IDE5_IOW#
TP19112 AG1
DDACK*
Y3 64-C3
63-C3 63-C3
IDE5_DACK#
AG2
SATARBIAS* IDEIRQ
Y1 21-B3 64-C3 IDE5_IDEIRQ
SATARBIAS IORDY
W5 64-C3 63-C3
IDE5_IORDY
SATA Cap. Place ment : DDREQ 64-C3 63-C3
IDE5_DREQ
R219
Distance b/w the ICH8-M & cap on the "P" signal should be identical 24.9
1% 1608
distance b/w the ICH8-M & cap on the "N" signal same pair.
Place within 500 mils of ICH8-M
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 ICH8-M
KEVIN LEE 1.0 ICH8-M (1/5) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
U33-2
NH82801HBM
2/5
D20 A4 PCI3_REQ0#
AD0 PCI REQ0*
E19 D7 34-B4 21-B3
D19
AD1 GNT0*
E18 34-B4 25-C3
PCI3_GNT0#
AD2 REQ1*_GPIO50
A20 C18
AD3 GNT1*_GPIO51
D17 B19
P3.3V AD4 REQ2*_GPIO52
A21 F18
AD5 GNT2*_GPIO53
A19 A11
AD6 REQ3*_GPIO54
C19 C10
g
AD7 GNT3*_GPIO55
A18
AD8
B16 C17
AD9 C_BE0*
R213 10K 1% A12 E15
65-C3 51-B3 50-C2
PCI3_CLKRUN# E16
AD10 C_BE1*
F16
34-A4 22-C4 AD11 C_BE2*
n
A14 E17
AD12 C_BE3*
G16
AD13
R315 10K 1% A15 C8
PCI3_PERR# AD14 IRDY* PCI3_IRDY#
l
R314 10K 1% 34-A4 21-C1 B6 D9 34-B4
PCI3_PLOCK# AD15 PAR
R276 10K 1% 21-C1
PCI3_DEVSEL# C11
AD16 PCIRST*
G6
u
R309 10K 1% 34-B4 21-C1 A9 D16
PCI3_FRAME# AD17 DEVSEL* PCI3_DEVSEL#
R275 10K 1% 34-B4 21-C1
PCI3_STOP# D11
AD18 PERR*
A7 34-B4 21-C3
PCI3_PERR#
a
R279 10K 1% 34-A4 21-C1 B12 B7 34-A4 21-C3
R313 10K 1% 34-A4 21-C1
PCI3_SERR# C12
AD19 PLOCK*
F10 21-C3
PCI3_PLOCK#
PCI3_IRDY# AD20 SERR* PCI3_SERR#
R280
s
10K 1% D10 C16
i
34-B4 21-C1 34-A4 21-C3
C 34-B4 21-C1
PCI3_TRDY# C7
AD21 STOP*
C9 34-A4 21-C3
PCI3_STOP# C
F13
AD22 TRDY*
A17 34-B4 21-C3
PCI3_TRDY#
AD23 FRAME* PCI3_FRAME#
t
E11 39-C3 37-A4 34-B4 21-C3
AD24
R282 10K 1%
PCI3_INTA# E13
AD25 PLTRST* R180
AG24 28-C3 0
PLT3_RST#
R287 10K 1% 21-B3 E12 B10 38-C2 27-C2 22-B4 14-B1
R285 10K 1% 21-B3
PCI3_INTB# D8
AD26 PCICLK
G7 8-C4
CLK3_PCLKICH
PCI3_INTC# AD27 PME*
m
R312 10K 1% 21-B3 A6
n
21-B3
PCI3_INTD# E8
AD28
AD29
R283 10K 1%
PCI3_INTE# D6
AD30
R277 10K 1% 34-C3 21-B1 A3
R278 10K 1% 34-C3 21-B1
PCI3_INTF# AD31
a
PCI3_INTG#
e
R317 10K 1% 34-B3 21-B1 F9 F8
21-B1
PCI3_INTH# PCI3_INTA# 21-C3 B5
PIRQA* Interrupt I/F PIRQE*_GPIO2
G11 34-C3 21-C3
PCI3_INTE#
PCI3_INTB# 21-C3 C5
PIRQB* PIRQF*_GPIO3
F12 34-C3 21-B3
PCI3_INTF#
PCI3_INTC# 21-C3 A10
PIRQC* PIRQG*_GPIO4
B3 34-B3 21-B3
PCI3_INTG#
PCI3_INTD# PIRQD* PIRQH*_GPIO5 PCI3_INTH#
R316 10K 1% 21-C3 21-B3
S fid
34-B4 21-D1
PCI3_REQ0# P27 F27
PEX1_GLAN_RXN3 45-D4 P26
PERN0 PCI - Express PERN4
F26 47-C3
PEX1_NF_RXN0 48-B3
PEX1_GLAN_RXP3 PERP0 PERP4 PEX1_NF_RXP0 48-B3
45-D4 C318 100nF N29 E29 100nF C253 47-C3
PEX1_GLAN_TXN3 45-D4 C323 100nF N28
PETN0 PETN4
E28 100nF C254 47-C3
PEX1_NF_TXN0 48-B3
65-D3
PEX1_GLAN_TXP3 PETP0 PETP4 PEX1_NF_TXP0 48-B3
R209 10K 1% 50-C2 51-C3
CHP3_SERIRQ
47-B3
34-C3 22-C4
R243 10K 1% M27 D27
63-C3 20-B1 IDE5_IDEIRQ PEX1_MINRXN1 38-C3 M26
PERN1 PERN5_GLAN_RXN
D26
64-C3 PEX1_MINRXP1 PERP1 PERP5_GLAN_RXP
38-C3 C257 100nF L29 C29
R199 10K 1% PEX1_MINTXN1 38-C3 C214 100nF L28
PETN1 PETN5_GLAN_TXN
C28
KBC3_CPURST# PEX1_MINTXP1 PETP1 PETP5_GLAN_TXP
n
R206 10K 1% 51-B3 20-C1
51-B3 20-C1
KBC3_A20G
PEX1_EXPRN2 K27 PERN2
PEX1_EXPRP2 K26 PERP2
B R201 10K 1%
22-B4 8-B4 CHP3_SATACLKREQ# PEX1_EXPTXN2
C255 100nF J29 PETN2 B
NO_STUFF R214 10K 1% C256 100nF J28 C23 R307 15 1%
CHP3_BIOSWP# PEX1_EXPTXP2 PETP2 SPI_CLK SPI3_CLK
o
26-C4 26-C2 B23 R308 15 1% 26-C3 26-C1
22-B4 H27
SPI_CS0*
E22 R272 15 1% 26-C4
SPI3_CS0#
PERN3 SPI_CS1* SPI3_CS1# (LAN3_PHYPC)
SPI
H26 26-C2 25-C3
PERP3
G29 F21 R270 15 1% 26-C4 26-C2
PETN3 SPI_MISO SPI3_MISO
G28
PETP3 SPI_MOSI
D23 R271 47
SPI3_MOSI
26-C3 26-C1
C AC caps : PCIE need to be within 250mils of the driver

Resistor for Test : Place Stuffing Option to minimize stubs
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
U33-3
NH82801HBM
65-C4 67-C1
3/5
D P3.3V_AUX 37-C3 38-C2 39-C3 AJ26 V27 D
SMB3_CLK 22-B1 22-C1 25-D4 AD19
SMBCLK DMI0RXN
V26 14-C1
DMI1_RXN_0
SMB3_DATA SMBDATA DMI0RXP DMI1_RXP_0
SMB
AG21 U29 14-C1
CHP3_CL_RST#_1 38-B3 25-D4 39-B4 AC17
LINKALERT* DMI0TXN
U28 14-C1
DMI1_TXN_0
R191 SMB3_ME_CLK SMLINK0 DMI0TXP DMI1_TXP_0
10K 25-C4 AE19
1%
SMB3_ME_DATA 25-C4
SMLINK1
Y27
AF17
DMI1RXN
Y26 14-C1
DMI1_RXN_1
RI* DMI1RXP
W29 14-C1
DMI1_RXP_1
P3.3V_AUX 67-B2 F4
DMI1TXN
W28 14-C1
DMI1_TXN_1
CHP3_SUSSTAT# 50-C2 51-A3 65-D3 AD15
SUS_STAT*_LPCPD* DMI1TXP DMI1_TXP_1
Direct Media Interface

ITP3_DBRESET# 11-C3
SYS_RESET*
AB26
DMI2RXN DMI1_RXN_2
1% 10K R197
AG12 AB25 14-C1
P3.3V_AUX MCH3_BMBUSY# 14-B1
BMBUSY*_GPIO0 DMI2RXP
AA29 14-C1
DMI1_RXP_2
AG22
DMI2TXN
AA28 14-C1
DMI1_TXN_2
g
SMB3_ALERT# 25-D4 SMBALERT*_GPIO11 DMI2TXP DMI1_TXP_2
GPIO
R193 8-C4 25-D1 AE20 AD27
SYS
CHP3_PCISTP# STP_PCI*_GPIO15 DMI3RXN DMI1_RXN_3
1K R166 0 AG18 AD26 14-C1
1%
CHP3_CPUSTP# 8-C4 25-D1
STP_CPU*_GPIO25 DMI3RXP
AC29 14-C1
DMI1_RXP_3
DMI3TXN DMI1_TXN_3
n
AH11 AC28 14-C1
21-C3 34-A4 50-C2 51-B3 65-C3 PCI3_CLKRUN# CLKRUN*_GPIO32 DMI3TXP DMI1_TXP_3
R192 TP19161
0 AE17 T26
25-C4 37-C3 38-C3 39-C4 52-B4 PEX3_WAKE# WAKE* DMI_CLKN CLK1_PCIEICH#
l
AF12 T25 8-C1
21-B3 34-C3 50-C2 51-C3 65-D3 CHP3_SERIRQ NO_STUFF AC13
SERIRQ DMI_CLKP 8-C1
CLK1_PCIEICH P1.5V
THM3_ALERT# THRM*
u
9-B3 51-C4 Y23
DMI_ZCOMP P3.3V
VRM3_CPU_PWRGD AJ20
VRMPWRGD DMI_IRCOMP
Y24 R242 24.9 1%
51-B3 60-B4
a
1608
R187 R183 1K AJ22 1% F23
NO_STUFF TP7 CL_CLK0 CHP3_CL_CLK_0
s
AE18
i
14-B1
C 100K CL_CLK1 R268 C
1% P3.3V_AUX AG23 3.24K
CHP3_SLPS3# 37-A4 51-B3 AF21
SLP_S3*
F22 1%
1%
1%
CHP3_SLPS4# SLP_S4* CL_DATA0 CHP3_CL_DATA_0
t
51-B3 51-C1 AD18 AF19 14-B1
CHP3_SLPS5# SLP_S5* CL_DATA1
Controller Link
51-A3
AH27
S4_STATE*_GPIO26 CL_VREF0
D24 C258 R267
AH23 100nF 453
10K
10K
TP19162 CL_VREF1
m
AJ25 1%
n
SLP_M*
AJ23
CL_RST* CHP3_CL_RST#_0
NO_STUFF
CHP3_DPRSLPVR R203 100 AJ14
1%
DPRSLPVR_GPIO16
14-B1
14-B1 CHP3_ME_LED AJ27
Power MGT
60-C4 TP19160 MEN_LED_GPIO24
AE21 AJ24
R318
R182
a
BATLOW* ME_ES_ALERT_GPIO10
e
AF22
ES_ME_ALERT_GPIO14
51-B3 C2 AG19
KBC3_PWRBTN# PWRBTN* WOL_EN_EPIO08 CHP3_WOL_EN
NO_STUFF
AH20
LAN_RST* USBP0N
G3
G2 66-A1
USB3_P0- SPI ROM
S fid
LAN Power Sequence check ?? USBP0P USB3_P0+
R168 100 AG27
1% H5
KBC3_RSMRST# R17151-C3
25-A4 100
59-B3 1%
RSMRST* USBP1N
H4 66-A1
USB3_P1-
KBC3_RSMRSTF# 25-A4 59-B3 E1
USBP1P
H2
USB3_P1+
CLK3_PWRGD 8-C4
CK_PWRGD USBP2N
H1 65-B4
USB3_P2- P3.3V
USBP2P USB3_P2+
R289
E3 J3 65-B4 P3.3V
1%
CLPWROK USBP3N
J2 65-A4
USB3_P3-
USBP3P USB3_P3+
0
TP19163 AE23 K5 65-A4

KBC3_PWRGD PWROK USBP4N USB3_P4-
3.3K
14-B1 25-A4 25-B2 34-A4 51-C4 K4 38-C2
AJ8
USBP4P
K2 38-B2
USB3_P4+
KBC3_EXTSMI# USB3_P5-
10K
Check.. 51-C4 TACH1_GPIO1 USBP5N
n
AJ9 K1
CHP3_BIOS_CRI# 25-B3 AH9
TACH2_GPIO6 USBP5P
L3 USB3_P5+
KBC3_RUNSCI# 51-C4 AE16
TACH3_GPIO7 USBP6N
L2 39-B3
USB3_P6-
KBC3_WAKESCI# 51-B3 GPIO8 USBP6P USB3_P6+
R306
B AC19 M5 39-B3 U19 B
CHP3_GPIO12 25-D4 AG8
GPIO12 USBP7N
M4 USB3_P7- MX25L8005M2C-15G
R311
CHP3_GPIO17 TACH0_GPIO17 USBP7P USB3_P7+
o
USB
AH12 M2 5 2 21-B1 26-C2

AE11
GPIO18 USBP8N
M1 USB3_P8- SPI3_MOSI 6
D Q SPI3_MISO
GPIO
21-B1 26-C1
AG10
GPIO20 USBP8P
N3
USB3_P8+ SPI3_CLK 21-B1 26-C1 1
C
CHP3_BIOSWP# 21-B3 26-C2 26-C4 AH25
SCLOCK_GPIO22 USBP9N
N2
SPI3_CS0# 21-B1 7
S*
QRT_STATE0_GPIO27 USBP9P HOLD*
AD16
QRT_STATE1_GPIO28 CHP3_BIOSWP#
21-B3 R310 0 3
W*
AG13 F2 R290 22.6 1% 22-B4 26-C2 8 4
C
CHP3_SATACLKREQ# 8-B4 21-B3 AF9
SATACLKREQ*_GPIO35 USBRBIAS*
F3 P3.3V_AUX VCC VSS
SLOAD_GPIO38 USBRBIAS
R208 10K AJ11 1%
SDATAOUT0_GPIO39
AD10
SDATAOUT1_GPIO48 OC0*
AJ19 R189 10K 1% R348
AG16 10K
OC1*_GPIO40
AD9 AG15 1%
AUD3_SPKR 40-A3
SPKR OC2*_GPIO41
AE15
OC3*_GPIO42
MISC
R207 0 AJ13 AF15

MCH3_ICHSYNC# 14-A4
MCH_SYNC* OC4*_GPIO43
AG17
OC5*_GPIO29
AJ21 AD12
TP3 OC6*_GPIO30
AJ18
OC7*_GPIO31
AG9 AD14
CLK3_ICH14 CLK14 OC8*
Clocks
8-C4 G5 AH18
CLK3_USB48 8-C4
CLK48 OC9*
D3 AJ12
SusPower Plane (For MP Models ) SUSCLK SATA0GP_GPIO21
AJ10
GPIO
SATA
SATA1GP_GPIO19
GPIO(8:15), GPIO(24:28) AF11
SATA2GP_GPIO36
AG11 25-B4 CHP3_EXTGFX#
SATA3GP_GPIO37 25-A1 CHP3_GPIO37
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
M24
G24
H24
N23
H23
K24
V23
F24
T23
L24
L23
J24
J23
VCC1_5_B_13
VCC1_5_B_12
VCC1_5_B_11
VCC1_5_B_10
VCC1_5_B_9
VCC1_5_B_8
VCC1_5_B_7
VCC1_5_B_6
VCC1_5_B_5
VCC1_5_B_4
VCC1_5_B_3
VCC1_5_B_2
VCC1_5_B_1
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS N24 L11
EXCEPT AS AUTHORIZED BY SAMSUNG. VCC1_5_B_14 VCC1_05_1
P24 M11
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
L13
L15
L26
L27
VCC1_5_B_15 VCC1_05_2
M3
N1
VCCP_CORE
K7
L1
L4
L5
R24 P11
VCC1_5_B_16 VCC1_05_3
T24 T11
VCC1_5_B_17 VCC1_05_4
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
U24 U11
VCC1_5_B_18 VCC1_05_5
V24 V11 A23 N26
P1.5V VCC1_5_B_19 VCC1_05_6 VSS_1 VSS_126
E25
VCC1_5_B_20 VCC1_05_7
A13 C294 C260 A5
VSS_2 VSS_127
N27
330ohm@100MHz F25 B13 100nF 100nF AA2 N4
D B34 K25
VCC1_5_B_21 VCC1_05_8
G14 AA7
VSS_3 VSS_128
N5 D
VCC1_5_B_22 VCC1_05_9 VSS_4 VSS_129
BLM18PG181SN1 L25 C13 A25 N6
VCC1_5_B_23 VCC1_05_10 VSS_5 VSS_130
M25 C14 AB1 P12
VCC1_5_B_24 VCC1_05_11 VSS_6 VSS_131
XC1 N25 D14 AB24 P13
C211 C212 VCC1_5_B_25 VCC1_05_12 VSS_7 VSS_132
330uF C213 P25 E14 AC11 P14
22000nF 22000nF2200nF VCC1_5_B_26 VCC1_05_13 VSS_8 VSS_133
CORE
NO_STUFF 2.5V R25 F14 AC14 P15
OXI 20% 20% VCC1_5_B_27 VCC1_05_14 VSS_9 VSS_134
U25 L12 AC25 P16
VCC1_5_B_28 VCC1_05_15 P1.5V VSS_10 VSS_135
VCCA3GP
V25 L14 L14 AC26 P17
VCC1_5_B_29 VCC1_05_16 VSS_11 VSS_136
W25 L16 1uH TP19165 AC27 P23
VCC1_5_B_30 VCC1_05_17 VSS_12 VSS_137
Y25
VCC1_5_B_31 VCC1_05_18
L17 R241 1 AD17
VSS_13 VSS_138
P28
AA25 L18 AD20 P29
E26
VCC1_5_B_32 VCC1_05_19
M18
C215 C218 AD28
VSS_14 VSS_139
R11
PRTC_BAT VCC1_5_B_33 VCC1_05_20 10nF 10000nF VSS_15 VSS_140
R26 P18 AD29 R12
VCC1_5_B_34 VCC1_05_21 16V 6.3V VSS_16 VSS_141
AA26 T18 AD3 R13
g
VCC1_5_B_35 VCC1_05_22 VSS_17 VSS_142
E27 U18 AD4 R14
VCC1_5_B_36 VCC1_05_23 VSS_18 VSS_143
R27 V12 AD6 R15
VCC1_5_B_37 VCC1_05_24 VSS_19 VSS_144
C190 C191 T27
VCC1_5_B_38 VCC1_05_25
V14 AE1
VSS_20 VSS_145
R16
P5.0V_AUX P3.3V_AUX P5.0V P3.3V 100nF 100nF AA27 V16 AE12 R17
VCC1_5_B_39 VCC1_05_26 P1.25V VSS_21 VSS_146
n
AB27 V17 AE2 R18
VCC1_5_B_40 VCC1_05_27 VSS_22 VSS_147
D28 V18 AE22 R28
1 1 VCC1_5_B_41 VCC1_05_28 VSS_23 VSS_148
R244 BAT54 R281 T28 AD1 R4
VCC1_5_B_42 C187 VSS_24 VSS_149
l
12.1 D15 100 BAT54 AB28 R29 AE25 T12
1% 1% D29
VCC1_5_B_43 VCCDMIPLL 22000nF AE5
VSS_25 VSS_150
T13
3 3 D14 VCC1_5_B_44 20% VSS_26 VSS_151
u
T29
VCC1_5_B_45 U33-4 VCC_DMI_1
AE28
VCCP_CORE
AE6
VSS_27 U33-5 VSS_152
T14
AB29 AE29 AE9 T15
C265 C225 VCC1_5_B_46 VCC_DMI_2 VSS_28 VSS_153
a
C267 C222 AF14 T16
1000nF
1000nF
6.3V
1000nF
1000nF
6.3V
AD25
VCCRTC
NH82801HBM V_CPU_IO_1
AC23 AF16
VSS_29
VSS_30
NH82801HBM VSS_154
VSS_155
T17
s
AC24 AF18 T2
i
C A16
V_CPU_IO_2 P3.3V C216 C217 C219 AF3
VSS_31 VSS_156
U12 C
T7
V5REF_1 4/5 AF29 100nF 100nF
4700nF
AF4
VSS_32
5/5 VSS_157
U13
V5REF_2 VCC3_3_1 10V VSS_33 VSS_158
t
NO_STUFF NO_STUFF AG5 U14
P1.5V L503 VSS_34 VSS_159
G4 AD2 AG6 U15
V5REF_SUS VCC3_3_2 VSS_35 VSS_160
10uH C194 C188 AH10
VSS_36 VSS_161
U16
VCCP CORE
AJ6
VCCSATAPLL VCC3_3_3
AC8 100nF 100nF AH13
VSS_37 VSS_162
U17
P3.3V
m
AF8 AH16 U23
n
VCC3_3_4 VSS_38 VSS_163
C942 C941 AE7
VCC1_5_A_1 VCC3_3_5
AD8 AH19
VSS_39 VSS_164
U26
1000nF 1000nF AF7 AE8 AH2 U27
VCC1_5_A_2 VCC3_3_6 VSS_40 VSS_165
ARX
C193 AG7
VCC1_5_A_3
AF28
VSS_41 VSS_166
U3
1000nF AH7 AA3 AH22 U5
a
VCC1_5_A_4 VCC3_3_7 VSS_42 VSS_167
e
AJ7 U7 P3.3V AH24 V13
VCC1_5_A_5 VCC3_3_8 VSS_43 VSS_168
V7 AH26 V15
VCC3_3_9 VSS_44 VSS_169
AC1 W1 AH3 V28
IDE
VCC1_5_A_6 VCC3_3_10 VSS_45 VSS_170
AC2
VCC1_5_A_7 VCC3_3_11
W6 C223 AH4
VSS_46 VSS_171
V29
ATX
C195 AC3 W7 100nF AH8 W2
S fid
VCC1_5_A_8 VCC3_3_12 VSS_47 VSS_172
1000nF AC4 Y7 AJ5 W26
P1.5V VCC1_5_A_9 VCC3_3_13 P3.3V VSS_48 VSS_173
AC5 B11 W27
VCC1_5_A_10 VSS_49 VSS_174
A8 B14 Y28
VCC3_3_14 VSS_50 VSS_175
AC10 B15 B17 Y29
VCC1_5_A_11 VCC3_3_15 VSS_51 VSS_176
AC9 B18 B2 Y4
VCC1_5_A_12 VCC3_3_16 VSS_52 VSS_177
VCC3_3_17
B4 C295 C263 C261 B20
VSS_53 VSS_178
AB4
AA5
VCC1_5_A_13 VCC3_3_18
B9 100nF 100nF 100nF B22
VSS_54 VSS_179
AB23
AA6 C15 B8 AB5
PCI
VCC1_5_A_14 VCC3_3_19 VSS_55 VSS_180

D13 C24 AB6
VCC3_3_20 P3.3V VSS_56 VSS_181
n
G12 D5 C26 AD5
VCC1_5_A_15 VCC3_3_21 VSS_57 VSS_182
G17 E10 C27 U4
VCC1_5_A_16 VCC3_3_22 VSS_58 VSS_183
H7 E7 C6 W24
P1.5V VCC1_5_A_17 VCC3_3_23 VSS_59 VSS_184
B VCC3_3_24
F11 D12
VSS_60 B
AC7
VCC1_5_A_18
C262 D15
VSS_61 VSS__NCTF1
A1
o
AD7 AC12 P3.3V_AUX 100nF D18 A2
VCC1_5_A_19 VCCHDA VSS_62 VSS__NCTF2
D2 A28
VSS_63 VSS__NCTF3
C264 C224 D1
VCCUSBPLL VCCSUSHDA
AD11 D4
VSS_64 VSS__NCTF4
A29
100nF 100nF E21
VSS_65 VSS__NCTF5
AH1
P3.3V F1 J6 C266 E24 AH29
VCC1_5_A_20 VCCSUS1_05_1 VSS_66 VSS__NCTF6
USB CORE
L6 AF20 TP19344 100nF E4 AJ1
C
L7 E9 AJ2
VCC1_5_A_22 VSS_68 VSS__NCTF8
M6 AC16 F15 AJ28
M7 E23 AJ29
VCC1_5_A_24 P3.3V_AUX VSS_70 VSS__NCTF10
J7 F28 B1
VCCSUS1_5_2 VSS_71 VSS__NCTF11
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
W23 B29
VCC1_5_A_25 VSS__NCTF12
C259 VCCSUS3_3_1
C3
100nF F17
VCCLAN1_5_1
G18
VCCLAN1_5_2 VCCSUS3_3_2
AC18 C220 C192
P1.5V
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
AC21 100nF 100nF
VCCPSUS
VCCSUS3_3_3
F19 AC22
INSTPAR G20 AG20
SHORT8 VCCSUS3_3_6
AH28
TP19166 A24
VCCGLANPLL VCCPUSB G22
VCCCL1_05_1
GLAN POWER
A26
VCCGLAN1_5_1
A27 A22
VCCSUS3_3_19
VCCSUS3_3_18
VCCSUS3_3_17
VCCSUS3_3_16
VCCSUS3_3_15
VCCSUS3_3_14
VCCSUS3_3_13
VCCSUS3_3_12
VCCSUS3_3_11
VCCSUS3_3_10
VCCGLAN1_5_2 VCCCL1_5_1
VCCSUS3_3_9
VCCSUS3_3_8
VCCSUS3_3_7
P1.5V INSTPAR B26

VCCGLAN1_5_3
SHORT7 B27
F20 C293 C292
P3.3V TP19167 B28 G21 100nF 1000nF
A TP19168 B25 A
VCCGLAN3_3
INSTPAR NO_STUFF NO_STUFF
DRAW DATE TITLE
SAMSUNG
R6
R5
R3
R1
P7
P6
P5
P4
P3
P2
P1
N7
C1
SHORT4 P3.3V_AUX P3.3V SUN XIAO 6/26/2007

Gevena
CHECK DEV. STEP
ELECTRONICS
C221 WUSHIJIANG PV2 ICH8-M
4700nF APPROVAL REV PART NO.
10V KEVIN LEE 1.0 ICH8-M (4/5 5/5) BA41-XXXXX

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
P3.3V_AUX PRTC_BAT
1%
1%
Internal VR Strap
D INTVRMEN Pull up D
VccSus1_05, VccSus1_5, VccCL1_5
301K
301K
LAN100_SLP Pull up
VccLAN1_05, VccCL1_05
R212 10K 1%
CHP3_GPIO17
R186 10K 1%
R174
R170
R185 10K 1% 22-B4
CHP3_GPIO12
39-B4 38-B3 22-D4
CHP3_CL_RST#_1 20-D3
CHP3_LAN100_SLP
R181 10K 1%
22-C4
SMB3_ALERT# 20-D3
CHP3_INTVRMEN
R188 2.2K
0
SMB3_DATA 37-C3 22-D4 22-C1 22-B1 39-C3 38-C2 67-D1 65-C4
R172 2.2K
SMB3_CLK 37-C3 22-D4 22-C1 22-B1 39-C3 38-C2 67-C1 65-C4 NO_STUFF
g
NO_STUFF
R175
R179
n
R184 2.2K
SMB3_ME_DATA
R195 2.2K 22-D4
SMB3_ME_CLK
l
22-D4
u a
Boot BIOS Select
1%
1%
P3.3V
Model Dipendent
s i
C BIOS PCI3_GNT0* SPI3_CS1* C
LPC HIGH HIGH
10K
10K
t
P3.3V
1%
1%
SPI LOW HIGH

PCI HIGH LOW
m R284
R274
n
10K
10K
1%
1%
NO_STUFF
34-B4 21-D1
PCI3_GNT0#
a
SPI3_CS1#
e
1% R217
1% R210
26-C2 21-B1
1K
1K
22-A2
CHP3_EXTGFX#
S fid R286
R273
10K
10K
CHP3_GPIO37
NO_STUFF
NO_STUFF
R218
R211
n
1%
B P3.3V B
o
10K
C
R216
22-B4
CHP3_BIOS_CRI#
0
NO_STUFF
R190 100K 1%
CHP3_WOL_EN
R160
54-A4
R167 10K 1%
KBC3_RSMRSTF#
59-B3 22-B4
R169 10K 1%
51-C3 22-B4
KBC3_RSMRST# NO_STUFF
R288 10K 59-B3 1%

22-B4 14-B1
KBC3_PWRGD BIOS CRISIS RECOVER STRAP
51-C4 34-A4
25-B2
PLACE NEAR KEYBOARD
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
KEVIN LEE 1.0 ICH8-M STAP BA41-XXXXX


4 3 2 1
GFX3_HDMI_TXD0_N
GFX3_HDMI_TXD1_N
GFX3_HDMI_TXD2_N
GFX3_HDMI_TXD0_P
GFX3_HDMI_TXD1_P
GFX3_HDMI_TXD2_P
GFX3_HDMI_TXC_N
GFX3_HDMI_TXC_P
4 3 2 1
NO_STUFF
SAMSUNG PROPRIETARY R619 0
THIS DOCUMENT CONTAINS CONFIDENTIAL GFX3_THERM# GFX3_HDATA
PROPRIETARY INFORMATION THAT IS GFX3_HCLK
SAMSUNG ELECTRONICS CO’S PROPERTY. R666 TP19177
0 TP19200 NO_STUFF
R651 1K 1% TMDS_PLLVDD
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS GFX3_VOLTID
EXCEPT AS AUTHORIZED BY SAMSUNG. GFX3_BLON 10K R622
GFX3_LCDVDDON R104 10K TP19179 NO_STUFF
C672 10nF 16V
GFX3_BRIT R97 49.9 1%
GFX3_HTPLG1 TP19198
TP19199 GFX3_HDMI_TXC_P
R667
R625 10K TP19176 10K
R98
AK12
AK11
AL12
AL13
AJ11
NO_STUFF
AM2
AM3
AG1
AG3
AH1
AH2
AH3
AA7
AA4
AA6
AE2
AE1
AK1
AK3
AF1
AF2
AL2
AL1
AJ1
AJ2
AJ3
W2
82
G5
G6
G3
H1
D2
H5
U3
U4
H2
H3
K3
K5
E2
K6
E1
E3
F4
J5
14-D2 NO_STUFF
D PEG1_TXP(15:0)
R99 49.9 1% D
GFX3_HDMI_TXC_N
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
TESTMODE
I2CH_SCL
I2CH_SDA
IFPC_TXC_P
IFPC_TXC_N
IFPC_TXD0_P
IFPC_TXD0_N
IFPC_TXD1_P
IFPC_TXD1_N
IFPC_TXD2_P
IFPC_TXD2_N
IFPD_TXC_P
IFPD_TXC_N
IFPD_TXD4_P
IFPD_TXD4_N
IFPD_TXD5_P
IFPD_TXD5_N
IFPD_TXD6_P
IFPD_TXD6_N
IFPCD_RSET
IFPCD_VPROBE
0 AK13
PEX_RX0_P IFPA_TXC_P
AK9 VGA1_ODD_CLK+ GFX3_HDMI_TXD0_P R88 49.9 1%
1 AM14 AJ9 32-C4
PEX_RX1_P IFPA_TXC_N VGA1_ODD_CLK-
2 AL15 AH6 32-C4
PEX_RX2_P IFPA_TXD0_P VGA1_ODD_A0+ NO_STUFF R89
3 AK16 AJ6 32-C4
PEX_RX3_P IFPA_TXD0_N VGA1_ODD_A0- 82
4 AL17 AH8 32-C4
PEX_RX4_P IFPA_TXD1_P VGA1_ODD_A1+
5 AM18 AH7 32-C4
PEX_RX5_P IFPA_TXD1_N VGA1_ODD_A1-
6 AK19 AJ8 32-C4 R90 49.9 1%
DUAL LVDS/TMDS
7 AL20
PEX_RX6_P IFPA_TXD2_P
AK8 32-C4
VGA1_ODD_A2+ GFX3_HDMI_TXD0_N R93 49.9 1%
8 AM21
PEX_RX7_P IFPA_TXD2_N
AJ5 32-C4
VGA1_ODD_A2- GFX3_HDMI_TXD1_P
PEX_RX8_P GPIO ROM ACCESS TEST PROTECT SINGLE LVDS/TMDS IFPA_TXD3_P
9 AK22 AH5
10 AL23
PEX_RX9_P IFPA_TXD3_N NO_STUFF R92
PEX_RX10_P 82
11 AM24 AK4
g
PEX_RX11_P IFPB_TXC_P VGA1_EVEN_CLK+
12 AK25 AL4 32-C4
PEX_RX12_P IFPB_TXC_N VGA1_EVEN_CLK-
13 AL26
PEX_RX13_P IFPB_TXD4_P
AM6 32-C4
VGA1_EVEN_A0+ GFX3_HDMI_TXD1_N
R91 49.9 1%
PEG1_TXN(15:0)
14-D2 14 AM27
PEX_RX14_P IFPB_TXD4_N
AM5 32-C4
VGA1_EVEN_A0- GFX3_HDMI_TXD2_P R94 49.9 1%
15 AL28 AM7 32-C4
PEX_RX15_P IFPB_TXD5_P VGA1_EVEN_A1+
0 AK14 AL7
n
32-C4
1 AM15
PEX_RX0_N IFPB_TXD5_N
AK6 32-C4
VGA1_EVEN_A1- NO_STUFF R95
PEX_RX1_N IFPB_TXD6_P VGA1_EVEN_A2+ 82
2 AL16 AK5 32-C4
PEX_RX2_N IFPB_TXD6_N VGA1_EVEN_A2-
l
3 AK17
PEX_RX3_N IFPB_TXD7_P
AK7 32-C4
GFX3_HDMI_TXD2_N R96 49.9 1%
4 AL18 AL8
PEX_RX4_N IFPB_TXD7_N
u
5 AM19
PEX_RX5_N
6 AK20 AL5 R681 1K 1% NO_STUFF EMC NEED ADD
PEX_RX6_N IFPAB_RSET
7 AL21
a
PEX_RX7_N
8 AM22 AM4
PEX_RX8_N IFPAB_VPROBE
9 AK23
s i
PEX_RX9_N
10 AL24 AH11
C 11 AM25
PEX_RX10_N DACA_RED
AJ12 33-C3
GFX3_RED C
PEX_RX11_N DACA_GREEN GFX3_GREEN
t
12 AK26 AH12 33-C3
1%
1%
1%
13
14
AL27
AM28
PEX_RX12_N
PEX_RX13_N U36-1 DACA_BLUE
I2CA_SCL
K2
J3 33-C4
GFX3_DDCCLK
33-C3
GFX3_BLUE
PEX_RX14_N I2CA_SDA GFX3_DDCDATA

15 AL29 33-C4
NB8P-SE-H-N-A1/H
PCI EXPRESS
PEG1_RXP(15:0) PEX_RX15_N PLACE COLSE TO

14-D3 R6
m
DACB_RED
150
150
150
n
0C726 100nF AJ15 T5 GFX CHIP AS POSSIBLE
PEX_TX0_P DACB_GREEN
1 C722 100nF AH16 T6
2C808
3C803
100nF
100nF
AG17
AG18
PEX_TX1_P
PEX_TX2_P 1/5 DACB_BLUE
DACB_CSYNC
U5
H4
PEX_TX3_P I2CB_SCL
a
VGA3_HDMICLK
4C811 100nF AK18 J4
R678
R680
R679
25-D?
PEX_TX4_P I2CB_SDA VGA3_HDMIDATA
5C802 100nF AJ19 25-C?
PEX_TX5_P
6C809 100nF AG20 AF6
PEX_TX6_P DACC_RED
7C800 100nF AG21 AG6
8C805
PEX_TX7_P DACC_GREEN
100nF AK21
PEX_TX8_P DACC_BLUE
AE5
S fid
9C799 100nF AJ22 G2 R624 33 1%
PEX_TX9_P I2CC_SCL
C843
10 100nF AG23
PEX_TX10_P I2CC_SDA
G1 R623 33 1%
DAC/PLL
C841
11 100nF AK24
PEX_TX11_P EDID_CLK
C845
12 100nF AJ25
PEX_TX12_P I2CS_SDA
B1 32-D3
EDID_DATA
C842
13 100nF AH26
PEX_TX13_P I2CS_SCL
C1
PEG1_RXN(15:0)
C846
14 100nF AK27
PEX_TX14_P
14-D3 C837
15 100nF AJ28 TP19181
AF10 R649 40.2 1%
PEX_TX15_P DACA_HSYNC GFX3_HSYNC
0C724 100nF AK15 AK10 R650 40.2 1% 33-C4
PEX_TX0_N DACA_VSYNC GFX3_VSYNC
1C723 100nF AG16 AG7 33-C4
2C725
PEX_TX1_N DACC_HSYNC P3.3V
100nF AH17 AG5 B524
n
3C801
PEX_TX2_N DACC_VSYNC
100nF AH18
PEX_TX3_N MMZ1608S121AT
4C807 100nF AJ18 AH9TP19182
R682 120 R683 3.3
PEX_TX4_N DACA_RSET
5C796 100nF AH19 R7
PEX_TX5_N DACB_RSET C104 C106
B 6C810 100nF AH20
PEX_TX6_N DACC_RSET
AF5 C101 4.7nF 4700nF B
7C797 100nF AH21 0.47nF
o
8C806
PEX_TX7_N 25V 10V
100nF AJ21
PEX_TX8_N DACA_VDD
AD10
9C798 100nF AH22 TP19183
AH10 C721 10nF 16V
PEX_TX9_N DACA_VREF
C804
10 100nF AH23
PEX_TX10_N
C839
11 100nF AJ24
PEX_TX11_N DACB_VDD
V8
C844
12 100nF AH25
PEX_TX12_N DACB_VREF
R5
C
C840
13 100nF AG26
PEX_TX13_N
C847
14 100nF AJ27 TP19184
AD7 R675 10K 1%
PEX_TX14_N DACC_VDD R671
C838
15 100nF AH27
PEX_TX15_N DACC_VREF
AH4 10K
1%
8-C1 AH14 AG9
CLK1_PEG PEX_REFCLK_P DVO DACA_IDUMP
8-C1 AJ14 V7
CLK1_PEG#
AM11
PEX_REFCLK_N DACB_IDUMP
AG4
FOR NB8 ONLY
PEX_TSTCLK_OUT_N DACC_IDUMP
MIOACAL_PD_VDDQ
MIOBCAL_PD_VDDQ
AM12
XTAL THERMAL
MIOACAL_PU_GND
MIOBCAL_PU_GND
36-C2 #5 PEX_TSTCLK_OUT_P
K1
MIOA_CLKOUT_N
MIOB_CLKOUT_N
MIOA_CLKOUT_P
MIOB_CLKOUT_P
36-C3 37-C1 41-A4

TP19197 THERMDP GFX3_THRMDP
GENERAL
21-A? 24-A3 24-C4 AH15 J1

PLT3_RST# PEX_RST_N THERMDN GFX3_THRMDN
MIOA_HSYNC
MIOB_HSYNC
MIOA_VSYNC
MIOB_VSYNC
R695 0
MIOB_CLKIN
MIOA_VREF
MIOB_VREF
MIOA_CTL3
MIOB_CTL3
F3 U1
BUFRST_N XTALIN GFX3_27M
MIOA_DE
MIOB_DE
MIOAD10
MIOAD11
T3 U2
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOB10
MIOB11
STEREO XTALOUT
T2 TP19185
MIOB0
MIOB1
MIOB2
MIOB3
MIOB4
MIOB5
MIOB6
MIOB7
MIOB8
MIOB9
XTALOUTBUF TP19186
M6 T1
SWAPRDY_A XTALSSIN GFX3_27M_SS
P3.3V R634 R637 R636 R635

P2
N2
1%N1
N3
M1
M3
P5
N6
N5
M4
L4
L5
AC3
AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5
R3
AF3
R1
AE3
AE4
R4
P4
AD4
AD5
P3
AD3
P1
AD1
L2
Y2
L1
L3
Y1
Y3
TP19196
TP19195 10K 10K 56.2 10K
1% 1% 1% 1%
TP19194
TP19192
TP19191
TP19178
TP19193 TP19190
TP19189 TP19188 TP19187
2K
2K 1%
2K 1%
2K 1%
R632 NO_STUFF NO_STUFF

A 2K A
NO_STUFF
1%
R647 R648
NO_STUFF DRAW DATE TITLE
R629
2K 10K
R628 2K 1% CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
R670
R668
R633 2K 1%
NB8P ELECTRONICS
R626
P3.3V WUSHIJIANG PV2

R627 2K 1%
R631 2K 1% APPROVAL REV PART NO.
NO_STUFF
KEVIN LEE 1.0 NB8P (1/5) BA41-XXXXX
PEG3_MIOB_CTL3
29-C3
0 1 3 4 5 8 9 11 MODULE CODE LAST EDIT
29-A3 29-B3
PEG3_MIOB(0,1,3,4,5,8,9,11) PEG3_MIOB(7) October 23, 2007 10:38:02 AM PAGE 25 OF 58
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D Graphic Memory I/F Graphic Memory I/F D

(Using FBA Channel) (Using FBC Channel)
DQA(63:0)
30-D4 U36-2 DQC(63:0) U36-3
NB8P-SE-H-N-A1/H 30-B3 30-B2
DQMA(7:0)
31-D3
NB8P-SE-H-N-A1/H
0 N27 M29 0 31-B3 31-B2
FBAD0 FBADQM0 DQMC(7:0)
1 M27 M30 1 0 B7 A4 0
FBAD1 FBADQM1 FBCD0 FBCDQM0
2 N28 G30 2 1 A7 E11 1
3 L29 F29 3 2 C7 F5 2
4 K27 AA29 4 3 A2 C9 3
g
5 K28 AK30 5 4 B2 C28 4
6 J29 AC30 6 5 C4 F24 5
7 J28 AG30 7 6 A5 C24 6
8 P30 30-B3 30-B2 7 B5 E20 7
FBAD8 WDQSA(0:7) FBCD7 FBCDQM7
n
9 N31 L28 0 8 F9 31-B3 31-B2
FBAD9 FBADQS_WP0 FBCD8 WDQSC(0:7)
10 N30 K31 1 9 F10 C5 0
FBAD10 FBADQS_WP1 FBCD9 FBCDQS_WP0
11 N32 G32 2 10 D12 E10 1
l
12 L31 G28 3 11 D9 E5 2
13 L30 AB28 4 12 E12 B8 3
u
14 J30 AL32 5 13 D11 A29 4
15 L32 AF32 6 14 E8 D25 5
a
16 H30 AH30 7 15 D8 B25 6
17 K30 30-B3 30-B2 16 E7 F20 7
FBAD17 RDQSA(0:7) FBCD16 FBCDQS_WP7
s
18 H31 M28 0 17 F7
i
31-B3 31-B2
C 19 F30
FBAD18 FBADQS_RN0
K32 1 18 D6
FBCD17
C6 0
RDQSC(0:7) C
FBAD19 FBADQS_RN1 FBCD18 FBCDQS_RN0
20 H32 G31 2 19 D5 E9 1
t
21 E31 G27 3 20 D3 E6 2
22 D30 AA28 4 21 E4 A8 3
23 E30 AL31 5 22 C3 B29 4
24 H28 AF31 6 23 B4 E25 5
m
25 H29 AH29 7 24 C10 A25 6
n
26
27
E29
J27
FBAD25
FBAD26 2/5 FBADQS_RN7
P28 30-B4
25
26
B10
C8
FBCD24
FBCD25
FBCDQS_RN6
FBCDQS_RN7
F21 7
FBAD27 FBA_CLK0P MCLKA0 FBCD26
28 F27 R28 30-C4 27 A10 E13 31-B4
FBAD28 FBA_CLK0N MCLKA0# FBCD27 FBC_CLK0P MCLKC0
29 E27 Y27 30-B2 28 C11 F13 31-C4
a
FBAD29 FBA_CLK1P MCLKA1 FBCD28
3/5 FBC_CLK0N MCLKC0#
e
30 E28 AA27 30-C2 29 C12 F18 31-B2
FBAD30 FBA_CLK1N MCLKA1# FBCD29 FBC_CLK1P MCLKC1
31 F28 30 A11 E17 31-C2
FBAD31 MAA(11:0) FBCD30 FBC_CLK1N MCLKC1#
32 AD29 V29 0 31 B11
FBAD32 FBA_CMD19 30-D4 30-C4 30-C2 FBCD31 MAC(11:0)
33 AE29 U28 1 32 B28 F16 0
FBAD33 FBA_CMD25 FBCD32 FBC_CMD19 31-D3 31-C4 31-C2
34 AD28 R29 2 33 C27 F15 1
S fid
FBAD34 FBA_CMD22 FBCD33 FBC_CMD25
35 AC28 P29 3 34 C26 E14 2
36 AB29 P32 4 35 B26 E15 3
37 AA30 P31 5 36 C30 C13 4
38 Y28 W28 6 37 B31 A13 5
39 AB30 V30 7 38 C29 C18 6
40 AM30 R30 8 39 A31 A17 7
41 AF30 T30 9 40 D28 B13 8
42 AJ31 U31 10 41 D27 C14 9
43 AJ30 T28 11 42 F26 C16 10
n
44 AJ32 T27 43 D24 A14 11
45 AK29 Y32 44 E23 D15
46 AM31 V32 45 E26 A20
B 47 AL30
FBAD47 FBA_CMD8
V27 30-C3 30-C2
CSA0#
46 E24
FBCD46 FBC_CMD28
A15 B
48 AE32 T32 30-D4 30-D2 47 F23 E16 31-C3 31-C2
FBAD48 FBA_CMD7 BAA2 FBCD47 FBC_CMD8 CSC0#
o
49 AE30 48 B23 B14 31-C3 31-C2
FBAD49 FBCD48 FBC_CMD7 BAC2
50 AE31 W29 30-D4 30-D2 49 A23
FBAD50 FBA_CMD12 BAA0 FBCD49
51 AD30 U30 30-D4 30-D2 50 C25 F17 31-D3 31-D2
FBAD51 FBA_CMD3 BAA1 FBCD50 FBC_CMD12 BAC0
52 AC31 Y30 51 C23 B17 31-D3 31-D2
FBAD52 FBA_CMD27 FBCD51 FBC_CMD3 BAC1
53 AC32 52 A22 C20
FBAD53 FBCD52 FBC_CMD27
54 AB32 U32 30-B3 30-B2 53 C22
C
FBAD54 FBA_CMD11 WEA# FBCD53
55 AB31 U27 30-C3 30-C2 54 C21 B16 31-B3 31-B2
FBAD55 FBA_CMD1 RASA# FBCD54 FBC_CMD11 WEC#
56 AG27 T31 30-C3 30-C2 55 B22 A16 31-C3 31-C2
FBAD56 FBA_CMD10 CASA# FBCD55 FBC_CMD1 RASC#
57 AF28 56 E22 C15 31-C3 31-C2
P1.8V FBAD57 FBCD56 FBC_CMD10 CASC#
58 AH28 V28 30-B4 30-B2 57 D22
FBAD58 FBA_CMD15 DRAM_RSTA# FBCD57
59 AG28 R27 30-B4 30-B2 58 D21 C17 31-B4 31-B2
FBAD59 FBA_CMD18 MCKEA FBCD58 FBC_CMD15 DRAM_RSTC#
60 AG29 59 E21 D14 31-B4 31-B2
FBAD60 MAB(5:2) FBCD59 FBC_CMD18 MCKEC
61 AD27 Y31 2 60 E18
62 AF27
FBAD61 FBA_CMD4
W31 3
30-C2 R710 R709 61 D19
FBCD60
B202
MAD(5:2)
R725 FBAD62 FBA_CMD6 10K 10K FBCD61 FBC_CMD4 31-C2
200 63 AE28 W32 4 1% 1%
P1.2V 62 D18 B193 P1.8V
NO_STUFF FBAD63 FBA_CMD5 FBCD62 FBC_CMD6
1% W30 5 63 E19 A194 R664 R694
FBA_CMD13 FBCD63 FBC_CMD5
E32 C195 10K 10K
FB_VREF FBC_CMD13
G25 1% 1%
FB_PLLAVDD
G24 B528
FB_PLLGND
R705 MMZ1608S121AT
NO_STUFF 475 C824 FBCAL_PD_VDDQ
K26 R708 45.3 1%
1% 100nF C780 F12
FBC_DEBUG FBCAL_PU_GND
H26 R706 24.9 1%
AC27
FBA_DEBUG
C826 4700nF FBCAL_TERM_GND
J26 R707 40.2 1%
100nF 10V
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 NB8P
KEVIN LEE 1.0 NB8P (2/5 3/5) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS B506
SAMSUNG ELECTRONICS CO’S PROPERTY. ACM2012H-900-2P
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS 1 4
P1.8V 2 3
R8 0
GFX3_HDMI_TXD2_P
NO_STUFF R9 0
D EC511 C698
GFX3_HDMI_TXD2_N D
C882 C770 C880 C700 C820 C825 B505
ACM2012H-900-2P
330uF 10000NF 10000NF 4700nF 4700nF
C699 C771 C831 22nF 22nF 22nF
2.5V 100nF 100nF 100nF 1 4
AL 10V 10V 6.3V 6.3V 25V 25V 25V
2 3
C822 C821 C823 C828 C829 C834 C836 R7 0
22nF 4.7nF 4.7nF 4.7nF 4.7nF 4.7nF 4.7nF GFX3_HDMI_TXD1_P
NO_STUFF R4 0
25V 25V 25V 25V 25V 25V 25V GFX3_HDMI_TXD1_N
B532
ACM2012H-900-2P
1 4
g
2 3
P1.8V R5 0
NO_STUFF GFX3_HDMI_TXD0_P
R2 0
G26
G29
C31
D10
D13
D16
D17
D20
D23
D26
D29
H27
B12
B15
B18
B21
B24
B27
B30
F11
F14
F19
F22
F25
F31
J16
J17
GFX3_HDMI_TXD0_N
G4
G7
C2
D4
D7
H6
B3
B6
B9
F2
F8
J2
n
J31 B501
ACM2012H-900-2P
GND_40
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
A3 K10 1 4
FBVDD_1 GND_41
l
A6 K23
FBVDD_2 GND_42
A9 K29
FBVDD_3 GND_43 J2
u
A12 K4
FBVDD_4 GND_44
L6 2 3
GND_45 47408-0001
a
A18 L27
FBVDD_6 GND_46
A21 M2 1 R3 0
FBVDD_7 GND_47 TMDS_DATA2 GFX3_HDMI_TXC_P
R6
s
A24 M12 2 0
i
C A27
FBVDD_8 GND_48
M31
TMDS_DATA2_SHIELD
3 GFX3_HDMI_TXC_N C
FBVDD_9 GND_49 TMDS_DATA2#
A30
FBVDD_10 GND_50
N4
TMDS_DATA1
4 NO_STUFF
t
C32 N15 5 P5.0V
FBVDD_11 GND_51 TMDS_DATA1_SHIELD
F32 N18 6
J32 N29 7
miniSMDC110-2
FBVDD_13 GND_53 TMDS_DATA0
M32 P6 8
FBVDD_14 GND_54 TMDS_DATA0_SHIELD
m
R32 P15 9 R14 2.2K
n
GND_56
P18
TMDS_CLOCK
10 R15 2.2K
AA32 P27 11
AD32
FBVDD_17
FBVDD_18 U36-4 GND_57
GND_58
R2
TMDS_CLOCK_SHIELD
TMDS_CLOCK#
12
TH1
AG32 R13 13
a
FBVDD_19 GND_59 CEC
e
AK32 R14 14
G11
FBVDD_20
NB8P-SE-H-N-A1/H GND_60
GND_61
R15
R18 20
RESERVED
SCL
15
16
VGA5_HDMICLK
D2
G12
FBVDDQ_1 GND_62
R19 21
MNT1 SDA
17
VGA5_HDMIDATA
CRS02
G15
FBVDDQ_2
4/5 GND_63
R20 22
MNT2 DDC_GROUND
18 2 TP19120
1
S fid
FBVDDQ_3 GND_64 MNT3 5V_POWER
G18
FBVDDQ_4 GND_65
AM10 23
MNT4 HOT_PLUG_DETECT
19 R1 100K 1%
G21
FBVDDQ_5 P3.3V
G22 M21
FBVDDQ_6 GND_SENSE
H11
FBVDDQ_7
H12 W3
FBVDDQ_8 NC_17 3
H15 W4
FBVDDQ_9 NC_18 1 Q539
H18
FBVDDQ_10 NC_19
W5 C3 C2 C1 3
H21 Y5 0.01nF
0.01nF 100nF 2 1 MMBT3904
FBVDDQ_11 NC_20
H22 Y6
FBVDDQ_12 NC_21 BAV99LT1 2
n
L25 AC26
FBVDDQ_13 NC_22 D3
L26 AG12 3
FBVDDQ_14 NC_23
M25 AH13 2 1
FBVDDQ_15 NC_24 GFX3_HTPLG1
B M26
FBVDDQ_16 NC_25
AM8 B
R25 AM9 BAV99LT1 R798
FBVDDQ_17 NC_26
o
R26 A26 D1 47K
FBVDDQ_18 NC_27
V25 AE26
FBVDDQ_19 NC_28
V26 AD26
FBVDDQ_20 NC_29
AA25 AH31
FBVTT_10
FBVTT_11
FBVTT_12
FBVTT_13
FBVTT_14
FBVTT_15
FBVTT_16
FBVTT_17
FBVTT_18
FBVDDQ_21 NC_30
FBVTT_1
FBVTT_2
FBVTT_3
FBVTT_4
FBVTT_5
FBVTT_6
FBVTT_7
FBVTT_8
FBVTT_9
AA26 AH32
FBVDDQ_22 NC_31 P3.3V
AB25 G10
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
SPDIF
C
FBVDDQ_23 NC_32
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
AB26 TP19121
G9
FBVDDQ_24 NC_33
R665R704
G7X MODEL
H16
H17
J9
J10
J23
J24
K9
K11
K12
K21
K22
K24
L23
M23
T25
U25
AA23
AB23
FBA_REFCLK J6
FBC_DBI0 A28
FBC_DBI1 B32
FBA_REFCLK* D1
FBA_REFCLK F1
RFU_FBC_PLLAVDD F6
RFU_FBA_PLLAVDD G8
NC U6
RFU_AUDIO1 V1
RFU_VIDEO3 V3
RFU_VIDEO2 V4
RFU_VIDEO1 V5
NC V6
RFU_AUDIO2 W1
RFU_VIDEO4D31
NCD32
RFU_VIDEO5 M5
0 10K
1%
NC
FBA_REFCLK*
TP19122 R11 R13 R10 R12

NO_STUFF 10K 10K 4.7K 4.7K
1% 1% 1% 1%
Pin Description ACTIVATE TP19347

R669
10K TP19348
GPIO(0) HDMI DETECT HIGH 1% FOR G7X ONLY
GPIO(1) TV DETECT P3.3V
NC
G
1
NO_STUFF
GPIO(2) PWM BRIGHTNESS CONTROL HIGH
S
VGA5_HDMICLK VGA3_HDMICLK
2
3
GPIO(3) LCD VDD On ENABLE HIGH
BAV99LT1
Q1
BSS138
2
GPIO(4) LCD Backlight On/OFF
G
1
HIGH
R630 0
D514
S
GPIO(5) GPU Voltage ID0 HIGH=1.0V,LOW=1.1V AUD3_SPDIF_HDMI VGA5_HDMIDATA VGA3_HDMIDATA
3
2
3
A GPIO(6) GPU Voltage ID1 NC A
Q2
BSS138
1
GPIO(7) GPU Voltage ID2 NC

DRAW DATE TITLE
GPIO(8)
GPIO(9)
Thermal diode Alert
Fan Control
LOW
NO_STUFF
C671 10nF 16V SUN XIAO 6/26/2007
Gevena SAMSUNG
NC CHECK DEV. STEP
ELECTRONICS
GPIO(10) TBD NC
NO_STUFF WUSHIJIANG PV2 NB8P
GPIO(11) HDTV enable HIGH NB8P (4/5) & HDMI CNN
GPIO(12) HDTV DET NC MODULE CODE LAST EDIT

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS P1.8V TMDS_PLLVDD=3.40V
SAMSUNG ELECTRONICS CO’S PROPERTY. B523 P5.0V
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS MMZ1608S121AT TMDS_PLLVDD
P1.2V
C100 C103 C105 TMDS_PLLVDD U6
4700nF L8
0.47nF 1000nF 27nH MIC5219B
10V
1 5
P1.8V IN OUT
B19 1 3 3
C112 C114 C115 KBC3_PWRON
52-C2 MMBD4148 2
EN
4
D B521 MMZ1608S121AT 22nF 4700nF 10000nF GND ADJ R101 D
MMZ1608S121AT D13 27K
25V 10V 6.3V
C72 C73 C75
C77 4700nF C79
FOR NB8 ONLY 4700nF C76 C74 0.47nF 1000nF
10V 4700nF C78
1000nF 0.47nF 100nF R78
10V P1.2V 10V C107
NO_STUFF C80 47K 10000nF
0.47nF
P1.8V 6.3V
B522 P1.2V
R677
MMZ1608S121AT 10K L9 B519
1% 27nH MMZ1608S121AT
MIOA_VDDQ
C98
FOR NB8 ONLY C99
C102
4700nF C532 C113 C314 FOR NB8 ONLY P3.3V
0.47nF
1000nF
g
10V 10000nF 22nF 4700nF
PEX_IOVDD MIOA_VDDQ MIOB_VDDQ PEX_IOVDDQ 6.3V 25V 10V
P1.2V P3.3V P3.3V P1.2V C93 C92 C94
22nF 22nF 4700nF NO_STUFF C705 C703 C718
0.47nF 0.47nF 0.47nF
TP19205 25V 25V 10V
n
NO_STUFF
P1.2V MIOB_VDDQ
l
B520 P3.3V
AG24
AG25
AD23
AC16
AC17
AC21
AC22
AA10
AE18
AE21
AE22
AE15
AF23
AF24
AF25
AF12
AF18
AF21
AF22
AF15
W20
AC9
AD6
AC6
AC7
MMZ1608S121AT
AE7
AA8
AB7
AB8
G23
U20
U23
AF9
AF8
P20
T13
T20
T23
T10
M7
M8
R8
U9
u
FOR NB8 ONLY
T8
T9
C830
NV_PLLAVDD
VDD_LP_1
VDD_LP_2
VDD_LP_3
VDD_LP_4
VDD_LP_5
VDD_LP_6
IFPAB_PLLVDD
IFPCD_PLLVDD
IFPA_IOVDD
IFPB_IOVDD
IFPC_IOVDD
IFPD_IOVDD
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
MIOA_VDDQ_1
MIOA_VDDQ_2
MIOA_VDDQ_3
MIOA_VDDQ_4
MIOA_VDDQ_5
MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3
MIOB_VDDQ_4
MIOB_VDDQ_5
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_PLLAVDD
PEX_PLLDVDD
PLLVDD
VID_PLLVDD
H_PLLVDD
a
C715 C707 C704 4700nF
0.47nF 0.47nF 0.47nF
10V
s i
C AD9 C96 C95 C97 C
IFPAB_PLLGND 22nF 22nF 4700nF NO_STUFF NO_STUFF NO_STUFF
K16 AB10
VDD_1 IFPCD_PLLGND 25V 25V 10V
t
K17 PEX_IOVDD
VDD_2 P1.2V
N13 AE16
VDD_3 PEX_PLLGND P1.2V
EGFX_CORE N14
VDD_4 PLLGND
U10
N16 B527
VDD_5
m
N17 AG14 MMZ1608S121AT
n
N19
VDD_6 GND_111
AG15 C795 C792 C790 C833 C787
C774 C709 C713 C788 C785 P13
VDD_7 GND_112
AG19
22nF 22nF 22nF 4700nF 4700nF
10000NF 10000NF 10000NF 4700nF 4700nF VDD_8 GND_113 25V 25V 25V 10V 10V
P14 AG22
10V 10V 10V 10V 10V
P16
VDD_9 GND_114
AG31 C772 C827
a
VDD_10 GND_115 4700nF
e
P17 AH24 100nF
PEX_IOVDDQ
VDD_11 GND_116 10V
P19 AJ4
VDD_12 GND_117 P1.2V
T14 AJ7
C773 VDD_13 GND_118
4700nF
C784 C786 C712 C776 T15
VDD_14 GND_119
AJ10
100nF 100nF 100nF 100nF T18 AJ13
S fid
10V
T19
U13
VDD_15
VDD_16 U36-5 GND_120
GND_121
AJ16
AJ17 FOR NB8 ONLY
C794
10nF
C789
22nF
C835
22nF
C791
22nF
C719
4700nF
C793
10000NF
VDD_17 GND_122 16V 25V 25V 25V 10V 10V
U14 AJ20
C779 C708 C783 C782 C775
U15
U18
VDD_18
VDD_19 NB8P-SE-H-N-A1/H GND_123
GND_124
AJ23
AJ26
10nF 10nF 10nF 4.7nF 4.7nF VDD_20 GND_125
U19 AJ29
16V 16V 16V 25V 25V
W13
VDD_21
VDD_22
5/5 GND_126
GND_127
AK2
P3.3V P3.3V
W14 AL3
VDD_23 GND_128
W16 AL6
VDD_24 GND_129
n
W17 AL9
C777 C714 C778 C781 W19
VDD_25 GND_130
AK28
4.7nF VDD_26 GND_131 R620
25V
0.47nF 0.47nF 0.47nF Y13
VDD_27 GND_132
AK31 10K C670
B Y14
VDD_28 GND_133
AL11 1% 100nF B
Y16 AL14 U515
VDD_29 GND_134
o
NO_STUFF Y17 AL19 AT88SC0808C-SU
VDD_30 GND_135
Y19 AL22 28-B1 6 8
Y20
VDD_31 GND_136
AL25
GFX3_HCLK 5
SCL VCC
3
R16
VDD_32 GND_137
AM13
GFX3_HDATA 1
SDA NC_3
7
VDD_33 GND_138 NC_1 NC_4
R17 AM16 2 4
VDD_34 GND_139 NC_2 GND
V16 AM17 R621
C
VDD_35 GND_140
V17 AM20 10K
VDD_36 GND_141
P3.3V N20
VDD_SENSE GND_142
AM23 1%
AM26
GND_143
H7 AM29
VDD33_1 GND_144
J7 R31
C702 C701 C717 C710 VDD33_2 GND_145
C706 22nF 22nF 22nF 22nF
K7
VDD33_3 GND_146
T4
1000nF L7 T16
25V 25V 25V 25V VDD33_4 GND_147
L8 T17
VDD33_5 GND_148
L10 T24
VDD33_6 GND_149 P3.3V Q17 TMDS_PLLVDD
M10 T29
VDD33_7 GND_150
AC11 U8 SI2315BDS-T1
C832 C716 VDD33_8 GND_151
C720 C711 10nF 4.7nF
AC12
VDD33_9 GND_152
U16
3
100nF 100nF AE11 U17
2
16V 25V VDD33_10 GND_153
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
D
S
AE12 U24
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
VDD33_11 GND_154
AC24 U29
1
G
VDD33_12 GND_155
AD24
VDD33_13
KBC3_PWRON_INV# R100 0
V2
V13
V14
V15
AL10
AG13
V18
V19
V20
V31
W6
W15
W18
W27
Y4
Y15
Y18
Y29
AA2
AA12
AA21
AA31
AB6
AB27
AC4
AC10
AC23
AC29
AD2
AD16
AD17
AD31
AE6
AE17
AF4
AF7
AF11
AF26
AF29
AG2
AG8
AG10
AG11
AE27
52-C2
A NO_STUFF A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 NB8P
KEVIN LEE 1.0 NB8P (5/5) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PCI_DEVID strap
P3.3V
R646 R672 R640 R639 R642 Pin # (Rev.A02) Descriptions

Straps
D NB8P NO_STUFF NO_STUFF STUFF NO_STUFF STUFF D
-SE
0 0 1 1 1 0 : No BIOS
SUB_VENDOR MIOAD(1)
NB8M NO_STUFF NO_STUFF STUFF STUFF STUFF 1 : Read from BIOS
-GS
0 0 1 1 1
RAMCFG(3:0) MIOB(9) 0111 : SAMSUNG GDDR3 256Mbit
[9,8,1,0] MIOB(8) 0101 : INFINEON GDDR3 256Mbit
MIOB(1) 0011 : SAMSUNG GDDR3 512Mbit
MIOB(0) 0001 : INFINEON GDDR3 512Mbit
TP19207 R640 2K 1%
PEG3_MIOB(3)
25-?3
MIOB(2) 01 : 14.318 MHz
PEG3_MIOB(4) R642 2K 1% CRYSTAL(1:0)
25-?3 MIOB(6) 10 : 27 MHz
g
PCI_DEVID strap TP19208 R639
PEG3_MIOB(5)
2K 1% 11 : Unknown
25-?3
TP19209R672 00 : 13.5 MHz
2K 1% NO_STUFF
PEG3_MIOB(11)
25-?3
TV_MODE(1:0) MIOAD(7) 00 : SECAM 01 : NTSC
n
TP19210R646 2K 1% MIOAD(10) 10 : PAL 11 : CRT
PEG3_MIOB_CTL3 NO_STUFF
25-?3
l
PCI_DEVID(4:0) MIOB_CTL(3) NB8M-GS: 00111 NB8M-SE: 01000
u
1% MIOB(11)
[CTL3,11,3,5,4] NB8M-GT: 00110 NB8P-GS: 00111
MIOB(3)
TP19211 R638 NB8P-SE: 00101
a
PEG3_MIOB(7)
2K MIOB(5)
25-?3 MIOB(4) NB8P-GT: 01000
s i
C C
ROM_TYPE(1:0) MIOB(10) NO ROM(NC)
t
MIOBVSYNC
TP19212 USER STRAP MIOAD(2:5) EDID
m
R645 2K 1%
n
PEG3_MIOB(0)
25-?3
R644 2K 1% NO_STUFF
a e
R641 2K 1%
GPIO(12:0) Sheet 25 Refer to Sheet 25
RAMCFG PEG3_MIOB(1) R643 2K 1% NO_STUFF
25-?3
R674 2K 1% NO_STUFF
S fid
PEG3_MIOB(8)
25-?3
R676 2K 1%
Test Options for GPIO should be updated..
TP19213
R673 2K 1%
PEG3_MIOB(9)
25-?3
n
P1.8V RAMCFG
MAA(2:5)
B R674 R676 R641 R643 B
2 R153 120 NO_STUFF
Samsung Infineon
o
3 R152 120 NO_STUFF
4 R723 120 SS 256Mbit STUFF NO_STUFF STUFF NO_STUFF
NO_STUFF
5 R728 120 NO_STUFF IF 256Mbit STUFF NO_STUFF NO_STUFF STUFF 256Mbit 512Mbit 256Mbit 512Mbit
P1.8V SS 512Mbit NO_STUFF STUFF STUFF NO_STUFF
MAB(2:5)
K4J55323QG K4J52324QC HYB18H256321AFL20(2.0) HYB18H512321AFL20(2.0)
C
IF 512Mbit NO_STUFF STUFF NO_STUFF STUFF (1.2/1.4/1.6/2.0) (1.2/1.4/1.6/2.0) HYB18H256321AFL16(1.6) HYB18H512321AFL16(1.6)
2 R157 120 NO_STUFF K4J55323QF HYB18H256324AF-20(2.0) HYB18H512324AF-20(1.6)
3 R156 120 NO_STUFF (1.4/1.6/2.0) HYB18H256321AF-14(1.4) HYB18H512321AF-14(1.4)
4 R729 120 NO_STUFF HYB18H256321AF-12(1.2) HYB18H512321AF-12(1.2)
5 R733 120 NO_STUFF
8M*32BIT 16M*32BIT 8M*32BIT 16M*32BIT
P1.8V
MAC(2:5)
2 R87 120 NO_STUFF

3 R86 120 NO_STUFF
4 R85 120 NO_STUFF
5 R84 120 NO_STUFF
P1.8V
MAD(2:5)
2 R111 120 NO_STUFF

3 R110 120 NO_STUFF
A 4 R109 120 A
NO_STUFF
5 R108 120 NO_STUFF
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 NB8P
KEVIN LEE 1.0 NB8P STRAP BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY P1.8V
DQA(63:0)
SAMSUNG ELECTRONICS CO’S PROPERTY. 26-D4
MAA(11:0) B531 B28
26-C3 B30
MMZ1608S121AT P1.8V B31
MMZ1608S121AT
MMZ1608S121AT MVDDQ MMZ1608S121AT
D
Video Memory C173C878
100nF100nF
P1.8V C175C152
100nF100nF
P1.8V
D
MVDDC
(A Channel)
M12
M12
A11
V11
K12
A12
A11
V11
K12
A12
F12
F12
M1
M1
C1
C4
C9
C1
C4
C9
A2
V2
K1
A1
A2
V2
K1
A1
F1
F1
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDDA_1
VDDA_2
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDDA_1
VDDA_2
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
K4 C12 0 K4 C12
A0 VDDQ_6 A0 VDDQ_6
H2 E1 1 H2 E1
11 10 9 8 7 6 5 4 3 2 1 0
A1 VDDQ_7 A1 VDDQ_7
K3 E4 K3 E4
A2 VDDQ_8 MAB(2) A2 VDDQ_8
M4 A3 VDDQ_9 E9 MAB(3)
26-B3 M4 A3 VDDQ_9 E9
K9 E12 26-B3 K9 E12
g
P1.8V H11 A4 VDDQ_10 J4
MAB(4)
26-B3 H11 A4 VDDQ_10 J4
A5 VDDQ_11 P1.8V MAB(5) A5 VDDQ_11
K10 A6 VDDQ_12 J9 6 26-B3 K10 A6 VDDQ_12 J9
L9 N1 7 L9 N1
A7 VDDQ_13 A7 VDDQ_13
R724 K11 A8_AP VDDQ_14 N4 8 K11 A8_AP VDDQ_14 N4
120 NO_STUFF
n
120 M9 N9 9 M9 N9
R726 A9 VDDQ_15 A9 VDDQ_15
NO_STUFF 5% K2
A10 VDDQ_16
N12 10 K2
A10 VDDQ_16
N12
L4 R1 R732R730 11 L4 R1
l
R4 120 120 R4
VDDQ_18 5% 5% VDDQ_18
VDDQ_19 R9 VDDQ_19 R9
u
J11 R12 J11 R12
MCLKA0 CK VDDQ_20 MCLKA1 CK VDDQ_20
MCLKA0#
26-C3 J10 CK* VDDQ_21 V1 MCLKA1#
26-C3 J10 CK* VDDQ_21 V1
a
26-C3 V12 26-C3 V12
VDDQ_22 VDDQ_22
R727 240 R731 240
H4 B2 H4 B2
s
32
i
C MCKEA CKE DQ0 MCKEA CKE DQ0 C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
26-B3 30-B2 B3 26-B3 30-D4 B3 33
DQ1 DQ1
BAA0
G4 BA0 U8 DQ2 C2 BAA0
G4 BA0 U9 DQ2 C2 34
t
26-B3 30-D2 G9 C3 26-B3 30-D4 G9 C3 35
BAA1
BAA2
26-B3 30-D2 H10
BA1
BA2
K4J52324QC-BC14 DQ3
DQ4 E2
BAA1
BAA2
26-B3 H10
30-D4
BA1
BA2
K4J52324QC-BC14 DQ3
DQ4 E2 36
26-B3 30-D2 F3 26-B3 30-D4 F3 37
V4 DQ5 F2 V4 DQ5 F2 38
SEN DQ6 SEN DQ6
m
V9 G3 V9 G3 39
n
DRAM_RSTA#
26-B3 30-D2
RESET DQ7 B11
DRAM_RSTA#
26-B3 30-D2
RESET DQ7 B11 40
DQ8 DQ8
CSA0#
F9 CS* DQ9 B10 CSA0#
F9 CS* DQ9 B10 41
26-B3 30-C2 H3 C11 26-B3 30-C3 H3 C11 42
RASA#
26-B3 30-C2 F4
RAS* DQ10 C10
RASA#
26-B3 30-C3 F4 RAS* DQ10 C10 43
a
CASA# CAS* DQ11 CASA# CAS* DQ11
e
26-B3 30-C2 H9 E11 26-B3 30-C3 H9 E11 44
WEA#
26-B3 30-B2
WE* DQ12 F10
WEA#
26-B3 30-B3
WE* DQ12 F10 45
DQ13 DQ13
DQ14 F11 DQ14 F11 46
D3 G10 D3 G10 47
RDQSA(0) RDQS_0 DQ15 RDQSA(4) RDQS_0 DQ15
26-C3 D10 M11 26-C3 D10 M11 48
S fid
26-C3 P10 L10 26-C3 P10 L10 49
RDQSA(2)
26-C3 P3 RDQS_2 DQ17 N11
RDQSA(6)
26-C3 P3 RDQS_2 DQ17 N11 50
26-C3 M10 26-C3 M10 51
DQ19 R11 DQ19 R11 52
DQ20 DQ20
WDQSA(0)
D2 WDQS_0 DQ21 R10 WDQSA(4)
D2 WDQS_0 DQ21 R10 53
26-C3 D11 T11 26-C3 D11 T11 54
WDQSA(1) WDQS_1 DQ22 WDQSA(5) WDQS_1 DQ22
WDQSA(2)
26-C3 P11 WDQS_2 DQ23 T10 WDQSA(6)
26-C3 P11 WDQS_2 DQ23 T10 55
26-C3 P2 M2 26-C3 P2 M2 56
P1.8V WDQSA(3)
26-C3
WDQS_3 DQ24 L3
WDQSA(7)
26-C3
WDQS_3 DQ24 L3 57
DQ25 DQ25
n
N2 N2 58
E3 DQ26 M3 E3 DQ26 M3 59
DQMA(0) DM0 DQ27 DQMA(4) DM0 DQ27
R154 DQMA(1)
26-D3 E10 DM1 DQ28 R2 DQMA(5)
26-D3 E10 DM1 DQ28 R2 60
B 2K DQMA(2)
26-D3 N10
DM2 DQ29
R3 DQMA(6)
26-D3 N10
DM2 DQ29
R3 61 B
1% 0.7VDDQA 26-D3 N3 T2 0.7VDDQA 26-D3 N3 T2 62
2.37K DQMA(3) DM3 DQ30 DQMA(7) DM3 DQ30
o
26-D3 T3 26-D3 T3 63
DQ31 DQ31
H1 VREF_1 VSSQ_1 B1 H1 VREF_1 VSSQ_1 B1
5.49K H12 B4 H12 B4
VREF_2 VSSQ_2 VREF_2 VSSQ_2
R155 C174 VSSQ_3 B9 VSSQ_3 B9
100nF B12 B12
C
4.7K VSSQ_4 VSSQ_4
P1.8V 1% D1 D1
VSSQ_5 VSSQ_5
A9 D4 A9 D4
A4 MF VSSQ_6 D9 A4 MF VSSQ_6 D9
ZQ VSSQ_7 ZQ VSSQ_7
VSSQ_8 D12 VSSQ_8 D12
G2 G2
VSSQ_9 VSSQ_9
C177 C109 C883 C881 C178 C176 J2 RFU1 VSSQ_10 G11 J2 RFU1 VSSQ_10 G11
2200nF 100nF 100nF 100nF 100nF 100nF J3 L2 J3 L2
RFU2 VSSQ_11 L11 RFU2 VSSQ_11 L11
VSSQ_12 VSSQ_12
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
VSSQ_20
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
VSSQ_20
P1 R144 P1
VSSA_1
VSSA_2
VSSA_1
VSSA_2
VSSQ_13 0 VSSQ_13
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
R143 P4 240 P4
0 VSSQ_14 R141 VSSQ_14
R140240
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
P9
P12
T1
T4
T9
T12
P1.8V
A A
C170 C90 C172 C171 C877 C879
2200nF 100nF 100nF 100nF 100nF 100nF DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 VIDEO MEMORY ( CHANNEL A) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
DQC(63:0)
PROPRIETARY INFORMATION THAT IS 26-D2
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P1.8V B24
EXCEPT AS AUTHORIZED BY SAMSUNG. MAC(11:0) MMZ1608S121AT
B25
26-C1 MMZ1608S121AT
P1.8V P1.8V
D
Video Memory B20
B21
MMZ1608S121AT
MMZ1608S121AT
C121 C118 P1.8V
100nF 100nF
(C Channel) C89 C85

100nF 100nF
M12
M12
A11
V11
K12
A12
A11
V11
K12
A12
F12
F12
M1
M1
C1
C4
C9
C1
C4
C9
A2
V2
K1
A1
A2
V2
K1
A1
F1
F1
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDDA_1
VDDA_2
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDDA_1
VDDA_2
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
0 K4 C12 0 K4 C12
1 H2
A0 VDDQ_6 E1 1 H2 A0 VDDQ_6 E1
2 K3
A1 VDDQ_7 A1 VDDQ_7
A2 VDDQ_8 E4 MAD(2)
K3 A2 VDDQ_8 E4
3 M4 E9 26-B1 M4 E9
4 K9
A3 VDDQ_9 MAD(3) A3 VDDQ_9
A4 VDDQ_10 E12 MAD(4)
26-B1 K9 A4 VDDQ_10 E12
5 H11 J4 26-B1 H11 J4
g
P1.8V 6 K10
A5 VDDQ_11 J9 P1.8V 6
MAD(5)
26-B1 K10 A5 VDDQ_11 J9
7 L9 A7 VDDQ_13 N1 7 L9 A7 VDDQ_13 N1
8 K11 N4 8 K11 N4
9 M9
A8_AP VDDQ_14 A8_AP VDDQ_14
N9 9 M9 N9
A9 VDDQ_15 NO_STUFF A9 VDDQ_15
n
R82 R81 10 K2 N12 10 K2 N12
11 L4
A10 VDDQ_16 R1 11 L4 A10 VDDQ_16 R1
120 120 A11 VDDQ_17 R105 R106 A11 VDDQ_17
NO_STUFF R4 120 120 R4
VDDQ_18 VDDQ_18
l
R9 5% R9
VDDQ_19 VDDQ_19
MCLKC0
J11 CK VDDQ_20 R12 MCLKC1
J11 CK VDDQ_20 R12
u
26-C3 J10 V1 26-C3 J10 V1
MCLKC0# CK* VDDQ_21 MCLKC1# CK* VDDQ_21
26-C3
VDDQ_22 V12 26-C3
VDDQ_22 V12
a
R83 240 R107 240
H4 B2 0 H4 B2 32
MCKEC CKE DQ0 MCKEC CKE DQ0
B3 B3
s
1 33
i
26-C3 26-B1 31-D3
C G4 U514 DQ1 C2 2 G4 U517 DQ1 C2 34 C
BAC0 BA0 DQ2 BAC0 BA0 DQ2
26-B1 31-D2 G9 BA1 DQ3 C3 3 26-B1 31-D3 G9 BA1 DQ3 C3 35
BAC1
K4J52324QC-BC14 BAC1
K4J52324QC-BC14
t
26-B1 31-D2 H10 E2 4 26-B1 31-D3 H10 E2 36
BAC2 BA2 DQ4 BAC2 BA2 DQ4
26-B1 31-D2
DQ5 F3 5 26-B1 31-D3
DQ5 F3 37
V4 F2 6 V4 F2 38
V9 SEN DQ6 G3 7 V9 SEN DQ6 G3 39
DRAM_RSTC# RESET DQ7 DRAM_RSTC# RESET DQ7
m
26-C3 B11 8 26-B1 31-C3 B11 40
n
F9 DQ8 B10 9 F9 DQ8 B10 41
CSC0#
31-C2 H3
CS* DQ9 CSC0# CS* DQ9
RASC#
26-B1
RAS* DQ10 C11 10
RASC#
26-B1 31-C3 H3 RAS* DQ10 C11 42
26-B1 31-C2 F4 C10 11 26-B1 31-C3 F4 C10 43
CASC#
26-B1 31-C2 H9
CAS* DQ11 E11 12
CASC#
26-B1 31-C3 H9 CAS* DQ11 E11 44
a
WEC# WE* DQ12 WEC# WE* DQ12
e
26-B1 31-B2 F10 13 26-B1 31-B3 F10 45
DQ13 F11 14
DQ13 F11 46
DQ14 DQ14
RDQSC(0)
D3 RDQS_0 DQ15 G10 15
RDQSC(4)
D3 RDQS_0 DQ15 G10 47
26-C1 D10 M11 16 26-C1 D10 M11 48
RDQSC(1) RDQS_1 DQ16 RDQSC(5) RDQS_1 DQ16
26-C1 P10 L10 17 26-C1 P10 L10 49
S fid
RDQSC(2) RDQS_2 DQ17 RDQSC(6) RDQS_2 DQ17
26-C1 P3 N11 18 26-C1 P3 N11 50
RDQSC(3)
26-C1
RDQS_3 DQ18 M10 19
RDQSC(7)
26-C1
RDQS_3 DQ18 M10 51
DQ19 DQ19
R11 20 R11 52
D2 DQ20 R10 21 D2 DQ20 R10 53
WDQSC(0) WDQS_0 DQ21 WDQSC(4) WDQS_0 DQ21
WDQSC(1)
26-C1 D11 WDQS_1 DQ22 T11 22
WDQSC(5)
26-C1 D11 WDQS_1 DQ22 T11 54
26-C1 P11 T10 23 26-C1 P11 T10 55
WDQSC(2) WDQS_2 DQ23 WDQSC(6) WDQS_2 DQ23
WDQSC(3)
26-C1 P2 WDQS_3 DQ24 M2 24
WDQSC(7)
26-C1 P2 WDQS_3 DQ24 M2 56
26-C1 L3 25 26-C1 L3 57
DQ25 N2 26
DQ25 N2 58
DQ26 DQ26
n
E3 M3 27 E3 M3 59
P1.8V DQMC(0)
26-D1 E10 DM0 DQ27 R2 28
DQMC(4)
26-D1 E10 DM0 DQ27 R2 60
DQMC(1) DM1 DQ28 DQMC(5) DM1 DQ28
DQMC(2)
26-D1 N10 DM2 DQ29 R3 29
DQMC(6)
26-D1 N10 DM2 DQ29 R3 61
B R113 DQMC(3)
26-D1 N3
DM3 DQ30
T2 30
DQMC(7)
26-D1 N3
DM3 DQ30
T2 62 B
2.37K 2K0.7VDDQA 26-D1
DQ31
T3 31 0.7VDDQA 26-D1
DQ31
T3 63
o
1%
H1 B1 H1 B1
VREF_1 VSSQ_1 VREF_1 VSSQ_1
H12 VREF_2 VSSQ_2 B4 H12 VREF_2 VSSQ_2 B4
R112 B9 B9
5.49K VSSQ_3 VSSQ_3
4.7K C122 VSSQ_4 B12 VSSQ_4 B12
P1.8V 1% 100nF D1 D1
C
A9 VSSQ_5 D4 A9 VSSQ_5 D4
MF VSSQ_6 MF VSSQ_6
A4 D9 A4 D9
ZQ VSSQ_7 D12 ZQ VSSQ_7 D12
VSSQ_8 VSSQ_8
VSSQ_9 G2 VSSQ_9 G2
C91 C137 C117 C120 C136 C119 J2
RFU1 VSSQ_10
G11 J2
RFU1 VSSQ_10
G11
2200nF 100nF 100nF 100nF 100nF 100nF J3 RFU2 VSSQ_11 L2 J3 RFU2 VSSQ_11 L2
L11 L11
VSSQ_12 VSSQ_12
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
VSSQ_20
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
VSSQ_20
P1 P1
VSSA_1
VSSA_2
VSSA_1
VSSA_2
VSSQ_13 VSSQ_13
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
P4 P4
VSSQ_14 VSSQ_14
0 R103 0 R126
240 240
R102 R125
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
J1
J12
P9
P12
T1
T4
T9
T12
P1.8V
A C138 C87 C110 C111 C88 C86 A

2200nF 100nF 100nF 100nF 100nF 100nF
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 VIDEO MEMORY ( CHANNEL B) BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY. P3.3V VDC_INV VDC_INV
C973
100nF
D D
J36
SOCK-30P-2R-SMD-MNT
P3.3V
USB CAMERA FUNCTION 1
3
2
4 LCD3_BKLTON
LCD3_BRIT 5 6 72-C1 27-B2
P5.0V VGA1_EVEN_CLK+ 27-A2 72-C1
7 8 72-C1 27-B2
VGA1_EVEN_A2+
VGA1_EVEN_CLK- 9 10 VGA1_EVEN_A2-
4.7K
4.7K
27-A2 72-C1 72-C1 27-B2
VGA1_EVEN_A1+ 27-B2 72-C1
11 12 72-C1 27-B2
VGA1_EVEN_A0+
VGA1_EVEN_A1- 27-B2 72-C1
13 14 VGA1_EVEN_A0-
B3 J43 15 16
B515 VGA1_ODD_CLK+ 17 18
72-C1 27-B2
VGA1_ODD_A2+
ACM2012H-900-2P BLM18PG181SN1 HDR-4P-1R-SMD 27-B2 72-C1 72-B1 27-B2
g
TP19107 VGA1_ODD_CLK- 19 20 VGA1_ODD_A2-
R47
R46
1 4 27-B2 72-C1 72-C1 27-B2
1 VGA1_ODD_A1+ 27-B2 72-C1
21 22 72-C1 27-B2
VGA1_ODD_A0+
USB3_P6- 2 VGA1_ODD_A1- 27-B2 72-C1
23 24 VGA1_ODD_A0-
USB3_P6+ 3 25 26 27-A3
EDID_CLK
4 27 28 EDID_DATA
n
2 3
C563 LCD_VDD3V 29 30
31
100nF MNT1
32
MNT2
s u i a l C
t
MT5
RMNT-2.5-5.0-1P
P5.0V_AUX P3.3V LCD_VDD3V
m n
Q9
SI2315BDS-T1
R49
3
2
a
200K
e
D
S
1%
1
G
C20
330nF C21
1%
10V
100nF
R48 51.1K
S fid
D 3
Q5
R39 10K 1% G RHU002N06
GFX3_LCDVDDON 27-A2 72-B1 1
R38 S
2
100K
1%
Q4
o n B
C
VDC SI2307BDS-T1-E3 VDC_INV
P3.3V
3
2
B6
D
S
MMZ1608S121AT
1
R35
G
C17 C18 GFX3_BRIT 32-D3

LCD3_BRIT
150K 100nF 100nF
1% U2
25V 25V 1
5 7SZ08
KBC3_BKLTON +
51-D3 4 R36 1K 1%
R27 0 2 30-C3
LCD3_BKLTON
GFX3_BLON 27-A2 72-D3
-
R33 3
51.1K R25 R24
P3.3V 1% 100K 100K
1% 1%
D 3
Q3
R32 10K 1%
G RHU002N06
1
S
A 2 A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 LCD CONNECTER &
KEVIN LEE 1.0 SPEAD SPECTRUM BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY. P5.0V
1
MMBD4148
D505 3
D D
B504
MMZ1608S121AT
C901
CRT CONNECTOR
L500
100nF
J38
82nH DSUB-15-3R-F
1
GFX3_RED 31-?3 6
L501
82nH 11
2
1%
1%
1%
GFX3_GREEN 31-?3 7
L502
82nH 12
3
GFX3_BLUE 31-?3 8
150
150
150
0.0033nF
0.0033nF
0.0033nF
n
13
1
4
C924 C952 C954 9
PGB1010603NR
D519
PGB1010603NR
D502
PGB1010603NR
D503
l
0.0033nF 0.0033nF 0.0033nF 14
5 16
R754
R752
R745
2
C896
C951
C955
u
10 17
15
a
NO_STUFF
s i
C C
CRT5_DDCDATA
t
32-A3 67-C2
CRT5_DDCCLK 32-A2 67-C2
CRT5_HSYNC 31-?3
CRT5_VSYNC 31-?3
m n
0.1nF
0.1nF
270pF
270pF
3
1 2
C899
C903
e
BAV99LT1 3
C897
C905
D504 1 2
BAV99LT1
D501
S fid P3.3V P3.3V VCC_CRT P3.3V P3.3V VCC_CRT
n
R755 R767 R766 R756
B B
G
5
2
4.7K 4.7K 4.7K 4.7K
o S
D
GFX3_DDCDATA CRT5_DDCDATA GFX3_DDCCLK CRT5_DDCCLK
6
67-C2 32-B4 31-?3
3
27-B3 72-A2 67-C2 32-B4
4
Q529-2 Q529-1
SM6K2 SM6K2
VCC_CRT
5
C953
D506
MMBD4148
3
100nF
1
P5.0V
C 2
VCC_CRT
+
5
4
C950
100nF
R746 40.2 1%
+ R753 40.2 1% GFX3_VSYNC 27-B3 72-B1 OE*
-
31-?4
CRT5_VSYNC
2 4
A GFX3_HSYNC 27-B3 72-B1 OE*
-
31-?4
CRT5_HSYNC 3 A
3 1 U502
1 U503 SN74AHCT1G125DCKR
SN74AHCT1G125DCKR DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MIAN
KEVIN LEE 1.0 CRT PORT BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P3.3V
P3.3V P3.3V
g
R663
10K
U516 1%
LPC47N207
5 64 0
LPC3_LAD(3:0)
VCC1 LAD_0
n
17 2 1
VCC2 LAD_1
31 4 2
POWER
VCC3 LAD_2
42 7 3
VCC4 LAD_3
l
60 14
VCC5 *LFRAME LPC3_LFRAME#
LPC INTERFACE
24
*LDRQ0 CHP3_LDRQ0#
u
48 12
VTR *LDRQ1
22
CHP3_LDRQ1#
*PCI_RESET TP19219 PLT3_RST#
a
27 25 R693 0
28
GPIO10 *LPCPD
16 CHP3_SUSSTAT# P5.0V
GPIO11 *CLKRUN PCI3_CLKRUN#
s
30 19
i
C 32
GPIO12_IO_SMI* SER_IRQ
47 TP19218 CHP3_SERIRQ C
GPIO13_IRQIN1 *IO_PME
GENERAL PURPOSE I/O

33 21
GPIO14_IRQIN2 PCI_CLK CLK3_PCLKSIO
t
34 10 J40
35
GPIO15 LPC_CLK_33
23
CLK3_PCLKSIO_DS HDR-10P-SMD
36
GPIO16 SIO_14M CLK3_SIO14
DOCKING LPC INTERFACE

R662 0 TP19216 GPIO17 1
38 63
KBC3_PWRGD GPIO30 DLAD_0 SIO3_DTR1# 2
m
39 1
n
40
GPIO31 DLAD_1
3 SIO3_TXD1 3
41
GPIO32 DLAD_2
6
SIO3_RTS1# 4
43
GPIO33 DLAD_3
13
SIO3_CTS1# 5
44
GPIO34 *DLFRAME
11 SIO3_RI1# 6
a
GPIO35 *DLDRQ1 SIO3_RXD1 7
e
46 15
61
GPIO36 *DCLKRUN
18 SIO3_DSR1# 8
GPIO37 DSER_IRQ
9
SIO3_DCD1# 9
DLPC_CLK_33 10
49 26 11
IRTX2 DSIO_14M MNT1
50 12 MNT2
S fid
IR
IRRX2
51 52
IRMODEM_IPRX3 RXD1
53 SIO3_RXD1
8
TXD1
54
SIO3_TXD1
VSS1 *DSR1 SIO3_DSR1#
UART1
20 56
29
VSS2 *CTS1
58
SIO3_CTS1#
GND
37
VSS3 *RI1
59
SIO3_RI1#
45
VSS4 *DCD1
55
SIO3_DCD1#
62
VSS5 RTS1*_SYSOTP0
57
SIO3_RTS1#
VSS6 DTR1*_SYSOTP1 SIO3_DTR1# P3.3V
n
R617 10K 1%
B B
R618 10K 1%
Co Option
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 SIO CHIPSET
KEVIN LEE 1.0 BA41-


60
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
P3.3V_MCD
D D
P3.3V P3.3V
P3.3V_MCD
C205 R255 C244

C245 C246 10000nF 10K 100nF
100nF 100nF 6.3V
1%
U12
AU6371B51
3 15
VCC CARD_POWER
B35 14
VDDH R253 R252 R232 R233
BLM18PG181SN1 18 2.4K 2.4K 2.4K 47K
TP19224 TP19223 1
MS_INS
19
MCD3_MSINS# 1% 1% 1%
g
VDD SMCD#
10 20
C207 VDD_U CFCD#
10000nF C206 C204 13
V18 SDCD#
21
MCD3_SDCD#
100nF 100nF 22
6.3V XDCD#
23
MCD3_XDCD#
CFRESET_XDWR# MCD3_XDWE#
n
4 24
USB3_P8+ 5
DP CFWR#_XDRD#
25 MCD3_XDRE#
USB3_P8- DM CFRD#_XDCE#
26
MCD3_XDCE#
CFAD2_XDALE MCD3_XDALE
l
TP19225 7 27 TP19230 R230 33
TP19226 XI CFAD1_MSCLK_XDCLE
28 TP19231
MCD3_XDCLE_MSCLK
8
XO CFAD0_SDCLK_MSBS R231 33
MCD3_SDCLK_MSBS
u
R235 1M 1% 30
P3.3V TP19227 CFD0_MSD0_SDCMD MCD3_MSDATA0_SDCMD
R234 47K 47
RESET# CFD1_MSD1_XDWP#
31
MCD3_MSDATA1_XDWP#
12MHZ
a
32
Y2 TP19228 2
CFD2_MSD2_SDWP
33 MCD3_MSDATA2_SDWP
REXT CFD3_MSD3_XDRB# MCD3_MSDATA3_XDRB#
s
34
i
C R254 47KTP19229 16
CFD4_SDD0 MCD3_SDDATA0 C
2
35
READER_EN CFD5_SDD1
36
MCD3_SDDATA1
CFD6_SDD2 MCD3_SDDATA2 C202 C201
t
29 37
GPON6 CFD7_SDD3 MCD3_SDDATA3 0.01nF 0.01nF
C209 C208 C203 CFD8_SDD4_XDD0
38
MCD3_XDDATA0 0.5pF 0.5pF
0.018nF 0.018nF 100nF
11 39
12
NC_1 CFD9_SDD5_XDD1
40 MCD3_XDDATA1
NC_2 CFD10_SDD6_XDD2 MCD3_XDDATA2
m
R236 41
n
6
CFD11_SDD7_XDD3
42 MCD3_XDDATA3
390 GND CFD12_XDD4 MCD3_XDDATA4
17 43
GNDH CFD13_XDD5
44
MCD3_XDDATA5 NO_STUFF NO_STUFF
9
CFD14_XDD6
45 MCD3_XDDATA6
a
GND_U CFD15_XDD7 MCD3_XDDATA7
e
48 46
GND_VDD CFWT#
C243 C1000 C1001
0.022nF 0.015nF 0.015nF
S fid
NO_STUFF NO_STUFF
P3.3V_MCD
J41 C169 C185

10nF
R015-610-LM
n
2200nF
16V
R161 49.9 1% 10 4
MCD3_XDDATA3 MMC_DATA7 XD_VCC
MCD3_XDDATA2 R162 49.9 1% 13
MMC_DATA6 SD_VCC
19
B MCD3_XDDATA1
R229 49.9 1% 24
MMC_DATA5 MS_VCC
29 B
R226 49.9 1% 28
MCD3_XDDATA0 MMC_DATA4
o
34
6
XD_ALE
35
MCD3_XDALE
MCD3_XDDATA7 7
XD_DATA7 XD_CLE MCD3_XDCLE_MSCLK
MCD3_XDDATA6 9
XD_DATA6
37
MCD3_XDDATA5 11
XD_DATA5 XD_RE
15
MCD3_XDRE#
MCD3_XDDATA4 XD_DATA4 SD_CLK
27
MCD3_SDCLK_MSBS
C
MS_SCLK
12
MCD3_XDDATA3 XD_DATA3
R225 49.9 1% 30 33
MCD3_SDDATA3 R228 49.9 1% 25
SD_DATA3 XD_WE
26
MCD3_XDWE#
MCD3_MSDATA3_XDRB# MS_DATA3 SD_CMD
14
MCD3_MSDATA0_SDCMD
MS_BS
17
MCD3_XDDATA2 XD_DATA2 TP19232 5.6K
MCD3_SDDATA2 R224 49.9 1% 31
SD_DATA2 XD_WP
32 R227 MCD3_MSDATA1_XDWP#
R163 49.9 1% 20
MCD3_MSDATA2_SDWP MS_DATA2
38
21
XD_R
2
MCD3_MSDATA3_XDRB#
MCD3_XDDATA1 R151 49.9 1% 5
XD_DATA1 SD_WP MCD3_MSDATA2_SDWP
MCD3_SDDATA1 SD_DATA1
MCD3_MSDATA1_XDWP# R164 49.9 1% 16
MS_DATA1 XD_CE
36
MCD3_XDCE#
22 23
MCD3_XDDATA0 XD_DATA0 MS_INS MCD3_MSINS#
R150 49.9 1% 8 40
MCD3_SDDATA0 R165 49.9 1% 18
SD_DATA0 XD_CD
1 MCD3_XDCD#
MCD3_MSDATA0_SDCMD MS_DATA0 SD_CD MCD3_SDCD#
3 41
39
GND_1 GND_3
42
C200 C184
GND_2 GND_4 0.01nF 0.01nF
0.5pF 0.5pF
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CARDREADER 7 IN 1
KEVIN LEE 1.0 BA41-


60
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
MINI CARD FOR ROBSON Mini PCI Express Card
30.00 mm
P3.3V_AUX
50.95 mm
48.05 mm
D
Mini PCI Express Card
Mini Card R119
Top
Pin 1
D
30.00 mm 0
Odd Pins : Top side
Even Pins : Bottom Side
P3.3V P3.3V P1.5V P3.3V
50.95 mm
48.05 mm
C130
Top 100nF
Pin 1
C129
C128
R132 R789 100nF 10000nF C127 C126
Odd Pins : Top side 100nF 100nF
g
10K 0 6.3V
Even Pins : Bottom Side 1% J11
MINICARD-52P
R135 0 1 2
PEX3_WAKE# 3
WAKE* P3.3V_1
4
P3.3V P3.3V P1.5V P3.3V P3.3V_AUX RSVD_1 GND_1
n
5 6
RSVD_2 P1.5V_1
7 8
CLKREQ* SIM_VCC_C1
9 10
GND_2 SIM_DATAIO_C7
l
11 12
CLK1_ROBSON# REFCLK- SIM_CLK_C3
R64 R53 C39 R59 CLK1_ROBSON
8-C1 48-B3 13
REFCLK+ SIM_RESET_C2
14
u
10K 0 100nF 0 8-C1 48-B3 15
GND_3 SIM_VPP_C6
16
1%
J10 TP19234
a
39-C4 17 18
MINICARD-52P SIM_RSVD_C8 GND_4
37-C3 52-B4 19 20
TP19233 SIM_RSVD_C4 W_DISABLE*
R65 C40 R120
s
0 1 2 21 22 0
i
22-C4 25-C4
C PEX3_WAKE# 3
WAKE* P3.3V_1
4 100nF 23
GND_5 PERST*
24 21-C1 14-B1
PLT3_RST# C
5
RSVD_1 GND_1
6
PEX1_NF_RXN0 21-B3 48-B3 25
PERN0 P3.3V_AUX
26 37-A4 28-C3
RSVD_2 P1.5V_1 PEX1_NF_RXP0 PERP0 GND_6 27-C2 22-B4
t
7 8 21-B3 48-B3 27 28 #9 38-C2
MIN3_CLKREQ# 8-B1 9
CLKREQ* SIM_VCC_C1
10 29
GND_7 P1.5V_2
30
GND_2 SIM_DATAIO_C7 GND_8 SMB_CLK
11 12 31 32
CLK1_MINIPCIE# 8-B1 13
REFCLK- SIM_CLK_C3
14 PEX1_NF_TXN0 21-B3 48-B3 33
PETN0 SMB_DATA
34
CLK1_MINIPCIE REFCLK+ SIM_RESET_C2 PEX1_NF_TXP0 PETP0 GND_9
m
8-B1 15 16 21-B3 48-B3 35 36 R118 0
n
GND_3 SIM_VPP_C6
37
GND_10 USB_D-
38 R117 0 22-B2
USB3_P4-
17 18 39
RSVD_11 USB_D+
40 22-B2
USB3_P4+
SIM_RSVD_C8 GND_4 RSVD_12 GND_11
19 20 52-B2 51-C4 39-C3 38-A3 41 42
21
SIM_RSVD_C4 W_DISABLE*
22 R58 0 KBC3_RFOFF# 43
RSVD_13 LED_WWAN*
44
a
GND_5 PERST* PLT3_RST# RSVD_14 LED_WLAN*
e
23 24 27-C2 22-B4 21-C1 14-B1 45 46
PEX1_MINRXN1 21-B3 25
PERN0 P3.3V_AUX
26 #9 28-C3 39-C3 37-A4 47
RSVD_15 LED_WPAN*
48
PEX1_MINRXP1 21-B3 27
PERP0 GND_6
28 49
RSVD_16 P1.5V_3
50
GND_7 P1.5V_2 RSVD_17 GND_12
29 30 51 52
GND_8 SMB_CLK RSVD_18 P3.3V_2
31 32
S fid
PEX1_MINTXN1 21-B3 33
PETN0 SMB_DATA
34 53
PEX1_MINTXP1 21-B3 35
PETP0 GND_9
36
MNT1
54
GND_10 USB_D- MNT2
37 38
TP19343 RSVD_11 USB_D+
39 40
RSVD_12 GND_11
41 42
RSVD_13 LED_WWAN*
43 44
RSVD_14 LED_WLAN*
45 46
RSVD_15 LED_WPAN*
47 48
RSVD_16 P1.5V_3
49 50
RSVD_17 GND_12
n
51 52
RSVD_18 P3.3V_2
53
MNT1
B MNT2
54 B
o
M2 M3
HEAD HEAD
DIA DIA
LENGTH LENGTH
10000nF
P3.3V
C33
C32
100nF
C31
100nF
C55
10000nF
P3.3V
C54
100nF
C
KBC3_RFOFF# 38-C2 39-C3
2
P3.3V
5
+
U5
7SZ14
51-C4 - 52-B2
4
66-C2
WLON_LED#
C133
10000nF
6.3V
P3.3V
C132
100nF
C131
100nF 10000nF
6.3V
C134
P3.3V
C135
100nF
6.3V 6.3V 3
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MINI CARD
KEVIN LEE 1.0 FRO BOBSON AND DVB-T BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P3.3V P3.3V_EXP P3.3V_AUX_EXP P1.5V_EXP P3.3V P3.3V_AUX P1.5V P3.3V P3.3V_EXP P1.5V_EXP P3.3V_AUX_EXP
g
R510 C517 C520 C518 C519 R508 C522 C521 C523
10K J35 100nF 100nF 100nF 100nF 10K 100nF 100nF 100nF
1% EDGE-XPRESS-26P 1%
n
2
USB3_P7- 3
USB_D-
15
USB3_P7+ USB_D+ +3.3V_2
l
14 U500
+3.3V_1 R5538D001-TR-F
4
EXP3_CPUSB# CPUSB#
u
12 2 3
+3.3V_AUX 3.3VIN_1 3.3VOUT_1
R505 0 7 4 5
SMB3_CLK SMB_CLK 3.3VIN_2 3.3VOUT_2
R507
a
0 8 10
SMB3_DATA SMB_DATA +1.5V_1
9 12 11
+1.5v_2 1.5VIN_1 1.5VOUT_1
R506 0 11 14 13
s i
C PEX3_WAKE# WAKE# 1.5VIN_2 1.5VOUT_2 C
13 26 15
EXP3_PERST# PERST# GND_4 AUXOUT
t
23 17
GND_3 AUXIN
16 20 8
EXP3_CLKREQ# CLKREQ# GND_2 PERST* EXP3_PERST#
EXP3_CPPE# 17
CPPE# GND_1
1 18
RCLKEN CPPE*
10 R503 0
EXP3_CPPE#
18 9
CLK1_EXPRESSCARD# REFCLK- CPUSB* EXP3_CPUSB#
m
19 20
CLK1_EXPRESSCARD
n
REFCLK+ SHDN*
1 16
TP19235 STBY* NC_5
21 6 R504 0 6
PEX1_EXPRN2 22
PERN0 RESERVED_2
5
PLT3_RST# SYSRST*
7
PEX1_EXPRP2 PERP0 RESERVED_1
19
GND
a
OC*
e
24 27 21
PEX1_EXPTXN2 25
PETN0 MNT1
28
THERMAL
PEX1_EXPTXP2 PETP0 MNT2
Type 1 module
34.00 mm
EXPRESS CARD
Type 2 module
54.00 mm
S fid
B
n J34 B
EXPRESS CARD
EXPRESS CARD
EXPRESS-26P-FRAME
75.00 mm
75.00 mm
THIS SIDE UP
THIS SIDE UP
o
INSERT
INSERT
1
MNT1
2
MNT2
C
34.00 mm W 54.00 mm W
X X
75.00 mm L 75.00 mm L
X X
5.00 mm H 5.00 mm H
A A
SAMSUNG
ELECTRONICS
60
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
C769 10nF
P3.3V
D G_AUD
D
C168 10nF
C309 C308 C306
10000nF
6.3V 100nF 100nF
U16 G_AUD
ALC262-GR
1 36
9
DVDD_CORE0 LINE_OUT_R_D
35 41-C4
AUD5_LINE_O_R
DVDD_CORE1 LINE_OUT_L_D 41-C4
AUD5_LINE_O_L
41
43
HP_OUT_R_A
39 43-C4
AUD5_HP_O_R C116 10nF
AUD3_GPIO0# 41-A4 44
GPIO0 HP_OUT_L_A 43-C4
AUD5_HP_O_L
AUD3_GPIO1# GPIO1
43-B4 2 22 C280 1000nF
g
3
GPIO2 MIC1_R_B
21 C277 1000nF 43-B3
AUD5_MIC1_R
GPIO3 MIC1_L_B 43-B3
AUD5_MIC1_L
G_AUD
17 TP19236C278 1000nF R793 0
MIC2_R_F
5 16 TP19237C279 1000nF R247 2.2K
AUD3_SDO SDATA_OUT MIC2_L_F AUD5_MIC1_VREF_R
n
20-B3 65-D2 71-B3 6 R246 2.2K 40-B2
AUD3_BCLK 20-C3
20-C3 R346 22 8
BCLK
24 40-B2
AUD5_MIC1_VREF_L
AUD3_SDI0 10
SDATA_IN LINE1_R_C
23
AUD3_SYNC SYNC LINE1_L_C G_AUD
l
20-C3 11
AUD3_RST# RESET* AUD5_INTMIC R347 0
AUD3_BEEP
20-C3 C305 1000nF 12
BEEP LINE1_VREFO
29
u
40-A3
C307 LINE2_R_E
15
a
0.018nF 18 14
CD_L LINE2_L_E
19 G_AUD
CD_GND R299 0
s
20 31
i
C CD_R LINE2_VREFO C
37
MONO_OUT
t
47
SPDIF_EAPD
48 45 G_AUD
AUD3_SPDIF_HDMI 43-C1 67-B2 71-C3
SPDIFO NC0
46
NC1
33
DCVOL
m
30
n
MIC2_VREFO AUD5_MIC_VREF
40 32
JDREF MIC1_VREFO_R
28 40-C2
AUD5_MIC1_VREF_R
MIC1_VREFO_L 40-C2
AUD5_MIC1_VREF_L
a e
13 27
AUD5_SENS_A 40-B1 34
SENSE_A VREF
SENSE_B
26
C232
AVSS1 VDD_AUD 10000nF
42
AVSS2 6.3V
R303
S fid
20K 4 25
DVSS_CORE0 AVDD1
1% 7 38
DVSS_CORE1 AVDD2
C231 C281
100nF 100nF
INSTPAR SHORT5
H/P_A
INSTPAR SHORT6 41-B1 1% 39.2K R300 40-B4
AUD5_SENS_HP# AUD5_SENS_A
n
G_AUD G_AUD G_AUD MIC_B
43-B3 1% 20K R301
AUD5_SENS_MIC#
G_AUD
B B
o
VDD_AUD
C
R302
20K
1%
40-C4
AUD3_BEEP
PC BEEP D 3
R345
C304
4.7nF
Q28 1K 25V
R344 1K TP19238
1% G RHU002N06 1%
AUD3_SPKR 22-A4 1
S
2
G_AUD
G_AUD
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 AUDIO CODEC
KEVIN LEE 1.0 FRO HDMI BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
VDD_AMP
D D
VDD_AMP
C237
C288 C236 10000nF
NO_STUFF
R251 R250 100nF 100nF 6.3V
100K 100K
1% 1%
g
U18 G_AUD
TPA6017A2
AUD5_LINE_O_R C287 100nF 17 RIN- VDD
16
TP19241
n
40-D2 7 6
TP19242 RIN+ PVDD1
2 15
TP19243 GAIN0 PVDD2
3
GAIN1
l
18
ROUT+ SPK5_R+
AUD5_LINE_O_L C235 100nF 5 LIN- ROUT-
14 41-D2
SPK5_R-
TP19245
u
40-C2 9 41-D2
C241 470nF 16V
INSTPAR
TP19244 LIN+
10 BYPASS LOUT+ 4
SPK5_L+
a
8 41-C2
100nF
100nF
100nF
1
LOUT- 41-C2
SPK5_L-
GND1 TP19240 R304 10K 1%
NO_STUFF
s
11 19
i
C GND2 SHDN* AUD3_GPIO0# C
NO_STUFF
R249 13 12 41-A3
GND3 NC
0 20 GND4
C240
C238
C239
t
21 3 D
THERM Q22
SHORT3
RHU002N06 G R305 1K 1%
51-B3 43-C4
KBC3_SPKMUTE
1
67-B2
m
S
2
a e n G_AUD G_AUD
G_AUD
S fid INTERNAL STEREO SPEAKERS
o n
SPK5_R-
SPK5_R+
SPK5_L-
SPK5_L+
39-C1
39-C1
39-C1
39-C1
B40
B37
B38
B36
HU-1M2012-121JT
HU-1M2012-121JT
HU-1M2012-121JT
HU-1M2012-121JT
5
6
J42
HDR-4P-SMD
1
2
3
4
MNT1
B
C
MNT2
C313 C290 C291 C289

1nF 1nF 1nF 1nF
NO_STUFF
G_AUD
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 AUDIO
KEVIN LEE 1.0 AMP BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
HEADPHONE
J12
B27 JACK-PHONE-6P-LIME
BLM18PG181SN1 5
AUD5_SENS_HP# 43-C1 4
EC25 100uF 16V AS R138 56 TP19247 3 R
AUD5_HP_O_R EC26 100uF TP19248
40-C2 16V AS R122 56 6
g
AUD5_HP_O_L 40-C2 2 L
B26 1
R121 R137 BLM18PG181SN1
0.1nF
0.1nF
20K 20K G1
1nF
1% 1% G2
n
NO_STUFF
C151
C149
C150
l
G_AUD
P3.3V
u
2 J13
a
3 G_AUD
JACK-PHONE-6P-PINK
R139 10K 1% R123 1 Q20 B533
s
1K 1% 5
i
40-B1
C AUD3_GPIO1# 40-C4 1 MMBT3904 AUD5_SENS_MIC# 4 C
DTA114YUA Connect to Mount-hole. 40-C2 R796 330 1% BLM18PG181SN1 3 R
3 Q21 2 AUD5_MIC1_R
t
3 6
D 3 R124 1K 1% 1 Q18 40-C2 R797 330 1% 2 L
AUD5_MIC1_L
1nF
Q19 MMBT3904 1
G RHU002N06 HP depop circuit B534 C768 C766 G1
KBC3_SPKMUTE 2
BLM18PG181SN1
m
1 1nF 1nF G2
C767
S 2
NO_STUFF
MIC JACK
a e
G_AUD
G_AUD
S fid
The traces led to Audio Jacks have the width over 10mil
NO_STUFF
Internal MIC
n
R703 0
B B
NO_STUFF VDD_AUD
o
3.3K R248
AUD5_MIC_VREF
U519-1
LMV358M
B529 2 8
- V
BLM18PG181SN1 1
C
2
C817 1000nF 6.3V 3
OUT AUD5_INTMIC
G
1 +
4
HDR-2P-SMD
J502 VDD_AUD VDD_AUD
R699 R700
C816 2K 47K GND2
0.1nF U519-2 1%
R739 LMV358M R702 4.7K
6 8
20K - V
1% OUT
7 R701 C819 2.2nF
5 G 1K
+
4 1%
C893
1000nF R740
6.3V 20K C818
1%
1000nF
GND2 6.3V
A GND2 GND2 GND2 A

DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 HEAD PHONE JACK
KEVIN LEE 1.0 AND MIC JACK BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D
AUDIO POWER D
P5.0V_AUD
n g l
C
s u t
U17
i a
MIC5252-4.75BM5
VDD_AUD
P5.0V_AUD
B39
CIS10J270NC
VDD_AMP
C
m n
TP19252 1 5
IN OUT
2
GND C312
3 4 C311 C286
C310 C284 EN BYPASS C283 C285 100nF 100nF 10000nF
a
10000nF 100nF 10000nF 6.3V
e
100nF
6.3V INSTPAR 6.3V
SHORT510
C282
S fid
1000nF
INSTPAR
SHORT9 G_AUD
G_AUD G_AUD G_AUD
VDD_AUD
o n B
C
INSTPAR
SHORT506
C233 C234
10000nF 100nF C876 10nF 16V
6.3V 10V
R722 0
GND2
G_AUD
GND2
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 AUDIO
KEVIN LEE 1.0 AUDIO POWER BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS P3.3V_AUX
BLM18PG181SN1
C972 100nF
P3.3V_AUX
C970 100nF
B516
C963 100nF TP19256
D D
P3.3V_AUX C962 100nF TP19257
R529
1K
1% R776 R769 R781 R775 R783 R782 R785 R784
49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
1% 1% 1% 1% 1% 1% 1% 1%
C605 C606 C607
GIGA-model 4700nF 22000nF
100nF
U506 10V 20%
R570
88E8039 4.7K
R546 0 5 30
R524 R525 PLT3_RST# PERST# NC_5 LAN3_TRD3+ 3 NO_STUFF
4.7K 4.7K 6 31
PEX3_WAKE# 55
WAKE# NC_6
26
LAN3_TRD3-
BCP69-16
g
CLK1_PCIELAN 56
REFCLKP NC_7
27 LAN3_TRD2+
CLK1_PCIELAN# REFCLKN NC_8 LAN3_TRD2- 1 Q514
PEX1_GLAN_RXP3 C566 100nF 49
PCIE_TXP RXP
20
LAN3_TRD1+ 2 4
C567 100nF 50 21 P1.2V_LAN
PEX1_GLAN_RXN3 54
PCIE_TXN RXN
17
LAN3_TRD1-
10/100M-model PEX1_GLAN_TXP3 PCIE_RXP TXP LAN3_TRD0+
n
53 18
PEX1_GLAN_TXN3 PCIE_RXN TXN LAN3_TRD0-
42
LAN3_CLKREQ# PU_VDDO_TTL_1
l
43
PU_VDDO_TTL_2
u
37 59
NC_1 LED_ACTI# C608 C609
35
NC_2 LED_SPEED#
60 C597 10000nF 4700nF
a
34
NC_3 NC_9
62 100nF 6.3V 6.3V
36 63
NC_4 LED_LINK#
s i
C 38 3 C
LAN3_VPDCLK 41
VPD_CLK CTRL12
4
LAN3_VPDDATA VPD_DATA CTRL25
t
P3.3V_AUX P3.3V_AUX 45 P3.3V_AUX P3.3V
BLM18PG181SN1
VDDO_TTL_1 P3.3V_AUX
40 9
VDDO_TTL_2 SWITCH_VAUX
1 11
VDDO_TTL_3 SWITCH_VCC
m
61
n
VDDO_TTL_4
R530 4.7K
8
VDDO_TTL_5
12 R528 0
B517
VAUX_AVLBL
48
a
VDD_1
e
44
VDD_2 VMAIN_AVLBL
47 R545 0
C985 C979 39
VDD_3
100nF 100nF 33
VDD_4 LOM_DISABLE#
10
13
25MHz
P1.2V_LAN VDD_5
7 15
S fid
VDD_6 XTALI
Y500
2
VDD_7
58 14
VDD_8 XTALO C603
C604 4700nF
TP19253 100nF
1
32
AVDDL_1 10V
28 R581
AVDDL_2
22 46 4.7K
AVDDL_3 TESTMODE
19 29
AVDDL_4 TSTPT 3
57
AVDDL_5 HSDDACP
24 C986 C982
52 25 0.018nF 0.018nF BCP69-16
AVDDL_6 HSDACN
n
51 16 1 Q513
C981 C23 C571 C975 C565 C564 C22 C575 C976 C576 AVDDL_7 RSET
10000nF 2 4
1nF 1nF 1nF 1nF 100nF 100nF 100nF 100nF 100nF 6.3V
23
AVDD
B THERMAL
65 B
64 P1.8V_P2.5V_LAN
VDD25
o
R526 R527
NO_STUFF 4.99K 2K
1% 1%
88E8055 : 4.99K ohm
C
88E8039 : 2K ohm
C601 C596
C602 10000nF 4700nF
100nF 6.3V 6.3V
P3.3V_AUX P3.3V_AUX
P1.8V_P2.5V_LAN
U505 R771 R774

AT24C08AN-10SU-2.7 4.7K 4.7K
1 8
C573 A0 VCC
C577 C572 C978 C29 C977 2 7
C574 C961 C570 C568 C971 C964 C569 1nF 1nF 100nF 100nF 100nF 10000nF
3
A1 WP
6
10000nF 6.3V A2 SCL LAN3_VPDCLK
1nF 1nF 100nF 100nF 100nF 100nF 4 5
6.3V GND SDA LAN3_VPDDATA
NO_STUFF
NO_STUFF
A NO_STUFF A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 LAN
KEVIN LEE 1.0 88E8055 BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. The ditance between LAN controller
and transformer is designed to extend less than two inches.
P1.8V_P2.5V_LAN
D D
LT500
H1286NL J45
C957 TP19119 1
100nF 24 JACK-MODULE-10P
TDC TCT
2 23 1
LAN3_TRD0+ 45-B2 45-D1 3
TD+ TX+
22 2
TD+
LAN3_TRD0- 45-D1
TD- TX-
3
TD-
RD+
C958 100nF 4
RDC RCT
21 4
TERM1
5 20 5
LAN3_TRD1+ 45-A2 45-D1 6
RD+ RX+
19 6
TERM2
LAN3_TRD1- 45-D1
RD- RX-
7
RD-
TERM3
C959 100nF 7
NC1 NC7
18 8
TERM4
8 17
g
LAN3_TRD2+ 45-A2 45-D1 9
NC2 NC8
16 9
LAN3_TRD2- 45-D1
NC3 NC9
10
TIP
RING
C960 100nF 10
NC4 NC10
15
CIC21J601NE
CIC21J601NE
11 14
LAN3_TRD3+ NC5 NC11
n
45-B2 45-D1 12 13
LAN3_TRD3- 45-D1
NC6 NC12
GIGA-model
l
R19
B507
R20 R18 R17 C907 C4
75
B1
75 75 75 1nF 1nF
u
1% 1% 1% 1%
3KV 3KV
10/100 GIGA 2
a
h1286 H5015 1
2603-000079 BA26-00004A TP19342
s
HDR-2P-SMD
i
C J3 C
m n t C10
1nF
3KV
a
S fid e
B
o n B
C
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 LAN
KEVIN LEE 1.0 LAN JACK RJ45 BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS P3.3V_MICOM
C297 C268 100nF

100nF 100nF C198
D D
P3.3V_MICOM
P3.3V_MICOM
g
R324 10K 1%
CHP3_SLPS4#
C270 C226 C197 22-C4 51-B3
n
100nF 100nF 100nF R334 R337 R332 NO_STUFF
P5.0V 10K 10K 10K
1% 1% 1%
l
REM3_SIO R296 10K 1%
u
KBC3_CHKPWRSW#
a
51-B2 48-D3 31-C2 11-C4
10K
10K
51-B4 31-D1
KBC3_RST#
100
36
37
59
s i
7
1
6
5
4
9
8
C C
NMI
RES*
RESO*
VCC_1
VCC_2
VCC_3
MD0
MD1
VCCB
VCL
STBY*
t
R330
R329
48 49
47
PA0 P40
50 51-A3 24-B2 11-C4
KBC3_RSMRST#
31
PA1 P41
51 51-C2 44-B2 43-B2 43-A4
KBC3_SUSPWR
30
PA2 P42
52 KBC3_THERM_SMDATA
PA3 P43 KBC3_BKLTON
m
21 53
n
20
PA4 P44
54 51-A3 24-B2
KBC3_PWRBTN#
11
PA5 P45
55 TP19258 R221 0 51-B4 46-B1 45-C4
KBC3_VRON
KBC5_TCLK 49-C2 10
PA6 P46
56
KBC3_BLCKPWRSW# P3.3V_MICOM
KBC5_TDATA 49-C2
PA7 P47
R327 4.7K 51-B3 26-B3 23-C1
KBC3_CPURST# P3.3V
a e
24-B2 51-B3 91 14
KBC3_EXTSMI# 24-B2 51-A3 90
PB0 P50
13 51-B2 49-B3
KBC3_LED_ACIN# P3.3V_MICOM
KBC3_RUNSCI# 49-D4 51-B3 81
PB1 P51
12 51-D2 49-B3
KBC3_LED_CHARGE#
KBC3_SCLED# 49-D4 51-A3 80
PB2 P52 51-B3 42-A2
KBC3_SMCLK#
KBC3_NUMLED# 49-D4 51-C2 69
PB3
26 R297
S fid
KBC3_CAPSLED# 49-A3 51-B2 68
PB4 P60
27 51-B2 45-B4 24-C2
VRM3_CPU_PWRGD
KBC3_LED_POWER# PB5 P61 LID3_SWITCH# 100K
24-B2 37-A4 51-B4 58 28 51-D2 1%
KBC3_PWRGD 44-B2 46-A4 47-B4 47-C2 47-C4 51-B4 57
PB6
U14 P62
29
REM3_SIO
KBC3_PWRON 48-B2 51-A3 51-B3
PB7 P63
32
KBC5_KSI(0:7) H8S-2110B P64 TP19260 KBC3_CHGEN
0 79
P10 P65
33 51-C4 42-A2 R295 47 51-D4 42-B1
BAT3_DETECT#
1 78 34
P11 P66 CHP3_SLPS3#
2 77
P12 P67
35 51-B3 39-A2
PEX3_WAKE# C269
3 76 100nF
4 75
P13
38 8 51-D3 51-D2 51-A3 48-B2
KBC5_KSO(8:15) C271
P14 P70
n
5 74
P15 P71
39 9 100nF
6 73 40 10 P3.3V_MICOM
48-B2 51-A3 51-D2 51-D3 7 72
P16 50 26 P72
41 11 P3.3V_MICOM
KBC5_KSO(0:7) P17 51 25 P73 P3.3V_AUX
B P74
42 12 B
0 67 43 13
P20 P75
o
1 66 44 14 TP19261
P21 P76
2 65 45 15
P22 P77
3 64
P23 R298 C296 R319
4 63 93 10K 100nF 10K
5 62
P24 P80
94 51-C2 24-B2
KBC3_WAKESCI# 1%
P25 P81 KBC3_A20G R294
6 61 95 51-B4 26-B3 23-C1
C
P26 P82 PCI3_CLKRUN# 100K
7 60 96 51-C2 37-A4 32-C4 26-C3 24-C2 1%
P27 P83
75 1 97 U15
LPC3_LAD(0:3) 23-D1 27-A4 27-C3 51-D3 0 82 TXD P84 98 51-B3 36-C2 35-B4
KBC3_RFOFF# R292 TP19262 5
P30 76 100 RXD P85 KBC3_SPKMUTE 1
IN+
LMV331IDBVR
1 83 99 41-B3 + 4
2 84
P31 P86 51-D2 11-C1
KBC3_THERM_SMCLK TP19263
30.1K 1% - SYS_SHDN#
P32 3 IN-
3 85 25 2
P33 P90
86 24
LPC3_LFRAME# P34 P91 REM3_SIO
R291
23-C1 27-B4 27-C3 R245
51-D2 0 87 23 R321 1K 1% R293
PLT3_RST# P35 P92 ADT3_SEL
1%
1M
13-D4 24-B2 24-B4 24-C3 51-A4 88 22 R322 1K 1%
51-C4 1K
CLK3_PCLKMICOM 8-C4 51-B2 89
P36 P93
19 KBC3_CHKPWRSW#
CHP3_SERIRQ 24-C2 26-B3 37-C3 51-B3
P37 P94
18 51-C2 24-D2
CHP3_SUSSTAT#
2
P95
17
CHP3_SLPS5#
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
3
XTAL P96
16 51-B4 32-C4
CHP3_SLPS4# NO_STUFF
EXTAL P97 51-A3 42-A2
KBC3_SMDATA#
15
46
70
71
92
R326 4.7K
1
P3.3V_MICOM
Y4
C301 C299
10MHz
0.022nF 0.022nF 10K R320

A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MICOM
KEVIN LEE 1.0 211B BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
MICOM RESET FOR MICOM UPDATE
P3.3V_MICOM
NO_STUFF
D D
P3.3V_MICOM
R338
30.1K
R341 1%
100K 51-B4 31-D2
KBC3_RST#
R343 R336
D 1
100K 10K
1% Q26-2 R333 R335 1%
G SM6K2 100K 10K 51-D4 51-C3
1% 1% KBC3_CHKPWRSW#
5 C300
D 1 S
6 1000nF C298
Q27-2 D 3
TP19264 SM6K2 6.3V Q25 330nF
G
10V
5 RHU002N06
g
G
KBC3_BLCKPWRSW# 51-C3
C303
S
6 1
S
1000nF 2
6.3V KBC3_PWRSW# 66-C2 67-B3
n
POWER SWITCH BLOCK WHILE MICOM UPDATE
P3.3V_MICOM
l
VDC
u
R342
100K
4
a
R340 1% D
430K Q26-1
TP19266 SM6K2
s
1%
i
G
C 2
C
D 4 S
3
t
Q27-1
TP19265 G SM6K2
R339
2
S
3 ADAPTERIN/CHARGING LED
m
C302 150K
n
100nF 1%
BSS84
e
Q23
P3.3V_MICOM
R325
3
150 1%
2
LED3_GREEN
D
S
S fid
1
G
POWER ON LED KBC3_LED_ACIN# 51-C3
R323 10K 1%
BSS84
Q24
P5.0V P5.0V P3.3V_MICOM
POWER ON SW BUTTON R331
3
150 1%
2
LED3_AMBER
D
1S
G
KBC3_PWRSW# R328
n
10K 1%
KBC3_LED_CHARGE# 51-C3
R768
150
B 1% B
1
2
SW-TACT-4P
SW502
o
C956 P3.3V_AUX
1nF
U11
1 5
4
LTST-C193TBKT-AC 7SZ14
LED500 KBC3_LED_POWER# 2 + 4 R223 56.2 1%
LED3_POWERLED
51-C4 -
C
2
3
R770
R222
10K
3
1%
1M
1 Q533 1%
MMBT3904
2
C199
1000nF
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MICOM
KEVIN LEE 1.0 MICOM LOGIC SCH BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SAMSUNG ELECTRONICS CO’S PROPERTY. Switched Power On (P5V) INSTPAR P5.0V_AUD
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS SHORT504
EXCEPT AS AUTHORIZED BY SAMSUNG. P5.0V_AUX P5.0V
U513
AP4435GM INSTPAR
1
S1 D1
8 SHORT503
2 7
C650 3
S2 D2
6
100nF S3 D3
R604 4 5 INSTPAR
D 25V G D4
SHORT502 D
100K C668
1%
4700nF
C669
R606 10K 1%
6.3V
100nF
D 3
Q521
R603 10K 1%G RHU002N06
KBC3_PWRON 27-C3 44-B2 1
56-D4 57-B2
S 2
51-C4 56-A4
61-A4 62-C4
Switched Power On (P3.3V)
n g l
u
P12.0V_ALW P3.3V_AUX P3.3V
a
AP6680AGM
s
Q517
i
C Place near to C
D1 D2 D3 D4
S1 S2 S3
5 6 7 8
1 2 3
C626
t
R598 C627 4700nF
100nF
4
470K
G
6.3V
m n
Q518 D 3
RHU002N06
G C628
KBC3_PWRON_INV# 27-C3 44-B4 53-A4
10nF
1
a e
53-D2 53-D4 59-C3 S
53-C2 2
S fid
B
P12.0V_ALW
Switched Power On (P1.8V)
P1.8V_AUX
AP6680AGM
Q526
o n P1.8V
B
C
D1 D2 D3 D4
S1 S2 S3
Place near to
5 6 7 8
1 2 3
C765
4700nF
4
G
6.3V
R692
470K
Q540
AP6680AGM
Q525D 3
D1 D2 D3 D4
S1 S2 S3
RHU002N06 C764
5 6 7 8
1 2 3
G 10nF
KBC3_PWRON_INV# 27-C3 44-B4 53-C2 1
53-C4 53-D2 53-D4
4
S
G
59-C3 2
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 SWITCH POWER P1.5V BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
VDC
D D
VCCP_CORE P1.25V AND P1.2V
NO_STUFF
100nF
C945 C948 1nF
EC28
100nF 68uF NO_STUFF
25V TP19270 R750 20K 1%
C946 AL
C993
g
R751
0.1nF 30.1K
1%
n
NO_STUFF P3.3V_AUX VDC
P5.0V_AUX
l
R749
Q531 G_P1.25V
0
u
PHKD13N03LT NO_STUFF EC29
1 8
VTT3_PWRGD 100nF
S2 D2_2 R761 68uF
TP19288
TP19287
a
2
G2 D2_1
7 C196 100K C949 25V
3 6 1000nF R220 1% Q532 AL
S1 D1_2
PHKD13N03LT
s
4 5
i
6.3V 100K
6
5
4
3
2
1
C G1 D1_1
1% 1 8 C
TP19272 S2 D2_2
VO2
VFB2
TONSEL
GND
VFB1
VO1
2 7
G2 D2_1
t
VCCP_CORE TP19286 7 24 3 6 P1.25V
PGD2 PGD1 TP19271 TP19273 4 S1 D1_2 P1.2V
8 23 5
TP19284 TP192699 EN2 EN1 G1 D1_1
L11 22 L13
TP19283 VBST2 U521 VBST1 100nF
2.2uH 10 21 3.9uH
TP19282100nF 3.3 DRVH2 DRVH1 R762 3.3 C968 TP19274
m
11 20
n
C965 R757 12
LL2 TPS51124RGER LL1
19
DRVL2 DRVL1
R146 0
PGND2
PGND1
V5FILT
EC27
TRIP2
TRIP1
R145
V5IN
THM
C181 330uF 0
a e
100nF 2.5V
AL P5.0V_AUX EC508
25
13
14
15
16
17
18
330uF
2.5V
TP19278 AL
S fid
TP19281 NO_STUFF
3.3 TP19276 C967
R759 TP19279 4700nF
6.3V BAT54
D518
TP19277
1 3
C966 R760
R758 1000nF 11K
10K 1% TP19275 R764 10K 1%
1% KBC3_PWRON
n
NO_STUFF
B B
1nF
R748
o
20K G_P1.25V
1%
C947
C
TP19280 R763 0
C969
100nF R765
10V 470K
1%
INSTPAR
R747 NO_STUFF SHORT508
51.1K C994
1% 0.1nF G_P1.25V
G_P1.25V G_P1.25V
A A
G_P1.25V
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 VCCP P1.25V AND P1.2V BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
DDR2 Power
D D
R133
VDC P5.0V_AUX P5.0V P5.0V_AUX
1%
1K
KBC3_SUSPWR
n
C148
NO_STUFF 2.2nF
l
VDC
R131 R134
BAT54
D516
1
715K 10 R717
u
1%
P1.8V_AUX U518 470K G_DDR
C182 C183
3
SC486IMLTRT C939 C940
R720
a
100nF 100nF 68uF 68uF
11 7
10
25V 25V
VTTEN PGD 25V 25V AL AL
s
3
i
C 2
VDDQS
1 C
TON EN_PSV
100nF
R738
C892
C871 6
FB
25V
t
3.3
1000nF 8 5 6 7 8
REF TP19345
1nF 9 24 D1 D2 D3 D4
COMP BST
1nF R718 C147 10
VTTS
C872 7.5K 5
VCCA Q528
G_DDR P1.8V_AUX (1.8V) (10A)
m
1% 4 23 G AP6680AGM L12
n
VSSA DH
NO_STUFF
C870 ILIM
21 R737 20K 1% 4 2.2uH (354 ~ 366KHz)
1000nF 15 22 5 6S1 S2
7 8S3
G_DDR VTT_1 LX D11D2 D3
14 2 3D4
VTT_2
EC506 EC507
a e
P1.8V_AUX 13 19 Q527 330uF 330uF C995 C996
VTTIN_1 DL
12
VTTIN_2 VDDP
20 G AP6680AGM 2.5V 2.5V 100nF 100nF
G_DDR AL AL
4 R744
1000nF 17 18 P5.0V_AUX S1 S2 S3
4.7
PGND_2 PGND_1 1 2 3
1% C867 16 25
S fid
30.1K PGND_3 THERM TP19290
1000nF
C891
R719
C938
1nF FOR EMI enhancement
G_DDR NO_STUFF P0.9V

INSTPAR
SHORT505
n
C866 C865
C869 1nF
10000nF 10000nF
B 1nF C868 6.3V 6.3V B
o
NO_STUFF NO_STUFF
R716
10
G_DDR
14-B1 18-C1 18-C3
C
MEM1_VREF
10
R130
INSTPAR
SHORT2
1000nF
C146
G_DDR G_DDR
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 DDR2 POWER BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
PROPRIETARY INFORMATION THAT IS EMC NEED ADD
CHARGER & POWER MANAGEMENT
C920 C913 C922 C912 C998 C41 C43 C42 B340A
VDC_ADPT VDC D12
J47 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF
JACK-DC-POWER-3P 25V 25V 25V 25V 25V 25V 25V 25V EMC NEED ADD 2 1
CIS10J270NC U501 U522 U4
D MNT2 B502 AP4435GM AP4435GM AP4435GM D
MNT1
4
1
S1 D1
8 8
D1 S1
1 R786 1
S1 D1
8 EMC NEED ADD
2 7 7 2 EC5 EC10 2 7
3 C917 S2 D2 D2 S2 C317 0.01 1W 1% C587 C586 S2 D2
2 100nF C916 R742 C894 3
S3 D3
6 6
D3 S3
3
100nF 68uF 68uF 100nF 100nF
3
S3 D3
6
C27
10nF 100K 1000nF 4 5 5 4 25V 25V 4 5
B503 25V G D4 D4 G 25V AL AL 25V 25V G D4 100nF
1%
25V
CIS10J270NC
R741
100K
1%
C999 C26
100nF 100nF C319 C316 C25 Q506
10000nF 100nF 100nF FDS8958A EMC NEED ADD
g
25V 25V
D4
5 6
EMC NEED ADD C34 HU-1M2012-121JT
S2 3
100nF B7 BATT-CONN-7P
D3
ICHG=2.47A FOR 6 & 9 CELLS To enhance 25V J46
G2
n
4
L1
DMB performance (060206) 8.2uH R50
VCHG=12.94V 0.01 1W 1% 7
D2
8
6
S1 1
ILIMIT=4.27A
D1 7
B8 5
HU-1M2012-121JT 4
u
C591 C590
G1
2
CHG_REF To enhance 3
10nF 10nF
(4.2235V) DMB performance (060310) 2
a
LDO_P5.4V EC6 EC7 1
s i
C G_CHG G_CHG 68uF 68uF C
25V 25V
R51
AL AL 470K
t
R565 R54 C35 C28
MMBD301
51.1K 30.1K 100nF 100nF B514
1% 1% R561 25V 25V MMZ1608S121AT
D511
1
33 BAT3_DETECT#
m
51-B2
(2.66V)
n
C562
3
25V
R563 0.1nF
100nF
20K R55 U509 B513
1% 1000nF MAX1909ETI+T C588 C599 C592 MMZ1608S121AT
a
51.1K
e
1% C589 26 25 1000nF 1000nF
C598 CSSP CSSN 58-A2
BAT3_SMDATA#
1000nF 27
PDS DHIV
22 C561
G_CHG 24 0.1nF
SRC G_CHG
1 28 B512
S fid
LDO_P5.4V G_CHG DCIN PDL
2 MMZ1608S121AT
G_CHG (0 ~ 3.6V) LDO
11 21
VCTL DLOV BAT3_SMCLK#
(0.9 ~ 3.6V) 10
ICTL DHI
23 58-A2
7
MODE DLO
20 C560
R569 3 19 0.1nF
3 ACIN PGND
10K
D 18
Q511 VDC_ADPT CSIP
1% 6 17
ACOK CSIN
G RHU002N06 5 16
PKPRES* BATT CHG_REF (4.2235V)
1 8
3 IINP
n
D S 9 15
1K 2 G_CHG CLS GND
1% Q510 R61 13 4
R567 RHU002N06 CCV REF
G 301K 12
KBC3_CHGEN CCI
B 51-C3 1 1% R562 14
CCS THERM
29 B
R568 S
2 10K C600
(15.16V)
o
470K 1% 1000nF P3.3V_MICOM
R60
47K C595 C593 C594
10nF 10nF INSTPAR
100nF
BAV99LT1
BAV99LT1
2
2
25V SHORT1
C
LDO_P5.4V G_CHG
D510
D509
G_CHG
3
1
1
R571 G_CHG G_CHG
200K
1%
ADT3_SEL 51-A3 51-C1

CHG_REF R544 100 1%
(ACTIVE HIGH) R572 BAT3_SMDATA# KBC3_SMDATA#
300K 58-C1 51-D1 51-A3
R543 100 1%
BAT3_SMCLK# 58-B1 51-D1 51-A3
KBC3_SMCLK#
R566
150K
1%
G_CHG
R564
A 200K A
1%
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
G_CHG WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 CHARGE & BATTERY CONN BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. P3.3V_ALW/AUX & P5V_AUX
D D
P5.0V_ALW
VDC
P5.0V_ALW
R586
49.9
1%
P5.0V_ALW
C615 C616
g
R584 1000nF 100nF
100K
1%
C617 C618
4.7nF 100nF EC17
n
10000nF
C612 C611 25V 25V
C614 100nF 10000nF
C613
KBC3_PWRON_INV# 4700nF 25V
l
1000nF
6.3V NO_STUFF
R583
u
3
100K
D
VDC
1%
Q515
RHU002N06
a
G
KBC3_PWRON 3
1
Vton = GND 2 1
s i
S
C 2 C
5V / 3.3V : 400KHz / 500KHz BAT54A R66
C36 C37 10K
t
D512 U512
EC11 100nF 4.7nF
1%
10000nF MAX8734AEEI+T 25V
P3.3V_AUX 25V 25V C610 59-B2 5 18 100nF (5.5A)
100nF ILIM3 17
ILIM3 LDO5
20
NO_STUFF VCC V+ C652
Q10 25V (Real : 2.5A Max)
m
59-A2 11 14R614 3.3
n
PHKD13N03LT ILIM5
R585 3.3 28
ILIM5 BST5
16
BST3 DH5 P5.0V_AUX
8 1 26 15
D2_2 S2 TP19297 DH3 LX5
L4 7 2 27 19 L5 NO_STUFF
D2_1 G2 LX3 DL5 Q520
3.9uH 6 3 13 21 3.9uH
a
D1_2 S1 TON OUT5 NO_STUFF
TP19296
e
5 4 24 9 PHKD13N03LT
D1_1 G1 DL3 FB5
22 6 1 8
OUT3 SHDN* S2 D2_2
EC16 R69 7 4 2 7
FB3 ON5 G2 D2_1
C997 330uF C44 200K NO_STUFF 2
PGOOD ON3
3 3
S1 D1_2
6 R72
100nF 100nF 1% R67 0R613 TP19294
0 12 23 4 5
6.3V 200K EC21
S fid
AL SKIP* GND G1 D1_1
10
PRO* REF
8 R71 1% 330uF C70
18 mohm 25 1 6.3V 100nF
LDO3 NC 0
SHORT509 AL
R68 18 mohm
200K NO_STUFF INSTPAR
1% R70
G_P3.3V
200K
1%
G_P3.3V
n
C651
1000nF
B VDC P12.0V_ALW P5.0V_AUX B
P3.3V_AUX
BSS84
o
Q13
G_P3.3V
R605
4.7K
R75
3
R582 10K
Q14 1
3
1%
2
30.1K
MMBT3904
S
1% R610 R611
3 AUX_PG
1
G
C
100K 100K 2
1 Q519 1% 1% C69
MMBT3904
G
10nF
1
R607
3
BZX84C12L
ZD500
KBC3_RSMRST# KBC3_RSMRSTF#
C629 22-B4
2
22-B4
(Selectable : KBC3_RST#)
3
0
25-A4 25-A4
1nF C630
Q522
RHU002N06
1
10000nF
51-C3 ILIM3 59-C3 67-B2 59-A4 57-B1 51-B3
KBC3_SUSPWR
TP19292
R76 0
51-B3 9-B3
SYS_SHDN#
ILIM5 59-C3
NO_STUFF
R77 0
THM3_STP#
R609 R612 R608
200K 200K 301K
1% 1% 1%
P3.3V_MICOM
A G_P3.3V G_P3.3V A
C56
4700nF DRAW DATE TITLE
6.3V
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 P3.3V_ALW/AUX & P5.0V_ALW BA41-XXXXX


4 3 2 1
HU-1M2012-121JT
HU-1M2012-121JT
4 3 2 1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL VDC
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS CPU VRM [SEMTECH]
B511
B510
EXCEPT AS AUTHORIZED BY SAMSUNG. C548 C974
100nF 100nF
25V 25V
P5.0V EMC NEED ADD
D EC3 C549 EC4 D

10uF C550 10uF
BAT54
100nF
D508
1nF
1
25V 25V
AL 25V AL
C581
1000nF
3
P3.3V NO_STUFF
2.2 1000nF
R553 5 6 7 8 5 6 7 8
VDC C582 D1 D2 D3 D4 D1 D2 D3 D4
Q505 Q504
TG1 G HAT2198R G HAT2198R
4 4 L3 CPU_CORE
R551 25V
10K 100nF
S1 S2 S3 S1 S2 S3 0.39uH
1% P3.3V DRN1 1 2 3 1 2 3 R57 0.001 1W 1%
g
C583
5 6 7 8 5 6 7 8 5 6 7 8
1nF D1 D2 D3 D4 D1 D2 D3 D4 D1 D2 D3 D4 EC13 EC15
C584 HAT2195R 330uF 330uF
VTT3_PWRGD R552 0 Q508 Q509 Q537 2V 2V
AL AL
n
R557 1% BG1 G HAT2195R G G HAT2195R
NO_STUFF 2K 100 4 4 4
1% R554 TP19118 S1 S2 S3 S1 S2 S3 S1 S2 S3
l
C578 10nF 1 2 3 1 2 3 1 2 3
R548
10K
1%
R550
u
NO_STUFF
14-B1 11-D4
CPU1_DPRSTP# R549 0
0
20-C1
a
51-B3 KBC3_VRON R558 475 1%
14-B1 22-C4 CHP3_DPRSLPVR
s i
C P5.0V C
t
45
44
43
42
41
40
39
38
37
36
35
34
C585 1nF R533 R534
22.6 22.6 R531 5.11K 1%
PGND
DPRSTP*
VPN1
VIN1
BST1
TG1
DRN1
BG1
V5_1
EN
NC
ISH
R559 47K 5% R555 20K 1% 1% 1%
m
1 33 R532 5.11K 1%
n
CLKIN* CS1+
R560 30.1K 1% R556 200K 1% 2
VREF CS1-
32
3
HYS CS2-
31 R536 5.11K 1%
4 30
CLSET CS2+
5 29 R535 5.11K 1%
a
CPU1_VID(6) VID6 ERROUT
e
G_CPU 11-C4 6 U507 28
CPU1_VID(5) 11-C4 7
VID5 VCCA
27 1%
CPU1_VID(4) VID4 SC452IMLTRT AGND
11-C4 8 26 2K
CPU1_VID(3) 11-C4 9
VID3 DAC
25 R52
CPU1_VID(2) 11-C4 10
VID2 SS
24
S fid
PWRGD
CPU1_VID(1) VID1 DRP+ C551 C580
HU-1M2012-121JT
HU-1M2012-121JT
11-C4 11 23 C552
DRN2
CPU1_VID(0)
VPN2
VID0 DRP- 1nF 100nF

BST2
V5_2
VIN2
11-C4 47nF 1000nF

BG2
PSI*
TG2
FB+
FB-
25V
C554
C30
C553
P3.3V C24 VDC
0.1nF
0.047nF 0.47nF
12
13
14
15
16
17
18
19
20
21
22
B508
B509
R542 G_CPU
2K
1%
n
VRM3_CPU_PWRGD
3.3K
R537
R547
22-C4 51-B3
CPU1_PSI#
10K
1%
CPU1_VCCSENSE
11-C4 R539 12.1 1% EC9 C547 EC8
B 11-C4 12-C4 C579 10nF 10uF C546 10uF B
100nF
C555 25V 1nF
25V 25V
o
0.047nF AL AL
R538 12.1 1%
CPU1_VSSSENSE 11-B4 12-B4 NO_STUFF
R541 5 6 7 8 5 6 7 8
D1 D2 D3 D4 D1 D2 D3 D4
C
100
1%
Q503 Q534
TG2 CPU_CORE_HG2 G G HAT2198R
C559 4
HAT2198R 4 L2
1nF S1 S2 S3 S1 S2 S3
0.39uH
DRN2 CPU_CORE_PHASE_2 1 2 3 1 2 3 R56 0.001 1W 1%
5 6 7 8 5 6 7 8 5 6 7 8
D1 D2 D3 D4 D1 D2 D3 D4 D1 D2 D3 D4
EC12 EC14
VDC 330uF 330uF
Q507 Q536 Q538 2V 2V
BG2 CPU_CORE_LG2 G HAT2195R G HAT2195R
G HAT2195R AL AL
SHORT507
INSTPAR C558 4 4 4
S1 S2 S3 S1 S2 S3 S1 S2 S3
100nF
R540 1 2 3 1 2 3 1 2 3
25V
2.2 C557
1000nF NO_STUFF
G_CPU
D507 P5.0V
BAT54
3 1
A A
C556
1000nF DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
KEVIN LEE 1.0 CPU VRM BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
VDC
HU-1M2012-121JT
HU-1M2012-121JT
D D
External Graphic Core Power and P1.5V
B17
B18
100nF 100nF EC18 EC19
C64 C65 10000nF 10000nF
g
R353 40.2K 1%
TP19308
R351
n
39.2K
1%
u l
VDC
P5.0V_AUX P5.0V_AUX
a
R352 G_P1.5V
8 7 6 5 8 7 6 5 0
s i
D4 D3 D2 D1 D4 D3 D2 D1
C TP19309 C991 100nF EC500 C
TP19310 1000nF C524
Q11 Q12 C321 10000nF
6.3V
t
HAT2198R G HAT2198R G 1000nF R349 R790 Q500
4 4 6.3V 100K NO_STUFF 100K PHKD13N03LT
6
5
4
3
2
1
S3 S2 S1 S3 S2 S1 1% 1% 1 8
S2 D2_2
VO2
VFB2
TONSEL
GND
VFB1
VO1
3 2 1 3 2 1 2 7
EGFX_CORE TP193127 TP19307 G2 D2_1 P1.5V
m
24 3 6
n
8
PGD2 PGD1
23 R791 C325 100nF 4
S1 D1_2
5
C322 TP19298
100nF TP193139 EN2 EN1 3.3
22 TP19305 TP19306
G1 D1_1
L7 VBST2 VBST1 L6
TP19314
10 U21 21 TP19304
0.82uH R788 3.3 TP19315 DRVH2 DRVH1 TP19303
4.7uH
11 20
a
TP19316 LL2 LL1
19 TP19302
e
12 TPS51124RGER
DRVL2 DRVL1
8 7 6 5 8 7 6 5 EC20
PGND2
PGND1
V5FILT
EC22 EC23 D4 D3 D2 D1 D4 D3 D2 D1 100uF
TRIP2
TRIP1
V5IN
THM
C71 330uF 330uF 6.3V
100nF 2.5V 2.5V Q15 Q16 AD
S fid
AL AL
HAT2195R G HAT2195R G P5.0V_AUX
25
13
14
15
3.3 16
17
18
4 4
S3 S2 S1 S3 S2 S1
3 2 1 3 2 1
TP19299
C320
TP19301 4700nF
6.3V
R355
TP19300
n
C326 R509
R350 1000nF 7.5K
B 7.5K 1% R519 10K 1%
KBC3_PWRON B
1%
P5.0V_AUX
Co C533
0.047nF
TP19341
R514
301K
1%
R515
24.3K
1%
TP19317
G_P1.5V
R787 0 TP19318
INSTPAR
SHORT501
INSTPAR
SHORT500
R513
R511 43.2K
R512
D 3 1% G_P1.5V G_P1.5V
100K
1%
1% Q502
1K
G RHU002N06
1
R516
D 3 S
A 2 A
10K
1%
Q501
G RHU002N06 C542
GFX3_VOLTID 72-D3
22nF
1 25V
DRAW DATE TITLE
S 2
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 MAIN
H : 1.15V APPROVAL REV PART NO.
G_P1.5V G_P1.5V EXTERNAL GFX POWER VRM BA41-XXXXX
L : 1.20V KEVIN LEE 1.0

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P5.0V
R147
1%
1K
U10
SN74AHCT1G125DCKR
g
5
2 + 4
OE*
-
64-C3
BUF5_PLT_RST#
3
1
n
14-B1 21-C1 22-B4 #9
PLT3_RST#
27-C2 28-C3 37-A4 38-C2
Main to Swap B’d
l
Main to HDD
u
P3.3V
a
R149
s
0
i
C R136 C
4.7K
J48 NO_STUFF
t
SOCK-22P-1R
S1 J18
GND1
S2 CDROM-50P
SAT1_TXP0 RX+ IDE5_D(8:15)
R148
20-B3 S3 63-B3 20-C1
SIGNAL
SAT1_TXN0 RX- 1 2
m
S4
33
20-B3
n
20-B3 S5
GND2 IDE5_D(0:7) 20-C1 63-C3
3 4 8
SAT1_RXN0 20-B3 S6
TX- 7
BUF5_PLT_RST# 63-A3
5 6 9
SAT1_RXP0 S7
TX+ 6
7 8 10
P3.3V GND3 5
9 10 11
a
11 12
e
P1 4 12
3.3V_1 13 14
P2 3 13
3.3V_2 15 16
P3 2 14
C272 3.3V_3 17 18
10000nF
C275 C273 P4
GND4
1
19 20
15
100nF 100nF P5 0
S fid
6.3V
P6
GND5 21 22 63-C3 20-B1
IDE5_DREQ
P7
GND6 23 24 63-C3 20-B1
IDE5_IOR#
POWER
NO_STUFF P8
5V_1 IDE5_IOW# 20-B1 63-C3 49.9 1%
25 26 63-C3 20-B1 P5.0V
P9
5V_2 IDE5_IORDY 20-B1 63-C3
27 28 IDE5_DACK#
5V_3 IDE5_IDEIRQ R799 29 30
P10 20-B1 21-B3 63-C3
P5.0V P11
GND7 IDE5_A1 20-B1 63-C3
31 32 63-C3 20-B1
P12
RESERVE P5.0V IDE5_A0 20-B1 63-C3
33 34 63-C3 20-B1
IDE5_A2
P13
GND8 IDE5_CS1# 20-B1 63-C3
35 36 IDE5_CS3#
12V_1 37 38
P14
C227 C228 12V_2 39 40
n
C229 4700nF 4700nF
C230 C274 P15
12V_3 41 42
100nF 100nF 100nF
6.3V 6.3V C873 43 44 P5.0V
M1
MNT1 4700nF C874 C875 45 46 R721
B M2
MNT2 6.3V
100nF 100nF 47 48 10K B
1%
NO_STUFF 49 50
Co EMI6
EMI
CONTACT-PLATE-EMI
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 CONNECTOR
KEVIN LEE 1.0 HDD & ODD CONNECTOR BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG. 1 PORT USB CONNECTOR MDC Connecter
MT510
RMNT-32-100-1P
MT502
RMNT-32-100-1P
P5.0V_AUX Need 4A Routing

U7
TPS2062 P3.3V_AUX
D 2 D
IN TP19319
7
OUT1
8
C108 OC1*
J21 C6
100nF
5
OC2* OUT2
6 EC24 C5 10000nF
3 C83 68uF C84 R794 SOCK-12P-2R-SMD 100nF MT501
10V EN1* 6.3V RMNT-32-100-1P
4
EN2* GND
1 100nF 25V 0.047nF 1K 1 2
AL
MDC3_SDO 20-B3 40-C4 71-B3
3 4
5 6
NO_STUFF MDC3_SYNC 20-C3 R37 33
7 8
R80
KBC3_PWRON_INV# MDC3_SDI1 9 10 20-C3
MDC3_RST# 11 12 MDC3_BCLK
0
20-C3 13
MNT1
14
MNT2
15
g
B518 J50 MNT3
16
MNT4
ACM2012-900-2P-T JACK-USB-4P 17
MNT5
1 4 1 18
GND MNT6 M506 M503
2
USB3_P0+ DATA+
HEAD HEAD
n
3
USB3_P0- DATA- DIA DIA
4
PWR
2 3 5 LENGTH LENGTH
NO_STUFF MNT1
l
6
R79
MNT2
1
7
MNT3
0
u
8
PGB1010603NR
D515
PGB1010603NR
D513
MNT4
P3.3V
Bluetooth Interface
a
2
2
ESD SUPRESSION COMPONENT
s i
C C
R779 0 M507 M502
t
HEAD HEAD
NO_STUFF R777 0 DIA DIA
LENGTH LENGTH
m n
P3.3V_AUX
Q535
SI2315BDS-T1 J505
a e
C8 C7 HDR-8P-1R-SMD
100nF 100nF TP19321 M500 M508
3
2
1
HEAD HEAD
D
S
2
DIA DIA
1
G
USB3_P5+ 3 LENGTH LENGTH
R773
S fid
USB3_P5- 4
300K
P5.0V_AUX
2 PORT USB CONNECTOR EMI Request
1%
C980
5
6
U504 TP19320 7
100nF 8
TPS2062 9
2
IN
Need 4A Routing R772 10
MNT1
MNT2
7 10K
OUT1
8 1/20W M505
C19 5
OC1*
6 HEAD
100nF OC2* OUT2 EC1
NO_STUFF DIA
n
10V
3
EN1*
C12 68uF C11 R795
4 1 100nF 25V 0.047nF 1K LENGTH
EN2* GND AL
B B
NO_STUFF
o
KBC3_PWRON_INV# J22
JACK-8P-LED-MNT
TOUCHPAD CONNECTOR
1
USB3_P2-_R PWR0 P5.0V
USB3_P2- R22 0 2
USB0-
22-B2 B2
R21 0 3
C
USB3_P2+ 22-B2 ACM2012-900-2P-T 4
USB0+
USB3_P2+_R GND1
1 4
C667
1
5
USB3_P3-_R PWR1 100nF
6
PGB1010603NR
D5
PGB1010603NR
D4
USB1- 10V
NO_STUFF 7 J501
USB1+ CONN-6P-FPC
2 3 8
2
USB3_P3+_R GND2
1
9
NO_STUFF 10
MNT1 KBC5_TDATA 2
R26 0 11
MNT2 TOUCHPAD_BUTTON_R 3
USB3_P3- B4 MNT3 TOUCHPAD_BUTTON_L 4
USB3_P3+
22-B2 R23 0 12
MNT4 KBC5_TCLK 5
22-B2 ACM2012-900-2P-T
6
1 4 7
MNT1
1
8
MNT2
PGB1010603NR
D7
PGB1010603NR
D6
NO_STUFF
2 3
2
A NO_STUFF A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 USB MDC &
KEVIN LEE 1.0 TOUCHPAD BLUETOOTH I/F BA41-XXXXX


4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
KBC5_KSI(0:7) 51-B4
D
0
1 KEYBOARD LID_SWITCH D
2
3
4
5
P3.3V P3.3V USB I/F B’D
6
7
KBC5_KSO(0:15) 51-B4 J503 P5.0V_AUX

CONN-24P-FPC
0
1 R743
1
2 20K
2 1% J504
3
3 HDR-6P-1R-SMD
4
U520
g
4
5 A3212ELH/HED55XXU12 1
6 USB3_P1- 2
1
7 SUPPLY USB3_P1+ 3
2
8
3
OUTPUT LID3_SWITCH# KBC3_PWRON_INV# 4
9 GND 5
n
10
C908 6
5
11
100nF
12
l
6
13
14 C910
u
15
100nF
7
16
a
8
9
17
18
s i
10
C 11
19 C
12
20
21
t
13
14
22
15
23
24
m n
C160
C159
C161
C162
C928
C929
C930
C931
C932
C936
C937
C167
C933
C165
C934
C935
C888
C889
C166
C887
C153
C154
C155
C890
a
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
1nF
80H DECODER CONNECTOR

NO_STUFF
S fid e ICT PORT

P3.3V LED B’D I/F
B
P5.0V P3.3V
J27
HDR-10P-1R-SMD
o n P1.5V P1.2V P1.8V VCCP_CORE VDC

J52
HDR-10P-1R-SMD KBC3_NUMLED#
KBC3_CAPSLED#
J500
CONN-12P-FPC
1
2
3
B
R142
C
1 1 KBC3_SCLED# 4
2 2 CHP3_SATALED# 5
0
28-C3 37-A4 #10

PLT3_RST# 14-B1 21-C1 22-B4 27-C2
3 3 WLON_LED# 6
CLK3_DBGLPC 8-C4
20-D1 50-C2 51-C3 65-C3
4 4 LED3_GREEN 7
LPC3_LFRAME# 20-D1 50-C2 51-C3 65-C3
5 AUX_PG 5 LED3_AMBER 8
LPC3_LAD(3) 20-D1 50-C2 51-C3 65-C3
6 6 LED3_POWERLED 9
LPC3_LAD(2) 7 VRM3_CPU_PWRGD 1K 1% TP19132
7 TOUCHPAD_BUTTON_L 10
20-D1 50-C2 51-C3 65-C3 R518
LPC3_LAD(1) 20-D1 50-C2 51-C3 65-C3
8 CPU1_PWRGDCPU R517 1K 1% TP19133 8 TOUCHPAD_BUTTON_R 11
LPC3_LAD(0) 9 CPU1_CPURST# 9 12
10 10
11 11
MNT1 MNT1
12 MNT2 12 MNT2
A A
DRAW DATE TITLE
CHECK
SUN XIAO
DEV. STEP
6/26/2007
Gevena SAMSUNG
ELECTRONICS
WUSHIJIANG PV2 KEYBOARD 80PORT ICT PORT
KEVIN LEE 1.0 LID SWITCH LED B’D USB I/O B’D BA41-XXXXX

4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D D
P3.3V P1.5V
R615 R616
TOP SIDE 10
1%
10
1%
C984 C989 C983 C990 TP19323 TP19322

0.1nF 0.022nF 0.047nF 0.0033nF
g
D 3 D 3
Q523 Q524
G RHU002N06 G RHU002N06
KBC3_PWRON_INV#
n
1 1
S 2 S 2
C
BOTTOM SIDE
s u i a l C
t
C276
0.018nF
a m e n
MT511 MT13
S fid MT507 MT500 MT506 MT512 MT27 MT32 MT503
n
RMNT-32-80-1P RMNT-25-50-1P RMNT-32-80-1P RMNT-32-80-1P RMNT-32-100-1P RMNT-32-100-1P RMNT-25-50-1P RMNT-25-50-1P RMNT-37-85-1P M1
HEAD
B DIA B
LENGTH
M509
EMI
Co EMI8
EMI
CONTACT-PLATE-EMI
A A
SAMSUNG
ELECTRONICS
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
TOUCHPAD AND LED B’D
P3.3V_SUB
D D
Q6
BSS84
R40 150 1% KBC3_NUMLED#
TP19152 TP19157 LED501LTST-C193TBKT-AC
2
2
D
S
1
G
J60
CONN-12P-FPC
SUB_KBC3_NUMLED#
Q7 1
BSS84 SUB_BUTTON_R 2
R41 TP19153
150 1% KBC3_CAPSLED# TP19158 LED502LTST-C193TBKT-AC SUB_BUTTON_L 3
2
2
SUB_LED3_POWERLED 4
D
S
g
SUB_LED3_AMBER 5
1
G
SUB_LED3_GREEN 6
SUB_KBC3_CAPSLED# SUB_WLON_LED# 7
Q8 SUB_HDD3_LED# 8
BSS84 SUB_KBC3_SCLED# 9
n
R42 TP19154
KBC3_SCLED# TP19159 LED503LTST-C193TBKT-AC SUB_KBC3_CAPSLED# 10
3
150 1%
2
2
SUB_KBC3_NUMLED# 11
D
S
12
l
1
G
P3.3V_SUB
u
SUB_KBC3_SCLED#
a
R43 150 1% TP19155
HD3_LED# LED504LTST-C193TBKT-AC
1
SUB_HDD3_LED#
s i
C C
R44 150 1% TP19156
WLON_LED# LED505LTST-C193TBKT-AC
1
SUB_WLON_LED#
m n t
LED506
CL-165HR/YG-D
3
4
G
R
1
a
S fid
SUB_LED3_GREEN
SUB_LED3_AMBER
e P3.3V_SUB
R28
P3.3V_SUB
R29
3
10K 10K
MMBD4148
D8
MMBD4148
D9
1% 1%
1
n
SUB_BUTTON_L
B B
SUB_BUTTON_R
o
1
1
2
2
SW-TACT-4P
SW500
SW-TACT-4P
SW501
C 4
3
LED507
LTST-C193TBKT-AC
2
SUB_LED3_POWERLED
A A
SAMSUNG
ELECTRONICS
60
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
SIO AND USB SUB B’D
P5.0V_USB
P5.0V_SIO
D J39 D
HDR-10P-SMD MT513
RMNT-25-50-1P
1 J44
SUB_SIO3_DTR1# 2
HDR-6P-1R-SMD
SUB_SIO3_TXD1 3
SUB_SIO3_RTS1# 4 1
SUB_SIO3_CTS1# 5 SUB_USB3_P1- 2
SUB_SIO3_RI1# 6 SUB_USB3_P1+ 3
SUB_SIO3_RXD1 7 SUB_KBC3_PWRON_INV# 4
SUB_SIO3_DSR1# 8 5
SUB_SIO3_DCD1# 9 6
10
11
MNT1
12 MNT2
TP19325
n g l
J58
DSUB-9-FEMALE
u
B15 MMZ1608S121AT 1
SUB_SIO9_DCD# B14 MMZ1608S121AT TP19326 6
SUB_SIO9_DSR# B16 MMZ1608S121AT TP19327
a
2
SUB_SIO9_RXD B10 MMZ1608S121AT TP19328 7
SUB_SIO9_RTS# B11 MMZ1608S121AT TP19329 3
s i
C SUB_SIO9_TXD B12 MMZ1608S121AT TP19330 8
C
SUB_SIO9_CTS# B13 MMZ1608S121AT TP19331 4
SUB_SIO9_DTR# TP19332
t
B9 MMZ1608S121AT 9 10
SUB_SIO9_RI# 5 11
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
m n
P5.0V_USB
U1
NO_STUFF TPS2062
C47
C46
C48
C45
C58
C57
C60
C59
a
IN TP19340
e
7
OUT1
8
C15 5
OC1*
6
100nF OC2* OUT2 EC2
10V
3
EN1*
C14 100uF C13 R792
4 1 100nF 6.3V 0.047nF 1K
S fid
EN2* GND AL
SUB_KBC3_PWRON_INV#
R30
0
P5.0V_SIO
B5 J57
n
ACM2012-900-2P-T JACK-USB-4P
1 4 1
GND
B SUB_USB3_P1+
2
DATA+
B
U510 3
SUB_USB3_P1- DATA-
o
SP3243ECA 4
PWR
C53 100nF TP1933328 26 2 3 5
TP19334 24 C1+ VCC NO_STUFF MNT1
100nF
R31
C1- TP19337 C52 MNT2
1
27 470nF 16V 7
V+ MNT3
0
C38 TP193351
470nF 16V 3 TP19338
C49 470nF 16V 8
PGB1010603NR
D10
PGB1010603NR
D11
TP19336 2 C2+ V- C61 MNT4
C
C2- 10000NF
9
2
14
T1OUT
10
SUB_SIO9_DTR# 10V
ESD SUPRESSION COMPONENT
C51
SUB_SIO3_DTR1# 13
T1IN T2OUT
11 SUB_SIO9_TXD
SUB_SIO3_TXD1 12
T2IN T3OUT SUB_SIO9_RTS#
SUB_SIO3_RTS1# T3IN
19
4
R1OUT
18
SUB_SIO3_CTS1#
SUB_SIO9_CTS# 5
R1IN R2OUT
17
SUB_SIO3_RI1# P5.0V_SIO NO_STUFF
SUB_SIO9_RI# 6
R2IN R3OUT
16 SUB_SIO3_RXD1
SUB_SIO9_RXD 7
R3IN R4OUT
15
SUB_SIO3_DSR1#
SUB_SIO9_DSR# 8
R4IN R5OUT SUB_SIO3_DCD1#
SUB_SIO9_DCD# R5IN
20
R2OUT* R62
P5.0V_SIO 10K
21 1%
STATUS* TP19324
22
TP19339 23 SHDN*
R63 10K 1%
ONLINE* GND
25
100nF
A A
C50
SAMSUNG
Option ELECTRONICS
60
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D TP18380 TP18344 TP17799 TP17751 D

TP18381 TP18345 TP17800 TP17752
TP18382 TP18346 TP17801 TP17753
TP18383 TP18347 TP17802 TP17754
TP18384 TP18319 TP17803 TP17755
TP18385 TP18320 TP17804 TP17756
TP18386 TP18321 TP17805 TP17757
TP18387 TP18322 TP17758
TP18388 TP18323 TP17759
TP18389 TP18324 TP17808 TP17760
TP18390 TP18325 TP17809 TP17761
TP18391 TP18326 TP17810 TP17762
TP18327 TP17767 TP17763
TP18393 TP18315 TP17768 TP17764
g
TP18394 TP18316 TP17769 TP17765
TP18395 TP18317 TP17770 TP17766
TP18396 TP18318 TP17771 TP17719
TP18397 TP18306 TP17772 TP17720
TP18398 TP18307 TP17773 TP17721
n
TP18399 TP18308 TP17774 TP17722
TP18400 TP18309 TP17775 TP17723
TP18401 TP18310 TP17776 TP17724
l
TP18402 TP18311 TP17777 TP17725
TP18403 TP18312 TP17778 TP17726
u
TP18404 TP18313 TP17779 TP17727
TP18405 TP18314 TP17780 TP17728
a
TP18406 TP17781 TP17729
TP18407 TP17782 TP17730
s i
C TP18408 TP17783 TP17731 C
TP18409 TP17784 TP17732
TP18410 TP18295 TP17785 TP17733
t
TP18411 TP18296 TP17786 TP17734
TP18348 TP18297 TP17787 TP17713
TP18349 TP18298 TP17788 TP17714
TP18350 TP18299 TP17789 TP17715
m n
TP18351 TP18300 TP17790 TP17716
TP18352 TP18301 TP17791 TP17717
TP18353 TP18302 TP17792 TP17718
TP18354 TP18303 TP17793
a
TP18304 TP17794
e
TP18305 TP17795
TP18259 TP17796
TP18260 TP17797
TP18261 TP17798
S fid
TP18262 TP17735
TP18361 TP18263 TP17736
TP18362 TP18264 TP17737
TP18363 TP18270 TP17738
TP18364 TP18271 TP17739
TP18272 TP17740
TP18273 TP17741
TP18367 TP18274 TP17742
TP18368 TP18275 TP17743
TP18369 TP18276 TP17744
n
TP18370 TP18277 TP17745
TP18371 TP18278 TP17746
TP18372 TP18279 TP17747
B TP18373 TP18280 TP17748
B
TP18374 TP18281 TP17749
o
TP18375 TP18282 TP17750
TP18376 TP18283
TP18377 TP18284
TP18378 TP18285
TP18379 TP18286
C
TP18328 TP18287
TP18329 TP18288
TP18330 TP18289
TP18331 TP18290
TP18332 TP18251
TP18333 TP18252
TP18334 TP18253
TP18335 TP18254
TP18336 TP18255
TP18337 TP18256
TP18338
TP18339
TP18340 TP17811
TP18341 TP17812
TP18342 TP17813
TP18343 TP17814
TP17815
TP17816
TP17817
TP17818
A TP17819 A
TP17820
TP17821
TP17822
SAMSUNG
ELECTRONICS
4 3 2 1
4 3 2 1
SAMSUNG PROPRIETARY
D TP18612 TP19054 D
TP18605 TP18613 TP19055
TP18606 TP18614 TP18230
TP18607 TP18615 TP18232
TP18608 TP18616 TP18235
TP18609 TP18617 TP18241
TP18610 TP18618 TP18242
TP18611 TP18619 TP18245
TP18585 TP18620 TP18198
TP18586 TP18621 TP18200
TP18587 TP18622 TP18204
TP18588 TP18623 TP18208
TP18589 TP18624 TP18212
TP18590 TP18625 TP18217
g
TP18591 TP18626 TP18222
TP18592 TP18627 TP18223
TP18593 TP18628 TP18224
TP18594 TP18629 TP18225
TP18595 TP18630 TP18116
n
TP18596 TP18631 TP18122
TP18597 TP18632 TP18124
TP18598 TP18633 TP18125
l
TP18599 TP18634 TP18130
TP18600 TP18635 TP18131
u
TP18537 TP18636 TP18081
TP18538 TP18637 TP18084
a
TP18539 TP18067 TP18089
TP18068 TP18095
s i
C TP18541 TP18069 TP18098 C
TP18070
TP18071
t
TP19069 TP18072
TP19070 TP18073
TP19071
TP19072
m n
TP19073
TP19074
TP19075
TP19076
a
TP19077
e
TP19078
TP19079
TP19080 TP18053 TP18164
TP19081 TP18054 TP18170
S fid
TP19082 TP18172
TP19083 TP18178
TP19084 TP18057 TP18183
TP19085 TP18021 TP18187
TP19086 TP18022 TP18188
TP19087 TP18023 TP18192
TP19088 TP18024 TP18134
TP19089 TP18025 TP18136
TP19090 TP18026 TP18141
TP19091 TP18027 TP18146
n
TP19092 TP18028 TP18150
TP19093 TP18029 TP18152
TP19094 TP18030 TP18158
B TP19095 TP18031 TP18161
B
TP19096 TP18032 TP18104
o
TP19097 TP18033 TP18109
TP19098 TP18034 TP18112
TP19099 TP18035
TP19100 TP18036
TP19056 TP18037
C
TP19057 TP18038
TP19058 TP18039
TP19059 TP18040
TP19060 TP18041
TP19063 TP18042
TP19064 TP18043
TP19065 TP18044
TP19066 TP18045
TP19067 TP18046
TP19068 TP18047
TP18247 TP18048
TP18248 TP18049
TP18249 TP18050
TP18250 TP18051
TP18052
A A
SAMSUNG
ELECTRONICS
4 3 2 1

Samsung r700 Schematic Diagram

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Samsung r700 Schematic Diagram

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4 3 2 1

KEVIN LEE 1.0 COVER BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 1 OF 58

FAN CPU Smart IGFX / EGFX

Channel A (Standard) DDR II 667/533,400 DDR II PG 18

KEVIN LEE 1.0 BLOCK DIAGRAM BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 2 OF 58

D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D

USB PORT Assign

KEVIN LEE 1.0 BOARD INFO BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 3 OF 58

P3.3V_ALW P3.3V_AUX CRESTLINE Thermal Sensor MICOM

Host / ME Boot ICH8-M SPI ICH8-M

Host S5 / ME Boot P1.8V_LAN VTT3_PWRGD ATI (TBD)

October 23, 2007 10:38:02 AM PAGE 4 OF 58

CPU CORE MICOM 3V

C 3.3V 0.14 A (TBD) C

GMCH 0.2 A (TBD) R5C843

0.2 A (TBD) 0.1 A (TBD)

1.8V_AUX 2.7 A (TBD)

Value by Datasheet/Application notes (Value by measurement)

KEVIN LEE 1.0 POWER RAILS BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 5 OF 58

9-M) ME Host Clock

KBC 14 18 27) CHP3_PWROK

8) KBC3_SUSPWR or M-2) KBC3_ME_PWRON 9) P1.8V_AUX

AC_DC / Battery M-1) KBC3_DDR_PWRON MAX8632 17) CHP3_ME_PWROK

8) KBC3_SUSPWR M-2) KBC3_ME_PWRON 9-M) P1.05V_M GMCH

LT1930 16) P12V

GFX VR 16) GFX_CORE M-2) KBC3_ME_PWRON 16) P1.5V Sheet 14

FDS6680A 16) P1.8V

KEVIN LEE 1.0 POWER SEQUENCE BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 6 OF 58

100 MHz EXP3_CLKREQ*

CPU_STP* 200 MHz CLK0_HOST_GMCH/GMCH* HPLL

DMI 100 MHz CLK1_DCKLAN*

100 MHz CLK1_SATA/SATA*

14.318 MHz SUN XIAO 6/26/2007

1.0 CLOCK DIAGRAM

October 23, 2007 10:38:02 AM PAGE 7 OF 58

FSA FSB FSC CLK REQ DEVICE SRC PORT

Place 14.318MHz within

KEVIN LEE 1.0 CK-505 BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 8 OF 58

KEVIN LEE 1.0 THERMAL & FAN CONTROL BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 9 OF 58

A7* BR0* CPU1_BREQ# D4* D36*

13 L2 D20 10 J24 Y23 42

KEVIN LEE 1.0 MEROM(1/3) BA41-XXXXX

undefined October 23, 2007 10:38:02 AM PAGE 10 OF 58

TEST1 RSVD_5 0 1 0 0 0 1 0 1.0750 V 1 0 0 1 0 1 0 0.5750 V 1 1 1 0 0 1 1 0.0625 V

TEST5 RSVD_9 0 1 0 0 1 1 0 1.0250 V 1 0 0 1 1 1 0 0.5250 V 1 1 1 0 1 1 1 0.0125 V

TEST6 RSVD_10 0 1 0 0 1 1 1 1.0125 V 1 0 0 1 1 1 1 0.5125 V 1 1 1 1 0 1

of the first GTLREF0 pin with Zo=55ohm trace.

COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)

DRAW DATE TITLE

October 23, 2007 10:38:02 AM PAGE 11 OF 58

AE1 AD7 F10 C19

VSS_46 VCC_42 VCC_92 VSS_75

AE11 AD9 F12 C16

KEVIN LEE 1.0 MEROM(3/3) BA41-XXXXX

October 23, 2007 10:38:02 AM PAGE 12 OF 58

Host Address Bus

Host Data Bus